Re: [igt-dev] [RFC v2 01/43] test/i915: gem_bad_reloc: use the gem_engine_topology library

Re: [igt-dev] [RFC v2 01/43] test/i915: gem_bad_reloc: use the gem_engine_topology library

[Chris Wilson]

Quoting Ramalingam C (2019-06-21 11:03:03)
> Replace the legacy for_each_engine* defines with the ones
> implemented in the gem_engine_topology library.
> 
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
>  tests/i915/gem_bad_reloc.c | 14 +++++++-------
>  1 file changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/tests/i915/gem_bad_reloc.c b/tests/i915/gem_bad_reloc.c
> index 7624cd8e0949..26a932a3a933 100644
> --- a/tests/i915/gem_bad_reloc.c
> +++ b/tests/i915/gem_bad_reloc.c
> @@ -50,7 +50,8 @@ IGT_TEST_DESCRIPTION("Simulates SNA behaviour using negative self-relocations"
>   * than the total size of the GTT), the GPU will hang.
>   * See https://bugs.freedesktop.org/show_bug.cgi?id=78533
>   */
> -static void negative_reloc(int fd, unsigned engine, unsigned flags)
> +static void negative_reloc(int fd, const struct intel_execution_engine2 *e,
> +                          unsigned flags)
>  {
>         struct drm_i915_gem_execbuffer2 execbuf;
>         struct drm_i915_gem_exec_object2 obj;
> @@ -60,7 +61,6 @@ static void negative_reloc(int fd, unsigned engine, unsigned flags)
>         uint64_t *offsets;
>         int i;
>  
> -       gem_require_ring(fd, engine);
>         igt_require(intel_gen(intel_get_drm_devid(fd)) >= 7);
>  
>         memset(&obj, 0, sizeof(obj));
> @@ -70,7 +70,7 @@ static void negative_reloc(int fd, unsigned engine, unsigned flags)
>         memset(&execbuf, 0, sizeof(execbuf));
>         execbuf.buffers_ptr = (uintptr_t)&obj;
>         execbuf.buffer_count = 1;
> -       execbuf.flags = engine | (flags & USE_LUT);
> +       execbuf.flags = e->flags | (flags & USE_LUT);
>         igt_require(__gem_execbuf(fd, &execbuf) == 0);
>  
>         igt_info("Found offset %lld for 4k batch\n", (long long)obj.offset);
> @@ -185,7 +185,7 @@ static void negative_reloc_blt(int fd)
>  
>  igt_main
>  {
> -       const struct intel_execution_engine *e;
> +       const struct intel_execution_engine2 *e;
>         int fd = -1;
>  
>         igt_fixture {
> @@ -193,12 +193,12 @@ igt_main
>                 igt_require_gem(fd);
>         }
>  
> -       for (e = intel_execution_engines; e->name; e++) {
> +       __for_each_physical_engine(fd, e) {

uABI testing not physical engines.
-Chris
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[igt-dev] [RFC v2 00/43] Upgrading the Engine discovery

[Ramalingam C]

Replaces the old static engine identification with new uAPI for engine
discovery.

Marked as RFC, because this is not tested on HW yet. And we need initial
review along with CI reaction.

Ramalingam C (43):
  test/i915: gem_bad_reloc: use the gem_engine_topology library
  test/i915: gem_exec_async: use the gem_engine_topology library
  test/i915: gem_exec_capture: use the gem_engine_topology library
  test/i915: gem_exec_params: use the gem_engine_topology library
  lib/i915: Helper func for engine class to exec_flag
  test/prime_vgem: use the gem_engine_topology library
  tests/i915/gem_exec_reuse: use the gem_engine_topology library
  tests/i915/gem_sync: use the gem_engine_topology library
  tests/i915/gem_busy: use the gem_engine_topology library
  tests/i915/gem_concurrent_all: use the gem_engine_topology library
  tests/i915/gem_cs_prefetch: use the gem_engine_topology library
  tests/i915/gem_ctx_create: use the gem_engine_topology library
  tests/i915/gem_ctx_isolation: use the gem_engine_topology library
  tests/i915/gem_ctx_switch: use the gem_engine_topology library
  tests/i915/gem_ctx_thrash: use the gem_engine_topology library
  tests/i915/gem_eio: use the gem_engine_topology library
  tests/i915/gem_exec_await: use the gem_engine_topology library
  tests/i915/gem_exec_create: use the gem_engine_topology library
  tests/i915/gem_exec_fence: use the gem_engine_topology library
  tests/i915/gem_exec_flush: use the gem_engine_topology library
  tests/i915/gem_exec_gttfill: use the gem_engine_topology library
  tests/i915/gem_exec_latency: use the gem_engine_topology library
  tests/i915/gem_exec_nop: use the gem_engine_topology library
  tests/i915/gem_exec_reloc: use the gem_engine_topology library
  tests/i915/gem_exec_schedule: use the gem_engine_topology library
  tests/i915/gem_exec_suspend: use the gem_engine_topology library
  tests/i915/gem_exec_whisper: use the gem_engine_topology library
  tests/i915/gem_mocs_settings: use the gem_engine_topology library
  tests/i915/gem_reset_stats: use the gem_engine_topology library
  tests/i915/gem_ring_sync_loop: use the gem_engine_topology library
  tests/i915/gem_ringfill: use the gem_engine_topology library
  tests/i915/gem_shrink: use the gem_engine_topology library
  tests/i915/gem_spin_batch: use the gem_engine_topology library
  tests/i915/gem_storedw_loop: use the gem_engine_topology library
  tests/i915/gem_userptr_blits: use the gem_engine_topology library
  tests/i915/i915_hangman: use the gem_engine_topology library
  tests/i915/i915_module_load: use the gem_engine_topology library
  tests/kms_busy: use the gem_engine_topology library
  tests/prime_busy: use the gem_engine_topology library
  tests/amdgpu/amd_prime: use the gem_engine_topology library
  tests/i915/gem_ctx_shared: use the gem_engine_topology library
  lib: replace the legacy funcs with gem_engine_topology libraries
  lib/gem_engine_topology: rename the macros

 benchmarks/gem_syslatency.c     |   7 +-
 lib/i915/gem_engine_topology.c  |  26 ++-
 lib/i915/gem_engine_topology.h  |   6 +-
 lib/i915/gem_ring.c             |   7 +-
 lib/i915/gem_submission.c       |   6 +-
 lib/igt_gt.c                    |  11 --
 lib/igt_gt.h                    |  21 --
 tests/amdgpu/amd_prime.c        |   5 +-
 tests/i915/gem_bad_reloc.c      |  14 +-
 tests/i915/gem_busy.c           |  23 +--
 tests/i915/gem_concurrent_all.c |   8 +-
 tests/i915/gem_cs_prefetch.c    |  18 +-
 tests/i915/gem_cs_tlb.c         |   2 +-
 tests/i915/gem_ctx_create.c     |  34 ++--
 tests/i915/gem_ctx_engines.c    |  10 +-
 tests/i915/gem_ctx_exec.c       |   2 +-
 tests/i915/gem_ctx_isolation.c  |  19 +-
 tests/i915/gem_ctx_shared.c     |  99 +++++-----
 tests/i915/gem_ctx_switch.c     |  26 +--
 tests/i915/gem_ctx_thrash.c     |  15 +-
 tests/i915/gem_eio.c            |  63 +++---
 tests/i915/gem_exec_async.c     |  34 ++--
 tests/i915/gem_exec_await.c     |   5 +-
 tests/i915/gem_exec_basic.c     |   8 +-
 tests/i915/gem_exec_capture.c   |  24 +--
 tests/i915/gem_exec_create.c    |   6 +-
 tests/i915/gem_exec_fence.c     | 112 +++++------
 tests/i915/gem_exec_flush.c     |  72 ++++---
 tests/i915/gem_exec_gttfill.c   |  30 +--
 tests/i915/gem_exec_latency.c   | 101 ++++------
 tests/i915/gem_exec_nop.c       | 119 ++++++------
 tests/i915/gem_exec_parallel.c  |   4 +-
 tests/i915/gem_exec_params.c    |  41 +---
 tests/i915/gem_exec_reloc.c     |  27 +--
 tests/i915/gem_exec_reuse.c     |  12 +-
 tests/i915/gem_exec_schedule.c  | 332 ++++++++++++++++----------------
 tests/i915/gem_exec_store.c     |   4 +-
 tests/i915/gem_exec_suspend.c   |  52 ++---
 tests/i915/gem_exec_whisper.c   |  27 +--
 tests/i915/gem_mocs_settings.c  |  54 +++---
 tests/i915/gem_reset_stats.c    |  60 +++---
 tests/i915/gem_ring_sync_loop.c |   4 +-
 tests/i915/gem_ringfill.c       |  32 ++-
 tests/i915/gem_shrink.c         |  22 ++-
 tests/i915/gem_spin_batch.c     |  36 ++--
 tests/i915/gem_storedw_loop.c   |  39 ++--
 tests/i915/gem_sync.c           | 232 +++++++++++-----------
 tests/i915/gem_userptr_blits.c  |   8 +-
 tests/i915/gem_wait.c           |   4 +-
 tests/i915/i915_hangman.c       |   8 +-
 tests/i915/i915_module_load.c   |  29 +--
 tests/kms_busy.c                |  62 +++---
 tests/perf_pmu.c                |  12 +-
 tests/prime_busy.c              |  24 +--
 tests/prime_vgem.c              |  72 ++++---
 55 files changed, 1047 insertions(+), 1083 deletions(-)

-- 
2.19.1

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[igt-dev] [RFC v2 01/43] test/i915: gem_bad_reloc: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_bad_reloc.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/tests/i915/gem_bad_reloc.c b/tests/i915/gem_bad_reloc.c
index 7624cd8e0949..26a932a3a933 100644
--- a/tests/i915/gem_bad_reloc.c
+++ b/tests/i915/gem_bad_reloc.c
@@ -50,7 +50,8 @@ IGT_TEST_DESCRIPTION("Simulates SNA behaviour using negative self-relocations"
  * than the total size of the GTT), the GPU will hang.
  * See https://bugs.freedesktop.org/show_bug.cgi?id=78533
  */
-static void negative_reloc(int fd, unsigned engine, unsigned flags)
+static void negative_reloc(int fd, const struct intel_execution_engine2 *e,
+			   unsigned flags)
 {
 	struct drm_i915_gem_execbuffer2 execbuf;
 	struct drm_i915_gem_exec_object2 obj;
@@ -60,7 +61,6 @@ static void negative_reloc(int fd, unsigned engine, unsigned flags)
 	uint64_t *offsets;
 	int i;
 
-	gem_require_ring(fd, engine);
 	igt_require(intel_gen(intel_get_drm_devid(fd)) >= 7);
 
 	memset(&obj, 0, sizeof(obj));
@@ -70,7 +70,7 @@ static void negative_reloc(int fd, unsigned engine, unsigned flags)
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = (uintptr_t)&obj;
 	execbuf.buffer_count = 1;
-	execbuf.flags = engine | (flags & USE_LUT);
+	execbuf.flags = e->flags | (flags & USE_LUT);
 	igt_require(__gem_execbuf(fd, &execbuf) == 0);
 
 	igt_info("Found offset %lld for 4k batch\n", (long long)obj.offset);
@@ -185,7 +185,7 @@ static void negative_reloc_blt(int fd)
 
 igt_main
 {
-	const struct intel_execution_engine *e;
+	const struct intel_execution_engine2 *e;
 	int fd = -1;
 
 	igt_fixture {
@@ -193,12 +193,12 @@ igt_main
 		igt_require_gem(fd);
 	}
 
-	for (e = intel_execution_engines; e->name; e++) {
+	__for_each_physical_engine(fd, e) {
 		igt_subtest_f("negative-reloc-%s", e->name)
-			negative_reloc(fd, e->exec_id | e->flags, 0);
+			negative_reloc(fd, e, 0);
 
 		igt_subtest_f("negative-reloc-lut-%s", e->name)
-			negative_reloc(fd, e->exec_id | e->flags, USE_LUT);
+			negative_reloc(fd, e, USE_LUT);
 	}
 
 	igt_subtest("negative-reloc-bltcopy")
-- 
2.19.1

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[igt-dev] [RFC v2 02/43] test/i915: gem_exec_async: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

v2:
  class and instance are compared for engine identification [Andi]

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_exec_async.c | 34 +++++++++++++++-------------------
 1 file changed, 15 insertions(+), 19 deletions(-)

diff --git a/tests/i915/gem_exec_async.c b/tests/i915/gem_exec_async.c
index 9a06af7e29cb..0da97f1f0506 100644
--- a/tests/i915/gem_exec_async.c
+++ b/tests/i915/gem_exec_async.c
@@ -28,7 +28,7 @@
 
 IGT_TEST_DESCRIPTION("Check that we can issue concurrent writes across the engines.");
 
-static void store_dword(int fd, unsigned ring,
+static void store_dword(int fd, const struct intel_execution_engine2 *e,
 			uint32_t target, uint32_t offset, uint32_t value)
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
@@ -41,7 +41,7 @@ static void store_dword(int fd, unsigned ring,
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = to_user_pointer(obj);
 	execbuf.buffer_count = 2;
-	execbuf.flags = ring;
+	execbuf.flags = e->flags;
 	if (gen < 6)
 		execbuf.flags |= I915_EXEC_SECURE;
 
@@ -80,15 +80,15 @@ static void store_dword(int fd, unsigned ring,
 	gem_close(fd, obj[1].handle);
 }
 
-static void one(int fd, unsigned ring, uint32_t flags)
+static void one(int fd, const struct intel_execution_engine2 *e)
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
 	struct drm_i915_gem_exec_object2 obj[2];
+	struct intel_execution_engine2 *engine;
 #define SCRATCH 0
 #define BATCH 1
 	struct drm_i915_gem_relocation_entry reloc;
 	struct drm_i915_gem_execbuffer2 execbuf;
-	unsigned int other;
 	uint32_t *batch;
 	int i;
 
@@ -138,19 +138,21 @@ static void one(int fd, unsigned ring, uint32_t flags)
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = to_user_pointer(obj);
 	execbuf.buffer_count = 2;
-	execbuf.flags = ring | flags;
+	execbuf.flags = e->flags;
 	igt_require(__gem_execbuf(fd, &execbuf) == 0);
 	gem_close(fd, obj[BATCH].handle);
 
 	i = 0;
-	for_each_physical_engine(fd, other) {
-		if (other == ring)
+
+	__for_each_physical_engine(fd, engine) {
+		if (engine->class == e->class &&
+		    engine->instance == e->instance)
 			continue;
 
-		if (!gem_can_store_dword(fd, other))
+		if (!gem_class_can_store_dword(fd, engine->class))
 			continue;
 
-		store_dword(fd, other, obj[SCRATCH].handle, 4*i, i);
+		store_dword(fd, engine, obj[SCRATCH].handle, 4*i, i);
 		i++;
 	}
 
@@ -185,7 +187,7 @@ static bool has_async_execbuf(int fd)
 
 igt_main
 {
-	const struct intel_execution_engine *e;
+	const struct intel_execution_engine2 *e;
 	int fd = -1;
 
 	igt_skip_on_simulation();
@@ -199,17 +201,11 @@ igt_main
 		igt_fork_hang_detector(fd);
 	}
 
-	for (e = intel_execution_engines; e->name; e++) {
-		/* default exec-id is purely symbolic */
-		if (e->exec_id == 0)
-			continue;
-
+	__for_each_physical_engine(fd, e)
 		igt_subtest_f("concurrent-writes-%s", e->name) {
-			igt_require(gem_ring_has_physical_engine(fd, e->exec_id | e->flags));
-			igt_require(gem_can_store_dword(fd, e->exec_id | e->flags));
-			one(fd, e->exec_id, e->flags);
+			igt_require(gem_class_can_store_dword(fd, e->class));
+			one(fd, e);
 		}
-	}
 
 	igt_fixture {
 		igt_stop_hang_detector();
-- 
2.19.1

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[igt-dev] [RFC v2 03/43] test/i915: gem_exec_capture: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones implemented
in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_exec_capture.c | 24 ++++++++++--------------
 1 file changed, 10 insertions(+), 14 deletions(-)

diff --git a/tests/i915/gem_exec_capture.c b/tests/i915/gem_exec_capture.c
index 4457496d6d05..c0c3b88d5fa7 100644
--- a/tests/i915/gem_exec_capture.c
+++ b/tests/i915/gem_exec_capture.c
@@ -61,7 +61,8 @@ static void check_error_state(int dir, struct drm_i915_gem_exec_object2 *obj)
 	igt_assert(found);
 }
 
-static void __capture1(int fd, int dir, unsigned ring, uint32_t target)
+static void __capture1(int fd, int dir, const struct intel_execution_engine2 *e,
+		       uint32_t target)
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
 	struct drm_i915_gem_exec_object2 obj[4];
@@ -145,7 +146,7 @@ static void __capture1(int fd, int dir, unsigned ring, uint32_t target)
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = (uintptr_t)obj;
 	execbuf.buffer_count = ARRAY_SIZE(obj);
-	execbuf.flags = ring;
+	execbuf.flags = e ? e->flags : 0;
 	if (gen > 3 && gen < 6)
 		execbuf.flags |= I915_EXEC_SECURE;
 
@@ -168,12 +169,12 @@ static void __capture1(int fd, int dir, unsigned ring, uint32_t target)
 	gem_close(fd, obj[SCRATCH].handle);
 }
 
-static void capture(int fd, int dir, unsigned ring)
+static void capture(int fd, int dir, const struct intel_execution_engine2 *e)
 {
 	uint32_t handle;
 
 	handle = gem_create(fd, 4096);
-	__capture1(fd, dir, ring, handle);
+	__capture1(fd, dir, e, handle);
 	gem_close(fd, handle);
 }
 
@@ -501,7 +502,7 @@ static void userptr(int fd, int dir)
 	igt_assert(posix_memalign(&ptr, 4096, 4096) == 0);
 	igt_require(__gem_userptr(fd, ptr, 4096, 0, 0, &handle) == 0);
 
-	__capture1(fd, dir, 0, handle);
+	__capture1(fd, dir, NULL, handle);
 
 	gem_close(fd, handle);
 	free(ptr);
@@ -526,7 +527,7 @@ static size_t safer_strlen(const char *s)
 
 igt_main
 {
-	const struct intel_execution_engine *e;
+	const struct intel_execution_engine2 *e;
 	igt_hang_t hang;
 	int fd = -1;
 	int dir = -1;
@@ -552,15 +553,10 @@ igt_main
 		igt_require(safer_strlen(igt_sysfs_get(dir, "error")) > 0);
 	}
 
-	for (e = intel_execution_engines; e->name; e++) {
-		/* default exec-id is purely symbolic */
-		if (e->exec_id == 0)
-			continue;
-
+	__for_each_physical_engine(fd, e) {
 		igt_subtest_f("capture-%s", e->name) {
-			igt_require(gem_ring_has_physical_engine(fd, e->exec_id | e->flags));
-			igt_require(gem_can_store_dword(fd, e->exec_id | e->flags));
-			capture(fd, dir, e->exec_id | e->flags);
+			igt_require(gem_class_can_store_dword(fd, e->class));
+			capture(fd, dir, e);
 		}
 	}
 
-- 
2.19.1

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[igt-dev] [RFC v2 04/43] test/i915: gem_exec_params: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones implemented
in the gem_engine_topology library.

v2:
  has_ring() check is removed [tvertko]
  Engine type is identified through CLASS [tvrtko]

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_exec_params.c | 41 ++++++------------------------------
 1 file changed, 7 insertions(+), 34 deletions(-)

diff --git a/tests/i915/gem_exec_params.c b/tests/i915/gem_exec_params.c
index 49c56a8d75e9..3bc5b0a9d531 100644
--- a/tests/i915/gem_exec_params.c
+++ b/tests/i915/gem_exec_params.c
@@ -52,30 +52,6 @@
 #define LOCAL_I915_EXEC_BATCH_FIRST (1 << 18)
 #define LOCAL_I915_EXEC_FENCE_ARRAY (1 << 19)
 
-static bool has_ring(int fd, unsigned ring_exec_flags)
-{
-	switch (ring_exec_flags & I915_EXEC_RING_MASK) {
-	case 0:
-	case I915_EXEC_RENDER:
-		return true;
-
-	case I915_EXEC_BSD:
-		if (ring_exec_flags & LOCAL_I915_EXEC_BSD_MASK)
-			return gem_has_bsd2(fd);
-		else
-			return gem_has_bsd(fd);
-
-	case I915_EXEC_BLT:
-		return gem_has_blt(fd);
-
-	case I915_EXEC_VEBOX:
-		return gem_has_vebox(fd);
-	}
-
-	igt_assert_f(0, "invalid exec flag 0x%x\n", ring_exec_flags);
-	return false;
-}
-
 static bool has_exec_batch_first(int fd)
 {
 	int val = -1;
@@ -201,7 +177,7 @@ int fd;
 
 igt_main
 {
-	const struct intel_execution_engine *e;
+	const struct intel_execution_engine2 *e;
 
 	igt_fixture {
 		fd = drm_open_driver(DRIVER_INTEL);
@@ -235,11 +211,9 @@ igt_main
 	}
 
 	igt_subtest("control") {
-		for (e = intel_execution_engines; e->name; e++) {
-			if (has_ring(fd, e->exec_id | e->flags)) {
-				execbuf.flags = e->exec_id | e->flags;
-				gem_execbuf(fd, &execbuf);
-			}
+		__for_each_physical_engine(fd, e) {
+			execbuf.flags = e->flags;
+			gem_execbuf(fd, &execbuf);
 		}
 	}
 
@@ -387,14 +361,13 @@ igt_main
 
 	igt_subtest("rs-invalid") {
 		bool has_rs = has_resource_streamer(fd);
-		unsigned int engine;
 
-		for_each_engine(fd, engine) {
+		__for_each_physical_engine(fd, e) {
 			int expect = -EINVAL;
-			if (has_rs && (engine == 0 || engine == I915_EXEC_RENDER))
+			if (has_rs && (e->class == I915_ENGINE_CLASS_RENDER))
 				expect = 0;
 
-			execbuf.flags = engine | LOCAL_I915_EXEC_RESOURCE_STREAMER;
+			execbuf.flags = e->flags | LOCAL_I915_EXEC_RESOURCE_STREAMER;
 			igt_assert_eq(__gem_execbuf(fd, &execbuf), expect);
 		}
 	}
-- 
2.19.1

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[igt-dev] [RFC v2 05/43] lib/i915: Helper func for engine class to exec_flag

[Ramalingam C]

Helper function is defined to get the execbuf flag for a engine of a
class mapped for a ctx.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 lib/i915/gem_engine_topology.c | 22 ++++++++++++++++++++++
 lib/i915/gem_engine_topology.h |  2 ++
 2 files changed, 24 insertions(+)

diff --git a/lib/i915/gem_engine_topology.c b/lib/i915/gem_engine_topology.c
index fdd1b951672b..c64f7a4d05bb 100644
--- a/lib/i915/gem_engine_topology.c
+++ b/lib/i915/gem_engine_topology.c
@@ -289,3 +289,25 @@ bool gem_has_engine_topology(int fd)
 
 	return !__gem_context_get_param(fd, &param);
 }
+
+/* Return -EINVAL when the Engine with mentioned class is not found */
+int gem_engine_class_to_execbuf_flags(int fd, uint32_t ctx_id, int class)
+{
+	const struct intel_execution_engine2 *e;
+	DEFINE_CONTEXT_ENGINES_PARAM(engines, param, ctx_id, GEM_MAX_ENGINES);
+	int i;
+
+	if (gem_topology_get_param(fd, &param)) {
+		__for_each_static_engine(e) {
+			if (e->class == class)
+				return e->flags;
+		}
+		return -EINVAL;
+	}
+
+	for (i = 0; i < param.size; i++)
+		if (engines.engines[i].engine_class == class)
+			return i;
+
+	return -EINVAL;
+}
diff --git a/lib/i915/gem_engine_topology.h b/lib/i915/gem_engine_topology.h
index 2415fd1e379b..aa934622cab0 100644
--- a/lib/i915/gem_engine_topology.h
+++ b/lib/i915/gem_engine_topology.h
@@ -53,6 +53,8 @@ int gem_context_lookup_engine(int fd, uint64_t engine, uint32_t ctx_id,
 
 void gem_context_set_all_engines(int fd, uint32_t ctx);
 
+int gem_engine_class_to_execbuf_flags(int fd, uint32_t ctx_id, int class);
+
 #define __for_each_static_engine(e__) \
 	for ((e__) = intel_execution_engines2; (e__)->name; (e__)++)
 
-- 
2.19.1

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[igt-dev] [RFC v2 06/43] test/prime_vgem: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

v2:
  helper for getting the execbuf_flag from class is used.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/prime_vgem.c | 72 ++++++++++++++++++++++------------------------
 1 file changed, 34 insertions(+), 38 deletions(-)

diff --git a/tests/prime_vgem.c b/tests/prime_vgem.c
index 69ae8c9b0710..030ca39de08c 100644
--- a/tests/prime_vgem.c
+++ b/tests/prime_vgem.c
@@ -325,7 +325,7 @@ static bool prime_busy(int fd, bool excl)
 	return poll(&pfd, 1, 0) == 0;
 }
 
-static void work(int i915, int dmabuf, unsigned ring, uint32_t flags)
+static void work(int i915, int dmabuf, const struct intel_execution_engine2 *e)
 {
 	const int SCRATCH = 0;
 	const int BATCH = 1;
@@ -341,7 +341,9 @@ static void work(int i915, int dmabuf, unsigned ring, uint32_t flags)
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = (uintptr_t)obj;
 	execbuf.buffer_count = 2;
-	execbuf.flags = ring | flags;
+	execbuf.flags = e ? e->flags :
+		gem_engine_class_to_execbuf_flags(i915, 0,
+						  I915_ENGINE_CLASS_RENDER);
 	if (gen < 6)
 		execbuf.flags |= I915_EXEC_SECURE;
 
@@ -420,7 +422,7 @@ static void work(int i915, int dmabuf, unsigned ring, uint32_t flags)
 	igt_assert(read_busy && write_busy);
 }
 
-static void test_busy(int i915, int vgem, unsigned ring, uint32_t flags)
+static void test_busy(int i915, int vgem, const struct intel_execution_engine2 *e)
 {
 	struct vgem_bo scratch;
 	struct timespec tv;
@@ -434,7 +436,7 @@ static void test_busy(int i915, int vgem, unsigned ring, uint32_t flags)
 	vgem_create(vgem, &scratch);
 	dmabuf = prime_handle_to_fd(vgem, scratch.handle);
 
-	work(i915, dmabuf, ring, flags);
+	work(i915, dmabuf, e);
 
 	/* Calling busy in a loop should be enough to flush the rendering */
 	memset(&tv, 0, sizeof(tv));
@@ -450,7 +452,8 @@ static void test_busy(int i915, int vgem, unsigned ring, uint32_t flags)
 	close(dmabuf);
 }
 
-static void test_wait(int i915, int vgem, unsigned ring, uint32_t flags)
+static void test_wait(int i915, int vgem,
+		      const struct intel_execution_engine2 *e)
 {
 	struct vgem_bo scratch;
 	struct pollfd pfd;
@@ -463,7 +466,7 @@ static void test_wait(int i915, int vgem, unsigned ring, uint32_t flags)
 	vgem_create(vgem, &scratch);
 	pfd.fd = prime_handle_to_fd(vgem, scratch.handle);
 
-	work(i915, pfd.fd, ring, flags);
+	work(i915, pfd.fd, e);
 
 	pfd.events = POLLIN;
 	igt_assert_eq(poll(&pfd, 1, 10000), 1);
@@ -477,7 +480,7 @@ static void test_wait(int i915, int vgem, unsigned ring, uint32_t flags)
 	close(pfd.fd);
 }
 
-static void test_sync(int i915, int vgem, unsigned ring, uint32_t flags)
+static void test_sync(int i915, int vgem, const struct intel_execution_engine2 *e)
 {
 	struct vgem_bo scratch;
 	uint32_t *ptr;
@@ -494,7 +497,7 @@ static void test_sync(int i915, int vgem, unsigned ring, uint32_t flags)
 	igt_assert(ptr != MAP_FAILED);
 	gem_close(vgem, scratch.handle);
 
-	work(i915, dmabuf, ring, flags);
+	work(i915, dmabuf, e);
 
 	prime_sync_start(dmabuf, false);
 	for (i = 0; i < 1024; i++)
@@ -506,7 +509,8 @@ static void test_sync(int i915, int vgem, unsigned ring, uint32_t flags)
 	munmap(ptr, scratch.size);
 }
 
-static void test_fence_wait(int i915, int vgem, unsigned ring, unsigned flags)
+static void test_fence_wait(int i915, int vgem,
+			    const struct intel_execution_engine2 *e)
 {
 	struct vgem_bo scratch;
 	uint32_t fence;
@@ -527,7 +531,7 @@ static void test_fence_wait(int i915, int vgem, unsigned ring, unsigned flags)
 	igt_assert(ptr != MAP_FAILED);
 
 	igt_fork(child, 1)
-		work(i915, dmabuf, ring, flags);
+		work(i915, dmabuf, e);
 
 	sleep(1);
 
@@ -568,7 +572,7 @@ static void test_fence_hang(int i915, int vgem, unsigned flags)
 	igt_assert(ptr != MAP_FAILED);
 	gem_close(vgem, scratch.handle);
 
-	work(i915, dmabuf, I915_EXEC_DEFAULT, 0);
+	work(i915, dmabuf, NULL);
 
 	/* The work should have been cancelled */
 
@@ -811,7 +815,7 @@ static void test_flip(int i915, int vgem, unsigned hang)
 
 igt_main
 {
-	const struct intel_execution_engine *e;
+	const struct intel_execution_engine2 *e;
 	int i915 = -1;
 	int vgem = -1;
 
@@ -840,39 +844,32 @@ igt_main
 	igt_subtest("coherency-gtt")
 		test_gtt_interleaved(vgem, i915);
 
-	for (e = intel_execution_engines; e->name; e++) {
+	__for_each_physical_engine(i915, e) {
 		igt_subtest_f("%ssync-%s",
-			      e->exec_id == 0 ? "basic-" : "",
-			      e->name) {
-			gem_require_ring(i915, e->exec_id | e->flags);
-			igt_require(gem_can_store_dword(i915, e->exec_id | e->flags));
+			      e->class == I915_ENGINE_CLASS_RENDER ?
+			      "basic-" : "", e->name) {
+			igt_require(gem_class_can_store_dword(i915, e->class));
 
 			gem_quiescent_gpu(i915);
-			test_sync(i915, vgem, e->exec_id, e->flags);
+			test_sync(i915, vgem, e);
 		}
-	}
 
-	for (e = intel_execution_engines; e->name; e++) {
 		igt_subtest_f("%sbusy-%s",
-			      e->exec_id == 0 ? "basic-" : "",
-			      e->name) {
-			gem_require_ring(i915, e->exec_id | e->flags);
-			igt_require(gem_can_store_dword(i915, e->exec_id | e->flags));
+			      e->class == I915_ENGINE_CLASS_RENDER ?
+			      "basic-" : "", e->name) {
+			igt_require(gem_can_store_dword(i915, e->class));
 
 			gem_quiescent_gpu(i915);
-			test_busy(i915, vgem, e->exec_id, e->flags);
+			test_busy(i915, vgem, e);
 		}
-	}
 
-	for (e = intel_execution_engines; e->name; e++) {
 		igt_subtest_f("%swait-%s",
-			      e->exec_id == 0 ? "basic-" : "",
-			      e->name) {
-			gem_require_ring(i915, e->exec_id | e->flags);
-			igt_require(gem_can_store_dword(i915, e->exec_id | e->flags));
+			      e->class == I915_ENGINE_CLASS_RENDER ?
+			      "basic-" : "", e->name) {
+			igt_require(gem_can_store_dword(i915, e->class));
 
 			gem_quiescent_gpu(i915);
-			test_wait(i915, vgem, e->exec_id, e->flags);
+			test_wait(i915, vgem, e);
 		}
 	}
 
@@ -887,15 +884,14 @@ igt_main
 		igt_subtest("basic-fence-mmap")
 			test_fence_mmap(i915, vgem);
 
-		for (e = intel_execution_engines; e->name; e++) {
+		__for_each_physical_engine(i915, e) {
 			igt_subtest_f("%sfence-wait-%s",
-					e->exec_id == 0 ? "basic-" : "",
-					e->name) {
-				gem_require_ring(i915, e->exec_id | e->flags);
-				igt_require(gem_can_store_dword(i915, e->exec_id | e->flags));
+					e->class == I915_ENGINE_CLASS_RENDER ?
+					"basic-" : "", e->name) {
+				igt_require(gem_can_store_dword(i915, e->class));
 
 				gem_quiescent_gpu(i915);
-				test_fence_wait(i915, vgem, e->exec_id, e->flags);
+				test_fence_wait(i915, vgem, e);
 			}
 		}
 
-- 
2.19.1

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[igt-dev] [RFC v2 07/43] tests/i915/gem_exec_reuse: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_exec_reuse.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/tests/i915/gem_exec_reuse.c b/tests/i915/gem_exec_reuse.c
index 935bfa9ac531..55e49d644013 100644
--- a/tests/i915/gem_exec_reuse.c
+++ b/tests/i915/gem_exec_reuse.c
@@ -39,7 +39,7 @@ struct noop {
 };
 
 static void noop(struct noop *n,
-		 unsigned ring, unsigned ctx,
+		 unsigned exec_flags, unsigned ctx,
 		 unsigned int count, unsigned int offset)
 {
 	struct drm_i915_gem_execbuffer2 execbuf;
@@ -52,7 +52,7 @@ static void noop(struct noop *n,
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = to_user_pointer(n->obj);
 	execbuf.buffer_count = count + 1;
-	execbuf.flags = ring | 1 << 12;
+	execbuf.flags = exec_flags | 1 << 12;
 	execbuf.rsvd1 = ctx;
 	gem_execbuf(n->fd, &execbuf);
 }
@@ -89,7 +89,7 @@ igt_main
 	igt_fixture {
 		uint64_t gtt_size, max;
 		uint32_t bbe = MI_BATCH_BUFFER_END;
-		unsigned engine;
+		const struct intel_execution_engine2 *e;
 
 		igt_allow_unlimited_files();
 
@@ -118,9 +118,9 @@ igt_main
 		no.obj = malloc(sizeof(struct drm_i915_gem_exec_object2) * (no.max_age + 1));
 
 		nengine = 0;
-		for_each_engine(no.fd, engine)
-			if (engine)
-				engines[nengine++] = engine;
+		__for_each_static_engine(e)
+			if (e)
+				engines[nengine++] = e->flags;
 		igt_require(nengine);
 
 		no.batch = gem_create(no.fd, 4096);
-- 
2.19.1

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[igt-dev] [RFC v2 08/43] tests/i915/gem_sync: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_sync.c | 234 +++++++++++++++++++++---------------------
 1 file changed, 118 insertions(+), 116 deletions(-)

diff --git a/tests/i915/gem_sync.c b/tests/i915/gem_sync.c
index 8c5aaa144a12..629decfcfe18 100644
--- a/tests/i915/gem_sync.c
+++ b/tests/i915/gem_sync.c
@@ -79,25 +79,26 @@ out:
 }
 
 static void
-sync_ring(int fd, unsigned ring, int num_children, int timeout)
+sync_ring(int fd, const struct intel_execution_engine2 *e, int num_children,
+	  int timeout)
 {
 	unsigned engines[16];
 	const char *names[16];
 	int num_engines = 0;
 
-	if (ring == ALL_ENGINES) {
-		for_each_physical_engine(fd, ring) {
-			names[num_engines] = e__->name;
-			engines[num_engines++] = ring;
+	if (!e) {
+		__for_each_physical_engine(fd, e) {
+			names[num_engines] = e->name;
+			engines[num_engines++] = e->flags;
 			if (num_engines == ARRAY_SIZE(engines))
 				break;
 		}
 
 		num_children *= num_engines;
 	} else {
-		gem_require_ring(fd, ring);
+		gem_require_ring(fd, e->flags);
 		names[num_engines] = NULL;
-		engines[num_engines++] = ring;
+		engines[num_engines++] = e->flags;
 	}
 
 	intel_detect_and_clear_missed_interrupts(fd);
@@ -139,7 +140,7 @@ sync_ring(int fd, unsigned ring, int num_children, int timeout)
 }
 
 static void
-idle_ring(int fd, unsigned ring, int timeout)
+idle_ring(int fd, const struct intel_execution_engine2 *e, int timeout)
 {
 	const uint32_t bbe = MI_BATCH_BUFFER_END;
 	struct drm_i915_gem_exec_object2 object;
@@ -147,7 +148,7 @@ idle_ring(int fd, unsigned ring, int timeout)
 	double start, elapsed;
 	unsigned long cycles;
 
-	gem_require_ring(fd, ring);
+	gem_require_ring(fd, e->flags);
 
 	memset(&object, 0, sizeof(object));
 	object.handle = gem_create(fd, 4096);
@@ -156,7 +157,7 @@ idle_ring(int fd, unsigned ring, int timeout)
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = to_user_pointer(&object);
 	execbuf.buffer_count = 1;
-	execbuf.flags = ring;
+	execbuf.flags = e->flags;
 	gem_execbuf(fd, &execbuf);
 	gem_sync(fd, object.handle);
 
@@ -178,28 +179,29 @@ idle_ring(int fd, unsigned ring, int timeout)
 }
 
 static void
-wakeup_ring(int fd, unsigned ring, int timeout, int wlen)
+wakeup_ring(int fd, const struct intel_execution_engine2 *e, int timeout,
+	    int wlen)
 {
 	unsigned engines[16];
 	const char *names[16];
 	int num_engines = 0;
 
-	if (ring == ALL_ENGINES) {
-		for_each_physical_engine(fd, ring) {
-			if (!gem_can_store_dword(fd, ring))
+	if (!e) {
+		__for_each_physical_engine(fd, e) {
+			if (!gem_class_can_store_dword(fd, e->class))
 				continue;
 
-			names[num_engines] = e__->name;
-			engines[num_engines++] = ring;
+			names[num_engines] = e->name;
+			engines[num_engines++] = e->flags;
 			if (num_engines == ARRAY_SIZE(engines))
 				break;
 		}
 		igt_require(num_engines);
 	} else {
-		gem_require_ring(fd, ring);
-		igt_require(gem_can_store_dword(fd, ring));
+		gem_require_ring(fd, e->flags);
+		igt_require(gem_class_can_store_dword(fd, e->class));
 		names[num_engines] = NULL;
-		engines[num_engines++] = ring;
+		engines[num_engines++] = e->flags;
 	}
 
 	intel_detect_and_clear_missed_interrupts(fd);
@@ -221,7 +223,7 @@ wakeup_ring(int fd, unsigned ring, int timeout, int wlen)
 		execbuf.flags = engines[child % num_engines];
 
 		spin = __igt_spin_new(fd,
-				      .engine = execbuf.flags,
+				      .engine = engines[child % num_engines],
 				      .flags = (IGT_SPIN_POLL_RUN |
 						IGT_SPIN_FAST));
 		igt_assert(igt_spin_has_poll(spin));
@@ -290,28 +292,28 @@ wakeup_ring(int fd, unsigned ring, int timeout, int wlen)
 	igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);
 }
 
-static void active_ring(int fd, unsigned ring, int timeout)
+static void active_ring(int fd, const struct intel_execution_engine2 *e, int timeout)
 {
 	unsigned engines[16];
 	const char *names[16];
 	int num_engines = 0;
 
-	if (ring == ALL_ENGINES) {
-		for_each_physical_engine(fd, ring) {
-			if (!gem_can_store_dword(fd, ring))
+	if (!e) {
+		__for_each_physical_engine(fd, e) {
+			if (!gem_class_can_store_dword(fd, e->class))
 				continue;
 
-			names[num_engines] = e__->name;
-			engines[num_engines++] = ring;
+			names[num_engines] = e->name;
+			engines[num_engines++] = e->flags;
 			if (num_engines == ARRAY_SIZE(engines))
 				break;
 		}
 		igt_require(num_engines);
 	} else {
-		gem_require_ring(fd, ring);
-		igt_require(gem_can_store_dword(fd, ring));
+		gem_require_ring(fd, e->flags);
+		igt_require(gem_class_can_store_dword(fd, e->class));
 		names[num_engines] = NULL;
-		engines[num_engines++] = ring;
+		engines[num_engines++] = e->flags;
 	}
 
 	intel_detect_and_clear_missed_interrupts(fd);
@@ -321,11 +323,11 @@ static void active_ring(int fd, unsigned ring, int timeout)
 		igt_spin_t *spin[2];
 
 		spin[0] = __igt_spin_new(fd,
-					 .engine = ring,
+					 .engine = e->flags,
 					 .flags = IGT_SPIN_FAST);
 
 		spin[1] = __igt_spin_new(fd,
-					 .engine = ring,
+					 .engine = e->flags,
 					 .flags = IGT_SPIN_FAST);
 
 		start = gettime();
@@ -357,28 +359,29 @@ static void active_ring(int fd, unsigned ring, int timeout)
 }
 
 static void
-active_wakeup_ring(int fd, unsigned ring, int timeout, int wlen)
+active_wakeup_ring(int fd, const struct intel_execution_engine2 *e, int timeout,
+		   int wlen)
 {
 	unsigned engines[16];
 	const char *names[16];
 	int num_engines = 0;
 
-	if (ring == ALL_ENGINES) {
-		for_each_physical_engine(fd, ring) {
-			if (!gem_can_store_dword(fd, ring))
+	if (!e) {
+		__for_each_physical_engine(fd, e) {
+			if (!gem_class_can_store_dword(fd, e->class))
 				continue;
 
-			names[num_engines] = e__->name;
-			engines[num_engines++] = ring;
+			names[num_engines] = e->name;
+			engines[num_engines++] = e->flags;
 			if (num_engines == ARRAY_SIZE(engines))
 				break;
 		}
 		igt_require(num_engines);
 	} else {
-		gem_require_ring(fd, ring);
-		igt_require(gem_can_store_dword(fd, ring));
+		gem_require_ring(fd, e->flags);
+		igt_require(gem_class_can_store_dword(fd, e->class));
 		names[num_engines] = NULL;
-		engines[num_engines++] = ring;
+		engines[num_engines++] = e->flags;
 	}
 
 	intel_detect_and_clear_missed_interrupts(fd);
@@ -400,13 +403,13 @@ active_wakeup_ring(int fd, unsigned ring, int timeout, int wlen)
 		execbuf.flags = engines[child % num_engines];
 
 		spin[0] = __igt_spin_new(fd,
-					 .engine = execbuf.flags,
+					 .engine = engines[child % num_engines],
 					 .flags = (IGT_SPIN_POLL_RUN |
 						   IGT_SPIN_FAST));
 		igt_assert(igt_spin_has_poll(spin[0]));
 
 		spin[1] = __igt_spin_new(fd,
-					 .engine = execbuf.flags,
+					 .engine = engines[child % num_engines],
 					 .flags = (IGT_SPIN_POLL_RUN |
 						   IGT_SPIN_FAST));
 
@@ -491,30 +494,30 @@ active_wakeup_ring(int fd, unsigned ring, int timeout, int wlen)
 }
 
 static void
-store_ring(int fd, unsigned ring, int num_children, int timeout)
+store_ring(int fd, const struct intel_execution_engine2 *e, int num_children, int timeout)
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
 	unsigned engines[16];
 	const char *names[16];
 	int num_engines = 0;
 
-	if (ring == ALL_ENGINES) {
-		for_each_physical_engine(fd, ring) {
-			if (!gem_can_store_dword(fd, ring))
+	if (!e) {
+		__for_each_physical_engine(fd, e) {
+			if (!gem_class_can_store_dword(fd, e->class))
 				continue;
 
-			names[num_engines] = e__->name;
-			engines[num_engines++] = ring;
+			names[num_engines] = e->name;
+			engines[num_engines++] = e->flags;
 			if (num_engines == ARRAY_SIZE(engines))
 				break;
 		}
 
 		num_children *= num_engines;
 	} else {
-		gem_require_ring(fd, ring);
-		igt_require(gem_can_store_dword(fd, ring));
+		gem_require_ring(fd, e->flags);
+		igt_require(gem_class_can_store_dword(fd, e->class));
 		names[num_engines] = NULL;
-		engines[num_engines++] = ring;
+		engines[num_engines++] = e->flags;
 	}
 
 	intel_detect_and_clear_missed_interrupts(fd);
@@ -606,7 +609,7 @@ store_ring(int fd, unsigned ring, int num_children, int timeout)
 }
 
 static void
-switch_ring(int fd, unsigned ring, int num_children, int timeout)
+switch_ring(int fd, const struct intel_execution_engine2 *e, int num_children, int timeout)
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
 	unsigned engines[16];
@@ -615,23 +618,23 @@ switch_ring(int fd, unsigned ring, int num_children, int timeout)
 
 	gem_require_contexts(fd);
 
-	if (ring == ALL_ENGINES) {
-		for_each_physical_engine(fd, ring) {
-			if (!gem_can_store_dword(fd, ring))
+	if (!e) {
+		__for_each_physical_engine(fd, e) {
+			if (!gem_class_can_store_dword(fd, e->class))
 				continue;
 
-			names[num_engines] = e__->name;
-			engines[num_engines++] = ring;
+			names[num_engines] = e->name;
+			engines[num_engines++] = e->flags;
 			if (num_engines == ARRAY_SIZE(engines))
 				break;
 		}
 
 		num_children *= num_engines;
 	} else {
-		gem_require_ring(fd, ring);
-		igt_require(gem_can_store_dword(fd, ring));
+		gem_require_ring(fd, e->flags);
+		igt_require(gem_class_can_store_dword(fd, e->class));
 		names[num_engines] = NULL;
-		engines[num_engines++] = ring;
+		engines[num_engines++] = e->flags;
 	}
 
 	intel_detect_and_clear_missed_interrupts(fd);
@@ -803,7 +806,7 @@ static void *waiter(void *arg)
 }
 
 static void
-__store_many(int fd, unsigned ring, int timeout, unsigned long *cycles)
+__store_many(int fd, const struct intel_execution_engine2 *e, int timeout, unsigned long *cycles)
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
 	const uint32_t bbe = MI_BATCH_BUFFER_END;
@@ -817,7 +820,7 @@ __store_many(int fd, unsigned ring, int timeout, unsigned long *cycles)
 
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = to_user_pointer(object);
-	execbuf.flags = ring;
+	execbuf.flags = e->flags;
 	execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC;
 	execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT;
 	if (gen < 6)
@@ -931,7 +934,7 @@ __store_many(int fd, unsigned ring, int timeout, unsigned long *cycles)
 }
 
 static void
-store_many(int fd, unsigned ring, int timeout)
+store_many(int fd, const struct intel_execution_engine2 *e, int timeout)
 {
 	unsigned long *shared;
 	const char *names[16];
@@ -942,24 +945,22 @@ store_many(int fd, unsigned ring, int timeout)
 
 	intel_detect_and_clear_missed_interrupts(fd);
 
-	if (ring == ALL_ENGINES) {
-		for_each_physical_engine(fd, ring) {
-			if (!gem_can_store_dword(fd, ring))
+	if (!e) {
+		__for_each_physical_engine(fd, e) {
+			if (!gem_class_can_store_dword(fd, e->class))
 				continue;
 
 			igt_fork(child, 1)
-				__store_many(fd,
-					     ring,
-					     timeout,
+				__store_many(fd, e, timeout,
 					     &shared[n]);
 
-			names[n++] = e__->name;
+			names[n++] = e->name;
 		}
 		igt_waitchildren();
 	} else {
-		gem_require_ring(fd, ring);
-		igt_require(gem_can_store_dword(fd, ring));
-		__store_many(fd, ring, timeout, &shared[n]);
+		gem_require_ring(fd, e->flags);
+		igt_require(gem_class_can_store_dword(fd, e->class));
+		__store_many(fd, e, timeout, &shared[n]);
 		names[n++] = NULL;
 	}
 
@@ -974,11 +975,12 @@ store_many(int fd, unsigned ring, int timeout)
 static void
 sync_all(int fd, int num_children, int timeout)
 {
-	unsigned engines[16], engine;
+	unsigned engines[16];
+	const struct intel_execution_engine2 *engine;
 	int num_engines = 0;
 
-	for_each_physical_engine(fd, engine) {
-		engines[num_engines++] = engine;
+	__for_each_physical_engine(fd, engine) {
+		engines[num_engines++] = engine->flags;
 		if (num_engines == ARRAY_SIZE(engines))
 			break;
 	}
@@ -1028,13 +1030,13 @@ store_all(int fd, int num_children, int timeout)
 	const int gen = intel_gen(intel_get_drm_devid(fd));
 	unsigned engines[16];
 	int num_engines = 0;
-	unsigned int ring;
+	const struct intel_execution_engine2 *e;
 
-	for_each_physical_engine(fd, ring) {
-		if (!gem_can_store_dword(fd, ring))
+	__for_each_physical_engine(fd, e) {
+		if (!gem_class_can_store_dword(fd, e->class))
 			continue;
 
-		engines[num_engines++] = ring;
+		engines[num_engines++] = e->flags;
 		if (num_engines == ARRAY_SIZE(engines))
 			break;
 	}
@@ -1131,26 +1133,26 @@ store_all(int fd, int num_children, int timeout)
 }
 
 static void
-preempt(int fd, unsigned ring, int num_children, int timeout)
+preempt(int fd, const struct intel_execution_engine2 *e, int num_children, int timeout)
 {
 	unsigned engines[16];
 	const char *names[16];
 	int num_engines = 0;
 	uint32_t ctx[2];
 
-	if (ring == ALL_ENGINES) {
-		for_each_physical_engine(fd, ring) {
-			names[num_engines] = e__->name;
-			engines[num_engines++] = ring;
+	if (!e) {
+		__for_each_physical_engine(fd, e) {
+			names[num_engines] = e->name;
+			engines[num_engines++] = e->flags;
 			if (num_engines == ARRAY_SIZE(engines))
 				break;
 		}
 
 		num_children *= num_engines;
 	} else {
-		gem_require_ring(fd, ring);
+		gem_require_ring(fd, e->flags);
 		names[num_engines] = NULL;
-		engines[num_engines++] = ring;
+		engines[num_engines++] = e->flags;
 	}
 
 	ctx[0] = gem_context_create(fd);
@@ -1185,7 +1187,7 @@ preempt(int fd, unsigned ring, int num_children, int timeout)
 			igt_spin_t *spin =
 				__igt_spin_new(fd,
 					       .ctx = ctx[0],
-					       .engine = execbuf.flags);
+					       .engine = engines[child % num_engines]);
 
 			do {
 				gem_execbuf(fd, &execbuf);
@@ -1210,7 +1212,7 @@ preempt(int fd, unsigned ring, int num_children, int timeout)
 
 igt_main
 {
-	const struct intel_execution_engine *e;
+	const struct intel_execution_engine2 *e;
 	const int ncpus = sysconf(_SC_NPROCESSORS_ONLN);
 	int fd = -1;
 
@@ -1225,55 +1227,55 @@ igt_main
 		igt_fork_hang_detector(fd);
 	}
 
-	for (e = intel_execution_engines; e->name; e++) {
+	__for_each_physical_engine(fd, e) {
 		igt_subtest_f("%s", e->name)
-			sync_ring(fd, e->exec_id | e->flags, 1, 150);
+			sync_ring(fd, e, 1, 150);
 		igt_subtest_f("idle-%s", e->name)
-			idle_ring(fd, e->exec_id | e->flags, 150);
+			idle_ring(fd, e, 150);
 		igt_subtest_f("active-%s", e->name)
-			active_ring(fd, e->exec_id | e->flags, 150);
+			active_ring(fd, e, 150);
 		igt_subtest_f("wakeup-%s", e->name)
-			wakeup_ring(fd, e->exec_id | e->flags, 150, 1);
+			wakeup_ring(fd, e, 150, 1);
 		igt_subtest_f("active-wakeup-%s", e->name)
-			active_wakeup_ring(fd, e->exec_id | e->flags, 150, 1);
+			active_wakeup_ring(fd, e, 150, 1);
 		igt_subtest_f("double-wakeup-%s", e->name)
-			wakeup_ring(fd, e->exec_id | e->flags, 150, 2);
+			wakeup_ring(fd, e, 150, 2);
 		igt_subtest_f("store-%s", e->name)
-			store_ring(fd, e->exec_id | e->flags, 1, 150);
+			store_ring(fd, e, 1, 150);
 		igt_subtest_f("switch-%s", e->name)
-			switch_ring(fd, e->exec_id | e->flags, 1, 150);
+			switch_ring(fd, e, 1, 150);
 		igt_subtest_f("forked-switch-%s", e->name)
-			switch_ring(fd, e->exec_id | e->flags, ncpus, 150);
+			switch_ring(fd, e, ncpus, 150);
 		igt_subtest_f("many-%s", e->name)
-			store_many(fd, e->exec_id | e->flags, 150);
+			store_many(fd, e, 150);
 		igt_subtest_f("forked-%s", e->name)
-			sync_ring(fd, e->exec_id | e->flags, ncpus, 150);
+			sync_ring(fd, e, ncpus, 150);
 		igt_subtest_f("forked-store-%s", e->name)
-			store_ring(fd, e->exec_id | e->flags, ncpus, 150);
+			store_ring(fd, e, ncpus, 150);
 	}
 
 	igt_subtest("basic-each")
-		sync_ring(fd, ALL_ENGINES, 1, 5);
+		sync_ring(fd, NULL, 1, 5);
 	igt_subtest("basic-store-each")
-		store_ring(fd, ALL_ENGINES, 1, 5);
+		store_ring(fd, NULL, 1, 5);
 	igt_subtest("basic-many-each")
-		store_many(fd, ALL_ENGINES, 5);
+		store_many(fd, NULL, 5);
 	igt_subtest("switch-each")
-		switch_ring(fd, ALL_ENGINES, 1, 150);
+		switch_ring(fd, NULL, 1, 150);
 	igt_subtest("forked-switch-each")
-		switch_ring(fd, ALL_ENGINES, ncpus, 150);
+		switch_ring(fd, NULL, ncpus, 150);
 	igt_subtest("forked-each")
-		sync_ring(fd, ALL_ENGINES, ncpus, 150);
+		sync_ring(fd, NULL, ncpus, 150);
 	igt_subtest("forked-store-each")
-		store_ring(fd, ALL_ENGINES, ncpus, 150);
+		store_ring(fd, NULL, ncpus, 150);
 	igt_subtest("active-each")
-		active_ring(fd, ALL_ENGINES, 150);
+		active_ring(fd, NULL, 150);
 	igt_subtest("wakeup-each")
-		wakeup_ring(fd, ALL_ENGINES, 150, 1);
+		wakeup_ring(fd, NULL, 150, 1);
 	igt_subtest("active-wakeup-each")
-		active_wakeup_ring(fd, ALL_ENGINES, 150, 1);
+		active_wakeup_ring(fd, NULL, 150, 1);
 	igt_subtest("double-wakeup-each")
-		wakeup_ring(fd, ALL_ENGINES, 150, 2);
+		wakeup_ring(fd, NULL, 150, 2);
 
 	igt_subtest("basic-all")
 		sync_all(fd, 1, 5);
@@ -1297,11 +1299,11 @@ igt_main
 		}
 
 		igt_subtest("preempt-all")
-			preempt(fd, ALL_ENGINES, 1, 20);
+			preempt(fd, NULL, 1, 20);
 
-		for (e = intel_execution_engines; e->name; e++) {
+		__for_each_physical_engine(fd, e) {
 			igt_subtest_f("preempt-%s", e->name)
-				preempt(fd, e->exec_id | e->flags, ncpus, 150);
+				preempt(fd, e, ncpus, 150);
 		}
 	}
 
-- 
2.19.1

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[igt-dev] [RFC v2 09/43] tests/i915/gem_busy: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_busy.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/tests/i915/gem_busy.c b/tests/i915/gem_busy.c
index a55358708faf..f66134802137 100644
--- a/tests/i915/gem_busy.c
+++ b/tests/i915/gem_busy.c
@@ -305,6 +305,7 @@ static void close_race(int fd)
 {
 	const unsigned int ncpus = sysconf(_SC_NPROCESSORS_ONLN);
 	const unsigned int nhandles = gem_measure_ring_inflight(fd, ALL_ENGINES, 0) / 2;
+	const struct intel_execution_engine2 *e;
 	unsigned int engines[16], nengine;
 	unsigned long *control;
 	uint32_t *handles;
@@ -319,8 +320,8 @@ static void close_race(int fd)
 	 */
 
 	nengine = 0;
-	for_each_engine(fd, i)
-		engines[nengine++] = i;
+	__for_each_static_engine(e)
+		engines[nengine++] = e->flags;
 	igt_require(nengine);
 
 	control = mmap(NULL, 4096, PROT_WRITE, MAP_SHARED | MAP_ANON, -1, 0);
-- 
2.19.1

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[igt-dev] [RFC v2 10/43] tests/i915/gem_concurrent_all: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_concurrent_all.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/tests/i915/gem_concurrent_all.c b/tests/i915/gem_concurrent_all.c
index 3ddaab820525..8a97564063e1 100644
--- a/tests/i915/gem_concurrent_all.c
+++ b/tests/i915/gem_concurrent_all.c
@@ -949,15 +949,15 @@ static igt_hang_t rcs_hang(void)
 static igt_hang_t all_hang(void)
 {
 	igt_hang_t hang = igt_hang_ring(fd, I915_EXEC_RENDER);
-	unsigned engine;
+	const struct intel_execution_engine2 *e;
 
-	for_each_physical_engine(fd, engine) {
+	__for_each_physical_engine(fd, e) {
 		struct drm_i915_gem_execbuffer2 eb = hang.spin->execbuf;
 
-		if (engine == I915_EXEC_RENDER)
+		if (e->class == I915_ENGINE_CLASS_RENDER)
 			continue;
 
-		eb.flags = engine;
+		eb.flags = e->flags;
 		__gem_execbuf(fd, &eb);
 	}
 
-- 
2.19.1

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[igt-dev] [RFC v2 11/43] tests/i915/gem_cs_prefetch: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_cs_prefetch.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/tests/i915/gem_cs_prefetch.c b/tests/i915/gem_cs_prefetch.c
index 2b8653687f8f..939d6455613e 100644
--- a/tests/i915/gem_cs_prefetch.c
+++ b/tests/i915/gem_cs_prefetch.c
@@ -79,7 +79,7 @@ static void setup(int fd, int gen, struct shadow *shadow)
 	shadow->reloc.write_domain = I915_GEM_DOMAIN_INSTRUCTION;
 }
 
-static void can_test_ring(unsigned ring)
+static void can_test_ring(const struct intel_execution_engine2 *e)
 {
 	int master = drm_open_driver_master(DRIVER_INTEL);
 	int fd = drm_open_driver(DRIVER_INTEL);
@@ -87,12 +87,12 @@ static void can_test_ring(unsigned ring)
 	/* Dance to avoid dying with master open */
 	close(master);
 	igt_require_gem(fd);
-	gem_require_ring(fd, ring);
-	igt_require(gem_can_store_dword(fd, ring));
+	gem_require_ring(fd, e->flags);
+	igt_require(gem_class_can_store_dword(fd, e->class));
 	close(fd);
 }
 
-static void test_ring(unsigned ring)
+static void test_ring(const struct intel_execution_engine2 *e)
 {
 	struct drm_i915_gem_execbuffer2 execbuf;
 	struct drm_i915_gem_exec_object2 obj[2];
@@ -100,7 +100,7 @@ static void test_ring(unsigned ring)
 	uint64_t i, count;
 	int fd, gen;
 
-	can_test_ring(ring);
+	can_test_ring(e);
 
 	fd = drm_open_driver_master(DRIVER_INTEL);
 	gen = intel_gen(intel_get_drm_devid(fd));
@@ -116,7 +116,7 @@ static void test_ring(unsigned ring)
 
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = to_user_pointer(obj);
-	execbuf.flags = ring;
+	execbuf.flags = e->flags;
 	if (gen < 6)
 		execbuf.flags |= I915_EXEC_SECURE;
 
@@ -139,11 +139,11 @@ static void test_ring(unsigned ring)
 
 igt_main
 {
-	const struct intel_execution_engine *e;
+	const struct intel_execution_engine2 *e;
 
 	igt_skip_on_simulation();
 
-	for (e = intel_execution_engines; e->name; e++)
+	__for_each_static_engine(e)
 		igt_subtest_f("%s", e->name)
-			test_ring(e->exec_id | e->flags);
+			test_ring(e);
 }
-- 
2.19.1

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[igt-dev] [RFC v2 12/43] tests/i915/gem_ctx_create: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_ctx_create.c | 34 +++++++++++++++-------------------
 1 file changed, 15 insertions(+), 19 deletions(-)

diff --git a/tests/i915/gem_ctx_create.c b/tests/i915/gem_ctx_create.c
index 1e2c40c4f47f..0bf5adb336dc 100644
--- a/tests/i915/gem_ctx_create.c
+++ b/tests/i915/gem_ctx_create.c
@@ -124,7 +124,8 @@ static void files(int core, int timeout, const int ncpus)
 	gem_close(core, batch);
 }
 
-static void active(int fd, unsigned engine, int timeout, int ncpus)
+static void active(int fd, const struct intel_execution_engine2 *e,
+		   int timeout, int ncpus)
 {
 	const uint32_t bbe = MI_BATCH_BUFFER_END;
 	struct drm_i915_gem_execbuffer2 execbuf;
@@ -132,14 +133,13 @@ static void active(int fd, unsigned engine, int timeout, int ncpus)
 	unsigned int nengine, engines[16];
 	unsigned *shared;
 
-	if (engine == ALL_ENGINES) {
+	if (!e) {
 		igt_require(all_nengine);
 		nengine = all_nengine;
 		memcpy(engines, all_engines, sizeof(engines[0])*nengine);
 	} else {
-		gem_require_ring(fd, engine);
 		nengine = 1;
-		engines[0] = engine;
+		engines[0] = e->flags;
 	}
 
 	shared = mmap(NULL, 4096, PROT_WRITE, MAP_SHARED | MAP_ANON, -1, 0);
@@ -157,7 +157,7 @@ static void active(int fd, unsigned engine, int timeout, int ncpus)
 		igt_fork(child, ppgtt_nengine) {
 			unsigned long count = 0;
 
-			if (ppgtt_engines[child] == engine)
+			if (ppgtt_engines[child] == e->flags)
 				continue;
 
 			execbuf.flags = ppgtt_engines[child];
@@ -524,17 +524,16 @@ igt_main
 {
 	const int ncpus = sysconf(_SC_NPROCESSORS_ONLN);
 	struct drm_i915_gem_context_create create;
+	const struct intel_execution_engine2 *e;
 	int fd = -1;
 
 	igt_fixture {
-		unsigned engine;
-
 		fd = drm_open_driver(DRIVER_INTEL);
 		igt_require_gem(fd);
 		gem_require_contexts(fd);
 
-		for_each_physical_engine(fd, engine)
-			all_engines[all_nengine++] = engine;
+		__for_each_physical_engine(fd, e)
+			all_engines[all_nengine++] = e->flags;
 		igt_require(all_nengine);
 
 		if (gem_uses_full_ppgtt(fd)) {
@@ -575,20 +574,17 @@ igt_main
 		files(fd, 150, ncpus);
 
 	igt_subtest("active-all")
-		active(fd, ALL_ENGINES, 120, 1);
+		active(fd, NULL, 120, 1);
 	igt_subtest("forked-active-all")
-		active(fd, ALL_ENGINES, 120, ncpus);
+		active(fd, NULL, 120, ncpus);
 
-	for (const struct intel_execution_engine *e = intel_execution_engines;
-	     e->name; e++) {
+	__for_each_physical_engine(fd, e) {
 		igt_subtest_f("active-%s", e->name)
-			active(fd, e->exec_id | e->flags, 20, 1);
+			active(fd, e, 20, 1);
 		igt_subtest_f("forked-active-%s", e->name)
-			active(fd, e->exec_id | e->flags, 20, ncpus);
-		if (e->exec_id) {
-			igt_subtest_f("hog-%s", e->name)
-				active(fd, e->exec_id | e->flags, 20, -1);
-		}
+			active(fd, e, 20, ncpus);
+		igt_subtest_f("hog-%s", e->name)
+			active(fd, e, 20, -1);
 	}
 
 	igt_fixture {
-- 
2.19.1

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[igt-dev] [RFC v2 13/43] tests/i915/gem_ctx_isolation: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_ctx_isolation.c | 19 ++++++++-----------
 1 file changed, 8 insertions(+), 11 deletions(-)

diff --git a/tests/i915/gem_ctx_isolation.c b/tests/i915/gem_ctx_isolation.c
index 5b054c81d449..47e20403ce1f 100644
--- a/tests/i915/gem_ctx_isolation.c
+++ b/tests/i915/gem_ctx_isolation.c
@@ -556,7 +556,6 @@ static void nonpriv(int fd,
 		0x0505c0c0,
 		0xdeadbeef
 	};
-	unsigned int engine = e->flags;
 	unsigned int num_values = ARRAY_SIZE(values);
 
 	/* Sigh -- hsw: we need cmdparser access to our own registers! */
@@ -574,7 +573,7 @@ static void nonpriv(int fd,
 
 		tmpl_regs(fd, ctx, e, tmpl, values[v]);
 
-		spin = igt_spin_new(fd, .ctx = ctx, .engine = engine);
+		spin = igt_spin_new(fd, .ctx = ctx, .engine = e->flags);
 
 		igt_debug("%s[%d]: Setting all registers to 0x%08x\n",
 			  __func__, v, values[v]);
@@ -612,7 +611,6 @@ static void isolation(int fd,
 		0xaaaaaaaa,
 		0xdeadbeef
 	};
-	unsigned int engine = e->flags;
 	unsigned int num_values =
 		flags & (DIRTY1 | DIRTY2) ? ARRAY_SIZE(values) : 1;
 
@@ -625,7 +623,7 @@ static void isolation(int fd,
 		ctx[0] = gem_context_create(fd);
 		regs[0] = read_regs(fd, ctx[0], e, flags);
 
-		spin = igt_spin_new(fd, .ctx = ctx[0], .engine = engine);
+		spin = igt_spin_new(fd, .ctx = ctx[0], .engine = e->flags);
 
 		if (flags & DIRTY1) {
 			igt_debug("%s[%d]: Setting all registers of ctx 0 to 0x%08x\n",
@@ -678,11 +676,11 @@ static void isolation(int fd,
 #define S4 (4 << 8)
 #define SLEEP_MASK (0xf << 8)
 
-static void inject_reset_context(int fd, unsigned int engine)
+static void inject_reset_context(int fd, const struct intel_execution_engine2 *e)
 {
 	struct igt_spin_factory opts = {
 		.ctx = gem_context_create(fd),
-		.engine = engine,
+		.engine = e->flags,
 		.flags = IGT_SPIN_FAST,
 	};
 	igt_spin_t *spin;
@@ -693,7 +691,7 @@ static void inject_reset_context(int fd, unsigned int engine)
 	 * HW for screwing up if the context was already broken.
 	 */
 
-	if (gem_can_store_dword(fd, engine))
+	if (gem_class_can_store_dword(fd, e->class))
 		opts.flags |= IGT_SPIN_POLL_RUN;
 
 	spin = __igt_spin_factory(fd, &opts);
@@ -723,7 +721,6 @@ static void preservation(int fd,
 		0xdeadbeef
 	};
 	const unsigned int num_values = ARRAY_SIZE(values);
-	unsigned int engine = e->flags;
 	uint32_t ctx[num_values +1 ];
 	uint32_t regs[num_values + 1][2];
 	igt_spin_t *spin;
@@ -731,7 +728,7 @@ static void preservation(int fd,
 	gem_quiescent_gpu(fd);
 
 	ctx[num_values] = gem_context_create(fd);
-	spin = igt_spin_new(fd, .ctx = ctx[num_values], .engine = engine);
+	spin = igt_spin_new(fd, .ctx = ctx[num_values], .engine = e->flags);
 	regs[num_values][0] = read_regs(fd, ctx[num_values], e, flags);
 	for (int v = 0; v < num_values; v++) {
 		ctx[v] = gem_context_create(fd);
@@ -744,7 +741,7 @@ static void preservation(int fd,
 	igt_spin_free(fd, spin);
 
 	if (flags & RESET)
-		inject_reset_context(fd, engine);
+		inject_reset_context(fd, e);
 
 	switch (flags & SLEEP_MASK) {
 	case NOSLEEP:
@@ -771,7 +768,7 @@ static void preservation(int fd,
 		break;
 	}
 
-	spin = igt_spin_new(fd, .ctx = ctx[num_values], .engine = engine);
+	spin = igt_spin_new(fd, .ctx = ctx[num_values], .engine = e->flags);
 	for (int v = 0; v < num_values; v++)
 		regs[v][1] = read_regs(fd, ctx[v], e, flags);
 	regs[num_values][1] = read_regs(fd, ctx[num_values], e, flags);
-- 
2.19.1

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[igt-dev] [RFC v2 14/43] tests/i915/gem_ctx_switch: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_ctx_switch.c | 28 +++++++++++++++-------------
 1 file changed, 15 insertions(+), 13 deletions(-)

diff --git a/tests/i915/gem_ctx_switch.c b/tests/i915/gem_ctx_switch.c
index 647911d4c42e..8d6740148b22 100644
--- a/tests/i915/gem_ctx_switch.c
+++ b/tests/i915/gem_ctx_switch.c
@@ -107,7 +107,7 @@ static int measure_qlen(int fd,
 }
 
 static void single(int fd, uint32_t handle,
-		   const struct intel_execution_engine *e,
+		   const struct intel_execution_engine2 *e,
 		   unsigned flags,
 		   const int ncpus,
 		   int timeout)
@@ -125,8 +125,6 @@ static void single(int fd, uint32_t handle,
 	shared = mmap(NULL, 4096, PROT_WRITE, MAP_SHARED | MAP_ANON, -1, 0);
 	igt_assert(shared != MAP_FAILED);
 
-	gem_require_ring(fd, e->exec_id | e->flags);
-
 	for (n = 0; n < 64; n++) {
 		if (flags & QUEUE)
 			contexts[n] = gem_queue_create(fd);
@@ -152,12 +150,12 @@ static void single(int fd, uint32_t handle,
 	execbuf.buffers_ptr = to_user_pointer(&obj);
 	execbuf.buffer_count = 1;
 	execbuf.rsvd1 = contexts[0];
-	execbuf.flags = e->exec_id | e->flags;
+	execbuf.flags = e->flags;
 	execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT;
 	execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC;
 	igt_require(__gem_execbuf(fd, &execbuf) == 0);
 	if (__gem_execbuf(fd, &execbuf)) {
-		execbuf.flags = e->exec_id | e->flags;
+		execbuf.flags = e->flags;
 		reloc.target_handle = obj.handle;
 		gem_execbuf(fd, &execbuf);
 	}
@@ -223,16 +221,17 @@ static void all(int fd, uint32_t handle, unsigned flags, int timeout)
 {
 	struct drm_i915_gem_execbuffer2 execbuf;
 	struct drm_i915_gem_exec_object2 obj[2];
-	unsigned int engine[16], e;
+	const struct intel_execution_engine2 *e;
+	unsigned int engine[16];
 	const char *name[16];
 	uint32_t contexts[65];
 	unsigned int nengine;
 	int n, qlen;
 
 	nengine = 0;
-	for_each_physical_engine(fd, e) {
-		engine[nengine] = e;
-		name[nengine] = e__->name;
+	__for_each_physical_engine(fd, e) {
+		engine[nengine] = e->flags;
+		name[nengine] = e->name;
 		nengine++;
 	}
 	igt_require(nengine);
@@ -306,7 +305,7 @@ static void all(int fd, uint32_t handle, unsigned flags, int timeout)
 igt_main
 {
 	const int ncpus = sysconf(_SC_NPROCESSORS_ONLN);
-	const struct intel_execution_engine *e;
+	const struct intel_execution_engine2 *e;
 	static const struct {
 		const char *name;
 		unsigned int flags;
@@ -338,7 +337,7 @@ igt_main
 		igt_fork_hang_detector(fd);
 	}
 
-	for (e = intel_execution_engines; e->name; e++) {
+	__for_each_physical_engine(fd, e) {
 		for (typeof(*phases) *p = phases; p->name; p++) {
 			igt_subtest_group {
 				igt_fixture {
@@ -346,12 +345,15 @@ igt_main
 						igt_require(p->require(fd));
 				}
 
-				igt_subtest_f("%s%s%s", e->exec_id == 0 ? "basic-" : "", e->name, p->name)
+				igt_subtest_f("%s%s%s", e->class ==
+					      I915_ENGINE_CLASS_RENDER ?
+					      "basic-" : "", e->name, p->name)
 					single(fd, light, e, p->flags, 1, 5);
 
 				igt_skip_on_simulation();
 
-				igt_subtest_f("%s%s-heavy%s", e->exec_id == 0 ? "basic-" : "", e->name, p->name)
+				igt_subtest_f("%s%s-heavy%s", e->class ==
+					      I915_ENGINE_CLASS_RENDER ? "basic-" : "", e->name, p->name)
 					single(fd, heavy, e, p->flags, 1, 5);
 				igt_subtest_f("forked-%s%s", e->name, p->name)
 					single(fd, light, e, p->flags, ncpus, 150);
-- 
2.19.1

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[igt-dev] [RFC v2 15/43] tests/i915/gem_ctx_thrash: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_ctx_thrash.c | 15 ++++++++-------
 1 file changed, 8 insertions(+), 7 deletions(-)

diff --git a/tests/i915/gem_ctx_thrash.c b/tests/i915/gem_ctx_thrash.c
index b25f95f137a8..d9201c3dd327 100644
--- a/tests/i915/gem_ctx_thrash.c
+++ b/tests/i915/gem_ctx_thrash.c
@@ -103,13 +103,13 @@ static void single(const char *name, bool all_engines)
 
 	num_engines = 0;
 	if (all_engines) {
-		unsigned engine;
+		const struct intel_execution_engine2 *e;
 
-		for_each_physical_engine(fd, engine) {
-			if (!gem_can_store_dword(fd, engine))
+		__for_each_physical_engine(fd, e) {
+			if (!gem_class_can_store_dword(fd, e->class))
 				continue;
 
-			engines[num_engines++] = engine;
+			engines[num_engines++] = e->flags;
 			if (num_engines == ARRAY_SIZE(engines))
 				break;
 		}
@@ -220,7 +220,8 @@ static void single(const char *name, bool all_engines)
 
 static void processes(void)
 {
-	unsigned engines[16], engine;
+	const struct intel_execution_engine2 *e;
+	unsigned engines[16];
 	int num_engines;
 	struct rlimit rlim;
 	unsigned num_ctx;
@@ -230,8 +231,8 @@ static void processes(void)
 	fd = drm_open_driver(DRIVER_INTEL);
 
 	num_engines = 0;
-	for_each_physical_engine(fd, engine) {
-		engines[num_engines++] = engine;
+	__for_each_physical_engine(fd, e) {
+		engines[num_engines++] = e->flags;
 		if (num_engines == ARRAY_SIZE(engines))
 			break;
 	}
-- 
2.19.1

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[igt-dev] [RFC v2 16/43] tests/i915/gem_eio: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_eio.c | 63 +++++++++++++++++++++++++++-----------------
 1 file changed, 39 insertions(+), 24 deletions(-)

diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c
index 5396a04e2367..b8cd46c2b62d 100644
--- a/tests/i915/gem_eio.c
+++ b/tests/i915/gem_eio.c
@@ -170,15 +170,15 @@ static int __gem_wait(int fd, uint32_t handle, int64_t timeout)
 	return err;
 }
 
-static igt_spin_t * __spin_poll(int fd, uint32_t ctx, unsigned long flags)
+static igt_spin_t * __spin_poll(int fd, uint32_t ctx, const struct intel_execution_engine2 *e)
 {
 	struct igt_spin_factory opts = {
 		.ctx = ctx,
-		.engine = flags,
+		.engine = e->flags,
 		.flags = IGT_SPIN_FAST,
 	};
 
-	if (gem_can_store_dword(fd, opts.engine))
+	if (gem_class_can_store_dword(fd, e->class))
 		opts.flags |= IGT_SPIN_POLL_RUN;
 
 	return __igt_spin_factory(fd, &opts);
@@ -194,9 +194,9 @@ static void __spin_wait(int fd, igt_spin_t *spin)
 	}
 }
 
-static igt_spin_t * spin_sync(int fd, uint32_t ctx, unsigned long flags)
+static igt_spin_t * spin_sync(int fd, uint32_t ctx, const struct intel_execution_engine2 *e)
 {
-	igt_spin_t *spin = __spin_poll(fd, ctx, flags);
+	igt_spin_t *spin = __spin_poll(fd, ctx, e);
 
 	__spin_wait(fd, spin);
 
@@ -315,6 +315,7 @@ static void __test_banned(int fd)
 		.buffer_count = 1,
 	};
 	const uint32_t bbe = MI_BATCH_BUFFER_END;
+	const struct intel_execution_engine2 *e;
 	unsigned long count = 0;
 
 	gem_write(fd, obj.handle, 0, &bbe, sizeof(bbe));
@@ -344,7 +345,12 @@ static void __test_banned(int fd)
 		}
 
 		/* Trigger a reset, making sure we are detected as guilty */
-		hang = spin_sync(fd, 0, 0);
+		__for_each_physical_engine(fd, e)
+			if (e->class == I915_ENGINE_CLASS_RENDER) {
+				hang = spin_sync(fd, 0, e);
+				break;
+			}
+
 		trigger_reset(fd);
 		igt_spin_free(fd, hang);
 
@@ -368,6 +374,7 @@ static void test_banned(int fd)
 static void test_wait(int fd, unsigned int flags, unsigned int wait)
 {
 	igt_spin_t *hang;
+	const struct intel_execution_engine2 *e;
 
 	fd = gem_reopen_driver(fd);
 	igt_require_gem(fd);
@@ -382,7 +389,11 @@ static void test_wait(int fd, unsigned int flags, unsigned int wait)
 	else
 		igt_require(i915_reset_control(true));
 
-	hang = spin_sync(fd, 0, I915_EXEC_DEFAULT);
+	__for_each_physical_engine(fd, e)
+		if (e->class == I915_ENGINE_CLASS_RENDER){
+			hang = spin_sync(fd, 0, e);
+			break;
+		}
 
 	check_wait(fd, hang->handle, wait, NULL);
 
@@ -416,18 +427,18 @@ static void test_suspend(int fd, int state)
 static void test_inflight(int fd, unsigned int wait)
 {
 	int parent_fd = fd;
-	unsigned int engine;
+	const struct intel_execution_engine2 *engine;
 	int fence[64]; /* mostly conservative estimate of ring size */
 	int max;
 
 	igt_require_gem(fd);
 	igt_require(gem_has_exec_fence(fd));
 
-	max = gem_measure_ring_inflight(fd, -1, 0);
+	max = gem_measure_ring_inflight(fd, ALL_ENGINES, 0);
 	igt_require(max > 1);
 	max = min(max - 1, ARRAY_SIZE(fence));
 
-	for_each_engine(parent_fd, engine) {
+	__for_each_physical_engine(parent_fd, engine) {
 		const uint32_t bbe = MI_BATCH_BUFFER_END;
 		struct drm_i915_gem_exec_object2 obj[2];
 		struct drm_i915_gem_execbuffer2 execbuf;
@@ -442,7 +453,8 @@ static void test_inflight(int fd, unsigned int wait)
 		gem_write(fd, obj[1].handle, 0, &bbe, sizeof(bbe));
 
 		gem_quiescent_gpu(fd);
-		igt_debug("Starting %s on engine '%s'\n", __func__, e__->name);
+		igt_debug("Starting %s on engine '%s'\n",
+			  __func__, engine->name);
 		igt_require(i915_reset_control(false));
 
 		hang = spin_sync(fd, 0, engine);
@@ -451,7 +463,7 @@ static void test_inflight(int fd, unsigned int wait)
 		memset(&execbuf, 0, sizeof(execbuf));
 		execbuf.buffers_ptr = to_user_pointer(obj);
 		execbuf.buffer_count = 2;
-		execbuf.flags = engine | I915_EXEC_FENCE_OUT;
+		execbuf.flags = engine->flags | I915_EXEC_FENCE_OUT;
 
 		for (unsigned int n = 0; n < max; n++) {
 			gem_execbuf_wr(fd, &execbuf);
@@ -484,7 +496,7 @@ static void test_inflight_suspend(int fd)
 	igt_spin_t *hang;
 	int max;
 
-	max = gem_measure_ring_inflight(fd, -1, 0);
+	max = gem_measure_ring_inflight(fd, ALL_ENGINES, 0);
 	igt_require(max > 1);
 	max = min(max - 1, ARRAY_SIZE(fence));
 
@@ -548,13 +560,13 @@ static uint32_t context_create_safe(int i915)
 static void test_inflight_contexts(int fd, unsigned int wait)
 {
 	int parent_fd = fd;
-	unsigned int engine;
+	const struct intel_execution_engine2 *engine;
 
 	igt_require_gem(fd);
 	igt_require(gem_has_exec_fence(fd));
 	gem_require_contexts(fd);
 
-	for_each_engine(parent_fd, engine) {
+	__for_each_physical_engine(parent_fd, engine) {
 		const uint32_t bbe = MI_BATCH_BUFFER_END;
 		struct drm_i915_gem_exec_object2 obj[2];
 		struct drm_i915_gem_execbuffer2 execbuf;
@@ -570,7 +582,8 @@ static void test_inflight_contexts(int fd, unsigned int wait)
 
 		gem_quiescent_gpu(fd);
 
-		igt_debug("Starting %s on engine '%s'\n", __func__, e__->name);
+		igt_debug("Starting %s on engine '%s'\n",
+			  __func__, engine->name);
 		igt_require(i915_reset_control(false));
 
 		memset(obj, 0, sizeof(obj));
@@ -584,7 +597,7 @@ static void test_inflight_contexts(int fd, unsigned int wait)
 		memset(&execbuf, 0, sizeof(execbuf));
 		execbuf.buffers_ptr = to_user_pointer(obj);
 		execbuf.buffer_count = 2;
-		execbuf.flags = engine | I915_EXEC_FENCE_OUT;
+		execbuf.flags = engine->flags | I915_EXEC_FENCE_OUT;
 
 		for (unsigned int n = 0; n < ARRAY_SIZE(fence); n++) {
 			execbuf.rsvd1 = ctx[n];
@@ -671,7 +684,8 @@ static void test_inflight_internal(int fd, unsigned int wait)
 	struct drm_i915_gem_execbuffer2 execbuf;
 	struct drm_i915_gem_exec_object2 obj[2];
 	uint32_t bbe = MI_BATCH_BUFFER_END;
-	unsigned engine, nfence = 0;
+	unsigned nfence = 0;
+	const struct intel_execution_engine2 *engine;
 	int fences[16];
 	igt_spin_t *hang;
 
@@ -692,8 +706,8 @@ static void test_inflight_internal(int fd, unsigned int wait)
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = to_user_pointer(obj);
 	execbuf.buffer_count = 2;
-	for_each_engine(fd, engine) {
-		execbuf.flags = engine | I915_EXEC_FENCE_OUT;
+	__for_each_physical_engine(fd, engine) {
+		execbuf.flags = engine->flags | I915_EXEC_FENCE_OUT;
 
 		gem_execbuf_wr(fd, &execbuf);
 
@@ -716,7 +730,8 @@ static void test_inflight_internal(int fd, unsigned int wait)
 }
 
 static void reset_stress(int fd,
-			 uint32_t ctx0, unsigned int engine,
+			 uint32_t ctx0,
+			 const struct intel_execution_engine2 *engine,
 			 unsigned int flags)
 {
 	const uint32_t bbe = MI_BATCH_BUFFER_END;
@@ -726,7 +741,7 @@ static void reset_stress(int fd,
 	struct drm_i915_gem_execbuffer2 execbuf = {
 		.buffers_ptr = to_user_pointer(&obj),
 		.buffer_count = 1,
-		.flags = engine,
+		.flags = engine->flags,
 	};
 	igt_stats_t stats;
 
@@ -794,9 +809,9 @@ static void reset_stress(int fd,
 static void test_reset_stress(int fd, unsigned int flags)
 {
 	uint32_t ctx0 = context_create_safe(fd);
-	unsigned int engine;
+	const struct intel_execution_engine2 *engine;
 
-	for_each_engine(fd, engine)
+	__for_each_physical_engine(fd, engine)
 		reset_stress(fd, ctx0, engine, flags);
 
 	gem_context_destroy(fd, ctx0);
-- 
2.19.1

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[igt-dev] [RFC v2 17/43] tests/i915/gem_exec_await: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_exec_await.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/tests/i915/gem_exec_await.c b/tests/i915/gem_exec_await.c
index 5cfeb8ec8bfa..5a3224159948 100644
--- a/tests/i915/gem_exec_await.c
+++ b/tests/i915/gem_exec_await.c
@@ -73,14 +73,15 @@ static void wide(int fd, int ring_size, int timeout, unsigned int flags)
 	} *exec;
 	struct drm_i915_gem_exec_object2 *obj;
 	struct drm_i915_gem_execbuffer2 execbuf;
+	const struct intel_execution_engine2 *engine;
 	unsigned engines[16];
-	unsigned nengine, engine;
+	unsigned nengine;
 	unsigned long count;
 	double time;
 
 	nengine = 0;
-	for_each_physical_engine(fd, engine)
-		engines[nengine++] = engine;
+	__for_each_physical_engine(fd, engine)
+		engines[nengine++] = engine->flags;
 	igt_require(nengine);
 
 	exec = calloc(nengine, sizeof(*exec));
-- 
2.19.1

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[igt-dev] [RFC v2 18/43] tests/i915/gem_exec_create: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_exec_create.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/tests/i915/gem_exec_create.c b/tests/i915/gem_exec_create.c
index 54a2429e49d9..9e21320d0221 100644
--- a/tests/i915/gem_exec_create.c
+++ b/tests/i915/gem_exec_create.c
@@ -63,11 +63,11 @@ static void all(int fd, unsigned flags, int timeout, int ncpus)
 	struct drm_i915_gem_exec_object2 obj;
 	unsigned engines[16];
 	unsigned nengine;
-	unsigned engine;
+	const struct intel_execution_engine2 *e;
 
 	nengine = 0;
-	for_each_physical_engine(fd, engine)
-		engines[nengine++] = engine;
+	__for_each_physical_engine(fd, e)
+		engines[nengine++] = e->flags;
 	igt_require(nengine);
 
 	memset(&obj, 0, sizeof(obj));
-- 
2.19.1

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[igt-dev] [RFC v2 19/43] tests/i915/gem_exec_fence: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_exec_fence.c | 112 +++++++++++++++++++-----------------
 1 file changed, 58 insertions(+), 54 deletions(-)

diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c
index 0befb54f8d02..1f4f3bd91142 100644
--- a/tests/i915/gem_exec_fence.c
+++ b/tests/i915/gem_exec_fence.c
@@ -57,7 +57,8 @@ struct sync_merge_data {
 #define SYNC_IOC_MERGE _IOWR(SYNC_IOC_MAGIC, 3, struct sync_merge_data)
 #endif
 
-static void store(int fd, unsigned ring, int fence, uint32_t target, unsigned offset_value)
+static void store(int fd, const struct intel_execution_engine2 *e, int fence,
+		  uint32_t target, unsigned offset_value)
 {
 	const int SCRATCH = 0;
 	const int BATCH = 1;
@@ -71,7 +72,7 @@ static void store(int fd, unsigned ring, int fence, uint32_t target, unsigned of
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = to_user_pointer(obj);
 	execbuf.buffer_count = 2;
-	execbuf.flags = ring | LOCAL_EXEC_FENCE_IN;
+	execbuf.flags = e->flags | LOCAL_EXEC_FENCE_IN;
 	execbuf.rsvd2 = fence;
 	if (gen < 6)
 		execbuf.flags |= I915_EXEC_SECURE;
@@ -119,7 +120,8 @@ static bool fence_busy(int fence)
 #define NONBLOCK 0x2
 #define WAIT 0x4
 
-static void test_fence_busy(int fd, unsigned ring, unsigned flags)
+static void test_fence_busy(int fd, const struct intel_execution_engine2 *e,
+			    unsigned flags)
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
 	struct drm_i915_gem_exec_object2 obj;
@@ -134,7 +136,7 @@ static void test_fence_busy(int fd, unsigned ring, unsigned flags)
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = to_user_pointer(&obj);
 	execbuf.buffer_count = 1;
-	execbuf.flags = ring | LOCAL_EXEC_FENCE_OUT;
+	execbuf.flags = e->flags | LOCAL_EXEC_FENCE_OUT;
 
 	memset(&obj, 0, sizeof(obj));
 	obj.handle = gem_create(fd, 4096);
@@ -216,7 +218,7 @@ static void test_fence_busy_all(int fd, unsigned flags)
 	struct drm_i915_gem_execbuffer2 execbuf;
 	struct timespec tv;
 	uint32_t *batch;
-	unsigned int engine;
+	const struct intel_execution_engine2 *e;
 	int all, i, timeout;
 
 	gem_quiescent_gpu(fd);
@@ -263,10 +265,10 @@ static void test_fence_busy_all(int fd, unsigned flags)
 	i++;
 
 	all = -1;
-	for_each_engine(fd, engine) {
+	__for_each_static_engine(e) {
 		int fence, new;
 
-		execbuf.flags = engine | LOCAL_EXEC_FENCE_OUT;
+		execbuf.flags = e->flags | LOCAL_EXEC_FENCE_OUT;
 		execbuf.rsvd2 = -1;
 		gem_execbuf_wr(fd, &execbuf);
 		fence = execbuf.rsvd2 >> 32;
@@ -315,11 +317,12 @@ static void test_fence_busy_all(int fd, unsigned flags)
 	gem_quiescent_gpu(fd);
 }
 
-static void test_fence_await(int fd, unsigned ring, unsigned flags)
+static void test_fence_await(int fd, const struct intel_execution_engine2 *e,
+			     unsigned flags)
 {
 	uint32_t scratch = gem_create(fd, 4096);
 	igt_spin_t *spin;
-	unsigned engine;
+	const struct intel_execution_engine2 *other;
 	uint32_t *out;
 	int i;
 
@@ -330,20 +333,20 @@ static void test_fence_await(int fd, unsigned ring, unsigned flags)
 			I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
 
 	spin = igt_spin_new(fd,
-			    .engine = ring,
+			    .engine = e->flags,
 			    .flags = IGT_SPIN_FENCE_OUT);
 	igt_assert(spin->out_fence != -1);
 
 	i = 0;
-	for_each_physical_engine(fd, engine) {
-		if (!gem_can_store_dword(fd, engine))
+	__for_each_physical_engine(fd, other) {
+		if (!gem_class_can_store_dword(fd, other->class))
 			continue;
 
 		if (flags & NONBLOCK) {
-			store(fd, engine, spin->out_fence, scratch, i);
+			store(fd, other, spin->out_fence, scratch, i);
 		} else {
 			igt_fork(child, 1)
-				store(fd, engine, spin->out_fence, scratch, i);
+				store(fd, other, spin->out_fence, scratch, i);
 		}
 
 		i++;
@@ -370,13 +373,14 @@ static void test_fence_await(int fd, unsigned ring, unsigned flags)
 	gem_close(fd, scratch);
 }
 
-static void resubmit(int fd, uint32_t handle, unsigned int ring, int count)
+static void resubmit(int fd, uint32_t handle,
+		     const struct intel_execution_engine2 *e, int count)
 {
 	struct drm_i915_gem_exec_object2 obj = { .handle = handle };
 	struct drm_i915_gem_execbuffer2 execbuf = {
 		.buffers_ptr = to_user_pointer(&obj),
 		.buffer_count = 1,
-		.flags = ring,
+		.flags = e->flags,
 	};
 	while (count--)
 		gem_execbuf(fd, &execbuf);
@@ -398,7 +402,7 @@ static int __execbuf(int fd, struct drm_i915_gem_execbuffer2 *execbuf)
 	return err;
 }
 
-static void test_parallel(int fd, unsigned int master)
+static void test_parallel(int fd, const struct intel_execution_engine2 *e)
 {
 	const int SCRATCH = 0;
 	const int BATCH = 1;
@@ -411,7 +415,7 @@ static void test_parallel(int fd, unsigned int master)
 	uint32_t handle[16];
 	uint32_t batch[16];
 	igt_spin_t *spin;
-	unsigned engine;
+	const struct intel_execution_engine2 *other;
 	IGT_CORK_HANDLE(c);
 	uint32_t plug;
 	int i, x = 0;
@@ -421,14 +425,14 @@ static void test_parallel(int fd, unsigned int master)
 	/* Fill the queue with many requests so that the next one has to
 	 * wait before it can be executed by the hardware.
 	 */
-	spin = igt_spin_new(fd, .engine = master, .dependency = plug);
-	resubmit(fd, spin->handle, master, 16);
+	spin = igt_spin_new(fd, .engine = e->flags, .dependency = plug);
+	resubmit(fd, spin->handle, e, 16);
 
 	/* Now queue the master request and its secondaries */
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = to_user_pointer(obj);
 	execbuf.buffer_count = 2;
-	execbuf.flags = master | LOCAL_EXEC_FENCE_OUT;
+	execbuf.flags = e->flags | LOCAL_EXEC_FENCE_OUT;
 	if (gen < 6)
 		execbuf.flags |= I915_EXEC_SECURE;
 
@@ -497,11 +501,11 @@ static void test_parallel(int fd, unsigned int master)
 	obj[BATCH].relocation_count = 1;
 
 	/* Queue all secondaries */
-	for_each_physical_engine(fd, engine) {
-		if (engine == master)
+	__for_each_physical_engine(fd, other) {
+		if (other == e)
 			continue;
 
-		execbuf.flags = engine | LOCAL_EXEC_FENCE_SUBMIT;
+		execbuf.flags = other->flags | LOCAL_EXEC_FENCE_SUBMIT;
 		if (gen < 6)
 			execbuf.flags |= I915_EXEC_SECURE;
 
@@ -588,7 +592,8 @@ static inline uint32_t upper_32_bits(uint64_t x)
 	return x >> 32;
 }
 
-static void test_keep_in_fence(int fd, unsigned int engine, unsigned int flags)
+static void test_keep_in_fence(int fd, const struct intel_execution_engine2 *e,
+			       unsigned int flags)
 {
 	struct sigaction sa = { .sa_handler = alarm_handler };
 	struct drm_i915_gem_exec_object2 obj = {
@@ -597,14 +602,14 @@ static void test_keep_in_fence(int fd, unsigned int engine, unsigned int flags)
 	struct drm_i915_gem_execbuffer2 execbuf = {
 		.buffers_ptr = to_user_pointer(&obj),
 		.buffer_count = 1,
-		.flags = engine | LOCAL_EXEC_FENCE_OUT,
+		.flags = e->flags | LOCAL_EXEC_FENCE_OUT,
 	};
 	unsigned long count, last;
 	struct itimerval itv;
 	igt_spin_t *spin;
 	int fence;
 
-	spin = igt_spin_new(fd, .engine = engine);
+	spin = igt_spin_new(fd, .engine = e->flags);
 
 	gem_execbuf_wr(fd, &execbuf);
 	fence = upper_32_bits(execbuf.rsvd2);
@@ -662,7 +667,8 @@ static void test_long_history(int fd, long ring_size, unsigned flags)
 	const uint32_t bbe = MI_BATCH_BUFFER_END;
 	struct drm_i915_gem_exec_object2 obj[2];
 	struct drm_i915_gem_execbuffer2 execbuf;
-	unsigned int engines[16], engine;
+	unsigned int engines[16];
+	const struct intel_execution_engine2 *e;
 	unsigned int nengine, n, s;
 	unsigned long limit;
 	int all_fences;
@@ -673,8 +679,8 @@ static void test_long_history(int fd, long ring_size, unsigned flags)
 		limit = ring_size / 3;
 
 	nengine = 0;
-	for_each_physical_engine(fd, engine)
-		engines[nengine++] = engine;
+	__for_each_physical_engine(fd, e)
+		engines[nengine++] = e->flags;
 	igt_require(nengine);
 
 	gem_quiescent_gpu(fd);
@@ -1155,7 +1161,7 @@ static void test_syncobj_wait(int fd)
 		.handle = syncobj_create(fd),
 	};
 	igt_spin_t *spin;
-	unsigned engine;
+	const struct intel_execution_engine2 *e;
 	unsigned handle[16];
 	int n;
 
@@ -1188,13 +1194,13 @@ static void test_syncobj_wait(int fd)
 	gem_write(fd, obj.handle, 0, &bbe, sizeof(bbe));
 
 	n = 0;
-	for_each_engine(fd, engine) {
+	__for_each_static_engine(e) {
 		obj.handle = gem_create(fd, 4096);
 		gem_write(fd, obj.handle, 0, &bbe, sizeof(bbe));
 
 		/* No inter-engine synchronisation, will complete */
-		if (engine == I915_EXEC_BLT) {
-			execbuf.flags = engine;
+		if (e->class == I915_ENGINE_CLASS_COPY) {
+			execbuf.flags = e->flags;
 			execbuf.cliprects_ptr = 0;
 			execbuf.num_cliprects = 0;
 			gem_execbuf(fd, &execbuf);
@@ -1204,7 +1210,7 @@ static void test_syncobj_wait(int fd)
 		igt_assert(gem_bo_busy(fd, spin->handle));
 
 		/* Now wait upon the blocked engine */
-		execbuf.flags = LOCAL_EXEC_FENCE_ARRAY | engine;
+		execbuf.flags = LOCAL_EXEC_FENCE_ARRAY | e->flags;
 		execbuf.cliprects_ptr = to_user_pointer(&fence);
 		execbuf.num_cliprects = 1;
 		fence.flags = LOCAL_EXEC_FENCE_WAIT;
@@ -1513,7 +1519,7 @@ static void test_syncobj_channel(int fd)
 
 igt_main
 {
-	const struct intel_execution_engine *e;
+	const struct intel_execution_engine2 *e;
 	int i915 = -1;
 
 	igt_fixture {
@@ -1545,11 +1551,10 @@ igt_main
 			test_fence_busy_all(i915, WAIT | HANG);
 	}
 
-	for (e = intel_execution_engines; e->name; e++) {
+	__for_each_physical_engine(i915, e) {
 		igt_subtest_group {
 			igt_fixture {
-				igt_require(gem_has_ring(i915, e->exec_id | e->flags));
-				igt_require(gem_can_store_dword(i915, e->exec_id | e->flags));
+				igt_require(gem_class_can_store_dword(i915, e->class));
 			}
 
 			igt_subtest_group {
@@ -1558,29 +1563,28 @@ igt_main
 				}
 
 				igt_subtest_f("%sbusy-%s",
-						e->exec_id == 0 ? "basic-" : "",
+						e->class == I915_ENGINE_CLASS_RENDER ? "basic-" : "",
 						e->name)
-					test_fence_busy(i915, e->exec_id | e->flags, 0);
+					test_fence_busy(i915, e, 0);
 				igt_subtest_f("%swait-%s",
-						e->exec_id == 0 ? "basic-" : "",
+						e->class == I915_ENGINE_CLASS_RENDER ? "basic-" : "",
 						e->name)
-					test_fence_busy(i915, e->exec_id | e->flags, WAIT);
+					test_fence_busy(i915, e, WAIT);
 				igt_subtest_f("%sawait-%s",
-						e->exec_id == 0 ? "basic-" : "",
+						e->class == I915_ENGINE_CLASS_RENDER ? "basic-" : "",
 						e->name)
-					test_fence_await(i915, e->exec_id | e->flags, 0);
+					test_fence_await(i915, e, 0);
 				igt_subtest_f("nb-await-%s", e->name)
-					test_fence_await(i915, e->exec_id | e->flags, NONBLOCK);
+					test_fence_await(i915, e, NONBLOCK);
 
 				igt_subtest_f("keep-in-fence-%s", e->name)
-					test_keep_in_fence(i915, e->exec_id | e->flags, 0);
+					test_keep_in_fence(i915, e, 0);
 
-				if (e->exec_id &&
-				    !(e->exec_id == I915_EXEC_BSD && !e->flags)) {
+				if (!(e->class == I915_ENGINE_CLASS_VIDEO && !e->flags)) {
 					igt_subtest_f("parallel-%s", e->name) {
 						igt_require(has_submit_fence(i915));
 						igt_until_timeout(2)
-							test_parallel(i915, e->exec_id | e->flags);
+							test_parallel(i915, e);
 					}
 				}
 
@@ -1599,13 +1603,13 @@ igt_main
 				}
 
 				igt_subtest_f("busy-hang-%s", e->name)
-					test_fence_busy(i915, e->exec_id | e->flags, HANG);
+					test_fence_busy(i915, e, HANG);
 				igt_subtest_f("wait-hang-%s", e->name)
-					test_fence_busy(i915, e->exec_id | e->flags, HANG | WAIT);
+					test_fence_busy(i915, e, HANG | WAIT);
 				igt_subtest_f("await-hang-%s", e->name)
-					test_fence_await(i915, e->exec_id | e->flags, HANG);
+					test_fence_await(i915, e, HANG);
 				igt_subtest_f("nb-await-hang-%s", e->name)
-					test_fence_await(i915, e->exec_id | e->flags, NONBLOCK | HANG);
+					test_fence_await(i915, e, NONBLOCK | HANG);
 				igt_fixture {
 					igt_disallow_hang(i915, hang);
 				}
-- 
2.19.1

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[igt-dev] [RFC v2 20/43] tests/i915/gem_exec_flush: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_exec_flush.c | 72 ++++++++++++++++++-------------------
 1 file changed, 35 insertions(+), 37 deletions(-)

diff --git a/tests/i915/gem_exec_flush.c b/tests/i915/gem_exec_flush.c
index f820b2a8d0a4..2f041863e238 100644
--- a/tests/i915/gem_exec_flush.c
+++ b/tests/i915/gem_exec_flush.c
@@ -74,8 +74,8 @@ static uint32_t movnt(uint32_t *map, int i)
 }
 #endif
 
-static void run(int fd, unsigned ring, int nchild, int timeout,
-		unsigned flags)
+static void run(int fd, const struct intel_execution_engine2 *e,
+		int nchild, int timeout, unsigned flags)
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
 
@@ -162,7 +162,7 @@ static void run(int fd, unsigned ring, int nchild, int timeout,
 		memset(&execbuf, 0, sizeof(execbuf));
 		execbuf.buffers_ptr = to_user_pointer(obj);
 		execbuf.buffer_count = 3;
-		execbuf.flags = ring | (1 << 11) | (1<<12);
+		execbuf.flags = e->flags | (1 << 11) | (1<<12);
 		if (gen < 6)
 			execbuf.flags |= I915_EXEC_SECURE;
 
@@ -352,7 +352,8 @@ enum batch_mode {
 	BATCH_GTT,
 	BATCH_WC,
 };
-static void batch(int fd, unsigned ring, int nchild, int timeout,
+static void batch(int fd, const struct intel_execution_engine2 *e,
+		  int nchild, int timeout,
 		  enum batch_mode mode, unsigned flags)
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
@@ -394,7 +395,7 @@ static void batch(int fd, unsigned ring, int nchild, int timeout,
 		memset(&execbuf, 0, sizeof(execbuf));
 		execbuf.buffers_ptr = to_user_pointer(obj);
 		execbuf.buffer_count = 2;
-		execbuf.flags = ring | (1 << 11) | (1<<12);
+		execbuf.flags = e->flags | (1 << 11) | (1<<12);
 		if (gen < 6)
 			execbuf.flags |= I915_EXEC_SECURE;
 
@@ -552,7 +553,7 @@ static const char *yesno(bool x)
 
 igt_main
 {
-	const struct intel_execution_engine *e;
+	const struct intel_execution_engine2 *e;
 	const int ncpus = sysconf(_SC_NPROCESSORS_ONLN);
 	const struct batch {
 		const char *name;
@@ -599,78 +600,75 @@ igt_main
 		igt_fork_hang_detector(fd);
 	}
 
-	for (e = intel_execution_engines; e->name; e++) igt_subtest_group {
-		unsigned ring = e->exec_id | e->flags;
-		unsigned timeout = 5 + 120*!!e->exec_id;
+	__for_each_physical_engine(fd, e) igt_subtest_group {
+		unsigned timeout = 5 + 120;
 
 		igt_fixture {
-			gem_require_ring(fd, ring);
-			igt_require(gem_can_store_dword(fd, ring));
+			igt_require(gem_class_can_store_dword(fd, e->class));
 		}
 
 		for (const struct batch *b = batches; b->name; b++) {
 			igt_subtest_f("%sbatch-%s-%s-uc",
-				      b == batches && e->exec_id == 0 ? "basic-" : "",
-				      b->name,
-				      e->name)
-				batch(fd, ring, ncpus, timeout, b->mode, 0);
+				      b == batches &&
+				      e->class == I915_ENGINE_CLASS_RENDER ?
+				      "basic-" : "", b->name, e->name)
+				batch(fd, e, ncpus, timeout, b->mode, 0);
 			igt_subtest_f("%sbatch-%s-%s-wb",
-				      b == batches && e->exec_id == 0 ? "basic-" : "",
-				      b->name,
-				      e->name)
-				batch(fd, ring, ncpus, timeout, b->mode, COHERENT);
+				      b == batches &&
+				      e->class == I915_ENGINE_CLASS_RENDER ?
+				      "basic-" : "", b->name, e->name)
+				batch(fd, e, ncpus, timeout, b->mode, COHERENT);
 			igt_subtest_f("%sbatch-%s-%s-cmd",
-				      b == batches && e->exec_id == 0 ? "basic-" : "",
-				      b->name,
-				      e->name)
-				batch(fd, ring, ncpus, timeout, b->mode,
+				      b == batches &&
+				      e->class == I915_ENGINE_CLASS_RENDER ?
+				      "basic-" : "", b->name, e->name)
+				batch(fd, e, ncpus, timeout, b->mode,
 				      COHERENT | CMDPARSER);
 		}
 
 		for (const struct mode *m = modes; m->name; m++) {
 			igt_subtest_f("%suc-%s-%s",
-				      (m->flags & BASIC && e->exec_id == 0) ? "basic-" : "",
-				      m->name,
-				      e->name)
-				run(fd, ring, ncpus, timeout,
+				      (m->flags & BASIC &&
+				       e->class == I915_ENGINE_CLASS_RENDER) ?
+				      "basic-" : "", m->name, e->name)
+				run(fd, e, ncpus, timeout,
 				    UNCACHED | m->flags);
 
 			igt_subtest_f("uc-%s-%s-interruptible",
 				      m->name,
 				      e->name)
-				run(fd, ring, ncpus, timeout,
+				run(fd, e, ncpus, timeout,
 				    UNCACHED | m->flags | INTERRUPTIBLE);
 
 			igt_subtest_f("%swb-%s-%s",
-				      e->exec_id == 0 ? "basic-" : "",
-				      m->name,
-				      e->name)
-				run(fd, ring, ncpus, timeout,
+				      e->class == I915_ENGINE_CLASS_RENDER ?
+				      "basic-" : "", m->name, e->name)
+				run(fd, e, ncpus, timeout,
 				    COHERENT | m->flags);
 
 			igt_subtest_f("wb-%s-%s-interruptible",
 				      m->name,
 				      e->name)
-				run(fd, ring, ncpus, timeout,
+				run(fd, e, ncpus, timeout,
 				    COHERENT | m->flags | INTERRUPTIBLE);
 
 			igt_subtest_f("wc-%s-%s",
 				      m->name,
 				      e->name)
-				run(fd, ring, ncpus, timeout,
+				run(fd, e, ncpus, timeout,
 				    COHERENT | WC | m->flags);
 
 			igt_subtest_f("wc-%s-%s-interruptible",
 				      m->name,
 				      e->name)
-				run(fd, ring, ncpus, timeout,
+				run(fd, e, ncpus, timeout,
 				    COHERENT | WC | m->flags | INTERRUPTIBLE);
 
 			igt_subtest_f("stream-%s-%s",
 				      m->name,
 				      e->name) {
 				igt_require(cpu & SSE4_1);
-				run(fd, ring, ncpus, timeout,
+				run(fd, e, ncpus, timeout,
 				    MOVNT | COHERENT | WC | m->flags);
 			}
 
@@ -678,7 +676,7 @@ igt_main
 				      m->name,
 				      e->name) {
 				igt_require(cpu & SSE4_1);
-				run(fd, ring, ncpus, timeout,
+				run(fd, e, ncpus, timeout,
 				    MOVNT | COHERENT | WC | m->flags | INTERRUPTIBLE);
 			}
 		}
-- 
2.19.1

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[igt-dev] [RFC v2 21/43] tests/i915/gem_exec_gttfill: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_exec_gttfill.c | 30 +++++++++++++++---------------
 1 file changed, 15 insertions(+), 15 deletions(-)

diff --git a/tests/i915/gem_exec_gttfill.c b/tests/i915/gem_exec_gttfill.c
index efd612bb61c4..6140d36260f7 100644
--- a/tests/i915/gem_exec_gttfill.c
+++ b/tests/i915/gem_exec_gttfill.c
@@ -104,16 +104,16 @@ static void submit(int fd, int gen,
 	gem_sync(fd, obj.handle);
 }
 
-static void fillgtt(int fd, unsigned ring, int timeout)
+static void fillgtt(int fd, const struct intel_execution_engine2 *e,
+		    int timeout)
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
 	struct drm_i915_gem_execbuffer2 execbuf;
 	struct drm_i915_gem_relocation_entry reloc[2];
 	volatile uint64_t *shared;
 	struct batch *batches;
-	unsigned engines[16];
-	unsigned nengine;
-	unsigned engine;
+	unsigned nengine, engines[16];
+	const struct intel_execution_engine2 *other;
 	uint64_t size;
 	unsigned count;
 
@@ -121,18 +121,18 @@ static void fillgtt(int fd, unsigned ring, int timeout)
 	igt_assert(shared != MAP_FAILED);
 
 	nengine = 0;
-	if (ring == 0) {
-		for_each_physical_engine(fd, engine) {
-			if (!gem_can_store_dword(fd, engine))
+	if (!e) {
+		__for_each_physical_engine(fd, other) {
+			if (!gem_class_can_store_dword(fd, other->class))
 				continue;
 
-			engines[nengine++] = engine;
+			engines[nengine++] = other->flags;
 		}
 	} else {
-		gem_require_ring(fd, ring);
-		igt_require(gem_can_store_dword(fd, ring));
+		gem_require_ring(fd, e->flags);
+		igt_require(gem_class_can_store_dword(fd, e->class));
 
-		engines[nengine++] = ring;
+		engines[nengine++] = e->flags;
 	}
 	igt_require(nengine);
 
@@ -207,7 +207,7 @@ static void fillgtt(int fd, unsigned ring, int timeout)
 
 igt_main
 {
-	const struct intel_execution_engine *e;
+	const struct intel_execution_engine2 *e;
 	int device = -1;
 
 	igt_skip_on_simulation();
@@ -222,12 +222,12 @@ igt_main
 	igt_subtest("basic")
 		fillgtt(device, 0, 1); /* just enough to run a single pass */
 
-	for (e = intel_execution_engines; e->name; e++)
+	__for_each_physical_engine(device, e)
 		igt_subtest_f("%s", e->name)
-			fillgtt(device, e->exec_id | e->flags, 20);
+			fillgtt(device, e, 20);
 
 	igt_subtest("all")
-		fillgtt(device, 0, 150);
+		fillgtt(device, NULL, 150);
 
 	igt_fixture {
 		igt_stop_hang_detector();
-- 
2.19.1

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[igt-dev] [RFC v2 22/43] tests/i915/gem_exec_latency: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_exec_latency.c | 103 ++++++++++++++--------------------
 1 file changed, 42 insertions(+), 61 deletions(-)

diff --git a/tests/i915/gem_exec_latency.c b/tests/i915/gem_exec_latency.c
index e56d62780c94..0a95c491eb56 100644
--- a/tests/i915/gem_exec_latency.c
+++ b/tests/i915/gem_exec_latency.c
@@ -63,10 +63,10 @@ static unsigned int ring_size;
 static double rcs_clock;
 
 static void
-poll_ring(int fd, unsigned ring, const char *name)
+poll_ring(int fd, const struct intel_execution_engine2 *e, const char *name)
 {
 	const struct igt_spin_factory opts = {
-		.engine = ring,
+		.engine = e->flags,
 		.flags = IGT_SPIN_POLL_RUN | IGT_SPIN_FAST,
 	};
 	struct timespec tv = {};
@@ -74,8 +74,8 @@ poll_ring(int fd, unsigned ring, const char *name)
 	igt_spin_t *spin[2];
 	uint64_t elapsed;
 
-	gem_require_ring(fd, ring);
-	igt_require(gem_can_store_dword(fd, ring));
+	gem_require_ring(fd, e->flags);
+	igt_require(gem_class_can_store_dword(fd, e->class));
 
 	spin[0] = __igt_spin_factory(fd, &opts);
 	igt_assert(igt_spin_has_poll(spin[0]));
@@ -109,8 +109,8 @@ poll_ring(int fd, unsigned ring, const char *name)
 
 #define RCS_TIMESTAMP (0x2000 + 0x358)
 static void latency_on_ring(int fd,
-			    unsigned ring, const char *name,
-			    unsigned flags)
+			    const struct intel_execution_engine2 *e,
+			    const char *name, unsigned flags)
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
 	const int has_64bit_reloc = gen >= 8;
@@ -131,7 +131,7 @@ static void latency_on_ring(int fd,
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = to_user_pointer(&obj[1]);
 	execbuf.buffer_count = 2;
-	execbuf.flags = ring;
+	execbuf.flags = e->flags;
 	execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC | LOCAL_I915_EXEC_HANDLE_LUT;
 
 	memset(obj, 0, sizeof(obj));
@@ -188,7 +188,7 @@ static void latency_on_ring(int fd,
 	}
 
 	if (flags & LIVE)
-		spin = igt_spin_new(fd, .engine = ring);
+		spin = igt_spin_new(fd, .engine = e->flags);
 
 	start = *reg;
 	for (j = 0; j < repeats; j++) {
@@ -256,8 +256,8 @@ static void latency_on_ring(int fd,
 }
 
 static void latency_from_ring(int fd,
-			      unsigned ring, const char *name,
-			      unsigned flags)
+			      const struct intel_execution_engine2 *e,
+			      const char *name, unsigned flags)
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
 	const int has_64bit_reloc = gen >= 8;
@@ -265,7 +265,7 @@ static void latency_from_ring(int fd,
 	struct drm_i915_gem_relocation_entry reloc;
 	struct drm_i915_gem_execbuffer2 execbuf;
 	const unsigned int repeats = ring_size / 2;
-	unsigned int other;
+	const struct intel_execution_engine2 *other;
 	uint32_t *map, *results;
 	uint32_t ctx[2] = {};
 	int i, j;
@@ -281,7 +281,7 @@ static void latency_from_ring(int fd,
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = to_user_pointer(&obj[1]);
 	execbuf.buffer_count = 2;
-	execbuf.flags = ring;
+	execbuf.flags = e->flags;
 	execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC | LOCAL_I915_EXEC_HANDLE_LUT;
 	execbuf.rsvd1 = ctx[1];
 
@@ -311,7 +311,7 @@ static void latency_from_ring(int fd,
 	reloc.presumed_offset = obj[1].offset;
 	reloc.target_handle = flags & CORK ? 1 : 0;
 
-	for_each_physical_engine(fd, other) {
+	__for_each_physical_engine(fd, other) {
 		igt_spin_t *spin = NULL;
 		IGT_CORK_HANDLE(c);
 
@@ -322,7 +322,7 @@ static void latency_from_ring(int fd,
 		if (flags & PREEMPT)
 			spin = __igt_spin_new(fd,
 					      .ctx = ctx[0],
-					      .engine = ring);
+					      .engine = e->flags);
 
 		if (flags & CORK) {
 			obj[0].handle = igt_cork_plug(&c, fd);
@@ -334,7 +334,7 @@ static void latency_from_ring(int fd,
 			uint64_t offset;
 
 			execbuf.flags &= ~ENGINE_FLAGS;
-			execbuf.flags |= ring;
+			execbuf.flags |= e->flags;
 
 			execbuf.batch_start_offset = 64 * j;
 			reloc.offset =
@@ -359,7 +359,7 @@ static void latency_from_ring(int fd,
 			gem_execbuf(fd, &execbuf);
 
 			execbuf.flags &= ~ENGINE_FLAGS;
-			execbuf.flags |= other;
+			execbuf.flags |= other->flags;
 
 			execbuf.batch_start_offset = 64 * (j + repeats);
 			reloc.offset =
@@ -392,7 +392,7 @@ static void latency_from_ring(int fd,
 		igt_spin_free(fd, spin);
 
 		igt_info("%s-%s delay: %.2fns\n",
-			 name, e__->name,
+			 name, e->name,
 			 (results[2*repeats-1] - results[0]) / (double)repeats * rcs_clock);
 	}
 
@@ -441,7 +441,8 @@ static bool __spin_wait(int fd, igt_spin_t *spin)
  * reasonable latency.
  */
 static void
-rthog_latency_on_ring(int fd, unsigned int engine, const char *name, unsigned int flags)
+rthog_latency_on_ring(int fd, const struct intel_execution_engine2 *e,
+		      const char *name, unsigned int flags)
 #define RTIDLE 0x1
 {
 	const char *passname[] = {
@@ -458,7 +459,7 @@ rthog_latency_on_ring(int fd, unsigned int engine, const char *name, unsigned in
 #define NPASS ARRAY_SIZE(passname)
 #define MMAP_SZ (64 << 10)
 	const struct igt_spin_factory opts = {
-		.engine = engine,
+		.engine = e->flags,
 		.flags = IGT_SPIN_POLL_RUN | IGT_SPIN_FAST,
 	};
 	struct rt_pkt *results;
@@ -472,19 +473,19 @@ rthog_latency_on_ring(int fd, unsigned int engine, const char *name, unsigned in
 	igt_assert(results != MAP_FAILED);
 
 	nengine = 0;
-	if (engine == ALL_ENGINES) {
-		for_each_physical_engine(fd, engine) {
-			if (!gem_can_store_dword(fd, engine))
+	if (!e) {
+		__for_each_physical_engine(fd, e) {
+			if (!gem_class_can_store_dword(fd, e->class))
 				continue;
 
-			engines[nengine] = engine;
-			names[nengine] = e__->name;
+			engines[nengine] = e->flags;
+			names[nengine] = e->name;
 			nengine++;
 		}
 		igt_require(nengine > 1);
 	} else {
-		igt_require(gem_can_store_dword(fd, engine));
-		engines[nengine] = engine;
+		igt_require(gem_class_can_store_dword(fd, e->class));
+		engines[nengine] = e->flags;
 		names[nengine] = name;
 		nengine++;
 	}
@@ -494,7 +495,6 @@ rthog_latency_on_ring(int fd, unsigned int engine, const char *name, unsigned in
 	igt_fork(child, nengine) {
 		unsigned int pass = 0; /* Three phases: warmup, normal, rt. */
 
-		engine = engines[child];
 		do {
 			struct igt_mean mean;
 			double min = HUGE_VAL;
@@ -547,7 +547,7 @@ rthog_latency_on_ring(int fd, unsigned int engine, const char *name, unsigned in
 				igt_spin_reset(spin);
 
 				igt_nsec_elapsed(&ts);
-				__submit_spin(fd, spin, engine);
+				__submit_spin(fd, spin, engines[child]);
 				if (!__spin_wait(fd, spin)) {
 					igt_warn("Wait timeout! (%s)\n",
 						 passname[pass]);
@@ -650,7 +650,7 @@ static double clockrate(int i915, int reg)
 
 igt_main
 {
-	const struct intel_execution_engine *e;
+	const struct intel_execution_engine2 *e;
 	int device = -1;
 
 	igt_fixture {
@@ -675,71 +675,53 @@ igt_main
 	}
 
 	igt_subtest("all-rtidle-submit")
-		rthog_latency_on_ring(device, ALL_ENGINES, "all", RTIDLE);
+		rthog_latency_on_ring(device, NULL, "all", RTIDLE);
 
 	igt_subtest("all-rthog-submit")
-		rthog_latency_on_ring(device, ALL_ENGINES, "all", 0);
+		rthog_latency_on_ring(device, NULL, "all", 0);
 
 	igt_subtest_group {
 		igt_fixture
 			igt_require(intel_gen(intel_get_drm_devid(device)) >= 7);
 
-		for (e = intel_execution_engines; e->name; e++) {
-			if (e->exec_id == 0)
-				continue;
-
+		__for_each_physical_engine(device, e) {
 			igt_subtest_group {
-				igt_fixture {
-					igt_require(gem_ring_has_physical_engine(device, e->exec_id | e->flags));
-				}
-
 				igt_subtest_f("%s-dispatch", e->name)
 					latency_on_ring(device,
-							e->exec_id | e->flags,
-							e->name, 0);
+							e, e->name, 0);
 
 				igt_subtest_f("%s-live-dispatch", e->name)
 					latency_on_ring(device,
-							e->exec_id | e->flags,
-							e->name, LIVE);
+							e, e->name, LIVE);
 
 				igt_subtest_f("%s-poll", e->name)
 					poll_ring(device,
-						  e->exec_id | e->flags,
-						  e->name);
+						  e, e->name);
 
 				igt_subtest_f("%s-rtidle-submit", e->name)
 					rthog_latency_on_ring(device,
-							      e->exec_id |
-							      e->flags,
-							      e->name,
+							      e, e->name,
 							      RTIDLE);
 
 				igt_subtest_f("%s-rthog-submit", e->name)
 					rthog_latency_on_ring(device,
-							      e->exec_id |
-							      e->flags,
-							      e->name,
+							      e, e->name,
 							      0);
 
 				igt_subtest_f("%s-live-dispatch-queued", e->name)
 					latency_on_ring(device,
-							e->exec_id | e->flags,
-							e->name, LIVE | CORK);
+							e, e->name, LIVE | CORK);
 				igt_subtest_f("%s-dispatch-queued", e->name)
 					latency_on_ring(device,
-							e->exec_id | e->flags,
-							e->name, CORK);
+							e, e->name, CORK);
 
 				igt_subtest_f("%s-synchronisation", e->name)
 					latency_from_ring(device,
-							  e->exec_id | e->flags,
-							  e->name, 0);
+							  e, e->name, 0);
 
 				igt_subtest_f("%s-synchronisation-queued", e->name)
 					latency_from_ring(device,
-							  e->exec_id | e->flags,
-							  e->name, CORK);
+							  e, e->name, CORK);
 
 				igt_subtest_group {
 					igt_fixture {
@@ -749,8 +731,7 @@ igt_main
 
 					igt_subtest_f("%s-preemption", e->name)
 						latency_from_ring(device,
-								  e->exec_id | e->flags,
-								  e->name, PREEMPT);
+								  e, e->name, PREEMPT);
 				}
 			}
 		}
-- 
2.19.1

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[igt-dev] [RFC v2 23/43] tests/i915/gem_exec_nop: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_exec_nop.c | 119 ++++++++++++++++++++------------------
 1 file changed, 63 insertions(+), 56 deletions(-)

diff --git a/tests/i915/gem_exec_nop.c b/tests/i915/gem_exec_nop.c
index 8922685af357..937ec01433b4 100644
--- a/tests/i915/gem_exec_nop.c
+++ b/tests/i915/gem_exec_nop.c
@@ -66,7 +66,8 @@ static double elapsed(const struct timespec *start, const struct timespec *end)
 		(end->tv_nsec - start->tv_nsec)*1e-9);
 }
 
-static double nop_on_ring(int fd, uint32_t handle, unsigned ring_id,
+static double nop_on_ring(int fd, uint32_t handle,
+			  const struct intel_execution_engine2 *e,
 			  int timeout, unsigned long *out)
 {
 	struct drm_i915_gem_execbuffer2 execbuf;
@@ -80,11 +81,11 @@ static double nop_on_ring(int fd, uint32_t handle, unsigned ring_id,
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = to_user_pointer(&obj);
 	execbuf.buffer_count = 1;
-	execbuf.flags = ring_id;
+	execbuf.flags = e->flags;
 	execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT;
 	execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC;
 	if (__gem_execbuf(fd, &execbuf)) {
-		execbuf.flags = ring_id;
+		execbuf.flags = e->flags;
 		gem_execbuf(fd, &execbuf);
 	}
 	intel_detect_and_clear_missed_interrupts(fd);
@@ -104,7 +105,8 @@ static double nop_on_ring(int fd, uint32_t handle, unsigned ring_id,
 	return elapsed(&start, &now);
 }
 
-static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
+static void poll_ring(int fd, const struct intel_execution_engine2 *e,
+		      const char *name, int timeout)
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
 	const uint32_t MI_ARB_CHK = 0x5 << 23;
@@ -121,8 +123,8 @@ static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
 	if (gen == 4 || gen == 5)
 		flags |= I915_EXEC_SECURE;
 
-	gem_require_ring(fd, engine);
-	igt_require(gem_can_store_dword(fd, engine));
+	gem_require_ring(fd, e->flags);
+	igt_require(gem_class_can_store_dword(fd, e->class));
 
 	memset(&obj, 0, sizeof(obj));
 	obj.handle = gem_create(fd, 4096);
@@ -186,7 +188,7 @@ static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = to_user_pointer(&obj);
 	execbuf.buffer_count = 1;
-	execbuf.flags = engine | flags;
+	execbuf.flags = e->flags | flags;
 
 	cycles = 0;
 	do {
@@ -222,7 +224,8 @@ static void poll_sequential(int fd, const char *name, int timeout)
 	struct drm_i915_gem_exec_object2 obj[2];
 	struct drm_i915_gem_relocation_entry reloc[4], *r;
 	uint32_t *bbe[2], *state, *batch;
-	unsigned engines[16], nengine, engine, flags;
+	unsigned engines[16], nengine, flags;
+	const struct intel_execution_engine2 *e;
 	struct timespec tv = {};
 	unsigned long cycles;
 	uint64_t elapsed;
@@ -233,11 +236,11 @@ static void poll_sequential(int fd, const char *name, int timeout)
 		flags |= I915_EXEC_SECURE;
 
 	nengine = 0;
-	for_each_physical_engine(fd, engine) {
-		if (!gem_can_store_dword(fd, engine))
+	__for_each_physical_engine(fd, e) {
+		if (!gem_class_can_store_dword(fd, e->class))
 			continue;
 
-		engines[nengine++] = engine;
+		engines[nengine++] = e->flags;
 	}
 	igt_require(nengine);
 
@@ -342,20 +345,22 @@ static void poll_sequential(int fd, const char *name, int timeout)
 }
 
 static void single(int fd, uint32_t handle,
-		   unsigned ring_id, const char *ring_name)
+		   const struct intel_execution_engine2 *e,
+		   const char *ring_name)
 {
 	double time;
 	unsigned long count;
 
-	gem_require_ring(fd, ring_id);
+	gem_require_ring(fd, e->flags);
 
-	time = nop_on_ring(fd, handle, ring_id, 20, &count);
+	time = nop_on_ring(fd, handle, e, 20, &count);
 	igt_info("%s: %'lu cycles: %.3fus\n",
 		 ring_name, count, time*1e6 / count);
 }
 
 static double
-stable_nop_on_ring(int fd, uint32_t handle, unsigned int engine,
+stable_nop_on_ring(int fd, uint32_t handle,
+		   const struct intel_execution_engine2 *e,
 		   int timeout, int reps)
 {
 	igt_stats_t s;
@@ -370,7 +375,7 @@ stable_nop_on_ring(int fd, uint32_t handle, unsigned int engine,
 		unsigned long count;
 		double time;
 
-		time = nop_on_ring(fd, handle, engine, timeout, &count);
+		time = nop_on_ring(fd, handle, e, timeout, &count);
 		igt_stats_push_float(&s, time / count);
 	}
 
@@ -432,20 +437,20 @@ static void parallel(int fd, uint32_t handle, int timeout)
 	unsigned engines[16];
 	const char *names[16];
 	unsigned nengine;
-	unsigned engine;
+	const struct intel_execution_engine2 *e;
 	unsigned long count;
 	double time, sum;
 
 	sum = 0;
 	nengine = 0;
-	for_each_physical_engine(fd, engine) {
-		engines[nengine] = engine;
-		names[nengine] = e__->name;
+	__for_each_physical_engine(fd, e) {
+		engines[nengine] = e->flags;
+		names[nengine] = e->name;
 		nengine++;
 
-		time = nop_on_ring(fd, handle, engine, 1, &count) / count;
+		time = nop_on_ring(fd, handle, e, 1, &count) / count;
 		sum += time;
-		igt_debug("%s: %.3fus\n", e__->name, 1e6*time);
+		igt_debug("%s: %.3fus\n", e->name, 1e6*time);
 	}
 	igt_require(nengine);
 	igt_info("average (individually): %.3fus\n", sum/nengine*1e6);
@@ -491,25 +496,25 @@ static void series(int fd, uint32_t handle, int timeout)
 {
 	struct drm_i915_gem_execbuffer2 execbuf;
 	struct drm_i915_gem_exec_object2 obj;
+	const struct intel_execution_engine2 *e;
 	struct timespec start, now, sync;
 	unsigned engines[16];
 	unsigned nengine;
-	unsigned engine;
 	unsigned long count;
 	double time, max = 0, min = HUGE_VAL, sum = 0;
 	const char *name;
 
 	nengine = 0;
-	for_each_physical_engine(fd, engine) {
-		time = nop_on_ring(fd, handle, engine, 1, &count) / count;
+	__for_each_physical_engine(fd, e) {
+		time = nop_on_ring(fd, handle, e, 1, &count) / count;
 		if (time > max) {
-			name = e__->name;
+			name = e->name;
 			max = time;
 		}
 		if (time < min)
 			min = time;
 		sum += time;
-		engines[nengine++] = engine;
+		engines[nengine++] = e->flags;
 	}
 	igt_require(nengine);
 	igt_info("Maximum execution latency on %s, %.3fus, min %.3fus, total %.3fus per cycle, average %.3fus\n",
@@ -582,11 +587,12 @@ static void sequential(int fd, uint32_t handle, unsigned flags, int timeout)
 	const int ncpus = flags & FORKED ? sysconf(_SC_NPROCESSORS_ONLN) : 1;
 	struct drm_i915_gem_execbuffer2 execbuf;
 	struct drm_i915_gem_exec_object2 obj[2];
+	const struct intel_execution_engine2 *e;
 	unsigned engines[16];
 	unsigned nengine;
 	double *results;
 	double time, sum;
-	unsigned n;
+	int n;
 
 	gem_require_contexts(fd);
 
@@ -595,14 +601,14 @@ static void sequential(int fd, uint32_t handle, unsigned flags, int timeout)
 
 	nengine = 0;
 	sum = 0;
-	for_each_physical_engine(fd, n) {
+	__for_each_physical_engine(fd, e) {
 		unsigned long count;
 
-		time = nop_on_ring(fd, handle, n, 1, &count) / count;
+		time = nop_on_ring(fd, handle, e, 1, &count) / count;
 		sum += time;
-		igt_debug("%s: %.3fus\n", e__->name, 1e6*time);
+		igt_debug("%s: %.3fus\n", e->name, 1e6*time);
 
-		engines[nengine++] = n;
+		engines[nengine++] = e->flags;
 	}
 	igt_require(nengine);
 	igt_info("Total (individual) execution latency %.3fus per cycle\n",
@@ -710,10 +716,11 @@ static bool fence_wait(int fence)
 }
 
 static void fence_signal(int fd, uint32_t handle,
-			 unsigned ring_id, const char *ring_name,
-			 int timeout)
+			 const struct intel_execution_engine2 *e,
+			 const char *ring_name, int timeout)
 {
 #define NFENCES 512
+	const struct intel_execution_engine2 *other;
 	struct drm_i915_gem_execbuffer2 execbuf;
 	struct drm_i915_gem_exec_object2 obj;
 	struct timespec start, now;
@@ -725,12 +732,12 @@ static void fence_signal(int fd, uint32_t handle,
 	igt_require(gem_has_exec_fence(fd));
 
 	nengine = 0;
-	if (ring_id == ALL_ENGINES) {
-		for_each_physical_engine(fd, n)
-			engines[nengine++] = n;
+	if (!e) {
+		__for_each_physical_engine(fd, other)
+			engines[nengine++] = other->flags;
 	} else {
-		gem_require_ring(fd, ring_id);
-		engines[nengine++] = ring_id;
+		gem_require_ring(fd, e->flags);
+		engines[nengine++] = e->flags;
 	}
 	igt_require(nengine);
 
@@ -754,14 +761,14 @@ static void fence_signal(int fd, uint32_t handle,
 	clock_gettime(CLOCK_MONOTONIC, &start);
 	do {
 		for (int loop = 0; loop < 1024; loop++) {
-			for (int e = 0; e < nengine; e++) {
+			for (int i = 0; i < nengine; i++) {
 				if (fences[n] != -1) {
 					igt_assert(fence_wait(fences[n]));
 					close(fences[n]);
 				}
 
 				execbuf.flags &= ~ENGINE_FLAGS;
-				execbuf.flags |= engines[e];
+				execbuf.flags |= engines[i];
 				gem_execbuf_wr(fd, &execbuf);
 
 				/* Enable signaling by doing a poll() */
@@ -787,7 +794,8 @@ static void fence_signal(int fd, uint32_t handle,
 }
 
 static void preempt(int fd, uint32_t handle,
-		   unsigned ring_id, const char *ring_name)
+		   const struct intel_execution_engine2 *e,
+		   const char *ring_name)
 {
 	struct drm_i915_gem_execbuffer2 execbuf;
 	struct drm_i915_gem_exec_object2 obj;
@@ -795,7 +803,7 @@ static void preempt(int fd, uint32_t handle,
 	unsigned long count;
 	uint32_t ctx[2];
 
-	gem_require_ring(fd, ring_id);
+	gem_require_ring(fd, e->flags);
 
 	ctx[0] = gem_context_create(fd);
 	gem_context_set_priority(fd, ctx[0], MIN_PRIO);
@@ -809,11 +817,11 @@ static void preempt(int fd, uint32_t handle,
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = to_user_pointer(&obj);
 	execbuf.buffer_count = 1;
-	execbuf.flags = ring_id;
+	execbuf.flags = e->flags;
 	execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT;
 	execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC;
 	if (__gem_execbuf(fd, &execbuf)) {
-		execbuf.flags = ring_id;
+		execbuf.flags = e->flags;
 		gem_execbuf(fd, &execbuf);
 	}
 	execbuf.rsvd1 = ctx[1];
@@ -825,7 +833,7 @@ static void preempt(int fd, uint32_t handle,
 		igt_spin_t *spin =
 			__igt_spin_new(fd,
 				       .ctx = ctx[0],
-				       .engine = ring_id);
+				       .engine = e->flags);
 
 		for (int loop = 0; loop < 1024; loop++)
 			gem_execbuf(fd, &execbuf);
@@ -846,7 +854,7 @@ static void preempt(int fd, uint32_t handle,
 
 igt_main
 {
-	const struct intel_execution_engine *e;
+	const struct intel_execution_engine2 *e;
 	uint32_t handle = 0;
 	int device = -1;
 
@@ -873,15 +881,15 @@ igt_main
 	igt_subtest("basic-sequential")
 		sequential(device, handle, 0, 5);
 
-	for (e = intel_execution_engines; e->name; e++) {
+	__for_each_physical_engine(device, e) {
 		igt_subtest_f("%s", e->name)
-			single(device, handle, e->exec_id | e->flags, e->name);
+			single(device, handle, e, e->name);
 		igt_subtest_f("signal-%s", e->name)
-			fence_signal(device, handle, e->exec_id | e->flags, e->name, 5);
+			fence_signal(device, handle, e, e->name, 5);
 	}
 
 	igt_subtest("signal-all")
-		fence_signal(device, handle, ALL_ENGINES, "all", 150);
+		fence_signal(device, handle, NULL, "all", 150);
 
 	igt_subtest("series")
 		series(device, handle, 150);
@@ -908,9 +916,9 @@ igt_main
 			igt_require(gem_scheduler_has_preemption(device));
 		}
 
-		for (e = intel_execution_engines; e->name; e++) {
+		__for_each_physical_engine(device, e) {
 			igt_subtest_f("preempt-%s", e->name)
-				preempt(device, handle, e->exec_id | e->flags, e->name);
+				preempt(device, handle, e, e->name);
 		}
 	}
 
@@ -919,11 +927,10 @@ igt_main
 			igt_device_set_master(device);
 		}
 
-		for (e = intel_execution_engines; e->name; e++) {
+		__for_each_physical_engine(device, e) {
 			/* Requires master for STORE_DWORD on gen4/5 */
 			igt_subtest_f("poll-%s", e->name)
-				poll_ring(device,
-					  e->exec_id | e->flags, e->name, 20);
+				poll_ring(device, e, e->name, 20);
 		}
 
 		igt_subtest("poll-sequential")
-- 
2.19.1

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https://lists.freedesktop.org/mailman/listinfo/igt-dev

[igt-dev] [RFC v2 24/43] tests/i915/gem_exec_reloc: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_exec_reloc.c | 27 ++++++++++++++-------------
 1 file changed, 14 insertions(+), 13 deletions(-)

diff --git a/tests/i915/gem_exec_reloc.c b/tests/i915/gem_exec_reloc.c
index fdd9661d15ad..541279ef5243 100644
--- a/tests/i915/gem_exec_reloc.c
+++ b/tests/i915/gem_exec_reloc.c
@@ -246,7 +246,7 @@ static void check_bo(int fd, uint32_t handle)
 	munmap(map, 4096);
 }
 
-static void active(int fd, unsigned engine)
+static void active(int fd, const struct intel_execution_engine2 *e)
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
 	struct drm_i915_gem_relocation_entry reloc;
@@ -257,15 +257,15 @@ static void active(int fd, unsigned engine)
 	int pass;
 
 	nengine = 0;
-	if (engine == ALL_ENGINES) {
-		for_each_physical_engine(fd, engine) {
-			if (gem_can_store_dword(fd, engine))
-				engines[nengine++] = engine;
+	if (!e) {
+		__for_each_physical_engine(fd, e) {
+			if (gem_class_can_store_dword(fd, e->class))
+				engines[nengine++] = e->flags;
 		}
 	} else {
-		igt_require(gem_has_ring(fd, engine));
-		igt_require(gem_can_store_dword(fd, engine));
-		engines[nengine++] = engine;
+		igt_require(gem_has_ring(fd, e->flags));
+		igt_require(gem_class_can_store_dword(fd, e->class));
+		engines[nengine++] = e->flags;
 	}
 	igt_require(nengine);
 
@@ -654,6 +654,7 @@ static void basic_softpin(int fd)
 
 igt_main
 {
+	const struct intel_execution_engine2 *e;
 	const struct mode {
 		const char *name;
 		unsigned before, after;
@@ -750,12 +751,12 @@ igt_main
 		from_gpu(fd);
 
 	igt_subtest("active")
-		active(fd, ALL_ENGINES);
-	for (const struct intel_execution_engine *e = intel_execution_engines;
-	     e->name; e++) {
+		active(fd, NULL);
+
+	__for_each_physical_engine(fd, e)
 		igt_subtest_f("active-%s", e->name)
-			active(fd, e->exec_id | e->flags);
-	}
+			active(fd, e);
+
 	igt_fixture
 		close(fd);
 }
-- 
2.19.1

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[igt-dev] [RFC v2 25/43] tests/i915/gem_exec_schedule: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_exec_schedule.c | 354 ++++++++++++++++-----------------
 1 file changed, 177 insertions(+), 177 deletions(-)

diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/gem_exec_schedule.c
index 7b4186228f09..21b0d93559e0 100644
--- a/tests/i915/gem_exec_schedule.c
+++ b/tests/i915/gem_exec_schedule.c
@@ -83,7 +83,8 @@ void __sync_read_u32_count(int fd, uint32_t handle, uint32_t *dst, uint64_t size
 	gem_read(fd, handle, 0, dst, size);
 }
 
-static uint32_t __store_dword(int fd, uint32_t ctx, unsigned ring,
+static uint32_t __store_dword(int fd, uint32_t ctx,
+			      const struct intel_execution_engine2 *e,
 			      uint32_t target, uint32_t offset, uint32_t value,
 			      uint32_t cork, unsigned write_domain)
 {
@@ -97,7 +98,7 @@ static uint32_t __store_dword(int fd, uint32_t ctx, unsigned ring,
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = to_user_pointer(obj + !cork);
 	execbuf.buffer_count = 2 + !!cork;
-	execbuf.flags = ring;
+	execbuf.flags = e->flags;
 	if (gen < 6)
 		execbuf.flags |= I915_EXEC_SECURE;
 	execbuf.rsvd1 = ctx;
@@ -138,11 +139,12 @@ static uint32_t __store_dword(int fd, uint32_t ctx, unsigned ring,
 	return obj[2].handle;
 }
 
-static void store_dword(int fd, uint32_t ctx, unsigned ring,
+static void store_dword(int fd, uint32_t ctx,
+			const struct intel_execution_engine2 *e,
 			uint32_t target, uint32_t offset, uint32_t value,
 			uint32_t cork, unsigned write_domain)
 {
-	gem_close(fd, __store_dword(fd, ctx, ring,
+	gem_close(fd, __store_dword(fd, ctx, e,
 				    target, offset, value,
 				    cork, write_domain));
 }
@@ -161,14 +163,15 @@ static uint32_t create_highest_priority(int fd)
 	return ctx;
 }
 
-static void unplug_show_queue(int fd, struct igt_cork *c, unsigned int engine)
+static void unplug_show_queue(int fd, struct igt_cork *c,
+			      const struct intel_execution_engine2 *e)
 {
 	igt_spin_t *spin[MAX_ELSP_QLEN];
 
 	for (int n = 0; n < ARRAY_SIZE(spin); n++) {
 		const struct igt_spin_factory opts = {
 			.ctx = create_highest_priority(fd),
-			.engine = engine,
+			.engine = e->flags,
 		};
 		spin[n] = __igt_spin_factory(fd, &opts);
 		gem_context_destroy(fd, opts.ctx);
@@ -182,7 +185,7 @@ static void unplug_show_queue(int fd, struct igt_cork *c, unsigned int engine)
 
 }
 
-static void fifo(int fd, unsigned ring)
+static void fifo(int fd, const struct intel_execution_engine2 *e)
 {
 	IGT_CORK_HANDLE(cork);
 	uint32_t scratch, plug;
@@ -193,10 +196,10 @@ static void fifo(int fd, unsigned ring)
 	plug = igt_cork_plug(&cork, fd);
 
 	/* Same priority, same timeline, final result will be the second eb */
-	store_dword(fd, 0, ring, scratch, 0, 1, plug, 0);
-	store_dword(fd, 0, ring, scratch, 0, 2, plug, 0);
+	store_dword(fd, 0, e, scratch, 0, 1, plug, 0);
+	store_dword(fd, 0, e, scratch, 0, 2, plug, 0);
 
-	unplug_show_queue(fd, &cork, ring);
+	unplug_show_queue(fd, &cork, e);
 	gem_close(fd, plug);
 
 	result =  __sync_read_u32(fd, scratch, 0);
@@ -205,15 +208,15 @@ static void fifo(int fd, unsigned ring)
 	igt_assert_eq_u32(result, 2);
 }
 
-static void independent(int fd, unsigned int engine)
+static void independent(int fd, const struct intel_execution_engine2 *e)
 {
 	IGT_CORK_HANDLE(cork);
 	uint32_t scratch, plug, batch;
 	igt_spin_t *spin = NULL;
-	unsigned int other;
+	const struct intel_execution_engine2 *other;
 	uint32_t *ptr;
 
-	igt_require(engine != 0);
+	igt_require(e);
 
 	scratch = gem_create(fd, 4096);
 	ptr = gem_mmap__gtt(fd, scratch, 4096, PROT_READ);
@@ -222,32 +225,32 @@ static void independent(int fd, unsigned int engine)
 	plug = igt_cork_plug(&cork, fd);
 
 	/* Check that we can submit to engine while all others are blocked */
-	for_each_physical_engine(fd, other) {
-		if (other == engine)
+	__for_each_physical_engine(fd, other) {
+		if (other == e)
 			continue;
 
-		if (!gem_can_store_dword(fd, other))
+		if (!gem_class_can_store_dword(fd, other->class))
 			continue;
 
 		if (spin == NULL) {
-			spin = __igt_spin_new(fd, .engine = other);
+			spin = __igt_spin_new(fd, .engine = other->flags);
 		} else {
 			struct drm_i915_gem_execbuffer2 eb = {
 				.buffer_count = 1,
 				.buffers_ptr = to_user_pointer(&spin->obj[IGT_SPIN_BATCH]),
-				.flags = other,
+				.flags = other->flags,
 			};
 			gem_execbuf(fd, &eb);
 		}
 
-		store_dword(fd, 0, other, scratch, 0, other, plug, 0);
+		store_dword(fd, 0, other, scratch, 0, other->flags, plug, 0);
 	}
 	igt_require(spin);
 
 	/* Same priority, but different timeline (as different engine) */
-	batch = __store_dword(fd, 0, engine, scratch, 0, engine, plug, 0);
+	batch = __store_dword(fd, 0, e, scratch, 0, e->flags, plug, 0);
 
-	unplug_show_queue(fd, &cork, engine);
+	unplug_show_queue(fd, &cork, e);
 	gem_close(fd, plug);
 
 	gem_sync(fd, batch);
@@ -257,34 +260,35 @@ static void independent(int fd, unsigned int engine)
 
 	/* Only the local engine should be free to complete. */
 	igt_assert(gem_bo_busy(fd, scratch));
-	igt_assert_eq(ptr[0], engine);
+	igt_assert_eq(ptr[0], e->flags);
 
 	igt_spin_free(fd, spin);
 	gem_quiescent_gpu(fd);
 
 	/* And we expect the others to have overwritten us, order unspecified */
 	igt_assert(!gem_bo_busy(fd, scratch));
-	igt_assert_neq(ptr[0], engine);
+	igt_assert_neq(ptr[0], e->flags);
 
 	munmap(ptr, 4096);
 	gem_close(fd, scratch);
 }
 
-static void smoketest(int fd, unsigned ring, unsigned timeout)
+static void smoketest(int fd, const struct intel_execution_engine2 *e,
+		      unsigned timeout)
 {
 	const int ncpus = sysconf(_SC_NPROCESSORS_ONLN);
-	unsigned engines[MAX_ENGINES];
+	const struct intel_execution_engine2 *engines[MAX_ENGINES];
 	unsigned nengine;
-	unsigned engine;
+	const struct intel_execution_engine2 *other;
 	uint32_t scratch;
 	uint32_t result[2 * ncpus];
 
 	nengine = 0;
-	if (ring == ALL_ENGINES) {
-		for_each_physical_engine(fd, engine)
-			engines[nengine++] = engine;
+	if (!e) {
+		__for_each_physical_engine(fd, other)
+			engines[nengine++] = other;
 	} else {
-		engines[nengine++] = ring;
+		engines[nengine++] = e;
 	}
 	igt_require(nengine);
 
@@ -302,12 +306,12 @@ static void smoketest(int fd, unsigned ring, unsigned timeout)
 			prio = hars_petruska_f54_1_random_unsafe_max(MAX_PRIO - MIN_PRIO) + MIN_PRIO;
 			gem_context_set_priority(fd, ctx, prio);
 
-			engine = engines[hars_petruska_f54_1_random_unsafe_max(nengine)];
-			store_dword(fd, ctx, engine, scratch,
+			other = engines[hars_petruska_f54_1_random_unsafe_max(nengine)];
+			store_dword(fd, ctx, other, scratch,
 				    8*child + 0, ~child,
 				    0, 0);
 			for (unsigned int step = 0; step < 8; step++)
-				store_dword(fd, ctx, engine, scratch,
+				store_dword(fd, ctx, other, scratch,
 					    8*child + 4, count++,
 					    0, 0);
 		}
@@ -352,7 +356,7 @@ static void semaphore_userlock(int i915)
 		.handle = batch_create(i915),
 	};
 	igt_spin_t *spin = NULL;
-	unsigned int engine;
+	const struct intel_execution_engine2 *e;
 	uint32_t scratch;
 
 	igt_require(gem_scheduler_has_semaphores(i915));
@@ -365,16 +369,16 @@ static void semaphore_userlock(int i915)
 	 */
 
 	scratch = gem_create(i915, 4096);
-	for_each_physical_engine(i915, engine) {
+	__for_each_physical_engine(i915, e) {
 		if (!spin) {
 			spin = igt_spin_new(i915,
 					    .dependency = scratch,
-					    .engine = engine);
+					    .engine = e->flags);
 		} else {
 			uint64_t saved = spin->execbuf.flags;
 
 			spin->execbuf.flags &= ~ENGINE_MASK;
-			spin->execbuf.flags |= engine;
+			spin->execbuf.flags |= e->flags;
 
 			gem_execbuf(i915, &spin->execbuf);
 
@@ -390,15 +394,15 @@ static void semaphore_userlock(int i915)
 	 * taking precedence.
 	 */
 	scratch = gem_context_create(i915);
-	for_each_physical_engine(i915, engine) {
+	__for_each_physical_engine(i915, e) {
 		struct drm_i915_gem_execbuffer2 execbuf = {
 			.buffers_ptr = to_user_pointer(&obj),
 			.buffer_count = 1,
-			.flags = engine,
+			.flags = e->flags,
 			.rsvd1 = scratch,
 		};
 
-		if (engine == (spin->execbuf.flags & ENGINE_MASK))
+		if (e->flags == (spin->execbuf.flags & ENGINE_MASK))
 			continue;
 
 		gem_execbuf(i915, &execbuf);
@@ -415,7 +419,7 @@ static void semaphore_codependency(int i915)
 	struct {
 		igt_spin_t *xcs, *rcs;
 	} task[2];
-	unsigned int engine;
+	const struct intel_execution_engine2 *e, *other;
 	int i;
 
 	/*
@@ -429,13 +433,13 @@ static void semaphore_codependency(int i915)
 	 */
 
 	i = 0;
-	for_each_physical_engine(i915, engine) {
+	__for_each_physical_engine(i915, e) {
 		uint32_t ctx;
 
-		if (engine == I915_EXEC_RENDER)
+		if (e->class == I915_ENGINE_CLASS_RENDER)
 			continue;
 
-		if (!gem_can_store_dword(i915, engine))
+		if (!gem_class_can_store_dword(i915, e->class))
 			continue;
 
 		ctx = gem_context_create(i915);
@@ -443,16 +447,19 @@ static void semaphore_codependency(int i915)
 		task[i].xcs =
 			__igt_spin_new(i915,
 				       .ctx = ctx,
-				       .engine = engine,
+				       .engine = e->flags,
 				       .flags = IGT_SPIN_POLL_RUN);
 		igt_spin_busywait_until_started(task[i].xcs);
 
-		/* Common rcs tasks will be queued in FIFO */
-		task[i].rcs =
-			__igt_spin_new(i915,
-				       .ctx = ctx,
-				       .engine = I915_EXEC_RENDER,
-				       .dependency = task[i].xcs->handle);
+		__for_each_physical_engine(i915, other) {
+			if (other->class == I915_ENGINE_CLASS_RENDER)
+				/* Common rcs tasks will be queued in FIFO */
+				task[i].rcs =
+					__igt_spin_new(i915,
+					       .ctx = ctx,
+					       .engine = other->flags, 
+					       .dependency = task[i].xcs->handle);
+		}
 
 		gem_context_destroy(i915, ctx);
 
@@ -481,7 +488,7 @@ static void semaphore_resolve(int i915)
 {
 	const uint32_t SEMAPHORE_ADDR = 64 << 10;
 	uint32_t semaphore, outer, inner, *sema;
-	unsigned int engine;
+	const struct intel_execution_engine2 *e;
 
 	/*
 	 * Userspace may submit batches that wait upon unresolved
@@ -501,7 +508,7 @@ static void semaphore_resolve(int i915)
 	semaphore = gem_create(i915, 4096);
 	sema = gem_mmap__wc(i915, semaphore, 0, 4096, PROT_WRITE);
 
-	for_each_physical_engine(i915, engine) {
+	__for_each_physical_engine(i915, e) {
 		struct drm_i915_gem_exec_object2 obj[3];
 		struct drm_i915_gem_execbuffer2 eb;
 		uint32_t handle, cancel;
@@ -509,10 +516,10 @@ static void semaphore_resolve(int i915)
 		igt_spin_t *spin;
 		int64_t poke = 1;
 
-		if (!gem_can_store_dword(i915, engine))
+		if (!gem_class_can_store_dword(i915, e->class))
 			continue;
 
-		spin = __igt_spin_new(i915, .engine = engine);
+		spin = __igt_spin_new(i915, .engine = e->flags);
 		igt_spin_end(spin); /* we just want its address for later */
 		gem_sync(i915, spin->handle);
 		igt_spin_reset(spin);
@@ -609,26 +616,26 @@ static void semaphore_resolve(int i915)
 static void semaphore_noskip(int i915)
 {
 	const int gen = intel_gen(intel_get_drm_devid(i915));
-	unsigned int engine, other;
+	const struct intel_execution_engine2 *engine, *other;
 	uint32_t ctx;
 
 	igt_require(gen >= 6); /* MI_STORE_DWORD_IMM convenience */
 
 	ctx = gem_context_create(i915);
 
-	for_each_physical_engine(i915, engine) {
-	for_each_physical_engine(i915, other) {
+	__for_each_physical_engine(i915, engine) {
+	__for_each_physical_engine(i915, other) {
 		struct drm_i915_gem_exec_object2 obj[3];
 		struct drm_i915_gem_execbuffer2 eb;
 		uint32_t handle, *cs, *map;
 		igt_spin_t *chain, *spin;
 
-		if (other == engine || !gem_can_store_dword(i915, other))
+		if (other == engine || !gem_class_can_store_dword(i915, other->class))
 			continue;
 
-		chain = __igt_spin_new(i915, .engine = engine);
+		chain = __igt_spin_new(i915, .engine = engine->flags);
 
-		spin = __igt_spin_new(i915, .engine = other);
+		spin = __igt_spin_new(i915, .engine = other->flags);
 		igt_spin_end(spin); /* we just want its address for later */
 		gem_sync(i915, spin->handle);
 		igt_spin_reset(spin);
@@ -662,7 +669,7 @@ static void semaphore_noskip(int i915)
 		eb.buffer_count = 3;
 		eb.buffers_ptr = to_user_pointer(obj);
 		eb.rsvd1 = ctx;
-		eb.flags = other;
+		eb.flags = other->flags;
 		gem_execbuf(i915, &eb);
 
 		/* port1: dependency chain from port0 */
@@ -673,7 +680,7 @@ static void semaphore_noskip(int i915)
 		memset(&eb, 0, sizeof(eb));
 		eb.buffer_count = 2;
 		eb.buffers_ptr = to_user_pointer(obj);
-		eb.flags = other;
+		eb.flags = other->flags;
 		gem_execbuf(i915, &eb);
 
 		igt_spin_set_timeout(chain, NSEC_PER_SEC / 100);
@@ -688,7 +695,8 @@ static void semaphore_noskip(int i915)
 	gem_context_destroy(i915, ctx);
 }
 
-static void reorder(int fd, unsigned ring, unsigned flags)
+static void reorder(int fd, const struct intel_execution_engine2 *e,
+		    unsigned flags)
 #define EQUAL 1
 {
 	IGT_CORK_HANDLE(cork);
@@ -708,10 +716,10 @@ static void reorder(int fd, unsigned ring, unsigned flags)
 	/* We expect the high priority context to be executed first, and
 	 * so the final result will be value from the low priority context.
 	 */
-	store_dword(fd, ctx[LO], ring, scratch, 0, ctx[LO], plug, 0);
-	store_dword(fd, ctx[HI], ring, scratch, 0, ctx[HI], plug, 0);
+	store_dword(fd, ctx[LO], e, scratch, 0, ctx[LO], plug, 0);
+	store_dword(fd, ctx[HI], e, scratch, 0, ctx[HI], plug, 0);
 
-	unplug_show_queue(fd, &cork, ring);
+	unplug_show_queue(fd, &cork, e);
 	gem_close(fd, plug);
 
 	gem_context_destroy(fd, ctx[LO]);
@@ -726,7 +734,7 @@ static void reorder(int fd, unsigned ring, unsigned flags)
 		igt_assert_eq_u32(result, ctx[LO]);
 }
 
-static void promotion(int fd, unsigned ring)
+static void promotion(int fd, const struct intel_execution_engine2 *e)
 {
 	IGT_CORK_HANDLE(cork);
 	uint32_t result, dep;
@@ -753,16 +761,16 @@ static void promotion(int fd, unsigned ring)
 	 * fifo would be NOISE, LO, HI.
 	 * strict priority would be  HI, NOISE, LO
 	 */
-	store_dword(fd, ctx[NOISE], ring, result, 0, ctx[NOISE], plug, 0);
-	store_dword(fd, ctx[LO], ring, result, 0, ctx[LO], plug, 0);
+	store_dword(fd, ctx[NOISE], e, result, 0, ctx[NOISE], plug, 0);
+	store_dword(fd, ctx[LO], e, result, 0, ctx[LO], plug, 0);
 
 	/* link LO <-> HI via a dependency on another buffer */
-	store_dword(fd, ctx[LO], ring, dep, 0, ctx[LO], 0, I915_GEM_DOMAIN_INSTRUCTION);
-	store_dword(fd, ctx[HI], ring, dep, 0, ctx[HI], 0, 0);
+	store_dword(fd, ctx[LO], e, dep, 0, ctx[LO], 0, I915_GEM_DOMAIN_INSTRUCTION);
+	store_dword(fd, ctx[HI], e, dep, 0, ctx[HI], 0, 0);
 
-	store_dword(fd, ctx[HI], ring, result, 0, ctx[HI], 0, 0);
+	store_dword(fd, ctx[HI], e, result, 0, ctx[HI], 0, 0);
 
-	unplug_show_queue(fd, &cork, ring);
+	unplug_show_queue(fd, &cork, e);
 	gem_close(fd, plug);
 
 	gem_context_destroy(fd, ctx[NOISE]);
@@ -781,7 +789,8 @@ static void promotion(int fd, unsigned ring)
 
 #define NEW_CTX (0x1 << 0)
 #define HANG_LP (0x1 << 1)
-static void preempt(int fd, unsigned ring, unsigned flags)
+static void preempt(int fd, const struct intel_execution_engine2 *e,
+		    unsigned flags)
 {
 	uint32_t result = gem_create(fd, 4096);
 	uint32_t result_read;
@@ -796,7 +805,7 @@ static void preempt(int fd, unsigned ring, unsigned flags)
 	gem_context_set_priority(fd, ctx[HI], MAX_PRIO);
 
 	if (flags & HANG_LP)
-		hang = igt_hang_ctx(fd, ctx[LO], ring, 0);
+		hang = igt_hang_ctx(fd, ctx[LO], e->flags, 0);
 
 	for (int n = 0; n < ARRAY_SIZE(spin); n++) {
 		if (flags & NEW_CTX) {
@@ -806,10 +815,10 @@ static void preempt(int fd, unsigned ring, unsigned flags)
 		}
 		spin[n] = __igt_spin_new(fd,
 					 .ctx = ctx[LO],
-					 .engine = ring);
+					 .engine = e->flags);
 		igt_debug("spin[%d].handle=%d\n", n, spin[n]->handle);
 
-		store_dword(fd, ctx[HI], ring, result, 0, n + 1, 0, I915_GEM_DOMAIN_RENDER);
+		store_dword(fd, ctx[HI], e, result, 0, n + 1, 0, I915_GEM_DOMAIN_RENDER);
 
 		result_read = __sync_read_u32(fd, result, 0);
 		igt_assert_eq_u32(result_read, n + 1);
@@ -833,21 +842,21 @@ static void preempt(int fd, unsigned ring, unsigned flags)
 
 static igt_spin_t *__noise(int fd, uint32_t ctx, int prio, igt_spin_t *spin)
 {
-	unsigned other;
+	const struct intel_execution_engine2 *other;
 
 	gem_context_set_priority(fd, ctx, prio);
 
-	for_each_physical_engine(fd, other) {
+	__for_each_physical_engine(fd, other) {
 		if (spin == NULL) {
 			spin = __igt_spin_new(fd,
 					      .ctx = ctx,
-					      .engine = other);
+					      .engine = other->flags);
 		} else {
 			struct drm_i915_gem_execbuffer2 eb = {
 				.buffer_count = 1,
 				.buffers_ptr = to_user_pointer(&spin->obj[IGT_SPIN_BATCH]),
 				.rsvd1 = ctx,
-				.flags = other,
+				.flags = other->flags,
 			};
 			gem_execbuf(fd, &eb);
 		}
@@ -858,21 +867,23 @@ static igt_spin_t *__noise(int fd, uint32_t ctx, int prio, igt_spin_t *spin)
 
 static void __preempt_other(int fd,
 			    uint32_t *ctx,
-			    unsigned int target, unsigned int primary,
+			    const struct intel_execution_engine2 *target_e,
+			    const struct intel_execution_engine2 *primary_e,
 			    unsigned flags)
 {
 	uint32_t result = gem_create(fd, 4096);
 	uint32_t result_read[4096 / sizeof(uint32_t)];
-	unsigned int n, i, other;
+	unsigned int n, i;
+	const struct intel_execution_engine2 *other;
 
 	n = 0;
-	store_dword(fd, ctx[LO], primary,
+	store_dword(fd, ctx[LO], primary_e,
 		    result, (n + 1)*sizeof(uint32_t), n + 1,
 		    0, I915_GEM_DOMAIN_RENDER);
 	n++;
 
 	if (flags & CHAIN) {
-		for_each_physical_engine(fd, other) {
+		__for_each_physical_engine(fd, other) {
 			store_dword(fd, ctx[LO], other,
 				    result, (n + 1)*sizeof(uint32_t), n + 1,
 				    0, I915_GEM_DOMAIN_RENDER);
@@ -880,7 +891,7 @@ static void __preempt_other(int fd,
 		}
 	}
 
-	store_dword(fd, ctx[HI], target,
+	store_dword(fd, ctx[HI], target_e,
 		    result, (n + 1)*sizeof(uint32_t), n + 1,
 		    0, I915_GEM_DOMAIN_RENDER);
 
@@ -896,9 +907,10 @@ static void __preempt_other(int fd,
 	gem_close(fd, result);
 }
 
-static void preempt_other(int fd, unsigned ring, unsigned int flags)
+static void preempt_other(int fd, const struct intel_execution_engine2 *e,
+			  unsigned int flags)
 {
-	unsigned int primary;
+	const struct intel_execution_engine2 *primary;
 	igt_spin_t *spin = NULL;
 	uint32_t ctx[3];
 
@@ -921,10 +933,9 @@ static void preempt_other(int fd, unsigned ring, unsigned int flags)
 	ctx[HI] = gem_context_create(fd);
 	gem_context_set_priority(fd, ctx[HI], MAX_PRIO);
 
-	for_each_physical_engine(fd, primary) {
-		igt_debug("Primary engine: %s\n", e__->name);
-		__preempt_other(fd, ctx, ring, primary, flags);
-
+	__for_each_physical_engine(fd, primary) {
+		igt_debug("Primary engine: %s\n", e->name);
+		__preempt_other(fd, ctx, e, primary, flags);
 	}
 
 	igt_assert(gem_bo_busy(fd, spin->handle));
@@ -936,13 +947,15 @@ static void preempt_other(int fd, unsigned ring, unsigned int flags)
 }
 
 static void __preempt_queue(int fd,
-			    unsigned target, unsigned primary,
+			    const struct intel_execution_engine2 *target_e,
+			    const struct intel_execution_engine2 *primary_e,
 			    unsigned depth, unsigned flags)
 {
 	uint32_t result = gem_create(fd, 4096);
 	uint32_t result_read[4096 / sizeof(uint32_t)];
 	igt_spin_t *above = NULL, *below = NULL;
-	unsigned int other, n, i;
+	unsigned int n, i;
+	const struct intel_execution_engine2 *other;
 	int prio = MAX_PRIO;
 	uint32_t ctx[3] = {
 		gem_context_create(fd),
@@ -971,13 +984,13 @@ static void __preempt_queue(int fd,
 	gem_context_set_priority(fd, ctx[LO], prio--);
 
 	n = 0;
-	store_dword(fd, ctx[LO], primary,
+	store_dword(fd, ctx[LO], primary_e,
 		    result, (n + 1)*sizeof(uint32_t), n + 1,
 		    0, I915_GEM_DOMAIN_RENDER);
 	n++;
 
 	if (flags & CHAIN) {
-		for_each_physical_engine(fd, other) {
+		__for_each_physical_engine(fd, other) {
 			store_dword(fd, ctx[LO], other,
 				    result, (n + 1)*sizeof(uint32_t), n + 1,
 				    0, I915_GEM_DOMAIN_RENDER);
@@ -985,7 +998,7 @@ static void __preempt_queue(int fd,
 		}
 	}
 
-	store_dword(fd, ctx[HI], target,
+	store_dword(fd, ctx[HI], target_e,
 		    result, (n + 1)*sizeof(uint32_t), n + 1,
 		    0, I915_GEM_DOMAIN_RENDER);
 
@@ -1016,22 +1029,23 @@ static void __preempt_queue(int fd,
 	gem_close(fd, result);
 }
 
-static void preempt_queue(int fd, unsigned ring, unsigned int flags)
+static void preempt_queue(int fd, const struct intel_execution_engine2 *e,
+			  unsigned int flags)
 {
-	unsigned other;
+	const struct intel_execution_engine2 *other;
 
-	for_each_physical_engine(fd, other) {
+	__for_each_physical_engine(fd, other) {
 		for (unsigned depth = 0; depth <= MAX_ELSP_QLEN; depth++)
-			__preempt_queue(fd, ring, other, depth, flags);
+			__preempt_queue(fd, e, other, depth, flags);
 	}
 }
 
-static void preempt_self(int fd, unsigned ring)
+static void preempt_self(int fd, const struct intel_execution_engine2 *e)
 {
 	uint32_t result = gem_create(fd, 4096);
 	uint32_t result_read[4096 / sizeof(uint32_t)];
 	igt_spin_t *spin[MAX_ELSP_QLEN];
-	unsigned int other;
+	const struct intel_execution_engine2 *other;
 	unsigned int n, i;
 	uint32_t ctx[3];
 
@@ -1049,17 +1063,17 @@ static void preempt_self(int fd, unsigned ring)
 
 	n = 0;
 	gem_context_set_priority(fd, ctx[HI], MIN_PRIO);
-	for_each_physical_engine(fd, other) {
+	__for_each_physical_engine(fd, other) {
 		spin[n] = __igt_spin_new(fd,
 					 .ctx = ctx[NOISE],
-					 .engine = other);
+					 .engine = other->flags);
 		store_dword(fd, ctx[HI], other,
 			    result, (n + 1)*sizeof(uint32_t), n + 1,
 			    0, I915_GEM_DOMAIN_RENDER);
 		n++;
 	}
 	gem_context_set_priority(fd, ctx[HI], MAX_PRIO);
-	store_dword(fd, ctx[HI], ring,
+	store_dword(fd, ctx[HI], e,
 		    result, (n + 1)*sizeof(uint32_t), n + 1,
 		    0, I915_GEM_DOMAIN_RENDER);
 
@@ -1082,7 +1096,7 @@ static void preempt_self(int fd, unsigned ring)
 	gem_close(fd, result);
 }
 
-static void preemptive_hang(int fd, unsigned ring)
+static void preemptive_hang(int fd, const struct intel_execution_engine2 *e)
 {
 	igt_spin_t *spin[MAX_ELSP_QLEN];
 	igt_hang_t hang;
@@ -1097,12 +1111,12 @@ static void preemptive_hang(int fd, unsigned ring)
 
 		spin[n] = __igt_spin_new(fd,
 					 .ctx = ctx[LO],
-					 .engine = ring);
+					 .engine = e->flags);
 
 		gem_context_destroy(fd, ctx[LO]);
 	}
 
-	hang = igt_hang_ctx(fd, ctx[HI], ring, 0);
+	hang = igt_hang_ctx(fd, ctx[HI], e->flags, 0);
 	igt_post_hang_ring(fd, hang);
 
 	for (int n = 0; n < ARRAY_SIZE(spin); n++) {
@@ -1117,7 +1131,7 @@ static void preemptive_hang(int fd, unsigned ring)
 	gem_context_destroy(fd, ctx[HI]);
 }
 
-static void deep(int fd, unsigned ring)
+static void deep(int fd, const struct intel_execution_engine2 *e)
 {
 #define XS 8
 	const unsigned int max_req = MAX_PRIO - MIN_PRIO;
@@ -1138,10 +1152,10 @@ static void deep(int fd, unsigned ring)
 		ctx[n] = gem_context_create(fd);
 	}
 
-	nreq = gem_measure_ring_inflight(fd, ring, 0) / (4 * XS) * MAX_CONTEXTS;
+	nreq = gem_measure_ring_inflight(fd, e->flags, 0) / (4 * XS) * MAX_CONTEXTS;
 	if (nreq > max_req)
 		nreq = max_req;
-	igt_info("Using %d requests (prio range %d)\n", nreq, max_req);
+		igt_info("Using %d requests (prio range %d)\n", nreq, max_req);
 
 	result = gem_create(fd, size);
 	for (int m = 0; m < XS; m ++)
@@ -1163,7 +1177,7 @@ static void deep(int fd, unsigned ring)
 		memset(&execbuf, 0, sizeof(execbuf));
 		execbuf.buffers_ptr = to_user_pointer(obj);
 		execbuf.buffer_count = XS + 2;
-		execbuf.flags = ring;
+		execbuf.flags = e->flags;
 		for (n = 0; n < MAX_CONTEXTS; n++) {
 			execbuf.rsvd1 = ctx[n];
 			gem_execbuf(fd, &execbuf);
@@ -1182,7 +1196,7 @@ static void deep(int fd, unsigned ring)
 		struct drm_i915_gem_execbuffer2 eb = {
 			.buffers_ptr = to_user_pointer(obj),
 			.buffer_count = 3,
-			.flags = ring | (gen < 6 ? I915_EXEC_SECURE : 0),
+			.flags = e->flags | (gen < 6 ? I915_EXEC_SECURE : 0),
 			.rsvd1 = ctx[n % MAX_CONTEXTS],
 		};
 		uint32_t batch[16];
@@ -1235,15 +1249,15 @@ static void deep(int fd, unsigned ring)
 		gem_context_set_priority(fd, context, MAX_PRIO - nreq + n);
 
 		for (int m = 0; m < XS; m++) {
-			store_dword(fd, context, ring, result, 4*n, context, dep[m], 0);
-			store_dword(fd, context, ring, result, 4*m, context, 0, I915_GEM_DOMAIN_INSTRUCTION);
+			store_dword(fd, context, e, result, 4*n, context, dep[m], 0);
+			store_dword(fd, context, e, result, 4*m, context, 0, I915_GEM_DOMAIN_INSTRUCTION);
 		}
 		expected = context;
 	}
 	igt_info("Second deptree: %d requests [%.3fs]\n",
 		 n * XS, 1e-9*igt_nsec_elapsed(&tv));
 
-	unplug_show_queue(fd, &cork, ring);
+	unplug_show_queue(fd, &cork, e);
 	gem_close(fd, plug);
 	igt_require(expected); /* too slow */
 
@@ -1281,10 +1295,10 @@ static int __execbuf(int fd, struct drm_i915_gem_execbuffer2 *execbuf)
 	return err;
 }
 
-static void wide(int fd, unsigned ring)
+static void wide(int fd, const struct intel_execution_engine2 *e)
 {
 	struct timespec tv = {};
-	unsigned int ring_size = gem_measure_ring_inflight(fd, ring, MEASURE_RING_NEW_CTX);
+	unsigned int ring_size = gem_measure_ring_inflight(fd, e->flags, MEASURE_RING_NEW_CTX);
 
 	IGT_CORK_HANDLE(cork);
 	uint32_t plug;
@@ -1306,13 +1320,13 @@ static void wide(int fd, unsigned ring)
 	     igt_seconds_elapsed(&tv) < 5 && count < ring_size;
 	     count++) {
 		for (int n = 0; n < MAX_CONTEXTS; n++) {
-			store_dword(fd, ctx[n], ring, result, 4*n, ctx[n], plug, I915_GEM_DOMAIN_INSTRUCTION);
+			store_dword(fd, ctx[n], e, result, 4*n, ctx[n], plug, I915_GEM_DOMAIN_INSTRUCTION);
 		}
 	}
 	igt_info("Submitted %d requests over %d contexts in %.1fms\n",
 		 count, MAX_CONTEXTS, igt_nsec_elapsed(&tv) * 1e-6);
 
-	unplug_show_queue(fd, &cork, ring);
+	unplug_show_queue(fd, &cork, e);
 	gem_close(fd, plug);
 
 	for (int n = 0; n < MAX_CONTEXTS; n++)
@@ -1326,14 +1340,14 @@ static void wide(int fd, unsigned ring)
 	free(ctx);
 }
 
-static void reorder_wide(int fd, unsigned ring)
+static void reorder_wide(int fd, const struct intel_execution_engine2 *e)
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
 	struct drm_i915_gem_relocation_entry reloc;
 	struct drm_i915_gem_exec_object2 obj[3];
 	struct drm_i915_gem_execbuffer2 execbuf;
 	struct timespec tv = {};
-	unsigned int ring_size = gem_measure_ring_inflight(fd, ring, MEASURE_RING_NEW_CTX);
+	unsigned int ring_size = gem_measure_ring_inflight(fd, e->flags, MEASURE_RING_NEW_CTX);
 	IGT_CORK_HANDLE(cork);
 	uint32_t result, target, plug;
 	uint32_t result_read[1024];
@@ -1360,7 +1374,7 @@ static void reorder_wide(int fd, unsigned ring)
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = to_user_pointer(obj);
 	execbuf.buffer_count = 3;
-	execbuf.flags = ring;
+	execbuf.flags = e->flags;
 	if (gen < 6)
 		execbuf.flags |= I915_EXEC_SECURE;
 
@@ -1414,7 +1428,7 @@ static void reorder_wide(int fd, unsigned ring)
 		gem_context_destroy(fd, execbuf.rsvd1);
 	}
 
-	unplug_show_queue(fd, &cork, ring);
+	unplug_show_queue(fd, &cork, e);
 	gem_close(fd, plug);
 
 	__sync_read_u32_count(fd, result, result_read, sizeof(result_read));
@@ -1440,7 +1454,7 @@ static void bind_to_cpu(int cpu)
 	igt_assert(sched_setaffinity(getpid(), sizeof(cpu_set_t), &allowed) == 0);
 }
 
-static void test_pi_ringfull(int fd, unsigned int engine)
+static void test_pi_ringfull(int fd, const struct intel_execution_engine2 *e)
 {
 	const uint32_t bbe = MI_BATCH_BUFFER_END;
 	struct sigaction sa = { .sa_handler = alarm_handler };
@@ -1463,7 +1477,7 @@ static void test_pi_ringfull(int fd, unsigned int engine)
 
 	execbuf.buffers_ptr = to_user_pointer(&obj[1]);
 	execbuf.buffer_count = 1;
-	execbuf.flags = engine;
+	execbuf.flags = e->flags;
 
 	/* Warm up both (hi/lo) contexts */
 	execbuf.rsvd1 = gem_context_create(fd);
@@ -1571,11 +1585,11 @@ static void test_pi_ringfull(int fd, unsigned int engine)
 static void measure_semaphore_power(int i915)
 {
 	struct gpu_power power;
-	unsigned int engine, signaler;
+	const struct intel_execution_engine2 *engine, *signaler;
 
 	igt_require(gpu_power_open(&power) == 0);
 
-	for_each_physical_engine(i915, signaler) {
+	__for_each_physical_engine(i915, signaler) {
 		struct gpu_power_sample s_spin[2];
 		struct gpu_power_sample s_sema[2];
 		double baseline, total;
@@ -1583,7 +1597,7 @@ static void measure_semaphore_power(int i915)
 		igt_spin_t *spin;
 
 		spin = __igt_spin_new(i915,
-				      .engine = signaler,
+				      .engine = signaler->flags,
 				      .flags = IGT_SPIN_POLL_RUN);
 		gem_wait(i915, spin->handle, &jiffie); /* waitboost */
 		igt_spin_busywait_until_started(spin);
@@ -1593,14 +1607,14 @@ static void measure_semaphore_power(int i915)
 		gpu_power_read(&power, &s_spin[1]);
 
 		/* Add a waiter to each engine */
-		for_each_physical_engine(i915, engine) {
+		__for_each_physical_engine(i915, engine) {
 			igt_spin_t *sema;
 
 			if (engine == signaler)
 				continue;
 
 			sema = __igt_spin_new(i915,
-					      .engine = engine,
+					      .engine = engine->flags,
 					      .dependency = spin->handle);
 
 			igt_spin_free(i915, sema);
@@ -1617,7 +1631,7 @@ static void measure_semaphore_power(int i915)
 		total = gpu_power_W(&power, &s_sema[0], &s_sema[1]);
 
 		igt_info("%s: %.1fmW + %.1fmW (total %1.fmW)\n",
-			 e__->name,
+			 engine->name,
 			 1e3 * baseline,
 			 1e3 * (total - baseline),
 			 1e3 * total);
@@ -1628,7 +1642,7 @@ static void measure_semaphore_power(int i915)
 
 igt_main
 {
-	const struct intel_execution_engine *e;
+	const struct intel_execution_engine2 *e;
 	int fd = -1;
 
 	igt_skip_on_simulation();
@@ -1646,21 +1660,15 @@ igt_main
 	}
 
 	igt_subtest_group {
-		for (e = intel_execution_engines; e->name; e++) {
-			/* default exec-id is purely symbolic */
-			if (e->exec_id == 0)
-				continue;
-
+		__for_each_physical_engine(fd, e) {
 			igt_subtest_f("fifo-%s", e->name) {
-				igt_require(gem_ring_has_physical_engine(fd, e->exec_id | e->flags));
-				igt_require(gem_can_store_dword(fd, e->exec_id | e->flags));
-				fifo(fd, e->exec_id | e->flags);
+				igt_require(gem_class_can_store_dword(fd, e->class));
+				fifo(fd, e);
 			}
 
 			igt_subtest_f("independent-%s", e->name) {
-				igt_require(gem_ring_has_physical_engine(fd, e->exec_id | e->flags));
-				igt_require(gem_can_store_dword(fd, e->exec_id | e->flags));
-				independent(fd, e->exec_id | e->flags);
+				igt_require(gem_class_can_store_dword(fd, e->class));
+				independent(fd, e);
 			}
 		}
 	}
@@ -1681,26 +1689,22 @@ igt_main
 			semaphore_noskip(fd);
 
 		igt_subtest("smoketest-all")
-			smoketest(fd, ALL_ENGINES, 30);
-
-		for (e = intel_execution_engines; e->name; e++) {
-			if (e->exec_id == 0)
-				continue;
+			smoketest(fd, NULL, 30);
 
+		__for_each_physical_engine(fd, e) {
 			igt_subtest_group {
 				igt_fixture {
-					igt_require(gem_ring_has_physical_engine(fd, e->exec_id | e->flags));
-					igt_require(gem_can_store_dword(fd, e->exec_id | e->flags));
+					igt_require(gem_class_can_store_dword(fd, e->class));
 				}
 
 				igt_subtest_f("in-order-%s", e->name)
-					reorder(fd, e->exec_id | e->flags, EQUAL);
+					reorder(fd, e, EQUAL);
 
 				igt_subtest_f("out-order-%s", e->name)
-					reorder(fd, e->exec_id | e->flags, 0);
+					reorder(fd, e, 0);
 
 				igt_subtest_f("promotion-%s", e->name)
-					promotion(fd, e->exec_id | e->flags);
+					promotion(fd, e);
 
 				igt_subtest_group {
 					igt_fixture {
@@ -1708,30 +1712,30 @@ igt_main
 					}
 
 					igt_subtest_f("preempt-%s", e->name)
-						preempt(fd, e->exec_id | e->flags, 0);
+						preempt(fd, e, 0);
 
 					igt_subtest_f("preempt-contexts-%s", e->name)
-						preempt(fd, e->exec_id | e->flags, NEW_CTX);
+						preempt(fd, e, NEW_CTX);
 
 					igt_subtest_f("preempt-self-%s", e->name)
-						preempt_self(fd, e->exec_id | e->flags);
+						preempt_self(fd, e);
 
 					igt_subtest_f("preempt-other-%s", e->name)
-						preempt_other(fd, e->exec_id | e->flags, 0);
+						preempt_other(fd, e, 0);
 
 					igt_subtest_f("preempt-other-chain-%s", e->name)
-						preempt_other(fd, e->exec_id | e->flags, CHAIN);
+						preempt_other(fd, e, CHAIN);
 
 					igt_subtest_f("preempt-queue-%s", e->name)
-						preempt_queue(fd, e->exec_id | e->flags, 0);
+						preempt_queue(fd, e, 0);
 
 					igt_subtest_f("preempt-queue-chain-%s", e->name)
-						preempt_queue(fd, e->exec_id | e->flags, CHAIN);
+						preempt_queue(fd, e, CHAIN);
 					igt_subtest_f("preempt-queue-contexts-%s", e->name)
-						preempt_queue(fd, e->exec_id | e->flags, CONTEXTS);
+						preempt_queue(fd, e, CONTEXTS);
 
 					igt_subtest_f("preempt-queue-contexts-chain-%s", e->name)
-						preempt_queue(fd, e->exec_id | e->flags, CONTEXTS | CHAIN);
+						preempt_queue(fd, e, CONTEXTS | CHAIN);
 
 					igt_subtest_group {
 						igt_hang_t hang;
@@ -1742,11 +1746,11 @@ igt_main
 						}
 
 						igt_subtest_f("preempt-hang-%s", e->name) {
-							preempt(fd, e->exec_id | e->flags, NEW_CTX | HANG_LP);
+							preempt(fd, e, NEW_CTX | HANG_LP);
 						}
 
 						igt_subtest_f("preemptive-hang-%s", e->name)
-							preemptive_hang(fd, e->exec_id | e->flags);
+							preemptive_hang(fd, e);
 
 						igt_fixture {
 							igt_disallow_hang(fd, hang);
@@ -1756,16 +1760,16 @@ igt_main
 				}
 
 				igt_subtest_f("deep-%s", e->name)
-					deep(fd, e->exec_id | e->flags);
+					deep(fd, e);
 
 				igt_subtest_f("wide-%s", e->name)
-					wide(fd, e->exec_id | e->flags);
+					wide(fd, e);
 
 				igt_subtest_f("reorder-wide-%s", e->name)
-					reorder_wide(fd, e->exec_id | e->flags);
+					reorder_wide(fd, e);
 
 				igt_subtest_f("smoketest-%s", e->name)
-					smoketest(fd, e->exec_id | e->flags, 5);
+					smoketest(fd, e, 5);
 			}
 		}
 	}
@@ -1779,18 +1783,14 @@ igt_main
 			igt_require(gem_has_execlists(fd));
 		}
 
-		for (e = intel_execution_engines; e->name; e++) {
-			if (e->exec_id == 0)
-				continue;
-
+		__for_each_physical_engine(fd, e) {
 			igt_subtest_group {
 				igt_fixture {
-					igt_require(gem_ring_has_physical_engine(fd, e->exec_id | e->flags));
 					igt_require(gem_scheduler_has_preemption(fd));
 				}
 
 				igt_subtest_f("pi-ringfull-%s", e->name)
-					test_pi_ringfull(fd, e->exec_id | e->flags);
+					test_pi_ringfull(fd, e);
 			}
 		}
 	}
-- 
2.19.1

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[igt-dev] [RFC v2 26/43] tests/i915/gem_exec_suspend: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_exec_suspend.c | 54 +++++++++++++++++------------------
 1 file changed, 27 insertions(+), 27 deletions(-)

diff --git a/tests/i915/gem_exec_suspend.c b/tests/i915/gem_exec_suspend.c
index e43a16e9ec5e..3238e307e217 100644
--- a/tests/i915/gem_exec_suspend.c
+++ b/tests/i915/gem_exec_suspend.c
@@ -47,7 +47,8 @@
 #define CACHED (1<<8)
 #define HANG (2<<8)
 
-static void run_test(int fd, unsigned ring, unsigned flags);
+static void run_test(int fd, const struct intel_execution_engine2 *e,
+		     unsigned flags);
 
 static void check_bo(int fd, uint32_t handle)
 {
@@ -64,10 +65,10 @@ static void check_bo(int fd, uint32_t handle)
 
 static void test_all(int fd, unsigned flags)
 {
-	unsigned engine;
+	const struct intel_execution_engine2 *engine;
 
-	for_each_physical_engine(fd, engine)
-		if (gem_can_store_dword(fd, engine))
+	__for_each_physical_engine(fd, engine)
+		if (gem_class_can_store_dword(fd, engine->class))
 			run_test(fd, engine, flags & ~0xff);
 }
 
@@ -86,7 +87,8 @@ static bool has_semaphores(int fd)
 	return val > 0;
 }
 
-static void run_test(int fd, unsigned engine, unsigned flags)
+static void run_test(int fd, const struct intel_execution_engine2 *e,
+		     unsigned flags)
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
 	const uint32_t bbe = MI_BATCH_BUFFER_END;
@@ -98,7 +100,7 @@ static void run_test(int fd, unsigned engine, unsigned flags)
 	igt_spin_t *spin = NULL;
 
 	nengine = 0;
-	if (engine == ALL_ENGINES) {
+	if (!e) {
 		/* If we don't have semaphores, then every ring switch
 		 * will result in a CPU stall until the previous write
 		 * has finished. This is likely to hide any issue with
@@ -106,19 +108,19 @@ static void run_test(int fd, unsigned engine, unsigned flags)
 		 * GPU is then unlikely to be active!)
 		 */
 		if (has_semaphores(fd)) {
-			for_each_physical_engine(fd, engine) {
-				if (gem_can_store_dword(fd, engine))
-					engines[nengine++] = engine;
+			__for_each_physical_engine(fd, e) {
+				if (gem_class_can_store_dword(fd, e->class))
+					engines[nengine++] = e->flags;
 			}
 		} else {
 			igt_require(gem_has_ring(fd, 0));
-			igt_require(gem_can_store_dword(fd, 0));
+			igt_require(gem_class_can_store_dword(fd, I915_ENGINE_CLASS_RENDER));
 			engines[nengine++] = 0;
 		}
 	} else {
-		igt_require(gem_has_ring(fd, engine));
-		igt_require(gem_can_store_dword(fd, engine));
-		engines[nengine++] = engine;
+		igt_require(gem_has_ring(fd, e->flags));
+		igt_require(gem_class_can_store_dword(fd, e->class));
+		engines[nengine++] = e->flags;
 	}
 	igt_require(nengine);
 
@@ -189,7 +191,7 @@ static void run_test(int fd, unsigned engine, unsigned flags)
 	}
 
 	if (flags & HANG)
-		spin = igt_spin_new(fd, .engine = engine);
+		spin = igt_spin_new(fd, .engine = e->flags);
 
 	switch (mode(flags)) {
 	case NOSLEEP:
@@ -239,7 +241,7 @@ igt_main
 		{ "-S4", HIBERNATE },
 		{ NULL, 0 }
 	}, *m;
-	const struct intel_execution_engine *e;
+	const struct intel_execution_engine2 *e;
 	igt_hang_t hang;
 	int fd;
 
@@ -254,24 +256,22 @@ igt_main
 	}
 
 	igt_subtest("basic")
-		run_test(fd, ALL_ENGINES, NOSLEEP);
+		run_test(fd, NULL, NOSLEEP);
 	igt_subtest("basic-S3-devices")
-		run_test(fd, ALL_ENGINES, SUSPEND_DEVICES);
+		run_test(fd, NULL, SUSPEND_DEVICES);
 	igt_subtest("basic-S3")
-		run_test(fd, ALL_ENGINES, SUSPEND);
+		run_test(fd, NULL, SUSPEND);
 	igt_subtest("basic-S4-devices")
-		run_test(fd, ALL_ENGINES, HIBERNATE_DEVICES);
+		run_test(fd, NULL, HIBERNATE_DEVICES);
 	igt_subtest("basic-S4")
-		run_test(fd, ALL_ENGINES, HIBERNATE);
+		run_test(fd, NULL, HIBERNATE);
 
-	for (e = intel_execution_engines; e->name; e++) {
+	__for_each_physical_engine(fd, e) {
 		for (m = modes; m->suffix; m++) {
 			igt_subtest_f("%s-uncached%s", e->name, m->suffix)
-				run_test(fd, e->exec_id | e->flags,
-					 m->mode | UNCACHED);
+				run_test(fd, e, m->mode | UNCACHED);
 			igt_subtest_f("%s-cached%s", e->name, m->suffix)
-				run_test(fd, e->exec_id | e->flags,
-					 m->mode | CACHED);
+				run_test(fd, e, m->mode | CACHED);
 		}
 	}
 
@@ -281,9 +281,9 @@ igt_main
 	}
 
 	igt_subtest("hang-S3")
-		run_test(fd, 0, SUSPEND | HANG);
+		run_test(fd, NULL, SUSPEND | HANG);
 	igt_subtest("hang-S4")
-		run_test(fd, 0, HIBERNATE | HANG);
+		run_test(fd, NULL, HIBERNATE | HANG);
 
 	igt_fixture {
 		igt_disallow_hang(fd, hang);
-- 
2.19.1

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[igt-dev] [RFC v2 27/43] tests/i915/gem_exec_whisper: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_exec_whisper.c | 29 +++++++++++++++--------------
 1 file changed, 15 insertions(+), 14 deletions(-)

diff --git a/tests/i915/gem_exec_whisper.c b/tests/i915/gem_exec_whisper.c
index de7a14dad605..43998b49b773 100644
--- a/tests/i915/gem_exec_whisper.c
+++ b/tests/i915/gem_exec_whisper.c
@@ -166,7 +166,8 @@ static void ctx_set_random_priority(int fd, uint32_t ctx)
 	gem_context_set_priority(fd, ctx, prio);
 }
 
-static void whisper(int fd, unsigned engine, unsigned flags)
+static void whisper(int fd, const struct intel_execution_engine2 *engine,
+		    unsigned flags)
 {
 	const uint32_t bbe = MI_BATCH_BUFFER_END;
 	const int gen = intel_gen(intel_get_drm_devid(fd));
@@ -202,16 +203,16 @@ static void whisper(int fd, unsigned engine, unsigned flags)
 	gpu_power_open(&power);
 
 	nengine = 0;
-	if (engine == ALL_ENGINES) {
-		for_each_physical_engine(fd, engine) {
-			if (gem_can_store_dword(fd, engine))
-				engines[nengine++] = engine;
+	if (!engine) {
+		__for_each_physical_engine(fd, engine) {
+			if (gem_class_can_store_dword(fd, engine->class))
+				engines[nengine++] = engine->flags;
 		}
 	} else {
 		igt_assert(!(flags & ALL));
-		igt_require(gem_has_ring(fd, engine));
-		igt_require(gem_can_store_dword(fd, engine));
-		engines[nengine++] = engine;
+		igt_require(gem_has_ring(fd, engine->flags));
+		igt_require(gem_class_can_store_dword(fd, engine->class));
+		engines[nengine++] = engine->flags;
 	}
 	igt_require(nengine);
 
@@ -520,6 +521,7 @@ static void whisper(int fd, unsigned engine, unsigned flags)
 
 igt_main
 {
+	const struct intel_execution_engine2 *e;
 	const struct mode {
 		const char *name;
 		unsigned flags;
@@ -565,19 +567,18 @@ igt_main
 
 	for (const struct mode *m = modes; m->name; m++) {
 		igt_subtest_f("%s", m->name)
-			whisper(fd, ALL_ENGINES, m->flags);
+			whisper(fd, NULL, m->flags);
 		igt_subtest_f("%s-all", m->name)
-			whisper(fd, ALL_ENGINES, m->flags | ALL);
+			whisper(fd, NULL, m->flags | ALL);
 	}
 
-	for (const struct intel_execution_engine *e = intel_execution_engines;
-	     e->name; e++) {
+	__for_each_physical_engine(fd, e) {
 		for (const struct mode *m = modes; m->name; m++) {
 			if (m->flags & CHAIN)
 				continue;
 
 			igt_subtest_f("%s-%s", e->name, m->name)
-				whisper(fd, e->exec_id | e->flags, m->flags);
+				whisper(fd, e, m->flags);
 		}
 	}
 
@@ -590,7 +591,7 @@ igt_main
 			if (m->flags & INTERRUPTIBLE)
 				continue;
 			igt_subtest_f("hang-%s", m->name)
-				whisper(fd, ALL_ENGINES, m->flags | HANG);
+				whisper(fd, NULL, m->flags | HANG);
 		}
 	}
 
-- 
2.19.1

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[igt-dev] [RFC v2 28/43] tests/i915/gem_mocs_settings: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_mocs_settings.c | 54 +++++++++++++++-------------------
 1 file changed, 23 insertions(+), 31 deletions(-)

diff --git a/tests/i915/gem_mocs_settings.c b/tests/i915/gem_mocs_settings.c
index 1a311b8c065b..d5cedfc478c1 100644
--- a/tests/i915/gem_mocs_settings.c
+++ b/tests/i915/gem_mocs_settings.c
@@ -213,7 +213,7 @@ static void do_read_registers(int fd,
 			      uint32_t dst_handle,
 			      uint32_t reg_base,
 			      uint32_t size,
-			      uint32_t engine_id)
+			      const struct intel_execution_engine2 *engine)
 {
 	struct drm_i915_gem_execbuffer2 execbuf;
 	struct drm_i915_gem_exec_object2 obj[2];
@@ -236,7 +236,7 @@ static void do_read_registers(int fd,
 	execbuf.batch_len =
 		create_read_batch(reloc, batch, dst_handle, size, reg_base);
 	i915_execbuffer2_set_context_id(execbuf, ctx_id);
-	execbuf.flags = I915_EXEC_SECURE | engine_id;
+	execbuf.flags = I915_EXEC_SECURE | engine->flags;
 
 	gem_write(fd, handle, 0, batch, execbuf.batch_len);
 	gem_execbuf(fd, &execbuf);
@@ -270,7 +270,7 @@ static void write_registers(int fd,
 			    uint32_t reg_base,
 			    const uint32_t *values,
 			    uint32_t size,
-			    uint32_t engine_id,
+			    const struct intel_execution_engine2 *engine,
 			    bool privileged)
 {
 	struct drm_i915_gem_exec_object2 obj;
@@ -288,9 +288,9 @@ static void write_registers(int fd,
 	execbuf.batch_len = create_write_batch(batch, values, size, reg_base);
 	i915_execbuffer2_set_context_id(execbuf, ctx_id);
 	if (privileged)
-		execbuf.flags = I915_EXEC_SECURE | engine_id;
+		execbuf.flags = I915_EXEC_SECURE | engine->flags;
 	else
-		execbuf.flags = engine_id;
+		execbuf.flags = engine->flags;
 
 	gem_write(fd, handle, 0, batch, execbuf.batch_len);
 	gem_execbuf(fd, &execbuf);
@@ -298,11 +298,11 @@ static void write_registers(int fd,
 }
 
 static void check_control_registers(int fd,
-				    unsigned engine,
+				    const struct intel_execution_engine2 *engine,
 				    uint32_t ctx_id,
 				    bool dirty)
 {
-	const uint32_t reg_base = get_engine_base(engine);
+	const uint32_t reg_base = get_engine_base(engine->flags);
 	uint32_t dst_handle = gem_create(fd, 4096);
 	uint32_t *read_regs;
 	struct mocs_table table;
@@ -331,7 +331,7 @@ static void check_control_registers(int fd,
 }
 
 static void check_l3cc_registers(int fd,
-				 unsigned engine,
+				 const struct intel_execution_engine2 *engine,
 				 uint32_t ctx_id,
 				 bool dirty)
 {
@@ -408,17 +408,17 @@ static void rc6_wait(int i915)
 }
 
 static void check_mocs_values(int fd,
-			      unsigned engine, uint32_t ctx_id,
+			      const struct intel_execution_engine2 *engine, uint32_t ctx_id,
 			      bool dirty)
 {
 	check_control_registers(fd, engine, ctx_id, dirty);
 
-	if (engine == I915_EXEC_RENDER)
+	if (engine->class == I915_ENGINE_CLASS_RENDER)
 		check_l3cc_registers(fd, engine, ctx_id, dirty);
 }
 
 static void write_dirty_mocs(int fd,
-			     unsigned engine, uint32_t ctx_id,
+			     const struct intel_execution_engine2 *engine, uint32_t ctx_id,
 			     bool privileged)
 {
 	int num_of_mocs_entries;
@@ -428,17 +428,17 @@ static void write_dirty_mocs(int fd,
 	else
 		num_of_mocs_entries = GEN9_NUM_MOCS_ENTRIES;
 
-	write_registers(fd, ctx_id, get_engine_base(engine),
+	write_registers(fd, ctx_id, get_engine_base(engine->flags),
 			write_values, num_of_mocs_entries,
 			engine, privileged);
 
-	if (engine == I915_EXEC_RENDER)
+	if (engine->class == I915_ENGINE_CLASS_RENDER)
 		write_registers(fd, ctx_id, GEN9_LNCFCMOCS0,
 				write_values, num_of_mocs_entries/2,
 				engine, privileged);
 }
 
-static void run_test(int fd, unsigned engine, unsigned flags, unsigned mode)
+static void run_test(int fd, const struct intel_execution_engine2 *engine, unsigned flags, unsigned mode)
 {
 	uint32_t ctx_id = 0;
 	uint32_t ctx_clean_id;
@@ -451,10 +451,10 @@ static void run_test(int fd, unsigned engine, unsigned flags, unsigned mode)
 	if (flags & MOCS_DIRTY_VALUES)
 		igt_skip_on(intel_gen(intel_get_drm_devid(fd)) >= 11);
 
-	gem_require_ring(fd, engine);
+	gem_require_ring(fd, engine->flags);
 
 	/* Skip if we don't know where the registers are for this engine */
-	igt_require(get_engine_base(engine));
+	igt_require(get_engine_base(engine->flags));
 
 	if (flags & MOCS_NON_DEFAULT_CTX)
 		ctx_id = gem_context_create(fd);
@@ -491,7 +491,7 @@ static void run_test(int fd, unsigned engine, unsigned flags, unsigned mode)
 		gem_context_destroy(fd, ctx_id);
 }
 
-static void isolation_test(int fd, unsigned engine)
+static void isolation_test(int fd, const struct intel_execution_engine2 *engine)
 {
 	uint32_t ctx[2] = { gem_context_create(fd), gem_context_create(fd) };
 
@@ -505,7 +505,7 @@ static void isolation_test(int fd, unsigned engine)
 
 igt_main
 {
-	const struct intel_execution_engine *e;
+	const struct intel_execution_engine2 *e;
 	struct mocs_table table;
 	int fd = -1;
 
@@ -516,15 +516,7 @@ igt_main
 		igt_require(get_mocs_settings(fd, &table, false));
 	}
 
-	for (e = intel_execution_engines; e->name; e++) {
-		/* We don't know which engine will be assigned to us if we're
-		 * using plain I915_EXEC_BSD, I915_EXEC_DEFAULT is just
-		 * duplicating render
-		 */
-		if ((e->exec_id == I915_EXEC_BSD && !e->flags) ||
-		    e->exec_id == I915_EXEC_DEFAULT)
-			continue;
-
+	__for_each_static_engine(e) {
 		for (unsigned mode = NONE; mode < MAX_MOCS_TEST_MODES; mode++) {
 			igt_subtest_group {
 				igt_hang_t hang = {};
@@ -542,7 +534,7 @@ igt_main
 					 * Let's also limit testing values on non-default
 					 * contexts to render-only.
 					 */
-					if (flags && e->exec_id != I915_EXEC_RENDER)
+					if (flags && e->class != I915_ENGINE_CLASS_RENDER)
 						continue;
 
 					igt_subtest_f("mocs-%s%s%s-%s",
@@ -553,7 +545,7 @@ igt_main
 						if (flags & (MOCS_NON_DEFAULT_CTX | MOCS_DIRTY_VALUES))
 							gem_require_contexts(fd);
 
-						run_test(fd, e->exec_id | e->flags, flags, mode);
+						run_test(fd, e, flags, mode);
 					}
 				}
 
@@ -565,10 +557,10 @@ igt_main
 		}
 
 		igt_subtest_f("mocs-isolation-%s", e->name) {
-			gem_require_ring(fd, e->exec_id | e->flags);
+			gem_require_ring(fd, e->flags);
 			gem_require_contexts(fd);
 
-			isolation_test(fd, e->exec_id | e->flags);
+			isolation_test(fd, e);
 		}
 	}
 
-- 
2.19.1

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[igt-dev] [RFC v2 29/43] tests/i915/gem_reset_stats: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_reset_stats.c | 60 +++++++++++++++++-------------------
 1 file changed, 29 insertions(+), 31 deletions(-)

diff --git a/tests/i915/gem_reset_stats.c b/tests/i915/gem_reset_stats.c
index ac9af23f2248..dd0ba821f7d8 100644
--- a/tests/i915/gem_reset_stats.c
+++ b/tests/i915/gem_reset_stats.c
@@ -73,7 +73,7 @@ static void sync_gpu(void)
 	close(fd);
 }
 
-static int noop(int fd, uint32_t ctx, const struct intel_execution_engine *e)
+static int noop(int fd, uint32_t ctx, const struct intel_execution_engine2 *e)
 {
 	const uint32_t bbe = MI_BATCH_BUFFER_END;
 	struct drm_i915_gem_execbuffer2 eb;
@@ -88,7 +88,7 @@ static int noop(int fd, uint32_t ctx, const struct intel_execution_engine *e)
 	memset(&eb, 0, sizeof(eb));
 	eb.buffers_ptr = to_user_pointer(&exec);
 	eb.buffer_count = 1;
-	eb.flags = e->exec_id | e->flags;
+	eb.flags = e->flags;
 	i915_execbuffer2_set_context_id(eb, ctx);
 
 	ret = __gem_execbuf(fd, &eb);
@@ -102,7 +102,7 @@ static int noop(int fd, uint32_t ctx, const struct intel_execution_engine *e)
 
 static int has_engine(int fd,
 		      uint32_t ctx,
-		      const struct intel_execution_engine *e)
+		      const struct intel_execution_engine2 *e)
 {
 	int handle = noop(fd, ctx, e);
 	if (handle < 0)
@@ -111,7 +111,7 @@ static int has_engine(int fd,
 	return 1;
 }
 
-static void check_context(const struct intel_execution_engine *e)
+static void check_context(const struct intel_execution_engine2 *e)
 {
 	int fd = drm_open_driver(DRIVER_INTEL);
 
@@ -157,14 +157,14 @@ static struct timespec ts_injected;
 #define BAN HANG_ALLOW_BAN
 #define ASYNC 2
 static void inject_hang(int fd, uint32_t ctx,
-			const struct intel_execution_engine *e,
+			const struct intel_execution_engine2 *e,
 			unsigned flags)
 {
 	igt_hang_t hang;
 
 	clock_gettime(CLOCK_MONOTONIC, &ts_injected);
 
-	hang = igt_hang_ctx(fd, ctx, e->exec_id | e->flags, flags & BAN);
+	hang = igt_hang_ctx(fd, ctx, e->flags, flags & BAN);
 	if ((flags & ASYNC) == 0)
 		igt_post_hang_ring(fd, hang);
 }
@@ -207,7 +207,7 @@ static int _assert_reset_status(int idx, int fd, int ctx, int status)
 #define assert_reset_status(idx, fd, ctx, status) \
 	igt_assert(_assert_reset_status(idx, fd, ctx, status) == 0)
 
-static void test_rs(const struct intel_execution_engine *e,
+static void test_rs(const struct intel_execution_engine2 *e,
 		    int num_fds, int hang_index, int rs_assumed_no_hang)
 {
 	int fd[MAX_FD];
@@ -253,7 +253,7 @@ static void test_rs(const struct intel_execution_engine *e,
 }
 
 #define MAX_CTX 100
-static void test_rs_ctx(const struct intel_execution_engine *e,
+static void test_rs_ctx(const struct intel_execution_engine2 *e,
 			int num_fds, int num_ctx, int hang_index,
 			int hang_context)
 {
@@ -329,7 +329,7 @@ static void test_rs_ctx(const struct intel_execution_engine *e,
 	}
 }
 
-static void test_ban(const struct intel_execution_engine *e)
+static void test_ban(const struct intel_execution_engine2 *e)
 {
 	struct local_drm_i915_reset_stats rs_bad, rs_good;
 	int fd_bad, fd_good;
@@ -383,7 +383,7 @@ static void test_ban(const struct intel_execution_engine *e)
 	close(fd_good);
 }
 
-static void test_ban_ctx(const struct intel_execution_engine *e)
+static void test_ban_ctx(const struct intel_execution_engine2 *e)
 {
 	struct local_drm_i915_reset_stats rs_bad, rs_good;
 	int fd, ban, retry = 10;
@@ -441,7 +441,7 @@ static void test_ban_ctx(const struct intel_execution_engine *e)
 	close(fd);
 }
 
-static void test_unrelated_ctx(const struct intel_execution_engine *e)
+static void test_unrelated_ctx(const struct intel_execution_engine2 *e)
 {
 	int fd1,fd2;
 	int ctx_guilty, ctx_unrelated;
@@ -480,7 +480,7 @@ static int get_reset_count(int fd, int ctx)
 	return rs.reset_count;
 }
 
-static void test_close_pending_ctx(const struct intel_execution_engine *e)
+static void test_close_pending_ctx(const struct intel_execution_engine2 *e)
 {
 	int fd = drm_open_driver(DRIVER_INTEL);
 	uint32_t ctx = gem_context_create(fd);
@@ -494,7 +494,7 @@ static void test_close_pending_ctx(const struct intel_execution_engine *e)
 	close(fd);
 }
 
-static void test_close_pending(const struct intel_execution_engine *e)
+static void test_close_pending(const struct intel_execution_engine2 *e)
 {
 	int fd = drm_open_driver(DRIVER_INTEL);
 
@@ -509,7 +509,7 @@ static void noop_on_each_ring(int fd, const bool reverse)
 	const uint32_t bbe = MI_BATCH_BUFFER_END;
 	struct drm_i915_gem_execbuffer2 eb;
 	struct drm_i915_gem_exec_object2 obj;
-	const struct intel_execution_engine *e;
+	const struct intel_execution_engine2 *e;
 
 	memset(&obj, 0, sizeof(obj));
 	obj.handle = gem_create(fd, 4096);
@@ -520,15 +520,15 @@ static void noop_on_each_ring(int fd, const bool reverse)
 	eb.buffer_count = 1;
 
 	if (reverse) {
-		for (e = intel_execution_engines; e->name; e++)
+		__for_each_static_engine(e)
 			;
-		while (--e >= intel_execution_engines) {
-			eb.flags = e->exec_id | e->flags;
+		while (--e >= intel_execution_engines2) {
+			eb.flags = e->flags;
 			__gem_execbuf(fd, &eb);
 		}
 	} else {
-		for (e = intel_execution_engines; e->name; e++) {
-			eb.flags = e->exec_id | e->flags;
+		__for_each_static_engine(e) {
+			eb.flags = e->flags;
 			__gem_execbuf(fd, &eb);
 		}
 	}
@@ -537,7 +537,7 @@ static void noop_on_each_ring(int fd, const bool reverse)
 	gem_close(fd, obj.handle);
 }
 
-static void test_close_pending_fork(const struct intel_execution_engine *e,
+static void test_close_pending_fork(const struct intel_execution_engine2 *e,
 				    const bool reverse)
 {
 	int fd = drm_open_driver(DRIVER_INTEL);
@@ -546,7 +546,7 @@ static void test_close_pending_fork(const struct intel_execution_engine *e,
 
 	assert_reset_status(fd, fd, 0, RS_NO_ERROR);
 
-	hang = igt_hang_ctx(fd, 0, e->exec_id | e->flags, 0);
+	hang = igt_hang_ctx(fd, 0, e->flags, 0);
 	sleep(1);
 
 	/* Avoid helpers as we need to kill the child
@@ -579,7 +579,7 @@ static void test_close_pending_fork(const struct intel_execution_engine *e,
 	close(fd);
 }
 
-static void test_reset_count(const struct intel_execution_engine *e,
+static void test_reset_count(const struct intel_execution_engine2 *e,
 			     const bool create_ctx)
 {
 	int fd = drm_open_driver(DRIVER_INTEL);
@@ -699,23 +699,21 @@ static void test_params(void)
 	close(fd);
 }
 
-static const struct intel_execution_engine *
-next_engine(int fd, const struct intel_execution_engine *e)
+static const struct intel_execution_engine2 *
+next_engine(int fd, const struct intel_execution_engine2 *e)
 {
 	do {
 		e++;
 		if (e->name == NULL)
-			e = intel_execution_engines;
-		if (e->exec_id == 0)
-			e++;
+			e = intel_execution_engines2;
 	} while (!has_engine(fd, 0, e));
 
 	return e;
 }
 
-static void defer_hangcheck(const struct intel_execution_engine *engine)
+static void defer_hangcheck(const struct intel_execution_engine2 *engine)
 {
-	const struct intel_execution_engine *next;
+	const struct intel_execution_engine2 *next;
 	int fd, count_start, count_end;
 	int seconds = 30;
 
@@ -772,7 +770,7 @@ static bool gem_has_reset_stats(int fd)
 
 igt_main
 {
-	const struct intel_execution_engine *e;
+	const struct intel_execution_engine2 *e;
 	igt_skip_on_simulation();
 
 	igt_fixture {
@@ -805,7 +803,7 @@ igt_main
 	igt_subtest_f("params-ctx")
 		RUN_TEST(test_params_ctx());
 
-	for (e = intel_execution_engines; e->name; e++) {
+	__for_each_static_engine(e) {
 		igt_subtest_f("reset-stats-%s", e->name)
 			RUN_TEST(test_rs(e, 4, 1, 0));
 
-- 
2.19.1

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[igt-dev] [RFC v2 30/43] tests/i915/gem_ring_sync_loop: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_ring_sync_loop.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/tests/i915/gem_ring_sync_loop.c b/tests/i915/gem_ring_sync_loop.c
index 118f3638ab98..3982cf9b9319 100644
--- a/tests/i915/gem_ring_sync_loop.c
+++ b/tests/i915/gem_ring_sync_loop.c
@@ -44,12 +44,12 @@ sync_loop(int fd)
 	struct drm_i915_gem_relocation_entry reloc[1];
 	unsigned engines[16];
 	unsigned nengine;
-	unsigned engine;
+	const struct intel_execution_engine2 *engine;
 	int i;
 
 	nengine = 0;
-	for_each_physical_engine(fd, engine)
-		engines[nengine++] = engine;
+	__for_each_physical_engine(fd, engine)
+		engines[nengine++] = engine->flags;
 	igt_require(nengine);
 
 	memset(object, 0, sizeof(object));
-- 
2.19.1

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[igt-dev] [RFC v2 31/43] tests/i915/gem_ringfill: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_ringfill.c | 32 ++++++++++++++------------------
 1 file changed, 14 insertions(+), 18 deletions(-)

diff --git a/tests/i915/gem_ringfill.c b/tests/i915/gem_ringfill.c
index c728e1cd3668..a02c7e76ecd9 100644
--- a/tests/i915/gem_ringfill.c
+++ b/tests/i915/gem_ringfill.c
@@ -96,7 +96,7 @@ static int setup_execbuf(int fd,
 			 struct drm_i915_gem_execbuffer2 *execbuf,
 			 struct drm_i915_gem_exec_object2 *obj,
 			 struct drm_i915_gem_relocation_entry *reloc,
-			 unsigned int ring)
+			 unsigned int flags)
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
 	const uint32_t bbe = MI_BATCH_BUFFER_END;
@@ -109,7 +109,7 @@ static int setup_execbuf(int fd,
 	memset(reloc, 0, 1024*sizeof(*reloc));
 
 	execbuf->buffers_ptr = to_user_pointer(obj);
-	execbuf->flags = ring | (1 << 11) | (1 << 12);
+	execbuf->flags = flags | (1 << 11) | (1 << 12);
 
 	if (gen > 3 && gen < 6)
 		execbuf->flags |= I915_EXEC_SECURE;
@@ -170,25 +170,25 @@ static int setup_execbuf(int fd,
 	return 0;
 }
 
-static void run_test(int fd, unsigned ring, unsigned flags, unsigned timeout)
+static void run_test(int fd, const struct intel_execution_engine2 *e,
+		     unsigned flags, unsigned timeout)
 {
 	struct drm_i915_gem_exec_object2 obj[2];
 	struct drm_i915_gem_relocation_entry reloc[1024];
 	struct drm_i915_gem_execbuffer2 execbuf;
 	igt_hang_t hang;
 
-	gem_require_ring(fd, ring);
-	igt_require(gem_can_store_dword(fd, ring));
+	igt_require(gem_class_can_store_dword(fd, e->class));
 
 	if (flags & (SUSPEND | HIBERNATE))
-		run_test(fd, ring, 0, 0);
+		run_test(fd, e, 0, 0);
 
 	gem_quiescent_gpu(fd);
-	igt_require(setup_execbuf(fd, &execbuf, obj, reloc, ring) == 0);
+	igt_require(setup_execbuf(fd, &execbuf, obj, reloc, e->flags) == 0);
 
 	memset(&hang, 0, sizeof(hang));
 	if (flags & HANG)
-		hang = igt_hang_ring(fd, ring & ~(3<<13));
+		hang = igt_hang_ring(fd, e->flags & ~(3<<13));
 
 	if (flags & (CHILD | FORKED | BOMB)) {
 		int nchild;
@@ -204,7 +204,7 @@ static void run_test(int fd, unsigned ring, unsigned flags, unsigned timeout)
 		igt_fork(child, nchild) {
 			if (flags & NEWFD) {
 				fd = drm_open_driver(DRIVER_INTEL);
-				setup_execbuf(fd, &execbuf, obj, reloc, ring);
+				setup_execbuf(fd, &execbuf, obj, reloc, e->flags);
 			}
 			fill_ring(fd, &execbuf, flags, timeout);
 		}
@@ -235,7 +235,7 @@ static void run_test(int fd, unsigned ring, unsigned flags, unsigned timeout)
 	gem_quiescent_gpu(fd);
 
 	if (flags & (SUSPEND | HIBERNATE))
-		run_test(fd, ring, 0, 0);
+		run_test(fd, e, 0, 0);
 }
 
 igt_main
@@ -278,18 +278,14 @@ igt_main
 	}
 
 	for (m = modes; m->suffix; m++) {
-		const struct intel_execution_engine *e;
+		const struct intel_execution_engine2 *e;
 
-		for (e = intel_execution_engines; e->name; e++) {
-			igt_subtest_f("%s%s%s",
-				      m->basic && !e->exec_id ? "basic-" : "",
-				      e->name,
-				      m->suffix) {
+		__for_each_physical_engine(fd, e) {
+			igt_subtest_f("%s%s", e->name, m->suffix) {
 				igt_skip_on(m->flags & NEWFD && master);
 				if (m->flags & (HANG|SUSPEND|HIBERNATE))
 					igt_skip_on_simulation();
-				run_test(fd, e->exec_id | e->flags,
-					 m->flags, m->timeout);
+				run_test(fd, e, m->flags, m->timeout);
 			}
 		}
 	}
-- 
2.19.1

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[igt-dev] [RFC v2 32/43] tests/i915/gem_shrink: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_shrink.c | 22 ++++++++++++++--------
 1 file changed, 14 insertions(+), 8 deletions(-)

diff --git a/tests/i915/gem_shrink.c b/tests/i915/gem_shrink.c
index 037ff005b0f4..bca6fb88c6da 100644
--- a/tests/i915/gem_shrink.c
+++ b/tests/i915/gem_shrink.c
@@ -328,7 +328,7 @@ static void run_test(int nchildren, uint64_t alloc,
 	igt_waitchildren();
 }
 
-static void reclaim(unsigned engine, int timeout)
+static void reclaim(const struct intel_execution_engine2 *engine, int timeout)
 {
 	const uint64_t timeout_100ms = 100000000LL;
 	int fd = drm_open_driver(DRIVER_INTEL);
@@ -346,9 +346,9 @@ static void reclaim(unsigned engine, int timeout)
 		} while (!*shared);
 	}
 
-	spin = igt_spin_new(fd, .engine = engine);
+	spin = igt_spin_new(fd, .engine = engine->flags);
 	igt_until_timeout(timeout) {
-		igt_spin_t *next = __igt_spin_new(fd, .engine = engine);
+		igt_spin_t *next = __igt_spin_new(fd, .engine = engine->flags);
 
 		igt_spin_set_timeout(spin, timeout_100ms);
 		gem_sync(fd, spin->handle);
@@ -395,12 +395,12 @@ igt_main
 	};
 	uint64_t alloc_size = 0;
 	int num_processes = 0;
+	const struct intel_execution_engine2 *engine;
 
 	igt_skip_on_simulation();
 
 	igt_fixture {
 		uint64_t mem_size = intel_get_total_ram_mb();
-		unsigned int engine;
 		int fd;
 
 		fd = drm_open_driver(DRIVER_INTEL);
@@ -423,15 +423,21 @@ igt_main
 				     CHECK_SWAP | CHECK_RAM);
 
 		nengine = 0;
-		for_each_engine(fd, engine)
-			engines[nengine++] = engine;
+		__for_each_static_engine(engine)
+			engines[nengine++] = engine->flags;
 		igt_require(nengine);
 
 		close(fd);
 	}
 
-	igt_subtest("reclaim")
-		reclaim(I915_EXEC_DEFAULT, 2);
+	igt_subtest("reclaim") {
+		__for_each_static_engine(engine) {
+			if (engine->class == I915_ENGINE_CLASS_RENDER)
+				break;
+		}
+
+		reclaim(engine, 2);
+	}
 
 	for(const struct test *t = tests; t->name; t++) {
 		for(const struct mode *m = modes; m->suffix; m++) {
-- 
2.19.1

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[igt-dev] [RFC v2 33/43] tests/i915/gem_spin_batch: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_spin_batch.c | 40 +++++++++++++++++++------------------
 1 file changed, 21 insertions(+), 19 deletions(-)

diff --git a/tests/i915/gem_spin_batch.c b/tests/i915/gem_spin_batch.c
index 3b4f90731539..717751bddc1f 100644
--- a/tests/i915/gem_spin_batch.c
+++ b/tests/i915/gem_spin_batch.c
@@ -32,7 +32,8 @@
 		     "'%s' != '%s' (%lld not within %d%% tolerance of %lld)\n",\
 		     #x, #ref, (long long)x, tolerance, (long long)ref)
 
-static void spin(int fd, unsigned int engine, unsigned int timeout_sec)
+static void spin(int fd, const struct intel_execution_engine2 *e,
+		 unsigned int timeout_sec)
 {
 	const uint64_t timeout_100ms = 100000000LL;
 	unsigned long loops = 0;
@@ -41,9 +42,9 @@ static void spin(int fd, unsigned int engine, unsigned int timeout_sec)
 	struct timespec itv = { };
 	uint64_t elapsed;
 
-	spin = __igt_spin_new(fd, .engine = engine);
+	spin = __igt_spin_new(fd, .engine = e->flags);
 	while ((elapsed = igt_nsec_elapsed(&tv)) >> 30 < timeout_sec) {
-		igt_spin_t *next = __igt_spin_new(fd, .engine = engine);
+		igt_spin_t *next = __igt_spin_new(fd, .engine = e->flags);
 
 		igt_spin_set_timeout(spin,
 				     timeout_100ms - igt_nsec_elapsed(&itv));
@@ -69,13 +70,14 @@ static void spin(int fd, unsigned int engine, unsigned int timeout_sec)
 #define RESUBMIT_NEW_CTX     (1 << 0)
 #define RESUBMIT_ALL_ENGINES (1 << 1)
 
-static void spin_resubmit(int fd, unsigned int engine, unsigned int flags)
+static void spin_resubmit(int fd, const struct intel_execution_engine2 *e,
+			  unsigned int flags)
 {
 	const uint32_t ctx0 = gem_context_create(fd);
 	const uint32_t ctx1 = (flags & RESUBMIT_NEW_CTX) ?
 		gem_context_create(fd) : ctx0;
-	igt_spin_t *spin = __igt_spin_new(fd, .ctx = ctx0, .engine = engine);
-	unsigned int other;
+	igt_spin_t *spin = __igt_spin_new(fd, .ctx = ctx0, .engine = e->flags);
+	const struct intel_execution_engine2 *other;
 
 	struct drm_i915_gem_execbuffer2 eb = {
 		.buffer_count = 1,
@@ -84,15 +86,15 @@ static void spin_resubmit(int fd, unsigned int engine, unsigned int flags)
 	};
 
 	if (flags & RESUBMIT_ALL_ENGINES) {
-		for_each_physical_engine(fd, other) {
-			if  (other == engine)
+		__for_each_physical_engine(fd, other) {
+			if  (other == e)
 				continue;
 
-			eb.flags = other;
+			eb.flags = other->flags;
 			gem_execbuf(fd, &eb);
 		}
 	} else {
-		eb.flags = engine;
+		eb.flags = e->flags;
 		gem_execbuf(fd, &eb);
 	}
 
@@ -115,9 +117,9 @@ static void spin_exit_handler(int sig)
 
 static void spin_on_all_engines(int fd, unsigned int timeout_sec)
 {
-	unsigned engine;
+	const struct intel_execution_engine2 *engine;
 
-	for_each_physical_engine(fd, engine) {
+	__for_each_physical_engine(fd, engine) {
 		igt_fork(child, 1) {
 			igt_install_exit_handler(spin_exit_handler);
 			spin(fd, engine, timeout_sec);
@@ -129,7 +131,7 @@ static void spin_on_all_engines(int fd, unsigned int timeout_sec)
 
 igt_main
 {
-	const struct intel_execution_engine *e;
+	const struct intel_execution_engine2 *e;
 	int fd = -1;
 
 	igt_skip_on_simulation();
@@ -140,21 +142,21 @@ igt_main
 		igt_fork_hang_detector(fd);
 	}
 
-	for (e = intel_execution_engines; e->name; e++) {
+	__for_each_physical_engine(fd, e) {
 		igt_subtest_f("basic-%s", e->name)
-			spin(fd, e->exec_id, 3);
+			spin(fd, e, 3);
 
 		igt_subtest_f("resubmit-%s", e->name)
-			spin_resubmit(fd, e->exec_id, 0);
+			spin_resubmit(fd, e, 0);
 
 		igt_subtest_f("resubmit-new-%s", e->name)
-			spin_resubmit(fd, e->exec_id, RESUBMIT_NEW_CTX);
+			spin_resubmit(fd, e, RESUBMIT_NEW_CTX);
 
 		igt_subtest_f("resubmit-all-%s", e->name)
-			spin_resubmit(fd, e->exec_id, RESUBMIT_ALL_ENGINES);
+			spin_resubmit(fd, e, RESUBMIT_ALL_ENGINES);
 
 		igt_subtest_f("resubmit-new-all-%s", e->name)
-			spin_resubmit(fd, e->exec_id,
+			spin_resubmit(fd, e,
 				      RESUBMIT_NEW_CTX |
 				      RESUBMIT_ALL_ENGINES);
 	}
-- 
2.19.1

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[igt-dev] [RFC v2 34/43] tests/i915/gem_storedw_loop: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_storedw_loop.c | 39 +++++++++++++++++------------------
 1 file changed, 19 insertions(+), 20 deletions(-)

diff --git a/tests/i915/gem_storedw_loop.c b/tests/i915/gem_storedw_loop.c
index b00555e0cb85..f7eb5a64169f 100644
--- a/tests/i915/gem_storedw_loop.c
+++ b/tests/i915/gem_storedw_loop.c
@@ -65,7 +65,7 @@ mmap_coherent(int fd, uint32_t handle, int size)
 }
 
 static void
-store_dword_loop(int fd, int ring, int divider)
+store_dword_loop(int fd, const struct intel_execution_engine2 *e, int divider)
 {
 	int i, val = 0;
 	struct drm_i915_gem_execbuffer2 execbuf;
@@ -107,7 +107,7 @@ store_dword_loop(int fd, int ring, int divider)
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = to_user_pointer(obj);
 	execbuf.buffer_count = 2;
-	execbuf.flags = ring;
+	execbuf.flags = e->flags;
 
 	igt_info("running storedw loop on render with stall every %i batch\n", divider);
 
@@ -143,32 +143,31 @@ store_dword_loop(int fd, int ring, int divider)
 }
 
 static void
-store_test(int fd, int ring)
+store_test(int fd, const struct intel_execution_engine2 *e)
 {
-	gem_require_ring(fd, ring);
-	store_dword_loop(fd, ring, 1);
-	store_dword_loop(fd, ring, 2);
+	gem_require_ring(fd, e->flags);
+	store_dword_loop(fd, e, 1);
+	store_dword_loop(fd, e, 2);
 	if (!igt_run_in_simulation()) {
-		store_dword_loop(fd, ring, 3);
-		store_dword_loop(fd, ring, 5);
-		store_dword_loop(fd, ring, 7);
-		store_dword_loop(fd, ring, 11);
-		store_dword_loop(fd, ring, 13);
-		store_dword_loop(fd, ring, 17);
-		store_dword_loop(fd, ring, 19);
+		store_dword_loop(fd, e, 3);
+		store_dword_loop(fd, e, 5);
+		store_dword_loop(fd, e, 7);
+		store_dword_loop(fd, e, 11);
+		store_dword_loop(fd, e, 13);
+		store_dword_loop(fd, e, 17);
+		store_dword_loop(fd, e, 19);
 	}
 }
 
 static void
-check_test_requirements(int fd, int ringid)
+check_test_requirements(int fd, const struct intel_execution_engine2 *e)
 {
-	gem_require_ring(fd, ringid);
-	igt_require(gem_can_store_dword(fd, ringid));
+	igt_require(gem_class_can_store_dword(fd, e->class));
 }
 
 igt_main
 {
-	const struct intel_execution_engine *e;
+	const struct intel_execution_engine2 *e;
 	int fd;
 
 	igt_fixture {
@@ -183,10 +182,10 @@ igt_main
 		igt_require(gem_uses_ppgtt(fd));
 	}
 
-	for (e = intel_execution_engines; e->name; e++) {
+	__for_each_physical_engine(fd, e) {
 		igt_subtest_f("store-%s", e->name) {
-			check_test_requirements(fd, e->exec_id);
-			store_test(fd, e->exec_id | e->flags);
+			check_test_requirements(fd, e);
+			store_test(fd, e);
 		}
 	}
 
-- 
2.19.1

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[igt-dev] [RFC v2 35/43] tests/i915/gem_userptr_blits: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_userptr_blits.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/tests/i915/gem_userptr_blits.c b/tests/i915/gem_userptr_blits.c
index 1373f160b129..2433cc6668a7 100644
--- a/tests/i915/gem_userptr_blits.c
+++ b/tests/i915/gem_userptr_blits.c
@@ -996,7 +996,7 @@ static int test_dmabuf(void)
 	return 0;
 }
 
-static void store_dword_rand(int i915, unsigned int engine,
+static void store_dword_rand(int i915, const struct intel_execution_engine2 *engine,
 			     uint32_t target, uint64_t sz,
 			     int count)
 {
@@ -1025,7 +1025,7 @@ static void store_dword_rand(int i915, unsigned int engine,
 	memset(&exec, 0, sizeof(exec));
 	exec.buffer_count = 2;
 	exec.buffers_ptr = to_user_pointer(obj);
-	exec.flags = engine;
+	exec.flags = engine->flags;
 	if (gen < 6)
 		exec.flags |= I915_EXEC_SECURE;
 
@@ -1140,14 +1140,14 @@ static void test_readonly(int i915)
 	igt_assert(mprotect(space, total, PROT_READ) == 0);
 
 	igt_fork(child, 1) {
-		unsigned int engine;
+		const struct intel_execution_engine2 *engine;
 		char *orig;
 
 		orig = g_compute_checksum_for_data(G_CHECKSUM_SHA1, pages, sz);
 
 		gem_userptr(i915, space, total, true, userptr_flags, &rhandle);
 
-		for_each_engine(i915, engine) {
+		__for_each_physical_engine(i915, engine) {
 			char *ref, *result;
 
 			/* First tweak the backing store through the write */
-- 
2.19.1

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[igt-dev] [RFC v2 36/43] tests/i915/i915_hangman: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/i915_hangman.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/tests/i915/i915_hangman.c b/tests/i915/i915_hangman.c
index 58141fc928f0..047d7d5f5d04 100644
--- a/tests/i915/i915_hangman.c
+++ b/tests/i915/i915_hangman.c
@@ -199,7 +199,7 @@ static void check_error_state(const char *expected_ring_name,
 	igt_assert(found);
 }
 
-static void test_error_state_capture(unsigned ring_id,
+static void test_error_state_capture(const struct intel_execution_engine2 *e,
 				     const char *ring_name)
 {
 	uint32_t *batch;
@@ -208,7 +208,7 @@ static void test_error_state_capture(unsigned ring_id,
 
 	clear_error_state();
 
-	hang = igt_hang_ctx(device, 0, ring_id, HANG_ALLOW_CAPTURE);
+	hang = igt_hang_ctx(device, 0, e->flags, HANG_ALLOW_CAPTURE);
 	offset = hang.spin->obj[IGT_SPIN_BATCH].offset;
 
 	batch = gem_mmap__cpu(device, hang.spin->handle, 0, 4096, PROT_READ);
@@ -278,7 +278,7 @@ igt_main
 
 	__for_each_physical_engine(device, e)
 		igt_subtest_f("error-state-capture-%s", e->name)
-			test_error_state_capture(e->flags, e->name);
+			test_error_state_capture(e, e->name);
 
 	igt_subtest("hangcheck-unterminated")
 		hangcheck_unterminated();
-- 
2.19.1

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[igt-dev] [RFC v2 37/43] tests/i915/i915_module_load: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/i915_module_load.c | 29 +++++++++++++++--------------
 1 file changed, 15 insertions(+), 14 deletions(-)

diff --git a/tests/i915/i915_module_load.c b/tests/i915/i915_module_load.c
index 7fe83520713c..aabb701d592c 100644
--- a/tests/i915/i915_module_load.c
+++ b/tests/i915/i915_module_load.c
@@ -42,7 +42,7 @@
 
 #define ENGINE_MASK  (I915_EXEC_RING_MASK | LOCAL_I915_EXEC_BSD_MASK)
 
-static void store_dword(int fd, unsigned ring)
+static void store_dword(int fd, const struct intel_execution_engine2 *e)
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
 	struct drm_i915_gem_exec_object2 obj[2];
@@ -51,17 +51,17 @@ static void store_dword(int fd, unsigned ring)
 	uint32_t batch[16];
 	int i;
 
-	if (!gem_can_store_dword(fd, ring))
+	if (!gem_class_can_store_dword(fd, e->class))
 		return;
 
-	if (!gem_has_ring(fd, ring))
+	if (!gem_has_ring(fd, e->flags))
 		return;
 
 	intel_detect_and_clear_missed_interrupts(fd);
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = (uintptr_t)obj;
 	execbuf.buffer_count = 2;
-	execbuf.flags = ring;
+	execbuf.flags = e->flags;
 	if (gen < 6)
 		execbuf.flags |= I915_EXEC_SECURE;
 
@@ -113,11 +113,12 @@ static void store_all(int fd)
 	unsigned engines[16], permuted[16];
 	uint32_t batch[16];
 	uint64_t offset;
-	unsigned engine, nengine;
+	unsigned nengine;
+	const struct intel_execution_engine2 *engine;
 	int value;
 	int i, j;
 
-	if (!gem_can_store_dword(fd, 0))
+	if (!gem_class_can_store_dword(fd, I915_ENGINE_CLASS_RENDER))
 		return;
 
 	memset(&execbuf, 0, sizeof(execbuf));
@@ -151,14 +152,14 @@ static void store_all(int fd)
 
 	nengine = 0;
 	intel_detect_and_clear_missed_interrupts(fd);
-	for_each_engine(fd, engine) {
-		if (!gem_can_store_dword(fd, engine))
+	__for_each_physical_engine(fd, engine) {
+		if (!gem_class_can_store_dword(fd, engine->class))
 			continue;
 
 		igt_assert(2*(nengine+1)*sizeof(batch) <= 4096);
 
 		execbuf.flags &= ~ENGINE_MASK;
-		execbuf.flags |= engine;
+		execbuf.flags |= engine->flags;
 
 		j = 2*nengine;
 		reloc[j].target_handle = obj[0].handle;
@@ -190,7 +191,7 @@ static void store_all(int fd)
 		execbuf.batch_start_offset = j*sizeof(batch);
 		gem_execbuf(fd, &execbuf);
 
-		engines[nengine++] = engine;
+		engines[nengine++] = engine->flags;
 	}
 	gem_sync(fd, obj[1].handle);
 
@@ -281,14 +282,14 @@ static void
 gem_exec_store(void)
 {
 	int fd;
-	const struct intel_execution_engine *e;
+	const struct intel_execution_engine2 *e;
 
 	fd = __drm_open_driver(DRIVER_INTEL);
 	igt_fork_hang_detector(fd);
 
-	for (e = intel_execution_engines; e->name; e++) {
-		if (gem_can_store_dword(fd, e->exec_id | e->flags))
-			store_dword(fd, e->exec_id | e->flags);
+	__for_each_static_engine(e) {
+		if (gem_class_can_store_dword(fd, e->class))
+			store_dword(fd, e);
 	}
 
 	store_all(fd);
-- 
2.19.1

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[igt-dev] [RFC v2 38/43] tests/kms_busy: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/kms_busy.c | 62 ++++++++++++++++++++++++------------------------
 1 file changed, 31 insertions(+), 31 deletions(-)

diff --git a/tests/kms_busy.c b/tests/kms_busy.c
index 66f26cd08f31..43da5e87694a 100644
--- a/tests/kms_busy.c
+++ b/tests/kms_busy.c
@@ -69,7 +69,7 @@ static void do_cleanup_display(igt_display_t *dpy)
 
 static void flip_to_fb(igt_display_t *dpy, int pipe,
 		       igt_output_t *output,
-		       struct igt_fb *fb, unsigned ring,
+		       struct igt_fb *fb, const struct intel_execution_engine2 *e,
 		       const char *name, bool modeset)
 {
 	struct pollfd pfd = { .fd = dpy->drm_fd, .events = POLLIN };
@@ -77,7 +77,7 @@ static void flip_to_fb(igt_display_t *dpy, int pipe,
 	struct drm_event_vblank ev;
 
 	igt_spin_t *t = igt_spin_new(dpy->drm_fd,
-				     .engine = ring,
+				     .engine = e->flags,
 				     .dependency = fb->gem_handle);
 
 	if (modeset) {
@@ -134,7 +134,9 @@ static void flip_to_fb(igt_display_t *dpy, int pipe,
 	igt_spin_free(dpy->drm_fd, t);
 }
 
-static void test_flip(igt_display_t *dpy, unsigned ring, int pipe, bool modeset)
+static void test_flip(igt_display_t *dpy,
+		      const struct intel_execution_engine2 *e, int pipe,
+		      bool modeset)
 {
 	struct igt_fb fb[2];
 	int warmup[] = { 0, 1, 0, -1 };
@@ -167,10 +169,10 @@ static void test_flip(igt_display_t *dpy, unsigned ring, int pipe, bool modeset)
 	}
 
 	/* Make the frontbuffer busy and try to flip to itself */
-	flip_to_fb(dpy, pipe, output, &fb[0], ring, "fb[0]", modeset);
+	flip_to_fb(dpy, pipe, output, &fb[0], e, "fb[0]", modeset);
 
 	/* Repeat for flip to second buffer */
-	flip_to_fb(dpy, pipe, output, &fb[1], ring, "fb[1]", modeset);
+	flip_to_fb(dpy, pipe, output, &fb[1], e, "fb[1]", modeset);
 
 	do_cleanup_display(dpy);
 	igt_remove_fb(dpy->drm_fd, &fb[1]);
@@ -178,10 +180,11 @@ static void test_flip(igt_display_t *dpy, unsigned ring, int pipe, bool modeset)
 }
 
 static void test_atomic_commit_hang(igt_display_t *dpy, igt_plane_t *primary,
-				    struct igt_fb *busy_fb, unsigned ring)
+				    struct igt_fb *busy_fb,
+				    const struct intel_execution_engine2 *e)
 {
 	igt_spin_t *t = igt_spin_new(dpy->drm_fd,
-				     .engine = ring,
+				     .engine = e->flags,
 				     .dependency = busy_fb->gem_handle);
 	struct pollfd pfd = { .fd = dpy->drm_fd, .events = POLLIN };
 	unsigned flags = 0;
@@ -213,7 +216,7 @@ static void test_atomic_commit_hang(igt_display_t *dpy, igt_plane_t *primary,
 	igt_spin_end(t);
 }
 
-static void test_hang(igt_display_t *dpy, unsigned ring,
+static void test_hang(igt_display_t *dpy, const struct intel_execution_engine2 *e,
 		      enum pipe pipe, bool modeset, bool hang_newfb)
 {
 	struct igt_fb fb[2];
@@ -234,12 +237,12 @@ static void test_hang(igt_display_t *dpy, unsigned ring,
 		/* Test modeset disable with hang */
 		igt_output_set_pipe(output, PIPE_NONE);
 		igt_plane_set_fb(primary, &fb[1]);
-		test_atomic_commit_hang(dpy, primary, &fb[hang_newfb], ring);
+		test_atomic_commit_hang(dpy, primary, &fb[hang_newfb], e);
 
 		/* Test modeset enable with hang */
 		igt_plane_set_fb(primary, &fb[0]);
 		igt_output_set_pipe(output, pipe);
-		test_atomic_commit_hang(dpy, primary, &fb[!hang_newfb], ring);
+		test_atomic_commit_hang(dpy, primary, &fb[!hang_newfb], e);
 	} else {
 		/*
 		 * Test what happens with a single hanging pageflip.
@@ -247,7 +250,7 @@ static void test_hang(igt_display_t *dpy, unsigned ring,
 		 * timeouts taking care of it.
 		 */
 		igt_plane_set_fb(primary, &fb[1]);
-		test_atomic_commit_hang(dpy, primary, &fb[hang_newfb], ring);
+		test_atomic_commit_hang(dpy, primary, &fb[hang_newfb], e);
 	}
 
 	do_cleanup_display(dpy);
@@ -256,7 +259,8 @@ static void test_hang(igt_display_t *dpy, unsigned ring,
 }
 
 static void test_pageflip_modeset_hang(igt_display_t *dpy,
-				       unsigned ring, enum pipe pipe)
+				       const struct intel_execution_engine2 *e,
+				       enum pipe pipe)
 {
 	struct igt_fb fb;
 	struct drm_event_vblank ev;
@@ -270,7 +274,7 @@ static void test_pageflip_modeset_hang(igt_display_t *dpy,
 	igt_display_commit2(dpy, dpy->is_atomic ? COMMIT_ATOMIC : COMMIT_LEGACY);
 
 	t = igt_spin_new(dpy->drm_fd,
-			 .engine = ring,
+			 .engine = e->flags,
 			 .dependency = fb.gem_handle);
 
 	do_or_die(drmModePageFlip(dpy->drm_fd, dpy->pipes[pipe].crtc_id, fb.fb_id, DRM_MODE_PAGE_FLIP_EVENT, &fb));
@@ -291,7 +295,7 @@ igt_main
 {
 	igt_display_t display = { .drm_fd = -1, .n_pipes = IGT_MAX_PIPES };
 	/* we only test on render */
-	const struct intel_execution_engine *e = &intel_execution_engines[1];
+	const struct intel_execution_engine2 *e = &intel_execution_engines2[0];
 	enum pipe n;
 
 	igt_skip_on_simulation();
@@ -319,32 +323,28 @@ igt_main
 
 		igt_subtest_f("basic-flip-%s",
 			kmstest_pipe_name(n)) {
-			igt_require(gem_has_ring(display.drm_fd,
-						e->exec_id | e->flags));
+			igt_require(gem_has_ring(display.drm_fd, e->flags));
 
-			test_flip(&display, e->exec_id | e->flags, n, false);
+			test_flip(&display, e, n, false);
 		}
 		igt_subtest_f("basic-modeset-%s",
 			kmstest_pipe_name(n)) {
-			igt_require(gem_has_ring(display.drm_fd,
-						e->exec_id | e->flags));
+			igt_require(gem_has_ring(display.drm_fd, e->flags));
 
-			test_flip(&display, e->exec_id | e->flags, n, true);
+			test_flip(&display, e, n, true);
 		}
 
 		igt_fixture {
-			igt_require(gem_has_ring(display.drm_fd,
-						e->exec_id | e->flags));
+			igt_require(gem_has_ring(display.drm_fd, e->flags));
 
 			hang = igt_allow_hang(display.drm_fd, 0, 0);
 		}
 
 		igt_subtest_f("extended-pageflip-modeset-hang-oldfb-%s-%s",
 				e->name, kmstest_pipe_name(n)) {
-			igt_require(gem_has_ring(display.drm_fd,
-						e->exec_id | e->flags));
+			igt_require(gem_has_ring(display.drm_fd, e->flags));
 
-			test_pageflip_modeset_hang(&display, e->exec_id | e->flags, n);
+			test_pageflip_modeset_hang(&display, e, n);
 		}
 
 		igt_fixture
@@ -352,25 +352,25 @@ igt_main
 
 		igt_subtest_f("extended-pageflip-hang-oldfb-%s-%s",
 				e->name, kmstest_pipe_name(n))
-			test_hang(&display, e->exec_id | e->flags, n, false, false);
+			test_hang(&display, e, n, false, false);
 
 		igt_subtest_f("extended-pageflip-hang-newfb-%s-%s",
 				e->name, kmstest_pipe_name(n))
-			test_hang(&display, e->exec_id | e->flags, n, false, true);
+			test_hang(&display, e, n, false, true);
 
 		igt_subtest_f("extended-modeset-hang-oldfb-%s-%s",
 				e->name, kmstest_pipe_name(n))
-			test_hang(&display, e->exec_id | e->flags, n, true, false);
+			test_hang(&display, e, n, true, false);
 
 		igt_subtest_f("extended-modeset-hang-newfb-%s-%s",
 				e->name, kmstest_pipe_name(n))
-			test_hang(&display, e->exec_id | e->flags, n, true, true);
+			test_hang(&display, e, n, true, true);
 
 		igt_subtest_f("extended-modeset-hang-oldfb-with-reset-%s-%s",
 				e->name, kmstest_pipe_name(n)) {
 			igt_set_module_param_int("force_reset_modeset_test", 1);
 
-			test_hang(&display, e->exec_id | e->flags, n, true, false);
+			test_hang(&display, e, n, true, false);
 
 			igt_set_module_param_int("force_reset_modeset_test", 0);
 		}
@@ -379,7 +379,7 @@ igt_main
 				e->name, kmstest_pipe_name(n)) {
 			igt_set_module_param_int("force_reset_modeset_test", 1);
 
-			test_hang(&display, e->exec_id | e->flags, n, true, true);
+			test_hang(&display, e, n, true, true);
 
 			igt_set_module_param_int("force_reset_modeset_test", 0);
 		}
-- 
2.19.1

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[igt-dev] [RFC v2 39/43] tests/prime_busy: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/prime_busy.c | 24 +++++++++++++-----------
 1 file changed, 13 insertions(+), 11 deletions(-)

diff --git a/tests/prime_busy.c b/tests/prime_busy.c
index a82acbdbc27e..661da2a56688 100644
--- a/tests/prime_busy.c
+++ b/tests/prime_busy.c
@@ -24,6 +24,7 @@
 #include "igt.h"
 
 #include <sys/poll.h>
+#include <i915/gem_engine_topology.h>
 
 IGT_TEST_DESCRIPTION("Basic check of polling for prime fences.");
 
@@ -38,7 +39,8 @@ static bool prime_busy(struct pollfd *pfd, bool excl)
 #define HANG 0x4
 #define POLL 0x8
 
-static void busy(int fd, unsigned ring, unsigned flags)
+static void busy(int fd, const struct intel_execution_engine2 *e,
+		 unsigned flags)
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
 	struct drm_i915_gem_exec_object2 obj[2];
@@ -57,7 +59,7 @@ static void busy(int fd, unsigned ring, unsigned flags)
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = (uintptr_t)obj;
 	execbuf.buffer_count = 2;
-	execbuf.flags = ring;
+	execbuf.flags = e->flags;
 	if (gen < 6)
 		execbuf.flags |= I915_EXEC_SECURE;
 
@@ -175,15 +177,15 @@ static void busy(int fd, unsigned ring, unsigned flags)
 }
 
 static void test_engine_mode(int fd,
-			     const struct intel_execution_engine *e,
+			     const struct intel_execution_engine2 *e,
 			     const char *name, unsigned int flags)
 {
 	igt_hang_t hang = {};
 
 	igt_subtest_group {
 		igt_fixture {
-			gem_require_ring(fd, e->exec_id | e->flags);
-			igt_require(gem_can_store_dword(fd, e->exec_id | e->flags));
+			gem_require_ring(fd, e->flags);
+			igt_require(gem_class_can_store_dword(fd, e->class));
 
 			if ((flags & HANG) == 0)
 			{
@@ -197,14 +199,14 @@ static void test_engine_mode(int fd,
 		}
 
 		igt_subtest_f("%s%s-%s",
-			      !e->exec_id && !(flags & HANG) ? "basic-" : "",
+			      !(flags & HANG) ? "basic-" : "",
 			      name, e->name)
-			busy(fd, e->exec_id | e->flags, flags);
+			busy(fd, e, flags);
 
 		igt_subtest_f("%swait-%s-%s",
-			      !e->exec_id && !(flags & HANG) ? "basic-" : "",
+			      !(flags & HANG) ? "basic-" : "",
 			      name, e->name)
-			busy(fd, e->exec_id | e->flags, flags | POLL);
+			busy(fd, e, flags | POLL);
 
 		igt_fixture {
 			if ((flags & HANG) == 0)
@@ -217,7 +219,7 @@ static void test_engine_mode(int fd,
 
 igt_main
 {
-	const struct intel_execution_engine *e;
+	const struct intel_execution_engine2 *e;
 	int fd = -1;
 
 	igt_fixture {
@@ -239,7 +241,7 @@ igt_main
 		igt_fixture
 			gem_require_mmap_wc(fd);
 
-		for (e = intel_execution_engines; e->name; e++) {
+		__for_each_static_engine(e) {
 			for (const struct mode *m = modes; m->name; m++)
 				test_engine_mode(fd, e, m->name, m->flags);
 		}
-- 
2.19.1

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[igt-dev] [RFC v2 40/43] tests/amdgpu/amd_prime: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/amdgpu/amd_prime.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/tests/amdgpu/amd_prime.c b/tests/amdgpu/amd_prime.c
index dc71ac70c9fc..cd2367ffd53e 100644
--- a/tests/amdgpu/amd_prime.c
+++ b/tests/amdgpu/amd_prime.c
@@ -173,14 +173,15 @@ static void i915_to_amd(int i915, int amd, amdgpu_device_handle device)
 	const uint32_t bbe = MI_BATCH_BUFFER_END;
 	struct drm_i915_gem_exec_object2 obj[2];
 	struct drm_i915_gem_execbuffer2 execbuf;
-	unsigned int engines[16], engine;
+	unsigned int engines[16];
+        const struct intel_execution_engine2 *engine;
 	unsigned int nengine;
 	unsigned long count;
 	struct cork c;
 
 	nengine = 0;
-	for_each_physical_engine(i915, engine)
-		engines[nengine++] = engine;
+	__for_each_physical_engine(i915, engine)
+		engines[nengine++] = engine->flags;
 	igt_require(nengine);
 
 	memset(obj, 0, sizeof(obj));
-- 
2.19.1

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[igt-dev] [RFC v2 41/43] tests/i915/gem_ctx_shared: use the gem_engine_topology library

[Ramalingam C]

Replace the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 tests/i915/gem_ctx_shared.c | 105 ++++++++++++++++++------------------
 1 file changed, 53 insertions(+), 52 deletions(-)

diff --git a/tests/i915/gem_ctx_shared.c b/tests/i915/gem_ctx_shared.c
index 4b1020b96fed..324959939fd4 100644
--- a/tests/i915/gem_ctx_shared.c
+++ b/tests/i915/gem_ctx_shared.c
@@ -181,7 +181,7 @@ static void exhaust_shared_gtt(int i915, unsigned int flags)
 	igt_waitchildren();
 }
 
-static void exec_shared_gtt(int i915, unsigned int ring)
+static void exec_shared_gtt(int i915, const struct intel_execution_engine2 *e)
 {
 	const int gen = intel_gen(intel_get_drm_devid(i915));
 	const uint32_t bbe = MI_BATCH_BUFFER_END;
@@ -189,14 +189,13 @@ static void exec_shared_gtt(int i915, unsigned int ring)
 	struct drm_i915_gem_execbuffer2 execbuf = {
 		.buffers_ptr = to_user_pointer(&obj),
 		.buffer_count = 1,
-		.flags = ring,
+		.flags = e->flags,
 	};
 	uint32_t scratch, *s;
 	uint32_t batch[16];
 	int i;
 
-	gem_require_ring(i915, ring);
-	igt_require(gem_can_store_dword(i915, ring));
+	igt_require(gem_class_can_store_dword(i915, e->class));
 
 	/* Find a hole big enough for both objects later */
 	scratch = gem_create(i915, 16384);
@@ -310,7 +309,7 @@ static void single_timeline(int i915)
 	struct sync_file_info sync_file_info = {
 		.num_fences = 1,
 	};
-	unsigned int engine;
+	const struct intel_execution_engine2 *engine;
 	int n;
 
 	igt_require(has_single_timeline(i915));
@@ -331,7 +330,7 @@ static void single_timeline(int i915)
 				  I915_CONTEXT_CREATE_FLAGS_SINGLE_TIMELINE);
 	execbuf.flags = I915_EXEC_FENCE_OUT;
 	n = 0;
-	for_each_engine(i915, engine) {
+	for_each_context_engine(i915, 0, engine) {
 		gem_execbuf_wr(i915, &execbuf);
 		sync_file_info.sync_fence_info = to_user_pointer(&rings[n]);
 		do_ioctl(execbuf.rsvd2 >> 32, SYNC_IOC_FILE_INFO, &sync_file_info);
@@ -350,13 +349,14 @@ static void single_timeline(int i915)
 	}
 }
 
-static void exec_single_timeline(int i915, unsigned int engine)
+static void exec_single_timeline(int i915,
+				 const struct intel_execution_engine2 *engine)
 {
-	unsigned int other;
+	const struct intel_execution_engine2 *other;
 	igt_spin_t *spin;
 	uint32_t ctx;
 
-	igt_require(gem_ring_has_physical_engine(i915, engine));
+	igt_require(gem_ring_has_physical_engine(i915, engine->flags));
 	igt_require(has_single_timeline(i915));
 
 	/*
@@ -365,24 +365,24 @@ static void exec_single_timeline(int i915, unsigned int engine)
 	 */
 	ctx = 0;
 	spin = NULL;
-	for_each_physical_engine(i915, other) {
+	__for_each_physical_engine(i915, other) {
 		if (other == engine)
 			continue;
 
 		if (spin == NULL) {
-			spin = __igt_spin_new(i915, .ctx = ctx, .engine = other);
+			spin = __igt_spin_new(i915, .ctx = ctx, .engine = other->flags);
 		} else {
 			struct drm_i915_gem_execbuffer2 execbuf = {
 				.buffers_ptr = spin->execbuf.buffers_ptr,
 				.buffer_count = spin->execbuf.buffer_count,
-				.flags = other,
+				.flags = other->flags,
 				.rsvd1 = ctx,
 			};
 			gem_execbuf(i915, &execbuf);
 		}
 	}
 	igt_require(spin);
-	igt_assert_eq(nop_sync(i915, ctx, engine, NSEC_PER_SEC), 0);
+	igt_assert_eq(nop_sync(i915, ctx, engine->flags, NSEC_PER_SEC), 0);
 	igt_spin_free(i915, spin);
 
 	/*
@@ -393,24 +393,24 @@ static void exec_single_timeline(int i915, unsigned int engine)
 	ctx = gem_context_clone(i915, 0, 0,
 				I915_CONTEXT_CREATE_FLAGS_SINGLE_TIMELINE);
 	spin = NULL;
-	for_each_physical_engine(i915, other) {
+	__for_each_physical_engine(i915, other) {
 		if (other == engine)
 			continue;
 
 		if (spin == NULL) {
-			spin = __igt_spin_new(i915, .ctx = ctx, .engine = other);
+			spin = __igt_spin_new(i915, .ctx = ctx, .engine = other->flags);
 		} else {
 			struct drm_i915_gem_execbuffer2 execbuf = {
 				.buffers_ptr = spin->execbuf.buffers_ptr,
 				.buffer_count = spin->execbuf.buffer_count,
-				.flags = other,
+				.flags = other->flags,
 				.rsvd1 = ctx,
 			};
 			gem_execbuf(i915, &execbuf);
 		}
 	}
 	igt_assert(spin);
-	igt_assert_eq(nop_sync(i915, ctx, engine, NSEC_PER_SEC), -ETIME);
+	igt_assert_eq(nop_sync(i915, ctx, engine->flags, NSEC_PER_SEC), -ETIME);
 	igt_spin_free(i915, spin);
 }
 
@@ -542,7 +542,8 @@ static uint32_t store_timestamp(int i915,
 	return obj.handle;
 }
 
-static void independent(int i915, unsigned ring, unsigned flags)
+static void independent(int i915, const struct intel_execution_engine2 *e,
+			unsigned flags)
 {
 	const int TIMESTAMP = 1023;
 	uint32_t handle[ARRAY_SIZE(priorities)];
@@ -550,7 +551,7 @@ static void independent(int i915, unsigned ring, unsigned flags)
 	unsigned int mmio_base;
 
 	/* XXX i915_query()! */
-	switch (ring) {
+	switch (e->flags) {
 	case I915_EXEC_DEFAULT:
 	case I915_EXEC_RENDER:
 		mmio_base = 0x2000;
@@ -580,7 +581,7 @@ static void independent(int i915, unsigned ring, unsigned flags)
 	for (int n = 0; n < ARRAY_SIZE(spin); n++) {
 		const struct igt_spin_factory opts = {
 			.ctx = create_highest_priority(i915),
-			.engine = ring,
+			.engine = e->flags,
 		};
 		spin[n] = __igt_spin_factory(i915, &opts);
 		gem_context_destroy(i915, opts.ctx);
@@ -589,7 +590,7 @@ static void independent(int i915, unsigned ring, unsigned flags)
 	for (int i = 0; i < ARRAY_SIZE(priorities); i++) {
 		uint32_t ctx = gem_queue_create(i915);
 		gem_context_set_priority(i915, ctx, priorities[i]);
-		handle[i] = store_timestamp(i915, ctx, ring, mmio_base, TIMESTAMP);
+		handle[i] = store_timestamp(i915, ctx, e->flags, mmio_base, TIMESTAMP);
 		gem_context_destroy(i915, ctx);
 	}
 
@@ -614,7 +615,8 @@ static void independent(int i915, unsigned ring, unsigned flags)
 	igt_assert((int32_t)(handle[HI] - handle[LO]) < 0);
 }
 
-static void reorder(int i915, unsigned ring, unsigned flags)
+static void reorder(int i915, const struct intel_execution_engine2 *e,
+		    unsigned flags)
 #define EQUAL 1
 {
 	IGT_CORK_HANDLE(cork);
@@ -635,10 +637,10 @@ static void reorder(int i915, unsigned ring, unsigned flags)
 	/* We expect the high priority context to be executed first, and
 	 * so the final result will be value from the low priority context.
 	 */
-	store_dword(i915, ctx[LO], ring, scratch, 0, ctx[LO], plug, 0);
-	store_dword(i915, ctx[HI], ring, scratch, 0, ctx[HI], plug, 0);
+	store_dword(i915, ctx[LO], e->flags, scratch, 0, ctx[LO], plug, 0);
+	store_dword(i915, ctx[HI], e->flags, scratch, 0, ctx[HI], plug, 0);
 
-	unplug_show_queue(i915, &cork, ring);
+	unplug_show_queue(i915, &cork, e->flags);
 	gem_close(i915, plug);
 
 	gem_context_destroy(i915, ctx[LO]);
@@ -656,7 +658,7 @@ static void reorder(int i915, unsigned ring, unsigned flags)
 	munmap(ptr, 4096);
 }
 
-static void promotion(int i915, unsigned ring)
+static void promotion(int i915, const struct intel_execution_engine2 *e)
 {
 	IGT_CORK_HANDLE(cork);
 	uint32_t result, dep;
@@ -683,16 +685,16 @@ static void promotion(int i915, unsigned ring)
 	 * fifo would be NOISE, LO, HI.
 	 * strict priority would be  HI, NOISE, LO
 	 */
-	store_dword(i915, ctx[NOISE], ring, result, 0, ctx[NOISE], plug, 0);
-	store_dword(i915, ctx[LO], ring, result, 0, ctx[LO], plug, 0);
+	store_dword(i915, ctx[NOISE], e->flags, result, 0, ctx[NOISE], plug, 0);
+	store_dword(i915, ctx[LO], e->flags, result, 0, ctx[LO], plug, 0);
 
 	/* link LO <-> HI via a dependency on another buffer */
-	store_dword(i915, ctx[LO], ring, dep, 0, ctx[LO], 0, I915_GEM_DOMAIN_INSTRUCTION);
-	store_dword(i915, ctx[HI], ring, dep, 0, ctx[HI], 0, 0);
+	store_dword(i915, ctx[LO], e->flags, dep, 0, ctx[LO], 0, I915_GEM_DOMAIN_INSTRUCTION);
+	store_dword(i915, ctx[HI], e->flags, dep, 0, ctx[HI], 0, 0);
 
-	store_dword(i915, ctx[HI], ring, result, 0, ctx[HI], 0, 0);
+	store_dword(i915, ctx[HI], e->flags, result, 0, ctx[HI], 0, 0);
 
-	unplug_show_queue(i915, &cork, ring);
+	unplug_show_queue(i915, &cork, e->flags);
 	gem_close(i915, plug);
 
 	gem_context_destroy(i915, ctx[NOISE]);
@@ -716,18 +718,18 @@ static void promotion(int i915, unsigned ring)
 	munmap(ptr, 4096);
 }
 
-static void smoketest(int i915, unsigned ring, unsigned timeout)
+static void smoketest(int i915, unsigned timeout)
 {
 	const int ncpus = sysconf(_SC_NPROCESSORS_ONLN);
 	unsigned engines[16];
 	unsigned nengine;
-	unsigned engine;
+	const struct intel_execution_engine2 *engine;
 	uint32_t scratch;
 	uint32_t *ptr;
 
 	nengine = 0;
-	for_each_physical_engine(i915, engine)
-		engines[nengine++] = engine;
+	__for_each_physical_engine(i915, engine)
+		engines[nengine++] = engine->flags;
 	igt_require(nengine);
 
 	scratch = gem_create(i915, 4096);
@@ -740,16 +742,17 @@ static void smoketest(int i915, unsigned ring, unsigned timeout)
 		ctx = gem_queue_create(i915);
 		igt_until_timeout(timeout) {
 			int prio;
+			unsigned flags;
 
 			prio = hars_petruska_f54_1_random_unsafe_max(MAX_PRIO - MIN_PRIO) + MIN_PRIO;
 			gem_context_set_priority(i915, ctx, prio);
 
-			engine = engines[hars_petruska_f54_1_random_unsafe_max(nengine)];
-			store_dword(i915, ctx, engine, scratch,
+			flags = engines[hars_petruska_f54_1_random_unsafe_max(nengine)];
+			store_dword(i915, ctx, flags, scratch,
 				    8*child + 0, ~child,
 				    0, 0);
 			for (unsigned int step = 0; step < 8; step++)
-				store_dword(i915, ctx, engine, scratch,
+				store_dword(i915, ctx, flags, scratch,
 					    8*child + 4, count++,
 					    0, 0);
 		}
@@ -777,7 +780,7 @@ static void smoketest(int i915, unsigned ring, unsigned timeout)
 
 igt_main
 {
-	const struct intel_execution_engine *e;
+	const struct intel_execution_engine2 *e;
 	int i915 = -1;
 
 	igt_fixture {
@@ -809,13 +812,12 @@ igt_main
 		igt_subtest("exhaust-shared-gtt-lrc")
 			exhaust_shared_gtt(i915, EXHAUST_LRC);
 
-		for (e = intel_execution_engines; e->name; e++) {
+		__for_each_physical_engine(i915, e) {
 			igt_subtest_f("exec-shared-gtt-%s", e->name)
-				exec_shared_gtt(i915, e->exec_id | e->flags);
+				exec_shared_gtt(i915, e);
 
 			igt_subtest_f("exec-single-timeline-%s", e->name)
-				exec_single_timeline(i915,
-						     e->exec_id | e->flags);
+				exec_single_timeline(i915, e);
 
 			/*
 			 * Check that the shared contexts operate independently,
@@ -826,33 +828,32 @@ igt_main
 			 */
 			igt_subtest_group {
 				igt_fixture {
-					gem_require_ring(i915, e->exec_id | e->flags);
-					igt_require(gem_can_store_dword(i915, e->exec_id | e->flags));
+					igt_require(gem_class_can_store_dword(i915, e->class));
 					igt_require(gem_scheduler_enabled(i915));
 					igt_require(gem_scheduler_has_ctx_priority(i915));
 				}
 
 				igt_subtest_f("Q-independent-%s", e->name)
-					independent(i915, e->exec_id | e->flags, 0);
+					independent(i915, e, 0);
 
 				igt_subtest_f("Q-in-order-%s", e->name)
-					reorder(i915, e->exec_id | e->flags, EQUAL);
+					reorder(i915, e, EQUAL);
 
 				igt_subtest_f("Q-out-order-%s", e->name)
-					reorder(i915, e->exec_id | e->flags, 0);
+					reorder(i915, e, 0);
 
 				igt_subtest_f("Q-promotion-%s", e->name)
-					promotion(i915, e->exec_id | e->flags);
+					promotion(i915, e);
 
 				igt_subtest_f("Q-smoketest-%s", e->name)
-					smoketest(i915, e->exec_id | e->flags, 5);
+					smoketest(i915, 5);
 			}
 		}
 
 		igt_subtest("Q-smoketest-all") {
 			igt_require(gem_scheduler_enabled(i915));
 			igt_require(gem_scheduler_has_ctx_priority(i915));
-			smoketest(i915, -1, 30);
+			smoketest(i915, 30);
 		}
 
 		igt_fixture {
-- 
2.19.1

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[igt-dev] [RFC v2 42/43] lib: replace the legacy funcs with gem_engine_topology libraries

[Ramalingam C]

All legacy functions are replaced with the functions from the
gem_engine_topology library.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 benchmarks/gem_syslatency.c |  7 ++++---
 lib/i915/gem_ring.c         |  7 +++++--
 lib/i915/gem_submission.c   |  6 ++++--
 lib/igt_gt.c                | 11 -----------
 lib/igt_gt.h                | 21 ---------------------
 5 files changed, 13 insertions(+), 39 deletions(-)

diff --git a/benchmarks/gem_syslatency.c b/benchmarks/gem_syslatency.c
index 7671dc43efe9..01ddbf67ea3f 100644
--- a/benchmarks/gem_syslatency.c
+++ b/benchmarks/gem_syslatency.c
@@ -100,14 +100,15 @@ static void *gem_busyspin(void *arg)
 		bs->sz ? bs->sz + sizeof(bbe) : bs->leak ? 16 << 20 : 4 << 10;
 	unsigned engines[16];
 	unsigned nengine;
-	unsigned engine;
+	const struct intel_execution_engine2 *engine;
 	int fd;
 
 	fd = drm_open_driver(DRIVER_INTEL);
 
 	nengine = 0;
-	for_each_engine(fd, engine)
-		if (!ignore_engine(fd, engine)) engines[nengine++] = engine;
+	for_each_context_engine(fd, 0, engine)
+		if (!ignore_engine(fd, engine->flags))
+			engines[nengine++] = engine->flags;
 
 	memset(obj, 0, sizeof(obj));
 	obj[0].handle = gem_create(fd, 4096);
diff --git a/lib/i915/gem_ring.c b/lib/i915/gem_ring.c
index fdb9fc1b13fe..e050e4c90844 100644
--- a/lib/i915/gem_ring.c
+++ b/lib/i915/gem_ring.c
@@ -33,6 +33,8 @@
 #include "igt_dummyload.h"
 #include "igt_gt.h"
 
+#include <i915/gem_engine_topology.h>
+
 static int __execbuf(int fd, struct drm_i915_gem_execbuffer2 *execbuf)
 {
 	int err;
@@ -141,9 +143,10 @@ gem_measure_ring_inflight(int fd, unsigned int engine, enum measure_ring_flags f
 {
 	if (engine == ALL_ENGINES) {
 		unsigned int global_min = ~0u;
+		const struct intel_execution_engine2 *e;
 
-		for_each_physical_engine(fd, engine) {
-			unsigned int engine_min = __gem_measure_ring_inflight(fd, engine, flags);
+		for_each_context_engine(fd, 0, e) {
+			unsigned int engine_min = __gem_measure_ring_inflight(fd, e->flags, flags);
 
 			if (engine_min < global_min)
 				global_min = engine_min;
diff --git a/lib/i915/gem_submission.c b/lib/i915/gem_submission.c
index 2fd460d5ed2b..9bfb91b89f80 100644
--- a/lib/i915/gem_submission.c
+++ b/lib/i915/gem_submission.c
@@ -36,6 +36,7 @@
 #include "ioctl_wrappers.h"
 
 #include "i915/gem_submission.h"
+#include "i915/gem_engine_topology.h"
 
 /**
  * SECTION:gem_submission
@@ -207,6 +208,7 @@ void gem_test_engine(int i915, unsigned int engine)
 		.buffers_ptr = to_user_pointer(&obj),
 		.buffer_count = 1,
 	};
+	const struct intel_execution_engine2 *e;
 
 	i915 = gem_reopen_driver(i915);
 	igt_assert(!is_wedged(i915));
@@ -215,8 +217,8 @@ void gem_test_engine(int i915, unsigned int engine)
 	gem_write(i915, obj.handle, 0, &bbe, sizeof(bbe));
 
 	if (engine == ALL_ENGINES) {
-		for_each_physical_engine(i915, engine) {
-			execbuf.flags = engine;
+		__for_each_physical_engine(i915, e) {
+			execbuf.flags = e->flags;
 			gem_execbuf(i915, &execbuf);
 		}
 	} else {
diff --git a/lib/igt_gt.c b/lib/igt_gt.c
index 78e3cd08925b..e89058a93f9c 100644
--- a/lib/igt_gt.c
+++ b/lib/igt_gt.c
@@ -546,17 +546,6 @@ unsigned intel_detect_and_clear_missed_interrupts(int fd)
 	return missed;
 }
 
-const struct intel_execution_engine intel_execution_engines[] = {
-	{ "default", NULL, 0, 0 },
-	{ "render", "rcs0", I915_EXEC_RENDER, 0 },
-	{ "bsd", "vcs0", I915_EXEC_BSD, 0 },
-	{ "bsd1", "vcs0", I915_EXEC_BSD, 1<<13 /*I915_EXEC_BSD_RING1*/ },
-	{ "bsd2", "vcs1", I915_EXEC_BSD, 2<<13 /*I915_EXEC_BSD_RING2*/ },
-	{ "blt", "bcs0", I915_EXEC_BLT, 0 },
-	{ "vebox", "vecs0", I915_EXEC_VEBOX, 0 },
-	{ NULL, 0, 0 }
-};
-
 bool gem_class_can_store_dword(int fd, int class)
 {
 	uint16_t devid = intel_get_drm_devid(fd);
diff --git a/lib/igt_gt.h b/lib/igt_gt.h
index 73b5002a04bd..4ad5d892579a 100644
--- a/lib/igt_gt.h
+++ b/lib/igt_gt.h
@@ -65,27 +65,6 @@ unsigned intel_detect_and_clear_missed_interrupts(int fd);
 
 #define ALL_ENGINES ~0u /* Use in interfaces to iterate all engines */
 
-extern const struct intel_execution_engine {
-	const char *name;
-	const char *full_name;
-	unsigned exec_id;
-	unsigned flags;
-} intel_execution_engines[];
-
-#define for_if(expr__) if (!(expr__)) {} else
-
-#define for_each_engine(fd__, flags__) \
-	for (const struct intel_execution_engine *e__ = intel_execution_engines;\
-	     e__->name; \
-	     e__++) \
-		for_if (gem_has_ring(fd__, flags__ = e__->exec_id | e__->flags))
-
-#define for_each_physical_engine(fd__, flags__) \
-	for (const struct intel_execution_engine *e__ = intel_execution_engines;\
-	     e__->name; \
-	     e__++) \
-		for_if (gem_ring_has_physical_engine(fd__, flags__ = e__->exec_id | e__->flags))
-
 bool gem_ring_is_physical_engine(int fd, unsigned int ring);
 bool gem_ring_has_physical_engine(int fd, unsigned int ring);
 
-- 
2.19.1

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[igt-dev] [RFC v2 43/43] lib/gem_engine_topology: rename the macros

[Ramalingam C]

%s/__for_each_physical_engine/for_each_physical_engine
%s/__for_each_static_engine/for_each_static_engine

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 lib/i915/gem_engine_topology.c  |  6 ++---
 lib/i915/gem_engine_topology.h  |  4 ++--
 lib/i915/gem_submission.c       |  2 +-
 tests/amdgpu/amd_prime.c        |  2 +-
 tests/i915/gem_bad_reloc.c      |  2 +-
 tests/i915/gem_busy.c           | 20 ++++++++---------
 tests/i915/gem_concurrent_all.c |  2 +-
 tests/i915/gem_cs_prefetch.c    |  2 +-
 tests/i915/gem_cs_tlb.c         |  2 +-
 tests/i915/gem_ctx_create.c     |  4 ++--
 tests/i915/gem_ctx_engines.c    | 10 ++++-----
 tests/i915/gem_ctx_exec.c       |  2 +-
 tests/i915/gem_ctx_shared.c     |  8 +++----
 tests/i915/gem_ctx_switch.c     |  4 ++--
 tests/i915/gem_ctx_thrash.c     |  4 ++--
 tests/i915/gem_eio.c            | 12 +++++-----
 tests/i915/gem_exec_async.c     |  4 ++--
 tests/i915/gem_exec_await.c     |  2 +-
 tests/i915/gem_exec_basic.c     |  8 +++----
 tests/i915/gem_exec_capture.c   |  2 +-
 tests/i915/gem_exec_create.c    |  2 +-
 tests/i915/gem_exec_fence.c     | 12 +++++-----
 tests/i915/gem_exec_flush.c     |  2 +-
 tests/i915/gem_exec_gttfill.c   |  4 ++--
 tests/i915/gem_exec_latency.c   |  6 ++---
 tests/i915/gem_exec_nop.c       | 16 ++++++-------
 tests/i915/gem_exec_parallel.c  |  4 ++--
 tests/i915/gem_exec_params.c    |  4 ++--
 tests/i915/gem_exec_reloc.c     |  4 ++--
 tests/i915/gem_exec_reuse.c     |  2 +-
 tests/i915/gem_exec_schedule.c  | 40 ++++++++++++++++-----------------
 tests/i915/gem_exec_store.c     |  4 ++--
 tests/i915/gem_exec_suspend.c   |  6 ++---
 tests/i915/gem_exec_whisper.c   |  4 ++--
 tests/i915/gem_mocs_settings.c  |  2 +-
 tests/i915/gem_reset_stats.c    |  6 ++---
 tests/i915/gem_ring_sync_loop.c |  2 +-
 tests/i915/gem_ringfill.c       |  2 +-
 tests/i915/gem_shrink.c         |  4 ++--
 tests/i915/gem_spin_batch.c     |  6 ++---
 tests/i915/gem_storedw_loop.c   |  2 +-
 tests/i915/gem_sync.c           | 24 ++++++++++----------
 tests/i915/gem_userptr_blits.c  |  2 +-
 tests/i915/gem_wait.c           |  4 ++--
 tests/i915/i915_hangman.c       |  2 +-
 tests/i915/i915_module_load.c   |  4 ++--
 tests/perf_pmu.c                | 12 +++++-----
 tests/prime_busy.c              |  2 +-
 tests/prime_vgem.c              |  4 ++--
 49 files changed, 145 insertions(+), 145 deletions(-)

diff --git a/lib/i915/gem_engine_topology.c b/lib/i915/gem_engine_topology.c
index c64f7a4d05bb..4dd84c9cf4f7 100644
--- a/lib/i915/gem_engine_topology.c
+++ b/lib/i915/gem_engine_topology.c
@@ -116,7 +116,7 @@ static void init_engine(struct intel_execution_engine2 *e2,
 		return;
 	}
 
-	__for_each_static_engine(__e2)
+	for_each_static_engine(__e2)
 		if (__e2->class == class && __e2->instance == instance)
 			break;
 
@@ -219,7 +219,7 @@ struct intel_engine_data intel_init_engine_list(int fd, uint32_t ctx_id)
 
 		igt_debug("using pre-allocated engine list\n");
 
-		__for_each_static_engine(e2) {
+		for_each_static_engine(e2) {
 			struct intel_execution_engine2 *__e2 =
 				&engine_data.engines[engine_data.nengines];
 
@@ -298,7 +298,7 @@ int gem_engine_class_to_execbuf_flags(int fd, uint32_t ctx_id, int class)
 	int i;
 
 	if (gem_topology_get_param(fd, &param)) {
-		__for_each_static_engine(e) {
+		for_each_static_engine(e) {
 			if (e->class == class)
 				return e->flags;
 		}
diff --git a/lib/i915/gem_engine_topology.h b/lib/i915/gem_engine_topology.h
index aa934622cab0..f11e4b96a6bc 100644
--- a/lib/i915/gem_engine_topology.h
+++ b/lib/i915/gem_engine_topology.h
@@ -55,7 +55,7 @@ void gem_context_set_all_engines(int fd, uint32_t ctx);
 
 int gem_engine_class_to_execbuf_flags(int fd, uint32_t ctx_id, int class);
 
-#define __for_each_static_engine(e__) \
+#define for_each_static_engine(e__) \
 	for ((e__) = intel_execution_engines2; (e__)->name; (e__)++)
 
 #define for_each_context_engine(fd__, ctx__, e__) \
@@ -64,7 +64,7 @@ int gem_engine_class_to_execbuf_flags(int fd, uint32_t ctx_id, int class);
 	     intel_next_engine(&i__))
 
 /* needs to replace "for_each_physical_engine" when conflicts are fixed */
-#define __for_each_physical_engine(fd__, e__) \
+#define for_each_physical_engine(fd__, e__) \
 	for (struct intel_engine_data i__ = intel_init_engine_list(fd__, 0); \
 	     ((e__) = intel_get_current_physical_engine(&i__)); \
 	     intel_next_engine(&i__))
diff --git a/lib/i915/gem_submission.c b/lib/i915/gem_submission.c
index 9bfb91b89f80..0185dbbddb68 100644
--- a/lib/i915/gem_submission.c
+++ b/lib/i915/gem_submission.c
@@ -217,7 +217,7 @@ void gem_test_engine(int i915, unsigned int engine)
 	gem_write(i915, obj.handle, 0, &bbe, sizeof(bbe));
 
 	if (engine == ALL_ENGINES) {
-		__for_each_physical_engine(i915, e) {
+		for_each_physical_engine(i915, e) {
 			execbuf.flags = e->flags;
 			gem_execbuf(i915, &execbuf);
 		}
diff --git a/tests/amdgpu/amd_prime.c b/tests/amdgpu/amd_prime.c
index cd2367ffd53e..dfbc9b3720e1 100644
--- a/tests/amdgpu/amd_prime.c
+++ b/tests/amdgpu/amd_prime.c
@@ -180,7 +180,7 @@ static void i915_to_amd(int i915, int amd, amdgpu_device_handle device)
 	struct cork c;
 
 	nengine = 0;
-	__for_each_physical_engine(i915, engine)
+	for_each_physical_engine(i915, engine)
 		engines[nengine++] = engine->flags;
 	igt_require(nengine);
 
diff --git a/tests/i915/gem_bad_reloc.c b/tests/i915/gem_bad_reloc.c
index 26a932a3a933..8737391b009d 100644
--- a/tests/i915/gem_bad_reloc.c
+++ b/tests/i915/gem_bad_reloc.c
@@ -193,7 +193,7 @@ igt_main
 		igt_require_gem(fd);
 	}
 
-	__for_each_physical_engine(fd, e) {
+	for_each_physical_engine(fd, e) {
 		igt_subtest_f("negative-reloc-%s", e->name)
 			negative_reloc(fd, e, 0);
 
diff --git a/tests/i915/gem_busy.c b/tests/i915/gem_busy.c
index f66134802137..68f4be977c61 100644
--- a/tests/i915/gem_busy.c
+++ b/tests/i915/gem_busy.c
@@ -134,7 +134,7 @@ static void semaphore(int fd, const struct intel_execution_engine2 *e)
 
 	/* Now queue it for a read across all available rings */
 	active = 0;
-	__for_each_physical_engine(fd, __e) {
+	for_each_physical_engine(fd, __e) {
 		if (exec_noop(fd, handle, __e->flags, false))
 			active |= 1 << __e->class;
 	}
@@ -251,7 +251,7 @@ static void one(int fd, const struct intel_execution_engine2 *e, unsigned test_f
 	if (test_flags & PARALLEL) {
 		struct intel_execution_engine2 *e2;
 
-		__for_each_physical_engine(fd, e2) {
+		for_each_physical_engine(fd, e2) {
 			if (e2->class == e->class &&
 			    e2->instance == e->instance)
 				continue;
@@ -320,7 +320,7 @@ static void close_race(int fd)
 	 */
 
 	nengine = 0;
-	__for_each_static_engine(e)
+	for_each_static_engine(e)
 		engines[nengine++] = e->flags;
 	igt_require(nengine);
 
@@ -465,7 +465,7 @@ static void all(int i915)
 {
 	const struct intel_execution_engine2 *e;
 
-	__for_each_physical_engine(i915, e)
+	for_each_physical_engine(i915, e)
 		basic(i915, e, 0);
 }
 
@@ -491,7 +491,7 @@ igt_main
 			all(fd);
 		}
 
-		__for_each_physical_engine(fd, e) {
+		for_each_physical_engine(fd, e) {
 			igt_subtest_group {
 				igt_subtest_f("busy-%s", e->name) {
 					gem_quiescent_gpu(fd);
@@ -506,7 +506,7 @@ igt_main
 				gem_require_mmap_wc(fd);
 			}
 
-			__for_each_physical_engine(fd, e) {
+			for_each_physical_engine(fd, e) {
 				igt_subtest_f("extended-%s", e->name) {
 					igt_require(gem_class_can_store_dword(fd,
 						     e->class));
@@ -516,7 +516,7 @@ igt_main
 				}
 			}
 
-			__for_each_physical_engine(fd, e) {
+			for_each_physical_engine(fd, e) {
 				igt_subtest_f("extended-parallel-%s", e->name) {
 					igt_require(gem_class_can_store_dword(fd, e->class));
 
@@ -533,7 +533,7 @@ igt_main
 				igt_require(has_semaphores(fd));
 			}
 
-			__for_each_physical_engine(fd, e) {
+			for_each_physical_engine(fd, e) {
 				igt_subtest_f("extended-semaphore-%s", e->name)
 					semaphore(fd, e);
 			}
@@ -554,7 +554,7 @@ igt_main
 			hang = igt_allow_hang(fd, 0, 0);
 		}
 
-		__for_each_physical_engine(fd, e) {
+		for_each_physical_engine(fd, e) {
 			igt_subtest_f("%shang-%s",
 				      e->class == I915_ENGINE_CLASS_RENDER
 				      ? "basic-" : "", e->name) {
@@ -570,7 +570,7 @@ igt_main
 				gem_require_mmap_wc(fd);
 			}
 
-			__for_each_physical_engine(fd, e) {
+			for_each_physical_engine(fd, e) {
 				igt_subtest_f("extended-hang-%s", e->name) {
 					igt_skip_on_simulation();
 					igt_require(gem_class_can_store_dword(fd, e->class));
diff --git a/tests/i915/gem_concurrent_all.c b/tests/i915/gem_concurrent_all.c
index 8a97564063e1..da8a7008c01b 100644
--- a/tests/i915/gem_concurrent_all.c
+++ b/tests/i915/gem_concurrent_all.c
@@ -951,7 +951,7 @@ static igt_hang_t all_hang(void)
 	igt_hang_t hang = igt_hang_ring(fd, I915_EXEC_RENDER);
 	const struct intel_execution_engine2 *e;
 
-	__for_each_physical_engine(fd, e) {
+	for_each_physical_engine(fd, e) {
 		struct drm_i915_gem_execbuffer2 eb = hang.spin->execbuf;
 
 		if (e->class == I915_ENGINE_CLASS_RENDER)
diff --git a/tests/i915/gem_cs_prefetch.c b/tests/i915/gem_cs_prefetch.c
index 939d6455613e..2b925f53b8c5 100644
--- a/tests/i915/gem_cs_prefetch.c
+++ b/tests/i915/gem_cs_prefetch.c
@@ -143,7 +143,7 @@ igt_main
 
 	igt_skip_on_simulation();
 
-	__for_each_static_engine(e)
+	for_each_static_engine(e)
 		igt_subtest_f("%s", e->name)
 			test_ring(e);
 }
diff --git a/tests/i915/gem_cs_tlb.c b/tests/i915/gem_cs_tlb.c
index 13de5499f1c7..3bbfa729ecdf 100644
--- a/tests/i915/gem_cs_tlb.c
+++ b/tests/i915/gem_cs_tlb.c
@@ -150,7 +150,7 @@ igt_main
 		igt_require_gem(fd);
 	}
 
-	__for_each_physical_engine(fd, e)
+	for_each_physical_engine(fd, e)
 		igt_subtest_f("%s", e->name)
 			run_on_ring(fd, e->flags, e->name);
 
diff --git a/tests/i915/gem_ctx_create.c b/tests/i915/gem_ctx_create.c
index 0bf5adb336dc..2e28c1e04136 100644
--- a/tests/i915/gem_ctx_create.c
+++ b/tests/i915/gem_ctx_create.c
@@ -532,7 +532,7 @@ igt_main
 		igt_require_gem(fd);
 		gem_require_contexts(fd);
 
-		__for_each_physical_engine(fd, e)
+		for_each_physical_engine(fd, e)
 			all_engines[all_nengine++] = e->flags;
 		igt_require(all_nengine);
 
@@ -578,7 +578,7 @@ igt_main
 	igt_subtest("forked-active-all")
 		active(fd, NULL, 120, ncpus);
 
-	__for_each_physical_engine(fd, e) {
+	for_each_physical_engine(fd, e) {
 		igt_subtest_f("active-%s", e->name)
 			active(fd, e, 20, 1);
 		igt_subtest_f("forked-active-%s", e->name)
diff --git a/tests/i915/gem_ctx_engines.c b/tests/i915/gem_ctx_engines.c
index 8c66fb26114c..19ddf93e6ed9 100644
--- a/tests/i915/gem_ctx_engines.c
+++ b/tests/i915/gem_ctx_engines.c
@@ -193,7 +193,7 @@ static void idempotent(int i915)
 
 	idx = 0;
 	memset(&engines, 0, sizeof(engines));
-	__for_each_physical_engine(i915, e) {
+	for_each_physical_engine(i915, e) {
 		engines.engines[idx].engine_class = e->class;
 		engines.engines[idx].engine_instance = e->instance;
 		idx++;
@@ -269,7 +269,7 @@ static void execute_one(int i915)
 	gem_execbuf(i915, &execbuf);
 	gem_sync(i915, obj.handle);
 
-	__for_each_physical_engine(i915, e) {
+	for_each_physical_engine(i915, e) {
 		struct drm_i915_gem_busy busy = { .handle = obj.handle };
 
 		for (int i = -1; i <= I915_EXEC_RING_MASK; i++) {
@@ -338,7 +338,7 @@ static void execute_oneforall(int i915)
 	};
 	const struct intel_execution_engine2 *e;
 
-	__for_each_physical_engine(i915, e) {
+	for_each_physical_engine(i915, e) {
 		memset(&engines, 0, sizeof(engines));
 		for (int i = 0; i <= I915_EXEC_RING_MASK; i++) {
 			engine_class(&engines, i) = e->class;
@@ -378,7 +378,7 @@ static void execute_allforone(int i915)
 
 	i = 0;
 	memset(&engines, 0, sizeof(engines));
-	__for_each_physical_engine(i915, e) {
+	for_each_physical_engine(i915, e) {
 		engine_class(&engines, i) = e->class;
 		engine_instance(&engines, i) = e->instance;
 		i++;
@@ -387,7 +387,7 @@ static void execute_allforone(int i915)
 	gem_context_set_param(i915, &param);
 
 	i = 0;
-	__for_each_physical_engine(i915, e) {
+	for_each_physical_engine(i915, e) {
 		struct drm_i915_gem_busy busy = {};
 		igt_spin_t *spin;
 
diff --git a/tests/i915/gem_ctx_exec.c b/tests/i915/gem_ctx_exec.c
index 614a9f401931..a4adf77a9582 100644
--- a/tests/i915/gem_ctx_exec.c
+++ b/tests/i915/gem_ctx_exec.c
@@ -229,7 +229,7 @@ igt_main
 		gem_sync(fd, handle);
 	}
 
-	__for_each_physical_engine(fd, e)
+	for_each_physical_engine(fd, e)
 		igt_subtest_f("basic-invalid-context-%s", e->name)
 			invalid_context(fd, e, handle);
 
diff --git a/tests/i915/gem_ctx_shared.c b/tests/i915/gem_ctx_shared.c
index 324959939fd4..38ec118aa916 100644
--- a/tests/i915/gem_ctx_shared.c
+++ b/tests/i915/gem_ctx_shared.c
@@ -365,7 +365,7 @@ static void exec_single_timeline(int i915,
 	 */
 	ctx = 0;
 	spin = NULL;
-	__for_each_physical_engine(i915, other) {
+	for_each_physical_engine(i915, other) {
 		if (other == engine)
 			continue;
 
@@ -393,7 +393,7 @@ static void exec_single_timeline(int i915,
 	ctx = gem_context_clone(i915, 0, 0,
 				I915_CONTEXT_CREATE_FLAGS_SINGLE_TIMELINE);
 	spin = NULL;
-	__for_each_physical_engine(i915, other) {
+	for_each_physical_engine(i915, other) {
 		if (other == engine)
 			continue;
 
@@ -728,7 +728,7 @@ static void smoketest(int i915, unsigned timeout)
 	uint32_t *ptr;
 
 	nengine = 0;
-	__for_each_physical_engine(i915, engine)
+	for_each_physical_engine(i915, engine)
 		engines[nengine++] = engine->flags;
 	igt_require(nengine);
 
@@ -812,7 +812,7 @@ igt_main
 		igt_subtest("exhaust-shared-gtt-lrc")
 			exhaust_shared_gtt(i915, EXHAUST_LRC);
 
-		__for_each_physical_engine(i915, e) {
+		for_each_physical_engine(i915, e) {
 			igt_subtest_f("exec-shared-gtt-%s", e->name)
 				exec_shared_gtt(i915, e);
 
diff --git a/tests/i915/gem_ctx_switch.c b/tests/i915/gem_ctx_switch.c
index 8d6740148b22..613603dc8260 100644
--- a/tests/i915/gem_ctx_switch.c
+++ b/tests/i915/gem_ctx_switch.c
@@ -229,7 +229,7 @@ static void all(int fd, uint32_t handle, unsigned flags, int timeout)
 	int n, qlen;
 
 	nengine = 0;
-	__for_each_physical_engine(fd, e) {
+	for_each_physical_engine(fd, e) {
 		engine[nengine] = e->flags;
 		name[nengine] = e->name;
 		nengine++;
@@ -337,7 +337,7 @@ igt_main
 		igt_fork_hang_detector(fd);
 	}
 
-	__for_each_physical_engine(fd, e) {
+	for_each_physical_engine(fd, e) {
 		for (typeof(*phases) *p = phases; p->name; p++) {
 			igt_subtest_group {
 				igt_fixture {
diff --git a/tests/i915/gem_ctx_thrash.c b/tests/i915/gem_ctx_thrash.c
index d9201c3dd327..f9f03218d477 100644
--- a/tests/i915/gem_ctx_thrash.c
+++ b/tests/i915/gem_ctx_thrash.c
@@ -105,7 +105,7 @@ static void single(const char *name, bool all_engines)
 	if (all_engines) {
 		const struct intel_execution_engine2 *e;
 
-		__for_each_physical_engine(fd, e) {
+		for_each_physical_engine(fd, e) {
 			if (!gem_class_can_store_dword(fd, e->class))
 				continue;
 
@@ -231,7 +231,7 @@ static void processes(void)
 	fd = drm_open_driver(DRIVER_INTEL);
 
 	num_engines = 0;
-	__for_each_physical_engine(fd, e) {
+	for_each_physical_engine(fd, e) {
 		engines[num_engines++] = e->flags;
 		if (num_engines == ARRAY_SIZE(engines))
 			break;
diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c
index b8cd46c2b62d..c4cf6721be23 100644
--- a/tests/i915/gem_eio.c
+++ b/tests/i915/gem_eio.c
@@ -345,7 +345,7 @@ static void __test_banned(int fd)
 		}
 
 		/* Trigger a reset, making sure we are detected as guilty */
-		__for_each_physical_engine(fd, e)
+		for_each_physical_engine(fd, e)
 			if (e->class == I915_ENGINE_CLASS_RENDER) {
 				hang = spin_sync(fd, 0, e);
 				break;
@@ -389,7 +389,7 @@ static void test_wait(int fd, unsigned int flags, unsigned int wait)
 	else
 		igt_require(i915_reset_control(true));
 
-	__for_each_physical_engine(fd, e)
+	for_each_physical_engine(fd, e)
 		if (e->class == I915_ENGINE_CLASS_RENDER){
 			hang = spin_sync(fd, 0, e);
 			break;
@@ -438,7 +438,7 @@ static void test_inflight(int fd, unsigned int wait)
 	igt_require(max > 1);
 	max = min(max - 1, ARRAY_SIZE(fence));
 
-	__for_each_physical_engine(parent_fd, engine) {
+	for_each_physical_engine(parent_fd, engine) {
 		const uint32_t bbe = MI_BATCH_BUFFER_END;
 		struct drm_i915_gem_exec_object2 obj[2];
 		struct drm_i915_gem_execbuffer2 execbuf;
@@ -566,7 +566,7 @@ static void test_inflight_contexts(int fd, unsigned int wait)
 	igt_require(gem_has_exec_fence(fd));
 	gem_require_contexts(fd);
 
-	__for_each_physical_engine(parent_fd, engine) {
+	for_each_physical_engine(parent_fd, engine) {
 		const uint32_t bbe = MI_BATCH_BUFFER_END;
 		struct drm_i915_gem_exec_object2 obj[2];
 		struct drm_i915_gem_execbuffer2 execbuf;
@@ -706,7 +706,7 @@ static void test_inflight_internal(int fd, unsigned int wait)
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = to_user_pointer(obj);
 	execbuf.buffer_count = 2;
-	__for_each_physical_engine(fd, engine) {
+	for_each_physical_engine(fd, engine) {
 		execbuf.flags = engine->flags | I915_EXEC_FENCE_OUT;
 
 		gem_execbuf_wr(fd, &execbuf);
@@ -811,7 +811,7 @@ static void test_reset_stress(int fd, unsigned int flags)
 	uint32_t ctx0 = context_create_safe(fd);
 	const struct intel_execution_engine2 *engine;
 
-	__for_each_physical_engine(fd, engine)
+	for_each_physical_engine(fd, engine)
 		reset_stress(fd, ctx0, engine, flags);
 
 	gem_context_destroy(fd, ctx0);
diff --git a/tests/i915/gem_exec_async.c b/tests/i915/gem_exec_async.c
index 0da97f1f0506..b48d63a56d26 100644
--- a/tests/i915/gem_exec_async.c
+++ b/tests/i915/gem_exec_async.c
@@ -144,7 +144,7 @@ static void one(int fd, const struct intel_execution_engine2 *e)
 
 	i = 0;
 
-	__for_each_physical_engine(fd, engine) {
+	for_each_physical_engine(fd, engine) {
 		if (engine->class == e->class &&
 		    engine->instance == e->instance)
 			continue;
@@ -201,7 +201,7 @@ igt_main
 		igt_fork_hang_detector(fd);
 	}
 
-	__for_each_physical_engine(fd, e)
+	for_each_physical_engine(fd, e)
 		igt_subtest_f("concurrent-writes-%s", e->name) {
 			igt_require(gem_class_can_store_dword(fd, e->class));
 			one(fd, e);
diff --git a/tests/i915/gem_exec_await.c b/tests/i915/gem_exec_await.c
index 5a3224159948..7e49fd84b17d 100644
--- a/tests/i915/gem_exec_await.c
+++ b/tests/i915/gem_exec_await.c
@@ -80,7 +80,7 @@ static void wide(int fd, int ring_size, int timeout, unsigned int flags)
 	double time;
 
 	nengine = 0;
-	__for_each_physical_engine(fd, engine)
+	for_each_physical_engine(fd, engine)
 		engines[nengine++] = engine->flags;
 	igt_require(nengine);
 
diff --git a/tests/i915/gem_exec_basic.c b/tests/i915/gem_exec_basic.c
index 1287860be3b1..3d586a7061b4 100644
--- a/tests/i915/gem_exec_basic.c
+++ b/tests/i915/gem_exec_basic.c
@@ -118,7 +118,7 @@ static void all(int i915)
 {
 	const struct intel_execution_engine2 *e;
 
-	__for_each_physical_engine(i915, e)
+	for_each_physical_engine(i915, e)
 		noop(i915, e->flags);
 }
 
@@ -126,7 +126,7 @@ static void readonly_all(int i915)
 {
 	const struct intel_execution_engine2 *e;
 
-	__for_each_physical_engine(i915, e)
+	for_each_physical_engine(i915, e)
 		readonly(i915, e->flags);
 }
 
@@ -134,7 +134,7 @@ static void gtt_all(int i915)
 {
 	const struct intel_execution_engine2 *e;
 
-	__for_each_physical_engine(i915, e)
+	for_each_physical_engine(i915, e)
 		gtt(i915, e->flags);
 }
 
@@ -159,7 +159,7 @@ igt_main
 	igt_subtest("gtt-all")
 		gtt_all(fd);
 
-	__for_each_physical_engine(fd, e) {
+	for_each_physical_engine(fd, e) {
 		igt_subtest_f("basic-%s", e->name)
 			noop(fd, e->flags);
 		igt_subtest_f("readonly-%s", e->name)
diff --git a/tests/i915/gem_exec_capture.c b/tests/i915/gem_exec_capture.c
index c0c3b88d5fa7..59c830f6f31c 100644
--- a/tests/i915/gem_exec_capture.c
+++ b/tests/i915/gem_exec_capture.c
@@ -553,7 +553,7 @@ igt_main
 		igt_require(safer_strlen(igt_sysfs_get(dir, "error")) > 0);
 	}
 
-	__for_each_physical_engine(fd, e) {
+	for_each_physical_engine(fd, e) {
 		igt_subtest_f("capture-%s", e->name) {
 			igt_require(gem_class_can_store_dword(fd, e->class));
 			capture(fd, dir, e);
diff --git a/tests/i915/gem_exec_create.c b/tests/i915/gem_exec_create.c
index 9e21320d0221..c8c7918a683e 100644
--- a/tests/i915/gem_exec_create.c
+++ b/tests/i915/gem_exec_create.c
@@ -66,7 +66,7 @@ static void all(int fd, unsigned flags, int timeout, int ncpus)
 	const struct intel_execution_engine2 *e;
 
 	nengine = 0;
-	__for_each_physical_engine(fd, e)
+	for_each_physical_engine(fd, e)
 		engines[nengine++] = e->flags;
 	igt_require(nengine);
 
diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c
index 1f4f3bd91142..ab519258dd5d 100644
--- a/tests/i915/gem_exec_fence.c
+++ b/tests/i915/gem_exec_fence.c
@@ -265,7 +265,7 @@ static void test_fence_busy_all(int fd, unsigned flags)
 	i++;
 
 	all = -1;
-	__for_each_static_engine(e) {
+	for_each_static_engine(e) {
 		int fence, new;
 
 		execbuf.flags = e->flags | LOCAL_EXEC_FENCE_OUT;
@@ -338,7 +338,7 @@ static void test_fence_await(int fd, const struct intel_execution_engine2 *e,
 	igt_assert(spin->out_fence != -1);
 
 	i = 0;
-	__for_each_physical_engine(fd, other) {
+	for_each_physical_engine(fd, other) {
 		if (!gem_class_can_store_dword(fd, other->class))
 			continue;
 
@@ -501,7 +501,7 @@ static void test_parallel(int fd, const struct intel_execution_engine2 *e)
 	obj[BATCH].relocation_count = 1;
 
 	/* Queue all secondaries */
-	__for_each_physical_engine(fd, other) {
+	for_each_physical_engine(fd, other) {
 		if (other == e)
 			continue;
 
@@ -679,7 +679,7 @@ static void test_long_history(int fd, long ring_size, unsigned flags)
 		limit = ring_size / 3;
 
 	nengine = 0;
-	__for_each_physical_engine(fd, e)
+	for_each_physical_engine(fd, e)
 		engines[nengine++] = e->flags;
 	igt_require(nengine);
 
@@ -1194,7 +1194,7 @@ static void test_syncobj_wait(int fd)
 	gem_write(fd, obj.handle, 0, &bbe, sizeof(bbe));
 
 	n = 0;
-	__for_each_static_engine(e) {
+	for_each_static_engine(e) {
 		obj.handle = gem_create(fd, 4096);
 		gem_write(fd, obj.handle, 0, &bbe, sizeof(bbe));
 
@@ -1551,7 +1551,7 @@ igt_main
 			test_fence_busy_all(i915, WAIT | HANG);
 	}
 
-	__for_each_physical_engine(i915, e) {
+	for_each_physical_engine(i915, e) {
 		igt_subtest_group {
 			igt_fixture {
 				igt_require(gem_class_can_store_dword(i915, e->class));
diff --git a/tests/i915/gem_exec_flush.c b/tests/i915/gem_exec_flush.c
index 2f041863e238..9dfb23e817c6 100644
--- a/tests/i915/gem_exec_flush.c
+++ b/tests/i915/gem_exec_flush.c
@@ -600,7 +600,7 @@ igt_main
 		igt_fork_hang_detector(fd);
 	}
 
-	__for_each_physical_engine(fd, e) igt_subtest_group {
+	for_each_physical_engine(fd, e) igt_subtest_group {
 		unsigned timeout = 5 + 120;
 
 		igt_fixture {
diff --git a/tests/i915/gem_exec_gttfill.c b/tests/i915/gem_exec_gttfill.c
index 6140d36260f7..d67fc8e40aec 100644
--- a/tests/i915/gem_exec_gttfill.c
+++ b/tests/i915/gem_exec_gttfill.c
@@ -122,7 +122,7 @@ static void fillgtt(int fd, const struct intel_execution_engine2 *e,
 
 	nengine = 0;
 	if (!e) {
-		__for_each_physical_engine(fd, other) {
+		for_each_physical_engine(fd, other) {
 			if (!gem_class_can_store_dword(fd, other->class))
 				continue;
 
@@ -222,7 +222,7 @@ igt_main
 	igt_subtest("basic")
 		fillgtt(device, 0, 1); /* just enough to run a single pass */
 
-	__for_each_physical_engine(device, e)
+	for_each_physical_engine(device, e)
 		igt_subtest_f("%s", e->name)
 			fillgtt(device, e, 20);
 
diff --git a/tests/i915/gem_exec_latency.c b/tests/i915/gem_exec_latency.c
index 0a95c491eb56..d31dcdb1ac16 100644
--- a/tests/i915/gem_exec_latency.c
+++ b/tests/i915/gem_exec_latency.c
@@ -311,7 +311,7 @@ static void latency_from_ring(int fd,
 	reloc.presumed_offset = obj[1].offset;
 	reloc.target_handle = flags & CORK ? 1 : 0;
 
-	__for_each_physical_engine(fd, other) {
+	for_each_physical_engine(fd, other) {
 		igt_spin_t *spin = NULL;
 		IGT_CORK_HANDLE(c);
 
@@ -474,7 +474,7 @@ rthog_latency_on_ring(int fd, const struct intel_execution_engine2 *e,
 
 	nengine = 0;
 	if (!e) {
-		__for_each_physical_engine(fd, e) {
+		for_each_physical_engine(fd, e) {
 			if (!gem_class_can_store_dword(fd, e->class))
 				continue;
 
@@ -684,7 +684,7 @@ igt_main
 		igt_fixture
 			igt_require(intel_gen(intel_get_drm_devid(device)) >= 7);
 
-		__for_each_physical_engine(device, e) {
+		for_each_physical_engine(device, e) {
 			igt_subtest_group {
 				igt_subtest_f("%s-dispatch", e->name)
 					latency_on_ring(device,
diff --git a/tests/i915/gem_exec_nop.c b/tests/i915/gem_exec_nop.c
index 937ec01433b4..4cebce457b95 100644
--- a/tests/i915/gem_exec_nop.c
+++ b/tests/i915/gem_exec_nop.c
@@ -236,7 +236,7 @@ static void poll_sequential(int fd, const char *name, int timeout)
 		flags |= I915_EXEC_SECURE;
 
 	nengine = 0;
-	__for_each_physical_engine(fd, e) {
+	for_each_physical_engine(fd, e) {
 		if (!gem_class_can_store_dword(fd, e->class))
 			continue;
 
@@ -443,7 +443,7 @@ static void parallel(int fd, uint32_t handle, int timeout)
 
 	sum = 0;
 	nengine = 0;
-	__for_each_physical_engine(fd, e) {
+	for_each_physical_engine(fd, e) {
 		engines[nengine] = e->flags;
 		names[nengine] = e->name;
 		nengine++;
@@ -505,7 +505,7 @@ static void series(int fd, uint32_t handle, int timeout)
 	const char *name;
 
 	nengine = 0;
-	__for_each_physical_engine(fd, e) {
+	for_each_physical_engine(fd, e) {
 		time = nop_on_ring(fd, handle, e, 1, &count) / count;
 		if (time > max) {
 			name = e->name;
@@ -601,7 +601,7 @@ static void sequential(int fd, uint32_t handle, unsigned flags, int timeout)
 
 	nengine = 0;
 	sum = 0;
-	__for_each_physical_engine(fd, e) {
+	for_each_physical_engine(fd, e) {
 		unsigned long count;
 
 		time = nop_on_ring(fd, handle, e, 1, &count) / count;
@@ -733,7 +733,7 @@ static void fence_signal(int fd, uint32_t handle,
 
 	nengine = 0;
 	if (!e) {
-		__for_each_physical_engine(fd, other)
+		for_each_physical_engine(fd, other)
 			engines[nengine++] = other->flags;
 	} else {
 		gem_require_ring(fd, e->flags);
@@ -881,7 +881,7 @@ igt_main
 	igt_subtest("basic-sequential")
 		sequential(device, handle, 0, 5);
 
-	__for_each_physical_engine(device, e) {
+	for_each_physical_engine(device, e) {
 		igt_subtest_f("%s", e->name)
 			single(device, handle, e, e->name);
 		igt_subtest_f("signal-%s", e->name)
@@ -916,7 +916,7 @@ igt_main
 			igt_require(gem_scheduler_has_preemption(device));
 		}
 
-		__for_each_physical_engine(device, e) {
+		for_each_physical_engine(device, e) {
 			igt_subtest_f("preempt-%s", e->name)
 				preempt(device, handle, e, e->name);
 		}
@@ -927,7 +927,7 @@ igt_main
 			igt_device_set_master(device);
 		}
 
-		__for_each_physical_engine(device, e) {
+		for_each_physical_engine(device, e) {
 			/* Requires master for STORE_DWORD on gen4/5 */
 			igt_subtest_f("poll-%s", e->name)
 				poll_ring(device, e, e->name, 20);
diff --git a/tests/i915/gem_exec_parallel.c b/tests/i915/gem_exec_parallel.c
index 8a4482e52a6e..3ba067d0c8fb 100644
--- a/tests/i915/gem_exec_parallel.c
+++ b/tests/i915/gem_exec_parallel.c
@@ -172,7 +172,7 @@ static void all(int fd, struct intel_execution_engine2 *engine, unsigned flags)
 	nengine = 0;
 	if (!engine) {
 		struct intel_execution_engine2 *e;
-		__for_each_physical_engine(fd, e) {
+		for_each_physical_engine(fd, e) {
 			if (gem_class_can_store_dword(fd, e->class))
 				engines[nengine++] = e->flags;
 		}
@@ -254,7 +254,7 @@ igt_main
 			/* NULL value means all engines */
 			all(fd, NULL, m->flags);
 
-	__for_each_physical_engine(fd, e) {
+	for_each_physical_engine(fd, e) {
 		for (const struct mode *m = modes; m->name; m++)
 			igt_subtest_f("%s%s%s",
 				      e->name,
diff --git a/tests/i915/gem_exec_params.c b/tests/i915/gem_exec_params.c
index 3bc5b0a9d531..7659af432287 100644
--- a/tests/i915/gem_exec_params.c
+++ b/tests/i915/gem_exec_params.c
@@ -211,7 +211,7 @@ igt_main
 	}
 
 	igt_subtest("control") {
-		__for_each_physical_engine(fd, e) {
+		for_each_physical_engine(fd, e) {
 			execbuf.flags = e->flags;
 			gem_execbuf(fd, &execbuf);
 		}
@@ -362,7 +362,7 @@ igt_main
 	igt_subtest("rs-invalid") {
 		bool has_rs = has_resource_streamer(fd);
 
-		__for_each_physical_engine(fd, e) {
+		for_each_physical_engine(fd, e) {
 			int expect = -EINVAL;
 			if (has_rs && (e->class == I915_ENGINE_CLASS_RENDER))
 				expect = 0;
diff --git a/tests/i915/gem_exec_reloc.c b/tests/i915/gem_exec_reloc.c
index 541279ef5243..7983bd86e39d 100644
--- a/tests/i915/gem_exec_reloc.c
+++ b/tests/i915/gem_exec_reloc.c
@@ -258,7 +258,7 @@ static void active(int fd, const struct intel_execution_engine2 *e)
 
 	nengine = 0;
 	if (!e) {
-		__for_each_physical_engine(fd, e) {
+		for_each_physical_engine(fd, e) {
 			if (gem_class_can_store_dword(fd, e->class))
 				engines[nengine++] = e->flags;
 		}
@@ -753,7 +753,7 @@ igt_main
 	igt_subtest("active")
 		active(fd, NULL);
 
-	__for_each_physical_engine(fd, e)
+	for_each_physical_engine(fd, e)
 		igt_subtest_f("active-%s", e->name)
 			active(fd, e);
 
diff --git a/tests/i915/gem_exec_reuse.c b/tests/i915/gem_exec_reuse.c
index 55e49d644013..1f2d315474ac 100644
--- a/tests/i915/gem_exec_reuse.c
+++ b/tests/i915/gem_exec_reuse.c
@@ -118,7 +118,7 @@ igt_main
 		no.obj = malloc(sizeof(struct drm_i915_gem_exec_object2) * (no.max_age + 1));
 
 		nengine = 0;
-		__for_each_static_engine(e)
+		for_each_static_engine(e)
 			if (e)
 				engines[nengine++] = e->flags;
 		igt_require(nengine);
diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/gem_exec_schedule.c
index 21b0d93559e0..e0e29ac2e2cf 100644
--- a/tests/i915/gem_exec_schedule.c
+++ b/tests/i915/gem_exec_schedule.c
@@ -225,7 +225,7 @@ static void independent(int fd, const struct intel_execution_engine2 *e)
 	plug = igt_cork_plug(&cork, fd);
 
 	/* Check that we can submit to engine while all others are blocked */
-	__for_each_physical_engine(fd, other) {
+	for_each_physical_engine(fd, other) {
 		if (other == e)
 			continue;
 
@@ -285,7 +285,7 @@ static void smoketest(int fd, const struct intel_execution_engine2 *e,
 
 	nengine = 0;
 	if (!e) {
-		__for_each_physical_engine(fd, other)
+		for_each_physical_engine(fd, other)
 			engines[nengine++] = other;
 	} else {
 		engines[nengine++] = e;
@@ -369,7 +369,7 @@ static void semaphore_userlock(int i915)
 	 */
 
 	scratch = gem_create(i915, 4096);
-	__for_each_physical_engine(i915, e) {
+	for_each_physical_engine(i915, e) {
 		if (!spin) {
 			spin = igt_spin_new(i915,
 					    .dependency = scratch,
@@ -394,7 +394,7 @@ static void semaphore_userlock(int i915)
 	 * taking precedence.
 	 */
 	scratch = gem_context_create(i915);
-	__for_each_physical_engine(i915, e) {
+	for_each_physical_engine(i915, e) {
 		struct drm_i915_gem_execbuffer2 execbuf = {
 			.buffers_ptr = to_user_pointer(&obj),
 			.buffer_count = 1,
@@ -433,7 +433,7 @@ static void semaphore_codependency(int i915)
 	 */
 
 	i = 0;
-	__for_each_physical_engine(i915, e) {
+	for_each_physical_engine(i915, e) {
 		uint32_t ctx;
 
 		if (e->class == I915_ENGINE_CLASS_RENDER)
@@ -451,7 +451,7 @@ static void semaphore_codependency(int i915)
 				       .flags = IGT_SPIN_POLL_RUN);
 		igt_spin_busywait_until_started(task[i].xcs);
 
-		__for_each_physical_engine(i915, other) {
+		for_each_physical_engine(i915, other) {
 			if (other->class == I915_ENGINE_CLASS_RENDER)
 				/* Common rcs tasks will be queued in FIFO */
 				task[i].rcs =
@@ -508,7 +508,7 @@ static void semaphore_resolve(int i915)
 	semaphore = gem_create(i915, 4096);
 	sema = gem_mmap__wc(i915, semaphore, 0, 4096, PROT_WRITE);
 
-	__for_each_physical_engine(i915, e) {
+	for_each_physical_engine(i915, e) {
 		struct drm_i915_gem_exec_object2 obj[3];
 		struct drm_i915_gem_execbuffer2 eb;
 		uint32_t handle, cancel;
@@ -623,8 +623,8 @@ static void semaphore_noskip(int i915)
 
 	ctx = gem_context_create(i915);
 
-	__for_each_physical_engine(i915, engine) {
-	__for_each_physical_engine(i915, other) {
+	for_each_physical_engine(i915, engine) {
+	for_each_physical_engine(i915, other) {
 		struct drm_i915_gem_exec_object2 obj[3];
 		struct drm_i915_gem_execbuffer2 eb;
 		uint32_t handle, *cs, *map;
@@ -846,7 +846,7 @@ static igt_spin_t *__noise(int fd, uint32_t ctx, int prio, igt_spin_t *spin)
 
 	gem_context_set_priority(fd, ctx, prio);
 
-	__for_each_physical_engine(fd, other) {
+	for_each_physical_engine(fd, other) {
 		if (spin == NULL) {
 			spin = __igt_spin_new(fd,
 					      .ctx = ctx,
@@ -883,7 +883,7 @@ static void __preempt_other(int fd,
 	n++;
 
 	if (flags & CHAIN) {
-		__for_each_physical_engine(fd, other) {
+		for_each_physical_engine(fd, other) {
 			store_dword(fd, ctx[LO], other,
 				    result, (n + 1)*sizeof(uint32_t), n + 1,
 				    0, I915_GEM_DOMAIN_RENDER);
@@ -933,7 +933,7 @@ static void preempt_other(int fd, const struct intel_execution_engine2 *e,
 	ctx[HI] = gem_context_create(fd);
 	gem_context_set_priority(fd, ctx[HI], MAX_PRIO);
 
-	__for_each_physical_engine(fd, primary) {
+	for_each_physical_engine(fd, primary) {
 		igt_debug("Primary engine: %s\n", e->name);
 		__preempt_other(fd, ctx, e, primary, flags);
 	}
@@ -990,7 +990,7 @@ static void __preempt_queue(int fd,
 	n++;
 
 	if (flags & CHAIN) {
-		__for_each_physical_engine(fd, other) {
+		for_each_physical_engine(fd, other) {
 			store_dword(fd, ctx[LO], other,
 				    result, (n + 1)*sizeof(uint32_t), n + 1,
 				    0, I915_GEM_DOMAIN_RENDER);
@@ -1034,7 +1034,7 @@ static void preempt_queue(int fd, const struct intel_execution_engine2 *e,
 {
 	const struct intel_execution_engine2 *other;
 
-	__for_each_physical_engine(fd, other) {
+	for_each_physical_engine(fd, other) {
 		for (unsigned depth = 0; depth <= MAX_ELSP_QLEN; depth++)
 			__preempt_queue(fd, e, other, depth, flags);
 	}
@@ -1063,7 +1063,7 @@ static void preempt_self(int fd, const struct intel_execution_engine2 *e)
 
 	n = 0;
 	gem_context_set_priority(fd, ctx[HI], MIN_PRIO);
-	__for_each_physical_engine(fd, other) {
+	for_each_physical_engine(fd, other) {
 		spin[n] = __igt_spin_new(fd,
 					 .ctx = ctx[NOISE],
 					 .engine = other->flags);
@@ -1589,7 +1589,7 @@ static void measure_semaphore_power(int i915)
 
 	igt_require(gpu_power_open(&power) == 0);
 
-	__for_each_physical_engine(i915, signaler) {
+	for_each_physical_engine(i915, signaler) {
 		struct gpu_power_sample s_spin[2];
 		struct gpu_power_sample s_sema[2];
 		double baseline, total;
@@ -1607,7 +1607,7 @@ static void measure_semaphore_power(int i915)
 		gpu_power_read(&power, &s_spin[1]);
 
 		/* Add a waiter to each engine */
-		__for_each_physical_engine(i915, engine) {
+		for_each_physical_engine(i915, engine) {
 			igt_spin_t *sema;
 
 			if (engine == signaler)
@@ -1660,7 +1660,7 @@ igt_main
 	}
 
 	igt_subtest_group {
-		__for_each_physical_engine(fd, e) {
+		for_each_physical_engine(fd, e) {
 			igt_subtest_f("fifo-%s", e->name) {
 				igt_require(gem_class_can_store_dword(fd, e->class));
 				fifo(fd, e);
@@ -1691,7 +1691,7 @@ igt_main
 		igt_subtest("smoketest-all")
 			smoketest(fd, NULL, 30);
 
-		__for_each_physical_engine(fd, e) {
+		for_each_physical_engine(fd, e) {
 			igt_subtest_group {
 				igt_fixture {
 					igt_require(gem_class_can_store_dword(fd, e->class));
@@ -1783,7 +1783,7 @@ igt_main
 			igt_require(gem_has_execlists(fd));
 		}
 
-		__for_each_physical_engine(fd, e) {
+		for_each_physical_engine(fd, e) {
 			igt_subtest_group {
 				igt_fixture {
 					igt_require(gem_scheduler_has_preemption(fd));
diff --git a/tests/i915/gem_exec_store.c b/tests/i915/gem_exec_store.c
index b74c3d84bcc2..dba71b389c76 100644
--- a/tests/i915/gem_exec_store.c
+++ b/tests/i915/gem_exec_store.c
@@ -220,7 +220,7 @@ static void store_all(int fd)
 
 	nengine = 0;
 	intel_detect_and_clear_missed_interrupts(fd);
-	__for_each_physical_engine(fd, engine) {
+	for_each_physical_engine(fd, engine) {
 		if (!gem_class_can_store_dword(fd, engine->class))
 			continue;
 
@@ -329,7 +329,7 @@ igt_main
 		igt_fork_hang_detector(fd);
 	}
 
-	__for_each_physical_engine(fd, e) {
+	for_each_physical_engine(fd, e) {
 		igt_subtest_f("basic-%s", e->name)
 			store_dword(fd, e);
 
diff --git a/tests/i915/gem_exec_suspend.c b/tests/i915/gem_exec_suspend.c
index 3238e307e217..1ac7a1041dc9 100644
--- a/tests/i915/gem_exec_suspend.c
+++ b/tests/i915/gem_exec_suspend.c
@@ -67,7 +67,7 @@ static void test_all(int fd, unsigned flags)
 {
 	const struct intel_execution_engine2 *engine;
 
-	__for_each_physical_engine(fd, engine)
+	for_each_physical_engine(fd, engine)
 		if (gem_class_can_store_dword(fd, engine->class))
 			run_test(fd, engine, flags & ~0xff);
 }
@@ -108,7 +108,7 @@ static void run_test(int fd, const struct intel_execution_engine2 *e,
 		 * GPU is then unlikely to be active!)
 		 */
 		if (has_semaphores(fd)) {
-			__for_each_physical_engine(fd, e) {
+			for_each_physical_engine(fd, e) {
 				if (gem_class_can_store_dword(fd, e->class))
 					engines[nengine++] = e->flags;
 			}
@@ -266,7 +266,7 @@ igt_main
 	igt_subtest("basic-S4")
 		run_test(fd, NULL, HIBERNATE);
 
-	__for_each_physical_engine(fd, e) {
+	for_each_physical_engine(fd, e) {
 		for (m = modes; m->suffix; m++) {
 			igt_subtest_f("%s-uncached%s", e->name, m->suffix)
 				run_test(fd, e, m->mode | UNCACHED);
diff --git a/tests/i915/gem_exec_whisper.c b/tests/i915/gem_exec_whisper.c
index 43998b49b773..28ac86b6b3fa 100644
--- a/tests/i915/gem_exec_whisper.c
+++ b/tests/i915/gem_exec_whisper.c
@@ -204,7 +204,7 @@ static void whisper(int fd, const struct intel_execution_engine2 *engine,
 
 	nengine = 0;
 	if (!engine) {
-		__for_each_physical_engine(fd, engine) {
+		for_each_physical_engine(fd, engine) {
 			if (gem_class_can_store_dword(fd, engine->class))
 				engines[nengine++] = engine->flags;
 		}
@@ -572,7 +572,7 @@ igt_main
 			whisper(fd, NULL, m->flags | ALL);
 	}
 
-	__for_each_physical_engine(fd, e) {
+	for_each_physical_engine(fd, e) {
 		for (const struct mode *m = modes; m->name; m++) {
 			if (m->flags & CHAIN)
 				continue;
diff --git a/tests/i915/gem_mocs_settings.c b/tests/i915/gem_mocs_settings.c
index d5cedfc478c1..540d640edc82 100644
--- a/tests/i915/gem_mocs_settings.c
+++ b/tests/i915/gem_mocs_settings.c
@@ -516,7 +516,7 @@ igt_main
 		igt_require(get_mocs_settings(fd, &table, false));
 	}
 
-	__for_each_static_engine(e) {
+	for_each_static_engine(e) {
 		for (unsigned mode = NONE; mode < MAX_MOCS_TEST_MODES; mode++) {
 			igt_subtest_group {
 				igt_hang_t hang = {};
diff --git a/tests/i915/gem_reset_stats.c b/tests/i915/gem_reset_stats.c
index dd0ba821f7d8..6a9159a81621 100644
--- a/tests/i915/gem_reset_stats.c
+++ b/tests/i915/gem_reset_stats.c
@@ -520,14 +520,14 @@ static void noop_on_each_ring(int fd, const bool reverse)
 	eb.buffer_count = 1;
 
 	if (reverse) {
-		__for_each_static_engine(e)
+		for_each_static_engine(e)
 			;
 		while (--e >= intel_execution_engines2) {
 			eb.flags = e->flags;
 			__gem_execbuf(fd, &eb);
 		}
 	} else {
-		__for_each_static_engine(e) {
+		for_each_static_engine(e) {
 			eb.flags = e->flags;
 			__gem_execbuf(fd, &eb);
 		}
@@ -803,7 +803,7 @@ igt_main
 	igt_subtest_f("params-ctx")
 		RUN_TEST(test_params_ctx());
 
-	__for_each_static_engine(e) {
+	for_each_static_engine(e) {
 		igt_subtest_f("reset-stats-%s", e->name)
 			RUN_TEST(test_rs(e, 4, 1, 0));
 
diff --git a/tests/i915/gem_ring_sync_loop.c b/tests/i915/gem_ring_sync_loop.c
index 3982cf9b9319..63ee3f2d7095 100644
--- a/tests/i915/gem_ring_sync_loop.c
+++ b/tests/i915/gem_ring_sync_loop.c
@@ -48,7 +48,7 @@ sync_loop(int fd)
 	int i;
 
 	nengine = 0;
-	__for_each_physical_engine(fd, engine)
+	for_each_physical_engine(fd, engine)
 		engines[nengine++] = engine->flags;
 	igt_require(nengine);
 
diff --git a/tests/i915/gem_ringfill.c b/tests/i915/gem_ringfill.c
index a02c7e76ecd9..8b3895bc9e32 100644
--- a/tests/i915/gem_ringfill.c
+++ b/tests/i915/gem_ringfill.c
@@ -280,7 +280,7 @@ igt_main
 	for (m = modes; m->suffix; m++) {
 		const struct intel_execution_engine2 *e;
 
-		__for_each_physical_engine(fd, e) {
+		for_each_physical_engine(fd, e) {
 			igt_subtest_f("%s%s", e->name, m->suffix) {
 				igt_skip_on(m->flags & NEWFD && master);
 				if (m->flags & (HANG|SUSPEND|HIBERNATE))
diff --git a/tests/i915/gem_shrink.c b/tests/i915/gem_shrink.c
index bca6fb88c6da..2cbd2372a324 100644
--- a/tests/i915/gem_shrink.c
+++ b/tests/i915/gem_shrink.c
@@ -423,7 +423,7 @@ igt_main
 				     CHECK_SWAP | CHECK_RAM);
 
 		nengine = 0;
-		__for_each_static_engine(engine)
+		for_each_static_engine(engine)
 			engines[nengine++] = engine->flags;
 		igt_require(nengine);
 
@@ -431,7 +431,7 @@ igt_main
 	}
 
 	igt_subtest("reclaim") {
-		__for_each_static_engine(engine) {
+		for_each_static_engine(engine) {
 			if (engine->class == I915_ENGINE_CLASS_RENDER)
 				break;
 		}
diff --git a/tests/i915/gem_spin_batch.c b/tests/i915/gem_spin_batch.c
index 717751bddc1f..85b4e9ac857a 100644
--- a/tests/i915/gem_spin_batch.c
+++ b/tests/i915/gem_spin_batch.c
@@ -86,7 +86,7 @@ static void spin_resubmit(int fd, const struct intel_execution_engine2 *e,
 	};
 
 	if (flags & RESUBMIT_ALL_ENGINES) {
-		__for_each_physical_engine(fd, other) {
+		for_each_physical_engine(fd, other) {
 			if  (other == e)
 				continue;
 
@@ -119,7 +119,7 @@ static void spin_on_all_engines(int fd, unsigned int timeout_sec)
 {
 	const struct intel_execution_engine2 *engine;
 
-	__for_each_physical_engine(fd, engine) {
+	for_each_physical_engine(fd, engine) {
 		igt_fork(child, 1) {
 			igt_install_exit_handler(spin_exit_handler);
 			spin(fd, engine, timeout_sec);
@@ -142,7 +142,7 @@ igt_main
 		igt_fork_hang_detector(fd);
 	}
 
-	__for_each_physical_engine(fd, e) {
+	for_each_physical_engine(fd, e) {
 		igt_subtest_f("basic-%s", e->name)
 			spin(fd, e, 3);
 
diff --git a/tests/i915/gem_storedw_loop.c b/tests/i915/gem_storedw_loop.c
index f7eb5a64169f..57b4182d5273 100644
--- a/tests/i915/gem_storedw_loop.c
+++ b/tests/i915/gem_storedw_loop.c
@@ -182,7 +182,7 @@ igt_main
 		igt_require(gem_uses_ppgtt(fd));
 	}
 
-	__for_each_physical_engine(fd, e) {
+	for_each_physical_engine(fd, e) {
 		igt_subtest_f("store-%s", e->name) {
 			check_test_requirements(fd, e);
 			store_test(fd, e);
diff --git a/tests/i915/gem_sync.c b/tests/i915/gem_sync.c
index 629decfcfe18..4861b1d29714 100644
--- a/tests/i915/gem_sync.c
+++ b/tests/i915/gem_sync.c
@@ -87,7 +87,7 @@ sync_ring(int fd, const struct intel_execution_engine2 *e, int num_children,
 	int num_engines = 0;
 
 	if (!e) {
-		__for_each_physical_engine(fd, e) {
+		for_each_physical_engine(fd, e) {
 			names[num_engines] = e->name;
 			engines[num_engines++] = e->flags;
 			if (num_engines == ARRAY_SIZE(engines))
@@ -187,7 +187,7 @@ wakeup_ring(int fd, const struct intel_execution_engine2 *e, int timeout,
 	int num_engines = 0;
 
 	if (!e) {
-		__for_each_physical_engine(fd, e) {
+		for_each_physical_engine(fd, e) {
 			if (!gem_class_can_store_dword(fd, e->class))
 				continue;
 
@@ -299,7 +299,7 @@ static void active_ring(int fd, const struct intel_execution_engine2 *e, int tim
 	int num_engines = 0;
 
 	if (!e) {
-		__for_each_physical_engine(fd, e) {
+		for_each_physical_engine(fd, e) {
 			if (!gem_class_can_store_dword(fd, e->class))
 				continue;
 
@@ -367,7 +367,7 @@ active_wakeup_ring(int fd, const struct intel_execution_engine2 *e, int timeout,
 	int num_engines = 0;
 
 	if (!e) {
-		__for_each_physical_engine(fd, e) {
+		for_each_physical_engine(fd, e) {
 			if (!gem_class_can_store_dword(fd, e->class))
 				continue;
 
@@ -502,7 +502,7 @@ store_ring(int fd, const struct intel_execution_engine2 *e, int num_children, in
 	int num_engines = 0;
 
 	if (!e) {
-		__for_each_physical_engine(fd, e) {
+		for_each_physical_engine(fd, e) {
 			if (!gem_class_can_store_dword(fd, e->class))
 				continue;
 
@@ -619,7 +619,7 @@ switch_ring(int fd, const struct intel_execution_engine2 *e, int num_children, i
 	gem_require_contexts(fd);
 
 	if (!e) {
-		__for_each_physical_engine(fd, e) {
+		for_each_physical_engine(fd, e) {
 			if (!gem_class_can_store_dword(fd, e->class))
 				continue;
 
@@ -946,7 +946,7 @@ store_many(int fd, const struct intel_execution_engine2 *e, int timeout)
 	intel_detect_and_clear_missed_interrupts(fd);
 
 	if (!e) {
-		__for_each_physical_engine(fd, e) {
+		for_each_physical_engine(fd, e) {
 			if (!gem_class_can_store_dword(fd, e->class))
 				continue;
 
@@ -979,7 +979,7 @@ sync_all(int fd, int num_children, int timeout)
 	const struct intel_execution_engine2 *engine;
 	int num_engines = 0;
 
-	__for_each_physical_engine(fd, engine) {
+	for_each_physical_engine(fd, engine) {
 		engines[num_engines++] = engine->flags;
 		if (num_engines == ARRAY_SIZE(engines))
 			break;
@@ -1032,7 +1032,7 @@ store_all(int fd, int num_children, int timeout)
 	int num_engines = 0;
 	const struct intel_execution_engine2 *e;
 
-	__for_each_physical_engine(fd, e) {
+	for_each_physical_engine(fd, e) {
 		if (!gem_class_can_store_dword(fd, e->class))
 			continue;
 
@@ -1141,7 +1141,7 @@ preempt(int fd, const struct intel_execution_engine2 *e, int num_children, int t
 	uint32_t ctx[2];
 
 	if (!e) {
-		__for_each_physical_engine(fd, e) {
+		for_each_physical_engine(fd, e) {
 			names[num_engines] = e->name;
 			engines[num_engines++] = e->flags;
 			if (num_engines == ARRAY_SIZE(engines))
@@ -1227,7 +1227,7 @@ igt_main
 		igt_fork_hang_detector(fd);
 	}
 
-	__for_each_physical_engine(fd, e) {
+	for_each_physical_engine(fd, e) {
 		igt_subtest_f("%s", e->name)
 			sync_ring(fd, e, 1, 150);
 		igt_subtest_f("idle-%s", e->name)
@@ -1301,7 +1301,7 @@ igt_main
 		igt_subtest("preempt-all")
 			preempt(fd, NULL, 1, 20);
 
-		__for_each_physical_engine(fd, e) {
+		for_each_physical_engine(fd, e) {
 			igt_subtest_f("preempt-%s", e->name)
 				preempt(fd, e, ncpus, 150);
 		}
diff --git a/tests/i915/gem_userptr_blits.c b/tests/i915/gem_userptr_blits.c
index 2433cc6668a7..bd4e02832a3b 100644
--- a/tests/i915/gem_userptr_blits.c
+++ b/tests/i915/gem_userptr_blits.c
@@ -1147,7 +1147,7 @@ static void test_readonly(int i915)
 
 		gem_userptr(i915, space, total, true, userptr_flags, &rhandle);
 
-		__for_each_physical_engine(i915, engine) {
+		for_each_physical_engine(i915, engine) {
 			char *ref, *result;
 
 			/* First tweak the backing store through the write */
diff --git a/tests/i915/gem_wait.c b/tests/i915/gem_wait.c
index b5e32219d77b..c1b2cf3e634e 100644
--- a/tests/i915/gem_wait.c
+++ b/tests/i915/gem_wait.c
@@ -177,7 +177,7 @@ igt_main
 			basic(fd, ALL_ENGINES, WRITE);
 		}
 
-		__for_each_physical_engine(fd, e) {
+		for_each_physical_engine(fd, e) {
 			igt_subtest_group {
 				igt_subtest_f("busy-%s", e->name) {
 					gem_quiescent_gpu(fd);
@@ -234,7 +234,7 @@ igt_main
 			basic(fd, ALL_ENGINES, WRITE | HANG);
 		}
 
-		__for_each_physical_engine(fd, e) {
+		for_each_physical_engine(fd, e) {
 			igt_subtest_f("hang-busy-%s", e->name) {
 				gem_quiescent_gpu(fd);
 				basic(fd, e->flags, HANG | BUSY);
diff --git a/tests/i915/i915_hangman.c b/tests/i915/i915_hangman.c
index 047d7d5f5d04..b7f41ec1e5d7 100644
--- a/tests/i915/i915_hangman.c
+++ b/tests/i915/i915_hangman.c
@@ -276,7 +276,7 @@ igt_main
 	igt_subtest("error-state-basic")
 		test_error_state_basic();
 
-	__for_each_physical_engine(device, e)
+	for_each_physical_engine(device, e)
 		igt_subtest_f("error-state-capture-%s", e->name)
 			test_error_state_capture(e, e->name);
 
diff --git a/tests/i915/i915_module_load.c b/tests/i915/i915_module_load.c
index aabb701d592c..09519bf6b287 100644
--- a/tests/i915/i915_module_load.c
+++ b/tests/i915/i915_module_load.c
@@ -152,7 +152,7 @@ static void store_all(int fd)
 
 	nengine = 0;
 	intel_detect_and_clear_missed_interrupts(fd);
-	__for_each_physical_engine(fd, engine) {
+	for_each_physical_engine(fd, engine) {
 		if (!gem_class_can_store_dword(fd, engine->class))
 			continue;
 
@@ -287,7 +287,7 @@ gem_exec_store(void)
 	fd = __drm_open_driver(DRIVER_INTEL);
 	igt_fork_hang_detector(fd);
 
-	__for_each_static_engine(e) {
+	for_each_static_engine(e) {
 		if (gem_class_can_store_dword(fd, e->class))
 			store_dword(fd, e);
 	}
diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
index 72b9166afb4c..676148b7afad 100644
--- a/tests/perf_pmu.c
+++ b/tests/perf_pmu.c
@@ -445,7 +445,7 @@ busy_check_all(int gem_fd, const struct intel_execution_engine2 *e,
 
 	i = 0;
 	fd[0] = -1;
-	__for_each_physical_engine(gem_fd, e_) {
+	for_each_physical_engine(gem_fd, e_) {
 		if (e->class == e_->class && e->instance == e_->instance)
 			busy_idx = i;
 
@@ -508,7 +508,7 @@ most_busy_check_all(int gem_fd, const struct intel_execution_engine2 *e,
 	unsigned int idle_idx, i;
 
 	i = 0;
-	__for_each_physical_engine(gem_fd, e_) {
+	for_each_physical_engine(gem_fd, e_) {
 		if (e->class == e_->class && e->instance == e_->instance)
 			idle_idx = i;
 		else if (spin)
@@ -565,7 +565,7 @@ all_busy_check_all(int gem_fd, const unsigned int num_engines,
 	unsigned int i;
 
 	i = 0;
-	__for_each_physical_engine(gem_fd, e) {
+	for_each_physical_engine(gem_fd, e) {
 		if (spin)
 			__submit_spin(gem_fd, spin, e, 64);
 		else
@@ -1686,7 +1686,7 @@ igt_main
 		igt_require_gem(fd);
 		igt_require(i915_type_id() > 0);
 
-		__for_each_physical_engine(fd, e)
+		for_each_physical_engine(fd, e)
 			num_engines++;
 	}
 
@@ -1696,7 +1696,7 @@ igt_main
 	igt_subtest("invalid-init")
 		invalid_init();
 
-	__for_each_physical_engine(fd, e) {
+	for_each_physical_engine(fd, e) {
 		const unsigned int pct[] = { 2, 50, 98 };
 
 		/**
@@ -1900,7 +1900,7 @@ igt_main
 			gem_quiescent_gpu(fd);
 		}
 
-		__for_each_physical_engine(render_fd, e) {
+		for_each_physical_engine(render_fd, e) {
 			igt_subtest_group {
 				igt_fixture {
 					gem_context_has_engine(render_fd,
diff --git a/tests/prime_busy.c b/tests/prime_busy.c
index 661da2a56688..8b102b48da6d 100644
--- a/tests/prime_busy.c
+++ b/tests/prime_busy.c
@@ -241,7 +241,7 @@ igt_main
 		igt_fixture
 			gem_require_mmap_wc(fd);
 
-		__for_each_static_engine(e) {
+		for_each_static_engine(e) {
 			for (const struct mode *m = modes; m->name; m++)
 				test_engine_mode(fd, e, m->name, m->flags);
 		}
diff --git a/tests/prime_vgem.c b/tests/prime_vgem.c
index 030ca39de08c..2fff93c1f12e 100644
--- a/tests/prime_vgem.c
+++ b/tests/prime_vgem.c
@@ -844,7 +844,7 @@ igt_main
 	igt_subtest("coherency-gtt")
 		test_gtt_interleaved(vgem, i915);
 
-	__for_each_physical_engine(i915, e) {
+	for_each_physical_engine(i915, e) {
 		igt_subtest_f("%ssync-%s",
 			      e->class == I915_ENGINE_CLASS_RENDER ?
 			      "basic-" : "", e->name) {
@@ -884,7 +884,7 @@ igt_main
 		igt_subtest("basic-fence-mmap")
 			test_fence_mmap(i915, vgem);
 
-		__for_each_physical_engine(i915, e) {
+		for_each_physical_engine(i915, e) {
 			igt_subtest_f("%sfence-wait-%s",
 					e->class == I915_ENGINE_CLASS_RENDER ?
 					"basic-" : "", e->name) {
-- 
2.19.1

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Re: [igt-dev] [RFC v2 01/43] test/i915: gem_bad_reloc: use the gem_engine_topology library

[Tvrtko Ursulin]

On 21/06/2019 11:02, Chris Wilson wrote:
> Quoting Ramalingam C (2019-06-21 11:03:03)
>> Replace the legacy for_each_engine* defines with the ones
>> implemented in the gem_engine_topology library.
>>
>> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
>> ---
>>   tests/i915/gem_bad_reloc.c | 14 +++++++-------
>>   1 file changed, 7 insertions(+), 7 deletions(-)
>>
>> diff --git a/tests/i915/gem_bad_reloc.c b/tests/i915/gem_bad_reloc.c
>> index 7624cd8e0949..26a932a3a933 100644
>> --- a/tests/i915/gem_bad_reloc.c
>> +++ b/tests/i915/gem_bad_reloc.c
>> @@ -50,7 +50,8 @@ IGT_TEST_DESCRIPTION("Simulates SNA behaviour using negative self-relocations"
>>    * than the total size of the GTT), the GPU will hang.
>>    * See https://bugs.freedesktop.org/show_bug.cgi?id=78533
>>    */
>> -static void negative_reloc(int fd, unsigned engine, unsigned flags)
>> +static void negative_reloc(int fd, const struct intel_execution_engine2 *e,
>> +                          unsigned flags)
>>   {
>>          struct drm_i915_gem_execbuffer2 execbuf;
>>          struct drm_i915_gem_exec_object2 obj;
>> @@ -60,7 +61,6 @@ static void negative_reloc(int fd, unsigned engine, unsigned flags)
>>          uint64_t *offsets;
>>          int i;
>>   
>> -       gem_require_ring(fd, engine);
>>          igt_require(intel_gen(intel_get_drm_devid(fd)) >= 7);
>>   
>>          memset(&obj, 0, sizeof(obj));
>> @@ -70,7 +70,7 @@ static void negative_reloc(int fd, unsigned engine, unsigned flags)
>>          memset(&execbuf, 0, sizeof(execbuf));
>>          execbuf.buffers_ptr = (uintptr_t)&obj;
>>          execbuf.buffer_count = 1;
>> -       execbuf.flags = engine | (flags & USE_LUT);
>> +       execbuf.flags = e->flags | (flags & USE_LUT);
>>          igt_require(__gem_execbuf(fd, &execbuf) == 0);
>>   
>>          igt_info("Found offset %lld for 4k batch\n", (long long)obj.offset);
>> @@ -185,7 +185,7 @@ static void negative_reloc_blt(int fd)
>>   
>>   igt_main
>>   {
>> -       const struct intel_execution_engine *e;
>> +       const struct intel_execution_engine2 *e;
>>          int fd = -1;
>>   
>>          igt_fixture {
>> @@ -193,12 +193,12 @@ igt_main
>>                  igt_require_gem(fd);
>>          }
>>   
>> -       for (e = intel_execution_engines; e->name; e++) {
>> +       __for_each_physical_engine(fd, e) {
> 
> uABI testing not physical engines.

Should we add something like for_each_legacy_abi_engine to use in these 
tests so it is more self-documenting? (And get rid of raw access to 
intel_execution_engines.)

Regards,

Tvrtko
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Re: [igt-dev] [RFC v2 06/43] test/prime_vgem: use the gem_engine_topology library

[Chris Wilson]

Quoting Ramalingam C (2019-06-21 11:03:08)
> Replace the legacy for_each_engine* defines with the ones
> implemented in the gem_engine_topology library.
> 
> v2:
>   helper for getting the execbuf_flag from class is used.
> 
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
>  tests/prime_vgem.c | 72 ++++++++++++++++++++++------------------------
>  1 file changed, 34 insertions(+), 38 deletions(-)
> 
> diff --git a/tests/prime_vgem.c b/tests/prime_vgem.c
> index 69ae8c9b0710..030ca39de08c 100644
> --- a/tests/prime_vgem.c
> +++ b/tests/prime_vgem.c
> @@ -325,7 +325,7 @@ static bool prime_busy(int fd, bool excl)
>         return poll(&pfd, 1, 0) == 0;
>  }
>  
> -static void work(int i915, int dmabuf, unsigned ring, uint32_t flags)
> +static void work(int i915, int dmabuf, const struct intel_execution_engine2 *e)
>  {
>         const int SCRATCH = 0;
>         const int BATCH = 1;
> @@ -341,7 +341,9 @@ static void work(int i915, int dmabuf, unsigned ring, uint32_t flags)
>         memset(&execbuf, 0, sizeof(execbuf));
>         execbuf.buffers_ptr = (uintptr_t)obj;
>         execbuf.buffer_count = 2;
> -       execbuf.flags = ring | flags;
> +       execbuf.flags = e ? e->flags :
> +               gem_engine_class_to_execbuf_flags(i915, 0,
> +                                                 I915_ENGINE_CLASS_RENDER);
>         if (gen < 6)
>                 execbuf.flags |= I915_EXEC_SECURE;
>  
> @@ -420,7 +422,7 @@ static void work(int i915, int dmabuf, unsigned ring, uint32_t flags)
>         igt_assert(read_busy && write_busy);
>  }
>  
> -static void test_busy(int i915, int vgem, unsigned ring, uint32_t flags)
> +static void test_busy(int i915, int vgem, const struct intel_execution_engine2 *e)
>  {
>         struct vgem_bo scratch;
>         struct timespec tv;
> @@ -434,7 +436,7 @@ static void test_busy(int i915, int vgem, unsigned ring, uint32_t flags)
>         vgem_create(vgem, &scratch);
>         dmabuf = prime_handle_to_fd(vgem, scratch.handle);
>  
> -       work(i915, dmabuf, ring, flags);
> +       work(i915, dmabuf, e);
>  
>         /* Calling busy in a loop should be enough to flush the rendering */
>         memset(&tv, 0, sizeof(tv));
> @@ -450,7 +452,8 @@ static void test_busy(int i915, int vgem, unsigned ring, uint32_t flags)
>         close(dmabuf);
>  }
>  
> -static void test_wait(int i915, int vgem, unsigned ring, uint32_t flags)
> +static void test_wait(int i915, int vgem,
> +                     const struct intel_execution_engine2 *e)
>  {
>         struct vgem_bo scratch;
>         struct pollfd pfd;
> @@ -463,7 +466,7 @@ static void test_wait(int i915, int vgem, unsigned ring, uint32_t flags)
>         vgem_create(vgem, &scratch);
>         pfd.fd = prime_handle_to_fd(vgem, scratch.handle);
>  
> -       work(i915, pfd.fd, ring, flags);
> +       work(i915, pfd.fd, e);
>  
>         pfd.events = POLLIN;
>         igt_assert_eq(poll(&pfd, 1, 10000), 1);
> @@ -477,7 +480,7 @@ static void test_wait(int i915, int vgem, unsigned ring, uint32_t flags)
>         close(pfd.fd);
>  }
>  
> -static void test_sync(int i915, int vgem, unsigned ring, uint32_t flags)
> +static void test_sync(int i915, int vgem, const struct intel_execution_engine2 *e)
>  {
>         struct vgem_bo scratch;
>         uint32_t *ptr;
> @@ -494,7 +497,7 @@ static void test_sync(int i915, int vgem, unsigned ring, uint32_t flags)
>         igt_assert(ptr != MAP_FAILED);
>         gem_close(vgem, scratch.handle);
>  
> -       work(i915, dmabuf, ring, flags);
> +       work(i915, dmabuf, e);
>  
>         prime_sync_start(dmabuf, false);
>         for (i = 0; i < 1024; i++)
> @@ -506,7 +509,8 @@ static void test_sync(int i915, int vgem, unsigned ring, uint32_t flags)
>         munmap(ptr, scratch.size);
>  }
>  
> -static void test_fence_wait(int i915, int vgem, unsigned ring, unsigned flags)
> +static void test_fence_wait(int i915, int vgem,
> +                           const struct intel_execution_engine2 *e)
>  {
>         struct vgem_bo scratch;
>         uint32_t fence;
> @@ -527,7 +531,7 @@ static void test_fence_wait(int i915, int vgem, unsigned ring, unsigned flags)
>         igt_assert(ptr != MAP_FAILED);
>  
>         igt_fork(child, 1)
> -               work(i915, dmabuf, ring, flags);
> +               work(i915, dmabuf, e);
>  
>         sleep(1);
>  
> @@ -568,7 +572,7 @@ static void test_fence_hang(int i915, int vgem, unsigned flags)
>         igt_assert(ptr != MAP_FAILED);
>         gem_close(vgem, scratch.handle);
>  
> -       work(i915, dmabuf, I915_EXEC_DEFAULT, 0);
> +       work(i915, dmabuf, NULL);
>  
>         /* The work should have been cancelled */
>  
> @@ -811,7 +815,7 @@ static void test_flip(int i915, int vgem, unsigned hang)
>  
>  igt_main
>  {
> -       const struct intel_execution_engine *e;
> +       const struct intel_execution_engine2 *e;
>         int i915 = -1;
>         int vgem = -1;
>  
> @@ -840,39 +844,32 @@ igt_main
>         igt_subtest("coherency-gtt")
>                 test_gtt_interleaved(vgem, i915);
>  
> -       for (e = intel_execution_engines; e->name; e++) {
> +       __for_each_physical_engine(i915, e) {
>                 igt_subtest_f("%ssync-%s",
> -                             e->exec_id == 0 ? "basic-" : "",
> -                             e->name) {
> -                       gem_require_ring(i915, e->exec_id | e->flags);
> -                       igt_require(gem_can_store_dword(i915, e->exec_id | e->flags));
> +                             e->class == I915_ENGINE_CLASS_RENDER ?
> +                             "basic-" : "", e->name) {

Nak. Please restore this to using EXEC_DEFAULT explicitly.
-Chris
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Re: [igt-dev] [RFC v2 11/43] tests/i915/gem_cs_prefetch: use the gem_engine_topology library

[Chris Wilson]

Quoting Ramalingam C (2019-06-21 11:03:13)
> Replace the legacy for_each_engine* defines with the ones
> implemented in the gem_engine_topology library.
> 
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
>  tests/i915/gem_cs_prefetch.c | 18 +++++++++---------
>  1 file changed, 9 insertions(+), 9 deletions(-)
> 
> diff --git a/tests/i915/gem_cs_prefetch.c b/tests/i915/gem_cs_prefetch.c
> index 2b8653687f8f..939d6455613e 100644
> --- a/tests/i915/gem_cs_prefetch.c
> +++ b/tests/i915/gem_cs_prefetch.c
> @@ -79,7 +79,7 @@ static void setup(int fd, int gen, struct shadow *shadow)
>         shadow->reloc.write_domain = I915_GEM_DOMAIN_INSTRUCTION;
>  }
>  
> -static void can_test_ring(unsigned ring)
> +static void can_test_ring(const struct intel_execution_engine2 *e)
>  {
>         int master = drm_open_driver_master(DRIVER_INTEL);
>         int fd = drm_open_driver(DRIVER_INTEL);
> @@ -87,12 +87,12 @@ static void can_test_ring(unsigned ring)
>         /* Dance to avoid dying with master open */
>         close(master);
>         igt_require_gem(fd);
> -       gem_require_ring(fd, ring);
> -       igt_require(gem_can_store_dword(fd, ring));
> +       gem_require_ring(fd, e->flags);
> +       igt_require(gem_class_can_store_dword(fd, e->class));
>         close(fd);
>  }
>  
> -static void test_ring(unsigned ring)
> +static void test_ring(const struct intel_execution_engine2 *e)
>  {
>         struct drm_i915_gem_execbuffer2 execbuf;
>         struct drm_i915_gem_exec_object2 obj[2];
> @@ -100,7 +100,7 @@ static void test_ring(unsigned ring)
>         uint64_t i, count;
>         int fd, gen;
>  
> -       can_test_ring(ring);
> +       can_test_ring(e);
>  
>         fd = drm_open_driver_master(DRIVER_INTEL);
>         gen = intel_gen(intel_get_drm_devid(fd));
> @@ -116,7 +116,7 @@ static void test_ring(unsigned ring)
>  
>         memset(&execbuf, 0, sizeof(execbuf));
>         execbuf.buffers_ptr = to_user_pointer(obj);
> -       execbuf.flags = ring;
> +       execbuf.flags = e->flags;
>         if (gen < 6)
>                 execbuf.flags |= I915_EXEC_SECURE;
>  
> @@ -139,11 +139,11 @@ static void test_ring(unsigned ring)
>  
>  igt_main
>  {
> -       const struct intel_execution_engine *e;
> +       const struct intel_execution_engine2 *e;
>  
>         igt_skip_on_simulation();
>  
> -       for (e = intel_execution_engines; e->name; e++)
> +       __for_each_static_engine(e)

Now this is exercising a bit of HW lore, so could be phys.
-Chris
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Re: [igt-dev] [RFC v2 14/43] tests/i915/gem_ctx_switch: use the gem_engine_topology library

[Chris Wilson]

Quoting Ramalingam C (2019-06-21 11:03:16)
> @@ -338,7 +337,7 @@ igt_main
>                 igt_fork_hang_detector(fd);
>         }
>  
> -       for (e = intel_execution_engines; e->name; e++) {
> +       __for_each_physical_engine(fd, e) {

~o~ I'm leaning towards saying that we do need to exercise uABI here,
since this is the only spot where we explicitly try and check that
contexts exist across the uABI.
-Chris
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Re: [igt-dev] [RFC v2 16/43] tests/i915/gem_eio: use the gem_engine_topology library

[Chris Wilson]

Quoting Ramalingam C (2019-06-21 11:03:18)
> Replace the legacy for_each_engine* defines with the ones
> implemented in the gem_engine_topology library.

gem_eio is first and foremost a uABI test, we cannot simply discard
exercising the legacy interface.
-Chris
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Re: [igt-dev] [RFC v2 18/43] tests/i915/gem_exec_create: use the gem_engine_topology library

[Chris Wilson]

Quoting Ramalingam C (2019-06-21 11:03:20)
> Replace the legacy for_each_engine* defines with the ones
> implemented in the gem_engine_topology library.
> 
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
>  tests/i915/gem_exec_create.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/tests/i915/gem_exec_create.c b/tests/i915/gem_exec_create.c
> index 54a2429e49d9..9e21320d0221 100644
> --- a/tests/i915/gem_exec_create.c
> +++ b/tests/i915/gem_exec_create.c
> @@ -63,11 +63,11 @@ static void all(int fd, unsigned flags, int timeout, int ncpus)
>         struct drm_i915_gem_exec_object2 obj;
>         unsigned engines[16];
>         unsigned nengine;
> -       unsigned engine;
> +       const struct intel_execution_engine2 *e;
>  
>         nengine = 0;
> -       for_each_physical_engine(fd, engine)
> -               engines[nengine++] = engine;
> +       __for_each_physical_engine(fd, e)
> +               engines[nengine++] = e->flags;
>         igt_require(nengine);

You will have noticed this pattern quite frequently, and possibly
considered a helper to simply return the engine map?
-Chris
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Re: [igt-dev] [RFC v2 19/43] tests/i915/gem_exec_fence: use the gem_engine_topology library

[Chris Wilson]

Quoting Ramalingam C (2019-06-21 11:03:21)
> Replace the legacy for_each_engine* defines with the ones
> implemented in the gem_engine_topology library.

Also a uABI test.
-Chris
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Re: [igt-dev] [RFC v2 23/43] tests/i915/gem_exec_nop: use the gem_engine_topology library

[Chris Wilson]

Quoting Ramalingam C (2019-06-21 11:03:25)
> Replace the legacy for_each_engine* defines with the ones
> implemented in the gem_engine_topology library.

Also a uABI exercise.
-Chris
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Re: [igt-dev] [RFC v2 24/43] tests/i915/gem_exec_reloc: use the gem_engine_topology library

[Chris Wilson]

Quoting Ramalingam C (2019-06-21 11:03:26)
> Replace the legacy for_each_engine* defines with the ones
> implemented in the gem_engine_topology library.

Also uABI.
-Chris
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Re: [igt-dev] [RFC v2 25/43] tests/i915/gem_exec_schedule: use the gem_engine_topology library

[Chris Wilson]

Quoting Ramalingam C (2019-06-21 11:03:27)
> Replace the legacy for_each_engine* defines with the ones
> implemented in the gem_engine_topology library.

We still need to verify the legacy uABI.
-Chris
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Re: [igt-dev] [RFC v2 27/43] tests/i915/gem_exec_whisper: use the gem_engine_topology library

[Chris Wilson]

Quoting Ramalingam C (2019-06-21 11:03:29)
> Replace the legacy for_each_engine* defines with the ones
> implemented in the gem_engine_topology library.

Also elements of uABI testing.
-Chris
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Re: [igt-dev] [RFC v2 29/43] tests/i915/gem_reset_stats: use the gem_engine_topology library

[Chris Wilson]

Quoting Ramalingam C (2019-06-21 11:03:31)
> Replace the legacy for_each_engine* defines with the ones
> implemented in the gem_engine_topology library.

I would err on the side of saying that the legacy uABI should be
verified as well. We definitely need to preserve the existing use-cases
of mesa with the legacy uABI.
-Chris
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Re: [igt-dev] [RFC v2 31/43] tests/i915/gem_ringfill: use the gem_engine_topology library

[Chris Wilson]

Quoting Ramalingam C (2019-06-21 11:03:33)
> Replace the legacy for_each_engine* defines with the ones
> implemented in the gem_engine_topology library.

uABI exercise.
-Chris
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Re: [igt-dev] [RFC v2 32/43] tests/i915/gem_shrink: use the gem_engine_topology library

[Chris Wilson]

Quoting Ramalingam C (2019-06-21 11:03:34)
> -       igt_subtest("reclaim")
> -               reclaim(I915_EXEC_DEFAULT, 2);
> +       igt_subtest("reclaim") {

Why change?
-Chris
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Re: [igt-dev] [RFC v2 35/43] tests/i915/gem_userptr_blits: use the gem_engine_topology library

[Chris Wilson]

Quoting Ramalingam C (2019-06-21 11:03:37)
> Replace the legacy for_each_engine* defines with the ones
> implemented in the gem_engine_topology library.
> 
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
>  tests/i915/gem_userptr_blits.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/tests/i915/gem_userptr_blits.c b/tests/i915/gem_userptr_blits.c
> index 1373f160b129..2433cc6668a7 100644
> --- a/tests/i915/gem_userptr_blits.c
> +++ b/tests/i915/gem_userptr_blits.c
> @@ -996,7 +996,7 @@ static int test_dmabuf(void)
>         return 0;
>  }
>  
> -static void store_dword_rand(int i915, unsigned int engine,
> +static void store_dword_rand(int i915, const struct intel_execution_engine2 *engine,
>                              uint32_t target, uint64_t sz,
>                              int count)
>  {
> @@ -1025,7 +1025,7 @@ static void store_dword_rand(int i915, unsigned int engine,
>         memset(&exec, 0, sizeof(exec));
>         exec.buffer_count = 2;
>         exec.buffers_ptr = to_user_pointer(obj);
> -       exec.flags = engine;
> +       exec.flags = engine->flags;
>         if (gen < 6)
>                 exec.flags |= I915_EXEC_SECURE;
>  
> @@ -1140,14 +1140,14 @@ static void test_readonly(int i915)
>         igt_assert(mprotect(space, total, PROT_READ) == 0);
>  
>         igt_fork(child, 1) {
> -               unsigned int engine;
> +               const struct intel_execution_engine2 *engine;
>                 char *orig;
>  
>                 orig = g_compute_checksum_for_data(G_CHECKSUM_SHA1, pages, sz);
>  
>                 gem_userptr(i915, space, total, true, userptr_flags, &rhandle);
>  
> -               for_each_engine(i915, engine) {
> +               __for_each_physical_engine(i915, engine) {
>                         char *ref, *result;

As written this is testing uABI, so you need to explain why it is not.
-Chris
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Re: [igt-dev] [RFC v2 38/43] tests/kms_busy: use the gem_engine_topology library

[Chris Wilson]

Quoting Ramalingam C (2019-06-21 11:03:40)
> Replace the legacy for_each_engine* defines with the ones
> implemented in the gem_engine_topology library.

So why isn't this exercising legacy execbuffer uABI?
-Chris
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Re: [igt-dev] [RFC v2 39/43] tests/prime_busy: use the gem_engine_topology library

[Chris Wilson]

Quoting Ramalingam C (2019-06-21 11:03:41)
> Replace the legacy for_each_engine* defines with the ones
> implemented in the gem_engine_topology library.

This is a uABI test, so I need an explanation for why the reduction is
justified.
-Chris
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Re: [igt-dev] [RFC v2 41/43] tests/i915/gem_ctx_shared: use the gem_engine_topology library

[Chris Wilson]

Quoting Ramalingam C (2019-06-21 11:03:43)
> Replace the legacy for_each_engine* defines with the ones
> implemented in the gem_engine_topology library.

Where's my legacy testing at?
-Chris
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[igt-dev] ✓ Fi.CI.BAT: success for Upgrading the Engine discovery

[Patchwork]

== Series Details ==

Series: Upgrading the Engine discovery
URL   : https://patchwork.freedesktop.org/series/62512/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6322 -> IGTPW_3186
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/62512/revisions/1/mbox/

Known issues
------------

  Here are the changes found in IGTPW_3186 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_flink_basic@double-flink:
    - fi-icl-u3:          [PASS][1] -> [DMESG-WARN][2] ([fdo#107724])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6322/fi-icl-u3/igt@gem_flink_basic@double-flink.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3186/fi-icl-u3/igt@gem_flink_basic@double-flink.html

  * igt@i915_selftest@live_evict:
    - fi-icl-dsi:         [PASS][3] -> [INCOMPLETE][4] ([fdo#107713])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6322/fi-icl-dsi/igt@i915_selftest@live_evict.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3186/fi-icl-dsi/igt@i915_selftest@live_evict.html

  
#### Possible fixes ####

  * igt@kms_frontbuffer_tracking@basic:
    - fi-icl-u2:          [FAIL][5] ([fdo#103167]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6322/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3186/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html

  
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724


Participating hosts (53 -> 44)
------------------------------

  Missing    (9): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-skl-guc fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * IGT: IGT_5064 -> IGTPW_3186

  CI_DRM_6322: 07ceacd2be6fc33beff4c551d57c573ce5741d3d @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3186: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3186/
  IGT_5064: 22850c1906550fb97b405c019275dcfb34be8cf7 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools



== Testlist changes ==

+++ 1437 lines
--- 1619 lines

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3186/
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Re: [igt-dev] [RFC v2 05/43] lib/i915: Helper func for engine class to exec_flag

[Tvrtko Ursulin]

On 21/06/2019 11:03, Ramalingam C wrote:
> Helper function is defined to get the execbuf flag for a engine of a
> class mapped for a ctx.

We need matching on both class and instance. You can take 
https://patchwork.freedesktop.org/patch/312751/?series=62454 from Andi 
who wrote it in the meantime.

Regards,

Tvrtko

> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
>   lib/i915/gem_engine_topology.c | 22 ++++++++++++++++++++++
>   lib/i915/gem_engine_topology.h |  2 ++
>   2 files changed, 24 insertions(+)
> 
> diff --git a/lib/i915/gem_engine_topology.c b/lib/i915/gem_engine_topology.c
> index fdd1b951672b..c64f7a4d05bb 100644
> --- a/lib/i915/gem_engine_topology.c
> +++ b/lib/i915/gem_engine_topology.c
> @@ -289,3 +289,25 @@ bool gem_has_engine_topology(int fd)
>   
>   	return !__gem_context_get_param(fd, &param);
>   }
> +
> +/* Return -EINVAL when the Engine with mentioned class is not found */
> +int gem_engine_class_to_execbuf_flags(int fd, uint32_t ctx_id, int class)
> +{
> +	const struct intel_execution_engine2 *e;
> +	DEFINE_CONTEXT_ENGINES_PARAM(engines, param, ctx_id, GEM_MAX_ENGINES);
> +	int i;
> +
> +	if (gem_topology_get_param(fd, &param)) {
> +		__for_each_static_engine(e) {
> +			if (e->class == class)
> +				return e->flags;
> +		}
> +		return -EINVAL;
> +	}
> +
> +	for (i = 0; i < param.size; i++)
> +		if (engines.engines[i].engine_class == class)
> +			return i;
> +
> +	return -EINVAL;
> +}
> diff --git a/lib/i915/gem_engine_topology.h b/lib/i915/gem_engine_topology.h
> index 2415fd1e379b..aa934622cab0 100644
> --- a/lib/i915/gem_engine_topology.h
> +++ b/lib/i915/gem_engine_topology.h
> @@ -53,6 +53,8 @@ int gem_context_lookup_engine(int fd, uint64_t engine, uint32_t ctx_id,
>   
>   void gem_context_set_all_engines(int fd, uint32_t ctx);
>   
> +int gem_engine_class_to_execbuf_flags(int fd, uint32_t ctx_id, int class);
> +
>   #define __for_each_static_engine(e__) \
>   	for ((e__) = intel_execution_engines2; (e__)->name; (e__)++)
>   
> 
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Re: [igt-dev] [RFC v2 01/43] test/i915: gem_bad_reloc: use the gem_engine_topology library

[Chris Wilson]

Quoting Tvrtko Ursulin (2019-06-21 11:05:46)
> 
> On 21/06/2019 11:02, Chris Wilson wrote:
> > Quoting Ramalingam C (2019-06-21 11:03:03)
> >> @@ -193,12 +193,12 @@ igt_main
> >>                  igt_require_gem(fd);
> >>          }
> >>   
> >> -       for (e = intel_execution_engines; e->name; e++) {
> >> +       __for_each_physical_engine(fd, e) {
> > 
> > uABI testing not physical engines.
> 
> Should we add something like for_each_legacy_abi_engine to use in these 
> tests so it is more self-documenting? (And get rid of raw access to 
> intel_execution_engines.)

Yes, a for_each_legacy_abi_engine would be most welcome. The basic
parameter testing should exist for both . Above that I would like to
keep some basic behavioural checking sufficient so that we can be
confident that yesterday's mesa/etc keeps on working on tomorrow's
kernel. After that, so long as we can say "we can tested this behaviour
with the new ABI and have proven the equivalence via this and this test,
ergo we can be confident the legacy ABI will work (if applicable)".
-Chris
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Re: [igt-dev] [RFC v2 05/43] lib/i915: Helper func for engine class to exec_flag

[Ramalingam C]

On 2019-06-21 at 11:49:40 +0100, Tvrtko Ursulin wrote:
> 
> On 21/06/2019 11:03, Ramalingam C wrote:
> > Helper function is defined to get the execbuf flag for a engine of a
> > class mapped for a ctx.
> 
> We need matching on both class and instance. You can take
> https://patchwork.freedesktop.org/patch/312751/?series=62454 from Andi who
> wrote it in the meantime.
Ok Sure.

-Ram
> 
> Regards,
> 
> Tvrtko
> 
> > Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> > ---
> >   lib/i915/gem_engine_topology.c | 22 ++++++++++++++++++++++
> >   lib/i915/gem_engine_topology.h |  2 ++
> >   2 files changed, 24 insertions(+)
> > 
> > diff --git a/lib/i915/gem_engine_topology.c b/lib/i915/gem_engine_topology.c
> > index fdd1b951672b..c64f7a4d05bb 100644
> > --- a/lib/i915/gem_engine_topology.c
> > +++ b/lib/i915/gem_engine_topology.c
> > @@ -289,3 +289,25 @@ bool gem_has_engine_topology(int fd)
> >   	return !__gem_context_get_param(fd, &param);
> >   }
> > +
> > +/* Return -EINVAL when the Engine with mentioned class is not found */
> > +int gem_engine_class_to_execbuf_flags(int fd, uint32_t ctx_id, int class)
> > +{
> > +	const struct intel_execution_engine2 *e;
> > +	DEFINE_CONTEXT_ENGINES_PARAM(engines, param, ctx_id, GEM_MAX_ENGINES);
> > +	int i;
> > +
> > +	if (gem_topology_get_param(fd, &param)) {
> > +		__for_each_static_engine(e) {
> > +			if (e->class == class)
> > +				return e->flags;
> > +		}
> > +		return -EINVAL;
> > +	}
> > +
> > +	for (i = 0; i < param.size; i++)
> > +		if (engines.engines[i].engine_class == class)
> > +			return i;
> > +
> > +	return -EINVAL;
> > +}
> > diff --git a/lib/i915/gem_engine_topology.h b/lib/i915/gem_engine_topology.h
> > index 2415fd1e379b..aa934622cab0 100644
> > --- a/lib/i915/gem_engine_topology.h
> > +++ b/lib/i915/gem_engine_topology.h
> > @@ -53,6 +53,8 @@ int gem_context_lookup_engine(int fd, uint64_t engine, uint32_t ctx_id,
> >   void gem_context_set_all_engines(int fd, uint32_t ctx);
> > +int gem_engine_class_to_execbuf_flags(int fd, uint32_t ctx_id, int class);
> > +
> >   #define __for_each_static_engine(e__) \
> >   	for ((e__) = intel_execution_engines2; (e__)->name; (e__)++)
> > 
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[igt-dev] ✗ Fi.CI.IGT: failure for Upgrading the Engine discovery

[Patchwork]

== Series Details ==

Series: Upgrading the Engine discovery
URL   : https://patchwork.freedesktop.org/series/62512/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_6322_full -> IGTPW_3186_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_3186_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_3186_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/62512/revisions/1/mbox/

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_3186_full:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_busy@close-race:
    - shard-glk:          [PASS][1] -> [FAIL][2] +4 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6322/shard-glk3/igt@gem_busy@close-race.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3186/shard-glk6/igt@gem_busy@close-race.html

  * {igt@gem_ctx_shared@exec-single-timeline-bcs0} (NEW):
    - shard-iclb:         NOTRUN -> [FAIL][3] +2 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3186/shard-iclb2/igt@gem_ctx_shared@exec-single-timeline-bcs0.html

  * {igt@gem_ctx_shared@exec-single-timeline-vcs0} (NEW):
    - shard-glk:          NOTRUN -> [FAIL][4] +2 similar issues
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3186/shard-glk7/igt@gem_ctx_shared@exec-single-timeline-vcs0.html

  * {igt@gem_ctx_shared@exec-single-timeline-vcs1} (NEW):
    - shard-kbl:          NOTRUN -> [FAIL][5] +2 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3186/shard-kbl7/igt@gem_ctx_shared@exec-single-timeline-vcs1.html

  * {igt@gem_ctx_shared@q-independent-vcs0} (NEW):
    - shard-iclb:         NOTRUN -> [SKIP][6] +8 similar issues
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3186/shard-iclb1/igt@gem_ctx_shared@q-independent-vcs0.html

  * igt@gem_eio@in-flight-internal-10ms:
    - shard-hsw:          [PASS][7] -> [CRASH][8] +4 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6322/shard-hsw1/igt@gem_eio@in-flight-internal-10ms.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3186/shard-hsw1/igt@gem_eio@in-flight-internal-10ms.html
    - shard-apl:          NOTRUN -> [CRASH][9] +2 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3186/shard-apl7/igt@gem_eio@in-flight-internal-10ms.html

  * igt@gem_eio@in-flight-internal-1us:
    - shard-iclb:         NOTRUN -> [CRASH][10]
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3186/shard-iclb1/igt@gem_eio@in-flight-internal-1us.html

  * igt@gem_eio@in-flight-internal-immediate:
    - shard-glk:          [PASS][11] -> [CRASH][12] +4 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6322/shard-glk4/igt@gem_eio@in-flight-internal-immediate.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3186/shard-glk1/igt@gem_eio@in-flight-internal-immediate.html
    - shard-iclb:         [PASS][13] -> [CRASH][14] +4 similar issues
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6322/shard-iclb7/igt@gem_eio@in-flight-internal-immediate.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3186/shard-iclb6/igt@gem_eio@in-flight-internal-immediate.html

  * igt@gem_eio@in-flight-suspend:
    - shard-kbl:          [PASS][15] -> [CRASH][16] +5 similar issues
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6322/shard-kbl7/igt@gem_eio@in-flight-suspend.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3186/shard-kbl1/igt@gem_eio@in-flight-suspend.html
    - shard-apl:          [PASS][17] -> [CRASH][18] +2 similar issues
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6322/shard-apl1/igt@gem_eio@in-flight-suspend.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3186/shard-apl1/igt@gem_eio@in-flight-suspend.html
    - shard-snb:          [PASS][19] -> [CRASH][20] +4 similar issues
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6322/shard-snb4/igt@gem_eio@in-flight-suspend.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3186/shard-snb4/igt@gem_eio@in-flight-suspend.html

  * igt@gem_exec_reuse@baggage:
    - shard-snb:          [PASS][21] -> [FAIL][22] +4 similar issues
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6322/shard-snb6/igt@gem_exec_reuse@baggage.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3186/shard-snb6/igt@gem_exec_reuse@baggage.html

  * igt@gem_exec_reuse@contexts:
    - shard-hsw:          [PASS][23] -> [FAIL][24] +4 similar issues
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6322/shard-hsw8/igt@gem_exec_reuse@contexts.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3186/shard-hsw8/igt@gem_exec_reuse@contexts.html
    - shard-kbl:          [PASS][25] -> [FAIL][26] +3 similar issues
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6322/shard-kbl6/igt@gem_exec_reuse@contexts.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3186/shard-kbl3/igt@gem_exec_reuse@contexts.html
    - shard-apl:          [PASS][27] -> [FAIL][28] +4 similar issues
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6322/shard-apl5/igt@gem_exec_reuse@contexts.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3186/shard-apl8/igt@gem_exec_reuse@contexts.html

  * igt@gem_exec_reuse@single:
    - shard-iclb:         [PASS][29] -> [FAIL][30] +3 similar issues
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6322/shard-iclb1/igt@gem_exec_reuse@single.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3186/shard-iclb6/igt@gem_exec_reuse@single.html

  * {igt@gem_exec_schedule@independent-bcs0} (NEW):
    - shard-snb:          NOTRUN -> [FAIL][31] +1 similar issue
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3186/shard-snb4/igt@gem_exec_schedule@independent-bcs0.html

  * {igt@gem_exec_schedule@independent-rcs0} (NEW):
    - shard-apl:          NOTRUN -> [FAIL][32] +6 similar issues
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3186/shard-apl2/igt@gem_exec_schedule@independent-rcs0.html

  * {igt@gem_exec_schedule@independent-vcs0} (NEW):
    - shard-hsw:          NOTRUN -> [FAIL][33] +3 similar issues
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3186/shard-hsw1/igt@gem_exec_schedule@independent-vcs0.html

  * igt@gem_exec_schedule@semaphore-noskip:
    - shard-apl:          [PASS][34] -> [DMESG-FAIL][35]
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6322/shard-apl7/igt@gem_exec_schedule@semaphore-noskip.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3186/shard-apl5/igt@gem_exec_schedule@semaphore-noskip.html

  
#### Warnings ####

  * igt@gem_eio@in-flight-suspend:
    - shard-glk:          [FAIL][36] ([fdo#110667]) -> [CRASH][37]
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6322/shard-glk6/igt@gem_eio@in-flight-suspend.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3186/shard-glk4/igt@gem_eio@in-flight-suspend.html

  
New tests
---------

  New tests have been introduced between CI_DRM_6322_full and IGTPW_3186_full:

### New IGT tests (353) ###

  * igt@gem_bad_reloc@negative-reloc-bcs0:
    - Statuses : 5 pass(s) 1 skip(s)
    - Exec time: [0.0, 0.00] s

  * igt@gem_bad_reloc@negative-reloc-lut-bcs0:
    - Statuses : 5 pass(s) 1 skip(s)
    - Exec time: [0.0, 0.00] s

  * igt@gem_bad_reloc@negative-reloc-lut-rcs0:
    - Statuses : 5 pass(s) 1 skip(s)
    - Exec time: [0.0, 0.00] s

  * igt@gem_bad_reloc@negative-reloc-lut-vcs0:
    - Statuses : 5 pass(s) 1 skip(s)
    - Exec time: [0.0, 0.00] s

  * igt@gem_bad_reloc@negative-reloc-lut-vcs1:
    - Statuses : 1 pass(s)
    - Exec time: [0.0] s

  * igt@gem_bad_reloc@negative-reloc-lut-vcs2:
    - Statuses : 1 pass(s)
    - Exec time: [0.00] s

  * igt@gem_bad_reloc@negative-reloc-lut-vecs0:
    - Statuses : 5 pass(s)
    - Exec time: [0.0, 0.00] s

  * igt@gem_bad_reloc@negative-reloc-rcs0:
    - Statuses : 5 pass(s) 1 skip(s)
    - Exec time: [0.0, 0.00] s

  * igt@gem_bad_reloc@negative-reloc-vcs0:
    - Statuses : 5 pass(s) 1 skip(s)
    - Exec time: [0.0, 0.00] s

  * igt@gem_bad_reloc@negative-reloc-vcs1:
    - Statuses : 1 pass(s)
    - Exec time: [0.00] s

  * igt@gem_bad_reloc@negative-reloc-vcs2:
    - Statuses : 1 pass(s)
    - Exec time: [0.0] s

  * igt@gem_bad_reloc@negative-reloc-vecs0:
    - Statuses : 5 pass(s)
    - Exec time: [0.0, 0.00] s

  * igt@gem_ctx_shared@exec-shared-gtt-bcs0:
    - Statuses : 6 pass(s)
    - Exec time: [0.00] s

  * igt@gem_ctx_shared@exec-shared-gtt-rcs0:
    - Statuses : 6 pass(s)
    - Exec time: [0.00] s

  * igt@gem_ctx_shared@exec-shared-gtt-vcs0:
    - Statuses : 5 pass(s) 1 skip(s)
    - Exec time: [0.0, 0.00] s

  * igt@gem_ctx_shared@exec-shared-gtt-vcs1:
    - Statuses : 1 pass(s)
    - Exec time: [0.00] s

  * igt@gem_ctx_shared@exec-shared-gtt-vcs2:
    - Statuses :
    - Exec time: [None] s

  * igt@gem_ctx_shared@exec-shared-gtt-vecs0:
    - Statuses : 5 pass(s)
    - Exec time: [0.0, 0.00] s

  * igt@gem_ctx_shared@exec-single-timeline-bcs0:
    - Statuses : 4 fail(s) 2 skip(s)
    - Exec time: [0.0, 1.06] s

  * igt@gem_ctx_shared@exec-single-timeline-rcs0:
    - Statuses : 6 skip(s)
    - Exec time: [0.0] s

  * igt@gem_ctx_shared@exec-single-timeline-vcs0:
    - Statuses : 3 fail(s) 3 skip(s)
    - Exec time: [0.0, 1.48] s

  * igt@gem_ctx_shared@exec-single-timeline-vcs1:
    - Statuses : 1 fail(s)
    - Exec time: [1.06] s

  * igt@gem_ctx_shared@exec-single-timeline-vcs2:
    - Statuses :
    - Exec time: [None] s

  * igt@gem_ctx_shared@exec-single-timeline-vecs0:
    - Statuses : 4 fail(s) 1 skip(s)
    - Exec time: [0.0, 1.07] s

  * igt@gem_ctx_shared@q-in-order-bcs0:
    - Statuses : 4 pass(s) 2 skip(s)
    - Exec time: [0.0, 0.03] s

  * igt@gem_ctx_shared@q-in-order-rcs0:
    - Statuses : 3 pass(s) 2 skip(s)
    - Exec time: [0.0, 0.03] s

  * igt@gem_ctx_shared@q-in-order-vcs0:
    - Statuses : 4 pass(s) 2 skip(s)
    - Exec time: [0.0, 0.02] s

  * igt@gem_ctx_shared@q-in-order-vcs1:
    - Statuses : 1 pass(s)
    - Exec time: [0.01] s

  * igt@gem_ctx_shared@q-in-order-vcs2:
    - Statuses :
    - Exec time: [None] s

  * igt@gem_ctx_shared@q-in-order-vecs0:
    - Statuses : 4 pass(s) 1 skip(s)
    - Exec time: [0.0, 0.01] s

  * igt@gem_ctx_shared@q-independent-bcs0:
    - Statuses : 4 pass(s) 2 skip(s)
    - Exec time: [0.0, 0.02] s

  * igt@gem_ctx_shared@q-independent-rcs0:
    - Statuses : 4 pass(s) 2 skip(s)
    - Exec time: [0.0, 0.02] s

  * igt@gem_ctx_shared@q-independent-vcs0:
    - Statuses : 6 skip(s)
    - Exec time: [0.0] s

  * igt@gem_ctx_shared@q-independent-vcs1:
    - Statuses : 1 pass(s)
    - Exec time: [0.01] s

  * igt@gem_ctx_shared@q-independent-vcs2:
    - Statuses : 1 pass(s)
    - Exec time: [0.00] s

  * igt@gem_ctx_shared@q-independent-vecs0:
    - Statuses : 4 pass(s)
    - Exec time: [0.00, 0.02] s

  * igt@gem_ctx_shared@q-out-order-bcs0:
    - Statuses : 4 pass(s) 2 skip(s)
    - Exec time: [0.0, 0.03] s

  * igt@gem_ctx_shared@q-out-order-rcs0:
    - Statuses : 4 pass(s) 2 skip(s)
    - Exec time: [0.0, 0.03] s

  * igt@gem_ctx_shared@q-out-order-vcs0:
    - Statuses : 4 pass(s) 2 skip(s)
    - Exec time: [0.0, 0.03] s

  * igt@gem_ctx_shared@q-out-order-vcs1:
    - Statuses : 1 pass(s)
    - Exec time: [0.01] s

  * igt@gem_ctx_shared@q-out-order-vcs2:
    - Statuses : 1 pass(s)
    - Exec time: [0.01] s

  * igt@gem_ctx_shared@q-out-order-vecs0:
    - Statuses : 4 pass(s) 1 skip(s)
    - Exec time: [0.0, 0.01] s

  * igt@gem_ctx_shared@q-promotion-bcs0:
    - Statuses : 4 pass(s) 2 skip(s)
    - Exec time: [0.0, 0.02] s

  * igt@gem_ctx_shared@q-promotion-rcs0:
    - Statuses : 4 pass(s) 2 skip(s)
    - Exec time: [0.0, 0.04] s

  * igt@gem_ctx_shared@q-promotion-vcs0:
    - Statuses : 4 pass(s) 2 skip(s)
    - Exec time: [0.0, 0.02] s

  * igt@gem_ctx_shared@q-promotion-vcs1:
    - Statuses : 1 pass(s)
    - Exec time: [0.01] s

  * igt@gem_ctx_shared@q-promotion-vcs2:
    - Statuses : 1 pass(s)
    - Exec time: [0.01] s

  * igt@gem_ctx_shared@q-promotion-vecs0:
    - Statuses : 4 pass(s) 1 skip(s)
    - Exec time: [0.0, 0.03] s

  * igt@gem_ctx_shared@q-smoketest-bcs0:
    - Statuses : 3 pass(s) 2 skip(s)
    - Exec time: [0.0, 5.42] s

  * igt@gem_ctx_shared@q-smoketest-rcs0:
    - Statuses : 4 pass(s) 2 skip(s)
    - Exec time: [0.0, 5.42] s

  * igt@gem_ctx_shared@q-smoketest-vcs0:
    - Statuses : 4 pass(s) 2 skip(s)
    - Exec time: [0.0, 5.42] s

  * igt@gem_ctx_shared@q-smoketest-vcs1:
    - Statuses : 1 pass(s)
    - Exec time: [5.39] s

  * igt@gem_ctx_shared@q-smoketest-vcs2:
    - Statuses :
    - Exec time: [None] s

  * igt@gem_ctx_shared@q-smoketest-vecs0:
    - Statuses : 4 pass(s) 1 skip(s)
    - Exec time: [0.0, 5.42] s

  * igt@gem_ctx_switch@basic-rcs0:
    - Statuses : 6 pass(s)
    - Exec time: [5.01, 5.09] s

  * igt@gem_ctx_switch@basic-rcs0-heavy:
    - Statuses : 6 pass(s)
    - Exec time: [5.26, 14.07] s

  * igt@gem_ctx_switch@basic-rcs0-heavy-interruptible:
    - Statuses : 6 pass(s)
    - Exec time: [5.43, 17.42] s

  * igt@gem_ctx_switch@basic-rcs0-heavy-queue:
    - Statuses : 4 pass(s) 2 skip(s)
    - Exec time: [0.0, 14.14] s

  * igt@gem_ctx_switch@basic-rcs0-heavy-queue-interruptible:
    - Statuses : 4 pass(s) 2 skip(s)
    - Exec time: [0.0, 17.09] s

  * igt@gem_ctx_switch@basic-rcs0-interruptible:
    - Statuses : 6 pass(s)
    - Exec time: [5.01, 5.06] s

  * igt@gem_ctx_switch@basic-rcs0-queue:
    - Statuses : 4 pass(s) 2 skip(s)
    - Exec time: [0.0, 5.09] s

  * igt@gem_ctx_switch@basic-rcs0-queue-interruptible:
    - Statuses : 4 pass(s) 1 skip(s)
    - Exec time: [0.0, 5.07] s

  * igt@gem_exec_async@concurrent-writes-bcs0:
    - Statuses : 6 pass(s)
    - Exec time: [0.00] s

  * igt@gem_exec_async@concurrent-writes-rcs0:
    - Statuses : 6 pass(s)
    - Exec time: [0.00] s

  * igt@gem_exec_async@concurrent-writes-vcs0:
    - Statuses : 5 pass(s) 1 skip(s)
    - Exec time: [0.0, 0.00] s

  * igt@gem_exec_async@concurrent-writes-vcs1:
    - Statuses : 1 pass(s)
    - Exec time: [0.00] s

  * igt@gem_exec_async@concurrent-writes-vcs2:
    - Statuses : 1 pass(s)
    - Exec time: [0.00] s

  * igt@gem_exec_async@concurrent-writes-vecs0:
    - Statuses : 5 pass(s)
    - Exec time: [0.00, 0.01] s

  * igt@gem_exec_capture@capture-bcs0:
    - Statuses : 6 pass(s)
    - Exec time: [0.00, 0.02] s

  * igt@gem_exec_capture@capture-rcs0:
    - Statuses : 6 pass(s)
    - Exec time: [0.00, 0.01] s

  * igt@gem_exec_capture@capture-vcs0:
    - Statuses : 5 pass(s) 1 skip(s)
    - Exec time: [0.0, 0.01] s

  * igt@gem_exec_capture@capture-vcs1:
    - Statuses : 1 pass(s)
    - Exec time: [0.01] s

  * igt@gem_exec_capture@capture-vcs2:
    - Statuses :
    - Exec time: [None] s

  * igt@gem_exec_capture@capture-vecs0:
    - Statuses : 5 pass(s)
    - Exec time: [0.00, 0.01] s

  * igt@gem_exec_fence@basic-await-rcs0:
    - Statuses : 6 pass(s)
    - Exec time: [1.01, 1.04] s

  * igt@gem_exec_fence@basic-busy-rcs0:
    - Statuses : 6 pass(s)
    - Exec time: [0.01, 0.03] s

  * igt@gem_exec_fence@basic-wait-rcs0:
    - Statuses : 5 pass(s)
    - Exec time: [0.01, 0.03] s

  * igt@gem_exec_flush@basic-batch-kernel-rcs0-cmd:
    - Statuses : 1 pass(s) 5 skip(s)
    - Exec time: [0.0, 134.38] s

  * igt@gem_exec_flush@basic-batch-kernel-rcs0-uc:
    - Statuses : 6 pass(s)
    - Exec time: [134.33, 134.64] s

  * igt@gem_exec_flush@basic-batch-kernel-rcs0-wb:
    - Statuses : 6 pass(s)
    - Exec time: [134.34, 134.78] s

  * igt@gem_exec_flush@basic-uc-pro-rcs0:
    - Statuses : 6 pass(s)
    - Exec time: [134.24, 134.27] s

  * igt@gem_exec_flush@basic-uc-prw-rcs0:
    - Statuses : 6 pass(s)
    - Exec time: [134.24, 134.32] s

  * igt@gem_exec_flush@basic-uc-ro-rcs0:
    - Statuses : 6 pass(s)
    - Exec time: [134.23, 134.31] s

  * igt@gem_exec_flush@basic-uc-rw-rcs0:
    - Statuses : 6 pass(s)
    - Exec time: [134.23, 134.25] s

  * igt@gem_exec_flush@basic-uc-set-rcs0:
    - Statuses : 5 pass(s)
    - Exec time: [134.23, 134.27] s

  * igt@gem_exec_flush@basic-wb-pro-rcs0:
    - Statuses : 6 pass(s)
    - Exec time: [134.23, 134.26] s

  * igt@gem_exec_flush@basic-wb-prw-rcs0:
    - Statuses : 6 pass(s)
    - Exec time: [134.24, 134.27] s

  * igt@gem_exec_flush@basic-wb-ro-before-rcs0:
    - Statuses : 6 pass(s)
    - Exec time: [134.23, 134.26] s

  * igt@gem_exec_flush@basic-wb-ro-rcs0:
    - Statuses : 6 pass(s)
    - Exec time: [134.24, 134.27] s

  * igt@gem_exec_flush@basic-wb-rw-before-rcs0:
    - Statuses : 6 pass(s)
    - Exec time: [134.24, 134.31] s

  * igt@gem_exec_flush@basic-wb-rw-rcs0:
    - Statuses : 6 pass(s)
    - Exec time: [134.23, 134.25] s

  * igt@gem_exec_flush@basic-wb-set-rcs0:
    - Statuses : 6 pass(s)
    - Exec time: [134.24, 134.26] s

  * igt@gem_exec_schedule@deep-bcs0:
    - Statuses : 4 pass(s) 2 skip(s)
    - Exec time: [0.0, 5.99] s

  * igt@gem_exec_schedule@deep-rcs0:
    - Statuses : 4 pass(s) 2 skip(s)
    - Exec time: [0.0, 5.99] s

  * igt@gem_exec_schedule@deep-vcs0:
    - Statuses : 4 pass(s) 2 skip(s)
    - Exec time: [0.0, 6.42] s

  * igt@gem_exec_schedule@deep-vcs1:
    - Statuses : 1 pass(s)
    - Exec time: [4.91] s

  * igt@gem_exec_schedule@deep-vcs2:
    - Statuses :
    - Exec time: [None] s

  * igt@gem_exec_schedule@deep-vecs0:
    - Statuses : 4 pass(s) 1 skip(s)
    - Exec time: [0.0, 5.87] s

  * igt@gem_exec_schedule@fifo-bcs0:
    - Statuses : 6 pass(s)
    - Exec time: [0.00, 0.03] s

  * igt@gem_exec_schedule@fifo-rcs0:
    - Statuses : 6 pass(s)
    - Exec time: [0.01, 0.03] s

  * igt@gem_exec_schedule@fifo-vcs0:
    - Statuses : 5 pass(s) 1 skip(s)
    - Exec time: [0.0, 0.16] s

  * igt@gem_exec_schedule@fifo-vcs1:
    - Statuses : 1 pass(s)
    - Exec time: [0.02] s

  * igt@gem_exec_schedule@fifo-vcs2:
    - Statuses :
    - Exec time: [None] s

  * igt@gem_exec_schedule@fifo-vecs0:
    - Statuses : 5 pass(s)
    - Exec time: [0.00, 0.01] s

  * igt@gem_exec_schedule@in-order-bcs0:
    - Statuses : 3 pass(s) 2 skip(s)
    - Exec time: [0.0, 0.06] s

  * igt@gem_exec_schedule@in-order-rcs0:
    - Statuses : 4 pass(s) 2 skip(s)
    - Exec time: [0.0, 0.03] s

  * igt@gem_exec_schedule@in-order-vcs0:
    - Statuses : 4 pass(s) 2 skip(s)
    - Exec time: [0.0, 0.05] s

  * igt@gem_exec_schedule@in-order-vcs1:
    - Statuses : 1 pass(s)
    - Exec time: [0.01] s

  * igt@gem_exec_schedule@in-order-vcs2:
    - Statuses :
    - Exec time: [None] s

  * igt@gem_exec_schedule@in-order-vecs0:
    - Statuses : 4 pass(s) 1 skip(s)
    - Exec time: [0.0, 0.02] s

  * igt@gem_exec_schedule@independent-bcs0:
    - Statuses : 6 fail(s)
    - Exec time: [12.01, 16.17] s

  * igt@gem_exec_schedule@independent-rcs0:
    - Statuses : 6 fail(s)
    - Exec time: [8.57, 17.41] s

  * igt@gem_exec_schedule@independent-vcs0:
    - Statuses : 5 fail(s) 1 skip(s)
    - Exec time: [0.0, 17.19] s

  * igt@gem_exec_schedule@independent-vcs1:
    - Statuses : 1 fail(s)
    - Exec time: [4.42] s

  * igt@gem_exec_schedule@independent-vcs2:
    - Statuses : 1 fail(s)
    - Exec time: [12.73] s

  * igt@gem_exec_schedule@independent-vecs0:
    - Statuses : 5 fail(s)
    - Exec time: [11.76, 15.99] s

  * igt@gem_exec_schedule@out-order-bcs0:
    - Statuses : 4 pass(s) 2 skip(s)
    - Exec time: [0.0, 0.03] s

  * igt@gem_exec_schedule@out-order-rcs0:
    - Statuses : 4 pass(s) 2 skip(s)
    - Exec time: [0.0, 0.02] s

  * igt@gem_exec_schedule@out-order-vcs0:
    - Statuses : 4 pass(s) 2 skip(s)
    - Exec time: [0.0, 0.01] s

  * igt@gem_exec_schedule@out-order-vcs1:
    - Statuses : 1 pass(s)
    - Exec time: [0.02] s

  * igt@gem_exec_schedule@out-order-vcs2:
    - Statuses :
    - Exec time: [None] s

  * igt@gem_exec_schedule@out-order-vecs0:
    - Statuses : 4 pass(s) 1 skip(

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3186/
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Re: [igt-dev] [RFC v2 05/43] lib/i915: Helper func for engine class to exec_flag

[Andi Shyti]

On Fri, Jun 21, 2019 at 03:33:07PM +0530, Ramalingam C wrote:
> Helper function is defined to get the execbuf flag for a engine of a
> class mapped for a ctx.
> 
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
>  lib/i915/gem_engine_topology.c | 22 ++++++++++++++++++++++
>  lib/i915/gem_engine_topology.h |  2 ++
>  2 files changed, 24 insertions(+)
> 
> diff --git a/lib/i915/gem_engine_topology.c b/lib/i915/gem_engine_topology.c
> index fdd1b951672b..c64f7a4d05bb 100644
> --- a/lib/i915/gem_engine_topology.c
> +++ b/lib/i915/gem_engine_topology.c
> @@ -289,3 +289,25 @@ bool gem_has_engine_topology(int fd)
>  
>  	return !__gem_context_get_param(fd, &param);
>  }
> +
> +/* Return -EINVAL when the Engine with mentioned class is not found */
> +int gem_engine_class_to_execbuf_flags(int fd, uint32_t ctx_id, int class)
> +{
> +	const struct intel_execution_engine2 *e;
> +	DEFINE_CONTEXT_ENGINES_PARAM(engines, param, ctx_id, GEM_MAX_ENGINES);
> +	int i;

Here Chris would complain that variable declaration should be
declared in length order.

> +	if (gem_topology_get_param(fd, &param)) {
> +		__for_each_static_engine(e) {
> +			if (e->class == class)
> +				return e->flags;
> +		}
> +		return -EINVAL;
> +	}

Here the case where length is '0' is missing.

> +	for (i = 0; i < param.size; i++)
> +		if (engines.engines[i].engine_class == class)
> +			return i;
> +
> +	return -EINVAL;
> +}
> diff --git a/lib/i915/gem_engine_topology.h b/lib/i915/gem_engine_topology.h
> index 2415fd1e379b..aa934622cab0 100644
> --- a/lib/i915/gem_engine_topology.h
> +++ b/lib/i915/gem_engine_topology.h
> @@ -53,6 +53,8 @@ int gem_context_lookup_engine(int fd, uint64_t engine, uint32_t ctx_id,
>  
>  void gem_context_set_all_engines(int fd, uint32_t ctx);
>  
> +int gem_engine_class_to_execbuf_flags(int fd, uint32_t ctx_id, int class);
> +
>  #define __for_each_static_engine(e__) \
>  	for ((e__) = intel_execution_engines2; (e__)->name; (e__)++)

oh... looks familiar :) perhaps you can put my patch (or ours,
they are basically the same) in this series and add sob by you,
as well... there would be three sob this way (tvrtko, me, you).

Andi
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Re: [igt-dev] [RFC v2 18/43] tests/i915/gem_exec_create: use the gem_engine_topology library

[Andi Shyti]

> >         struct drm_i915_gem_exec_object2 obj;
> >         unsigned engines[16];
> >         unsigned nengine;
> > -       unsigned engine;
> > +       const struct intel_execution_engine2 *e;
> >  
> >         nengine = 0;
> > -       for_each_physical_engine(fd, engine)
> > -               engines[nengine++] = engine;
> > +       __for_each_physical_engine(fd, e)
> > +               engines[nengine++] = e->flags;
> >         igt_require(nengine);
> 
> You will have noticed this pattern quite frequently, and possibly
> considered a helper to simply return the engine map?

I think that just calling "intel_init_engine_list()" and retrieve
a "struct inte_engine_data" does it without making any other
helper.

you would get the list of engines/flags in:

  (struct intel_engine_data *)->engines[n].flags

where we also have the flags.

Andi
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Re: [igt-dev] [RFC v2 13/43] tests/i915/gem_ctx_isolation: use the gem_engine_topology library

[Stimson, Dale B]

For tests/i915/gem_ctx_isolation the changes you have made look good,
but you will also need something like the following:

----------------------------------------------------------------
diff --git a/tests/i915/gem_ctx_isolation.c b/tests/i915/gem_ctx_isolation.c
index 2001d562..d91d8952 100644
--- a/tests/i915/gem_ctx_isolation.c
+++ b/tests/i915/gem_ctx_isolation.c
@@ -812,6 +812,7 @@ static unsigned int __has_context_isolation(int fd)
 igt_main
 {
        unsigned int has_context_isolation = 0;
+       const struct intel_execution_engine2 *e;
        int fd = -1;
        uint16_t devid;
 
@@ -833,8 +834,7 @@ igt_main
                igt_skip_on(gen > LAST_KNOWN_GEN);
        }
 
-       for (const struct intel_execution_engine2 *e = intel_execution_engines2;
-            e->name; e++) {
+       __for_each_physical_engine(fd, e) {
                igt_subtest_group {
                        igt_fixture {
                                igt_require(has_context_isolation & (1 << e->class));
----------------------------------------------------------------


On 2019-06-21 15:33:15, Ramalingam C wrote:
> Date: Fri, 21 Jun 2019 15:33:15 +0530
> From: Ramalingam C <ramalingam.c@intel.com>
> To: igt-dev@lists.freedesktop.org, tvrtko.ursulin@linux.intel.com,
>  andi@etezian.org
> Subject: [igt-dev] [RFC v2 13/43] tests/i915/gem_ctx_isolation: use the
>  gem_engine_topology library
> X-Mailer: git-send-email 2.19.1
> 
> Replace the legacy for_each_engine* defines with the ones
> implemented in the gem_engine_topology library.
> 
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
>  tests/i915/gem_ctx_isolation.c | 19 ++++++++-----------
>  1 file changed, 8 insertions(+), 11 deletions(-)
> 
> diff --git a/tests/i915/gem_ctx_isolation.c b/tests/i915/gem_ctx_isolation.c
> index 5b054c81d449..47e20403ce1f 100644
> --- a/tests/i915/gem_ctx_isolation.c
> +++ b/tests/i915/gem_ctx_isolation.c
> @@ -556,7 +556,6 @@ static void nonpriv(int fd,
>  		0x0505c0c0,
>  		0xdeadbeef
>  	};
> -	unsigned int engine = e->flags;
>  	unsigned int num_values = ARRAY_SIZE(values);
>  
>  	/* Sigh -- hsw: we need cmdparser access to our own registers! */
> @@ -574,7 +573,7 @@ static void nonpriv(int fd,
>  
>  		tmpl_regs(fd, ctx, e, tmpl, values[v]);
>  
> -		spin = igt_spin_new(fd, .ctx = ctx, .engine = engine);
> +		spin = igt_spin_new(fd, .ctx = ctx, .engine = e->flags);
>  
>  		igt_debug("%s[%d]: Setting all registers to 0x%08x\n",
>  			  __func__, v, values[v]);
> @@ -612,7 +611,6 @@ static void isolation(int fd,
>  		0xaaaaaaaa,
>  		0xdeadbeef
>  	};
> -	unsigned int engine = e->flags;
>  	unsigned int num_values =
>  		flags & (DIRTY1 | DIRTY2) ? ARRAY_SIZE(values) : 1;
>  
> @@ -625,7 +623,7 @@ static void isolation(int fd,
>  		ctx[0] = gem_context_create(fd);
>  		regs[0] = read_regs(fd, ctx[0], e, flags);
>  
> -		spin = igt_spin_new(fd, .ctx = ctx[0], .engine = engine);
> +		spin = igt_spin_new(fd, .ctx = ctx[0], .engine = e->flags);
>  
>  		if (flags & DIRTY1) {
>  			igt_debug("%s[%d]: Setting all registers of ctx 0 to 0x%08x\n",
> @@ -678,11 +676,11 @@ static void isolation(int fd,
>  #define S4 (4 << 8)
>  #define SLEEP_MASK (0xf << 8)
>  
> -static void inject_reset_context(int fd, unsigned int engine)
> +static void inject_reset_context(int fd, const struct intel_execution_engine2 *e)
>  {
>  	struct igt_spin_factory opts = {
>  		.ctx = gem_context_create(fd),
> -		.engine = engine,
> +		.engine = e->flags,
>  		.flags = IGT_SPIN_FAST,
>  	};
>  	igt_spin_t *spin;
> @@ -693,7 +691,7 @@ static void inject_reset_context(int fd, unsigned int engine)
>  	 * HW for screwing up if the context was already broken.
>  	 */
>  
> -	if (gem_can_store_dword(fd, engine))
> +	if (gem_class_can_store_dword(fd, e->class))
>  		opts.flags |= IGT_SPIN_POLL_RUN;
>  
>  	spin = __igt_spin_factory(fd, &opts);
> @@ -723,7 +721,6 @@ static void preservation(int fd,
>  		0xdeadbeef
>  	};
>  	const unsigned int num_values = ARRAY_SIZE(values);
> -	unsigned int engine = e->flags;
>  	uint32_t ctx[num_values +1 ];
>  	uint32_t regs[num_values + 1][2];
>  	igt_spin_t *spin;
> @@ -731,7 +728,7 @@ static void preservation(int fd,
>  	gem_quiescent_gpu(fd);
>  
>  	ctx[num_values] = gem_context_create(fd);
> -	spin = igt_spin_new(fd, .ctx = ctx[num_values], .engine = engine);
> +	spin = igt_spin_new(fd, .ctx = ctx[num_values], .engine = e->flags);
>  	regs[num_values][0] = read_regs(fd, ctx[num_values], e, flags);
>  	for (int v = 0; v < num_values; v++) {
>  		ctx[v] = gem_context_create(fd);
> @@ -744,7 +741,7 @@ static void preservation(int fd,
>  	igt_spin_free(fd, spin);
>  
>  	if (flags & RESET)
> -		inject_reset_context(fd, engine);
> +		inject_reset_context(fd, e);
>  
>  	switch (flags & SLEEP_MASK) {
>  	case NOSLEEP:
> @@ -771,7 +768,7 @@ static void preservation(int fd,
>  		break;
>  	}
>  
> -	spin = igt_spin_new(fd, .ctx = ctx[num_values], .engine = engine);
> +	spin = igt_spin_new(fd, .ctx = ctx[num_values], .engine = e->flags);
>  	for (int v = 0; v < num_values; v++)
>  		regs[v][1] = read_regs(fd, ctx[v], e, flags);
>  	regs[num_values][1] = read_regs(fd, ctx[num_values], e, flags);
> -- 
> 2.19.1
> 
> _______________________________________________
> igt-dev mailing list
> igt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev
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[igt-dev] ✗ Fi.CI.BAT: failure for Upgrading the Engine discovery (rev2)

[Patchwork]

== Series Details ==

Series: Upgrading the Engine discovery (rev2)
URL   : https://patchwork.freedesktop.org/series/62512/
State : failure

== Summary ==

Applying: test/i915: gem_bad_reloc: use the gem_engine_topology library
Applying: test/i915: gem_exec_async: use the gem_engine_topology library
Applying: test/i915: gem_exec_capture: use the gem_engine_topology library
Applying: test/i915: gem_exec_params: use the gem_engine_topology library
Applying: lib/i915: Helper func for engine class to exec_flag
Using index info to reconstruct a base tree...
M	lib/i915/gem_engine_topology.c
M	lib/i915/gem_engine_topology.h
Falling back to patching base and 3-way merge...
Auto-merging lib/i915/gem_engine_topology.h
CONFLICT (content): Merge conflict in lib/i915/gem_engine_topology.h
Auto-merging lib/i915/gem_engine_topology.c
CONFLICT (content): Merge conflict in lib/i915/gem_engine_topology.c
Patch failed at 0005 lib/i915: Helper func for engine class to exec_flag
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".

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