[igt-dev] [PATCH i-g-t v4 00/10] Chamelium port mapping auto-discovery

[igt-dev] [PATCH i-g-t v4 00/10] Chamelium port mapping auto-discovery

[Simon Ser]

Changes from v3 to v4 (Arek):
- Make chamelium_edid_get_raw return memory that won't be mutated
- Remove autodiscover_ports hardcoded IDs, use GetSupportedInputs and
  HasVideoSupport instead
- Add chamelium_autodiscover description
- Tried to improve readability of chamelium_autodiscover
- Fix typo

Simon Ser (10):
  lib/igt_edid: add edid_get_size
  lib/igt_chamelium: fix chamelium_port_set_edid docs
  lib/igt_chamelium: allow EDIDs to be mutated for each port
  lib/igt_chamelium: split chamelium_new_edid
  lib/igt_chamelium: add CHAMELIUM_MAX_PORTS
  lib/igt_chamelium: upload one EDID per port
  lib/igt_chamelium: set EDID serial
  lib/igt_edid: add edid_get_mfg
  lib/igt_chamelium: add chamelium_get_video_ports
  lib/igt_chamelium: autodiscover Chamelium port mappings

 lib/igt_chamelium.c   | 387 +++++++++++++++++++++++++++++++++++++++---
 lib/igt_chamelium.h   |   9 +
 lib/igt_edid.c        |  23 +++
 lib/igt_edid.h        |   2 +
 tests/kms_chamelium.c |  17 +-
 5 files changed, 401 insertions(+), 37 deletions(-)

--
2.22.0

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[igt-dev] [PATCH i-g-t v4 01/10] lib/igt_edid: add edid_get_size

[Simon Ser]

This is a simple helper to get the size in bytes of an arbitrary EDID.

Signed-off-by: Simon Ser <simon.ser@intel.com>
---
 lib/igt_chamelium.c |  6 ++----
 lib/igt_edid.c      | 10 ++++++++++
 lib/igt_edid.h      |  1 +
 3 files changed, 13 insertions(+), 4 deletions(-)

diff --git a/lib/igt_chamelium.c b/lib/igt_chamelium.c
index b83ff395d44b..966d78dce146 100644
--- a/lib/igt_chamelium.c
+++ b/lib/igt_chamelium.c
@@ -538,12 +538,10 @@ struct chamelium_edid *chamelium_new_edid(struct chamelium *chamelium,
 	xmlrpc_value *res;
 	struct chamelium_edid *chamelium_edid;
 	int edid_id;
-	struct edid *edid = (struct edid *) raw_edid;
-	size_t edid_size = sizeof(struct edid) +
-			   edid->extensions_len * sizeof(struct edid_ext);
+	const struct edid *edid = (struct edid *) raw_edid;
 
 	res = chamelium_rpc(chamelium, NULL, "CreateEdid", "(6)",
-			    raw_edid, edid_size);
+			    raw_edid, edid_get_size(edid));
 
 	xmlrpc_read_int(&chamelium->env, res, &edid_id);
 	xmlrpc_DECREF(res);
diff --git a/lib/igt_edid.c b/lib/igt_edid.c
index e71136f48e14..6cc5e7dd42c4 100644
--- a/lib/igt_edid.c
+++ b/lib/igt_edid.c
@@ -274,6 +274,16 @@ void edid_update_checksum(struct edid *edid)
 					  sizeof(struct edid));
 }
 
+/**
+ * edid_get_size: return the size of the EDID block in bytes including EDID
+ * extensions, if any.
+ */
+size_t edid_get_size(const struct edid *edid)
+{
+	return sizeof(struct edid) +
+	       edid->extensions_len * sizeof(struct edid_ext);
+}
+
 /**
  * cea_sad_init_pcm:
  * @channels: the number of supported channels (max. 8)
diff --git a/lib/igt_edid.h b/lib/igt_edid.h
index 00596ef1a46f..8d8e30ec0554 100644
--- a/lib/igt_edid.h
+++ b/lib/igt_edid.h
@@ -297,6 +297,7 @@ struct edid {
 void edid_init(struct edid *edid);
 void edid_init_with_mode(struct edid *edid, drmModeModeInfo *mode);
 void edid_update_checksum(struct edid *edid);
+size_t edid_get_size(const struct edid *edid);
 void detailed_timing_set_mode(struct detailed_timing *dt, drmModeModeInfo *mode,
 			      int width_mm, int height_mm);
 void detailed_timing_set_monitor_range_mode(struct detailed_timing *dt,
-- 
2.22.0

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Re: [igt-dev] [PATCH i-g-t v4 01/10] lib/igt_edid: add edid_get_size

[Ville Syrjälä]

On Tue, Jun 25, 2019 at 04:14:22PM +0300, Simon Ser wrote:
> This is a simple helper to get the size in bytes of an arbitrary EDID.
> 
> Signed-off-by: Simon Ser <simon.ser@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  lib/igt_chamelium.c |  6 ++----
>  lib/igt_edid.c      | 10 ++++++++++
>  lib/igt_edid.h      |  1 +
>  3 files changed, 13 insertions(+), 4 deletions(-)
> 
> diff --git a/lib/igt_chamelium.c b/lib/igt_chamelium.c
> index b83ff395d44b..966d78dce146 100644
> --- a/lib/igt_chamelium.c
> +++ b/lib/igt_chamelium.c
> @@ -538,12 +538,10 @@ struct chamelium_edid *chamelium_new_edid(struct chamelium *chamelium,
>  	xmlrpc_value *res;
>  	struct chamelium_edid *chamelium_edid;
>  	int edid_id;
> -	struct edid *edid = (struct edid *) raw_edid;
> -	size_t edid_size = sizeof(struct edid) +
> -			   edid->extensions_len * sizeof(struct edid_ext);
> +	const struct edid *edid = (struct edid *) raw_edid;
>  
>  	res = chamelium_rpc(chamelium, NULL, "CreateEdid", "(6)",
> -			    raw_edid, edid_size);
> +			    raw_edid, edid_get_size(edid));
>  
>  	xmlrpc_read_int(&chamelium->env, res, &edid_id);
>  	xmlrpc_DECREF(res);
> diff --git a/lib/igt_edid.c b/lib/igt_edid.c
> index e71136f48e14..6cc5e7dd42c4 100644
> --- a/lib/igt_edid.c
> +++ b/lib/igt_edid.c
> @@ -274,6 +274,16 @@ void edid_update_checksum(struct edid *edid)
>  					  sizeof(struct edid));
>  }
>  
> +/**
> + * edid_get_size: return the size of the EDID block in bytes including EDID
> + * extensions, if any.
> + */
> +size_t edid_get_size(const struct edid *edid)
> +{
> +	return sizeof(struct edid) +
> +	       edid->extensions_len * sizeof(struct edid_ext);
> +}
> +
>  /**
>   * cea_sad_init_pcm:
>   * @channels: the number of supported channels (max. 8)
> diff --git a/lib/igt_edid.h b/lib/igt_edid.h
> index 00596ef1a46f..8d8e30ec0554 100644
> --- a/lib/igt_edid.h
> +++ b/lib/igt_edid.h
> @@ -297,6 +297,7 @@ struct edid {
>  void edid_init(struct edid *edid);
>  void edid_init_with_mode(struct edid *edid, drmModeModeInfo *mode);
>  void edid_update_checksum(struct edid *edid);
> +size_t edid_get_size(const struct edid *edid);
>  void detailed_timing_set_mode(struct detailed_timing *dt, drmModeModeInfo *mode,
>  			      int width_mm, int height_mm);
>  void detailed_timing_set_monitor_range_mode(struct detailed_timing *dt,
> -- 
> 2.22.0
> 
> _______________________________________________
> igt-dev mailing list
> igt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev

-- 
Ville Syrjälä
Intel
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[igt-dev] [PATCH i-g-t v4 02/10] lib/igt_chamelium: fix chamelium_port_set_edid docs

[Simon Ser]

There were two issues:

1. The documentation was wrong, the EDID ID 0 doesn't disable EDIDs, it just
   resets the EDID to Chamelium's default one.
2. My previous patch updating these docs missed the second line of the argument
   description. The result was that only reading the first line was fine, but
   reading both lines felt weird.

Signed-off-by: Simon Ser <simon.ser@intel.com>
Fixes: 1f67ee0d09d6 ("lib/igt_chamelium: replace EDID IDs with opaque structs")
---
 lib/igt_chamelium.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/lib/igt_chamelium.c b/lib/igt_chamelium.c
index 966d78dce146..4a3f64b3585d 100644
--- a/lib/igt_chamelium.c
+++ b/lib/igt_chamelium.c
@@ -564,21 +564,22 @@ static void chamelium_destroy_edid(struct chamelium *chamelium, int edid_id)
  * chamelium_port_set_edid:
  * @chamelium: The Chamelium instance to use
  * @port: The port on the Chamelium to set the EDID on
- * @edid: The Chamelium EDID to set
- * #chamelium_new_edid, or 0 to disable the EDID on the port
+ * @edid: The Chamelium EDID to set or NULL to use the default Chamelium EDID
  *
  * Sets a port on the chamelium to use the specified EDID. This does not fire a
  * hotplug pulse on it's own, and merely changes what EDID the chamelium port
  * will report to us the next time we probe it. Users will need to reprobe the
  * connectors themselves if they want to see the EDID reported by the port
  * change.
+ *
+ * To create an EDID, see #chamelium_new_edid.
  */
 void chamelium_port_set_edid(struct chamelium *chamelium,
 			     struct chamelium_port *port,
 			     struct chamelium_edid *edid)
 {
 	xmlrpc_DECREF(chamelium_rpc(chamelium, NULL, "ApplyEdid", "(ii)",
-				    port->id, edid->id));
+				    port->id, edid ? edid->id : 0));
 }
 
 /**
-- 
2.22.0

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Re: [igt-dev] [PATCH i-g-t v4 02/10] lib/igt_chamelium: fix chamelium_port_set_edid docs

[Arkadiusz Hiler]

On Tue, Jun 25, 2019 at 04:14:23PM +0300, Simon Ser wrote:
> There were two issues:
> 
> 1. The documentation was wrong, the EDID ID 0 doesn't disable EDIDs, it just
>    resets the EDID to Chamelium's default one.
> 2. My previous patch updating these docs missed the second line of the argument
>    description. The result was that only reading the first line was fine, but
>    reading both lines felt weird.
> 
> Signed-off-by: Simon Ser <simon.ser@intel.com>
> Fixes: 1f67ee0d09d6 ("lib/igt_chamelium: replace EDID IDs with opaque structs")
Reviewed-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
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[igt-dev] [PATCH i-g-t v4 03/10] lib/igt_chamelium: allow EDIDs to be mutated for each port

[Simon Ser]

This adds the infrastructure necessary to change EDIDs provided to
chamelium_new_edid, without actually doing it yet. This commit just updates the
API to make it possible, documents expectations and updates callers
accordingly. Mutating EDIDs is necessary to add an identifier to them (e.g. by
adding a serial number) and to be able to map Chamelium ports to DRM
connectors.

A new function chamelium_edid_get_raw allows callers to retrieve the exact EDID
used for a particular port.

Signed-off-by: Simon Ser <simon.ser@intel.com>
---
 lib/igt_chamelium.c   | 30 ++++++++++++++++++++++++++++--
 lib/igt_chamelium.h   |  2 ++
 tests/kms_chamelium.c |  7 +++++--
 3 files changed, 35 insertions(+), 4 deletions(-)

diff --git a/lib/igt_chamelium.c b/lib/igt_chamelium.c
index 4a3f64b3585d..9ea483eee717 100644
--- a/lib/igt_chamelium.c
+++ b/lib/igt_chamelium.c
@@ -83,6 +83,7 @@
 
 struct chamelium_edid {
 	int id;
+	struct edid *raw;
 	struct igt_list link;
 };
 
@@ -530,6 +531,11 @@ void chamelium_schedule_hpd_toggle(struct chamelium *chamelium,
  * Uploads and registers a new EDID with the chamelium. The EDID will be
  * destroyed automatically when #chamelium_deinit is called.
  *
+ * Callers shouldn't assume that the raw EDID they provide is uploaded as-is to
+ * the Chamelium. The EDID may be mutated (e.g. a serial number can be appended
+ * to be able to uniquely identify the EDID). To retrieve the exact EDID that
+ * will be applied to a particular port, use #chamelium_edid_get_raw.
+ *
  * Returns: An opaque pointer to the Chamelium EDID
  */
 struct chamelium_edid *chamelium_new_edid(struct chamelium *chamelium,
@@ -539,16 +545,18 @@ struct chamelium_edid *chamelium_new_edid(struct chamelium *chamelium,
 	struct chamelium_edid *chamelium_edid;
 	int edid_id;
 	const struct edid *edid = (struct edid *) raw_edid;
+	size_t edid_size = edid_get_size(edid);
 
 	res = chamelium_rpc(chamelium, NULL, "CreateEdid", "(6)",
-			    raw_edid, edid_get_size(edid));
+			    raw_edid, edid_size);
 
 	xmlrpc_read_int(&chamelium->env, res, &edid_id);
 	xmlrpc_DECREF(res);
 
 	chamelium_edid = calloc(1, sizeof(struct chamelium_edid));
 	chamelium_edid->id = edid_id;
-
+	chamelium_edid->raw = malloc(edid_size);
+	memcpy(chamelium_edid->raw, raw_edid, edid_size);
 	igt_list_add(&chamelium_edid->link, &chamelium->edids);
 
 	return chamelium_edid;
@@ -560,6 +568,23 @@ static void chamelium_destroy_edid(struct chamelium *chamelium, int edid_id)
 				    edid_id));
 }
 
+/**
+ * chamelium_edid_get_raw: get the raw EDID
+ * @edid: the Chamelium EDID
+ * @port: the Chamelium port
+ *
+ * The EDID provided to #chamelium_new_edid may be mutated for identification
+ * purposes. This function allows to retrieve the exact EDID that will be set
+ * for a given port.
+ *
+ * The returned raw EDID is only valid until the next call to this function.
+ */
+const struct edid *chamelium_edid_get_raw(struct chamelium_edid *edid,
+					  struct chamelium_port *port)
+{
+	return edid->raw;
+}
+
 /**
  * chamelium_port_set_edid:
  * @chamelium: The Chamelium instance to use
@@ -1898,6 +1923,7 @@ void chamelium_deinit(struct chamelium *chamelium)
 	/* Destroy any EDIDs we created to make sure we don't leak them */
 	igt_list_for_each_safe(pos, tmp, &chamelium->edids, link) {
 		chamelium_destroy_edid(chamelium, pos->id);
+		free(pos->raw);
 		free(pos);
 	}
 
diff --git a/lib/igt_chamelium.h b/lib/igt_chamelium.h
index ce9e9ced75d9..f58e4f1f0c75 100644
--- a/lib/igt_chamelium.h
+++ b/lib/igt_chamelium.h
@@ -102,6 +102,8 @@ void chamelium_schedule_hpd_toggle(struct chamelium *chamelium,
 				   bool rising_edge);
 struct chamelium_edid *chamelium_new_edid(struct chamelium *chamelium,
 					  const unsigned char *edid);
+const struct edid *chamelium_edid_get_raw(struct chamelium_edid *edid,
+					  struct chamelium_port *port);
 void chamelium_port_set_edid(struct chamelium *chamelium,
 			     struct chamelium_port *port,
 			     struct chamelium_edid *edid);
diff --git a/tests/kms_chamelium.c b/tests/kms_chamelium.c
index 378024d8fd05..175e5032c973 100644
--- a/tests/kms_chamelium.c
+++ b/tests/kms_chamelium.c
@@ -276,9 +276,10 @@ static void
 test_edid_read(data_t *data, struct chamelium_port *port, enum test_edid edid)
 {
 	drmModePropertyBlobPtr edid_blob = NULL;
-	const unsigned char *raw_edid = get_edid(edid);
 	drmModeConnector *connector = chamelium_port_get_connector(
 	    data->chamelium, port, false);
+	size_t raw_edid_size;
+	const struct edid *raw_edid;
 	uint64_t edid_blob_id;
 
 	reset_state(data, port);
@@ -295,7 +296,9 @@ test_edid_read(data_t *data, struct chamelium_port *port, enum test_edid edid)
 	igt_assert(edid_blob = drmModeGetPropertyBlob(data->drm_fd,
 						      edid_blob_id));
 
-	igt_assert(memcmp(raw_edid, edid_blob->data, EDID_LENGTH) == 0);
+	raw_edid = chamelium_edid_get_raw(data->edids[edid], port);
+	raw_edid_size = edid_get_size(raw_edid);
+	igt_assert(memcmp(raw_edid, edid_blob->data, raw_edid_size) == 0);
 
 	drmModeFreePropertyBlob(edid_blob);
 	drmModeFreeConnector(connector);
-- 
2.22.0

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Re: [igt-dev] [PATCH i-g-t v4 03/10] lib/igt_chamelium: allow EDIDs to be mutated for each port

[Arkadiusz Hiler]

On Tue, Jun 25, 2019 at 04:14:24PM +0300, Simon Ser wrote:
> This adds the infrastructure necessary to change EDIDs provided to
> chamelium_new_edid, without actually doing it yet. This commit just updates the
> API to make it possible, documents expectations and updates callers
> accordingly. Mutating EDIDs is necessary to add an identifier to them (e.g. by
> adding a serial number) and to be able to map Chamelium ports to DRM
> connectors.
> 
> A new function chamelium_edid_get_raw allows callers to retrieve the exact EDID
> used for a particular port.
> 
> Signed-off-by: Simon Ser <simon.ser@intel.com>
Reviewed-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
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[igt-dev] [PATCH i-g-t v4 04/10] lib/igt_chamelium: split chamelium_new_edid

[Simon Ser]

Split the part that uploads an EDID to the Chamelium board into a new
chamelium_upload_edid function. The function will be called in
chamelium_set_edid instead of chamelium_new_edid when automatic Chamelium port
mapping is implemented.

Signed-off-by: Simon Ser <simon.ser@intel.com>
---
 lib/igt_chamelium.c | 35 ++++++++++++++++++++++-------------
 1 file changed, 22 insertions(+), 13 deletions(-)

diff --git a/lib/igt_chamelium.c b/lib/igt_chamelium.c
index 9ea483eee717..8e6db445330e 100644
--- a/lib/igt_chamelium.c
+++ b/lib/igt_chamelium.c
@@ -523,6 +523,26 @@ void chamelium_schedule_hpd_toggle(struct chamelium *chamelium,
 				    "(iii)", port->id, delay_ms, rising_edge));
 }
 
+static int chamelium_upload_edid(struct chamelium *chamelium,
+				 const struct edid *edid)
+{
+	xmlrpc_value *res;
+	int edid_id;
+
+	res = chamelium_rpc(chamelium, NULL, "CreateEdid", "(6)",
+			    edid, edid_get_size(edid));
+	xmlrpc_read_int(&chamelium->env, res, &edid_id);
+	xmlrpc_DECREF(res);
+
+	return edid_id;
+}
+
+static void chamelium_destroy_edid(struct chamelium *chamelium, int edid_id)
+{
+	xmlrpc_DECREF(chamelium_rpc(chamelium, NULL, "DestroyEdid", "(i)",
+				    edid_id));
+}
+
 /**
  * chamelium_new_edid:
  * @chamelium: The Chamelium instance to use
@@ -541,33 +561,22 @@ void chamelium_schedule_hpd_toggle(struct chamelium *chamelium,
 struct chamelium_edid *chamelium_new_edid(struct chamelium *chamelium,
 					  const unsigned char *raw_edid)
 {
-	xmlrpc_value *res;
 	struct chamelium_edid *chamelium_edid;
 	int edid_id;
 	const struct edid *edid = (struct edid *) raw_edid;
 	size_t edid_size = edid_get_size(edid);
 
-	res = chamelium_rpc(chamelium, NULL, "CreateEdid", "(6)",
-			    raw_edid, edid_size);
-
-	xmlrpc_read_int(&chamelium->env, res, &edid_id);
-	xmlrpc_DECREF(res);
+	edid_id = chamelium_upload_edid(chamelium, edid);
 
 	chamelium_edid = calloc(1, sizeof(struct chamelium_edid));
 	chamelium_edid->id = edid_id;
 	chamelium_edid->raw = malloc(edid_size);
-	memcpy(chamelium_edid->raw, raw_edid, edid_size);
+	memcpy(chamelium_edid->raw, edid, edid_get_size(edid));
 	igt_list_add(&chamelium_edid->link, &chamelium->edids);
 
 	return chamelium_edid;
 }
 
-static void chamelium_destroy_edid(struct chamelium *chamelium, int edid_id)
-{
-	xmlrpc_DECREF(chamelium_rpc(chamelium, NULL, "DestroyEdid", "(i)",
-				    edid_id));
-}
-
 /**
  * chamelium_edid_get_raw: get the raw EDID
  * @edid: the Chamelium EDID
-- 
2.22.0

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Re: [igt-dev] [PATCH i-g-t v4 04/10] lib/igt_chamelium: split chamelium_new_edid

[Arkadiusz Hiler]

On Tue, Jun 25, 2019 at 04:14:25PM +0300, Simon Ser wrote:
> Split the part that uploads an EDID to the Chamelium board into a new
> chamelium_upload_edid function. The function will be called in
> chamelium_set_edid instead of chamelium_new_edid when automatic Chamelium port
> mapping is implemented.
> 
> Signed-off-by: Simon Ser <simon.ser@intel.com>
> ---
>  lib/igt_chamelium.c | 35 ++++++++++++++++++++++-------------
>  1 file changed, 22 insertions(+), 13 deletions(-)
> 
> diff --git a/lib/igt_chamelium.c b/lib/igt_chamelium.c
> index 9ea483eee717..8e6db445330e 100644
> --- a/lib/igt_chamelium.c
> +++ b/lib/igt_chamelium.c
> @@ -523,6 +523,26 @@ void chamelium_schedule_hpd_toggle(struct chamelium *chamelium,
>  				    "(iii)", port->id, delay_ms, rising_edge));
>  }
>  
> +static int chamelium_upload_edid(struct chamelium *chamelium,
> +				 const struct edid *edid)
> +{
> +	xmlrpc_value *res;
> +	int edid_id;
> +
> +	res = chamelium_rpc(chamelium, NULL, "CreateEdid", "(6)",
> +			    edid, edid_get_size(edid));
> +	xmlrpc_read_int(&chamelium->env, res, &edid_id);
> +	xmlrpc_DECREF(res);
> +
> +	return edid_id;
> +}
> +
> +static void chamelium_destroy_edid(struct chamelium *chamelium, int edid_id)
> +{
> +	xmlrpc_DECREF(chamelium_rpc(chamelium, NULL, "DestroyEdid", "(i)",
> +				    edid_id));
> +}
> +
>  /**
>   * chamelium_new_edid:
>   * @chamelium: The Chamelium instance to use
> @@ -541,33 +561,22 @@ void chamelium_schedule_hpd_toggle(struct chamelium *chamelium,
>  struct chamelium_edid *chamelium_new_edid(struct chamelium *chamelium,
>  					  const unsigned char *raw_edid)
>  {
> -	xmlrpc_value *res;
>  	struct chamelium_edid *chamelium_edid;
>  	int edid_id;
>  	const struct edid *edid = (struct edid *) raw_edid;
>  	size_t edid_size = edid_get_size(edid);
>  
> -	res = chamelium_rpc(chamelium, NULL, "CreateEdid", "(6)",
> -			    raw_edid, edid_size);
> -
> -	xmlrpc_read_int(&chamelium->env, res, &edid_id);
> -	xmlrpc_DECREF(res);
> +	edid_id = chamelium_upload_edid(chamelium, edid);
>  
>  	chamelium_edid = calloc(1, sizeof(struct chamelium_edid));
>  	chamelium_edid->id = edid_id;
>  	chamelium_edid->raw = malloc(edid_size);
> -	memcpy(chamelium_edid->raw, raw_edid, edid_size);
> +	memcpy(chamelium_edid->raw, edid, edid_get_size(edid));

We still have edid_size defined which we use just for malloc. Any
particular reason switching here to edid_get_size(edid)?

Other than that
Reviewed-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>


>  	igt_list_add(&chamelium_edid->link, &chamelium->edids);
>  
>  	return chamelium_edid;
>  }
>  
> -static void chamelium_destroy_edid(struct chamelium *chamelium, int edid_id)
> -{
> -	xmlrpc_DECREF(chamelium_rpc(chamelium, NULL, "DestroyEdid", "(i)",
> -				    edid_id));
> -}
> -
>  /**
>   * chamelium_edid_get_raw: get the raw EDID
>   * @edid: the Chamelium EDID
> -- 
> 2.22.0
> 
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[igt-dev] [PATCH i-g-t v4 05/10] lib/igt_chamelium: add CHAMELIUM_MAX_PORTS

[Simon Ser]

We will always be able to find an upper bound for the number of connectors
supported by a Chamelium board. Instead of using dynamic arrays, simplify the
code by using static ones.

More code will need to have arrays of ports in the future.

Signed-off-by: Simon Ser <simon.ser@intel.com>
---
 lib/igt_chamelium.c | 7 ++-----
 lib/igt_chamelium.h | 7 +++++++
 2 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/lib/igt_chamelium.c b/lib/igt_chamelium.c
index 8e6db445330e..1b5566f42f44 100644
--- a/lib/igt_chamelium.c
+++ b/lib/igt_chamelium.c
@@ -120,7 +120,7 @@ struct chamelium {
 	int drm_fd;
 
 	struct igt_list edids;
-	struct chamelium_port *ports;
+	struct chamelium_port ports[CHAMELIUM_MAX_PORTS];
 	int port_count;
 };
 
@@ -1738,11 +1738,9 @@ static bool chamelium_read_port_mappings(struct chamelium *chamelium,
 		if (strstr(group_list[i], "Chamelium:"))
 			chamelium->port_count++;
 	}
+	igt_assert(chamelium->port_count <= CHAMELIUM_MAX_PORTS);
 
-	chamelium->ports = calloc(sizeof(struct chamelium_port),
-				  chamelium->port_count);
 	port_i = 0;
-
 	for (i = 0; group_list[i] != NULL; i++) {
 		group = group_list[i];
 
@@ -1942,7 +1940,6 @@ void chamelium_deinit(struct chamelium *chamelium)
 	for (i = 0; i < chamelium->port_count; i++)
 		free(chamelium->ports[i].name);
 
-	free(chamelium->ports);
 	free(chamelium);
 }
 
diff --git a/lib/igt_chamelium.h b/lib/igt_chamelium.h
index f58e4f1f0c75..c034d72c8910 100644
--- a/lib/igt_chamelium.h
+++ b/lib/igt_chamelium.h
@@ -61,6 +61,13 @@ struct chamelium_audio_file {
 
 struct chamelium_edid;
 
+/**
+ * CHAMELIUM_MAX_PORTS: the maximum number of ports supported by igt_chamelium.
+ *
+ * For now, we have 1 VGA, 1 HDMI and 2 DisplayPort ports.
+ */
+#define CHAMELIUM_MAX_PORTS 4
+
 /**
  * CHAMELIUM_DEFAULT_EDID: provide this ID to #chamelium_port_set_edid to use
  * the default EDID.
-- 
2.22.0

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Re: [igt-dev] [PATCH i-g-t v4 05/10] lib/igt_chamelium: add CHAMELIUM_MAX_PORTS

[Arkadiusz Hiler]

On Tue, Jun 25, 2019 at 04:14:26PM +0300, Simon Ser wrote:
> We will always be able to find an upper bound for the number of connectors
> supported by a Chamelium board. Instead of using dynamic arrays, simplify the
> code by using static ones.
> 
> More code will need to have arrays of ports in the future.
> 
> Signed-off-by: Simon Ser <simon.ser@intel.com>
Reviewed-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
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[igt-dev] [PATCH i-g-t v4 06/10] lib/igt_chamelium: upload one EDID per port

[Simon Ser]

Instead of uploading the EDID in chamelium_new_edid, do it in
chamelium_port_set_edid so that we can customize the EDID depending on the
port.

Signed-off-by: Simon Ser <simon.ser@intel.com>
---
 lib/igt_chamelium.c | 28 +++++++++++++++++++++-------
 1 file changed, 21 insertions(+), 7 deletions(-)

diff --git a/lib/igt_chamelium.c b/lib/igt_chamelium.c
index 1b5566f42f44..467f1a458516 100644
--- a/lib/igt_chamelium.c
+++ b/lib/igt_chamelium.c
@@ -82,8 +82,8 @@
  */
 
 struct chamelium_edid {
-	int id;
 	struct edid *raw;
+	int ids[CHAMELIUM_MAX_PORTS];
 	struct igt_list link;
 };
 
@@ -562,14 +562,10 @@ struct chamelium_edid *chamelium_new_edid(struct chamelium *chamelium,
 					  const unsigned char *raw_edid)
 {
 	struct chamelium_edid *chamelium_edid;
-	int edid_id;
 	const struct edid *edid = (struct edid *) raw_edid;
 	size_t edid_size = edid_get_size(edid);
 
-	edid_id = chamelium_upload_edid(chamelium, edid);
-
 	chamelium_edid = calloc(1, sizeof(struct chamelium_edid));
-	chamelium_edid->id = edid_id;
 	chamelium_edid->raw = malloc(edid_size);
 	memcpy(chamelium_edid->raw, edid, edid_get_size(edid));
 	igt_list_add(&chamelium_edid->link, &chamelium->edids);
@@ -612,8 +608,23 @@ void chamelium_port_set_edid(struct chamelium *chamelium,
 			     struct chamelium_port *port,
 			     struct chamelium_edid *edid)
 {
+	int edid_id;
+	size_t port_index;
+	const struct edid *raw_edid;
+
+	if (edid) {
+		port_index = port - chamelium->ports;
+		edid_id = edid->ids[port_index];
+		if (edid_id == 0) {
+			raw_edid = chamelium_edid_get_raw(edid, port);
+			edid_id = chamelium_upload_edid(chamelium, raw_edid);
+		}
+	} else {
+		edid_id = 0;
+	}
+
 	xmlrpc_DECREF(chamelium_rpc(chamelium, NULL, "ApplyEdid", "(ii)",
-				    port->id, edid ? edid->id : 0));
+				    port->id, edid_id));
 }
 
 /**
@@ -1929,7 +1940,10 @@ void chamelium_deinit(struct chamelium *chamelium)
 
 	/* Destroy any EDIDs we created to make sure we don't leak them */
 	igt_list_for_each_safe(pos, tmp, &chamelium->edids, link) {
-		chamelium_destroy_edid(chamelium, pos->id);
+		for (i = 0; i < CHAMELIUM_MAX_PORTS; i++) {
+			if (pos->ids[i])
+				chamelium_destroy_edid(chamelium, pos->ids[i]);
+		}
 		free(pos->raw);
 		free(pos);
 	}
-- 
2.22.0

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Re: [igt-dev] [PATCH i-g-t v4 06/10] lib/igt_chamelium: upload one EDID per port

[Arkadiusz Hiler]

On Tue, Jun 25, 2019 at 04:14:27PM +0300, Simon Ser wrote:
> Instead of uploading the EDID in chamelium_new_edid, do it in
> chamelium_port_set_edid so that we can customize the EDID depending on the
> port.
> 
> Signed-off-by: Simon Ser <simon.ser@intel.com>
> ---
>  lib/igt_chamelium.c | 28 +++++++++++++++++++++-------
>  1 file changed, 21 insertions(+), 7 deletions(-)
> 
> diff --git a/lib/igt_chamelium.c b/lib/igt_chamelium.c
> index 1b5566f42f44..467f1a458516 100644
> --- a/lib/igt_chamelium.c
> +++ b/lib/igt_chamelium.c
> @@ -82,8 +82,8 @@
>   */
>  
>  struct chamelium_edid {
> -	int id;
>  	struct edid *raw;
> +	int ids[CHAMELIUM_MAX_PORTS];
>  	struct igt_list link;
>  };
>  
> @@ -562,14 +562,10 @@ struct chamelium_edid *chamelium_new_edid(struct chamelium *chamelium,
>  					  const unsigned char *raw_edid)
>  {
>  	struct chamelium_edid *chamelium_edid;
> -	int edid_id;
>  	const struct edid *edid = (struct edid *) raw_edid;
>  	size_t edid_size = edid_get_size(edid);
>  
> -	edid_id = chamelium_upload_edid(chamelium, edid);
> -
>  	chamelium_edid = calloc(1, sizeof(struct chamelium_edid));
> -	chamelium_edid->id = edid_id;
>  	chamelium_edid->raw = malloc(edid_size);
>  	memcpy(chamelium_edid->raw, edid, edid_get_size(edid));
>  	igt_list_add(&chamelium_edid->link, &chamelium->edids);
> @@ -612,8 +608,23 @@ void chamelium_port_set_edid(struct chamelium *chamelium,
>  			     struct chamelium_port *port,
>  			     struct chamelium_edid *edid)
>  {
> +	int edid_id;
> +	size_t port_index;
> +	const struct edid *raw_edid;
> +
> +	if (edid) {
> +		port_index = port - chamelium->ports;
> +		edid_id = edid->ids[port_index];
> +		if (edid_id == 0) {
> +			raw_edid = chamelium_edid_get_raw(edid, port);
> +			edid_id = chamelium_upload_edid(chamelium, raw_edid);

			edid->ids[port_index] = edid_id;

with that:
Reviewed-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
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[igt-dev] [PATCH i-g-t v4 07/10] lib/igt_chamelium: set EDID serial

[Simon Ser]

Set a different EDID serial string for each Chamelium port, so that we can
easily tell which DRM connector maps to a Chamelium port.

Signed-off-by: Simon Ser <simon.ser@intel.com>
---
 lib/igt_chamelium.c | 43 ++++++++++++++++++++++++++++++++++++++-----
 1 file changed, 38 insertions(+), 5 deletions(-)

diff --git a/lib/igt_chamelium.c b/lib/igt_chamelium.c
index 467f1a458516..959a14333ed9 100644
--- a/lib/igt_chamelium.c
+++ b/lib/igt_chamelium.c
@@ -82,7 +82,9 @@
  */
 
 struct chamelium_edid {
-	struct edid *raw;
+	struct chamelium *chamelium;
+	struct edid *base;
+	struct edid *raw[CHAMELIUM_MAX_PORTS];
 	int ids[CHAMELIUM_MAX_PORTS];
 	struct igt_list link;
 };
@@ -566,13 +568,33 @@ struct chamelium_edid *chamelium_new_edid(struct chamelium *chamelium,
 	size_t edid_size = edid_get_size(edid);
 
 	chamelium_edid = calloc(1, sizeof(struct chamelium_edid));
-	chamelium_edid->raw = malloc(edid_size);
-	memcpy(chamelium_edid->raw, edid, edid_get_size(edid));
+	chamelium_edid->chamelium = chamelium;
+	chamelium_edid->base = malloc(edid_size);
+	memcpy(chamelium_edid->base, edid, edid_get_size(edid));
 	igt_list_add(&chamelium_edid->link, &chamelium->edids);
 
 	return chamelium_edid;
 }
 
+/**
+ * chamelium_port_tag_edid: tag the EDID with the provided Chamelium port.
+ */
+static void chamelium_port_tag_edid(struct chamelium_port *port,
+				    struct edid *edid)
+{
+	uint32_t *serial;
+
+	/* Product code: Chamelium */
+	edid->prod_code[0] = 'C';
+	edid->prod_code[1] = 'H';
+
+	/* Serial: Chamelium port ID */
+	serial = (uint32_t *) &edid->serial;
+	*serial = port->id;
+
+	edid_update_checksum(edid);
+}
+
 /**
  * chamelium_edid_get_raw: get the raw EDID
  * @edid: the Chamelium EDID
@@ -587,7 +609,17 @@ struct chamelium_edid *chamelium_new_edid(struct chamelium *chamelium,
 const struct edid *chamelium_edid_get_raw(struct chamelium_edid *edid,
 					  struct chamelium_port *port)
 {
-	return edid->raw;
+	size_t port_index = port - edid->chamelium->ports;
+	size_t edid_size;
+
+	if (!edid->raw[port_index]) {
+		edid_size = edid_get_size(edid->base);
+		edid->raw[port_index] = malloc(edid_size);
+		memcpy(edid->raw[port_index], edid->base, edid_size);
+		chamelium_port_tag_edid(port, edid->raw[port_index]);
+	}
+
+	return edid->raw[port_index];
 }
 
 /**
@@ -1943,8 +1975,9 @@ void chamelium_deinit(struct chamelium *chamelium)
 		for (i = 0; i < CHAMELIUM_MAX_PORTS; i++) {
 			if (pos->ids[i])
 				chamelium_destroy_edid(chamelium, pos->ids[i]);
+			free(pos->raw[i]);
 		}
-		free(pos->raw);
+		free(pos->base);
 		free(pos);
 	}
 
-- 
2.22.0

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Re: [igt-dev] [PATCH i-g-t v4 07/10] lib/igt_chamelium: set EDID serial

[Arkadiusz Hiler]

On Tue, Jun 25, 2019 at 04:14:28PM +0300, Simon Ser wrote:
> Set a different EDID serial string for each Chamelium port, so that we can
> easily tell which DRM connector maps to a Chamelium port.
> 
> Signed-off-by: Simon Ser <simon.ser@intel.com>
Reviewed-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
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[igt-dev] [PATCH i-g-t v4 08/10] lib/igt_edid: add edid_get_mfg

[Simon Ser]

This returns the 3-letter manufacturer identifier of an EDID.

Signed-off-by: Simon Ser <simon.ser@intel.com>
---
 lib/igt_edid.c        | 13 +++++++++++++
 lib/igt_edid.h        |  1 +
 tests/kms_chamelium.c | 10 +++-------
 3 files changed, 17 insertions(+), 7 deletions(-)

diff --git a/lib/igt_edid.c b/lib/igt_edid.c
index 6cc5e7dd42c4..cbb7eefff70d 100644
--- a/lib/igt_edid.c
+++ b/lib/igt_edid.c
@@ -172,6 +172,19 @@ void detailed_timing_set_string(struct detailed_timing *dt,
 		ds->str[len] = '\n';
 }
 
+/**
+ * edid_get_mfg: reads the 3-letter manufacturer identifier
+ *
+ * The string is *not* NULL-terminated.
+ */
+void edid_get_mfg(const struct edid *edid, char out[static 3])
+{
+	out[0] = ((edid->mfg_id[0] & 0x7C) >> 2) + '@';
+	out[1] = (((edid->mfg_id[0] & 0x03) << 3) |
+		 ((edid->mfg_id[1] & 0xE0) >> 5)) + '@';
+	out[2] = (edid->mfg_id[1] & 0x1F) + '@';
+}
+
 static void edid_set_mfg(struct edid *edid, const char mfg[static 3])
 {
 	edid->mfg_id[0] = (mfg[0] - '@') << 2 | (mfg[1] - '@') >> 3;
diff --git a/lib/igt_edid.h b/lib/igt_edid.h
index 8d8e30ec0554..47581bb778b0 100644
--- a/lib/igt_edid.h
+++ b/lib/igt_edid.h
@@ -298,6 +298,7 @@ void edid_init(struct edid *edid);
 void edid_init_with_mode(struct edid *edid, drmModeModeInfo *mode);
 void edid_update_checksum(struct edid *edid);
 size_t edid_get_size(const struct edid *edid);
+void edid_get_mfg(const struct edid *edid, char out[static 3]);
 void detailed_timing_set_mode(struct detailed_timing *dt, drmModeModeInfo *mode,
 			      int width_mm, int height_mm);
 void detailed_timing_set_monitor_range_mode(struct detailed_timing *dt,
diff --git a/tests/kms_chamelium.c b/tests/kms_chamelium.c
index 175e5032c973..1d5c0ded8a56 100644
--- a/tests/kms_chamelium.c
+++ b/tests/kms_chamelium.c
@@ -184,7 +184,7 @@ check_analog_bridge(data_t *data, struct chamelium_port *port)
 	drmModeConnector *connector = chamelium_port_get_connector(
 	    data->chamelium, port, false);
 	uint64_t edid_blob_id;
-	unsigned char *edid;
+	const struct edid *edid;
 	char edid_vendor[3];
 
 	if (chamelium_port_get_type(port) != DRM_MODE_CONNECTOR_VGA) {
@@ -198,12 +198,8 @@ check_analog_bridge(data_t *data, struct chamelium_port *port)
 	igt_assert(edid_blob = drmModeGetPropertyBlob(data->drm_fd,
 						      edid_blob_id));
 
-	edid = (unsigned char *) edid_blob->data;
-
-	edid_vendor[0] = ((edid[8] & 0x7c) >> 2) + '@';
-	edid_vendor[1] = (((edid[8] & 0x03) << 3) |
-			  ((edid[9] & 0xe0) >> 5)) + '@';
-	edid_vendor[2] = (edid[9] & 0x1f) + '@';
+	edid = (const struct edid *) edid_blob->data;
+	edid_get_mfg(edid, edid_vendor);
 
 	drmModeFreePropertyBlob(edid_blob);
 	drmModeFreeConnector(connector);
-- 
2.22.0

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Re: [igt-dev] [PATCH i-g-t v4 08/10] lib/igt_edid: add edid_get_mfg

[Ville Syrjälä]

On Tue, Jun 25, 2019 at 04:14:29PM +0300, Simon Ser wrote:
> This returns the 3-letter manufacturer identifier of an EDID.
> 
> Signed-off-by: Simon Ser <simon.ser@intel.com>
> ---
>  lib/igt_edid.c        | 13 +++++++++++++
>  lib/igt_edid.h        |  1 +
>  tests/kms_chamelium.c | 10 +++-------
>  3 files changed, 17 insertions(+), 7 deletions(-)
> 
> diff --git a/lib/igt_edid.c b/lib/igt_edid.c
> index 6cc5e7dd42c4..cbb7eefff70d 100644
> --- a/lib/igt_edid.c
> +++ b/lib/igt_edid.c
> @@ -172,6 +172,19 @@ void detailed_timing_set_string(struct detailed_timing *dt,
>  		ds->str[len] = '\n';
>  }
>  
> +/**
> + * edid_get_mfg: reads the 3-letter manufacturer identifier
> + *
> + * The string is *not* NULL-terminated.

Maybe we should make it NULL terminated to avoid mishaps?

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> + */
> +void edid_get_mfg(const struct edid *edid, char out[static 3])
> +{
> +	out[0] = ((edid->mfg_id[0] & 0x7C) >> 2) + '@';
> +	out[1] = (((edid->mfg_id[0] & 0x03) << 3) |
> +		 ((edid->mfg_id[1] & 0xE0) >> 5)) + '@';
> +	out[2] = (edid->mfg_id[1] & 0x1F) + '@';
> +}
> +
>  static void edid_set_mfg(struct edid *edid, const char mfg[static 3])
>  {
>  	edid->mfg_id[0] = (mfg[0] - '@') << 2 | (mfg[1] - '@') >> 3;
> diff --git a/lib/igt_edid.h b/lib/igt_edid.h
> index 8d8e30ec0554..47581bb778b0 100644
> --- a/lib/igt_edid.h
> +++ b/lib/igt_edid.h
> @@ -298,6 +298,7 @@ void edid_init(struct edid *edid);
>  void edid_init_with_mode(struct edid *edid, drmModeModeInfo *mode);
>  void edid_update_checksum(struct edid *edid);
>  size_t edid_get_size(const struct edid *edid);
> +void edid_get_mfg(const struct edid *edid, char out[static 3]);
>  void detailed_timing_set_mode(struct detailed_timing *dt, drmModeModeInfo *mode,
>  			      int width_mm, int height_mm);
>  void detailed_timing_set_monitor_range_mode(struct detailed_timing *dt,
> diff --git a/tests/kms_chamelium.c b/tests/kms_chamelium.c
> index 175e5032c973..1d5c0ded8a56 100644
> --- a/tests/kms_chamelium.c
> +++ b/tests/kms_chamelium.c
> @@ -184,7 +184,7 @@ check_analog_bridge(data_t *data, struct chamelium_port *port)
>  	drmModeConnector *connector = chamelium_port_get_connector(
>  	    data->chamelium, port, false);
>  	uint64_t edid_blob_id;
> -	unsigned char *edid;
> +	const struct edid *edid;
>  	char edid_vendor[3];
>  
>  	if (chamelium_port_get_type(port) != DRM_MODE_CONNECTOR_VGA) {
> @@ -198,12 +198,8 @@ check_analog_bridge(data_t *data, struct chamelium_port *port)
>  	igt_assert(edid_blob = drmModeGetPropertyBlob(data->drm_fd,
>  						      edid_blob_id));
>  
> -	edid = (unsigned char *) edid_blob->data;
> -
> -	edid_vendor[0] = ((edid[8] & 0x7c) >> 2) + '@';
> -	edid_vendor[1] = (((edid[8] & 0x03) << 3) |
> -			  ((edid[9] & 0xe0) >> 5)) + '@';
> -	edid_vendor[2] = (edid[9] & 0x1f) + '@';
> +	edid = (const struct edid *) edid_blob->data;
> +	edid_get_mfg(edid, edid_vendor);
>  
>  	drmModeFreePropertyBlob(edid_blob);
>  	drmModeFreeConnector(connector);
> -- 
> 2.22.0
> 
> _______________________________________________
> igt-dev mailing list
> igt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev

-- 
Ville Syrjälä
Intel
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[igt-dev] [PATCH i-g-t v4 09/10] lib/igt_chamelium: add chamelium_get_video_ports

[Simon Ser]

This function queries the video port IDs supported by the Chamelium device.
It'll be used to know on which ports we can perform auto-detection.

An alternative would be to hardcode a list of port IDs. However port IDs are
specific to each Chamelium board, and will change for a different
implementation. Also it would be nice to have simulators implement the
Chamelium API…

Signed-off-by: Simon Ser <simon.ser@intel.com>
---
 lib/igt_chamelium.c | 44 ++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 44 insertions(+)

diff --git a/lib/igt_chamelium.c b/lib/igt_chamelium.c
index 959a14333ed9..3cd2acafd385 100644
--- a/lib/igt_chamelium.c
+++ b/lib/igt_chamelium.c
@@ -1758,6 +1758,50 @@ static unsigned int chamelium_get_port_type(struct chamelium *chamelium,
 	return port_type;
 }
 
+static bool chamelium_has_video_support(struct chamelium *chamelium,
+					int port_id)
+{
+	xmlrpc_value *res;
+	int has_video_support;
+
+	res = chamelium_rpc(chamelium, NULL, "HasVideoSupport", "(i)", port_id);
+	xmlrpc_read_bool(&chamelium->env, res, &has_video_support);
+	xmlrpc_DECREF(res);
+
+	return has_video_support;
+}
+
+/**
+ * chamelium_get_video_ports: retrieve a list of video port IDs
+ *
+ * Returns: the number of video port IDs
+ */
+static size_t chamelium_get_video_ports(struct chamelium *chamelium,
+					int port_ids[static CHAMELIUM_MAX_PORTS])
+{
+	xmlrpc_value *res, *res_port;
+	int res_len, i, port_id;
+	size_t port_ids_len = 0;
+
+	res = chamelium_rpc(chamelium, NULL, "GetSupportedInputs", "()");
+	res_len = xmlrpc_array_size(&chamelium->env, res);
+	for (i = 0; i < res_len; i++) {
+		xmlrpc_array_read_item(&chamelium->env, res, i, &res_port);
+		xmlrpc_read_int(&chamelium->env, res_port, &port_id);
+		xmlrpc_DECREF(res_port);
+
+		if (!chamelium_has_video_support(chamelium, port_id))
+			continue;
+
+		igt_assert(port_ids_len < CHAMELIUM_MAX_PORTS);
+		port_ids[port_ids_len] = port_id;
+		port_ids_len++;
+	}
+	xmlrpc_DECREF(res);
+
+	return port_ids_len;
+}
+
 static bool chamelium_read_port_mappings(struct chamelium *chamelium,
 					 int drm_fd)
 {
-- 
2.22.0

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Re: [igt-dev] [PATCH i-g-t v4 09/10] lib/igt_chamelium: add chamelium_get_video_ports

[Arkadiusz Hiler]

On Tue, Jun 25, 2019 at 04:14:30PM +0300, Simon Ser wrote:
> This function queries the video port IDs supported by the Chamelium device.
> It'll be used to know on which ports we can perform auto-detection.
> 
> An alternative would be to hardcode a list of port IDs. However port IDs are
> specific to each Chamelium board, and will change for a different
> implementation. Also it would be nice to have simulators implement the
> Chamelium API…
> 
> Signed-off-by: Simon Ser <simon.ser@intel.com>
Reviewed-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
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[igt-dev] [PATCH i-g-t v4 10/10] lib/igt_chamelium: autodiscover Chamelium port mappings

[Simon Ser]

This removes the need for configuring Chamelium ports in .igtrc, making it both
easier and less error-prone to setup Chamelium boards.

A new function chamelium_autodiscover sets a different EDID on each Chamelium
port and plugs them. We then walk the list of DRM connectors, read back the
EDID and infer the mapping.

The EDID serial number is used to tell each port apart. In case a mapping is
already configured in the .igtrc file, we check that it's consistent.

MST is not handled yet (requires refactoring existing tests since connector IDs
aren't stable).

Signed-off-by: Simon Ser <simon.ser@intel.com>
---
 lib/igt_chamelium.c | 213 +++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 211 insertions(+), 2 deletions(-)

diff --git a/lib/igt_chamelium.c b/lib/igt_chamelium.c
index 3cd2acafd385..05ef8bf99e67 100644
--- a/lib/igt_chamelium.c
+++ b/lib/igt_chamelium.c
@@ -360,7 +360,7 @@ static xmlrpc_value *chamelium_rpc(struct chamelium *chamelium,
  */
 void chamelium_plug(struct chamelium *chamelium, struct chamelium_port *port)
 {
-	igt_debug("Plugging %s\n", port->name);
+	igt_debug("Plugging %s (Chamelium port ID %d)\n", port->name, port->id);
 	xmlrpc_DECREF(chamelium_rpc(chamelium, NULL, "Plug", "(i)", port->id));
 }
 
@@ -1893,6 +1893,212 @@ out:
 	return ret;
 }
 
+static int port_id_from_edid(int drm_fd, drmModeConnector *connector)
+{
+	int port_id = -1;
+	bool ok;
+	uint64_t edid_blob_id;
+	drmModePropertyBlobRes *edid_blob;
+	const struct edid *edid;
+	char mfg[3];
+
+	if (connector->connection != DRM_MODE_CONNECTED) {
+		igt_debug("Skipping auto-discovery for connector %s-%d: "
+			  "connector status is not connected\n",
+			  kmstest_connector_type_str(connector->connector_type),
+			  connector->connector_type_id);
+		return -1;
+	}
+
+	ok = kmstest_get_property(drm_fd, connector->connector_id,
+				  DRM_MODE_OBJECT_CONNECTOR, "EDID",
+				  NULL, &edid_blob_id, NULL);
+	if (!ok || !edid_blob_id) {
+		igt_debug("Skipping auto-discovery for connector %s-%d: "
+			  "missing the EDID property\n",
+			  kmstest_connector_type_str(connector->connector_type),
+			  connector->connector_type_id);
+		return -1;
+	}
+
+	edid_blob = drmModeGetPropertyBlob(drm_fd, edid_blob_id);
+	igt_assert(edid_blob);
+
+	edid = (const struct edid *) edid_blob->data;
+
+	edid_get_mfg(edid, mfg);
+	if (memcmp(mfg, "IGT", 3) != 0) {
+		igt_debug("Skipping connector %s-%d for auto-discovery: "
+			  "manufacturer is %.3s, not IGT\n",
+			  kmstest_connector_type_str(connector->connector_type),
+			  connector->connector_type_id, mfg);
+		goto out;
+	}
+
+	if (edid->prod_code[0] != 'C' || edid->prod_code[1] != 'H') {
+		igt_warn("Invalid EDID for IGT connector %s-%d: "
+			  "invalid product code\n",
+			  kmstest_connector_type_str(connector->connector_type),
+			  connector->connector_type_id);
+		goto out;
+	}
+
+	port_id = *(uint32_t *) &edid->serial;
+	igt_debug("Auto-discovery mapped connector %s-%d to Chamelium "
+		  "port ID %d\n",
+		  kmstest_connector_type_str(connector->connector_type),
+		  connector->connector_type_id, port_id);
+
+out:
+	drmModeFreePropertyBlob(edid_blob);
+	return port_id;
+}
+
+/**
+ * chamelium_autodiscover: automagically discover the Chamelium port mapping
+ *
+ * The Chamelium API uses port IDs wheras the Device Under Test uses DRM
+ * connectors. We need to know which Chamelium port is plugged to a given DRM
+ * connector. This has typically been done via a configuration file in the
+ * past (see #chamelium_read_port_mappings), but this function provides an
+ * automatic way to do it.
+ *
+ * We will plug all Chamelium ports with a different EDID on each. Then we'll
+ * read the EDID on each DRM connector and infer the Chamelium port ID.
+ */
+static bool chamelium_autodiscover(struct chamelium *chamelium, int drm_fd)
+{
+	int candidate_ports[CHAMELIUM_MAX_PORTS];
+	size_t candidate_ports_len;
+	drmModeRes *res;
+	drmModeConnector *connector;
+	struct chamelium_port *port;
+	size_t i, j, port_count;
+	int port_id;
+	uint32_t conn_id;
+	struct chamelium_edid *edid;
+	bool found;
+	uint32_t discovered_conns[CHAMELIUM_MAX_PORTS] = {0};
+	char conn_name[64];
+	struct timespec start;
+	uint64_t elapsed_ns;
+
+	candidate_ports_len = chamelium_get_video_ports(chamelium,
+							candidate_ports);
+
+	igt_debug("Starting Chamelium port auto-discovery on %zu ports\n",
+		  candidate_ports_len);
+	igt_gettime(&start);
+
+	edid = chamelium_new_edid(chamelium, igt_kms_get_base_edid());
+
+	/* Set EDID and plug ports we want to auto-discover */
+	port_count = chamelium->port_count;
+	for (i = 0; i < candidate_ports_len; i++) {
+		port_id = candidate_ports[i];
+
+		/* Get or add a chamelium_port slot */
+		port = NULL;
+		for (j = 0; j < chamelium->port_count; j++) {
+			if (chamelium->ports[j].id == port_id) {
+				port = &chamelium->ports[j];
+				break;
+			}
+		}
+		if (!port) {
+			igt_assert(port_count < CHAMELIUM_MAX_PORTS);
+			port = &chamelium->ports[port_count];
+			port_count++;
+
+			port->id = port_id;
+		}
+
+		chamelium_port_set_edid(chamelium, port, edid);
+		chamelium_plug(chamelium, port);
+	}
+
+	/* Reprobe connectors and build the mapping */
+	res = drmModeGetResources(drm_fd);
+	if (!res)
+		return false;
+
+	for (i = 0; i < res->count_connectors; i++) {
+		conn_id = res->connectors[i];
+
+		/* Read the EDID and parse the Chamelium port ID we stored
+		 * there. */
+		connector = drmModeGetConnector(drm_fd, res->connectors[i]);
+		port_id = port_id_from_edid(drm_fd, connector);
+		drmModeFreeConnector(connector);
+		if (port_id < 0)
+			continue;
+
+		/* If we already have a mapping from the config file, check
+		 * that it's consistent. */
+		found = false;
+		for (j = 0; j < chamelium->port_count; j++) {
+			port = &chamelium->ports[j];
+			if (port->connector_id == conn_id) {
+				found = true;
+				igt_assert_f(port->id == port_id,
+					     "Inconsistency detected in .igtrc: "
+					     "connector %s is configured with "
+					     "Chamelium port %d, but is "
+					     "connected to port %d\n",
+					     port->name, port->id, port_id);
+				break;
+			}
+		}
+		if (found)
+			continue;
+
+		/* We got a new mapping */
+		found = false;
+		for (j = 0; j < candidate_ports_len; j++) {
+			if (port_id == candidate_ports[j]) {
+				found = true;
+				discovered_conns[j] = conn_id;
+				break;
+			}
+		}
+		igt_assert_f(found, "Auto-discovered a port (%d) we haven't "
+			     "setup\n", port_id);
+	}
+
+	drmModeFreeResources(res);
+
+	/* We now have a Chamelium port ID ↔ DRM connector ID mapping:
+	 * candidate_ports contains the Chamelium port IDs and
+	 * discovered_conns contains the DRM connector IDs. */
+	for (i = 0; i < candidate_ports_len; i++) {
+		port_id = candidate_ports[i];
+		conn_id = discovered_conns[i];
+		if (!conn_id) {
+			continue;
+		}
+
+		port = &chamelium->ports[chamelium->port_count];
+		chamelium->port_count++;
+
+		port->id = port_id;
+		port->type = chamelium_get_port_type(chamelium, port);
+		port->connector_id = conn_id;
+
+		connector = drmModeGetConnectorCurrent(drm_fd, conn_id);
+		snprintf(conn_name, sizeof(conn_name), "%s-%u",
+			 kmstest_connector_type_str(connector->connector_type),
+			 connector->connector_type_id);
+		drmModeFreeConnector(connector);
+		port->name = strdup(conn_name);
+	}
+
+	elapsed_ns = igt_nsec_elapsed(&start);
+	igt_debug("Auto-discovery took %fms\n",
+		  (float) elapsed_ns / (1000 * 1000));
+
+	return true;
+}
+
 static bool chamelium_read_config(struct chamelium *chamelium, int drm_fd)
 {
 	GError *error = NULL;
@@ -1910,7 +2116,10 @@ static bool chamelium_read_config(struct chamelium *chamelium, int drm_fd)
 		return false;
 	}
 
-	return chamelium_read_port_mappings(chamelium, drm_fd);
+	if (!chamelium_read_port_mappings(chamelium, drm_fd)) {
+		return false;
+	}
+	return chamelium_autodiscover(chamelium, drm_fd);
 }
 
 /**
-- 
2.22.0

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Re: [igt-dev] [PATCH i-g-t v4 10/10] lib/igt_chamelium: autodiscover Chamelium port mappings

[Arkadiusz Hiler]

On Tue, Jun 25, 2019 at 04:14:31PM +0300, Simon Ser wrote:
> This removes the need for configuring Chamelium ports in .igtrc, making it both
> easier and less error-prone to setup Chamelium boards.
> 
> A new function chamelium_autodiscover sets a different EDID on each Chamelium
> port and plugs them. We then walk the list of DRM connectors, read back the
> EDID and infer the mapping.
> 
> The EDID serial number is used to tell each port apart. In case a mapping is
> already configured in the .igtrc file, we check that it's consistent.
> 
> MST is not handled yet (requires refactoring existing tests since connector IDs
> aren't stable).
> 
> Signed-off-by: Simon Ser <simon.ser@intel.com>
Reviewed-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
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[igt-dev] ✓ Fi.CI.BAT: success for Chamelium port mapping auto-discovery (rev3)

[Patchwork]

== Series Details ==

Series: Chamelium port mapping auto-discovery (rev3)
URL   : https://patchwork.freedesktop.org/series/62393/
State : success

== Summary ==

CI Bug Log - changes from IGT_5068 -> IGTPW_3197
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/62393/revisions/3/mbox/

Known issues
------------

  Here are the changes found in IGTPW_3197 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_create@basic-files:
    - fi-cml-u2:          [PASS][1] -> [INCOMPLETE][2] ([fdo#110566])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/fi-cml-u2/igt@gem_ctx_create@basic-files.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/fi-cml-u2/igt@gem_ctx_create@basic-files.html

  * igt@gem_mmap@basic-small-bo:
    - fi-cml-u:           [PASS][3] -> [INCOMPLETE][4] ([fdo#110566] / [fdo#110715])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/fi-cml-u/igt@gem_mmap@basic-small-bo.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/fi-cml-u/igt@gem_mmap@basic-small-bo.html

  * igt@i915_module_load@reload:
    - fi-blb-e6850:       [PASS][5] -> [INCOMPLETE][6] ([fdo#107718])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/fi-blb-e6850/igt@i915_module_load@reload.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/fi-blb-e6850/igt@i915_module_load@reload.html

  * igt@kms_busy@basic-flip-c:
    - fi-kbl-7500u:       [PASS][7] -> [SKIP][8] ([fdo#109271] / [fdo#109278]) +2 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/fi-kbl-7500u/igt@kms_busy@basic-flip-c.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/fi-kbl-7500u/igt@kms_busy@basic-flip-c.html

  * igt@kms_chamelium@dp-hpd-fast:
    - fi-icl-u2:          [PASS][9] -> [DMESG-WARN][10] ([fdo#110595])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/fi-icl-u2/igt@kms_chamelium@dp-hpd-fast.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/fi-icl-u2/igt@kms_chamelium@dp-hpd-fast.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7567u:       [PASS][11] -> [FAIL][12] ([fdo#109485])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/fi-kbl-7567u/igt@kms_chamelium@hdmi-hpd-fast.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/fi-kbl-7567u/igt@kms_chamelium@hdmi-hpd-fast.html

  
#### Possible fixes ####

  * igt@gem_close_race@basic-threads:
    - fi-icl-dsi:         [INCOMPLETE][13] ([fdo#107713]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/fi-icl-dsi/igt@gem_close_race@basic-threads.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/fi-icl-dsi/igt@gem_close_race@basic-threads.html

  
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485
  [fdo#110566]: https://bugs.freedesktop.org/show_bug.cgi?id=110566
  [fdo#110595]: https://bugs.freedesktop.org/show_bug.cgi?id=110595
  [fdo#110715]: https://bugs.freedesktop.org/show_bug.cgi?id=110715


Participating hosts (52 -> 46)
------------------------------

  Additional (2): fi-bxt-dsi fi-icl-u3 
  Missing    (8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * IGT: IGT_5068 -> IGTPW_3197

  CI_DRM_6342: 6eef272b254b34200129af8f2ec1e4cfe1ca6bff @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3197: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/
  IGT_5068: 15ad664534413628f06c0f172aac11598bfdb895 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/
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[igt-dev] ✓ Fi.CI.IGT: success for Chamelium port mapping auto-discovery (rev3)

[Patchwork]

== Series Details ==

Series: Chamelium port mapping auto-discovery (rev3)
URL   : https://patchwork.freedesktop.org/series/62393/
State : success

== Summary ==

CI Bug Log - changes from IGT_5068_full -> IGTPW_3197_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/62393/revisions/3/mbox/

Known issues
------------

  Here are the changes found in IGTPW_3197_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_caching@read-writes:
    - shard-iclb:         [PASS][1] -> [DMESG-WARN][2] ([fdo#110913 ]) +8 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/shard-iclb1/igt@gem_caching@read-writes.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/shard-iclb5/igt@gem_caching@read-writes.html

  * igt@gem_ctx_isolation@bcs0-s3:
    - shard-apl:          [PASS][3] -> [DMESG-WARN][4] ([fdo#108566])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/shard-apl4/igt@gem_ctx_isolation@bcs0-s3.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/shard-apl8/igt@gem_ctx_isolation@bcs0-s3.html

  * igt@gem_eio@in-flight-10ms:
    - shard-kbl:          [PASS][5] -> [DMESG-WARN][6] ([fdo#110913 ]) +5 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/shard-kbl3/igt@gem_eio@in-flight-10ms.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/shard-kbl1/igt@gem_eio@in-flight-10ms.html

  * igt@gem_eio@in-flight-suspend:
    - shard-kbl:          [PASS][7] -> [INCOMPLETE][8] ([fdo#103665])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/shard-kbl4/igt@gem_eio@in-flight-suspend.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/shard-kbl3/igt@gem_eio@in-flight-suspend.html

  * igt@gem_exec_alignment@single:
    - shard-snb:          [PASS][9] -> [DMESG-WARN][10] ([fdo#110789] / [fdo#110913 ]) +4 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/shard-snb6/igt@gem_exec_alignment@single.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/shard-snb5/igt@gem_exec_alignment@single.html

  * igt@gem_exec_reloc@basic-write-gtt-active:
    - shard-hsw:          [PASS][11] -> [DMESG-WARN][12] ([fdo#110789] / [fdo#110913 ]) +5 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/shard-hsw5/igt@gem_exec_reloc@basic-write-gtt-active.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/shard-hsw2/igt@gem_exec_reloc@basic-write-gtt-active.html

  * igt@gem_softpin@evict-active:
    - shard-apl:          [PASS][13] -> [DMESG-WARN][14] ([fdo#110913 ]) +6 similar issues
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/shard-apl3/igt@gem_softpin@evict-active.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/shard-apl7/igt@gem_softpin@evict-active.html

  * igt@i915_selftest@mock_sanitycheck:
    - shard-glk:          [PASS][15] -> [DMESG-WARN][16] ([fdo#110913 ]) +7 similar issues
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/shard-glk3/igt@i915_selftest@mock_sanitycheck.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/shard-glk4/igt@i915_selftest@mock_sanitycheck.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic:
    - shard-hsw:          [PASS][17] -> [SKIP][18] ([fdo#109271]) +20 similar issues
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/shard-hsw6/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/shard-hsw1/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-iclb:         [PASS][19] -> [FAIL][20] ([fdo#103167]) +4 similar issues
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_psr2_su@frontbuffer:
    - shard-iclb:         [PASS][21] -> [SKIP][22] ([fdo#109642])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/shard-iclb6/igt@kms_psr2_su@frontbuffer.html

  * igt@kms_psr@psr2_cursor_blt:
    - shard-iclb:         [PASS][23] -> [SKIP][24] ([fdo#109441])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/shard-iclb2/igt@kms_psr@psr2_cursor_blt.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/shard-iclb6/igt@kms_psr@psr2_cursor_blt.html

  
#### Possible fixes ####

  * igt@gem_eio@in-flight-contexts-immediate:
    - shard-kbl:          [DMESG-WARN][25] ([fdo#110913 ]) -> [PASS][26] +5 similar issues
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/shard-kbl1/igt@gem_eio@in-flight-contexts-immediate.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/shard-kbl7/igt@gem_eio@in-flight-contexts-immediate.html

  * igt@gem_exec_balancer@smoke:
    - shard-iclb:         [SKIP][27] ([fdo#110854]) -> [PASS][28]
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/shard-iclb6/igt@gem_exec_balancer@smoke.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/shard-iclb1/igt@gem_exec_balancer@smoke.html

  * igt@gem_exec_reloc@basic-write-gtt-active:
    - shard-apl:          [DMESG-WARN][29] ([fdo#110913 ]) -> [PASS][30] +7 similar issues
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/shard-apl2/igt@gem_exec_reloc@basic-write-gtt-active.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/shard-apl6/igt@gem_exec_reloc@basic-write-gtt-active.html

  * igt@gem_partial_pwrite_pread@writes-after-reads:
    - shard-hsw:          [DMESG-WARN][31] ([fdo#110789] / [fdo#110913 ]) -> [PASS][32] +1 similar issue
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/shard-hsw4/igt@gem_partial_pwrite_pread@writes-after-reads.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/shard-hsw1/igt@gem_partial_pwrite_pread@writes-after-reads.html

  * igt@gem_partial_pwrite_pread@writes-after-reads-snoop:
    - shard-iclb:         [DMESG-WARN][33] ([fdo#110913 ]) -> [PASS][34] +9 similar issues
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/shard-iclb7/igt@gem_partial_pwrite_pread@writes-after-reads-snoop.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/shard-iclb2/igt@gem_partial_pwrite_pread@writes-after-reads-snoop.html
    - shard-glk:          [DMESG-WARN][35] ([fdo#110913 ]) -> [PASS][36] +1 similar issue
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/shard-glk2/igt@gem_partial_pwrite_pread@writes-after-reads-snoop.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/shard-glk4/igt@gem_partial_pwrite_pread@writes-after-reads-snoop.html

  * igt@gem_softpin@noreloc-s3:
    - shard-apl:          [DMESG-WARN][37] ([fdo#108566]) -> [PASS][38]
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/shard-apl8/igt@gem_softpin@noreloc-s3.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/shard-apl6/igt@gem_softpin@noreloc-s3.html

  * igt@gem_tiled_swapping@non-threaded:
    - shard-glk:          [DMESG-WARN][39] ([fdo#108686]) -> [PASS][40]
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/shard-glk7/igt@gem_tiled_swapping@non-threaded.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/shard-glk8/igt@gem_tiled_swapping@non-threaded.html

  * igt@gem_userptr_blits@sync-unmap-cycles:
    - shard-snb:          [DMESG-WARN][41] ([fdo#110913 ]) -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/shard-snb1/igt@gem_userptr_blits@sync-unmap-cycles.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/shard-snb2/igt@gem_userptr_blits@sync-unmap-cycles.html

  * igt@i915_pm_rc6_residency@rc6-accuracy:
    - shard-kbl:          [SKIP][43] ([fdo#109271]) -> [PASS][44]
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/shard-kbl2/igt@i915_pm_rc6_residency@rc6-accuracy.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/shard-kbl4/igt@i915_pm_rc6_residency@rc6-accuracy.html

  * igt@kms_cursor_crc@pipe-b-cursor-128x42-onscreen:
    - shard-apl:          [FAIL][45] ([fdo#103232]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/shard-apl3/igt@kms_cursor_crc@pipe-b-cursor-128x42-onscreen.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/shard-apl1/igt@kms_cursor_crc@pipe-b-cursor-128x42-onscreen.html
    - shard-kbl:          [FAIL][47] ([fdo#103232]) -> [PASS][48]
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/shard-kbl3/igt@kms_cursor_crc@pipe-b-cursor-128x42-onscreen.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/shard-kbl1/igt@kms_cursor_crc@pipe-b-cursor-128x42-onscreen.html

  * igt@kms_draw_crc@draw-method-rgb565-mmap-cpu-ytiled:
    - shard-iclb:         [FAIL][49] ([fdo#103184] / [fdo#103232]) -> [PASS][50]
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/shard-iclb1/igt@kms_draw_crc@draw-method-rgb565-mmap-cpu-ytiled.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/shard-iclb8/igt@kms_draw_crc@draw-method-rgb565-mmap-cpu-ytiled.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt:
    - shard-iclb:         [FAIL][51] ([fdo#103167]) -> [PASS][52] +5 similar issues
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render:
    - shard-hsw:          [SKIP][53] ([fdo#109271]) -> [PASS][54] +18 similar issues
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/shard-hsw1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/shard-hsw5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render.html

  * igt@kms_psr@psr2_sprite_plane_move:
    - shard-iclb:         [SKIP][55] ([fdo#109441]) -> [PASS][56] +2 similar issues
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/shard-iclb4/igt@kms_psr@psr2_sprite_plane_move.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html

  * igt@kms_vblank@pipe-a-query-idle-hang:
    - shard-snb:          [DMESG-WARN][57] ([fdo#110789] / [fdo#110913 ]) -> [PASS][58] +4 similar issues
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/shard-snb4/igt@kms_vblank@pipe-a-query-idle-hang.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/shard-snb1/igt@kms_vblank@pipe-a-query-idle-hang.html

  * igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend:
    - shard-hsw:          [INCOMPLETE][59] ([fdo#103540]) -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5068/shard-hsw5/igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/shard-hsw5/igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend.html

  
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103184]: https://bugs.freedesktop.org/show_bug.cgi?id=103184
  [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
  [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#110789]: https://bugs.freedesktop.org/show_bug.cgi?id=110789
  [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
  [fdo#110913 ]: https://bugs.freedesktop.org/show_bug.cgi?id=110913 


Participating hosts (7 -> 6)
------------------------------

  Missing    (1): shard-skl 


Build changes
-------------

  * IGT: IGT_5068 -> IGTPW_3197

  CI_DRM_6342: 6eef272b254b34200129af8f2ec1e4cfe1ca6bff @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3197: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/
  IGT_5068: 15ad664534413628f06c0f172aac11598bfdb895 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3197/
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