* [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_async: Update with engine discovery
@ 2019-07-24 2:21 Ramalingam C
2019-07-24 10:23 ` [igt-dev] ✓ Fi.CI.BAT: success for " Patchwork
` (3 more replies)
0 siblings, 4 replies; 7+ messages in thread
From: Ramalingam C @ 2019-07-24 2:21 UTC (permalink / raw)
To: igt-dev
Legacy execbuf abi tests are prefixed with legacy. New test are added to
run on physical engines accessed through engine discovery.
So legacy tests run on the unconfigured (with engine map) context and
use a new helper gem_eb_flags_to_engine to look up the engine from the
intel_execution_engines2 static list. This is only to enable the core
test code to be shared.
Places where new contexts are created had to be updated to either
equally configure the contexts or not.
v2:
retained the test as it is for legacy uapi testing and duplciated for
new engine discovery [Tvrtko]
v3:
Few nits addressed [Tvrtko]
Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
tests/i915/gem_exec_async.c | 55 +++++++++++++++++++++++++++----------
1 file changed, 41 insertions(+), 14 deletions(-)
diff --git a/tests/i915/gem_exec_async.c b/tests/i915/gem_exec_async.c
index 9a06af7e29cb..de3652da452a 100644
--- a/tests/i915/gem_exec_async.c
+++ b/tests/i915/gem_exec_async.c
@@ -80,9 +80,10 @@ static void store_dword(int fd, unsigned ring,
gem_close(fd, obj[1].handle);
}
-static void one(int fd, unsigned ring, uint32_t flags)
+static void one(int fd, const struct intel_execution_engine2 *e2, bool legacy)
{
const int gen = intel_gen(intel_get_drm_devid(fd));
+ const struct intel_execution_engine2 *other2;
struct drm_i915_gem_exec_object2 obj[2];
#define SCRATCH 0
#define BATCH 1
@@ -138,20 +139,36 @@ static void one(int fd, unsigned ring, uint32_t flags)
memset(&execbuf, 0, sizeof(execbuf));
execbuf.buffers_ptr = to_user_pointer(obj);
execbuf.buffer_count = 2;
- execbuf.flags = ring | flags;
+ execbuf.flags = e2->flags;
igt_require(__gem_execbuf(fd, &execbuf) == 0);
gem_close(fd, obj[BATCH].handle);
i = 0;
- for_each_physical_engine(fd, other) {
- if (other == ring)
- continue;
+ if (legacy) {
+ for_each_engine(fd, other) {
+ if (!gem_ring_has_physical_engine(fd, other))
+ continue;
- if (!gem_can_store_dword(fd, other))
- continue;
+ if (e2->flags == other)
+ continue;
+
+ if (!gem_can_store_dword(fd, other))
+ continue;
+
+ store_dword(fd, other, obj[SCRATCH].handle, 4*i, i);
+ i++;
+ }
+ } else {
+ __for_each_physical_engine(fd, other2) {
+ if (gem_engine_is_equal(e2, other2))
+ continue;
- store_dword(fd, other, obj[SCRATCH].handle, 4*i, i);
- i++;
+ if (!gem_class_can_store_dword(fd, other2->class))
+ continue;
+
+ store_dword(fd, other2->flags, obj[SCRATCH].handle, 4*i, i);
+ i++;
+ }
}
*batch = MI_BATCH_BUFFER_END;
@@ -185,7 +202,9 @@ static bool has_async_execbuf(int fd)
igt_main
{
+ const struct intel_execution_engine2 *e2;
const struct intel_execution_engine *e;
+ struct intel_execution_engine2 e2__;
int fd = -1;
igt_skip_on_simulation();
@@ -200,14 +219,22 @@ igt_main
}
for (e = intel_execution_engines; e->name; e++) {
- /* default exec-id is purely symbolic */
- if (e->exec_id == 0)
+ e2__ = gem_eb_flags_to_engine(e->exec_id | e->flags);
+ if (e2__.flags == -1)
continue;
+ e2 = &e2__;
- igt_subtest_f("concurrent-writes-%s", e->name) {
+ igt_subtest_f("legacy-concurrent-writes-%s", e2->name) {
igt_require(gem_ring_has_physical_engine(fd, e->exec_id | e->flags));
- igt_require(gem_can_store_dword(fd, e->exec_id | e->flags));
- one(fd, e->exec_id, e->flags);
+ igt_require(gem_class_can_store_dword(fd, e2->class));
+ one(fd, e2, true);
+ }
+ }
+
+ __for_each_physical_engine(fd, e2) {
+ igt_subtest_f("concurrent-writes-%s", e2->name) {
+ igt_require(gem_class_can_store_dword(fd, e2->class));
+ one(fd, e2, false);
}
}
--
2.19.1
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^ permalink raw reply related [flat|nested] 7+ messages in thread* [igt-dev] ✓ Fi.CI.BAT: success for tests/i915/gem_exec_async: Update with engine discovery 2019-07-24 2:21 [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_async: Update with engine discovery Ramalingam C @ 2019-07-24 10:23 ` Patchwork 2019-07-24 10:28 ` [igt-dev] [PATCH i-g-t] " Chris Wilson ` (2 subsequent siblings) 3 siblings, 0 replies; 7+ messages in thread From: Patchwork @ 2019-07-24 10:23 UTC (permalink / raw) To: Ramalingam C; +Cc: igt-dev == Series Details == Series: tests/i915/gem_exec_async: Update with engine discovery URL : https://patchwork.freedesktop.org/series/64162/ State : success == Summary == CI Bug Log - changes from CI_DRM_6544 -> IGTPW_3290 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/64162/revisions/1/mbox/ Known issues ------------ Here are the changes found in IGTPW_3290 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_mmap_gtt@basic-wc: - fi-bsw-kefka: [PASS][1] -> [FAIL][2] ([fdo#107307]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/fi-bsw-kefka/igt@gem_mmap_gtt@basic-wc.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/fi-bsw-kefka/igt@gem_mmap_gtt@basic-wc.html * igt@i915_module_load@reload-no-display: - fi-icl-u3: [PASS][3] -> [DMESG-WARN][4] ([fdo#107724]) +1 similar issue [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/fi-icl-u3/igt@i915_module_load@reload-no-display.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/fi-icl-u3/igt@i915_module_load@reload-no-display.html * igt@kms_busy@basic-flip-a: - fi-kbl-7567u: [PASS][5] -> [SKIP][6] ([fdo#109271] / [fdo#109278]) +2 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/fi-kbl-7567u/igt@kms_busy@basic-flip-a.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/fi-kbl-7567u/igt@kms_busy@basic-flip-a.html * igt@kms_chamelium@common-hpd-after-suspend: - fi-kbl-7567u: [PASS][7] -> [WARN][8] ([fdo#109380]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/fi-kbl-7567u/igt@kms_chamelium@common-hpd-after-suspend.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/fi-kbl-7567u/igt@kms_chamelium@common-hpd-after-suspend.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: [PASS][9] -> [FAIL][10] ([fdo#109485]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html * igt@kms_frontbuffer_tracking@basic: - fi-hsw-peppy: [PASS][11] -> [DMESG-WARN][12] ([fdo#102614]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html - fi-icl-u2: [PASS][13] -> [FAIL][14] ([fdo#103167]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html * igt@kms_pipe_crc_basic@read-crc-pipe-c: - fi-kbl-7567u: [PASS][15] -> [SKIP][16] ([fdo#109271]) +23 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/fi-kbl-7567u/igt@kms_pipe_crc_basic@read-crc-pipe-c.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/fi-kbl-7567u/igt@kms_pipe_crc_basic@read-crc-pipe-c.html #### Possible fixes #### * igt@debugfs_test@read_all_entries: - fi-ilk-650: [DMESG-WARN][17] ([fdo#106387]) -> [PASS][18] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/fi-ilk-650/igt@debugfs_test@read_all_entries.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/fi-ilk-650/igt@debugfs_test@read_all_entries.html * igt@gem_mmap_gtt@basic-write-gtt: - fi-icl-u3: [DMESG-WARN][19] ([fdo#107724]) -> [PASS][20] +2 similar issues [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/fi-icl-u3/igt@gem_mmap_gtt@basic-write-gtt.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/fi-icl-u3/igt@gem_mmap_gtt@basic-write-gtt.html * igt@kms_frontbuffer_tracking@basic: - fi-icl-u3: [FAIL][21] ([fdo#103167]) -> [PASS][22] [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/fi-icl-u3/igt@kms_frontbuffer_tracking@basic.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/fi-icl-u3/igt@kms_frontbuffer_tracking@basic.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614 [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#106387]: https://bugs.freedesktop.org/show_bug.cgi?id=106387 [fdo#107307]: https://bugs.freedesktop.org/show_bug.cgi?id=107307 [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724 [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278 [fdo#109380]: https://bugs.freedesktop.org/show_bug.cgi?id=109380 [fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485 Participating hosts (52 -> 44) ------------------------------ Additional (1): fi-cfl-8109u Missing (9): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-kbl-guc fi-icl-y fi-byt-clapper fi-bdw-samus Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_5109 -> IGTPW_3290 CI-20190529: 20190529 CI_DRM_6544: 067ab13ae8bd0a5deb5283344664ab929839d56e @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_3290: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/ IGT_5109: e5fd509e16ec649436be31f38eaa5b85cb7f72f1 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools == Testlist changes == +igt@gem_exec_async@concurrent-writes-bcs0 +igt@gem_exec_async@concurrent-writes-rcs0 +igt@gem_exec_async@concurrent-writes-vcs0 +igt@gem_exec_async@concurrent-writes-vcs1 +igt@gem_exec_async@concurrent-writes-vcs2 +igt@gem_exec_async@concurrent-writes-vecs0 +igt@gem_exec_async@legacy-concurrent-writes-bcs0 +igt@gem_exec_async@legacy-concurrent-writes-default +igt@gem_exec_async@legacy-concurrent-writes-rcs0 +igt@gem_exec_async@legacy-concurrent-writes-vcs0 +igt@gem_exec_async@legacy-concurrent-writes-vcs1 +igt@gem_exec_async@legacy-concurrent-writes-vecs0 -igt@gem_exec_async@concurrent-writes-blt -igt@gem_exec_async@concurrent-writes-bsd -igt@gem_exec_async@concurrent-writes-bsd1 -igt@gem_exec_async@concurrent-writes-bsd2 -igt@gem_exec_async@concurrent-writes-render -igt@gem_exec_async@concurrent-writes-vebox == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/ _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_async: Update with engine discovery 2019-07-24 2:21 [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_async: Update with engine discovery Ramalingam C 2019-07-24 10:23 ` [igt-dev] ✓ Fi.CI.BAT: success for " Patchwork @ 2019-07-24 10:28 ` Chris Wilson 2019-07-24 8:30 ` Ramalingam C 2019-07-24 13:10 ` Tvrtko Ursulin 2019-07-24 14:17 ` [igt-dev] ✓ Fi.CI.IGT: success for " Patchwork 3 siblings, 1 reply; 7+ messages in thread From: Chris Wilson @ 2019-07-24 10:28 UTC (permalink / raw) To: Ramalingam C, igt-dev Quoting Ramalingam C (2019-07-24 03:21:18) > Legacy execbuf abi tests are prefixed with legacy. New test are added to > run on physical engines accessed through engine discovery. > > So legacy tests run on the unconfigured (with engine map) context and > use a new helper gem_eb_flags_to_engine to look up the engine from the > intel_execution_engines2 static list. This is only to enable the core > test code to be shared. > > Places where new contexts are created had to be updated to either > equally configure the contexts or not. > > v2: > retained the test as it is for legacy uapi testing and duplciated for > new engine discovery [Tvrtko] > v3: > Few nits addressed [Tvrtko] > > Signed-off-by: Ramalingam C <ramalingam.c@intel.com> > --- > tests/i915/gem_exec_async.c | 55 +++++++++++++++++++++++++++---------- > 1 file changed, 41 insertions(+), 14 deletions(-) > > diff --git a/tests/i915/gem_exec_async.c b/tests/i915/gem_exec_async.c > index 9a06af7e29cb..de3652da452a 100644 > --- a/tests/i915/gem_exec_async.c > +++ b/tests/i915/gem_exec_async.c > @@ -80,9 +80,10 @@ static void store_dword(int fd, unsigned ring, > gem_close(fd, obj[1].handle); > } > > -static void one(int fd, unsigned ring, uint32_t flags) > +static void one(int fd, const struct intel_execution_engine2 *e2, bool legacy) > { > const int gen = intel_gen(intel_get_drm_devid(fd)); > + const struct intel_execution_engine2 *other2; > struct drm_i915_gem_exec_object2 obj[2]; > #define SCRATCH 0 > #define BATCH 1 > @@ -138,20 +139,36 @@ static void one(int fd, unsigned ring, uint32_t flags) > memset(&execbuf, 0, sizeof(execbuf)); > execbuf.buffers_ptr = to_user_pointer(obj); > execbuf.buffer_count = 2; > - execbuf.flags = ring | flags; > + execbuf.flags = e2->flags; > igt_require(__gem_execbuf(fd, &execbuf) == 0); > gem_close(fd, obj[BATCH].handle); > > i = 0; > - for_each_physical_engine(fd, other) { > - if (other == ring) > - continue; > + if (legacy) { > + for_each_engine(fd, other) { > + if (!gem_ring_has_physical_engine(fd, other)) > + continue; > > - if (!gem_can_store_dword(fd, other)) > - continue; > + if (e2->flags == other) > + continue; > + > + if (!gem_can_store_dword(fd, other)) > + continue; > + > + store_dword(fd, other, obj[SCRATCH].handle, 4*i, i); > + i++; > + } > + } else { > + __for_each_physical_engine(fd, other2) { > + if (gem_engine_is_equal(e2, other2)) > + continue; > > - store_dword(fd, other, obj[SCRATCH].handle, 4*i, i); > - i++; > + if (!gem_class_can_store_dword(fd, other2->class)) > + continue; > + > + store_dword(fd, other2->flags, obj[SCRATCH].handle, 4*i, i); > + i++; > + } > } Does this look neater if we pass in the array of engines and just skip if others[] == this_engine. The array can be constructed once during each subgroup fixture, where legacy/non-legacy mode is know. That array generation is also fairly common so perhaps having a gem_engine_topology.c function return the set of physical engines with ALL_ENGINES_STORE_DWORD | ALL_ENGINES_LEGACY? Bonus points for a reverse lookup to string. -Chris _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_async: Update with engine discovery 2019-07-24 10:28 ` [igt-dev] [PATCH i-g-t] " Chris Wilson @ 2019-07-24 8:30 ` Ramalingam C 0 siblings, 0 replies; 7+ messages in thread From: Ramalingam C @ 2019-07-24 8:30 UTC (permalink / raw) To: Chris Wilson; +Cc: igt-dev On 2019-07-24 at 11:28:19 +0100, Chris Wilson wrote: > Quoting Ramalingam C (2019-07-24 03:21:18) > > Legacy execbuf abi tests are prefixed with legacy. New test are added to > > run on physical engines accessed through engine discovery. > > > > So legacy tests run on the unconfigured (with engine map) context and > > use a new helper gem_eb_flags_to_engine to look up the engine from the > > intel_execution_engines2 static list. This is only to enable the core > > test code to be shared. > > > > Places where new contexts are created had to be updated to either > > equally configure the contexts or not. > > > > v2: > > retained the test as it is for legacy uapi testing and duplciated for > > new engine discovery [Tvrtko] > > v3: > > Few nits addressed [Tvrtko] > > > > Signed-off-by: Ramalingam C <ramalingam.c@intel.com> > > --- > > tests/i915/gem_exec_async.c | 55 +++++++++++++++++++++++++++---------- > > 1 file changed, 41 insertions(+), 14 deletions(-) > > > > diff --git a/tests/i915/gem_exec_async.c b/tests/i915/gem_exec_async.c > > index 9a06af7e29cb..de3652da452a 100644 > > --- a/tests/i915/gem_exec_async.c > > +++ b/tests/i915/gem_exec_async.c > > @@ -80,9 +80,10 @@ static void store_dword(int fd, unsigned ring, > > gem_close(fd, obj[1].handle); > > } > > > > -static void one(int fd, unsigned ring, uint32_t flags) > > +static void one(int fd, const struct intel_execution_engine2 *e2, bool legacy) > > { > > const int gen = intel_gen(intel_get_drm_devid(fd)); > > + const struct intel_execution_engine2 *other2; > > struct drm_i915_gem_exec_object2 obj[2]; > > #define SCRATCH 0 > > #define BATCH 1 > > @@ -138,20 +139,36 @@ static void one(int fd, unsigned ring, uint32_t flags) > > memset(&execbuf, 0, sizeof(execbuf)); > > execbuf.buffers_ptr = to_user_pointer(obj); > > execbuf.buffer_count = 2; > > - execbuf.flags = ring | flags; > > + execbuf.flags = e2->flags; > > igt_require(__gem_execbuf(fd, &execbuf) == 0); > > gem_close(fd, obj[BATCH].handle); > > > > i = 0; > > - for_each_physical_engine(fd, other) { > > - if (other == ring) > > - continue; > > + if (legacy) { > > + for_each_engine(fd, other) { > > + if (!gem_ring_has_physical_engine(fd, other)) > > + continue; > > > > - if (!gem_can_store_dword(fd, other)) > > - continue; > > + if (e2->flags == other) > > + continue; > > + > > + if (!gem_can_store_dword(fd, other)) > > + continue; > > + > > + store_dword(fd, other, obj[SCRATCH].handle, 4*i, i); > > + i++; > > + } > > + } else { > > + __for_each_physical_engine(fd, other2) { > > + if (gem_engine_is_equal(e2, other2)) > > + continue; > > > > - store_dword(fd, other, obj[SCRATCH].handle, 4*i, i); > > - i++; > > + if (!gem_class_can_store_dword(fd, other2->class)) > > + continue; > > + > > + store_dword(fd, other2->flags, obj[SCRATCH].handle, 4*i, i); > > + i++; > > + } > > } > > Does this look neater if we pass in the array of engines and just skip > if others[] == this_engine. The array can be constructed once during > each subgroup fixture, where legacy/non-legacy mode is know. That array > generation is also fairly common so perhaps having a > gem_engine_topology.c function return the set of physical engines with > ALL_ENGINES_STORE_DWORD | ALL_ENGINES_LEGACY? Bonus points for a reverse > lookup to string. Chris, Sure We could do this. Even after this we might need an explicit call for engine list for different context than default(0). But it is needed in special cases. BR, -Ram. > -Chris _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_async: Update with engine discovery 2019-07-24 2:21 [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_async: Update with engine discovery Ramalingam C 2019-07-24 10:23 ` [igt-dev] ✓ Fi.CI.BAT: success for " Patchwork 2019-07-24 10:28 ` [igt-dev] [PATCH i-g-t] " Chris Wilson @ 2019-07-24 13:10 ` Tvrtko Ursulin 2019-07-24 8:34 ` Ramalingam C 2019-07-24 14:17 ` [igt-dev] ✓ Fi.CI.IGT: success for " Patchwork 3 siblings, 1 reply; 7+ messages in thread From: Tvrtko Ursulin @ 2019-07-24 13:10 UTC (permalink / raw) To: Ramalingam C, igt-dev On 24/07/2019 03:21, Ramalingam C wrote: > Legacy execbuf abi tests are prefixed with legacy. New test are added to > run on physical engines accessed through engine discovery. > > So legacy tests run on the unconfigured (with engine map) context and > use a new helper gem_eb_flags_to_engine to look up the engine from the > intel_execution_engines2 static list. This is only to enable the core > test code to be shared. > > Places where new contexts are created had to be updated to either > equally configure the contexts or not. > > v2: > retained the test as it is for legacy uapi testing and duplciated for > new engine discovery [Tvrtko] > v3: > Few nits addressed [Tvrtko] > > Signed-off-by: Ramalingam C <ramalingam.c@intel.com> > --- > tests/i915/gem_exec_async.c | 55 +++++++++++++++++++++++++++---------- > 1 file changed, 41 insertions(+), 14 deletions(-) > > diff --git a/tests/i915/gem_exec_async.c b/tests/i915/gem_exec_async.c > index 9a06af7e29cb..de3652da452a 100644 > --- a/tests/i915/gem_exec_async.c > +++ b/tests/i915/gem_exec_async.c > @@ -80,9 +80,10 @@ static void store_dword(int fd, unsigned ring, > gem_close(fd, obj[1].handle); > } > > -static void one(int fd, unsigned ring, uint32_t flags) > +static void one(int fd, const struct intel_execution_engine2 *e2, bool legacy) > { > const int gen = intel_gen(intel_get_drm_devid(fd)); > + const struct intel_execution_engine2 *other2; > struct drm_i915_gem_exec_object2 obj[2]; > #define SCRATCH 0 > #define BATCH 1 > @@ -138,20 +139,36 @@ static void one(int fd, unsigned ring, uint32_t flags) > memset(&execbuf, 0, sizeof(execbuf)); > execbuf.buffers_ptr = to_user_pointer(obj); > execbuf.buffer_count = 2; > - execbuf.flags = ring | flags; > + execbuf.flags = e2->flags; > igt_require(__gem_execbuf(fd, &execbuf) == 0); > gem_close(fd, obj[BATCH].handle); > > i = 0; > - for_each_physical_engine(fd, other) { > - if (other == ring) > - continue; > + if (legacy) { > + for_each_engine(fd, other) { > + if (!gem_ring_has_physical_engine(fd, other)) > + continue; I think we shouldn't mention physical on this branch at all. Idea was purely to exercise legacy eb flags. Maybe we would need some magic to avoid other being equal to engine even if the flags are different (think DEFAULT/RENDER and BSD/BSD1-2). > > - if (!gem_can_store_dword(fd, other)) > - continue; > + if (e2->flags == other) > + continue; > + > + if (!gem_can_store_dword(fd, other)) > + continue; > + > + store_dword(fd, other, obj[SCRATCH].handle, 4*i, i); > + i++; > + } > + } else { > + __for_each_physical_engine(fd, other2) { > + if (gem_engine_is_equal(e2, other2)) > + continue; > > - store_dword(fd, other, obj[SCRATCH].handle, 4*i, i); > - i++; > + if (!gem_class_can_store_dword(fd, other2->class)) > + continue; > + > + store_dword(fd, other2->flags, obj[SCRATCH].handle, 4*i, i); > + i++; > + } > } > > *batch = MI_BATCH_BUFFER_END; > @@ -185,7 +202,9 @@ static bool has_async_execbuf(int fd) > > igt_main > { > + const struct intel_execution_engine2 *e2; > const struct intel_execution_engine *e; > + struct intel_execution_engine2 e2__; > int fd = -1; > > igt_skip_on_simulation(); > @@ -200,14 +219,22 @@ igt_main > } > > for (e = intel_execution_engines; e->name; e++) { > - /* default exec-id is purely symbolic */ > - if (e->exec_id == 0) > + e2__ = gem_eb_flags_to_engine(e->exec_id | e->flags); > + if (e2__.flags == -1) > continue; > + e2 = &e2__; > > - igt_subtest_f("concurrent-writes-%s", e->name) { > + igt_subtest_f("legacy-concurrent-writes-%s", e2->name) { > igt_require(gem_ring_has_physical_engine(fd, e->exec_id | e->flags)); > - igt_require(gem_can_store_dword(fd, e->exec_id | e->flags)); > - one(fd, e->exec_id, e->flags); > + igt_require(gem_class_can_store_dword(fd, e2->class)); > + one(fd, e2, true); > + } > + } > + > + __for_each_physical_engine(fd, e2) { > + igt_subtest_f("concurrent-writes-%s", e2->name) { > + igt_require(gem_class_can_store_dword(fd, e2->class)); > + one(fd, e2, false); > } > } > > The rest looks good to me. Regards, Tvrtko _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_async: Update with engine discovery 2019-07-24 13:10 ` Tvrtko Ursulin @ 2019-07-24 8:34 ` Ramalingam C 0 siblings, 0 replies; 7+ messages in thread From: Ramalingam C @ 2019-07-24 8:34 UTC (permalink / raw) To: Tvrtko Ursulin; +Cc: igt-dev On 2019-07-24 at 14:10:59 +0100, Tvrtko Ursulin wrote: > > On 24/07/2019 03:21, Ramalingam C wrote: > > Legacy execbuf abi tests are prefixed with legacy. New test are added to > > run on physical engines accessed through engine discovery. > > > > So legacy tests run on the unconfigured (with engine map) context and > > use a new helper gem_eb_flags_to_engine to look up the engine from the > > intel_execution_engines2 static list. This is only to enable the core > > test code to be shared. > > > > Places where new contexts are created had to be updated to either > > equally configure the contexts or not. > > > > v2: > > retained the test as it is for legacy uapi testing and duplciated for > > new engine discovery [Tvrtko] > > v3: > > Few nits addressed [Tvrtko] > > > > Signed-off-by: Ramalingam C <ramalingam.c@intel.com> > > --- > > tests/i915/gem_exec_async.c | 55 +++++++++++++++++++++++++++---------- > > 1 file changed, 41 insertions(+), 14 deletions(-) > > > > diff --git a/tests/i915/gem_exec_async.c b/tests/i915/gem_exec_async.c > > index 9a06af7e29cb..de3652da452a 100644 > > --- a/tests/i915/gem_exec_async.c > > +++ b/tests/i915/gem_exec_async.c > > @@ -80,9 +80,10 @@ static void store_dword(int fd, unsigned ring, > > gem_close(fd, obj[1].handle); > > } > > -static void one(int fd, unsigned ring, uint32_t flags) > > +static void one(int fd, const struct intel_execution_engine2 *e2, bool legacy) > > { > > const int gen = intel_gen(intel_get_drm_devid(fd)); > > + const struct intel_execution_engine2 *other2; > > struct drm_i915_gem_exec_object2 obj[2]; > > #define SCRATCH 0 > > #define BATCH 1 > > @@ -138,20 +139,36 @@ static void one(int fd, unsigned ring, uint32_t flags) > > memset(&execbuf, 0, sizeof(execbuf)); > > execbuf.buffers_ptr = to_user_pointer(obj); > > execbuf.buffer_count = 2; > > - execbuf.flags = ring | flags; > > + execbuf.flags = e2->flags; > > igt_require(__gem_execbuf(fd, &execbuf) == 0); > > gem_close(fd, obj[BATCH].handle); > > i = 0; > > - for_each_physical_engine(fd, other) { > > - if (other == ring) > > - continue; > > + if (legacy) { > > + for_each_engine(fd, other) { > > + if (!gem_ring_has_physical_engine(fd, other)) > > + continue; > > I think we shouldn't mention physical on this branch at all. Idea was purely > to exercise legacy eb flags. But then it wont be iterating on the physical engines alone right? > Maybe we would need some magic to avoid other > being equal to engine even if the flags are different (think DEFAULT/RENDER > and BSD/BSD1-2). Better to make a macro for this gem_engine_is_equal_eb_flag() !? -Ram > > > - if (!gem_can_store_dword(fd, other)) > > - continue; > > + if (e2->flags == other) > > + continue; > > + > > + if (!gem_can_store_dword(fd, other)) > > + continue; > > + > > + store_dword(fd, other, obj[SCRATCH].handle, 4*i, i); > > + i++; > > + } > > + } else { > > + __for_each_physical_engine(fd, other2) { > > + if (gem_engine_is_equal(e2, other2)) > > + continue; > > - store_dword(fd, other, obj[SCRATCH].handle, 4*i, i); > > - i++; > > + if (!gem_class_can_store_dword(fd, other2->class)) > > + continue; > > + > > + store_dword(fd, other2->flags, obj[SCRATCH].handle, 4*i, i); > > + i++; > > + } > > } > > *batch = MI_BATCH_BUFFER_END; > > @@ -185,7 +202,9 @@ static bool has_async_execbuf(int fd) > > igt_main > > { > > + const struct intel_execution_engine2 *e2; > > const struct intel_execution_engine *e; > > + struct intel_execution_engine2 e2__; > > int fd = -1; > > igt_skip_on_simulation(); > > @@ -200,14 +219,22 @@ igt_main > > } > > for (e = intel_execution_engines; e->name; e++) { > > - /* default exec-id is purely symbolic */ > > - if (e->exec_id == 0) > > + e2__ = gem_eb_flags_to_engine(e->exec_id | e->flags); > > + if (e2__.flags == -1) > > continue; > > + e2 = &e2__; > > - igt_subtest_f("concurrent-writes-%s", e->name) { > > + igt_subtest_f("legacy-concurrent-writes-%s", e2->name) { > > igt_require(gem_ring_has_physical_engine(fd, e->exec_id | e->flags)); > > - igt_require(gem_can_store_dword(fd, e->exec_id | e->flags)); > > - one(fd, e->exec_id, e->flags); > > + igt_require(gem_class_can_store_dword(fd, e2->class)); > > + one(fd, e2, true); > > + } > > + } > > + > > + __for_each_physical_engine(fd, e2) { > > + igt_subtest_f("concurrent-writes-%s", e2->name) { > > + igt_require(gem_class_can_store_dword(fd, e2->class)); > > + one(fd, e2, false); > > } > > } > > > > The rest looks good to me. > > Regards, > > Tvrtko _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 7+ messages in thread
* [igt-dev] ✓ Fi.CI.IGT: success for tests/i915/gem_exec_async: Update with engine discovery 2019-07-24 2:21 [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_async: Update with engine discovery Ramalingam C ` (2 preceding siblings ...) 2019-07-24 13:10 ` Tvrtko Ursulin @ 2019-07-24 14:17 ` Patchwork 3 siblings, 0 replies; 7+ messages in thread From: Patchwork @ 2019-07-24 14:17 UTC (permalink / raw) To: Ramalingam C; +Cc: igt-dev == Series Details == Series: tests/i915/gem_exec_async: Update with engine discovery URL : https://patchwork.freedesktop.org/series/64162/ State : success == Summary == CI Bug Log - changes from CI_DRM_6544_full -> IGTPW_3290_full ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/64162/revisions/1/mbox/ Possible new issues ------------------- Here are the unknown changes that may have been introduced in IGTPW_3290_full: ### IGT changes ### #### Possible regressions #### * {igt@gem_exec_async@legacy-concurrent-writes-default} (NEW): - shard-iclb: NOTRUN -> [SKIP][1] +1 similar issue [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/shard-iclb2/igt@gem_exec_async@legacy-concurrent-writes-default.html New tests --------- New tests have been introduced between CI_DRM_6544_full and IGTPW_3290_full: ### New IGT tests (12) ### * igt@gem_exec_async@concurrent-writes-bcs0: - Statuses : 6 pass(s) - Exec time: [0.00] s * igt@gem_exec_async@concurrent-writes-rcs0: - Statuses : 6 pass(s) - Exec time: [0.00] s * igt@gem_exec_async@concurrent-writes-vcs0: - Statuses : 5 pass(s) 1 skip(s) - Exec time: [0.0, 0.01] s * igt@gem_exec_async@concurrent-writes-vcs1: - Statuses : 1 pass(s) - Exec time: [0.00] s * igt@gem_exec_async@concurrent-writes-vcs2: - Statuses : - Exec time: [None] s * igt@gem_exec_async@concurrent-writes-vecs0: - Statuses : 3 pass(s) - Exec time: [0.00] s * igt@gem_exec_async@legacy-concurrent-writes-bcs0: - Statuses : 6 pass(s) - Exec time: [0.00, 0.01] s * igt@gem_exec_async@legacy-concurrent-writes-default: - Statuses : 6 skip(s) - Exec time: [0.0] s * igt@gem_exec_async@legacy-concurrent-writes-rcs0: - Statuses : 6 pass(s) - Exec time: [0.00, 0.01] s * igt@gem_exec_async@legacy-concurrent-writes-vcs0: - Statuses : 1 pass(s) 5 skip(s) - Exec time: [0.0, 0.00] s * igt@gem_exec_async@legacy-concurrent-writes-vcs1: - Statuses : 1 pass(s) 5 skip(s) - Exec time: [0.0, 0.00] s * igt@gem_exec_async@legacy-concurrent-writes-vecs0: - Statuses : 5 pass(s) 1 skip(s) - Exec time: [0.0, 0.01] s Known issues ------------ Here are the changes found in IGTPW_3290_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_exec_flush@basic-batch-kernel-default-wb: - shard-snb: [PASS][2] -> [INCOMPLETE][3] ([fdo#105411]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/shard-snb7/igt@gem_exec_flush@basic-batch-kernel-default-wb.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/shard-snb6/igt@gem_exec_flush@basic-batch-kernel-default-wb.html * igt@kms_cursor_legacy@cursor-vs-flip-atomic: - shard-hsw: [PASS][4] -> [FAIL][5] ([fdo#103355]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/shard-hsw1/igt@kms_cursor_legacy@cursor-vs-flip-atomic.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/shard-hsw4/igt@kms_cursor_legacy@cursor-vs-flip-atomic.html * igt@kms_flip@flip-vs-suspend-interruptible: - shard-apl: [PASS][6] -> [DMESG-WARN][7] ([fdo#108566]) +1 similar issue [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/shard-apl8/igt@kms_flip@flip-vs-suspend-interruptible.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/shard-apl3/igt@kms_flip@flip-vs-suspend-interruptible.html - shard-kbl: [PASS][8] -> [DMESG-WARN][9] ([fdo#108566]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/shard-kbl1/igt@kms_flip@flip-vs-suspend-interruptible.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/shard-kbl2/igt@kms_flip@flip-vs-suspend-interruptible.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-pwrite: - shard-iclb: [PASS][10] -> [FAIL][11] ([fdo#103167]) +4 similar issues [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/shard-iclb1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-pwrite.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/shard-iclb7/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-pwrite.html * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes: - shard-kbl: [PASS][12] -> [INCOMPLETE][13] ([fdo#103665]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/shard-kbl3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/shard-kbl4/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html * igt@kms_psr2_su@page_flip: - shard-iclb: [PASS][14] -> [SKIP][15] ([fdo#109642] / [fdo#111068]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/shard-iclb2/igt@kms_psr2_su@page_flip.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/shard-iclb6/igt@kms_psr2_su@page_flip.html * igt@kms_psr@no_drrs: - shard-iclb: [PASS][16] -> [FAIL][17] ([fdo#108341]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/shard-iclb4/igt@kms_psr@no_drrs.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/shard-iclb1/igt@kms_psr@no_drrs.html * igt@kms_psr@psr2_cursor_plane_onoff: - shard-iclb: [PASS][18] -> [SKIP][19] ([fdo#109441]) +2 similar issues [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/shard-iclb2/igt@kms_psr@psr2_cursor_plane_onoff.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/shard-iclb7/igt@kms_psr@psr2_cursor_plane_onoff.html * igt@perf_pmu@enable-race-bcs0: - shard-iclb: [PASS][20] -> [INCOMPLETE][21] ([fdo#107713]) +1 similar issue [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/shard-iclb3/igt@perf_pmu@enable-race-bcs0.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/shard-iclb7/igt@perf_pmu@enable-race-bcs0.html #### Possible fixes #### * igt@gem_ctx_isolation@bcs0-s3: - shard-kbl: [DMESG-WARN][22] ([fdo#108566]) -> [PASS][23] +2 similar issues [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/shard-kbl1/igt@gem_ctx_isolation@bcs0-s3.html [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/shard-kbl4/igt@gem_ctx_isolation@bcs0-s3.html * igt@gem_tiled_swapping@non-threaded: - shard-kbl: [DMESG-WARN][24] ([fdo#108686]) -> [PASS][25] [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/shard-kbl4/igt@gem_tiled_swapping@non-threaded.html [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/shard-kbl3/igt@gem_tiled_swapping@non-threaded.html * igt@kms_color@pipe-c-ctm-blue-to-red: - shard-kbl: [FAIL][26] ([fdo#107201]) -> [PASS][27] [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/shard-kbl2/igt@kms_color@pipe-c-ctm-blue-to-red.html [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/shard-kbl2/igt@kms_color@pipe-c-ctm-blue-to-red.html - shard-apl: [FAIL][28] ([fdo#107201]) -> [PASS][29] [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/shard-apl2/igt@kms_color@pipe-c-ctm-blue-to-red.html [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/shard-apl3/igt@kms_color@pipe-c-ctm-blue-to-red.html * igt@kms_cursor_crc@pipe-c-cursor-128x42-sliding: - shard-apl: [FAIL][30] ([fdo#103232]) -> [PASS][31] [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/shard-apl8/igt@kms_cursor_crc@pipe-c-cursor-128x42-sliding.html [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/shard-apl4/igt@kms_cursor_crc@pipe-c-cursor-128x42-sliding.html - shard-kbl: [FAIL][32] ([fdo#103232]) -> [PASS][33] [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/shard-kbl2/igt@kms_cursor_crc@pipe-c-cursor-128x42-sliding.html [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/shard-kbl1/igt@kms_cursor_crc@pipe-c-cursor-128x42-sliding.html * igt@kms_cursor_crc@pipe-c-cursor-suspend: - shard-apl: [DMESG-WARN][34] ([fdo#108566]) -> [PASS][35] [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/shard-apl1/igt@kms_cursor_crc@pipe-c-cursor-suspend.html [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/shard-apl2/igt@kms_cursor_crc@pipe-c-cursor-suspend.html * igt@kms_flip@flip-vs-expired-vblank: - shard-glk: [FAIL][36] ([fdo#105363]) -> [PASS][37] [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/shard-glk7/igt@kms_flip@flip-vs-expired-vblank.html [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/shard-glk5/igt@kms_flip@flip-vs-expired-vblank.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-render: - shard-iclb: [FAIL][38] ([fdo#103167]) -> [PASS][39] +2 similar issues [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/shard-iclb8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-render.html [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/shard-iclb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-render.html * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes: - shard-kbl: [INCOMPLETE][40] ([fdo#103665]) -> [PASS][41] [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/shard-kbl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/shard-kbl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html * igt@kms_plane_lowres@pipe-a-tiling-x: - shard-iclb: [FAIL][42] ([fdo#103166]) -> [PASS][43] [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/shard-iclb8/igt@kms_plane_lowres@pipe-a-tiling-x.html [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/shard-iclb2/igt@kms_plane_lowres@pipe-a-tiling-x.html * igt@kms_psr2_su@frontbuffer: - shard-iclb: [SKIP][44] ([fdo#109642] / [fdo#111068]) -> [PASS][45] [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/shard-iclb8/igt@kms_psr2_su@frontbuffer.html [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/shard-iclb2/igt@kms_psr2_su@frontbuffer.html * igt@kms_psr@psr2_primary_mmap_gtt: - shard-iclb: [SKIP][46] ([fdo#109441]) -> [PASS][47] +1 similar issue [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/shard-iclb3/igt@kms_psr@psr2_primary_mmap_gtt.html [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/shard-iclb2/igt@kms_psr@psr2_primary_mmap_gtt.html * igt@kms_setmode@basic: - shard-apl: [FAIL][48] ([fdo#99912]) -> [PASS][49] [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/shard-apl8/igt@kms_setmode@basic.html [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/shard-apl4/igt@kms_setmode@basic.html - shard-kbl: [FAIL][50] ([fdo#99912]) -> [PASS][51] [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6544/shard-kbl2/igt@kms_setmode@basic.html [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/shard-kbl6/igt@kms_setmode@basic.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166 [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232 [fdo#103355]: https://bugs.freedesktop.org/show_bug.cgi?id=103355 [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665 [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363 [fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411 [fdo#107201]: https://bugs.freedesktop.org/show_bug.cgi?id=107201 [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#108341]: https://bugs.freedesktop.org/show_bug.cgi?id=108341 [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566 [fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642 [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068 [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912 Participating hosts (9 -> 6) ------------------------------ Missing (3): pig-skl-6260u shard-skl pig-glk-j5005 Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_5109 -> IGTPW_3290 * Piglit: piglit_4509 -> None CI-20190529: 20190529 CI_DRM_6544: 067ab13ae8bd0a5deb5283344664ab929839d56e @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_3290: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/ IGT_5109: e5fd509e16ec649436be31f38eaa5b85cb7f72f1 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3290/ _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2019-07-24 15:33 UTC | newest] Thread overview: 7+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2019-07-24 2:21 [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_async: Update with engine discovery Ramalingam C 2019-07-24 10:23 ` [igt-dev] ✓ Fi.CI.BAT: success for " Patchwork 2019-07-24 10:28 ` [igt-dev] [PATCH i-g-t] " Chris Wilson 2019-07-24 8:30 ` Ramalingam C 2019-07-24 13:10 ` Tvrtko Ursulin 2019-07-24 8:34 ` Ramalingam C 2019-07-24 14:17 ` [igt-dev] ✓ Fi.CI.IGT: success for " Patchwork
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