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* [Intel-gfx] [PATCH i-g-t] i915/gem_exec_schedule: Check timeslice
@ 2019-08-14 10:03 Chris Wilson
  2019-08-14 11:51 ` [igt-dev] ✓ Fi.CI.BAT: success for " Patchwork
  2019-08-15  1:22 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
  0 siblings, 2 replies; 3+ messages in thread
From: Chris Wilson @ 2019-08-14 10:03 UTC (permalink / raw)
  To: intel-gfx; +Cc: igt-dev

Check that we can run a second request even if an equal priority spinner
is hogging the engine.

Extend the testing with some undying timeslice behaviour that requires
hangcheck to intervene.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 tests/i915/gem_exec_schedule.c | 110 +++++++++++++++++++++++++++++++++
 1 file changed, 110 insertions(+)

diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/gem_exec_schedule.c
index 058102103..a86a6effb 100644
--- a/tests/i915/gem_exec_schedule.c
+++ b/tests/i915/gem_exec_schedule.c
@@ -34,6 +34,7 @@
 #include "igt_sysfs.h"
 #include "igt_vgem.h"
 #include "i915/gem_ring.h"
+#include "sw_sync.h"
 
 #define LO 0
 #define HI 1
@@ -1033,6 +1034,107 @@ static void preempt_queue(int fd, unsigned ring, unsigned int flags)
 	}
 }
 
+static void preempt_timeslice(int i915, unsigned ring)
+{
+	const uint32_t bbe = MI_BATCH_BUFFER_END;
+	struct drm_i915_gem_exec_object2 obj = {
+		.handle = gem_create(i915, 4096)
+	};
+	struct drm_i915_gem_execbuffer2 execbuf = {
+		.buffers_ptr = to_user_pointer(&obj),
+		.buffer_count = 1,
+		.flags = ring,
+		.rsvd1 = gem_context_create(i915),
+	};
+	igt_spin_t *spin;
+
+	/*
+	 * Launch a spinner to occupy the target engine, and then
+	 * check we execute a ping underneath it from a second context.
+	 */
+	spin = igt_spin_new(i915, .engine = ring, .flags = IGT_SPIN_POLL_RUN);
+	igt_spin_busywait_until_started(spin);
+
+	/* Both the active spinner and this are at the same priority */
+	gem_write(i915, obj.handle, 0, &bbe, sizeof(bbe));
+	gem_execbuf(i915, &execbuf);
+	gem_sync(i915, obj.handle);
+
+	igt_assert(gem_bo_busy(i915, spin->handle));
+	igt_spin_free(i915, spin);
+
+	gem_context_destroy(i915, execbuf.rsvd1);
+	gem_close(i915, obj.handle);
+}
+
+static void preempt_timeslice_undying(int i915, unsigned ring)
+{
+	struct drm_i915_gem_exec_object2 obj = {
+		.handle = gem_create(i915, 4096)
+	};
+	struct drm_i915_gem_execbuffer2 execbuf = {
+		.buffers_ptr = to_user_pointer(&obj),
+		.buffer_count = 1,
+		.flags = ring,
+		.rsvd1 = gem_context_create(i915),
+	};
+	igt_spin_t *spin;
+
+	/*
+	 * We should not allow a spinner to evade hangcheck by simply
+	 * being timesliced.
+	 */
+	spin = igt_spin_new(i915, .engine = ring, .flags = IGT_SPIN_POLL_RUN);
+	igt_spin_busywait_until_started(spin);
+
+	for (int i = 0; i < 120; i++) {
+		const uint32_t bbe = MI_BATCH_BUFFER_END;
+
+		if (!gem_bo_busy(i915, spin->handle))
+			break;
+
+		gem_write(i915, obj.handle, 0, &bbe, sizeof(bbe));
+		gem_execbuf(i915, &execbuf);
+
+		usleep(500 * 1000); /* 0.5s */
+	}
+
+	igt_assert(!gem_bo_busy(i915, spin->handle));
+	igt_spin_free(i915, spin);
+
+	gem_context_destroy(i915, execbuf.rsvd1);
+	gem_close(i915, obj.handle);
+}
+
+static void preempt_antitimeslice(int i915, unsigned ring)
+{
+	uint32_t ctx[2] = { gem_context_create(i915), gem_context_create(i915) };
+	igt_spin_t *spin[2];
+
+	/*
+	 * Launch two independent spinners to occupy an engine. Timeslicing
+	 * should not allow them to bypass hangcheck and run indefinitely.
+	 */
+	for (int i = 0; i < ARRAY_SIZE(spin); i++)
+		spin[i] = igt_spin_new(i915, ctx[i],
+				       .engine = ring,
+				       .flags = IGT_SPIN_FENCE_OUT);
+
+	/* Hangcheck should kill each spinner after about 10s */
+	for (int i = 0; i < ARRAY_SIZE(spin); i++) {
+		int64_t timeout = 60ull * NSEC_PER_SEC;
+		igt_assert_eq(gem_wait(i915, spin[i]->handle, &timeout), 0);
+	}
+
+	for (int i = 0; i < ARRAY_SIZE(spin); i++) {
+		igt_assert(!gem_bo_busy(i915, spin[i]->handle));
+		igt_assert_eq(sync_fence_status(spin[i]->out_fence), -EIO);
+
+		igt_spin_free(i915, spin[i]);
+		gem_context_destroy(i915, ctx[i]);
+	}
+}
+
 static void preempt_self(int fd, unsigned ring)
 {
 	uint32_t result = gem_create(fd, 4096);
@@ -1740,6 +1842,8 @@ igt_main
 					igt_subtest_f("preempt-queue-contexts-chain-%s", e->name)
 						preempt_queue(fd, e->exec_id | e->flags, CONTEXTS | CHAIN);
 
+					igt_subtest_f("preempt-timeslice-%s", e->name)
+						preempt_timeslice(fd, e->exec_id | e->flags);
 					igt_subtest_group {
 						igt_hang_t hang;
 
@@ -1755,6 +1859,12 @@ igt_main
 						igt_subtest_f("preemptive-hang-%s", e->name)
 							preemptive_hang(fd, e->exec_id | e->flags);
 
+						igt_subtest_f("preempt-timeslice-undying-%s", e->name)
+							preempt_timeslice_undying(fd, e->exec_id | e->flags);
+
+						igt_subtest_f("preempt-antitimeslice-%s", e->name)
+							preempt_antitimeslice(fd, e->exec_id | e->flags);
+
 						igt_fixture {
 							igt_disallow_hang(fd, hang);
 							igt_fork_hang_detector(fd);
-- 
2.23.0.rc1

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2019-08-14 10:03 [Intel-gfx] [PATCH i-g-t] i915/gem_exec_schedule: Check timeslice Chris Wilson
2019-08-14 11:51 ` [igt-dev] ✓ Fi.CI.BAT: success for " Patchwork
2019-08-15  1:22 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork

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