[igt-dev] [PATCH i-g-t 1/3] i915/gem_eio: Retighten timeouts for forced reset

[igt-dev] [PATCH i-g-t 1/3] i915/gem_eio: Retighten timeouts for forced reset

[Chris Wilson]

The forced-reset itself should be immediate; it's just the wait after
the health check where we appear to have issues!

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 tests/i915/gem_eio.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c
index 007b9fb70..7c8ff10df 100644
--- a/tests/i915/gem_eio.c
+++ b/tests/i915/gem_eio.c
@@ -76,12 +76,15 @@ static void trigger_reset(int fd)
 	igt_kmsg(KMSG_DEBUG "Forcing GPU reset\n");
 	igt_force_gpu_reset(fd);
 
+	/* The forced reset should be immediate */
+	igt_assert_lte(igt_seconds_elapsed(&ts), 2);
+
 	/* And just check the gpu is indeed running again */
 	igt_kmsg(KMSG_DEBUG "Checking that the GPU recovered\n");
 	gem_test_engine(fd, ALL_ENGINES);
 	igt_drop_caches_set(fd, DROP_ACTIVE);
 
-	/* We expect forced reset and health check to be quick. */
+	/* We expect health check to be quick. */
 	igt_assert_lte(igt_seconds_elapsed(&ts), 10);
 }
 
-- 
2.23.0

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[igt-dev] [PATCH i-g-t 2/3] i915/gem_eio: Show engine status before resets

[Chris Wilson]

Dump the i915_engine_info into debug prior to triggering a reset/wedge.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_eio.c | 15 +++++++++++----
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c
index 7c8ff10df..444471cb9 100644
--- a/tests/i915/gem_eio.c
+++ b/tests/i915/gem_eio.c
@@ -82,6 +82,8 @@ static void trigger_reset(int fd)
 	/* And just check the gpu is indeed running again */
 	igt_kmsg(KMSG_DEBUG "Checking that the GPU recovered\n");
 	gem_test_engine(fd, ALL_ENGINES);
+
+	igt_debugfs_dump(fd, "i915_engine_info");
 	igt_drop_caches_set(fd, DROP_ACTIVE);
 
 	/* We expect health check to be quick. */
@@ -392,6 +394,7 @@ static void test_wait(int fd, unsigned int flags, unsigned int wait)
 
 	hang = spin_sync(fd, 0, I915_EXEC_DEFAULT);
 
+	igt_debugfs_dump(fd, "i915_engine_info");
 	check_wait(fd, hang->handle, wait, NULL);
 
 	igt_spin_free(fd, hang);
@@ -467,14 +470,15 @@ static void test_inflight(int fd, unsigned int wait)
 			igt_assert(fence[n] != -1);
 		}
 
+		igt_debugfs_dump(fd, "i915_engine_info");
 		check_wait(fd, obj[1].handle, wait, NULL);
 
 		for (unsigned int n = 0; n < max; n++) {
 			igt_assert_eq(sync_fence_status(fence[n]), -EIO);
 			close(fence[n]);
 		}
-
 		igt_spin_free(fd, hang);
+
 		igt_assert(i915_reset_control(true));
 		trigger_reset(fd);
 
@@ -523,14 +527,15 @@ static void test_inflight_suspend(int fd)
 	igt_set_autoresume_delay(30);
 	igt_system_suspend_autoresume(SUSPEND_STATE_MEM, SUSPEND_TEST_NONE);
 
+	igt_debugfs_dump(fd, "i915_engine_info");
 	check_wait(fd, obj[1].handle, 10, NULL);
 
 	for (unsigned int n = 0; n < max; n++) {
 		igt_assert_eq(sync_fence_status(fence[n]), -EIO);
 		close(fence[n]);
 	}
-
 	igt_spin_free(fd, hang);
+
 	igt_assert(i915_reset_control(true));
 	trigger_reset(fd);
 	close(fd);
@@ -605,15 +610,16 @@ static void test_inflight_contexts(int fd, unsigned int wait)
 			count++;
 		}
 
+		igt_debugfs_dump(fd, "i915_engine_info");
 		check_wait(fd, obj[1].handle, wait, NULL);
 
 		for (unsigned int n = 0; n < count; n++) {
 			igt_assert_eq(sync_fence_status(fence[n]), -EIO);
 			close(fence[n]);
 		}
-
 		igt_spin_free(fd, hang);
 		gem_close(fd, obj[1].handle);
+
 		igt_assert(i915_reset_control(true));
 		trigger_reset(fd);
 
@@ -714,14 +720,15 @@ static void test_inflight_internal(int fd, unsigned int wait)
 		nfence++;
 	}
 
+	igt_debugfs_dump(fd, "i915_engine_info");
 	check_wait(fd, obj[1].handle, wait, NULL);
 
 	while (nfence--) {
 		igt_assert_eq(sync_fence_status(fences[nfence]), -EIO);
 		close(fences[nfence]);
 	}
-
 	igt_spin_free(fd, hang);
+
 	igt_assert(i915_reset_control(true));
 	trigger_reset(fd);
 	close(fd);
-- 
2.23.0

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Re: [igt-dev] [PATCH i-g-t 2/3] i915/gem_eio: Show engine status before resets

[Andi Shyti]

Hi Chris,

On Sat, Oct 05, 2019 at 11:55:55AM +0100, Chris Wilson wrote:
> Dump the i915_engine_info into debug prior to triggering a reset/wedge.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

looks OK, Reviewed-by: Andi Shyti <andi.shyti@intel.com>

Andi

P.S.

>  		}
> -
>  		igt_spin_free(fd, hang);
> +

grrrrrr....
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[igt-dev] [PATCH i-g-t 3/3] i915/gem_softpin: Replace constant loop with timeout

[Chris Wilson]

Rather than do a fixed amount of work that takes *forever*, run for a
fixed amount of time.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_softpin.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/tests/i915/gem_softpin.c b/tests/i915/gem_softpin.c
index c29097ad3..032056c08 100644
--- a/tests/i915/gem_softpin.c
+++ b/tests/i915/gem_softpin.c
@@ -102,14 +102,14 @@ static void test_softpin(int fd)
 	struct drm_i915_gem_exec_object2 object;
 	uint64_t offset, end;
 	uint32_t last_handle;
-	int loop;
+	unsigned long count = 0;
 
 	last_handle = gem_create(fd, size);
 
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = to_user_pointer(&object);
 	execbuf.buffer_count = 1;
-	for (loop = 0; loop < 1024; loop++) {
+	igt_until_timeout(30) {
 		memset(&object, 0, sizeof(object));
 		object.handle = gem_create(fd, 2*size);
 		gem_write(fd, object.handle, 0, &bbe, sizeof(bbe));
@@ -134,7 +134,9 @@ static void test_softpin(int fd)
 		}
 
 		last_handle = object.handle;
+		count++;
 	}
+	igt_info("Completd %lu cycles\n", count);
 }
 
 static void test_overlap(int fd)
-- 
2.23.0

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Re: [igt-dev] [PATCH i-g-t 3/3] i915/gem_softpin: Replace constant loop with timeout

[Andi Shyti]

Hi Chris,

On Sat, Oct 05, 2019 at 11:55:56AM +0100, Chris Wilson wrote:
> Rather than do a fixed amount of work that takes *forever*, run for a
> fixed amount of time.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

looks nice! :)

Reviewed-by: Andi Shyti <andi.shyti@intel.com>

Andi
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[igt-dev] ✗ Fi.CI.BAT: failure for series starting with [i-g-t,1/3] i915/gem_eio: Retighten timeouts for forced reset

[Patchwork]

== Series Details ==

Series: series starting with [i-g-t,1/3] i915/gem_eio: Retighten timeouts for forced reset
URL   : https://patchwork.freedesktop.org/series/67631/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_7013 -> IGTPW_3542
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_3542 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_3542, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3542/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_3542:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_selftest@live_execlists:
    - fi-cfl-8109u:       [PASS][1] -> [DMESG-WARN][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7013/fi-cfl-8109u/igt@i915_selftest@live_execlists.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3542/fi-cfl-8109u/igt@i915_selftest@live_execlists.html

  
Known issues
------------

  Here are the changes found in IGTPW_3542 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_mmap_gtt@basic-write-no-prefault:
    - fi-icl-u3:          [PASS][3] -> [DMESG-WARN][4] ([fdo#107724])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7013/fi-icl-u3/igt@gem_mmap_gtt@basic-write-no-prefault.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3542/fi-icl-u3/igt@gem_mmap_gtt@basic-write-no-prefault.html

  
#### Possible fixes ####

  * igt@gem_ctx_switch@rcs0:
    - {fi-icl-guc}:       [INCOMPLETE][5] ([fdo#107713]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7013/fi-icl-guc/igt@gem_ctx_switch@rcs0.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3542/fi-icl-guc/igt@gem_ctx_switch@rcs0.html

  * igt@gem_exec_reloc@basic-write-gtt-noreloc:
    - fi-icl-u3:          [DMESG-WARN][7] ([fdo#107724]) -> [PASS][8] +2 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7013/fi-icl-u3/igt@gem_exec_reloc@basic-write-gtt-noreloc.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3542/fi-icl-u3/igt@gem_exec_reloc@basic-write-gtt-noreloc.html

  * igt@i915_selftest@live_hangcheck:
    - fi-icl-u3:          [DMESG-FAIL][9] ([fdo#111144] / [fdo#111678]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7013/fi-icl-u3/igt@i915_selftest@live_hangcheck.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3542/fi-icl-u3/igt@i915_selftest@live_hangcheck.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [FAIL][11] ([fdo#111045] / [fdo#111096]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7013/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3542/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
  [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
  [fdo#111144]: https://bugs.freedesktop.org/show_bug.cgi?id=111144
  [fdo#111678]: https://bugs.freedesktop.org/show_bug.cgi?id=111678
  [fdo#111880]: https://bugs.freedesktop.org/show_bug.cgi?id=111880


Participating hosts (51 -> 45)
------------------------------

  Additional (1): fi-icl-u4 
  Missing    (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5213 -> IGTPW_3542

  CI-20190529: 20190529
  CI_DRM_7013: d15ba88aba4d101631bad25b6e75de1a3a0c9440 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3542: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3542/index.html
  IGT_5213: 2090a01dd78a15e0e68ffd18c42461a23da17156 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3542/index.html
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Re: [igt-dev] [PATCH i-g-t 1/3] i915/gem_eio: Retighten timeouts for forced reset

[Tvrtko Ursulin]

On 05/10/2019 11:55, Chris Wilson wrote:
> The forced-reset itself should be immediate; it's just the wait after
> the health check where we appear to have issues!
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
>   tests/i915/gem_eio.c | 5 ++++-
>   1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c
> index 007b9fb70..7c8ff10df 100644
> --- a/tests/i915/gem_eio.c
> +++ b/tests/i915/gem_eio.c
> @@ -76,12 +76,15 @@ static void trigger_reset(int fd)
>   	igt_kmsg(KMSG_DEBUG "Forcing GPU reset\n");
>   	igt_force_gpu_reset(fd);
>   
> +	/* The forced reset should be immediate */
> +	igt_assert_lte(igt_seconds_elapsed(&ts), 2);
> +
>   	/* And just check the gpu is indeed running again */
>   	igt_kmsg(KMSG_DEBUG "Checking that the GPU recovered\n");
>   	gem_test_engine(fd, ALL_ENGINES);
>   	igt_drop_caches_set(fd, DROP_ACTIVE);
>   
> -	/* We expect forced reset and health check to be quick. */
> +	/* We expect health check to be quick. */
>   	igt_assert_lte(igt_seconds_elapsed(&ts), 10);
>   }
>   
> 

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko
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