[igt-dev] [PATCH i-g-t 0/2] CCS Clear Color plane content check

[igt-dev] [PATCH i-g-t 0/2] CCS Clear Color plane content check

[Mika Kahola]

The patch series introduces CCS plane content check for Clear Color
feature. To enable this, we need to enable fast clear on rendercopy
function, which is presented on the first patch of the series.

Mika Kahola (2):
  lib/rendercopy: Enable render target Fast Clear for GEN12
  tests/kms_ccs: Enable CCS plane checks for Clear Color

 lib/gen12_render.h      |   9 ++
 lib/igt_fb.c            |  13 +++
 lib/intel_batchbuffer.c |  10 +++
 lib/intel_batchbuffer.h |   1 +
 lib/rendercopy.h        |   5 ++
 lib/rendercopy_gen9.c   | 191 +++++++++++++++++++++++++++++++++++++++-
 tests/kms_ccs.c         |   3 +-
 7 files changed, 229 insertions(+), 3 deletions(-)
 create mode 100644 lib/gen12_render.h

-- 
2.17.1

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[igt-dev] [PATCH i-g-t 1/2] lib/rendercopy: Enable render target Fast Clear for GEN12

[Mika Kahola]

To test Clear Color plane content, we need to enable
render target for fast clear.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
 lib/gen12_render.h      |   9 ++
 lib/igt_fb.c            |  13 +++
 lib/intel_batchbuffer.c |  10 +++
 lib/intel_batchbuffer.h |   1 +
 lib/rendercopy.h        |   5 ++
 lib/rendercopy_gen9.c   | 191 +++++++++++++++++++++++++++++++++++++++-
 6 files changed, 228 insertions(+), 1 deletion(-)
 create mode 100644 lib/gen12_render.h

diff --git a/lib/gen12_render.h b/lib/gen12_render.h
new file mode 100644
index 00000000..e70f4c25
--- /dev/null
+++ b/lib/gen12_render.h
@@ -0,0 +1,9 @@
+#ifndef GEN12_RENDER_H
+#define GEN12_RENDER_H
+
+#include "gen9_render.h"
+
+#define GEN12_PS_FAST_CLEAR_ENABLE                     (1 << 8)
+#define GEN12_PS_FAST_CLEAR_RESOLVE                    (2 << 6)
+
+#endif
diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index c81b9de8..332f98d8 100644
--- a/lib/igt_fb.c
+++ b/lib/igt_fb.c
@@ -480,6 +480,11 @@ static bool is_gen12_mc_ccs_modifier(uint64_t modifier)
 	return modifier == LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS;
 }
 
+static bool is_gen12_cc_ccs_modifier(uint64_t modifier)
+{
+	return modifier == LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC;
+}
+
 static bool is_gen12_ccs_modifier(uint64_t modifier)
 {
 	return is_gen12_mc_ccs_modifier(modifier) ||
@@ -2091,6 +2096,12 @@ static bool use_vebox_copy(const struct igt_fb *src_fb,
 	       igt_format_is_yuv(dst_fb->drm_format);
 }
 
+static bool use_clear_color_copy(const struct igt_fb *src_fb,
+				 const struct igt_fb *dst_fb)
+{
+	return is_gen12_cc_ccs_modifier(dst_fb->modifier);
+}
+
 /**
  * copy_with_engine:
  * @blit: context for the copy operation
@@ -2115,6 +2126,8 @@ static void copy_with_engine(struct fb_blit_upload *blit,
 
 	if (use_vebox_copy(src_fb, dst_fb))
 		vebox_copy = igt_get_vebox_copyfunc(intel_get_drm_devid(blit->fd));
+	else if (use_clear_color_copy(src_fb, dst_fb))
+		render_copy = igt_get_render_cc_copyfunc(intel_get_drm_devid(blit->fd));
 	else
 		render_copy = igt_get_render_copyfunc(intel_get_drm_devid(blit->fd));
 
diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
index 3dc89024..227e854c 100644
--- a/lib/intel_batchbuffer.c
+++ b/lib/intel_batchbuffer.c
@@ -851,6 +851,16 @@ igt_render_copyfunc_t igt_get_render_copyfunc(int devid)
 	return copy;
 }
 
+igt_render_copyfunc_t igt_get_render_cc_copyfunc(int devid)
+{
+	igt_render_copyfunc_t copy = NULL;
+
+	if (IS_GEN12(devid))
+		copy = gen12_render_cc_copyfunc;
+
+	return copy;
+}
+
 igt_vebox_copyfunc_t igt_get_vebox_copyfunc(int devid)
 {
 	igt_vebox_copyfunc_t copy = NULL;
diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h
index fd7ef03f..d979c9f2 100644
--- a/lib/intel_batchbuffer.h
+++ b/lib/intel_batchbuffer.h
@@ -320,6 +320,7 @@ typedef void (*igt_render_copyfunc_t)(struct intel_batchbuffer *batch,
 				      const struct igt_buf *dst, unsigned dst_x, unsigned dst_y);
 
 igt_render_copyfunc_t igt_get_render_copyfunc(int devid);
+igt_render_copyfunc_t igt_get_render_cc_copyfunc(int devid);
 
 
 /**
diff --git a/lib/rendercopy.h b/lib/rendercopy.h
index e0577cac..17f5fa94 100644
--- a/lib/rendercopy.h
+++ b/lib/rendercopy.h
@@ -23,6 +23,11 @@ static inline void emit_vertex_normalized(struct intel_batchbuffer *batch,
 	OUT_BATCH(u.ui);
 }
 
+void gen12_render_cc_copyfunc(struct intel_batchbuffer *batch,
+			      drm_intel_context * context,
+			      const struct igt_buf *src, unsigned int src_x, unsigned int src_y,
+			      unsigned int width, unsigned int height,
+			      const struct igt_buf *dst, unsigned int dst_x, unsigned int dst_y);
 void gen12_render_copyfunc(struct intel_batchbuffer *batch,
 			   drm_intel_context *context,
 			   const struct igt_buf *src, unsigned src_x, unsigned src_y,
diff --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c
index 835c8d80..af95d2ee 100644
--- a/lib/rendercopy_gen9.c
+++ b/lib/rendercopy_gen9.c
@@ -20,7 +20,7 @@
 #include "intel_batchbuffer.h"
 #include "intel_io.h"
 #include "rendercopy.h"
-#include "gen9_render.h"
+#include "gen12_render.h"
 #include "intel_reg.h"
 #include "igt_aux.h"
 
@@ -958,6 +958,54 @@ static void gen8_emit_primitive(struct intel_batchbuffer *batch, uint32_t offset
 	OUT_BATCH(0);	/* index buffer offset, ignored */
 }
 
+static void
+gen12_emit_ps_cc(struct intel_batchbuffer *batch, uint32_t kernel)
+{
+	const int max_threads = 63;
+
+	OUT_BATCH(GEN6_3DSTATE_WM | (2 - 2));
+	OUT_BATCH(/* XXX: I don't understand the BARYCENTRIC stuff, but it
+		   * appears we need it to put our setup data in the place we
+		   * expect (g6, see below) */
+		  GEN8_3DSTATE_PS_PERSPECTIVE_PIXEL_BARYCENTRIC);
+
+	OUT_BATCH(GEN6_3DSTATE_CONSTANT_PS | (11-2));
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+
+	OUT_BATCH(GEN7_3DSTATE_PS | (12-2));
+	OUT_BATCH(kernel);
+	OUT_BATCH(0); /* kernel hi */
+	OUT_BATCH(1 << GEN6_3DSTATE_WM_SAMPLER_COUNT_SHIFT |
+		  2 << GEN6_3DSTATE_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT);
+	OUT_BATCH(0); /* scratch space stuff */
+	OUT_BATCH(0); /* scratch hi */
+	OUT_BATCH((max_threads - 1) << GEN8_3DSTATE_PS_MAX_THREADS_SHIFT |
+		  GEN6_3DSTATE_WM_16_DISPATCH_ENABLE);
+	OUT_BATCH(6 << GEN6_3DSTATE_WM_DISPATCH_START_GRF_0_SHIFT);
+	OUT_BATCH(0); // kernel 1
+	OUT_BATCH(0); /* kernel 1 hi */
+	OUT_BATCH(0); // kernel 2
+	OUT_BATCH(0); /* kernel 2 hi */
+	OUT_BATCH(GEN12_PS_FAST_CLEAR_ENABLE);
+	OUT_BATCH(GEN12_PS_FAST_CLEAR_RESOLVE);
+
+	OUT_BATCH(GEN8_3DSTATE_PS_BLEND | (2 - 2));
+	OUT_BATCH(GEN8_PS_BLEND_HAS_WRITEABLE_RT);
+
+	OUT_BATCH(GEN8_3DSTATE_PS_EXTRA | (2 - 2));
+	OUT_BATCH(GEN8_PSX_PIXEL_SHADER_VALID | GEN8_PSX_ATTRIBUTE_ENABLE);
+
+}
+
 /* The general rule is if it's named gen6 it is directly copied from
  * gen6_render_copyfunc.
  *
@@ -990,6 +1038,127 @@ static void gen8_emit_primitive(struct intel_batchbuffer *batch, uint32_t offset
 
 #define BATCH_STATE_SPLIT 2048
 
+static
+void _gen12_render_cc_copyfunc(struct intel_batchbuffer *batch,
+			       drm_intel_context *context,
+			       const struct igt_buf *src, unsigned int src_x,
+			       unsigned int src_y, unsigned int width, unsigned int height,
+			       const struct igt_buf *dst, unsigned int dst_x,
+			       unsigned int dst_y,
+			       drm_intel_bo *aux_pgtable_bo,
+			       const uint32_t ps_kernel[][4],
+			       uint32_t ps_kernel_size)
+{
+	uint32_t ps_sampler_state, ps_kernel_off, ps_binding_table;
+	uint32_t scissor_state;
+	uint32_t vertex_buffer;
+	uint32_t batch_end;
+	uint32_t aux_pgtable_state;
+
+	igt_assert(src->bpp == dst->bpp);
+	intel_batchbuffer_flush_with_context(batch, context);
+
+	intel_batchbuffer_align(batch, 8);
+
+	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
+
+	annotation_init(&aub_annotations);
+
+	ps_binding_table  = gen8_bind_surfaces(batch, src, dst);
+	ps_sampler_state  = gen8_create_sampler(batch);
+	ps_kernel_off = gen8_fill_ps(batch, ps_kernel, ps_kernel_size);
+	vertex_buffer = gen7_fill_vertex_buffer_data(batch, src,
+						     src_x, src_y,
+						     dst_x, dst_y,
+						     width, height);
+	cc.cc_state = gen6_create_cc_state(batch);
+	cc.blend_state = gen8_create_blend_state(batch);
+	viewport.cc_state = gen6_create_cc_viewport(batch);
+	viewport.sf_clip_state = gen7_create_sf_clip_viewport(batch);
+	scissor_state = gen6_create_scissor_rect(batch);
+
+	aux_pgtable_state = gen12_create_aux_pgtable_state(batch,
+							   aux_pgtable_bo);
+
+	/* TODO: theree is other state which isn't setup */
+
+	assert(batch->ptr < &batch->buffer[4095]);
+
+	batch->ptr = batch->buffer;
+
+	/* Start emitting the commands. The order roughly follows the mesa blorp
+	 * order */
+	OUT_BATCH(G4X_PIPELINE_SELECT | PIPELINE_SELECT_3D |
+				GEN9_PIPELINE_SELECTION_MASK);
+
+	gen12_emit_aux_pgtable_state(batch, aux_pgtable_state, true);
+
+	gen8_emit_sip(batch);
+
+	gen7_emit_push_constants(batch);
+
+	gen9_emit_state_base_address(batch);
+
+	OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC);
+	OUT_BATCH(viewport.cc_state);
+	OUT_BATCH(GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP);
+	OUT_BATCH(viewport.sf_clip_state);
+
+	gen7_emit_urb(batch);
+
+	gen8_emit_cc(batch);
+
+	gen8_emit_multisample(batch);
+
+	gen8_emit_null_state(batch);
+
+	OUT_BATCH(GEN7_3DSTATE_STREAMOUT | (5 - 2));
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+
+	gen7_emit_clip(batch);
+
+	gen8_emit_sf(batch);
+
+	gen12_emit_ps_cc(batch, ps_kernel_off);
+
+	OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS);
+	OUT_BATCH(ps_binding_table);
+
+	OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS);
+	OUT_BATCH(ps_sampler_state);
+
+	OUT_BATCH(GEN8_3DSTATE_SCISSOR_STATE_POINTERS);
+	OUT_BATCH(scissor_state);
+
+	gen9_emit_depth(batch);
+
+	gen7_emit_clear(batch);
+
+	gen6_emit_drawing_rectangle(batch, dst);
+
+	gen7_emit_vertex_buffer(batch, vertex_buffer);
+	gen6_emit_vertex_elements(batch);
+
+	gen8_emit_vf_topology(batch);
+	gen8_emit_primitive(batch, vertex_buffer);
+
+	OUT_BATCH(MI_BATCH_BUFFER_END);
+
+	batch_end = intel_batchbuffer_align(batch, 8);
+	assert(batch_end < BATCH_STATE_SPLIT);
+	annotation_add_batch(&aub_annotations, batch_end);
+
+	dump_batch(batch);
+
+	annotation_flush(&aub_annotations, batch);
+
+	gen6_render_flush(batch, context, batch_end);
+	intel_batchbuffer_reset(batch);
+}
+
 static
 void _gen9_render_copyfunc(struct intel_batchbuffer *batch,
 			  drm_intel_context *context,
@@ -1154,3 +1323,23 @@ void gen12_render_copyfunc(struct intel_batchbuffer *batch,
 
 	gen12_aux_pgtable_cleanup(&pgtable_info);
 }
+
+void gen12_render_cc_copyfunc(struct intel_batchbuffer *batch,
+			      drm_intel_context *context,
+			      const struct igt_buf *src, unsigned int src_x, unsigned int src_y,
+			      unsigned int width, unsigned int height,
+			      const struct igt_buf *dst, unsigned int dst_x, unsigned int dst_y)
+
+{
+	struct aux_pgtable_info pgtable_info = { };
+
+	gen12_aux_pgtable_init(&pgtable_info, batch->bufmgr, src, dst);
+
+	_gen12_render_cc_copyfunc(batch, context, src, src_x, src_y,
+				  width, height, dst, dst_x, dst_y,
+				  pgtable_info.pgtable_bo,
+				  gen12_render_copy,
+				  sizeof(gen12_render_copy));
+
+	gen12_aux_pgtable_cleanup(&pgtable_info);
+}
-- 
2.17.1

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[igt-dev] [PATCH i-g-t 2/2] tests/kms_ccs: Enable CCS plane checks for Clear Color

[Mika Kahola]

Enable check for Clear Color plane content.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
 tests/kms_ccs.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c
index 2259a4f1..82fbc43a 100644
--- a/tests/kms_ccs.c
+++ b/tests/kms_ccs.c
@@ -157,8 +157,7 @@ static void check_all_ccs_planes(int drm_fd, igt_fb_t *fb)
 	int i;
 
 	for (i = 0; i < fb->num_planes; i++) {
-		if (igt_fb_is_ccs_plane(fb, i) &&
-		    !igt_fb_is_gen12_ccs_cc_plane(fb, i))
+		if (igt_fb_is_ccs_plane(fb, i))
 			check_ccs_plane(drm_fd, fb, i);
 	}
 }
-- 
2.17.1

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[igt-dev] ✓ Fi.CI.BAT: success for CCS Clear Color plane content check

[Patchwork]

== Series Details ==

Series: CCS Clear Color plane content check
URL   : https://patchwork.freedesktop.org/series/72076/
State : success

== Summary ==

CI Bug Log - changes from IGT_5367 -> IGTPW_3925
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/index.html

Known issues
------------

  Here are the changes found in IGTPW_3925 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_module_load@reload-with-fault-injection:
    - fi-skl-6700k2:      [PASS][1] -> [DMESG-WARN][2] ([i915#889])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/fi-skl-6700k2/igt@i915_module_load@reload-with-fault-injection.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/fi-skl-6700k2/igt@i915_module_load@reload-with-fault-injection.html

  * igt@kms_chamelium@dp-crc-fast:
    - fi-kbl-7500u:       [PASS][3] -> [FAIL][4] ([fdo#109635] / [i915#262])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html

  
#### Possible fixes ####

  * igt@gem_close_race@basic-threads:
    - fi-byt-j1900:       [TIMEOUT][5] ([fdo#112271] / [i915#816]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/fi-byt-j1900/igt@gem_close_race@basic-threads.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/fi-byt-j1900/igt@gem_close_race@basic-threads.html

  * igt@i915_module_load@reload-with-fault-injection:
    - fi-cfl-8700k:       [INCOMPLETE][7] ([i915#505]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/fi-cfl-8700k/igt@i915_module_load@reload-with-fault-injection.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/fi-cfl-8700k/igt@i915_module_load@reload-with-fault-injection.html
    - fi-skl-lmem:        [DMESG-WARN][9] -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/fi-skl-lmem/igt@i915_module_load@reload-with-fault-injection.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/fi-skl-lmem/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_selftest@live_execlists:
    - fi-kbl-soraka:      [DMESG-FAIL][11] ([i915#656]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/fi-kbl-soraka/igt@i915_selftest@live_execlists.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/fi-kbl-soraka/igt@i915_selftest@live_execlists.html

  * igt@i915_selftest@live_gem_contexts:
    - fi-ivb-3770:        [DMESG-FAIL][13] ([i915#722]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/fi-ivb-3770/igt@i915_selftest@live_gem_contexts.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/fi-ivb-3770/igt@i915_selftest@live_gem_contexts.html

  
#### Warnings ####

  * igt@i915_module_load@reload-with-fault-injection:
    - fi-skl-6770hq:      [DMESG-WARN][15] ([i915#889]) -> [INCOMPLETE][16] ([i915#671])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/fi-skl-6770hq/igt@i915_module_load@reload-with-fault-injection.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/fi-skl-6770hq/igt@i915_module_load@reload-with-fault-injection.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109635]: https://bugs.freedesktop.org/show_bug.cgi?id=109635
  [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
  [i915#262]: https://gitlab.freedesktop.org/drm/intel/issues/262
  [i915#505]: https://gitlab.freedesktop.org/drm/intel/issues/505
  [i915#656]: https://gitlab.freedesktop.org/drm/intel/issues/656
  [i915#671]: https://gitlab.freedesktop.org/drm/intel/issues/671
  [i915#722]: https://gitlab.freedesktop.org/drm/intel/issues/722
  [i915#816]: https://gitlab.freedesktop.org/drm/intel/issues/816
  [i915#889]: https://gitlab.freedesktop.org/drm/intel/issues/889
  [i915#937]: https://gitlab.freedesktop.org/drm/intel/issues/937


Participating hosts (52 -> 46)
------------------------------

  Additional (1): fi-tgl-y 
  Missing    (7): fi-hsw-4770r fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5367 -> IGTPW_3925

  CI-20190529: 20190529
  CI_DRM_7748: 1793de9a4215356790b87608fcfc9e99eeb6954d @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3925: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/index.html
  IGT_5367: 94af6de4f07487b93c4f5008f3ed04b5fc045200 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/index.html
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Re: [igt-dev] [PATCH i-g-t 1/2] lib/rendercopy: Enable render target Fast Clear for GEN12

[Imre Deak]

On Wed, Jan 15, 2020 at 04:38:12PM +0200, Mika Kahola wrote:
> To test Clear Color plane content, we need to enable
> render target for fast clear.
> 
> Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> ---
>  lib/gen12_render.h      |   9 ++
>  lib/igt_fb.c            |  13 +++
>  lib/intel_batchbuffer.c |  10 +++
>  lib/intel_batchbuffer.h |   1 +
>  lib/rendercopy.h        |   5 ++
>  lib/rendercopy_gen9.c   | 191 +++++++++++++++++++++++++++++++++++++++-
>  6 files changed, 228 insertions(+), 1 deletion(-)
>  create mode 100644 lib/gen12_render.h
> 
> diff --git a/lib/gen12_render.h b/lib/gen12_render.h
> new file mode 100644
> index 00000000..e70f4c25
> --- /dev/null
> +++ b/lib/gen12_render.h
> @@ -0,0 +1,9 @@
> +#ifndef GEN12_RENDER_H
> +#define GEN12_RENDER_H
> +
> +#include "gen9_render.h"
> +
> +#define GEN12_PS_FAST_CLEAR_ENABLE                     (1 << 8)
> +#define GEN12_PS_FAST_CLEAR_RESOLVE                    (2 << 6)
> +
> +#endif
> diff --git a/lib/igt_fb.c b/lib/igt_fb.c
> index c81b9de8..332f98d8 100644
> --- a/lib/igt_fb.c
> +++ b/lib/igt_fb.c
> @@ -480,6 +480,11 @@ static bool is_gen12_mc_ccs_modifier(uint64_t modifier)
>  	return modifier == LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS;
>  }
>  
> +static bool is_gen12_cc_ccs_modifier(uint64_t modifier)
> +{
> +	return modifier == LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC;
> +}
> +
>  static bool is_gen12_ccs_modifier(uint64_t modifier)
>  {
>  	return is_gen12_mc_ccs_modifier(modifier) ||
> @@ -2091,6 +2096,12 @@ static bool use_vebox_copy(const struct igt_fb *src_fb,
>  	       igt_format_is_yuv(dst_fb->drm_format);
>  }
>  
> +static bool use_clear_color_copy(const struct igt_fb *src_fb,
> +				 const struct igt_fb *dst_fb)
> +{
> +	return is_gen12_cc_ccs_modifier(dst_fb->modifier);
> +}
> +
>  /**
>   * copy_with_engine:
>   * @blit: context for the copy operation
> @@ -2115,6 +2126,8 @@ static void copy_with_engine(struct fb_blit_upload *blit,
>  
>  	if (use_vebox_copy(src_fb, dst_fb))
>  		vebox_copy = igt_get_vebox_copyfunc(intel_get_drm_devid(blit->fd));
> +	else if (use_clear_color_copy(src_fb, dst_fb))
> +		render_copy = igt_get_render_cc_copyfunc(intel_get_drm_devid(blit->fd));

We'd need a separate clear function that only clears the FB with a given
color. This is what we need for a RC-CC test in kms_ccs.

For a render copy test we need to add support to the existing render
copy func to read a fast color cleared FB. A test for this can be added
then to gem_render_copy.

>  	else
>  		render_copy = igt_get_render_copyfunc(intel_get_drm_devid(blit->fd));
>  
> diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
> index 3dc89024..227e854c 100644
> --- a/lib/intel_batchbuffer.c
> +++ b/lib/intel_batchbuffer.c
> @@ -851,6 +851,16 @@ igt_render_copyfunc_t igt_get_render_copyfunc(int devid)
>  	return copy;
>  }
>  
> +igt_render_copyfunc_t igt_get_render_cc_copyfunc(int devid)
> +{
> +	igt_render_copyfunc_t copy = NULL;
> +
> +	if (IS_GEN12(devid))
> +		copy = gen12_render_cc_copyfunc;
> +
> +	return copy;
> +}
> +
>  igt_vebox_copyfunc_t igt_get_vebox_copyfunc(int devid)
>  {
>  	igt_vebox_copyfunc_t copy = NULL;
> diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h
> index fd7ef03f..d979c9f2 100644
> --- a/lib/intel_batchbuffer.h
> +++ b/lib/intel_batchbuffer.h
> @@ -320,6 +320,7 @@ typedef void (*igt_render_copyfunc_t)(struct intel_batchbuffer *batch,
>  				      const struct igt_buf *dst, unsigned dst_x, unsigned dst_y);
>  
>  igt_render_copyfunc_t igt_get_render_copyfunc(int devid);
> +igt_render_copyfunc_t igt_get_render_cc_copyfunc(int devid);
>  
>  
>  /**
> diff --git a/lib/rendercopy.h b/lib/rendercopy.h
> index e0577cac..17f5fa94 100644
> --- a/lib/rendercopy.h
> +++ b/lib/rendercopy.h
> @@ -23,6 +23,11 @@ static inline void emit_vertex_normalized(struct intel_batchbuffer *batch,
>  	OUT_BATCH(u.ui);
>  }
>  
> +void gen12_render_cc_copyfunc(struct intel_batchbuffer *batch,
> +			      drm_intel_context * context,
> +			      const struct igt_buf *src, unsigned int src_x, unsigned int src_y,
> +			      unsigned int width, unsigned int height,
> +			      const struct igt_buf *dst, unsigned int dst_x, unsigned int dst_y);
>  void gen12_render_copyfunc(struct intel_batchbuffer *batch,
>  			   drm_intel_context *context,
>  			   const struct igt_buf *src, unsigned src_x, unsigned src_y,
> diff --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c
> index 835c8d80..af95d2ee 100644
> --- a/lib/rendercopy_gen9.c
> +++ b/lib/rendercopy_gen9.c
> @@ -20,7 +20,7 @@
>  #include "intel_batchbuffer.h"
>  #include "intel_io.h"
>  #include "rendercopy.h"
> -#include "gen9_render.h"
> +#include "gen12_render.h"
>  #include "intel_reg.h"
>  #include "igt_aux.h"
>  
> @@ -958,6 +958,54 @@ static void gen8_emit_primitive(struct intel_batchbuffer *batch, uint32_t offset
>  	OUT_BATCH(0);	/* index buffer offset, ignored */
>  }
>  
> +static void
> +gen12_emit_ps_cc(struct intel_batchbuffer *batch, uint32_t kernel)
> +{
> +	const int max_threads = 63;
> +
> +	OUT_BATCH(GEN6_3DSTATE_WM | (2 - 2));
> +	OUT_BATCH(/* XXX: I don't understand the BARYCENTRIC stuff, but it
> +		   * appears we need it to put our setup data in the place we
> +		   * expect (g6, see below) */
> +		  GEN8_3DSTATE_PS_PERSPECTIVE_PIXEL_BARYCENTRIC);
> +
> +	OUT_BATCH(GEN6_3DSTATE_CONSTANT_PS | (11-2));
> +	OUT_BATCH(0);
> +	OUT_BATCH(0);
> +	OUT_BATCH(0);
> +	OUT_BATCH(0);
> +	OUT_BATCH(0);
> +	OUT_BATCH(0);
> +	OUT_BATCH(0);
> +	OUT_BATCH(0);
> +	OUT_BATCH(0);
> +	OUT_BATCH(0);
> +
> +	OUT_BATCH(GEN7_3DSTATE_PS | (12-2));
> +	OUT_BATCH(kernel);

A shader kernel isn't used for a fast clear. Would be good to share more
with gen12_emit_ps().

> +	OUT_BATCH(0); /* kernel hi */
> +	OUT_BATCH(1 << GEN6_3DSTATE_WM_SAMPLER_COUNT_SHIFT |
> +		  2 << GEN6_3DSTATE_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT);
> +	OUT_BATCH(0); /* scratch space stuff */
> +	OUT_BATCH(0); /* scratch hi */
> +	OUT_BATCH((max_threads - 1) << GEN8_3DSTATE_PS_MAX_THREADS_SHIFT |
> +		  GEN6_3DSTATE_WM_16_DISPATCH_ENABLE);
> +	OUT_BATCH(6 << GEN6_3DSTATE_WM_DISPATCH_START_GRF_0_SHIFT);
> +	OUT_BATCH(0); // kernel 1
> +	OUT_BATCH(0); /* kernel 1 hi */
> +	OUT_BATCH(0); // kernel 2
> +	OUT_BATCH(0); /* kernel 2 hi */
> +	OUT_BATCH(GEN12_PS_FAST_CLEAR_ENABLE);
> +	OUT_BATCH(GEN12_PS_FAST_CLEAR_RESOLVE);
> +
> +	OUT_BATCH(GEN8_3DSTATE_PS_BLEND | (2 - 2));
> +	OUT_BATCH(GEN8_PS_BLEND_HAS_WRITEABLE_RT);
> +
> +	OUT_BATCH(GEN8_3DSTATE_PS_EXTRA | (2 - 2));
> +	OUT_BATCH(GEN8_PSX_PIXEL_SHADER_VALID | GEN8_PSX_ATTRIBUTE_ENABLE);
> +
> +}
> +
>  /* The general rule is if it's named gen6 it is directly copied from
>   * gen6_render_copyfunc.
>   *
> @@ -990,6 +1038,127 @@ static void gen8_emit_primitive(struct intel_batchbuffer *batch, uint32_t offset
>  
>  #define BATCH_STATE_SPLIT 2048
>  
> +static
> +void _gen12_render_cc_copyfunc(struct intel_batchbuffer *batch,
> +			       drm_intel_context *context,
> +			       const struct igt_buf *src, unsigned int src_x,
> +			       unsigned int src_y, unsigned int width, unsigned int height,
> +			       const struct igt_buf *dst, unsigned int dst_x,
> +			       unsigned int dst_y,
> +			       drm_intel_bo *aux_pgtable_bo,
> +			       const uint32_t ps_kernel[][4],
> +			       uint32_t ps_kernel_size)

Would be good to share more with gen12_render_copyfunc() and the clear
color must be passed in and programmed somewhere, maybe in the
gen9_surface_state struct clear color fields.

> +{
> +	uint32_t ps_sampler_state, ps_kernel_off, ps_binding_table;
> +	uint32_t scissor_state;
> +	uint32_t vertex_buffer;
> +	uint32_t batch_end;
> +	uint32_t aux_pgtable_state;
> +
> +	igt_assert(src->bpp == dst->bpp);
> +	intel_batchbuffer_flush_with_context(batch, context);
> +
> +	intel_batchbuffer_align(batch, 8);
> +
> +	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
> +
> +	annotation_init(&aub_annotations);
> +
> +	ps_binding_table  = gen8_bind_surfaces(batch, src, dst);
> +	ps_sampler_state  = gen8_create_sampler(batch);
> +	ps_kernel_off = gen8_fill_ps(batch, ps_kernel, ps_kernel_size);
> +	vertex_buffer = gen7_fill_vertex_buffer_data(batch, src,
> +						     src_x, src_y,
> +						     dst_x, dst_y,
> +						     width, height);
> +	cc.cc_state = gen6_create_cc_state(batch);
> +	cc.blend_state = gen8_create_blend_state(batch);
> +	viewport.cc_state = gen6_create_cc_viewport(batch);
> +	viewport.sf_clip_state = gen7_create_sf_clip_viewport(batch);
> +	scissor_state = gen6_create_scissor_rect(batch);
> +
> +	aux_pgtable_state = gen12_create_aux_pgtable_state(batch,
> +							   aux_pgtable_bo);
> +
> +	/* TODO: theree is other state which isn't setup */
> +
> +	assert(batch->ptr < &batch->buffer[4095]);
> +
> +	batch->ptr = batch->buffer;
> +
> +	/* Start emitting the commands. The order roughly follows the mesa blorp
> +	 * order */
> +	OUT_BATCH(G4X_PIPELINE_SELECT | PIPELINE_SELECT_3D |
> +				GEN9_PIPELINE_SELECTION_MASK);
> +
> +	gen12_emit_aux_pgtable_state(batch, aux_pgtable_state, true);
> +
> +	gen8_emit_sip(batch);
> +
> +	gen7_emit_push_constants(batch);
> +
> +	gen9_emit_state_base_address(batch);
> +
> +	OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC);
> +	OUT_BATCH(viewport.cc_state);
> +	OUT_BATCH(GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP);
> +	OUT_BATCH(viewport.sf_clip_state);
> +
> +	gen7_emit_urb(batch);
> +
> +	gen8_emit_cc(batch);
> +
> +	gen8_emit_multisample(batch);
> +
> +	gen8_emit_null_state(batch);
> +
> +	OUT_BATCH(GEN7_3DSTATE_STREAMOUT | (5 - 2));
> +	OUT_BATCH(0);
> +	OUT_BATCH(0);
> +	OUT_BATCH(0);
> +	OUT_BATCH(0);
> +
> +	gen7_emit_clip(batch);
> +
> +	gen8_emit_sf(batch);
> +
> +	gen12_emit_ps_cc(batch, ps_kernel_off);
> +
> +	OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS);
> +	OUT_BATCH(ps_binding_table);
> +
> +	OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS);
> +	OUT_BATCH(ps_sampler_state);
> +
> +	OUT_BATCH(GEN8_3DSTATE_SCISSOR_STATE_POINTERS);
> +	OUT_BATCH(scissor_state);
> +
> +	gen9_emit_depth(batch);
> +
> +	gen7_emit_clear(batch);
> +
> +	gen6_emit_drawing_rectangle(batch, dst);
> +
> +	gen7_emit_vertex_buffer(batch, vertex_buffer);
> +	gen6_emit_vertex_elements(batch);
> +
> +	gen8_emit_vf_topology(batch);
> +	gen8_emit_primitive(batch, vertex_buffer);
> +
> +	OUT_BATCH(MI_BATCH_BUFFER_END);
> +
> +	batch_end = intel_batchbuffer_align(batch, 8);
> +	assert(batch_end < BATCH_STATE_SPLIT);
> +	annotation_add_batch(&aub_annotations, batch_end);
> +
> +	dump_batch(batch);
> +
> +	annotation_flush(&aub_annotations, batch);
> +
> +	gen6_render_flush(batch, context, batch_end);
> +	intel_batchbuffer_reset(batch);
> +}
> +
>  static
>  void _gen9_render_copyfunc(struct intel_batchbuffer *batch,
>  			  drm_intel_context *context,
> @@ -1154,3 +1323,23 @@ void gen12_render_copyfunc(struct intel_batchbuffer *batch,
>  
>  	gen12_aux_pgtable_cleanup(&pgtable_info);
>  }
> +
> +void gen12_render_cc_copyfunc(struct intel_batchbuffer *batch,
> +			      drm_intel_context *context,
> +			      const struct igt_buf *src, unsigned int src_x, unsigned int src_y,
> +			      unsigned int width, unsigned int height,
> +			      const struct igt_buf *dst, unsigned int dst_x, unsigned int dst_y)
> +
> +{
> +	struct aux_pgtable_info pgtable_info = { };
> +
> +	gen12_aux_pgtable_init(&pgtable_info, batch->bufmgr, src, dst);
> +
> +	_gen12_render_cc_copyfunc(batch, context, src, src_x, src_y,
> +				  width, height, dst, dst_x, dst_y,
> +				  pgtable_info.pgtable_bo,
> +				  gen12_render_copy,
> +				  sizeof(gen12_render_copy));
> +
> +	gen12_aux_pgtable_cleanup(&pgtable_info);
> +}
> -- 
> 2.17.1
> 
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
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[igt-dev] ✓ Fi.CI.IGT: success for CCS Clear Color plane content check

[Patchwork]

== Series Details ==

Series: CCS Clear Color plane content check
URL   : https://patchwork.freedesktop.org/series/72076/
State : success

== Summary ==

CI Bug Log - changes from IGT_5367_full -> IGTPW_3925_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/index.html

Known issues
------------

  Here are the changes found in IGTPW_3925_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_isolation@vcs1-dirty-create:
    - shard-iclb:         [PASS][1] -> [SKIP][2] ([fdo#109276] / [fdo#112080]) +3 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-iclb2/igt@gem_ctx_isolation@vcs1-dirty-create.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-iclb8/igt@gem_ctx_isolation@vcs1-dirty-create.html

  * igt@gem_ctx_shared@q-smoketest-bsd1:
    - shard-tglb:         [PASS][3] -> [INCOMPLETE][4] ([fdo#111735] / [i915#472])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-tglb5/igt@gem_ctx_shared@q-smoketest-bsd1.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-tglb6/igt@gem_ctx_shared@q-smoketest-bsd1.html

  * igt@gem_eio@reset-stress:
    - shard-snb:          [PASS][5] -> [FAIL][6] ([i915#232])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-snb5/igt@gem_eio@reset-stress.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-snb1/igt@gem_eio@reset-stress.html

  * igt@gem_exec_balancer@smoke:
    - shard-iclb:         [PASS][7] -> [SKIP][8] ([fdo#110854])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-iclb4/igt@gem_exec_balancer@smoke.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-iclb5/igt@gem_exec_balancer@smoke.html

  * igt@gem_exec_schedule@fifo-bsd1:
    - shard-iclb:         [PASS][9] -> [SKIP][10] ([fdo#109276]) +16 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-iclb1/igt@gem_exec_schedule@fifo-bsd1.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-iclb6/igt@gem_exec_schedule@fifo-bsd1.html

  * igt@gem_exec_schedule@pi-distinct-iova-bsd:
    - shard-iclb:         [PASS][11] -> [SKIP][12] ([i915#677]) +1 similar issue
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-iclb6/igt@gem_exec_schedule@pi-distinct-iova-bsd.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-iclb4/igt@gem_exec_schedule@pi-distinct-iova-bsd.html

  * igt@gem_exec_schedule@preempt-other-bsd1:
    - shard-tglb:         [PASS][13] -> [INCOMPLETE][14] ([i915#472])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-tglb5/igt@gem_exec_schedule@preempt-other-bsd1.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-tglb6/igt@gem_exec_schedule@preempt-other-bsd1.html

  * igt@gem_exec_schedule@preemptive-hang-bsd:
    - shard-iclb:         [PASS][15] -> [SKIP][16] ([fdo#112146]) +8 similar issues
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-iclb5/igt@gem_exec_schedule@preemptive-hang-bsd.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-iclb4/igt@gem_exec_schedule@preemptive-hang-bsd.html

  * igt@gem_exec_schedule@smoketest-all:
    - shard-tglb:         [PASS][17] -> [INCOMPLETE][18] ([i915#463] / [i915#472])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-tglb5/igt@gem_exec_schedule@smoketest-all.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-tglb4/igt@gem_exec_schedule@smoketest-all.html

  * igt@gem_mmap_gtt@basic-small-copy:
    - shard-snb:          [PASS][19] -> [DMESG-WARN][20] ([i915#478])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-snb6/igt@gem_mmap_gtt@basic-small-copy.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-snb6/igt@gem_mmap_gtt@basic-small-copy.html

  * igt@gem_persistent_relocs@forked-faulting-reloc-thrashing:
    - shard-hsw:          [PASS][21] -> [INCOMPLETE][22] ([i915#530] / [i915#61])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-hsw2/igt@gem_persistent_relocs@forked-faulting-reloc-thrashing.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-hsw5/igt@gem_persistent_relocs@forked-faulting-reloc-thrashing.html

  * igt@gem_persistent_relocs@forked-interruptible-thrashing:
    - shard-snb:          [PASS][23] -> [TIMEOUT][24] ([fdo#112271] / [i915#530])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-snb1/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-snb2/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
    - shard-iclb:         [PASS][25] -> [FAIL][26] ([i915#520])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-iclb2/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-iclb1/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
    - shard-kbl:          [PASS][27] -> [TIMEOUT][28] ([fdo#112271] / [i915#530])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-kbl4/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-kbl2/igt@gem_persistent_relocs@forked-interruptible-thrashing.html

  * igt@gem_persistent_relocs@forked-thrashing:
    - shard-snb:          [PASS][29] -> [FAIL][30] ([i915#520])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-snb7/igt@gem_persistent_relocs@forked-thrashing.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-snb6/igt@gem_persistent_relocs@forked-thrashing.html

  * igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup:
    - shard-snb:          [PASS][31] -> [DMESG-WARN][32] ([fdo#111870] / [i915#478])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-snb4/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-snb1/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup.html

  * igt@kms_cursor_crc@pipe-c-cursor-64x64-sliding:
    - shard-apl:          [PASS][33] -> [FAIL][34] ([i915#54])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-apl6/igt@kms_cursor_crc@pipe-c-cursor-64x64-sliding.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-apl1/igt@kms_cursor_crc@pipe-c-cursor-64x64-sliding.html

  * igt@kms_cursor_crc@pipe-c-cursor-suspend:
    - shard-kbl:          [PASS][35] -> [DMESG-WARN][36] ([i915#180]) +8 similar issues
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-kbl7/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-kbl4/igt@kms_cursor_crc@pipe-c-cursor-suspend.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-plflip-blt:
    - shard-tglb:         [PASS][37] -> [FAIL][38] ([i915#49]) +1 similar issue
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-tglb5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-plflip-blt.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-tglb8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-plflip-blt.html

  * igt@kms_psr@psr2_sprite_blt:
    - shard-iclb:         [PASS][39] -> [SKIP][40] ([fdo#109441]) +1 similar issue
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-iclb2/igt@kms_psr@psr2_sprite_blt.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-iclb1/igt@kms_psr@psr2_sprite_blt.html

  * igt@kms_vblank@pipe-b-ts-continuation-suspend:
    - shard-kbl:          [PASS][41] -> [INCOMPLETE][42] ([fdo#103665])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-kbl3/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-kbl1/igt@kms_vblank@pipe-b-ts-continuation-suspend.html

  * igt@perf_pmu@busy-check-all-vcs1:
    - shard-iclb:         [PASS][43] -> [SKIP][44] ([fdo#112080]) +7 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-iclb4/igt@perf_pmu@busy-check-all-vcs1.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-iclb6/igt@perf_pmu@busy-check-all-vcs1.html

  
#### Possible fixes ####

  * igt@gem_ctx_create@basic-files:
    - shard-tglb:         [INCOMPLETE][45] ([fdo#111735] / [i915#472]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-tglb6/igt@gem_ctx_create@basic-files.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-tglb3/igt@gem_ctx_create@basic-files.html

  * igt@gem_ctx_isolation@vcs1-clean:
    - shard-iclb:         [SKIP][47] ([fdo#109276] / [fdo#112080]) -> [PASS][48] +1 similar issue
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-iclb6/igt@gem_ctx_isolation@vcs1-clean.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-iclb1/igt@gem_ctx_isolation@vcs1-clean.html

  * igt@gem_ctx_persistence@bcs0-mixed-process:
    - shard-glk:          [FAIL][49] ([i915#679]) -> [PASS][50]
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-glk3/igt@gem_ctx_persistence@bcs0-mixed-process.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-glk9/igt@gem_ctx_persistence@bcs0-mixed-process.html

  * igt@gem_exec_parallel@fds:
    - shard-tglb:         [INCOMPLETE][51] ([i915#470] / [i915#472]) -> [PASS][52]
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-tglb3/igt@gem_exec_parallel@fds.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-tglb6/igt@gem_exec_parallel@fds.html

  * igt@gem_exec_schedule@independent-bsd2:
    - shard-iclb:         [SKIP][53] ([fdo#109276]) -> [PASS][54] +20 similar issues
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-iclb8/igt@gem_exec_schedule@independent-bsd2.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-iclb1/igt@gem_exec_schedule@independent-bsd2.html

  * igt@gem_exec_schedule@pi-shared-iova-bsd:
    - shard-iclb:         [SKIP][55] ([i915#677]) -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-iclb4/igt@gem_exec_schedule@pi-shared-iova-bsd.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-iclb8/igt@gem_exec_schedule@pi-shared-iova-bsd.html

  * igt@gem_exec_schedule@preempt-other-chain-bsd:
    - shard-iclb:         [SKIP][57] ([fdo#112146]) -> [PASS][58] +3 similar issues
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-iclb4/igt@gem_exec_schedule@preempt-other-chain-bsd.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-iclb6/igt@gem_exec_schedule@preempt-other-chain-bsd.html

  * igt@gem_exec_schedule@preempt-queue-chain-vebox:
    - shard-tglb:         [INCOMPLETE][59] ([fdo#111677] / [i915#472]) -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-tglb6/igt@gem_exec_schedule@preempt-queue-chain-vebox.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-tglb1/igt@gem_exec_schedule@preempt-queue-chain-vebox.html

  * igt@gem_exec_schedule@preempt-queue-contexts-blt:
    - shard-tglb:         [INCOMPLETE][61] ([fdo#111606] / [fdo#111677] / [i915#472]) -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-tglb6/igt@gem_exec_schedule@preempt-queue-contexts-blt.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-tglb7/igt@gem_exec_schedule@preempt-queue-contexts-blt.html

  * igt@gem_exec_schedule@wide-vebox:
    - shard-tglb:         [INCOMPLETE][63] ([fdo#111736] / [i915#472]) -> [PASS][64]
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-tglb2/igt@gem_exec_schedule@wide-vebox.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-tglb1/igt@gem_exec_schedule@wide-vebox.html

  * igt@gem_exec_suspend@basic-s0:
    - shard-tglb:         [INCOMPLETE][65] ([i915#472]) -> [PASS][66]
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-tglb4/igt@gem_exec_suspend@basic-s0.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-tglb8/igt@gem_exec_suspend@basic-s0.html

  * igt@gem_fence_thrash@bo-copy:
    - shard-snb:          [DMESG-WARN][67] ([i915#478]) -> [PASS][68]
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-snb7/igt@gem_fence_thrash@bo-copy.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-snb2/igt@gem_fence_thrash@bo-copy.html

  * igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive:
    - shard-glk:          [TIMEOUT][69] ([fdo#112271] / [i915#530]) -> [PASS][70]
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-glk4/igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-glk3/igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive.html

  * igt@gem_persistent_relocs@forked-thrash-inactive:
    - shard-apl:          [TIMEOUT][71] ([fdo#112271] / [i915#530]) -> [PASS][72]
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-apl2/igt@gem_persistent_relocs@forked-thrash-inactive.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-apl2/igt@gem_persistent_relocs@forked-thrash-inactive.html

  * igt@gem_pipe_control_store_loop@reused-buffer:
    - shard-tglb:         [INCOMPLETE][73] ([i915#472] / [i915#707] / [i915#796]) -> [PASS][74]
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-tglb3/igt@gem_pipe_control_store_loop@reused-buffer.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-tglb7/igt@gem_pipe_control_store_loop@reused-buffer.html

  * igt@gem_ppgtt@flink-and-close-vma-leak:
    - shard-apl:          [FAIL][75] ([i915#644]) -> [PASS][76]
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-apl1/igt@gem_ppgtt@flink-and-close-vma-leak.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-apl2/igt@gem_ppgtt@flink-and-close-vma-leak.html

  * igt@gem_userptr_blits@dmabuf-sync:
    - shard-snb:          [DMESG-WARN][77] ([fdo#111870] / [i915#478]) -> [PASS][78]
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-snb7/igt@gem_userptr_blits@dmabuf-sync.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-snb6/igt@gem_userptr_blits@dmabuf-sync.html

  * igt@i915_pm_dc@dc6-psr:
    - shard-iclb:         [FAIL][79] ([i915#454]) -> [PASS][80]
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-iclb4/igt@i915_pm_dc@dc6-psr.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-iclb1/igt@i915_pm_dc@dc6-psr.html

  * igt@i915_pm_rps@waitboost:
    - shard-iclb:         [FAIL][81] ([i915#413]) -> [PASS][82]
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-iclb2/igt@i915_pm_rps@waitboost.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-iclb1/igt@i915_pm_rps@waitboost.html

  * igt@i915_suspend@sysfs-reader:
    - shard-apl:          [DMESG-WARN][83] ([i915#180]) -> [PASS][84] +4 similar issues
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-apl4/igt@i915_suspend@sysfs-reader.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-apl8/igt@i915_suspend@sysfs-reader.html

  * igt@kms_cursor_crc@pipe-a-cursor-suspend:
    - shard-kbl:          [DMESG-WARN][85] ([i915#180]) -> [PASS][86] +4 similar issues
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-kbl7/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-kbl7/igt@kms_cursor_crc@pipe-a-cursor-suspend.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-glk:          [FAIL][87] ([i915#79]) -> [PASS][88]
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-glk1/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-glk4/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw:
    - shard-tglb:         [FAIL][89] ([i915#49]) -> [PASS][90]
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-tglb5/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-tglb5/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html

  * igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb:
    - shard-tglb:         [DMESG-WARN][91] ([i915#667]) -> [PASS][92]
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-tglb2/igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-tglb3/igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb.html

  * igt@kms_psr@no_drrs:
    - shard-iclb:         [FAIL][93] ([i915#173]) -> [PASS][94]
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-iclb1/igt@kms_psr@no_drrs.html
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-iclb6/igt@kms_psr@no_drrs.html

  * igt@kms_psr@psr2_cursor_plane_onoff:
    - shard-iclb:         [SKIP][95] ([fdo#109441]) -> [PASS][96] +2 similar issues
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-iclb5/igt@kms_psr@psr2_cursor_plane_onoff.html
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-iclb2/igt@kms_psr@psr2_cursor_plane_onoff.html

  * igt@perf_pmu@busy-no-semaphores-vcs1:
    - shard-iclb:         [SKIP][97] ([fdo#112080]) -> [PASS][98] +10 similar issues
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-iclb5/igt@perf_pmu@busy-no-semaphores-vcs1.html
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-iclb2/igt@perf_pmu@busy-no-semaphores-vcs1.html

  * igt@prime_vgem@sync-render:
    - shard-iclb:         [INCOMPLETE][99] ([i915#140]) -> [PASS][100]
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-iclb2/igt@prime_vgem@sync-render.html
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-iclb8/igt@prime_vgem@sync-render.html

  
#### Warnings ####

  * igt@gem_eio@kms:
    - shard-snb:          [DMESG-WARN][101] ([i915#444] / [i915#503]) -> [INCOMPLETE][102] ([i915#82])
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-snb6/igt@gem_eio@kms.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-snb7/igt@gem_eio@kms.html

  * igt@gem_persistent_relocs@forked-interruptible-thrashing:
    - shard-apl:          [TIMEOUT][103] ([fdo#112271] / [i915#530]) -> [INCOMPLETE][104] ([CI#80] / [fdo#103927] / [i915#530])
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-apl8/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-apl2/igt@gem_persistent_relocs@forked-interruptible-thrashing.html

  * igt@gem_userptr_blits@dmabuf-unsync:
    - shard-snb:          [DMESG-WARN][105] ([fdo#110789] / [fdo#111870] / [i915#478]) -> [DMESG-WARN][106] ([fdo#111870] / [i915#478])
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-snb1/igt@gem_userptr_blits@dmabuf-unsync.html
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-snb7/igt@gem_userptr_blits@dmabuf-unsync.html

  * igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy:
    - shard-snb:          [DMESG-WARN][107] ([fdo#111870] / [i915#478]) -> [DMESG-WARN][108] ([fdo#110789] / [fdo#111870] / [i915#478])
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-snb4/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-snb6/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html

  * igt@i915_pm_dc@dc6-psr:
    - shard-tglb:         [SKIP][109] ([i915#468]) -> [FAIL][110] ([i915#454])
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-tglb6/igt@i915_pm_dc@dc6-psr.html
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-tglb4/igt@i915_pm_dc@dc6-psr.html

  * igt@i915_selftest@live_blt:
    - shard-hsw:          [DMESG-FAIL][111] ([i915#563]) -> [DMESG-FAIL][112] ([i915#725])
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5367/shard-hsw5/igt@i915_selftest@live_blt.html
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/shard-hsw2/igt@i915_selftest@live_blt.html

  
  [CI#80]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/80
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#110789]: https://bugs.freedesktop.org/show_bug.cgi?id=110789
  [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
  [fdo#111606]: https://bugs.freedesktop.org/show_bug.cgi?id=111606
  [fdo#111677]: https://bugs.freedesktop.org/show_bug.cgi?id=111677
  [fdo#111735]: https://bugs.freedesktop.org/show_bug.cgi?id=111735
  [fdo#111736]: https://bugs.freedesktop.org/show_bug.cgi?id=111736
  [fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870
  [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
  [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
  [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
  [i915#140]: https://gitlab.freedesktop.org/drm/intel/issues/140
  [i915#173]: https://gitlab.freedesktop.org/drm/intel/issues/173
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#232]: https://gitlab.freedesktop.org/drm/intel/issues/232
  [i915#413]: https://gitlab.freedesktop.org/drm/intel/issues/413
  [i915#444]: https://gitlab.freedesktop.org/drm/intel/issues/444
  [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
  [i915#463]: https://gitlab.freedesktop.org/drm/intel/issues/463
  [i915#468]: https://gitlab.freedesktop.org/drm/intel/issues/468
  [i915#470]: https://gitlab.freedesktop.org/drm/intel/issues/470
  [i915#472]: https://gitlab.freedesktop.org/drm/intel/issues/472
  [i915#478]: https://gitlab.freedesktop.org/drm/intel/issues/478
  [i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
  [i915#503]: https://gitlab.freedesktop.org/drm/intel/issues/503
  [i915#520]: https://gitlab.freedesktop.org/drm/intel/issues/520
  [i915#530]: https://gitlab.freedesktop.org/drm/intel/issues/530
  [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
  [i915#563]: https://gitlab.freedesktop.org/drm/intel/issues/563
  [i915#61]: https://gitlab.freedesktop.org/drm/intel/issues/61
  [i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644
  [i915#667]: https://gitlab.freedesktop.org/drm/intel/issues/667
  [i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
  [i915#679]: https://gitlab.freedesktop.org/drm/intel/issues/679
  [i915#707]: https://gitlab.freedesktop.org/drm/intel/issues/707
  [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
  [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
  [i915#796]: https://gitlab.freedesktop.org/drm/intel/issues/796
  [i915#82]: https://gitlab.freedesktop.org/drm/intel/issues/82


Participating hosts (8 -> 8)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5367 -> IGTPW_3925

  CI-20190529: 20190529
  CI_DRM_7748: 1793de9a4215356790b87608fcfc9e99eeb6954d @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3925: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/index.html
  IGT_5367: 94af6de4f07487b93c4f5008f3ed04b5fc045200 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3925/index.html
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