* [igt-dev] [PATCH i-g-t v4 0/1] Support to assemble CB kernel for gen7
@ 2020-02-21 8:22 Akeem G Abodunrin
2020-02-21 8:22 ` [igt-dev] [PATCH i-g-t v4 1/1] tools/generate_cb_buffer: Add script to assemble CB kernel Akeem G Abodunrin
` (2 more replies)
0 siblings, 3 replies; 11+ messages in thread
From: Akeem G Abodunrin @ 2020-02-21 8:22 UTC (permalink / raw)
To: akeem.g.abodunrin, jon.bloomfield, sudeep.dutt, daniel.vetter,
joonas.lahtinen, jani.nikula, chris.p.wilson,
prathap.kumar.valsan, mika.kuoppala, francesco.balestrieri,
ville.syrjala, petri.latvala, igt-dev
Summary
-------
This is patch adds support to assemble CB kernel for gen7 and gen7.5
devices. It is needed for "Security mitigation for Intel Gen7/7.5 HWs"
Intel ID: PSIRT-TA-201910-001/CVEID: CVE-2019-14615.
Additional Note
---------------
The changes in the IGT GPU tool require latest Mesa tool to work
correctly. Generated CB kernel are imported to i915 driver, without need
for additional modifications. Users can use assembly sources provided
with this patch, and Mesa/igt to assemble CB kernel for verifications.
Akeem G Abodunrin (1):
tools/generate_cb_buffer: Add script to assemble CB kernel
scripts/asm_eu_kernel.sh | 153 ++++++++++++++++++++++++
tools/assembly_source/hsw_clear_buf.asm | 141 ++++++++++++++++++++++
tools/assembly_source/ivb_clear_buf.asm | 139 +++++++++++++++++++++
3 files changed, 433 insertions(+)
create mode 100755 scripts/asm_eu_kernel.sh
create mode 100644 tools/assembly_source/hsw_clear_buf.asm
create mode 100644 tools/assembly_source/ivb_clear_buf.asm
--
2.20.1
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^ permalink raw reply [flat|nested] 11+ messages in thread* [igt-dev] [PATCH i-g-t v4 1/1] tools/generate_cb_buffer: Add script to assemble CB kernel 2020-02-21 8:22 [igt-dev] [PATCH i-g-t v4 0/1] Support to assemble CB kernel for gen7 Akeem G Abodunrin @ 2020-02-21 8:22 ` Akeem G Abodunrin 2020-02-24 9:48 ` Petri Latvala 2020-02-21 16:31 ` [igt-dev] ✓ Fi.CI.BAT: success for Support to assemble CB kernel for gen7 (rev3) Patchwork 2020-02-24 11:37 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork 2 siblings, 1 reply; 11+ messages in thread From: Akeem G Abodunrin @ 2020-02-21 8:22 UTC (permalink / raw) To: akeem.g.abodunrin, jon.bloomfield, sudeep.dutt, daniel.vetter, joonas.lahtinen, jani.nikula, chris.p.wilson, prathap.kumar.valsan, mika.kuoppala, francesco.balestrieri, ville.syrjala, petri.latvala, igt-dev This patch adds script and applicable assembly sources, so that we can use igt to assemble Clear Batch Buffer kernel for gen7 and gen7.5 devices - Resultant header files would be imported to i915, and used as they are... With this patch, user need to have mesa configured on their platform, before igt could be used to achieve the purpose of assembling the kernel from source. This is needed for "Security mitigation for Intel Gen7/7.5 HWs" Intel ID: PSIRT-TA-201910-001/CVEID: CVE-2019-14615 v2: Addressed formatting, -g option and other minor issues (Petri) V3: Update script due to suggested changes in i915, and Mesa tool v4: Update help comment with Mesa build option with meson (Petri) Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Petri Latvala <petri.latvala@intel.com> Cc: Bloomfield Jon <jon.bloomfield@intel.com> Signed-off-by: Akeem G Abodunrin <akeem.g.abodunrin@intel.com> --- scripts/asm_eu_kernel.sh | 153 ++++++++++++++++++++++++ tools/assembly_source/hsw_clear_buf.asm | 141 ++++++++++++++++++++++ tools/assembly_source/ivb_clear_buf.asm | 139 +++++++++++++++++++++ 3 files changed, 433 insertions(+) create mode 100755 scripts/asm_eu_kernel.sh create mode 100644 tools/assembly_source/hsw_clear_buf.asm create mode 100644 tools/assembly_source/ivb_clear_buf.asm diff --git a/scripts/asm_eu_kernel.sh b/scripts/asm_eu_kernel.sh new file mode 100755 index 00000000..1958829c --- /dev/null +++ b/scripts/asm_eu_kernel.sh @@ -0,0 +1,153 @@ +#!/bin/bash +# +# SPDX-License-Identifier: MIT +# +# Copyright © 2020 Intel Corporation +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice (including the next +# paragraph) shall be included in all copies or substantial portions of the +# Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +# IN THE SOFTWARE. + +export ASSEMBLY_SOURCE=./tools/assembly_source + +function get_help { + echo "Usage: asm_eu_kernel.sh [options]" + echo "Note: hsw_clear_kernel.c/ivb_clear_kernel.c automatically generated by this script should never be modified - it would be imported to i915, to use as it is..." + echo " " + echo "Please make sure your Mesa tool is compiled with "-Dtools=intel" and "-Ddri-drivers=i965", and run this script from IGT source root directory" + echo " " + echo "Options are:" + echo " -h display this help message, and exit" + echo " -g=platform generation of device: use "hsw" for gen7.5, and "ivb" for gen7 devices" + echo " -o=name_of_file output file to store Mesa assembled c-literal for the device - If none specified, default file will be used - ivb/hsw-cb_assembled" + echo " -m=mesa Mesa source directory" + echo " " + echo " Usage example: \"scripts/asm_eu_kernel.sh -g hsw -o hsw_clear_buffer.h -m /path/to/Mesa/source/directory\"" +} + +function include_array # $1=array_name +{ + echo "static const u32 $(basename $1)_clear_kernel[] = {" +} +function prefix_header # $1=filename $2=comment +{ + array_name=$(include_array $1) + + cat <<EOF +// SPDX-License-Identifier: MIT +/* + * Copyright © 2020 Intel Corporation + * + * Generated by: IGT Gpu Tools on $(date) + */ + +$array_name +EOF +} + +function postfix_footer # filename +{ + cat <<EOF +}; +EOF +} + +function check_output_file #check output file +{ + if [ "x$output_file" != "x" ]; then + if [ -f "$output_file" ]; then + echo -e "Warning: The \"$output_file\" file already exist - choose another file\n" + get_help + exit 1 + fi + else + # It is okay to overwrite default file created + echo -e "Output file not specified - using default file \"$gen_device-cb_assembled\"\n" + output_file="$gen_device-cb_assembled" + fi +} +function asm_cb_kernel # as-root <args> +{ + check_output_file + + # Using i965_asm tool to assemble hex file from assembly source + $I965_ASM -g $gen_device -t c_literal $input_asm_source -o $output_file + + # Generate header file + if [ "$gen_device" == "hsw" ]; then + echo "Generating gen7.5 CB Kernel assembled file \"hsw_clear_kernel.c\" for i915 driver..." + + i915_filename=hsw_clear_kernel.c + prefix_header $gen_device > $i915_filename + cat $output_file >> $i915_filename + postfix_footer $i915_filename >> $i915_filename + + elif [ "$gen_device" == "ivb" ]; then + echo "Generating gen7 CB Kernel assembled file \"ivb_clear_kernel.c\" for i915 driver..." + + i915_filename=ivb_clear_kernel.c + prefix_header $gen_device > $i915_filename + cat $output_file >> $i915_filename + postfix_footer $i915_filename >> $i915_filename + fi +} + +while getopts "hg:o:m:" opt; do + case $opt in + h) get_help; exit 0;; + g) gen_device="$OPTARG" ;; + o) output_file="$OPTARG" ;; + m) mesa_dir="$OPTARG" ;; + \?) + echo -e "Unknown option: -$OPTARG\n" + get_help + exit 1 + ;; + esac +done +shift $(($OPTIND-1)) + +if [ "x$1" != "x" ]; then + echo -e "Unknown option: $1\n" + get_help + exit 1 +fi + +I965_ASM="$mesa_dir/build/debug/src/intel/tools/i965_asm" +if [ ! -f ${I965_ASM} ]; then + echo -e "i965_asm not found at ${I965_ASM}\n" + get_help + exit 1 +fi + +if [ "x$gen_device" != "x" ]; then + if [ "$gen_device" == "hsw" ]; then + input_asm_source="${ASSEMBLY_SOURCE}/hsw_clear_buf.asm" + elif [ "$gen_device" == "ivb" ]; then + input_asm_source="${ASSEMBLY_SOURCE}/ivb_clear_buf.asm" + else + echo -e "Unknown platform specified\n" + get_help + exit 1 + fi + asm_cb_kernel +else + echo -e "Platform generation not specified\n" + get_help + exit 1 +fi diff --git a/tools/assembly_source/hsw_clear_buf.asm b/tools/assembly_source/hsw_clear_buf.asm new file mode 100644 index 00000000..bc29baf2 --- /dev/null +++ b/tools/assembly_source/hsw_clear_buf.asm @@ -0,0 +1,141 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2020 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + */ + +/** + * Kernel name: hsw_clear_buf.asm + * + * Kernel for PAVP buffer clear. + * + * 1. Clear all 64 GRF registers assigned to the kernel with designated value; + * 2. Write 32x16 block of all "0" to render target buffer which indirectly clears + * 512 bytes of Render Cache. + */ + +/* Store designated "clear GRF" value */ +mov(1) f0.1<1>UW g1.2<0,1,0>UW { align1 1N }; + +/** + * Curbe Format + * + * DW 1.0 - Block Offset to write Render Cache + * DW 1.1 [15:0] - Clear Word + * DW 1.2 - Delay iterations + * DW 1.3 - Enable Instrumentation (only for debug) + * DW 1.4 - Rsvd (intended for context ID) + * DW 1.5 - [31:16]:SliceCount, [15:0]:SubSlicePerSliceCount + * DW 1.6 - Rsvd MBZ (intended for Enable Wait on Total Thread Count) + * DW 1.7 - Rsvd MBZ (inteded for Total Thread Count) + * + * Binding Table + * + * BTI 0: 2D Surface to help clear L3 (Render/Data Cache) + * BTI 1: Wait/Instrumentation Buffer + * Size : (SliceCount * SubSliceCount * 16 EUs/SubSlice) rows * (16 threads/EU) cols (Format R32_UINT) + * Expected to be initialized to 0 by driver/another kernel + * Layout: + * RowN: Histogram for EU-N: (SliceID*SubSlicePerSliceCount + SSID)*16 + EUID [assume max 16 EUs / SS] + * Col-k[DW-k]: Threads Executed on ThreadID-k for EU-N + */ +add(1) g1.2<1>UD g1.2<0,1,0>UD 0x00000001UD { align1 1N }; /* Loop count to delay kernel: Init to (g1.2 + 1) */ +cmp.z.f0.0(1) null<1>UD g1.3<0,1,0>UD 0x00000000UD { align1 1N }; +(+f0.0) jmpi(1) 352D { align1 WE_all 1N }; + +/** + * State Register has info on where this thread is running + * IVB: sr0.0 :: [15:13]: MBZ, 12: HSID (Half-Slice ID), [11:8]EUID, [2:0] ThreadSlotID + * HSW: sr0.0 :: 15: MBZ, [14:13]: SliceID, 12: HSID (Half-Slice ID), [11:8]EUID, [2:0] ThreadSlotID + */ +mov(8) g3<1>UD 0x00000000UD { align1 1Q }; +shr(1) g3<1>D sr0<0,1,0>D 12D { align1 1N }; +and(1) g3<1>D g3<0,1,0>D 1D { align1 1N }; /* g3 has HSID */ +shr(1) g3.1<1>D sr0<0,1,0>D 13D { align1 1N }; +and(1) g3.1<1>D g3.1<0,1,0>D 3D { align1 1N }; /* g3.1 has sliceID */ +mul(1) g3.5<1>D g3.1<0,1,0>D g1.10<0,1,0>UW { align1 1N }; +add(1) g3<1>D g3<0,1,0>D g3.5<0,1,0>D { align1 1N }; /* g3 = sliceID * SubSlicePerSliceCount + HSID */ +shr(1) g3.2<1>D sr0<0,1,0>D 8D { align1 1N }; +and(1) g3.2<1>D g3.2<0,1,0>D 15D { align1 1N }; /* g3.2 = EUID */ +mul(1) g3.4<1>D g3<0,1,0>D 16D { align1 1N }; +add(1) g3.2<1>D g3.2<0,1,0>D g3.4<0,1,0>D { align1 1N }; /* g3.2 now points to EU row number (Y-pixel = V address ) in instrumentation surf */ + +mov(8) g5<1>UD 0x00000000UD { align1 1Q }; +and(1) g3.3<1>D sr0<0,1,0>D 7D { align1 1N }; +mul(1) g3.3<1>D g3.3<0,1,0>D 4D { align1 1N }; + +mov(8) g4<1>UD g0<8,8,1>UD { align1 1Q }; /* Initialize message header with g0 */ +mov(1) g4<1>UD g3.3<0,1,0>UD { align1 1N }; /* Block offset */ +mov(1) g4.1<1>UD g3.2<0,1,0>UD { align1 1N }; /* Block offset */ +mov(1) g4.2<1>UD 0x00000003UD { align1 1N }; /* Block size (1 row x 4 bytes) */ +and(1) g4.3<1>UD g4.3<0,1,0>UW 0xffffffffUD { align1 1N }; + +/* Media block read to fetch current value at specified location in instrumentation buffer */ +sendc(8) g5<1>UD g4<8,8,1>F 0x02190001 + + render MsgDesc: media block read MsgCtrl = 0x0 Surface = 1 mlen 1 rlen 1 { align1 1Q }; +add(1) g5<1>D g5<0,1,0>D 1D { align1 1N }; + +/* Media block write for updated value at specified location in instrumentation buffer */ +sendc(8) g5<1>UD g4<8,8,1>F 0x040a8001 + render MsgDesc: media block write MsgCtrl = 0x0 Surface = 1 mlen 2 rlen 0 { align1 1Q }; + +/* Delay thread for specified parameter */ +add.nz.f0.0(1) g1.2<1>UD g1.2<0,1,0>UD -1D { align1 1N }; +(+f0.0) jmpi(1) -32D { align1 WE_all 1N }; + +/* Store designated "clear GRF" value */ +mov(1) f0.1<1>UW g1.2<0,1,0>UW { align1 1N }; + +/* Initialize looping parameters */ +mov(1) a0<1>D 0D { align1 1N }; /* Initialize a0.0:w=0 */ +mov(1) a0.4<1>W 127W { align1 1N }; /* Loop count. Each loop contains 16 GRF's */ + +/* Write 32x16 all "0" block */ +mov(8) g2<1>UD g0<8,8,1>UD { align1 1Q }; +mov(8) g127<1>UD g0<8,8,1>UD { align1 1Q }; +mov(2) g2<1>UD g1<2,2,1>UW { align1 1N }; +mov(1) g2.2<1>UD 0x000f000fUD { align1 1N }; /* Block size (16x16) */ +and(1) g2.3<1>UD g2.3<0,1,0>UW 0xffffffefUD { align1 1N }; +mov(16) g3<1>UD 0x00000000UD { align1 1H }; +mov(16) g4<1>UD 0x00000000UD { align1 1H }; +mov(16) g5<1>UD 0x00000000UD { align1 1H }; +mov(16) g6<1>UD 0x00000000UD { align1 1H }; +mov(16) g7<1>UD 0x00000000UD { align1 1H }; +mov(16) g8<1>UD 0x00000000UD { align1 1H }; +mov(16) g9<1>UD 0x00000000UD { align1 1H }; +mov(16) g10<1>UD 0x00000000UD { align1 1H }; +sendc(8) null<1>UD g2<8,8,1>F 0x120a8000 + render MsgDesc: media block write MsgCtrl = 0x0 Surface = 0 mlen 9 rlen 0 { align1 1Q }; +add(1) g2<1>UD g1<0,1,0>UW 0x0010UW { align1 1N }; +sendc(8) null<1>UD g2<8,8,1>F 0x120a8000 + render MsgDesc: media block write MsgCtrl = 0x0 Surface = 0 mlen 9 rlen 0 { align1 1Q }; + +/* Now, clear all GRF registers */ +add.nz.f0.0(1) a0.4<1>W a0.4<0,1,0>W -1W { align1 1N }; +mov(16) g[a0]<1>UW f0.1<0,1,0>UW { align1 1H }; +add(1) a0<1>D a0<0,1,0>D 32D { align1 1N }; +(+f0.0) jmpi(1) -64D { align1 WE_all 1N }; + +/* Terminante the thread */ +sendc(8) null<1>UD g127<8,8,1>F 0x82000010 + thread_spawner MsgDesc: mlen 1 rlen 0 { align1 1Q EOT }; diff --git a/tools/assembly_source/ivb_clear_buf.asm b/tools/assembly_source/ivb_clear_buf.asm new file mode 100644 index 00000000..b21bc948 --- /dev/null +++ b/tools/assembly_source/ivb_clear_buf.asm @@ -0,0 +1,139 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2020 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + */ + +/** + * Kernel name: ivb_clear_buf.asm + * + * Kernel for PAVP buffer clear. + * + * 1. Clear all 64 GRF registers assigned to the kernel with designated value; + * 2. Write 32x16 block of all "0" to render target buffer which indirectly clears + * 512 bytes of Render Cache. + */ + +/* Store designated "clear GRF" value */ +mov(1) f0.1<1>UW g1.2<0,1,0>UW { align1 1N }; + +/** + * Curbe Format + * + * DW 1.0 - Block Offset to write Render Cache + * DW 1.1 [15:0] - Clear Word + * DW 1.2 - Delay iterations + * DW 1.3 - Enable Instrumentation (only for debug) + * DW 1.4 - Rsvd (intended for context ID) + * DW 1.5 - [31:16]:SliceCount, [15:0]:SubSlicePerSliceCount + * DW 1.6 - Rsvd MBZ (intended for Enable Wait on Total Thread Count) + * DW 1.7 - Rsvd MBZ (inteded for Total Thread Count) + * + * Binding Table + * + * BTI 0: 2D Surface to help clear L3 (Render/Data Cache) + * BTI 1: Wait/Instrumentation Buffer + * Size : (SliceCount * SubSliceCount * 16 EUs/SubSlice) rows * (16 threads/EU) cols (Format R32_UINT) + * Expected to be initialized to 0 by driver/another kernel + * Layout : + * RowN: Histogram for EU-N: (SliceID*SubSlicePerSliceCount + SSID)*16 + EUID [assume max 16 EUs / SS] + * Col-k[DW-k]: Threads Executed on ThreadID-k for EU-N + */ +add(1) g1.2<1>UD g1.2<0,1,0>UD 0x00000001UD { align1 1N }; /* Loop count to delay kernel: Init to (g1.2 + 1) */ +cmp.z.f0.0(1) null<1>UD g1.3<0,1,0>UD 0x00000000UD { align1 1N }; +(+f0.0) jmpi(1) 44D { align1 WE_all 1N }; + +/** + * State Register has info on where this thread is running + * IVB: sr0.0 :: [15:13]: MBZ, 12: HSID (Half-Slice ID), [11:8]EUID, [2:0] ThreadSlotID + * HSW: sr0.0 :: 15: MBZ, [14:13]: SliceID, 12: HSID (Half-Slice ID), [11:8]EUID, [2:0] ThreadSlotID + */ +mov(8) g3<1>UD 0x00000000UD { align1 1Q }; +shr(1) g3<1>D sr0<0,1,0>D 12D { align1 1N }; +and(1) g3<1>D g3<0,1,0>D 1D { align1 1N }; /* g3 has HSID */ +shr(1) g3.1<1>D sr0<0,1,0>D 13D { align1 1N }; +and(1) g3.1<1>D g3.1<0,1,0>D 3D { align1 1N }; /* g3.1 has sliceID */ +mul(1) g3.5<1>D g3.1<0,1,0>D g1.10<0,1,0>UW { align1 1N }; +add(1) g3<1>D g3<0,1,0>D g3.5<0,1,0>D { align1 1N }; /* g3 = sliceID * SubSlicePerSliceCount + HSID */ +shr(1) g3.2<1>D sr0<0,1,0>D 8D { align1 1N }; +and(1) g3.2<1>D g3.2<0,1,0>D 15D { align1 1N }; /* g3.2 = EUID */ +mul(1) g3.4<1>D g3<0,1,0>D 16D { align1 1N }; +add(1) g3.2<1>D g3.2<0,1,0>D g3.4<0,1,0>D { align1 1N }; /* g3.2 now points to EU row number (Y-pixel = V address ) in instrumentation surf */ + +mov(8) g5<1>UD 0x00000000UD { align1 1Q }; +and(1) g3.3<1>D sr0<0,1,0>D 7D { align1 1N }; +mul(1) g3.3<1>D g3.3<0,1,0>D 4D { align1 1N }; + +mov(8) g4<1>UD g0<8,8,1>UD { align1 1Q }; /* Initialize message header with g0 */ +mov(1) g4<1>UD g3.3<0,1,0>UD { align1 1N }; /* Block offset */ +mov(1) g4.1<1>UD g3.2<0,1,0>UD { align1 1N }; /* Block offset */ +mov(1) g4.2<1>UD 0x00000003UD { align1 1N }; /* Block size (1 row x 4 bytes) */ +and(1) g4.3<1>UD g4.3<0,1,0>UW 0xffffffffUD { align1 1N }; + +/* Media block read to fetch current value at specified location in instrumentation buffer */ +sendc(8) g5<1>UD g4<8,8,1>F 0x02190001 + render MsgDesc: media block read MsgCtrl = 0x0 Surface = 1 mlen 1 rlen 1 { align1 1Q }; +add(1) g5<1>D g5<0,1,0>D 1D { align1 1N }; + +/* Media block write for updated value at specified location in instrumentation buffer */ +sendc(8) g5<1>UD g4<8,8,1>F 0x040a8001 + render MsgDesc: media block write MsgCtrl = 0x0 Surface = 1 mlen 2 rlen 0 { align1 1Q }; +/* Delay thread for specified parameter */ +add.nz.f0.0(1) g1.2<1>UD g1.2<0,1,0>UD -1D { align1 1N }; +(+f0.0) jmpi(1) -4D { align1 WE_all 1N }; + +/* Store designated "clear GRF" value */ +mov(1) f0.1<1>UW g1.2<0,1,0>UW { align1 1N }; + +/* Initialize looping parameters */ +mov(1) a0<1>D 0D { align1 1N }; /* Initialize a0.0:w=0 */ +mov(1) a0.4<1>W 127W { align1 1N }; /* Loop count. Each loop contains 16 GRF's */ + +/* Write 32x16 all "0" block */ +mov(8) g2<1>UD g0<8,8,1>UD { align1 1Q }; +mov(8) g127<1>UD g0<8,8,1>UD { align1 1Q }; +mov(2) g2<1>UD g1<2,2,1>UW { align1 1N }; +mov(1) g2.2<1>UD 0x000f000fUD { align1 1N }; /* Block size (16x16) */ +and(1) g2.3<1>UD g2.3<0,1,0>UW 0xffffffefUD { align1 1N }; +mov(16) g3<1>UD 0x00000000UD { align1 1H }; +mov(16) g4<1>UD 0x00000000UD { align1 1H }; +mov(16) g5<1>UD 0x00000000UD { align1 1H }; +mov(16) g6<1>UD 0x00000000UD { align1 1H }; +mov(16) g7<1>UD 0x00000000UD { align1 1H }; +mov(16) g8<1>UD 0x00000000UD { align1 1H }; +mov(16) g9<1>UD 0x00000000UD { align1 1H }; +mov(16) g10<1>UD 0x00000000UD { align1 1H }; +sendc(8) null<1>UD g2<8,8,1>F 0x120a8000 + render MsgDesc: media block write MsgCtrl = 0x0 Surface = 0 mlen 9 rlen 0 { align1 1Q }; +add(1) g2<1>UD g1<0,1,0>UW 0x0010UW { align1 1N }; +sendc(8) null<1>UD g2<8,8,1>F 0x120a8000 + render MsgDesc: media block write MsgCtrl = 0x0 Surface = 0 mlen 9 rlen 0 { align1 1Q }; + +/* Now, clear all GRF registers */ +add.nz.f0.0(1) a0.4<1>W a0.4<0,1,0>W -1W { align1 1N }; +mov(16) g[a0]<1>UW f0.1<0,1,0>UW { align1 1H }; +add(1) a0<1>D a0<0,1,0>D 32D { align1 1N }; +(+f0.0) jmpi(1) -8D { align1 WE_all 1N }; + +/* Terminante the thread */ +sendc(8) null<1>UD g127<8,8,1>F 0x82000010 + thread_spawner MsgDesc: mlen 1 rlen 0 { align1 1Q EOT }; -- 2.20.1 _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v4 1/1] tools/generate_cb_buffer: Add script to assemble CB kernel 2020-02-21 8:22 ` [igt-dev] [PATCH i-g-t v4 1/1] tools/generate_cb_buffer: Add script to assemble CB kernel Akeem G Abodunrin @ 2020-02-24 9:48 ` Petri Latvala 2020-02-24 13:47 ` Ville Syrjälä 2020-02-24 19:38 ` Abodunrin, Akeem G 0 siblings, 2 replies; 11+ messages in thread From: Petri Latvala @ 2020-02-24 9:48 UTC (permalink / raw) To: Akeem G Abodunrin Cc: jani.nikula, chris.p.wilson, igt-dev, jon.bloomfield, daniel.vetter, mika.kuoppala On Fri, Feb 21, 2020 at 12:22:43AM -0800, Akeem G Abodunrin wrote: > This patch adds script and applicable assembly sources, so that we can use > igt to assemble Clear Batch Buffer kernel for gen7 and gen7.5 devices - > Resultant header files would be imported to i915, and used as they are... > > With this patch, user need to have mesa configured on their platform, > before igt could be used to achieve the purpose of assembling the kernel > from source. > > This is needed for "Security mitigation for Intel Gen7/7.5 HWs" > Intel ID: PSIRT-TA-201910-001/CVEID: CVE-2019-14615 > > v2: Addressed formatting, -g option and other minor issues (Petri) > V3: Update script due to suggested changes in i915, and Mesa tool > v4: Update help comment with Mesa build option with meson (Petri) > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Cc: Jani Nikula <jani.nikula@intel.com> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> > Cc: Petri Latvala <petri.latvala@intel.com> > Cc: Bloomfield Jon <jon.bloomfield@intel.com> > Signed-off-by: Akeem G Abodunrin <akeem.g.abodunrin@intel.com> > --- > scripts/asm_eu_kernel.sh | 153 ++++++++++++++++++++++++ > tools/assembly_source/hsw_clear_buf.asm | 141 ++++++++++++++++++++++ > tools/assembly_source/ivb_clear_buf.asm | 139 +++++++++++++++++++++ > 3 files changed, 433 insertions(+) > create mode 100755 scripts/asm_eu_kernel.sh > create mode 100644 tools/assembly_source/hsw_clear_buf.asm > create mode 100644 tools/assembly_source/ivb_clear_buf.asm > > diff --git a/scripts/asm_eu_kernel.sh b/scripts/asm_eu_kernel.sh > new file mode 100755 > index 00000000..1958829c > --- /dev/null > +++ b/scripts/asm_eu_kernel.sh > @@ -0,0 +1,153 @@ > +#!/bin/bash > +# > +# SPDX-License-Identifier: MIT > +# > +# Copyright © 2020 Intel Corporation > +# > +# Permission is hereby granted, free of charge, to any person obtaining a > +# copy of this software and associated documentation files (the "Software"), > +# to deal in the Software without restriction, including without limitation > +# the rights to use, copy, modify, merge, publish, distribute, sublicense, > +# and/or sell copies of the Software, and to permit persons to whom the > +# Software is furnished to do so, subject to the following conditions: > +# > +# The above copyright notice and this permission notice (including the next > +# paragraph) shall be included in all copies or substantial portions of the > +# Software. > +# > +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR > +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, > +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL > +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER > +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING > +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS > +# IN THE SOFTWARE. > + > +export ASSEMBLY_SOURCE=./tools/assembly_source > + > +function get_help { > + echo "Usage: asm_eu_kernel.sh [options]" > + echo "Note: hsw_clear_kernel.c/ivb_clear_kernel.c automatically generated by this script should never be modified - it would be imported to i915, to use as it is..." > + echo " " > + echo "Please make sure your Mesa tool is compiled with "-Dtools=intel" and "-Ddri-drivers=i965", and run this script from IGT source root directory" > + echo " " > + echo "Options are:" > + echo " -h display this help message, and exit" > + echo " -g=platform generation of device: use "hsw" for gen7.5, and "ivb" for gen7 devices" > + echo " -o=name_of_file output file to store Mesa assembled c-literal for the device - If none specified, default file will be used - ivb/hsw-cb_assembled" > + echo " -m=mesa Mesa source directory" > + echo " " > + echo " Usage example: \"scripts/asm_eu_kernel.sh -g hsw -o hsw_clear_buffer.h -m /path/to/Mesa/source/directory\"" > +} > + > +function include_array # $1=array_name > +{ > + echo "static const u32 $(basename $1)_clear_kernel[] = {" > +} > +function prefix_header # $1=filename $2=comment > +{ > + array_name=$(include_array $1) > + > + cat <<EOF > +// SPDX-License-Identifier: MIT > +/* > + * Copyright © 2020 Intel Corporation > + * > + * Generated by: IGT Gpu Tools on $(date) > + */ > + > +$array_name > +EOF > +} > + > +function postfix_footer # filename > +{ > + cat <<EOF > +}; > +EOF > +} > + > +function check_output_file #check output file > +{ > + if [ "x$output_file" != "x" ]; then > + if [ -f "$output_file" ]; then > + echo -e "Warning: The \"$output_file\" file already exist - choose another file\n" > + get_help > + exit 1 > + fi > + else > + # It is okay to overwrite default file created > + echo -e "Output file not specified - using default file \"$gen_device-cb_assembled\"\n" > + output_file="$gen_device-cb_assembled" > + fi > +} > +function asm_cb_kernel # as-root <args> > +{ > + check_output_file > + > + # Using i965_asm tool to assemble hex file from assembly source > + $I965_ASM -g $gen_device -t c_literal $input_asm_source -o $output_file > + > + # Generate header file > + if [ "$gen_device" == "hsw" ]; then > + echo "Generating gen7.5 CB Kernel assembled file \"hsw_clear_kernel.c\" for i915 driver..." > + > + i915_filename=hsw_clear_kernel.c > + prefix_header $gen_device > $i915_filename > + cat $output_file >> $i915_filename > + postfix_footer $i915_filename >> $i915_filename > + > + elif [ "$gen_device" == "ivb" ]; then > + echo "Generating gen7 CB Kernel assembled file \"ivb_clear_kernel.c\" for i915 driver..." > + > + i915_filename=ivb_clear_kernel.c > + prefix_header $gen_device > $i915_filename > + cat $output_file >> $i915_filename > + postfix_footer $i915_filename >> $i915_filename > + fi > +} > + > +while getopts "hg:o:m:" opt; do > + case $opt in > + h) get_help; exit 0;; > + g) gen_device="$OPTARG" ;; > + o) output_file="$OPTARG" ;; > + m) mesa_dir="$OPTARG" ;; > + \?) > + echo -e "Unknown option: -$OPTARG\n" > + get_help > + exit 1 > + ;; > + esac > +done > +shift $(($OPTIND-1)) > + > +if [ "x$1" != "x" ]; then > + echo -e "Unknown option: $1\n" > + get_help > + exit 1 > +fi > + > +I965_ASM="$mesa_dir/build/debug/src/intel/tools/i965_asm" Should this be $mesa_dir/build/src/intel/tools/i965_asm instead? After changing that I get # scripts/asm_eu_kernel.sh -m ~/src/mesa -ghsw Output file not specified - using default file "hsw-cb_assembled" ./tools/assembly_source/hsw_clear_buf.asm: 71: syntax error at "<" Generating gen7.5 CB Kernel assembled file "hsw_clear_kernel.c" for i915 driver... And then 'hsw-cb_assembled' is an empty file, 'hsw_clear_kernel.c' contains an empty array but the script exited with success... Line 71 in the asm is shr(1) g3<1>D sr0<0,1,0>D 12D { align1 1N }; -- Petri Latvala _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v4 1/1] tools/generate_cb_buffer: Add script to assemble CB kernel 2020-02-24 9:48 ` Petri Latvala @ 2020-02-24 13:47 ` Ville Syrjälä 2020-02-24 18:47 ` Abodunrin, Akeem G 2020-02-25 9:12 ` Petri Latvala 2020-02-24 19:38 ` Abodunrin, Akeem G 1 sibling, 2 replies; 11+ messages in thread From: Ville Syrjälä @ 2020-02-24 13:47 UTC (permalink / raw) To: Petri Latvala Cc: jani.nikula, chris.p.wilson, igt-dev, jon.bloomfield, daniel.vetter, mika.kuoppala On Mon, Feb 24, 2020 at 11:48:08AM +0200, Petri Latvala wrote: > On Fri, Feb 21, 2020 at 12:22:43AM -0800, Akeem G Abodunrin wrote: > > This patch adds script and applicable assembly sources, so that we can use > > igt to assemble Clear Batch Buffer kernel for gen7 and gen7.5 devices - > > Resultant header files would be imported to i915, and used as they are... > > > > With this patch, user need to have mesa configured on their platform, > > before igt could be used to achieve the purpose of assembling the kernel > > from source. > > > > This is needed for "Security mitigation for Intel Gen7/7.5 HWs" > > Intel ID: PSIRT-TA-201910-001/CVEID: CVE-2019-14615 > > > > v2: Addressed formatting, -g option and other minor issues (Petri) > > V3: Update script due to suggested changes in i915, and Mesa tool > > v4: Update help comment with Mesa build option with meson (Petri) > > > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Cc: Jani Nikula <jani.nikula@intel.com> > > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> > > Cc: Petri Latvala <petri.latvala@intel.com> > > Cc: Bloomfield Jon <jon.bloomfield@intel.com> > > Signed-off-by: Akeem G Abodunrin <akeem.g.abodunrin@intel.com> > > --- > > scripts/asm_eu_kernel.sh | 153 ++++++++++++++++++++++++ > > tools/assembly_source/hsw_clear_buf.asm | 141 ++++++++++++++++++++++ > > tools/assembly_source/ivb_clear_buf.asm | 139 +++++++++++++++++++++ > > 3 files changed, 433 insertions(+) > > create mode 100755 scripts/asm_eu_kernel.sh > > create mode 100644 tools/assembly_source/hsw_clear_buf.asm > > create mode 100644 tools/assembly_source/ivb_clear_buf.asm > > > > diff --git a/scripts/asm_eu_kernel.sh b/scripts/asm_eu_kernel.sh > > new file mode 100755 > > index 00000000..1958829c > > --- /dev/null > > +++ b/scripts/asm_eu_kernel.sh > > @@ -0,0 +1,153 @@ > > +#!/bin/bash > > +# > > +# SPDX-License-Identifier: MIT > > +# > > +# Copyright © 2020 Intel Corporation > > +# > > +# Permission is hereby granted, free of charge, to any person obtaining a > > +# copy of this software and associated documentation files (the "Software"), > > +# to deal in the Software without restriction, including without limitation > > +# the rights to use, copy, modify, merge, publish, distribute, sublicense, > > +# and/or sell copies of the Software, and to permit persons to whom the > > +# Software is furnished to do so, subject to the following conditions: > > +# > > +# The above copyright notice and this permission notice (including the next > > +# paragraph) shall be included in all copies or substantial portions of the > > +# Software. > > +# > > +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR > > +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, > > +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL > > +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER > > +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING > > +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS > > +# IN THE SOFTWARE. > > + > > +export ASSEMBLY_SOURCE=./tools/assembly_source > > + > > +function get_help { > > + echo "Usage: asm_eu_kernel.sh [options]" > > + echo "Note: hsw_clear_kernel.c/ivb_clear_kernel.c automatically generated by this script should never be modified - it would be imported to i915, to use as it is..." > > + echo " " > > + echo "Please make sure your Mesa tool is compiled with "-Dtools=intel" and "-Ddri-drivers=i965", and run this script from IGT source root directory" > > + echo " " > > + echo "Options are:" > > + echo " -h display this help message, and exit" > > + echo " -g=platform generation of device: use "hsw" for gen7.5, and "ivb" for gen7 devices" > > + echo " -o=name_of_file output file to store Mesa assembled c-literal for the device - If none specified, default file will be used - ivb/hsw-cb_assembled" > > + echo " -m=mesa Mesa source directory" > > + echo " " > > + echo " Usage example: \"scripts/asm_eu_kernel.sh -g hsw -o hsw_clear_buffer.h -m /path/to/Mesa/source/directory\"" > > +} > > + > > +function include_array # $1=array_name > > +{ > > + echo "static const u32 $(basename $1)_clear_kernel[] = {" > > +} > > +function prefix_header # $1=filename $2=comment > > +{ > > + array_name=$(include_array $1) > > + > > + cat <<EOF > > +// SPDX-License-Identifier: MIT > > +/* > > + * Copyright © 2020 Intel Corporation > > + * > > + * Generated by: IGT Gpu Tools on $(date) > > + */ > > + > > +$array_name > > +EOF > > +} > > + > > +function postfix_footer # filename > > +{ > > + cat <<EOF > > +}; > > +EOF > > +} > > + > > +function check_output_file #check output file > > +{ > > + if [ "x$output_file" != "x" ]; then > > + if [ -f "$output_file" ]; then > > + echo -e "Warning: The \"$output_file\" file already exist - choose another file\n" > > + get_help > > + exit 1 > > + fi > > + else > > + # It is okay to overwrite default file created > > + echo -e "Output file not specified - using default file \"$gen_device-cb_assembled\"\n" > > + output_file="$gen_device-cb_assembled" > > + fi > > +} > > +function asm_cb_kernel # as-root <args> > > +{ > > + check_output_file > > + > > + # Using i965_asm tool to assemble hex file from assembly source > > + $I965_ASM -g $gen_device -t c_literal $input_asm_source -o $output_file > > + > > + # Generate header file > > + if [ "$gen_device" == "hsw" ]; then > > + echo "Generating gen7.5 CB Kernel assembled file \"hsw_clear_kernel.c\" for i915 driver..." > > + > > + i915_filename=hsw_clear_kernel.c > > + prefix_header $gen_device > $i915_filename > > + cat $output_file >> $i915_filename > > + postfix_footer $i915_filename >> $i915_filename > > + > > + elif [ "$gen_device" == "ivb" ]; then > > + echo "Generating gen7 CB Kernel assembled file \"ivb_clear_kernel.c\" for i915 driver..." > > + > > + i915_filename=ivb_clear_kernel.c > > + prefix_header $gen_device > $i915_filename > > + cat $output_file >> $i915_filename > > + postfix_footer $i915_filename >> $i915_filename > > + fi > > +} > > + > > +while getopts "hg:o:m:" opt; do > > + case $opt in > > + h) get_help; exit 0;; > > + g) gen_device="$OPTARG" ;; > > + o) output_file="$OPTARG" ;; > > + m) mesa_dir="$OPTARG" ;; > > + \?) > > + echo -e "Unknown option: -$OPTARG\n" > > + get_help > > + exit 1 > > + ;; > > + esac > > +done > > +shift $(($OPTIND-1)) > > + > > +if [ "x$1" != "x" ]; then > > + echo -e "Unknown option: $1\n" > > + get_help > > + exit 1 > > +fi > > + > > +I965_ASM="$mesa_dir/build/debug/src/intel/tools/i965_asm" > > Should this be $mesa_dir/build/src/intel/tools/i965_asm instead? Both assume the user specied the build directly exactly like so when building Mesa. We should probably ask the user to point at either the binary itself or the build directory. -- Ville Syrjälä Intel _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v4 1/1] tools/generate_cb_buffer: Add script to assemble CB kernel 2020-02-24 13:47 ` Ville Syrjälä @ 2020-02-24 18:47 ` Abodunrin, Akeem G 2020-02-25 9:12 ` Petri Latvala 1 sibling, 0 replies; 11+ messages in thread From: Abodunrin, Akeem G @ 2020-02-24 18:47 UTC (permalink / raw) To: Ville Syrjälä, Latvala, Petri Cc: Nikula, Jani, Wilson, Chris P, igt-dev@lists.freedesktop.org, Bloomfield, Jon, Vetter, Daniel, Kuoppala, Mika > On Mon, Feb 24, 2020 at 11:48:08AM +0200, Petri Latvala wrote: > > On Fri, Feb 21, 2020 at 12:22:43AM -0800, Akeem G Abodunrin wrote: > > > This patch adds script and applicable assembly sources, so that we > > > can use igt to assemble Clear Batch Buffer kernel for gen7 and > > > gen7.5 devices - Resultant header files would be imported to i915, and > used as they are... > > > > > > With this patch, user need to have mesa configured on their > > > platform, before igt could be used to achieve the purpose of > > > assembling the kernel from source. > > > > > > This is needed for "Security mitigation for Intel Gen7/7.5 HWs" > > > Intel ID: PSIRT-TA-201910-001/CVEID: CVE-2019-14615 > > > > > > v2: Addressed formatting, -g option and other minor issues (Petri) > > > V3: Update script due to suggested changes in i915, and Mesa tool > > > v4: Update help comment with Mesa build option with meson (Petri) > > > > > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > > > Cc: Jani Nikula <jani.nikula@intel.com> > > > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> > > > Cc: Petri Latvala <petri.latvala@intel.com> > > > Cc: Bloomfield Jon <jon.bloomfield@intel.com> > > > Signed-off-by: Akeem G Abodunrin <akeem.g.abodunrin@intel.com> > > > --- > > > scripts/asm_eu_kernel.sh | 153 ++++++++++++++++++++++++ > > > tools/assembly_source/hsw_clear_buf.asm | 141 > > > ++++++++++++++++++++++ tools/assembly_source/ivb_clear_buf.asm | > > > 139 +++++++++++++++++++++ > > > 3 files changed, 433 insertions(+) > > > create mode 100755 scripts/asm_eu_kernel.sh create mode 100644 > > > tools/assembly_source/hsw_clear_buf.asm > > > create mode 100644 tools/assembly_source/ivb_clear_buf.asm > > > > > > diff --git a/scripts/asm_eu_kernel.sh b/scripts/asm_eu_kernel.sh new > > > file mode 100755 index 00000000..1958829c > > > --- /dev/null > > > +++ b/scripts/asm_eu_kernel.sh > > > @@ -0,0 +1,153 @@ > > > +#!/bin/bash > > > +# > > > +# SPDX-License-Identifier: MIT > > > +# > > > +# Copyright © 2020 Intel Corporation # # Permission is hereby > > > +granted, free of charge, to any person obtaining a # copy of this > > > +software and associated documentation files (the "Software"), # to > > > +deal in the Software without restriction, including without > > > +limitation # the rights to use, copy, modify, merge, publish, > > > +distribute, sublicense, # and/or sell copies of the Software, and > > > +to permit persons to whom the # Software is furnished to do so, subject > to the following conditions: > > > +# > > > +# The above copyright notice and this permission notice (including > > > +the next # paragraph) shall be included in all copies or > > > +substantial portions of the # Software. > > > +# > > > +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY > KIND, > > > +EXPRESS OR # IMPLIED, INCLUDING BUT NOT LIMITED TO THE > WARRANTIES > > > +OF MERCHANTABILITY, # FITNESS FOR A PARTICULAR PURPOSE AND > > > +NONINFRINGEMENT. IN NO EVENT SHALL # THE AUTHORS OR > COPYRIGHT > > > +HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER # LIABILITY, > > > +WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING > # > > > +FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE > OR OTHER DEALINGS # IN THE SOFTWARE. > > > + > > > +export ASSEMBLY_SOURCE=./tools/assembly_source > > > + > > > +function get_help { > > > + echo "Usage: asm_eu_kernel.sh [options]" > > > + echo "Note: hsw_clear_kernel.c/ivb_clear_kernel.c automatically > generated by this script should never be modified - it would be imported to > i915, to use as it is..." > > > + echo " " > > > + echo "Please make sure your Mesa tool is compiled with "- > Dtools=intel" and "-Ddri-drivers=i965", and run this script from IGT source > root directory" > > > + echo " " > > > + echo "Options are:" > > > + echo " -h display this help message, and exit" > > > + echo " -g=platform generation of device: use "hsw" for > gen7.5, and "ivb" for gen7 devices" > > > + echo " -o=name_of_file output file to store Mesa assembled c- > literal for the device - If none specified, default file will be used - ivb/hsw- > cb_assembled" > > > + echo " -m=mesa Mesa source directory" As pointed out here, user only specify Mesa source directory... > > > + esac > > > +done > > > +shift $(($OPTIND-1)) > > > + > > > +if [ "x$1" != "x" ]; then > > > + echo -e "Unknown option: $1\n" > > > + get_help > > > + exit 1 > > > +fi > > > + > > > +I965_ASM="$mesa_dir/build/debug/src/intel/tools/i965_asm" > > > > Should this be $mesa_dir/build/src/intel/tools/i965_asm instead? > Both assume the user specied the build directly exactly like so when building > Mesa. We should probably ask the user to point at either the binary itself or > the build directory. Yes, we could do that - but that would be a long "complex" command line option for the script 😊 May be we can check for various options where binary could be in the script - I don't know how many other build options Mesa has, but we know that this is common " src/intel/tools/i965_asm", what precedes that is the optional part now. That being said, we can always update this script, especially if anything changes in Mesa - but since this address security issue, I honestly don't know how long we can afford to delay this, and other related patches. Thanks, ~Akeem _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v4 1/1] tools/generate_cb_buffer: Add script to assemble CB kernel 2020-02-24 13:47 ` Ville Syrjälä 2020-02-24 18:47 ` Abodunrin, Akeem G @ 2020-02-25 9:12 ` Petri Latvala 2020-02-25 11:27 ` Ville Syrjälä 1 sibling, 1 reply; 11+ messages in thread From: Petri Latvala @ 2020-02-25 9:12 UTC (permalink / raw) To: Ville Syrjälä Cc: jani.nikula, chris.p.wilson, igt-dev, jon.bloomfield, daniel.vetter, mika.kuoppala On Mon, Feb 24, 2020 at 03:47:58PM +0200, Ville Syrjälä wrote: > On Mon, Feb 24, 2020 at 11:48:08AM +0200, Petri Latvala wrote: > > On Fri, Feb 21, 2020 at 12:22:43AM -0800, Akeem G Abodunrin wrote: > > > This patch adds script and applicable assembly sources, so that we can use > > > igt to assemble Clear Batch Buffer kernel for gen7 and gen7.5 devices - > > > Resultant header files would be imported to i915, and used as they are... > > > > > > With this patch, user need to have mesa configured on their platform, > > > before igt could be used to achieve the purpose of assembling the kernel > > > from source. > > > > > > This is needed for "Security mitigation for Intel Gen7/7.5 HWs" > > > Intel ID: PSIRT-TA-201910-001/CVEID: CVE-2019-14615 > > > > > > v2: Addressed formatting, -g option and other minor issues (Petri) > > > V3: Update script due to suggested changes in i915, and Mesa tool > > > v4: Update help comment with Mesa build option with meson (Petri) > > > > > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > > > Cc: Jani Nikula <jani.nikula@intel.com> > > > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> > > > Cc: Petri Latvala <petri.latvala@intel.com> > > > Cc: Bloomfield Jon <jon.bloomfield@intel.com> > > > Signed-off-by: Akeem G Abodunrin <akeem.g.abodunrin@intel.com> > > > --- > > > scripts/asm_eu_kernel.sh | 153 ++++++++++++++++++++++++ > > > tools/assembly_source/hsw_clear_buf.asm | 141 ++++++++++++++++++++++ > > > tools/assembly_source/ivb_clear_buf.asm | 139 +++++++++++++++++++++ > > > 3 files changed, 433 insertions(+) > > > create mode 100755 scripts/asm_eu_kernel.sh > > > create mode 100644 tools/assembly_source/hsw_clear_buf.asm > > > create mode 100644 tools/assembly_source/ivb_clear_buf.asm > > > > > > diff --git a/scripts/asm_eu_kernel.sh b/scripts/asm_eu_kernel.sh > > > new file mode 100755 > > > index 00000000..1958829c > > > --- /dev/null > > > +++ b/scripts/asm_eu_kernel.sh > > > @@ -0,0 +1,153 @@ > > > +#!/bin/bash > > > +# > > > +# SPDX-License-Identifier: MIT > > > +# > > > +# Copyright © 2020 Intel Corporation > > > +# > > > +# Permission is hereby granted, free of charge, to any person obtaining a > > > +# copy of this software and associated documentation files (the "Software"), > > > +# to deal in the Software without restriction, including without limitation > > > +# the rights to use, copy, modify, merge, publish, distribute, sublicense, > > > +# and/or sell copies of the Software, and to permit persons to whom the > > > +# Software is furnished to do so, subject to the following conditions: > > > +# > > > +# The above copyright notice and this permission notice (including the next > > > +# paragraph) shall be included in all copies or substantial portions of the > > > +# Software. > > > +# > > > +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR > > > +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, > > > +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL > > > +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER > > > +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING > > > +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS > > > +# IN THE SOFTWARE. > > > + > > > +export ASSEMBLY_SOURCE=./tools/assembly_source > > > + > > > +function get_help { > > > + echo "Usage: asm_eu_kernel.sh [options]" > > > + echo "Note: hsw_clear_kernel.c/ivb_clear_kernel.c automatically generated by this script should never be modified - it would be imported to i915, to use as it is..." > > > + echo " " > > > + echo "Please make sure your Mesa tool is compiled with "-Dtools=intel" and "-Ddri-drivers=i965", and run this script from IGT source root directory" > > > + echo " " > > > + echo "Options are:" > > > + echo " -h display this help message, and exit" > > > + echo " -g=platform generation of device: use "hsw" for gen7.5, and "ivb" for gen7 devices" > > > + echo " -o=name_of_file output file to store Mesa assembled c-literal for the device - If none specified, default file will be used - ivb/hsw-cb_assembled" > > > + echo " -m=mesa Mesa source directory" > > > + echo " " > > > + echo " Usage example: \"scripts/asm_eu_kernel.sh -g hsw -o hsw_clear_buffer.h -m /path/to/Mesa/source/directory\"" > > > +} > > > + > > > +function include_array # $1=array_name > > > +{ > > > + echo "static const u32 $(basename $1)_clear_kernel[] = {" > > > +} > > > +function prefix_header # $1=filename $2=comment > > > +{ > > > + array_name=$(include_array $1) > > > + > > > + cat <<EOF > > > +// SPDX-License-Identifier: MIT > > > +/* > > > + * Copyright © 2020 Intel Corporation > > > + * > > > + * Generated by: IGT Gpu Tools on $(date) > > > + */ > > > + > > > +$array_name > > > +EOF > > > +} > > > + > > > +function postfix_footer # filename > > > +{ > > > + cat <<EOF > > > +}; > > > +EOF > > > +} > > > + > > > +function check_output_file #check output file > > > +{ > > > + if [ "x$output_file" != "x" ]; then > > > + if [ -f "$output_file" ]; then > > > + echo -e "Warning: The \"$output_file\" file already exist - choose another file\n" > > > + get_help > > > + exit 1 > > > + fi > > > + else > > > + # It is okay to overwrite default file created > > > + echo -e "Output file not specified - using default file \"$gen_device-cb_assembled\"\n" > > > + output_file="$gen_device-cb_assembled" > > > + fi > > > +} > > > +function asm_cb_kernel # as-root <args> > > > +{ > > > + check_output_file > > > + > > > + # Using i965_asm tool to assemble hex file from assembly source > > > + $I965_ASM -g $gen_device -t c_literal $input_asm_source -o $output_file > > > + > > > + # Generate header file > > > + if [ "$gen_device" == "hsw" ]; then > > > + echo "Generating gen7.5 CB Kernel assembled file \"hsw_clear_kernel.c\" for i915 driver..." > > > + > > > + i915_filename=hsw_clear_kernel.c > > > + prefix_header $gen_device > $i915_filename > > > + cat $output_file >> $i915_filename > > > + postfix_footer $i915_filename >> $i915_filename > > > + > > > + elif [ "$gen_device" == "ivb" ]; then > > > + echo "Generating gen7 CB Kernel assembled file \"ivb_clear_kernel.c\" for i915 driver..." > > > + > > > + i915_filename=ivb_clear_kernel.c > > > + prefix_header $gen_device > $i915_filename > > > + cat $output_file >> $i915_filename > > > + postfix_footer $i915_filename >> $i915_filename > > > + fi > > > +} > > > + > > > +while getopts "hg:o:m:" opt; do > > > + case $opt in > > > + h) get_help; exit 0;; > > > + g) gen_device="$OPTARG" ;; > > > + o) output_file="$OPTARG" ;; > > > + m) mesa_dir="$OPTARG" ;; > > > + \?) > > > + echo -e "Unknown option: -$OPTARG\n" > > > + get_help > > > + exit 1 > > > + ;; > > > + esac > > > +done > > > +shift $(($OPTIND-1)) > > > + > > > +if [ "x$1" != "x" ]; then > > > + echo -e "Unknown option: $1\n" > > > + get_help > > > + exit 1 > > > +fi > > > + > > > +I965_ASM="$mesa_dir/build/debug/src/intel/tools/i965_asm" > > > > Should this be $mesa_dir/build/src/intel/tools/i965_asm instead? > > Both assume the user specied the build directly exactly like so > when building Mesa. We should probably ask the user to point at > either the binary itself or the build directory. We could just say "assuming build directory name is 'build'", Mesa's build instructions recommend that. -- Petri Latvala _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v4 1/1] tools/generate_cb_buffer: Add script to assemble CB kernel 2020-02-25 9:12 ` Petri Latvala @ 2020-02-25 11:27 ` Ville Syrjälä 0 siblings, 0 replies; 11+ messages in thread From: Ville Syrjälä @ 2020-02-25 11:27 UTC (permalink / raw) To: Petri Latvala Cc: jani.nikula, chris.p.wilson, igt-dev, jon.bloomfield, daniel.vetter, mika.kuoppala On Tue, Feb 25, 2020 at 11:12:04AM +0200, Petri Latvala wrote: > On Mon, Feb 24, 2020 at 03:47:58PM +0200, Ville Syrjälä wrote: > > On Mon, Feb 24, 2020 at 11:48:08AM +0200, Petri Latvala wrote: > > > On Fri, Feb 21, 2020 at 12:22:43AM -0800, Akeem G Abodunrin wrote: > > > > This patch adds script and applicable assembly sources, so that we can use > > > > igt to assemble Clear Batch Buffer kernel for gen7 and gen7.5 devices - > > > > Resultant header files would be imported to i915, and used as they are... > > > > > > > > With this patch, user need to have mesa configured on their platform, > > > > before igt could be used to achieve the purpose of assembling the kernel > > > > from source. > > > > > > > > This is needed for "Security mitigation for Intel Gen7/7.5 HWs" > > > > Intel ID: PSIRT-TA-201910-001/CVEID: CVE-2019-14615 > > > > > > > > v2: Addressed formatting, -g option and other minor issues (Petri) > > > > V3: Update script due to suggested changes in i915, and Mesa tool > > > > v4: Update help comment with Mesa build option with meson (Petri) > > > > > > > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > > > > Cc: Jani Nikula <jani.nikula@intel.com> > > > > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> > > > > Cc: Petri Latvala <petri.latvala@intel.com> > > > > Cc: Bloomfield Jon <jon.bloomfield@intel.com> > > > > Signed-off-by: Akeem G Abodunrin <akeem.g.abodunrin@intel.com> > > > > --- > > > > scripts/asm_eu_kernel.sh | 153 ++++++++++++++++++++++++ > > > > tools/assembly_source/hsw_clear_buf.asm | 141 ++++++++++++++++++++++ > > > > tools/assembly_source/ivb_clear_buf.asm | 139 +++++++++++++++++++++ > > > > 3 files changed, 433 insertions(+) > > > > create mode 100755 scripts/asm_eu_kernel.sh > > > > create mode 100644 tools/assembly_source/hsw_clear_buf.asm > > > > create mode 100644 tools/assembly_source/ivb_clear_buf.asm > > > > > > > > diff --git a/scripts/asm_eu_kernel.sh b/scripts/asm_eu_kernel.sh > > > > new file mode 100755 > > > > index 00000000..1958829c > > > > --- /dev/null > > > > +++ b/scripts/asm_eu_kernel.sh > > > > @@ -0,0 +1,153 @@ > > > > +#!/bin/bash > > > > +# > > > > +# SPDX-License-Identifier: MIT > > > > +# > > > > +# Copyright © 2020 Intel Corporation > > > > +# > > > > +# Permission is hereby granted, free of charge, to any person obtaining a > > > > +# copy of this software and associated documentation files (the "Software"), > > > > +# to deal in the Software without restriction, including without limitation > > > > +# the rights to use, copy, modify, merge, publish, distribute, sublicense, > > > > +# and/or sell copies of the Software, and to permit persons to whom the > > > > +# Software is furnished to do so, subject to the following conditions: > > > > +# > > > > +# The above copyright notice and this permission notice (including the next > > > > +# paragraph) shall be included in all copies or substantial portions of the > > > > +# Software. > > > > +# > > > > +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR > > > > +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, > > > > +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL > > > > +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER > > > > +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING > > > > +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS > > > > +# IN THE SOFTWARE. > > > > + > > > > +export ASSEMBLY_SOURCE=./tools/assembly_source > > > > + > > > > +function get_help { > > > > + echo "Usage: asm_eu_kernel.sh [options]" > > > > + echo "Note: hsw_clear_kernel.c/ivb_clear_kernel.c automatically generated by this script should never be modified - it would be imported to i915, to use as it is..." > > > > + echo " " > > > > + echo "Please make sure your Mesa tool is compiled with "-Dtools=intel" and "-Ddri-drivers=i965", and run this script from IGT source root directory" > > > > + echo " " > > > > + echo "Options are:" > > > > + echo " -h display this help message, and exit" > > > > + echo " -g=platform generation of device: use "hsw" for gen7.5, and "ivb" for gen7 devices" > > > > + echo " -o=name_of_file output file to store Mesa assembled c-literal for the device - If none specified, default file will be used - ivb/hsw-cb_assembled" > > > > + echo " -m=mesa Mesa source directory" > > > > + echo " " > > > > + echo " Usage example: \"scripts/asm_eu_kernel.sh -g hsw -o hsw_clear_buffer.h -m /path/to/Mesa/source/directory\"" > > > > +} > > > > + > > > > +function include_array # $1=array_name > > > > +{ > > > > + echo "static const u32 $(basename $1)_clear_kernel[] = {" > > > > +} > > > > +function prefix_header # $1=filename $2=comment > > > > +{ > > > > + array_name=$(include_array $1) > > > > + > > > > + cat <<EOF > > > > +// SPDX-License-Identifier: MIT > > > > +/* > > > > + * Copyright © 2020 Intel Corporation > > > > + * > > > > + * Generated by: IGT Gpu Tools on $(date) > > > > + */ > > > > + > > > > +$array_name > > > > +EOF > > > > +} > > > > + > > > > +function postfix_footer # filename > > > > +{ > > > > + cat <<EOF > > > > +}; > > > > +EOF > > > > +} > > > > + > > > > +function check_output_file #check output file > > > > +{ > > > > + if [ "x$output_file" != "x" ]; then > > > > + if [ -f "$output_file" ]; then > > > > + echo -e "Warning: The \"$output_file\" file already exist - choose another file\n" > > > > + get_help > > > > + exit 1 > > > > + fi > > > > + else > > > > + # It is okay to overwrite default file created > > > > + echo -e "Output file not specified - using default file \"$gen_device-cb_assembled\"\n" > > > > + output_file="$gen_device-cb_assembled" > > > > + fi > > > > +} > > > > +function asm_cb_kernel # as-root <args> > > > > +{ > > > > + check_output_file > > > > + > > > > + # Using i965_asm tool to assemble hex file from assembly source > > > > + $I965_ASM -g $gen_device -t c_literal $input_asm_source -o $output_file > > > > + > > > > + # Generate header file > > > > + if [ "$gen_device" == "hsw" ]; then > > > > + echo "Generating gen7.5 CB Kernel assembled file \"hsw_clear_kernel.c\" for i915 driver..." > > > > + > > > > + i915_filename=hsw_clear_kernel.c > > > > + prefix_header $gen_device > $i915_filename > > > > + cat $output_file >> $i915_filename > > > > + postfix_footer $i915_filename >> $i915_filename > > > > + > > > > + elif [ "$gen_device" == "ivb" ]; then > > > > + echo "Generating gen7 CB Kernel assembled file \"ivb_clear_kernel.c\" for i915 driver..." > > > > + > > > > + i915_filename=ivb_clear_kernel.c > > > > + prefix_header $gen_device > $i915_filename > > > > + cat $output_file >> $i915_filename > > > > + postfix_footer $i915_filename >> $i915_filename > > > > + fi > > > > +} > > > > + > > > > +while getopts "hg:o:m:" opt; do > > > > + case $opt in > > > > + h) get_help; exit 0;; > > > > + g) gen_device="$OPTARG" ;; > > > > + o) output_file="$OPTARG" ;; > > > > + m) mesa_dir="$OPTARG" ;; > > > > + \?) > > > > + echo -e "Unknown option: -$OPTARG\n" > > > > + get_help > > > > + exit 1 > > > > + ;; > > > > + esac > > > > +done > > > > +shift $(($OPTIND-1)) > > > > + > > > > +if [ "x$1" != "x" ]; then > > > > + echo -e "Unknown option: $1\n" > > > > + get_help > > > > + exit 1 > > > > +fi > > > > + > > > > +I965_ASM="$mesa_dir/build/debug/src/intel/tools/i965_asm" > > > > > > Should this be $mesa_dir/build/src/intel/tools/i965_asm instead? > > > > Both assume the user specied the build directly exactly like so > > when building Mesa. We should probably ask the user to point at > > either the binary itself or the build directory. > > We could just say "assuming build directory name is 'build'", Mesa's > build instructions recommend that. Only works for people who have just a single build directory, and who read the noob docs. So mostly normal users that have no use for the assembler in the first place. Developers are much more likely to have several build directories. -- Ville Syrjälä Intel _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v4 1/1] tools/generate_cb_buffer: Add script to assemble CB kernel 2020-02-24 9:48 ` Petri Latvala 2020-02-24 13:47 ` Ville Syrjälä @ 2020-02-24 19:38 ` Abodunrin, Akeem G 2020-02-25 9:12 ` Petri Latvala 1 sibling, 1 reply; 11+ messages in thread From: Abodunrin, Akeem G @ 2020-02-24 19:38 UTC (permalink / raw) To: Latvala, Petri Cc: Nikula, Jani, Wilson, Chris P, igt-dev@lists.freedesktop.org, Bloomfield, Jon, Vetter, Daniel, Kuoppala, Mika > > +export ASSEMBLY_SOURCE=./tools/assembly_source > > + > > +function get_help { > > + echo "Usage: asm_eu_kernel.sh [options]" > > + echo "Note: hsw_clear_kernel.c/ivb_clear_kernel.c automatically > generated by this script should never be modified - it would be imported to > i915, to use as it is..." > > + echo " " > > + echo "Please make sure your Mesa tool is compiled with "- > Dtools=intel" and "-Ddri-drivers=i965", and run this script from IGT source > root directory" > > + echo " " > > + echo "Options are:" > > + echo " -h display this help message, and exit" > > + echo " -g=platform generation of device: use "hsw" for gen7.5, > and "ivb" for gen7 devices" > > + echo " -o=name_of_file output file to store Mesa assembled c- > literal for the device - If none specified, default file will be used - ivb/hsw- > cb_assembled" > > + echo " -m=mesa Mesa source directory" > > + echo " " > > + echo " Usage example: \"scripts/asm_eu_kernel.sh -g hsw -o > hsw_clear_buffer.h -m /path/to/Mesa/source/directory\"" > > +} > > + > > +function include_array # $1=array_name { > > + echo "static const u32 $(basename $1)_clear_kernel[] = {" > > +} > > +function prefix_header # $1=filename $2=comment { > > + array_name=$(include_array $1) > > + > > + cat <<EOF > > +// SPDX-License-Identifier: MIT > > +/* > > + * Copyright (c) 2020 Intel Corporation > > + * > > + * Generated by: IGT Gpu Tools on $(date) */ > > + > > +$array_name > > +EOF > > +} > > + > > +function postfix_footer # filename > > +{ > > + cat <<EOF > > +}; > > +EOF > > +} > > + > > +function check_output_file #check output file { > > + if [ "x$output_file" != "x" ]; then > > + if [ -f "$output_file" ]; then > > + echo -e "Warning: The \"$output_file\" file already exist - > choose another file\n" > > + get_help > > + exit 1 > > + fi > > + else > > + # It is okay to overwrite default file created > > + echo -e "Output file not specified - using default file > \"$gen_device-cb_assembled\"\n" > > + output_file="$gen_device-cb_assembled" > > + fi > > +} > > +function asm_cb_kernel # as-root <args> { > > + check_output_file > > + > > + # Using i965_asm tool to assemble hex file from assembly source > > + $I965_ASM -g $gen_device -t c_literal $input_asm_source -o > > + $output_file > > + > > + # Generate header file > > + if [ "$gen_device" == "hsw" ]; then > > + echo "Generating gen7.5 CB Kernel assembled file > \"hsw_clear_kernel.c\" for i915 driver..." > > + > > + i915_filename=hsw_clear_kernel.c > > + prefix_header $gen_device > $i915_filename > > + cat $output_file >> $i915_filename > > + postfix_footer $i915_filename >> $i915_filename > > + > > + elif [ "$gen_device" == "ivb" ]; then > > + echo "Generating gen7 CB Kernel assembled file > \"ivb_clear_kernel.c\" for i915 driver..." > > + > > + i915_filename=ivb_clear_kernel.c > > + prefix_header $gen_device > $i915_filename > > + cat $output_file >> $i915_filename > > + postfix_footer $i915_filename >> $i915_filename > > + fi > > +} > > + > > +while getopts "hg:o:m:" opt; do > > + case $opt in > > + h) get_help; exit 0;; > > + g) gen_device="$OPTARG" ;; > > + o) output_file="$OPTARG" ;; > > + m) mesa_dir="$OPTARG" ;; > > + \?) > > + echo -e "Unknown option: -$OPTARG\n" > > + get_help > > + exit 1 > > + ;; > > + esac > > +done > > +shift $(($OPTIND-1)) > > + > > +if [ "x$1" != "x" ]; then > > + echo -e "Unknown option: $1\n" > > + get_help > > + exit 1 > > +fi > > + > > +I965_ASM="$mesa_dir/build/debug/src/intel/tools/i965_asm" > > Should this be $mesa_dir/build/src/intel/tools/i965_asm instead? > > > After changing that I get > > # scripts/asm_eu_kernel.sh -m ~/src/mesa -ghsw Output file not specified - > using default file "hsw-cb_assembled" > > ./tools/assembly_source/hsw_clear_buf.asm: 71: syntax error at "<" > Generating gen7.5 CB Kernel assembled file "hsw_clear_kernel.c" for i915 > driver... > > > And then 'hsw-cb_assembled' is an empty file, 'hsw_clear_kernel.c' > contains an empty array but the script exited with success... > > Line 71 in the asm is > shr(1) g3<1>D sr0<0,1,0>D 12D { align1 1N }; > > > > -- > Petri Latvala Yes, that is true - I might have forgotten to mention in the cover letter that changes to Mesa might have not been merged yet, albeit I mentioned that " The changes in the IGT GPU tool require latest Mesa tool to work correctly" So, without new changes to assembler/disassembler in the Mesa tool, you will see those error messages. Regards, ~Akeem _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v4 1/1] tools/generate_cb_buffer: Add script to assemble CB kernel 2020-02-24 19:38 ` Abodunrin, Akeem G @ 2020-02-25 9:12 ` Petri Latvala 0 siblings, 0 replies; 11+ messages in thread From: Petri Latvala @ 2020-02-25 9:12 UTC (permalink / raw) To: Abodunrin, Akeem G Cc: Nikula, Jani, Wilson, Chris P, igt-dev@lists.freedesktop.org, Bloomfield, Jon, Vetter, Daniel, Kuoppala, Mika On Mon, Feb 24, 2020 at 09:38:18PM +0200, Abodunrin, Akeem G wrote: > > > +export ASSEMBLY_SOURCE=./tools/assembly_source > > > + > > > +function get_help { > > > + echo "Usage: asm_eu_kernel.sh [options]" > > > + echo "Note: hsw_clear_kernel.c/ivb_clear_kernel.c automatically > > generated by this script should never be modified - it would be imported to > > i915, to use as it is..." > > > + echo " " > > > + echo "Please make sure your Mesa tool is compiled with "- > > Dtools=intel" and "-Ddri-drivers=i965", and run this script from IGT source > > root directory" > > > + echo " " > > > + echo "Options are:" > > > + echo " -h display this help message, and exit" > > > + echo " -g=platform generation of device: use "hsw" for gen7.5, > > and "ivb" for gen7 devices" > > > + echo " -o=name_of_file output file to store Mesa assembled c- > > literal for the device - If none specified, default file will be used - ivb/hsw- > > cb_assembled" > > > + echo " -m=mesa Mesa source directory" > > > + echo " " > > > + echo " Usage example: \"scripts/asm_eu_kernel.sh -g hsw -o > > hsw_clear_buffer.h -m /path/to/Mesa/source/directory\"" > > > +} > > > + > > > +function include_array # $1=array_name { > > > + echo "static const u32 $(basename $1)_clear_kernel[] = {" > > > +} > > > +function prefix_header # $1=filename $2=comment { > > > + array_name=$(include_array $1) > > > + > > > + cat <<EOF > > > +// SPDX-License-Identifier: MIT > > > +/* > > > + * Copyright (c) 2020 Intel Corporation > > > + * > > > + * Generated by: IGT Gpu Tools on $(date) */ > > > + > > > +$array_name > > > +EOF > > > +} > > > + > > > +function postfix_footer # filename > > > +{ > > > + cat <<EOF > > > +}; > > > +EOF > > > +} > > > + > > > +function check_output_file #check output file { > > > + if [ "x$output_file" != "x" ]; then > > > + if [ -f "$output_file" ]; then > > > + echo -e "Warning: The \"$output_file\" file already exist - > > choose another file\n" > > > + get_help > > > + exit 1 > > > + fi > > > + else > > > + # It is okay to overwrite default file created > > > + echo -e "Output file not specified - using default file > > \"$gen_device-cb_assembled\"\n" > > > + output_file="$gen_device-cb_assembled" > > > + fi > > > +} > > > +function asm_cb_kernel # as-root <args> { > > > + check_output_file > > > + > > > + # Using i965_asm tool to assemble hex file from assembly source > > > + $I965_ASM -g $gen_device -t c_literal $input_asm_source -o > > > + $output_file > > > + > > > + # Generate header file > > > + if [ "$gen_device" == "hsw" ]; then > > > + echo "Generating gen7.5 CB Kernel assembled file > > \"hsw_clear_kernel.c\" for i915 driver..." > > > + > > > + i915_filename=hsw_clear_kernel.c > > > + prefix_header $gen_device > $i915_filename > > > + cat $output_file >> $i915_filename > > > + postfix_footer $i915_filename >> $i915_filename > > > + > > > + elif [ "$gen_device" == "ivb" ]; then > > > + echo "Generating gen7 CB Kernel assembled file > > \"ivb_clear_kernel.c\" for i915 driver..." > > > + > > > + i915_filename=ivb_clear_kernel.c > > > + prefix_header $gen_device > $i915_filename > > > + cat $output_file >> $i915_filename > > > + postfix_footer $i915_filename >> $i915_filename > > > + fi > > > +} > > > + > > > +while getopts "hg:o:m:" opt; do > > > + case $opt in > > > + h) get_help; exit 0;; > > > + g) gen_device="$OPTARG" ;; > > > + o) output_file="$OPTARG" ;; > > > + m) mesa_dir="$OPTARG" ;; > > > + \?) > > > + echo -e "Unknown option: -$OPTARG\n" > > > + get_help > > > + exit 1 > > > + ;; > > > + esac > > > +done > > > +shift $(($OPTIND-1)) > > > + > > > +if [ "x$1" != "x" ]; then > > > + echo -e "Unknown option: $1\n" > > > + get_help > > > + exit 1 > > > +fi > > > + > > > +I965_ASM="$mesa_dir/build/debug/src/intel/tools/i965_asm" > > > > Should this be $mesa_dir/build/src/intel/tools/i965_asm instead? > > > > > > After changing that I get > > > > # scripts/asm_eu_kernel.sh -m ~/src/mesa -ghsw Output file not specified - > > using default file "hsw-cb_assembled" > > > > ./tools/assembly_source/hsw_clear_buf.asm: 71: syntax error at "<" > > Generating gen7.5 CB Kernel assembled file "hsw_clear_kernel.c" for i915 > > driver... > > > > > > And then 'hsw-cb_assembled' is an empty file, 'hsw_clear_kernel.c' > > contains an empty array but the script exited with success... > > > > Line 71 in the asm is > > shr(1) g3<1>D sr0<0,1,0>D 12D { align1 1N }; > > > > > > > > -- > > Petri Latvala > Yes, that is true - I might have forgotten to mention in the cover letter that changes to Mesa might have not been merged yet, albeit I mentioned that " The changes in the IGT GPU tool require latest Mesa tool to work correctly" So, without new changes to assembler/disassembler in the Mesa tool, you will see those error messages. Do you have a MR link so I could test the script? -- Petri Latvala _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 11+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for Support to assemble CB kernel for gen7 (rev3) 2020-02-21 8:22 [igt-dev] [PATCH i-g-t v4 0/1] Support to assemble CB kernel for gen7 Akeem G Abodunrin 2020-02-21 8:22 ` [igt-dev] [PATCH i-g-t v4 1/1] tools/generate_cb_buffer: Add script to assemble CB kernel Akeem G Abodunrin @ 2020-02-21 16:31 ` Patchwork 2020-02-24 11:37 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork 2 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2020-02-21 16:31 UTC (permalink / raw) To: Akeem G Abodunrin; +Cc: igt-dev == Series Details == Series: Support to assemble CB kernel for gen7 (rev3) URL : https://patchwork.freedesktop.org/series/73684/ State : success == Summary == CI Bug Log - changes from IGT_5458 -> IGTPW_4212 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/index.html Known issues ------------ Here are the changes found in IGTPW_4212 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_mmap_gtt@basic: - fi-tgl-y: [PASS][1] -> [DMESG-WARN][2] ([CI#94] / [i915#402]) +1 similar issue [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/fi-tgl-y/igt@gem_mmap_gtt@basic.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/fi-tgl-y/igt@gem_mmap_gtt@basic.html * igt@i915_selftest@live_gem_contexts: - fi-hsw-peppy: [PASS][3] -> [DMESG-FAIL][4] ([i915#722]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/fi-hsw-peppy/igt@i915_selftest@live_gem_contexts.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/fi-hsw-peppy/igt@i915_selftest@live_gem_contexts.html - fi-cml-s: [PASS][5] -> [DMESG-FAIL][6] ([i915#877]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/fi-cml-s/igt@i915_selftest@live_gem_contexts.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/fi-cml-s/igt@i915_selftest@live_gem_contexts.html * igt@i915_selftest@live_sanitycheck: - fi-icl-u3: [PASS][7] -> [DMESG-WARN][8] ([i915#585]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/fi-icl-u3/igt@i915_selftest@live_sanitycheck.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/fi-icl-u3/igt@i915_selftest@live_sanitycheck.html * igt@kms_chamelium@dp-edid-read: - fi-cml-u2: [PASS][9] -> [FAIL][10] ([i915#217] / [i915#976]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/fi-cml-u2/igt@kms_chamelium@dp-edid-read.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/fi-cml-u2/igt@kms_chamelium@dp-edid-read.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: [PASS][11] -> [FAIL][12] ([fdo#111096] / [i915#323]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html #### Possible fixes #### * igt@gem_close_race@basic-threads: - fi-byt-n2820: [INCOMPLETE][13] ([i915#45]) -> [PASS][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/fi-byt-n2820/igt@gem_close_race@basic-threads.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/fi-byt-n2820/igt@gem_close_race@basic-threads.html - fi-hsw-4770: [TIMEOUT][15] ([fdo#112271] / [i915#1084]) -> [PASS][16] [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/fi-hsw-4770/igt@gem_close_race@basic-threads.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/fi-hsw-4770/igt@gem_close_race@basic-threads.html * igt@gem_exec_suspend@basic-s4-devices: - fi-tgl-y: [FAIL][17] ([CI#94]) -> [PASS][18] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/fi-tgl-y/igt@gem_exec_suspend@basic-s4-devices.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/fi-tgl-y/igt@gem_exec_suspend@basic-s4-devices.html * igt@i915_selftest@live_gem_contexts: - fi-cfl-guc: [DMESG-FAIL][19] ([i915#623]) -> [PASS][20] [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/fi-cfl-guc/igt@i915_selftest@live_gem_contexts.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/fi-cfl-guc/igt@i915_selftest@live_gem_contexts.html * igt@i915_selftest@live_gtt: - fi-kbl-7500u: [TIMEOUT][21] ([fdo#112271]) -> [PASS][22] [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/fi-kbl-7500u/igt@i915_selftest@live_gtt.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/fi-kbl-7500u/igt@i915_selftest@live_gtt.html - fi-skl-6600u: [TIMEOUT][23] ([fdo#111732] / [fdo#112271]) -> [PASS][24] [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/fi-skl-6600u/igt@i915_selftest@live_gtt.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/fi-skl-6600u/igt@i915_selftest@live_gtt.html * igt@kms_addfb_basic@addfb25-y-tiled: - fi-tgl-y: [DMESG-WARN][25] ([CI#94] / [i915#402]) -> [PASS][26] +1 similar issue [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/fi-tgl-y/igt@kms_addfb_basic@addfb25-y-tiled.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/fi-tgl-y/igt@kms_addfb_basic@addfb25-y-tiled.html #### Warnings #### * igt@amdgpu/amd_prime@amd-to-i915: - fi-icl-u3: [SKIP][27] ([fdo#109315] / [i915#585]) -> [SKIP][28] ([fdo#109315]) [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/fi-icl-u3/igt@amdgpu/amd_prime@amd-to-i915.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/fi-icl-u3/igt@amdgpu/amd_prime@amd-to-i915.html [CI#94]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/94 [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315 [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096 [fdo#111732]: https://bugs.freedesktop.org/show_bug.cgi?id=111732 [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271 [i915#1084]: https://gitlab.freedesktop.org/drm/intel/issues/1084 [i915#217]: https://gitlab.freedesktop.org/drm/intel/issues/217 [i915#323]: https://gitlab.freedesktop.org/drm/intel/issues/323 [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402 [i915#45]: https://gitlab.freedesktop.org/drm/intel/issues/45 [i915#585]: https://gitlab.freedesktop.org/drm/intel/issues/585 [i915#623]: https://gitlab.freedesktop.org/drm/intel/issues/623 [i915#722]: https://gitlab.freedesktop.org/drm/intel/issues/722 [i915#877]: https://gitlab.freedesktop.org/drm/intel/issues/877 [i915#976]: https://gitlab.freedesktop.org/drm/intel/issues/976 Participating hosts (53 -> 44) ------------------------------ Missing (9): fi-ilk-m540 fi-hsw-4200u fi-skl-6770hq fi-bdw-gvtdvm fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_5458 -> IGTPW_4212 CI-20190529: 20190529 CI_DRM_7982: f02659605b48dcabb562bbb96db2996b334e57fd @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_4212: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/index.html IGT_5458: 5f7e4ae6a91ed2c104593b8abd5b71a6cc96fc10 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/index.html _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 11+ messages in thread
* [igt-dev] ✗ Fi.CI.IGT: failure for Support to assemble CB kernel for gen7 (rev3) 2020-02-21 8:22 [igt-dev] [PATCH i-g-t v4 0/1] Support to assemble CB kernel for gen7 Akeem G Abodunrin 2020-02-21 8:22 ` [igt-dev] [PATCH i-g-t v4 1/1] tools/generate_cb_buffer: Add script to assemble CB kernel Akeem G Abodunrin 2020-02-21 16:31 ` [igt-dev] ✓ Fi.CI.BAT: success for Support to assemble CB kernel for gen7 (rev3) Patchwork @ 2020-02-24 11:37 ` Patchwork 2 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2020-02-24 11:37 UTC (permalink / raw) To: Akeem G Abodunrin; +Cc: igt-dev == Series Details == Series: Support to assemble CB kernel for gen7 (rev3) URL : https://patchwork.freedesktop.org/series/73684/ State : failure == Summary == CI Bug Log - changes from IGT_5458_full -> IGTPW_4212_full ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with IGTPW_4212_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in IGTPW_4212_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/index.html Possible new issues ------------------- Here are the unknown changes that may have been introduced in IGTPW_4212_full: ### IGT changes ### #### Possible regressions #### * igt@perf@invalid-remove-userspace-config: - shard-iclb: [PASS][1] -> [SKIP][2] +4 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-iclb6/igt@perf@invalid-remove-userspace-config.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-iclb1/igt@perf@invalid-remove-userspace-config.html #### Warnings #### * igt@perf@gen12-mi-rpc: - shard-tglb: [TIMEOUT][3] ([fdo#112271] / [i915#1085]) -> [SKIP][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-tglb6/igt@perf@gen12-mi-rpc.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-tglb6/igt@perf@gen12-mi-rpc.html * igt@perf@unprivileged-single-ctx-counters: - shard-iclb: [SKIP][5] ([fdo#109289]) -> [SKIP][6] +1 similar issue [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-iclb2/igt@perf@unprivileged-single-ctx-counters.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-iclb2/igt@perf@unprivileged-single-ctx-counters.html #### Suppressed #### The following results come from untrusted machines, tests, or statuses. They do not affect the overall result. * {igt@kms_hdr@bpc-switch-suspend}: - shard-iclb: [PASS][7] -> [INCOMPLETE][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-iclb4/igt@kms_hdr@bpc-switch-suspend.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-iclb3/igt@kms_hdr@bpc-switch-suspend.html Known issues ------------ Here are the changes found in IGTPW_4212_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_busy@busy-vcs1: - shard-iclb: [PASS][9] -> [SKIP][10] ([fdo#112080]) +10 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-iclb4/igt@gem_busy@busy-vcs1.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-iclb6/igt@gem_busy@busy-vcs1.html * igt@gem_ctx_isolation@rcs0-s3: - shard-kbl: [PASS][11] -> [DMESG-WARN][12] ([i915#180]) +1 similar issue [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-kbl2/igt@gem_ctx_isolation@rcs0-s3.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-kbl1/igt@gem_ctx_isolation@rcs0-s3.html - shard-apl: [PASS][13] -> [DMESG-WARN][14] ([i915#180]) +2 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-apl6/igt@gem_ctx_isolation@rcs0-s3.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-apl4/igt@gem_ctx_isolation@rcs0-s3.html * igt@gem_ctx_shared@exec-single-timeline-bsd: - shard-iclb: [PASS][15] -> [SKIP][16] ([fdo#110841]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-iclb6/igt@gem_ctx_shared@exec-single-timeline-bsd.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-iclb1/igt@gem_ctx_shared@exec-single-timeline-bsd.html * igt@gem_exec_schedule@reorder-wide-bsd: - shard-iclb: [PASS][17] -> [SKIP][18] ([fdo#112146]) +7 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-iclb8/igt@gem_exec_schedule@reorder-wide-bsd.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-iclb2/igt@gem_exec_schedule@reorder-wide-bsd.html * igt@gem_ppgtt@flink-and-close-vma-leak: - shard-apl: [PASS][19] -> [FAIL][20] ([i915#644]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-apl2/igt@gem_ppgtt@flink-and-close-vma-leak.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-apl3/igt@gem_ppgtt@flink-and-close-vma-leak.html * igt@gen9_exec_parse@allowed-all: - shard-glk: [PASS][21] -> [DMESG-WARN][22] ([i915#716]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-glk8/igt@gen9_exec_parse@allowed-all.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-glk3/igt@gen9_exec_parse@allowed-all.html * igt@i915_pm_dc@dc5-dpms: - shard-iclb: [PASS][23] -> [FAIL][24] ([i915#447]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-iclb8/igt@i915_pm_dc@dc5-dpms.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-iclb3/igt@i915_pm_dc@dc5-dpms.html * igt@i915_pm_rpm@system-suspend-execbuf: - shard-kbl: [PASS][25] -> [DMESG-WARN][26] ([i915#56]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-kbl2/igt@i915_pm_rpm@system-suspend-execbuf.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-kbl3/igt@i915_pm_rpm@system-suspend-execbuf.html * igt@i915_selftest@live_gt_lrc: - shard-tglb: [PASS][27] -> [INCOMPLETE][28] ([i915#1233]) [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-tglb3/igt@i915_selftest@live_gt_lrc.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-tglb3/igt@i915_selftest@live_gt_lrc.html * igt@kms_cursor_crc@pipe-a-cursor-suspend: - shard-apl: [PASS][29] -> [INCOMPLETE][30] ([fdo#103927]) [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-apl3/igt@kms_cursor_crc@pipe-a-cursor-suspend.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-apl3/igt@kms_cursor_crc@pipe-a-cursor-suspend.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-blt: - shard-tglb: [PASS][31] -> [SKIP][32] ([i915#668]) +6 similar issues [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-tglb3/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-blt.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-tglb1/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-blt.html * igt@kms_psr@psr2_primary_blt: - shard-iclb: [PASS][33] -> [SKIP][34] ([fdo#109441]) [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-iclb2/igt@kms_psr@psr2_primary_blt.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-iclb3/igt@kms_psr@psr2_primary_blt.html * igt@perf@invalid-oa-metric-set-id: - shard-tglb: [PASS][35] -> [SKIP][36] ([fdo#112172]) +4 similar issues [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-tglb7/igt@perf@invalid-oa-metric-set-id.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-tglb1/igt@perf@invalid-oa-metric-set-id.html * igt@prime_vgem@fence-wait-bsd2: - shard-iclb: [PASS][37] -> [SKIP][38] ([fdo#109276]) +15 similar issues [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-iclb2/igt@prime_vgem@fence-wait-bsd2.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-iclb7/igt@prime_vgem@fence-wait-bsd2.html #### Possible fixes #### * igt@gem_exec_schedule@fifo-bsd1: - shard-iclb: [SKIP][39] ([fdo#109276]) -> [PASS][40] +14 similar issues [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-iclb7/igt@gem_exec_schedule@fifo-bsd1.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-iclb1/igt@gem_exec_schedule@fifo-bsd1.html * {igt@gem_exec_schedule@implicit-both-bsd}: - shard-iclb: [SKIP][41] ([i915#677]) -> [PASS][42] [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-iclb1/igt@gem_exec_schedule@implicit-both-bsd.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-iclb5/igt@gem_exec_schedule@implicit-both-bsd.html * {igt@gem_exec_schedule@implicit-both-bsd2}: - shard-iclb: [SKIP][43] ([fdo#109276] / [i915#677]) -> [PASS][44] [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-iclb8/igt@gem_exec_schedule@implicit-both-bsd2.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-iclb4/igt@gem_exec_schedule@implicit-both-bsd2.html * igt@gem_exec_schedule@preemptive-hang-bsd: - shard-iclb: [SKIP][45] ([fdo#112146]) -> [PASS][46] +2 similar issues [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-iclb2/igt@gem_exec_schedule@preemptive-hang-bsd.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-iclb5/igt@gem_exec_schedule@preemptive-hang-bsd.html * igt@gem_ppgtt@flink-and-close-vma-leak: - shard-kbl: [FAIL][47] ([i915#644]) -> [PASS][48] [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-kbl3/igt@gem_ppgtt@flink-and-close-vma-leak.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-kbl6/igt@gem_ppgtt@flink-and-close-vma-leak.html * igt@i915_pm_dc@dc6-psr: - shard-iclb: [FAIL][49] ([i915#454]) -> [PASS][50] [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-iclb6/igt@i915_pm_dc@dc6-psr.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-iclb1/igt@i915_pm_dc@dc6-psr.html * igt@i915_pm_rps@waitboost: - shard-iclb: [FAIL][51] ([i915#413]) -> [PASS][52] [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-iclb8/igt@i915_pm_rps@waitboost.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-iclb3/igt@i915_pm_rps@waitboost.html * igt@i915_suspend@debugfs-reader: - shard-kbl: [DMESG-WARN][53] ([i915#180]) -> [PASS][54] +3 similar issues [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-kbl1/igt@i915_suspend@debugfs-reader.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-kbl6/igt@i915_suspend@debugfs-reader.html * igt@kms_color@pipe-a-ctm-0-25: - shard-tglb: [FAIL][55] ([i915#1149] / [i915#315]) -> [PASS][56] [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-tglb3/igt@kms_color@pipe-a-ctm-0-25.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-tglb7/igt@kms_color@pipe-a-ctm-0-25.html * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-glk: [FAIL][57] ([i915#79]) -> [PASS][58] +1 similar issue [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-glk2/igt@kms_flip@flip-vs-expired-vblank-interruptible.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-glk9/igt@kms_flip@flip-vs-expired-vblank-interruptible.html * igt@kms_flip@flip-vs-rmfb: - shard-apl: [DMESG-WARN][59] ([i915#1297]) -> [PASS][60] [59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-apl2/igt@kms_flip@flip-vs-rmfb.html [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-apl4/igt@kms_flip@flip-vs-rmfb.html - shard-kbl: [DMESG-WARN][61] ([i915#1297]) -> [PASS][62] [61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-kbl7/igt@kms_flip@flip-vs-rmfb.html [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-kbl6/igt@kms_flip@flip-vs-rmfb.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-render: - shard-tglb: [SKIP][63] ([i915#668]) -> [PASS][64] [63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-tglb1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-render.html [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-tglb2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-render.html * igt@kms_plane_lowres@pipe-a-tiling-y: - shard-glk: [FAIL][65] ([i915#899]) -> [PASS][66] [65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-glk6/igt@kms_plane_lowres@pipe-a-tiling-y.html [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-glk8/igt@kms_plane_lowres@pipe-a-tiling-y.html * igt@kms_psr@psr2_sprite_plane_move: - shard-iclb: [SKIP][67] ([fdo#109441]) -> [PASS][68] +2 similar issues [67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-iclb4/igt@kms_psr@psr2_sprite_plane_move.html [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html * igt@kms_vblank@pipe-a-ts-continuation-suspend: - shard-apl: [DMESG-WARN][69] ([i915#180]) -> [PASS][70] +2 similar issues [69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-apl6/igt@kms_vblank@pipe-a-ts-continuation-suspend.html [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-apl6/igt@kms_vblank@pipe-a-ts-continuation-suspend.html * igt@perf@missing-sample-flags: - shard-iclb: [SKIP][71] -> [PASS][72] +4 similar issues [71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-iclb4/igt@perf@missing-sample-flags.html [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-iclb3/igt@perf@missing-sample-flags.html * igt@perf@non-sampling-read-error: - shard-tglb: [SKIP][73] ([fdo#112172]) -> [PASS][74] +3 similar issues [73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-tglb7/igt@perf@non-sampling-read-error.html [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-tglb2/igt@perf@non-sampling-read-error.html * igt@perf_pmu@init-busy-vcs1: - shard-iclb: [SKIP][75] ([fdo#112080]) -> [PASS][76] +10 similar issues [75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-iclb7/igt@perf_pmu@init-busy-vcs1.html [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-iclb4/igt@perf_pmu@init-busy-vcs1.html * igt@sw_sync@sync_multi_producer_single_consumer: - shard-iclb: [TIMEOUT][77] ([fdo#112271]) -> [PASS][78] [77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-iclb1/igt@sw_sync@sync_multi_producer_single_consumer.html [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-iclb6/igt@sw_sync@sync_multi_producer_single_consumer.html #### Warnings #### * igt@gem_ctx_isolation@vcs1-nonpriv-switch: - shard-iclb: [SKIP][79] ([fdo#112080]) -> [FAIL][80] ([IGT#28]) [79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-iclb8/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html [80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-iclb4/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html * igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup: - shard-snb: [DMESG-WARN][81] ([fdo#111870] / [i915#478]) -> [DMESG-WARN][82] ([fdo#110789] / [fdo#111870] / [i915#478]) [81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-snb1/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup.html [82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-snb2/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup.html * igt@perf@gen8-unprivileged-single-ctx-counters: - shard-tglb: [SKIP][83] ([fdo#112172]) -> [SKIP][84] ([fdo#109289]) [83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-tglb7/igt@perf@gen8-unprivileged-single-ctx-counters.html [84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-tglb8/igt@perf@gen8-unprivileged-single-ctx-counters.html * igt@perf@unprivileged-single-ctx-counters: - shard-tglb: [SKIP][85] ([fdo#109289]) -> [SKIP][86] ([fdo#112172]) [85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5458/shard-tglb6/igt@perf@unprivileged-single-ctx-counters.html [86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/shard-tglb6/igt@perf@unprivileged-single-ctx-counters.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [IGT#28]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/28 [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927 [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276 [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [fdo#110789]: https://bugs.freedesktop.org/show_bug.cgi?id=110789 [fdo#110841]: https://bugs.freedesktop.org/show_bug.cgi?id=110841 [fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870 [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080 [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146 [fdo#112172]: https://bugs.freedesktop.org/show_bug.cgi?id=112172 [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271 [i915#1085]: https://gitlab.freedesktop.org/drm/intel/issues/1085 [i915#1149]: https://gitlab.freedesktop.org/drm/intel/issues/1149 [i915#1233]: https://gitlab.freedesktop.org/drm/intel/issues/1233 [i915#1297]: https://gitlab.freedesktop.org/drm/intel/issues/1297 [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180 [i915#315]: https://gitlab.freedesktop.org/drm/intel/issues/315 [i915#413]: https://gitlab.freedesktop.org/drm/intel/issues/413 [i915#447]: https://gitlab.freedesktop.org/drm/intel/issues/447 [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454 [i915#478]: https://gitlab.freedesktop.org/drm/intel/issues/478 [i915#56]: https://gitlab.freedesktop.org/drm/intel/issues/56 [i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644 [i915#668]: https://gitlab.freedesktop.org/drm/intel/issues/668 [i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677 [i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716 [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79 [i915#899]: https://gitlab.freedesktop.org/drm/intel/issues/899 Participating hosts (8 -> 8) ------------------------------ No changes in participating hosts Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_5458 -> IGTPW_4212 CI-20190529: 20190529 CI_DRM_7982: f02659605b48dcabb562bbb96db2996b334e57fd @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_4212: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/index.html IGT_5458: 5f7e4ae6a91ed2c104593b8abd5b71a6cc96fc10 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4212/index.html _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2020-02-25 11:27 UTC | newest] Thread overview: 11+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2020-02-21 8:22 [igt-dev] [PATCH i-g-t v4 0/1] Support to assemble CB kernel for gen7 Akeem G Abodunrin 2020-02-21 8:22 ` [igt-dev] [PATCH i-g-t v4 1/1] tools/generate_cb_buffer: Add script to assemble CB kernel Akeem G Abodunrin 2020-02-24 9:48 ` Petri Latvala 2020-02-24 13:47 ` Ville Syrjälä 2020-02-24 18:47 ` Abodunrin, Akeem G 2020-02-25 9:12 ` Petri Latvala 2020-02-25 11:27 ` Ville Syrjälä 2020-02-24 19:38 ` Abodunrin, Akeem G 2020-02-25 9:12 ` Petri Latvala 2020-02-21 16:31 ` [igt-dev] ✓ Fi.CI.BAT: success for Support to assemble CB kernel for gen7 (rev3) Patchwork 2020-02-24 11:37 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
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