* [igt-dev] [PATCH] [PATCH i-g-t][V6]tests/i915/gem_sync.c :Added __for_each_physical_engine to utilize all available
@ 2020-04-14 16:40 Arjun Melkaveri
2020-04-14 16:46 ` Chris Wilson
` (3 more replies)
0 siblings, 4 replies; 6+ messages in thread
From: Arjun Melkaveri @ 2020-04-14 16:40 UTC (permalink / raw)
To: arjun.melkaveri, igt-dev
Replaced the legacy for_each_engine* defines with the ones
implemented in the gem_engine_topology library.
Used gem_context_clone_with_engines
to make sure that engine index was potentially created
based on a default context with engine map configured.
Added Legacy engine coverage for sync_ring and sync_all.
Divided tests into static for ALL_Engine test cases
and dynamic for multiple engine .
Cc: Dec Katarzyna <katarzyna.dec@intel.com>
Cc: Ursulin Tvrtko <tvrtko.ursulin@intel.com>
Signed-off-by: sai gowtham <sai.gowtham.ch@intel.com>
Signed-off-by: Arjun Melkaveri <arjun.melkaveri@intel.com>
---
tests/i915/gem_sync.c | 278 +++++++++++++++++++++++++++---------------
1 file changed, 179 insertions(+), 99 deletions(-)
diff --git a/tests/i915/gem_sync.c b/tests/i915/gem_sync.c
index 2ef55ecc..9c9a4319 100644
--- a/tests/i915/gem_sync.c
+++ b/tests/i915/gem_sync.c
@@ -24,6 +24,9 @@
#include <time.h>
#include <pthread.h>
+#include "igt_debugfs.h"
+#include "igt_dummyload.h"
+#include "igt_gt.h"
#include "igt.h"
#include "igt_sysfs.h"
@@ -37,6 +40,9 @@
#define MIN_PRIO LOCAL_I915_CONTEXT_MIN_USER_PRIORITY
#define ENGINE_MASK (I915_EXEC_RING_MASK | LOCAL_I915_EXEC_BSD_MASK)
+#define RESET_TIMEOUT_MS (2 * MSEC_PER_SEC)
+static unsigned long reset_timeout_ms = RESET_TIMEOUT_MS;
+#define NSEC_PER_MSEC (1000 * 1000ull)
IGT_TEST_DESCRIPTION("Basic check of ring<->ring write synchronisation.");
@@ -78,24 +84,36 @@ out:
return ts.tv_sec + 1e-9*ts.tv_nsec;
}
+static void cleanup(int i915)
+{
+ igt_drop_caches_set(i915,
+ /* cancel everything */
+ DROP_RESET_ACTIVE | DROP_RESET_SEQNO |
+ /* cleanup */
+ DROP_ACTIVE | DROP_RETIRE | DROP_IDLE | DROP_FREED);
+ igt_require_gem(i915);
+}
+
+
static void
sync_ring(int fd, unsigned ring, int num_children, int timeout)
{
+ const struct intel_execution_engine2 *e2;
unsigned engines[16];
const char *names[16];
int num_engines = 0;
if (ring == ALL_ENGINES) {
- for_each_physical_engine(e, fd) {
- names[num_engines] = e->name;
- engines[num_engines++] = eb_ring(e);
+ __for_each_physical_engine(fd, e2) {
+ names[num_engines] = e2->name;
+ engines[num_engines++] = e2->flags;
if (num_engines == ARRAY_SIZE(engines))
break;
}
num_children *= num_engines;
} else {
- gem_require_ring(fd, ring);
+ igt_require(gem_can_store_dword(fd, ring));
names[num_engines] = NULL;
engines[num_engines++] = ring;
}
@@ -139,7 +157,7 @@ sync_ring(int fd, unsigned ring, int num_children, int timeout)
}
static void
-idle_ring(int fd, unsigned ring, int timeout)
+idle_ring(int fd, unsigned int ring, int num_children, int timeout)
{
const uint32_t bbe = MI_BATCH_BUFFER_END;
struct drm_i915_gem_exec_object2 object;
@@ -180,23 +198,23 @@ idle_ring(int fd, unsigned ring, int timeout)
static void
wakeup_ring(int fd, unsigned ring, int timeout, int wlen)
{
+ const struct intel_execution_engine2 *e2;
unsigned engines[16];
const char *names[16];
int num_engines = 0;
if (ring == ALL_ENGINES) {
- for_each_physical_engine(e, fd) {
- if (!gem_can_store_dword(fd, eb_ring(e)))
+ __for_each_physical_engine(fd, e2) {
+ if (!gem_class_can_store_dword(fd, e2->class))
continue;
- names[num_engines] = e->name;
- engines[num_engines++] = eb_ring(e);
+ names[num_engines] = e2->name;
+ engines[num_engines++] = e2->flags;
if (num_engines == ARRAY_SIZE(engines))
break;
}
igt_require(num_engines);
} else {
- gem_require_ring(fd, ring);
igt_require(gem_can_store_dword(fd, ring));
names[num_engines] = NULL;
engines[num_engines++] = ring;
@@ -290,25 +308,26 @@ wakeup_ring(int fd, unsigned ring, int timeout, int wlen)
igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);
}
-static void active_ring(int fd, unsigned ring, int timeout)
+static void active_ring(int fd, unsigned int ring,
+ int num_children, int timeout)
{
+ const struct intel_execution_engine2 *e2;
unsigned engines[16];
const char *names[16];
int num_engines = 0;
if (ring == ALL_ENGINES) {
- for_each_physical_engine(e, fd) {
- if (!gem_can_store_dword(fd, eb_ring(e)))
+ __for_each_physical_engine(fd, e2) {
+ if (!gem_class_can_store_dword(fd, e2->class))
continue;
- names[num_engines] = e->name;
- engines[num_engines++] = eb_ring(e);
+ names[num_engines] = e2->name;
+ engines[num_engines++] = e2->flags;
if (num_engines == ARRAY_SIZE(engines))
break;
}
igt_require(num_engines);
} else {
- gem_require_ring(fd, ring);
igt_require(gem_can_store_dword(fd, ring));
names[num_engines] = NULL;
engines[num_engines++] = ring;
@@ -359,23 +378,23 @@ static void active_ring(int fd, unsigned ring, int timeout)
static void
active_wakeup_ring(int fd, unsigned ring, int timeout, int wlen)
{
+ const struct intel_execution_engine2 *e2;
unsigned engines[16];
const char *names[16];
int num_engines = 0;
if (ring == ALL_ENGINES) {
- for_each_physical_engine(e, fd) {
- if (!gem_can_store_dword(fd, eb_ring(e)))
+ __for_each_physical_engine(fd, e2) {
+ if (!gem_class_can_store_dword(fd, e2->class))
continue;
- names[num_engines] = e->name;
- engines[num_engines++] = eb_ring(e);
+ names[num_engines] = e2->name;
+ engines[num_engines++] = e2->flags;
if (num_engines == ARRAY_SIZE(engines))
break;
}
igt_require(num_engines);
} else {
- gem_require_ring(fd, ring);
igt_require(gem_can_store_dword(fd, ring));
names[num_engines] = NULL;
engines[num_engines++] = ring;
@@ -493,25 +512,25 @@ active_wakeup_ring(int fd, unsigned ring, int timeout, int wlen)
static void
store_ring(int fd, unsigned ring, int num_children, int timeout)
{
+ const struct intel_execution_engine2 *e2;
const int gen = intel_gen(intel_get_drm_devid(fd));
unsigned engines[16];
const char *names[16];
int num_engines = 0;
if (ring == ALL_ENGINES) {
- for_each_physical_engine(e, fd) {
- if (!gem_can_store_dword(fd, eb_ring(e)))
+ __for_each_physical_engine(fd, e2) {
+ if (!gem_class_can_store_dword(fd, e2->class))
continue;
- names[num_engines] = e->name;
- engines[num_engines++] = eb_ring(e);
+ names[num_engines] = e2->name;
+ engines[num_engines++] = e2->flags;
if (num_engines == ARRAY_SIZE(engines))
break;
}
num_children *= num_engines;
} else {
- gem_require_ring(fd, ring);
igt_require(gem_can_store_dword(fd, ring));
names[num_engines] = NULL;
engines[num_engines++] = ring;
@@ -608,6 +627,7 @@ store_ring(int fd, unsigned ring, int num_children, int timeout)
static void
switch_ring(int fd, unsigned ring, int num_children, int timeout)
{
+ const struct intel_execution_engine2 *e2;
const int gen = intel_gen(intel_get_drm_devid(fd));
unsigned engines[16];
const char *names[16];
@@ -616,19 +636,18 @@ switch_ring(int fd, unsigned ring, int num_children, int timeout)
gem_require_contexts(fd);
if (ring == ALL_ENGINES) {
- for_each_physical_engine(e, fd) {
- if (!gem_can_store_dword(fd, eb_ring(e)))
+ __for_each_physical_engine(fd, e2) {
+ if (!gem_class_can_store_dword(fd, e2->class))
continue;
- names[num_engines] = e->name;
- engines[num_engines++] = eb_ring(e);
+ names[num_engines] = e2->name;
+ engines[num_engines++] = e2->flags;
if (num_engines == ARRAY_SIZE(engines))
break;
}
num_children *= num_engines;
} else {
- gem_require_ring(fd, ring);
igt_require(gem_can_store_dword(fd, ring));
names[num_engines] = NULL;
engines[num_engines++] = ring;
@@ -931,8 +950,9 @@ __store_many(int fd, unsigned ring, int timeout, unsigned long *cycles)
}
static void
-store_many(int fd, unsigned ring, int timeout)
+store_many(int fd, unsigned int ring, int num_children, int timeout)
{
+ const struct intel_execution_engine2 *e2;
unsigned long *shared;
const char *names[16];
int n = 0;
@@ -943,21 +963,20 @@ store_many(int fd, unsigned ring, int timeout)
intel_detect_and_clear_missed_interrupts(fd);
if (ring == ALL_ENGINES) {
- for_each_physical_engine(e, fd) {
- if (!gem_can_store_dword(fd, eb_ring(e)))
+ __for_each_physical_engine(fd, e2) {
+ if (!gem_class_can_store_dword(fd, e2->class))
continue;
igt_fork(child, 1)
__store_many(fd,
- eb_ring(e),
+ e2->flags,
timeout,
&shared[n]);
- names[n++] = e->name;
+ names[n++] = e2->name;
}
igt_waitchildren();
} else {
- gem_require_ring(fd, ring);
igt_require(gem_can_store_dword(fd, ring));
__store_many(fd, ring, timeout, &shared[n]);
names[n++] = NULL;
@@ -1025,15 +1044,16 @@ sync_all(int fd, int num_children, int timeout)
static void
store_all(int fd, int num_children, int timeout)
{
+ const struct intel_execution_engine2 *e;
const int gen = intel_gen(intel_get_drm_devid(fd));
unsigned engines[16];
int num_engines = 0;
- for_each_physical_engine(e, fd) {
- if (!gem_can_store_dword(fd, eb_ring(e)))
+ __for_each_physical_engine(fd, e) {
+ if (!gem_class_can_store_dword(fd, e->class))
continue;
- engines[num_engines++] = eb_ring(e);
+ engines[num_engines++] = e->flags;
if (num_engines == ARRAY_SIZE(engines))
break;
}
@@ -1132,22 +1152,22 @@ store_all(int fd, int num_children, int timeout)
static void
preempt(int fd, unsigned ring, int num_children, int timeout)
{
+ const struct intel_execution_engine2 *e2;
unsigned engines[16];
const char *names[16];
int num_engines = 0;
uint32_t ctx[2];
if (ring == ALL_ENGINES) {
- for_each_physical_engine(e, fd) {
- names[num_engines] = e->name;
- engines[num_engines++] = eb_ring(e);
+ __for_each_physical_engine(fd, e2) {
+ names[num_engines] = e2->name;
+ engines[num_engines++] = e2->flags;
if (num_engines == ARRAY_SIZE(engines))
break;
}
num_children *= num_engines;
} else {
- gem_require_ring(fd, ring);
names[num_engines] = NULL;
engines[num_engines++] = ring;
}
@@ -1207,76 +1227,99 @@ preempt(int fd, unsigned ring, int num_children, int timeout)
gem_context_destroy(fd, ctx[0]);
}
+static void do_test(void (*test)(int i915, unsigned int engine,
+ int num_children, int test_timeout),
+ int i915, unsigned int engine, int num_children,
+ int test_timeout, const char *name)
+{
+#define ATTR "preempt_timeout_ms"
+ int timeout = -1;
+
+ cleanup(i915);
+
+ gem_engine_property_scanf(i915, name, ATTR, "%d", &timeout);
+ if (timeout != -1) {
+ igt_require(gem_engine_property_printf(i915, name,
+ ATTR, "%d", 50) > 0);
+ reset_timeout_ms = 200;
+ }
+
+ test(i915, engine, num_children, test_timeout);
+ gem_quiescent_gpu(i915);
+}
+
igt_main
{
- const struct intel_execution_engine *e;
const int ncpus = sysconf(_SC_NPROCESSORS_ONLN);
int fd = -1;
+ struct {
+ const char *name;
+ void (*func)(int fd, unsigned int engine,
+ int num_children, int timeout);
+ int num_children;
+ int timeout;
+ } *test, allengine[] = {
+ { "basic-each", sync_ring, 1, 2},
+ { "basic-store-each", store_ring, 1, 2},
+ { "basic-many-each", store_many, 0, 2},
+ { "switch-each", switch_ring, 1, 20},
+ { "forked-switch-each", switch_ring, ncpus, 20},
+ { "forked-each", sync_ring, ncpus, 20},
+ { "forked-store-each", store_ring, ncpus, 20},
+ { "active-each", active_ring, 0, 20},
+ { "wakeup-each", wakeup_ring, 20, 1},
+ { "active-wakeup-each", active_wakeup_ring, 20, 1},
+ { "double-wakeup-each", wakeup_ring, 20, 2},
+ { NULL, NULL },
+ }, tests[] = {
+ { "default", sync_ring, 1, 20},
+ { "idle", idle_ring, 0, 20},
+ { "active", active_ring, 0, 20},
+ { "wakeup", wakeup_ring, 20, 1},
+ { "active-wakeup", active_wakeup_ring, 20, 1},
+ { "double-wakeup", wakeup_ring, 20, 2},
+ { "store", store_ring, 1, 20},
+ { "switch", switch_ring, 1, 20},
+ { "forked-switch", switch_ring, ncpus, 20},
+ { "many", store_many, 0, 20},
+ { "forked", sync_ring, ncpus, 20},
+ { "forked-store", store_ring, ncpus, 20},
+ { NULL, NULL },
+ };
+
+
igt_fixture {
fd = drm_open_driver(DRIVER_INTEL);
igt_require_gem(fd);
gem_submission_print_method(fd);
gem_scheduler_print_capability(fd);
-
igt_fork_hang_detector(fd);
}
- for (e = intel_execution_engines; e->name; e++) {
- igt_subtest_f("%s", e->name)
- sync_ring(fd, eb_ring(e), 1, 20);
- igt_subtest_f("idle-%s", e->name)
- idle_ring(fd, eb_ring(e), 20);
- igt_subtest_f("active-%s", e->name)
- active_ring(fd, eb_ring(e), 20);
- igt_subtest_f("wakeup-%s", e->name)
- wakeup_ring(fd, eb_ring(e), 20, 1);
- igt_subtest_f("active-wakeup-%s", e->name)
- active_wakeup_ring(fd, eb_ring(e), 20, 1);
- igt_subtest_f("double-wakeup-%s", e->name)
- wakeup_ring(fd, eb_ring(e), 20, 2);
- igt_subtest_f("store-%s", e->name)
- store_ring(fd, eb_ring(e), 1, 20);
- igt_subtest_f("switch-%s", e->name)
- switch_ring(fd, eb_ring(e), 1, 20);
- igt_subtest_f("forked-switch-%s", e->name)
- switch_ring(fd, eb_ring(e), ncpus, 20);
- igt_subtest_f("many-%s", e->name)
- store_many(fd, eb_ring(e), 20);
- igt_subtest_f("forked-%s", e->name)
- sync_ring(fd, eb_ring(e), ncpus, 20);
- igt_subtest_f("forked-store-%s", e->name)
- store_ring(fd, eb_ring(e), ncpus, 20);
- }
+ /* legacy of selecting engines. */
- igt_subtest("basic-each")
- sync_ring(fd, ALL_ENGINES, 1, 2);
- igt_subtest("basic-store-each")
- store_ring(fd, ALL_ENGINES, 1, 2);
- igt_subtest("basic-many-each")
- store_many(fd, ALL_ENGINES, 2);
- igt_subtest("switch-each")
- switch_ring(fd, ALL_ENGINES, 1, 20);
- igt_subtest("forked-switch-each")
- switch_ring(fd, ALL_ENGINES, ncpus, 20);
- igt_subtest("forked-each")
- sync_ring(fd, ALL_ENGINES, ncpus, 20);
- igt_subtest("forked-store-each")
- store_ring(fd, ALL_ENGINES, ncpus, 20);
- igt_subtest("active-each")
- active_ring(fd, ALL_ENGINES, 20);
- igt_subtest("wakeup-each")
- wakeup_ring(fd, ALL_ENGINES, 20, 1);
- igt_subtest("active-wakeup-each")
- active_wakeup_ring(fd, ALL_ENGINES, 20, 1);
- igt_subtest("double-wakeup-each")
- wakeup_ring(fd, ALL_ENGINES, 20, 2);
+ igt_subtest_group {
+ for (test = tests; test->name; test++) {
+ igt_subtest_with_dynamic_f("legacy-engines-%s",
+ test->name) {
+ for_each_physical_engine(e, fd) {
+ igt_dynamic_f("%s", e->name) {
+ do_test(test->func,
+ fd, eb_ring(e),
+ test->num_children,
+ test->timeout,
+ e->full_name);
+ }
+ }
+ }
+ }
+ }
igt_subtest("basic-all")
sync_all(fd, 1, 2);
igt_subtest("basic-store-all")
store_all(fd, 1, 2);
-
igt_subtest("all")
sync_all(fd, 1, 20);
igt_subtest("store-all")
@@ -1286,7 +1329,42 @@ igt_main
igt_subtest("forked-store-all")
store_all(fd, ncpus, 20);
+ /* All Engines */
+ igt_subtest_group {
+ for (test = allengine; test->name; test++) {
+ igt_subtest_f("%s", test->name) {
+ do_test(test->func,
+ fd, ALL_ENGINES,
+ test->num_children,
+ test->timeout,
+ test->name);
+ }
+ }
+ }
+
+ /* New way of selecting engines. */
igt_subtest_group {
+ const struct intel_execution_engine2 *e;
+
+ for (test = tests; test->name; test++) {
+ igt_subtest_with_dynamic_f("%s", test->name) {
+ __for_each_physical_engine(fd, e) {
+ igt_dynamic_f("%s", e->name) {
+ do_test(test->func,
+ fd, e->flags,
+ test->num_children,
+ test->timeout,
+ e->name);
+ }
+ }
+ }
+ }
+ }
+
+
+ igt_subtest_group {
+ const struct intel_execution_engine2 *e;
+
igt_fixture {
gem_require_contexts(fd);
igt_require(gem_scheduler_has_ctx_priority(fd));
@@ -1295,10 +1373,12 @@ igt_main
igt_subtest("preempt-all")
preempt(fd, ALL_ENGINES, 1, 20);
-
- for (e = intel_execution_engines; e->name; e++) {
- igt_subtest_f("preempt-%s", e->name)
- preempt(fd, eb_ring(e), ncpus, 20);
+ igt_subtest_with_dynamic("preempt") {
+ __for_each_physical_engine(fd, e) {
+ /* Requires master for STORE_DWORD on gen4/5 */
+ igt_dynamic_f("%s", e->name)
+ preempt(fd, e->flags, ncpus, 20);
+ }
}
}
--
2.25.1
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^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [igt-dev] [PATCH] [PATCH i-g-t][V6]tests/i915/gem_sync.c :Added __for_each_physical_engine to utilize all available
2020-04-14 16:40 [igt-dev] [PATCH] [PATCH i-g-t][V6]tests/i915/gem_sync.c :Added __for_each_physical_engine to utilize all available Arjun Melkaveri
@ 2020-04-14 16:46 ` Chris Wilson
2020-04-14 16:49 ` Melkaveri, Arjun
2020-04-14 17:58 ` [igt-dev] ✗ GitLab.Pipeline: failure for tests/i915/gem_sync.c :Added __for_each_physical_engine to utilize all available (rev7) Patchwork
` (2 subsequent siblings)
3 siblings, 1 reply; 6+ messages in thread
From: Chris Wilson @ 2020-04-14 16:46 UTC (permalink / raw)
To: arjun.melkaveri, igt-dev
Quoting Arjun Melkaveri (2020-04-14 17:40:16)
> static void
> sync_ring(int fd, unsigned ring, int num_children, int timeout)
> {
> + const struct intel_execution_engine2 *e2;
> unsigned engines[16];
> const char *names[16];
> int num_engines = 0;
>
> if (ring == ALL_ENGINES) {
> - for_each_physical_engine(e, fd) {
> - names[num_engines] = e->name;
> - engines[num_engines++] = eb_ring(e);
> + __for_each_physical_engine(fd, e2) {
> + names[num_engines] = e2->name;
This doesn't work. e2->name is on the stack and so goes out of scope
after the loop.
> + engines[num_engines++] = e2->flags;
> if (num_engines == ARRAY_SIZE(engines))
> break;
> }
>
> num_children *= num_engines;
> } else {
> - gem_require_ring(fd, ring);
> + igt_require(gem_can_store_dword(fd, ring));
Pardon????
-Chris
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [igt-dev] [PATCH] [PATCH i-g-t][V6]tests/i915/gem_sync.c :Added __for_each_physical_engine to utilize all available
2020-04-14 16:46 ` Chris Wilson
@ 2020-04-14 16:49 ` Melkaveri, Arjun
0 siblings, 0 replies; 6+ messages in thread
From: Melkaveri, Arjun @ 2020-04-14 16:49 UTC (permalink / raw)
To: Chris Wilson, igt-dev@lists.freedesktop.org
Thanks
Arjun M
-----Original Message-----
From: Chris Wilson <chris@chris-wilson.co.uk>
Sent: Tuesday, April 14, 2020 10:16 PM
To: Melkaveri, Arjun <arjun.melkaveri@intel.com>; igt-dev@lists.freedesktop.org
Subject: Re: [igt-dev] [PATCH] [PATCH i-g-t][V6]tests/i915/gem_sync.c :Added __for_each_physical_engine to utilize all available
Quoting Arjun Melkaveri (2020-04-14 17:40:16)
> static void
> sync_ring(int fd, unsigned ring, int num_children, int timeout) {
> + const struct intel_execution_engine2 *e2;
> unsigned engines[16];
> const char *names[16];
> int num_engines = 0;
>
> if (ring == ALL_ENGINES) {
> - for_each_physical_engine(e, fd) {
> - names[num_engines] = e->name;
> - engines[num_engines++] = eb_ring(e);
> + __for_each_physical_engine(fd, e2) {
> + names[num_engines] = e2->name;
This doesn't work. e2->name is on the stack and so goes out of scope after the loop.
Will re verify this .
> + engines[num_engines++] = e2->flags;
> if (num_engines == ARRAY_SIZE(engines))
> break;
> }
>
> num_children *= num_engines;
> } else {
> - gem_require_ring(fd, ring);
> + igt_require(gem_can_store_dword(fd, ring));
I was correcting this one . apologies
Pardon????
-Chris
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igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 6+ messages in thread
* [igt-dev] ✗ GitLab.Pipeline: failure for tests/i915/gem_sync.c :Added __for_each_physical_engine to utilize all available (rev7)
2020-04-14 16:40 [igt-dev] [PATCH] [PATCH i-g-t][V6]tests/i915/gem_sync.c :Added __for_each_physical_engine to utilize all available Arjun Melkaveri
2020-04-14 16:46 ` Chris Wilson
@ 2020-04-14 17:58 ` Patchwork
2020-04-14 18:16 ` [igt-dev] ✓ Fi.CI.BAT: success " Patchwork
2020-04-15 11:27 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
3 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2020-04-14 17:58 UTC (permalink / raw)
To: Arjun Melkaveri; +Cc: igt-dev
== Series Details ==
Series: tests/i915/gem_sync.c :Added __for_each_physical_engine to utilize all available (rev7)
URL : https://patchwork.freedesktop.org/series/75536/
State : failure
== Summary ==
ERROR! This series introduces new undocumented tests:
gem_sync@active
gem_sync@active-wakeup
gem_sync@double-wakeup
gem_sync@forked
gem_sync@forked-store
gem_sync@forked-switch
gem_sync@idle
gem_sync@legacy-engines-active
gem_sync@legacy-engines-active-wakeup
gem_sync@legacy-engines-default
gem_sync@legacy-engines-double-wakeup
gem_sync@legacy-engines-forked
gem_sync@legacy-engines-forked-store
gem_sync@legacy-engines-forked-switch
gem_sync@legacy-engines-idle
gem_sync@legacy-engines-many
gem_sync@legacy-engines-store
gem_sync@legacy-engines-switch
gem_sync@legacy-engines-wakeup
gem_sync@many
gem_sync@preempt
gem_sync@store
gem_sync@switch
gem_sync@wakeup
Can you document them as per the requirement in the [CONTRIBUTING.md]?
[Documentation] has more details on how to do this.
Here are few examples:
https://gitlab.freedesktop.org/drm/igt-gpu-tools/commit/0316695d03aa46108296b27f3982ec93200c7a6e
https://gitlab.freedesktop.org/drm/igt-gpu-tools/commit/443cc658e1e6b492ee17bf4f4d891029eb7a205d
Thanks in advance!
[CONTRIBUTING.md]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/blob/master/CONTRIBUTING.md#L19
[Documentation]: https://drm.pages.freedesktop.org/igt-gpu-tools/igt-gpu-tools-Core.html#igt-describe
Other than that, pipeline status: SUCCESS.
see https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/pipelines/132104 for the overview.
== Logs ==
For more details see: https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/pipelines/132104
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 6+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for tests/i915/gem_sync.c :Added __for_each_physical_engine to utilize all available (rev7)
2020-04-14 16:40 [igt-dev] [PATCH] [PATCH i-g-t][V6]tests/i915/gem_sync.c :Added __for_each_physical_engine to utilize all available Arjun Melkaveri
2020-04-14 16:46 ` Chris Wilson
2020-04-14 17:58 ` [igt-dev] ✗ GitLab.Pipeline: failure for tests/i915/gem_sync.c :Added __for_each_physical_engine to utilize all available (rev7) Patchwork
@ 2020-04-14 18:16 ` Patchwork
2020-04-15 11:27 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
3 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2020-04-14 18:16 UTC (permalink / raw)
To: Arjun Melkaveri; +Cc: igt-dev
== Series Details ==
Series: tests/i915/gem_sync.c :Added __for_each_physical_engine to utilize all available (rev7)
URL : https://patchwork.freedesktop.org/series/75536/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8297 -> IGTPW_4460
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/index.html
Known issues
------------
Here are the changes found in IGTPW_4460 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live@execlists:
- fi-kbl-soraka: [PASS][1] -> [INCOMPLETE][2] ([CI#80])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/fi-kbl-soraka/igt@i915_selftest@live@execlists.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/fi-kbl-soraka/igt@i915_selftest@live@execlists.html
#### Possible fixes ####
* igt@i915_selftest@live@sanitycheck:
- fi-bwr-2160: [INCOMPLETE][3] -> [PASS][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/fi-bwr-2160/igt@i915_selftest@live@sanitycheck.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/fi-bwr-2160/igt@i915_selftest@live@sanitycheck.html
* igt@kms_chamelium@dp-crc-fast:
- fi-cml-u2: [FAIL][5] ([i915#262]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/fi-cml-u2/igt@kms_chamelium@dp-crc-fast.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/fi-cml-u2/igt@kms_chamelium@dp-crc-fast.html
[CI#80]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/80
[i915#262]: https://gitlab.freedesktop.org/drm/intel/issues/262
Participating hosts (49 -> 44)
------------------------------
Missing (5): fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_5589 -> IGTPW_4460
CI-20190529: 20190529
CI_DRM_8297: 4b5836951af00ec433a94fbf7f7148733e4acd28 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_4460: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/index.html
IGT_5589: 31962324ac86f029e2841e56e97c42cf9d572956 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
== Testlist changes ==
+++ 24 lines
--- 90 lines
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/index.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 6+ messages in thread
* [igt-dev] ✓ Fi.CI.IGT: success for tests/i915/gem_sync.c :Added __for_each_physical_engine to utilize all available (rev7)
2020-04-14 16:40 [igt-dev] [PATCH] [PATCH i-g-t][V6]tests/i915/gem_sync.c :Added __for_each_physical_engine to utilize all available Arjun Melkaveri
` (2 preceding siblings ...)
2020-04-14 18:16 ` [igt-dev] ✓ Fi.CI.BAT: success " Patchwork
@ 2020-04-15 11:27 ` Patchwork
3 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2020-04-15 11:27 UTC (permalink / raw)
To: Arjun Melkaveri; +Cc: igt-dev
== Series Details ==
Series: tests/i915/gem_sync.c :Added __for_each_physical_engine to utilize all available (rev7)
URL : https://patchwork.freedesktop.org/series/75536/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8297_full -> IGTPW_4460_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/index.html
Known issues
------------
Here are the changes found in IGTPW_4460_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_suspend@basic-s3:
- shard-kbl: [PASS][1] -> [DMESG-WARN][2] ([i915#180]) +3 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-kbl7/igt@gem_exec_suspend@basic-s3.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-kbl7/igt@gem_exec_suspend@basic-s3.html
* igt@gen9_exec_parse@allowed-all:
- shard-kbl: [PASS][3] -> [DMESG-WARN][4] ([i915#716])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-kbl4/igt@gen9_exec_parse@allowed-all.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-kbl1/igt@gen9_exec_parse@allowed-all.html
* igt@kms_color@pipe-a-legacy-gamma:
- shard-apl: [PASS][5] -> [FAIL][6] ([fdo#108145] / [i915#71])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-apl6/igt@kms_color@pipe-a-legacy-gamma.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-apl4/igt@kms_color@pipe-a-legacy-gamma.html
- shard-kbl: [PASS][7] -> [FAIL][8] ([fdo#108145] / [i915#71])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-kbl4/igt@kms_color@pipe-a-legacy-gamma.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-kbl4/igt@kms_color@pipe-a-legacy-gamma.html
* igt@kms_cursor_crc@pipe-a-cursor-256x256-random:
- shard-kbl: [PASS][9] -> [FAIL][10] ([i915#54] / [i915#93] / [i915#95]) +1 similar issue
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-kbl4/igt@kms_cursor_crc@pipe-a-cursor-256x256-random.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-kbl6/igt@kms_cursor_crc@pipe-a-cursor-256x256-random.html
* igt@kms_cursor_crc@pipe-a-cursor-256x256-sliding:
- shard-apl: [PASS][11] -> [FAIL][12] ([i915#54] / [i915#95]) +1 similar issue
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-apl4/igt@kms_cursor_crc@pipe-a-cursor-256x256-sliding.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-apl3/igt@kms_cursor_crc@pipe-a-cursor-256x256-sliding.html
* igt@kms_draw_crc@draw-method-rgb565-mmap-wc-ytiled:
- shard-glk: [PASS][13] -> [FAIL][14] ([i915#52] / [i915#54]) +3 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-glk1/igt@kms_draw_crc@draw-method-rgb565-mmap-wc-ytiled.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-glk9/igt@kms_draw_crc@draw-method-rgb565-mmap-wc-ytiled.html
* igt@kms_draw_crc@draw-method-rgb565-pwrite-untiled:
- shard-glk: [PASS][15] -> [FAIL][16] ([i915#177] / [i915#52] / [i915#54])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-glk4/igt@kms_draw_crc@draw-method-rgb565-pwrite-untiled.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-glk7/igt@kms_draw_crc@draw-method-rgb565-pwrite-untiled.html
* igt@kms_flip@2x-plain-flip-fb-recreate-interruptible:
- shard-glk: [PASS][17] -> [FAIL][18] ([i915#34])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-glk8/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-glk9/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html
* igt@kms_pipe_crc_basic@read-crc-pipe-a:
- shard-apl: [PASS][19] -> [FAIL][20] ([i915#53] / [i915#95])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-apl2/igt@kms_pipe_crc_basic@read-crc-pipe-a.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-apl4/igt@kms_pipe_crc_basic@read-crc-pipe-a.html
- shard-kbl: [PASS][21] -> [FAIL][22] ([i915#53] / [i915#93] / [i915#95])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-kbl2/igt@kms_pipe_crc_basic@read-crc-pipe-a.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-kbl4/igt@kms_pipe_crc_basic@read-crc-pipe-a.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
- shard-apl: [PASS][23] -> [DMESG-WARN][24] ([i915#180]) +2 similar issues
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-apl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-apl4/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
* igt@kms_psr@psr2_sprite_mmap_gtt:
- shard-iclb: [PASS][25] -> [SKIP][26] ([fdo#109441]) +1 similar issue
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_gtt.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-iclb5/igt@kms_psr@psr2_sprite_mmap_gtt.html
* igt@kms_setmode@basic:
- shard-kbl: [PASS][27] -> [FAIL][28] ([i915#31])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-kbl7/igt@kms_setmode@basic.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-kbl3/igt@kms_setmode@basic.html
* igt@kms_vblank@pipe-c-accuracy-idle:
- shard-glk: [PASS][29] -> [FAIL][30] ([i915#43])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-glk8/igt@kms_vblank@pipe-c-accuracy-idle.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-glk2/igt@kms_vblank@pipe-c-accuracy-idle.html
#### Possible fixes ####
* {igt@gem_ctx_isolation@preservation-s3@rcs0}:
- shard-kbl: [DMESG-WARN][31] ([i915#180]) -> [PASS][32] +2 similar issues
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-kbl2/igt@gem_ctx_isolation@preservation-s3@rcs0.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-kbl3/igt@gem_ctx_isolation@preservation-s3@rcs0.html
* igt@gen9_exec_parse@allowed-all:
- shard-apl: [DMESG-WARN][33] ([i915#716]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-apl2/igt@gen9_exec_parse@allowed-all.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-apl6/igt@gen9_exec_parse@allowed-all.html
* igt@i915_pm_rpm@dpms-lpsp:
- shard-iclb: [SKIP][35] ([i915#1316] / [i915#579]) -> [PASS][36] +1 similar issue
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-iclb5/igt@i915_pm_rpm@dpms-lpsp.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-iclb1/igt@i915_pm_rpm@dpms-lpsp.html
- shard-tglb: [SKIP][37] ([i915#1316] / [i915#579]) -> [PASS][38] +1 similar issue
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-tglb8/igt@i915_pm_rpm@dpms-lpsp.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-tglb6/igt@i915_pm_rpm@dpms-lpsp.html
* igt@i915_pm_rpm@sysfs-read:
- shard-glk: [SKIP][39] ([fdo#109271]) -> [PASS][40] +1 similar issue
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-glk2/igt@i915_pm_rpm@sysfs-read.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-glk2/igt@i915_pm_rpm@sysfs-read.html
* igt@i915_suspend@sysfs-reader:
- shard-apl: [DMESG-WARN][41] ([i915#180]) -> [PASS][42] +3 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-apl6/igt@i915_suspend@sysfs-reader.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-apl3/igt@i915_suspend@sysfs-reader.html
* igt@kms_cursor_crc@pipe-a-cursor-128x42-offscreen:
- shard-kbl: [FAIL][43] ([i915#54] / [i915#93] / [i915#95]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-kbl6/igt@kms_cursor_crc@pipe-a-cursor-128x42-offscreen.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-kbl3/igt@kms_cursor_crc@pipe-a-cursor-128x42-offscreen.html
* igt@kms_draw_crc@draw-method-rgb565-pwrite-ytiled:
- shard-glk: [FAIL][45] ([i915#52] / [i915#54]) -> [PASS][46] +2 similar issues
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-glk8/igt@kms_draw_crc@draw-method-rgb565-pwrite-ytiled.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-glk2/igt@kms_draw_crc@draw-method-rgb565-pwrite-ytiled.html
* igt@kms_draw_crc@draw-method-xrgb8888-pwrite-untiled:
- shard-apl: [FAIL][47] ([i915#52] / [i915#54] / [i915#95]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-apl6/igt@kms_draw_crc@draw-method-xrgb8888-pwrite-untiled.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-apl6/igt@kms_draw_crc@draw-method-xrgb8888-pwrite-untiled.html
* igt@kms_mmap_write_crc@main:
- shard-kbl: [FAIL][49] ([i915#93] / [i915#95]) -> [PASS][50]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-kbl2/igt@kms_mmap_write_crc@main.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-kbl7/igt@kms_mmap_write_crc@main.html
* igt@kms_plane_alpha_blend@pipe-a-coverage-vs-premult-vs-constant:
- shard-kbl: [FAIL][51] ([fdo#108145] / [i915#265] / [i915#93] / [i915#95]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-kbl1/igt@kms_plane_alpha_blend@pipe-a-coverage-vs-premult-vs-constant.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-kbl2/igt@kms_plane_alpha_blend@pipe-a-coverage-vs-premult-vs-constant.html
- shard-apl: [FAIL][53] ([fdo#108145] / [i915#265] / [i915#95]) -> [PASS][54] +1 similar issue
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-apl6/igt@kms_plane_alpha_blend@pipe-a-coverage-vs-premult-vs-constant.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-apl6/igt@kms_plane_alpha_blend@pipe-a-coverage-vs-premult-vs-constant.html
* igt@kms_psr@psr2_cursor_render:
- shard-iclb: [SKIP][55] ([fdo#109441]) -> [PASS][56] +1 similar issue
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-iclb8/igt@kms_psr@psr2_cursor_render.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-iclb2/igt@kms_psr@psr2_cursor_render.html
* igt@kms_vblank@pipe-a-ts-continuation-dpms-rpm:
- shard-tglb: [SKIP][57] ([fdo#112015]) -> [PASS][58]
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-tglb8/igt@kms_vblank@pipe-a-ts-continuation-dpms-rpm.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-tglb8/igt@kms_vblank@pipe-a-ts-continuation-dpms-rpm.html
- shard-iclb: [SKIP][59] ([fdo#109278]) -> [PASS][60]
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-iclb5/igt@kms_vblank@pipe-a-ts-continuation-dpms-rpm.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-iclb6/igt@kms_vblank@pipe-a-ts-continuation-dpms-rpm.html
#### Warnings ####
* igt@i915_pm_rpm@cursor-dpms:
- shard-snb: [INCOMPLETE][61] ([i915#82]) -> [SKIP][62] ([fdo#109271])
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-snb1/igt@i915_pm_rpm@cursor-dpms.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-snb6/igt@i915_pm_rpm@cursor-dpms.html
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max:
- shard-apl: [FAIL][63] ([fdo#108145] / [i915#265]) -> [FAIL][64] ([fdo#108145] / [i915#265] / [i915#95])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-apl2/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-apl3/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max.html
* igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max:
- shard-apl: [FAIL][65] ([fdo#108145] / [i915#265] / [i915#95]) -> [FAIL][66] ([fdo#108145] / [i915#265])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-apl6/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-apl2/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max.html
* igt@kms_plane_alpha_blend@pipe-c-alpha-7efc:
- shard-kbl: [FAIL][67] ([fdo#108145] / [i915#265] / [i915#93] / [i915#95]) -> [FAIL][68] ([fdo#108145] / [i915#265]) +1 similar issue
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-kbl4/igt@kms_plane_alpha_blend@pipe-c-alpha-7efc.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-kbl1/igt@kms_plane_alpha_blend@pipe-c-alpha-7efc.html
* igt@runner@aborted:
- shard-kbl: [FAIL][69] ([i915#1423] / [i915#92]) -> ([FAIL][70], [FAIL][71]) ([i915#1423] / [i915#716] / [i915#92])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-kbl6/igt@runner@aborted.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-kbl1/igt@runner@aborted.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-kbl3/igt@runner@aborted.html
- shard-apl: ([FAIL][72], [FAIL][73]) ([i915#1423] / [i915#716]) -> [FAIL][74] ([i915#1423])
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-apl2/igt@runner@aborted.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8297/shard-apl4/igt@runner@aborted.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/shard-apl4/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#112015]: https://bugs.freedesktop.org/show_bug.cgi?id=112015
[i915#1316]: https://gitlab.freedesktop.org/drm/intel/issues/1316
[i915#1423]: https://gitlab.freedesktop.org/drm/intel/issues/1423
[i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542
[i915#177]: https://gitlab.freedesktop.org/drm/intel/issues/177
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
[i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
[i915#34]: https://gitlab.freedesktop.org/drm/intel/issues/34
[i915#43]: https://gitlab.freedesktop.org/drm/intel/issues/43
[i915#52]: https://gitlab.freedesktop.org/drm/intel/issues/52
[i915#53]: https://gitlab.freedesktop.org/drm/intel/issues/53
[i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
[i915#579]: https://gitlab.freedesktop.org/drm/intel/issues/579
[i915#71]: https://gitlab.freedesktop.org/drm/intel/issues/71
[i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
[i915#82]: https://gitlab.freedesktop.org/drm/intel/issues/82
[i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
[i915#93]: https://gitlab.freedesktop.org/drm/intel/issues/93
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
Participating hosts (10 -> 8)
------------------------------
Missing (2): pig-skl-6260u pig-glk-j5005
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_5589 -> IGTPW_4460
* Piglit: piglit_4509 -> None
CI-20190529: 20190529
CI_DRM_8297: 4b5836951af00ec433a94fbf7f7148733e4acd28 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_4460: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/index.html
IGT_5589: 31962324ac86f029e2841e56e97c42cf9d572956 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4460/index.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2020-04-15 11:27 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2020-04-14 16:40 [igt-dev] [PATCH] [PATCH i-g-t][V6]tests/i915/gem_sync.c :Added __for_each_physical_engine to utilize all available Arjun Melkaveri
2020-04-14 16:46 ` Chris Wilson
2020-04-14 16:49 ` Melkaveri, Arjun
2020-04-14 17:58 ` [igt-dev] ✗ GitLab.Pipeline: failure for tests/i915/gem_sync.c :Added __for_each_physical_engine to utilize all available (rev7) Patchwork
2020-04-14 18:16 ` [igt-dev] ✓ Fi.CI.BAT: success " Patchwork
2020-04-15 11:27 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
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