* [igt-dev] [PATCH i-g-t v3 1/4] lib/intel_batchbuffer: Extend intel_bb
2020-06-23 13:00 [igt-dev] [PATCH i-g-t v3 0/4] Add api_intel_bb test Zbigniew Kempczyński
@ 2020-06-23 13:00 ` Zbigniew Kempczyński
2020-06-23 13:35 ` Chris Wilson
2020-06-23 13:00 ` [igt-dev] [PATCH i-g-t v3 2/4] lib/intel_bufops: Add new functions and intel_buf fields Zbigniew Kempczyński
` (4 subsequent siblings)
5 siblings, 1 reply; 8+ messages in thread
From: Zbigniew Kempczyński @ 2020-06-23 13:00 UTC (permalink / raw)
To: igt-dev; +Cc: Chris Wilson
As we're going toward removing libdrm from rendercopy tests some
additional code in intel_bb is required. So add new functions
and fix memory issues in the reset path.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
lib/intel_batchbuffer.c | 387 +++++++++++++++++++++++++++++++++++++---
lib/intel_batchbuffer.h | 52 +++++-
2 files changed, 410 insertions(+), 29 deletions(-)
diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
index 2a882627..1878336f 100644
--- a/lib/intel_batchbuffer.c
+++ b/lib/intel_batchbuffer.c
@@ -1045,8 +1045,6 @@ void igt_blitter_fast_copy(struct intel_batchbuffer *batch,
intel_batchbuffer_flush(batch);
}
-#undef CHECK_RANGE
-
/**
* igt_get_render_copyfunc:
* @devid: pci device id
@@ -1211,7 +1209,8 @@ static void __reallocate_objects(struct intel_bb *ibb)
*
* Pointer the intel_bb, asserts on failure.
*/
-struct intel_bb *intel_bb_create(int i915, uint32_t size)
+static struct intel_bb *
+__intel_bb_create(int i915, uint32_t size, bool do_relocs)
{
struct intel_bb *ibb = calloc(1, sizeof(*ibb));
uint64_t gtt_size;
@@ -1221,6 +1220,7 @@ struct intel_bb *intel_bb_create(int i915, uint32_t size)
ibb->i915 = i915;
ibb->devid = intel_get_drm_devid(i915);
ibb->gen = intel_gen(ibb->devid);
+ ibb->enforce_relocs = do_relocs;
ibb->handle = gem_create(i915, size);
ibb->size = size;
ibb->batch = calloc(1, size);
@@ -1241,6 +1241,37 @@ struct intel_bb *intel_bb_create(int i915, uint32_t size)
return ibb;
}
+/**
+ * intel_bb_create:
+ * @i915: drm fd
+ * @size: size of the batchbuffer
+ *
+ * Returns:
+ *
+ * Pointer the intel_bb, asserts on failure.
+ */
+struct intel_bb *intel_bb_create(int i915, uint32_t size)
+{
+ return __intel_bb_create(i915, size, false);
+}
+
+/**
+ * intel_bb_create_with_relocs:
+ * @i915: drm fd
+ * @size: size of the batchbuffer
+ *
+ * Disable passing or randomizing addresses. This will lead to relocations
+ * when objects are not previously pinned.
+ *
+ * Returns:
+ *
+ * Pointer the intel_bb, asserts on failure.
+ */
+struct intel_bb *intel_bb_create_with_relocs(int i915, uint32_t size)
+{
+ return __intel_bb_create(i915, size, true);
+}
+
/*
* tdestroy() calls free function for each node, but we spread tree
* on objects array, so do nothing.
@@ -1250,23 +1281,34 @@ static void __do_nothing(void *node)
(void) node;
}
-static void __intel_bb_destroy_objects(struct intel_bb *ibb)
+static void __intel_bb_destroy_relocations(struct intel_bb *ibb)
{
uint32_t i;
/* Free relocations */
- for (i = 0; i < ibb->num_objects; i++)
+ for (i = 0; i < ibb->num_objects; i++) {
free(from_user_pointer(ibb->objects[i].relocs_ptr));
+ ibb->objects[i].relocs_ptr = to_user_pointer(NULL);
+ }
- free(ibb->objects);
- tdestroy(ibb->root, __do_nothing);
+ ibb->relocs = NULL;
+ ibb->num_relocs = 0;
+ ibb->allocated_relocs = 0;
+}
+static void __intel_bb_destroy_objects(struct intel_bb *ibb)
+{
+ free(ibb->objects);
ibb->objects = NULL;
+
+ tdestroy(ibb->root, __do_nothing);
ibb->root = NULL;
+
+ memset(ibb->batch, 0, ibb->size);
+
ibb->num_objects = 0;
- ibb->num_relocs = 0;
ibb->allocated_objects = 0;
- ibb->allocated_relocs = 0;
+
ibb->ptr = ibb->batch;
}
@@ -1280,6 +1322,7 @@ void intel_bb_destroy(struct intel_bb *ibb)
{
igt_assert(ibb);
+ __intel_bb_destroy_relocations(ibb);
__intel_bb_destroy_objects(ibb);
gem_close(ibb->i915, ibb->handle);
@@ -1295,6 +1338,8 @@ void intel_bb_destroy(struct intel_bb *ibb)
*/
void intel_bb_reset(struct intel_bb *ibb, bool purge_objects_cache)
{
+ __intel_bb_destroy_relocations(ibb);
+
if (purge_objects_cache) {
__intel_bb_destroy_objects(ibb);
__reallocate_objects(ibb);
@@ -1307,6 +1352,60 @@ void intel_bb_reset(struct intel_bb *ibb, bool purge_objects_cache)
ibb->ptr = ibb->batch;
}
+/*
+ * intel_bb_sync:
+ * @ibb: pointer to intel_bb
+ *
+ * Waits for bb completion.
+*/
+void intel_bb_sync(struct intel_bb *ibb)
+{
+ gem_sync(ibb->i915, ibb->handle);
+}
+
+/*
+ * intel_bb_print:
+ * @ibb: pointer to intel_bb
+ *
+ * Prints batch to stdout.
+*/
+void intel_bb_print(struct intel_bb *ibb)
+{
+ igt_info("drm fd: %d, gen: %d, devid: %u, debug: %d\n",
+ ibb->i915, ibb->gen, ibb->devid, ibb->debug);
+ igt_info("handle: %u, size: %u, batch: %p, ptr: %p\n",
+ ibb->handle, ibb->size, ibb->batch, ibb->ptr);
+ igt_info("prng: %u, gtt_size: %" PRIu64 ", supports 48bit: %d\n",
+ ibb->prng, ibb->gtt_size, ibb->supports_48b_address);
+ igt_info("ctx: %u\n", ibb->ctx);
+ igt_info("root: %p\n", ibb->root);
+ igt_info("objects: %p, num_objects: %u, allocated obj: %u\n",
+ ibb->objects, ibb->num_objects, ibb->allocated_objects);
+ igt_info("relocs: %p, num_relocs: %u, allocated_relocs: %u\n----\n",
+ ibb->relocs, ibb->num_relocs, ibb->allocated_relocs);
+}
+
+/*
+ * intel_bb_dump:
+ * @ibb: pointer to intel_bb
+ * @filename: name to which write bb
+ *
+ * Dump batch bo to file.
+*/
+void intel_bb_dump(struct intel_bb *ibb, const char *filename)
+{
+ FILE *out;
+ void *ptr;
+
+ ptr = gem_mmap__device_coherent(ibb->i915, ibb->handle, 0, ibb->size,
+ PROT_READ);
+ out = fopen(filename, "wb");
+ igt_assert(out);
+ fwrite(ptr, ibb->size, 1, out);
+ fclose(out);
+ munmap(ptr, ibb->size);
+}
+
/**
* intel_bb_set_debug:
* @ibb: pointer to intel_bb
@@ -1361,7 +1460,7 @@ intel_bb_add_object(struct intel_bb *ibb, uint32_t handle,
object = *found;
/* Assign address once */
- if (object->offset == 0) {
+ if (!ibb->enforce_relocs && object->offset == 0) {
if (offset) {
object->offset = offset;
} else {
@@ -1382,6 +1481,23 @@ intel_bb_add_object(struct intel_bb *ibb, uint32_t handle,
return object;
}
+static bool intel_bb_object_set_fence(struct intel_bb *ibb, uint32_t handle)
+{
+ struct drm_i915_gem_exec_object2 object = { .handle = handle };
+ struct drm_i915_gem_exec_object2 **found;
+
+ found = tfind((void *) &object, &ibb->root, __compare_objects);
+ if (!found) {
+ igt_warn("Trying to set fence on not found handle: %u\n",
+ handle);
+ return false;
+ }
+
+ (*found)->flags |= EXEC_OBJECT_NEEDS_FENCE;
+
+ return true;
+}
+
/*
* intel_bb_add_reloc:
* @ibb: pointer to intel_bb
@@ -1479,6 +1595,23 @@ uint64_t intel_bb_emit_reloc(struct intel_bb *ibb,
return address;
}
+uint64_t intel_bb_emit_reloc_fenced(struct intel_bb *ibb,
+ uint32_t handle,
+ uint32_t read_domains,
+ uint32_t write_domain,
+ uint64_t delta,
+ uint64_t presumed_offset)
+{
+ uint64_t address;
+
+ address = intel_bb_emit_reloc(ibb, handle, read_domains, write_domain,
+ delta, presumed_offset);
+
+ intel_bb_object_set_fence(ibb, handle);
+
+ return address;
+}
+
/**
* intel_bb_offset_reloc:
* @ibb: pointer to intel_bb
@@ -1509,7 +1642,23 @@ uint64_t intel_bb_offset_reloc(struct intel_bb *ibb,
0, offset, presumed_offset);
}
-static void intel_bb_dump_execbuf(struct drm_i915_gem_execbuffer2 *execbuf)
+uint64_t intel_bb_offset_reloc_with_delta(struct intel_bb *ibb,
+ uint32_t handle,
+ uint32_t read_domains,
+ uint32_t write_domain,
+ uint32_t delta,
+ uint32_t offset,
+ uint64_t presumed_offset)
+{
+ igt_assert(ibb);
+
+ return intel_bb_add_reloc(ibb, handle, read_domains, write_domain,
+ delta, offset, presumed_offset);
+}
+
+
+static void intel_bb_dump_execbuf(struct intel_bb *ibb,
+ struct drm_i915_gem_execbuffer2 *execbuf)
{
struct drm_i915_gem_exec_object2 *objects;
struct drm_i915_gem_relocation_entry *relocs, *reloc;
@@ -1535,7 +1684,8 @@ static void intel_bb_dump_execbuf(struct drm_i915_gem_execbuffer2 *execbuf)
i, objects->handle, objects->relocation_count,
relocs,
objects->alignment,
- objects->offset, objects->flags,
+ objects->offset & (ibb->gtt_size - 1),
+ objects->flags,
objects->rsvd1, objects->rsvd2);
if (objects->relocation_count) {
igt_info("\texecbuf relocs:\n");
@@ -1548,7 +1698,7 @@ static void intel_bb_dump_execbuf(struct drm_i915_gem_execbuffer2 *execbuf)
"write_domain: 0x%x\n",
j, reloc->target_handle,
reloc->offset, reloc->delta,
- reloc->presumed_offset,
+ reloc->presumed_offset & (ibb->gtt_size - 1),
reloc->read_domains,
reloc->write_domain);
}
@@ -1616,7 +1766,7 @@ int __intel_bb_exec(struct intel_bb *ibb, uint32_t end_offset,
gem_sync(ibb->i915, ibb->handle);
if (ibb->debug) {
- intel_bb_dump_execbuf(&execbuf);
+ intel_bb_dump_execbuf(ibb, &execbuf);
if (intel_bb_debug_tree) {
igt_info("\nTree:\n");
twalk(ibb->root, print_node);
@@ -1679,7 +1829,7 @@ uint64_t intel_bb_get_object_offset(struct intel_bb *ibb, uint32_t handle)
if (!found)
return 0;
- return (*found)->offset;
+ return (*found)->offset & (ibb->gtt_size - 1);
}
/**
@@ -1692,22 +1842,205 @@ uint64_t intel_bb_get_object_offset(struct intel_bb *ibb, uint32_t handle)
*/
bool intel_bb_object_offset_to_buf(struct intel_bb *ibb, struct intel_buf *buf)
{
- struct drm_i915_gem_exec_object2 object = { .handle = buf->handle };
- struct drm_i915_gem_exec_object2 **found;
+ struct drm_i915_gem_exec_object2 object = { .handle = buf->handle };
+ struct drm_i915_gem_exec_object2 **found;
- igt_assert(ibb);
- igt_assert(buf);
+ igt_assert(ibb);
+ igt_assert(buf);
- found = tfind((void *) &object, &ibb->root, __compare_objects);
- if (!found) {
- buf->addr.offset = 0;
- buf->addr.ctx = 0;
+ found = tfind((void *) &object, &ibb->root, __compare_objects);
+ if (!found) {
+ buf->addr.offset = 0;
+ buf->addr.ctx = 0;
- return false;
+ return false;
+ }
+
+ buf->addr.offset = (*found)->offset & (ibb->gtt_size - 1);
+ buf->addr.ctx = ibb->ctx;
+
+ return true;
+}
+
+/*
+ * intel_bb_out_flush:
+ * @ibb: batchbuffer
+ *
+ * Outputs flushing code to the batch.
+ */
+uint32_t intel_bb_out_flush(struct intel_bb *ibb)
+{
+ if (intel_bb_offset(ibb) == 0)
+ return 0;
+
+ if (IS_GEN5(ibb->devid)) {
+ /* emit gen5 w/a without batch space checks - we reserve that
+ * already. */
+ intel_bb_out(ibb, CMD_POLY_STIPPLE_OFFSET << 16);
+ intel_bb_out(ibb, 0);
}
- buf->addr.offset = (*found)->offset;
- buf->addr.ctx = ibb->ctx;
+ /* Round batchbuffer usage to 2 DWORDs. */
+ intel_bb_ptr_align(ibb, 8);
- return true;
+ /* Mark the end of the buffer. */
+ intel_bb_out(ibb, MI_BATCH_BUFFER_END); /* noop */
+ intel_bb_out(ibb, 0);
+
+ return intel_bb_offset(ibb);
+}
+
+/*
+ * intel_bb_flush_with_context:
+ * @ibb: batchbuffer
+ * @ctx: context id
+ *
+ * Submits the batch for execution on the render engine with the supplied
+ * hardware context.
+ */
+void intel_bb_flush_with_context(struct intel_bb *ibb, uint32_t ctx)
+{
+ if (intel_bb_out_flush(ibb) == 0)
+ return;
+
+ intel_bb_exec_with_context(ibb, intel_bb_offset(ibb), ctx,
+ I915_EXEC_RENDER | I915_EXEC_NO_RELOC,
+ true);
+ intel_bb_reset(ibb, false);
+}
+
+void intel_bb_flush_on_ring(struct intel_bb *ibb, int ring)
+{
+ unsigned int used = intel_bb_out_flush(ibb);
+ uint32_t ctx;
+
+ if (used == 0)
+ return;
+
+ /* XXX bad kernel API */
+ ctx = ibb->ctx;
+ if (ring != I915_EXEC_RENDER)
+ ctx = 0;
+
+ intel_bb_exec_with_context(ibb, intel_bb_offset(ibb), ctx,
+ ring | I915_EXEC_NO_RELOC,
+ true);
+ intel_bb_reset(ibb, false);
+}
+
+void intel_bb_flush(struct intel_bb *ibb)
+{
+ int ring = 0;
+
+ if (HAS_BLT_RING(ibb->devid))
+ ring = I915_EXEC_BLT;
+
+ intel_bb_flush_on_ring(ibb, ring);
+}
+
+uint32_t intel_bb_copy_data(struct intel_bb *ibb,
+ const void *data, unsigned int bytes,
+ uint32_t align)
+{
+ uint32_t *subdata, offset;
+
+ igt_assert((bytes & 3) == 0);
+
+ intel_bb_ptr_align(ibb, align);
+ offset = intel_bb_offset(ibb);
+ igt_assert(offset + bytes < ibb->size);
+
+ subdata = intel_bb_ptr(ibb);
+ memcpy(subdata, data, bytes);
+ intel_bb_ptr_add(ibb, bytes);
+
+ return offset;
+}
+
+void intel_bb_blit_start(struct intel_bb *ibb, uint32_t flags)
+{
+ intel_bb_out(ibb, XY_SRC_COPY_BLT_CMD |
+ XY_SRC_COPY_BLT_WRITE_ALPHA |
+ XY_SRC_COPY_BLT_WRITE_RGB |
+ (flags) |
+ (6 + 2*(ibb->gen >= 8)));
+}
+
+void intel_bb_blt_copy(struct intel_bb *ibb,
+ struct intel_buf *src,
+ int src_x1, int src_y1, int src_pitch,
+ struct intel_buf *dst,
+ int dst_x1, int dst_y1, int dst_pitch,
+ int width, int height, int bpp)
+{
+ const int gen = ibb->gen;
+ uint32_t cmd_bits = 0;
+ uint32_t br13_bits;
+
+ igt_assert(bpp*(src_x1 + width) <= 8*src_pitch);
+ igt_assert(bpp*(dst_x1 + width) <= 8*dst_pitch);
+ igt_assert(src_pitch * (src_y1 + height) <= src->size);
+ igt_assert(dst_pitch * (dst_y1 + height) <= dst->size);
+
+ if (gen >= 4 && src->tiling != I915_TILING_NONE) {
+ src_pitch /= 4;
+ cmd_bits |= XY_SRC_COPY_BLT_SRC_TILED;
+ }
+
+ if (gen >= 4 && dst->tiling != I915_TILING_NONE) {
+ dst_pitch /= 4;
+ cmd_bits |= XY_SRC_COPY_BLT_DST_TILED;
+ }
+
+ CHECK_RANGE(src_x1); CHECK_RANGE(src_y1);
+ CHECK_RANGE(dst_x1); CHECK_RANGE(dst_y1);
+ CHECK_RANGE(width); CHECK_RANGE(height);
+ CHECK_RANGE(src_x1 + width); CHECK_RANGE(src_y1 + height);
+ CHECK_RANGE(dst_x1 + width); CHECK_RANGE(dst_y1 + height);
+ CHECK_RANGE(src_pitch); CHECK_RANGE(dst_pitch);
+
+ br13_bits = 0;
+ switch (bpp) {
+ case 8:
+ break;
+ case 16: /* supporting only RGB565, not ARGB1555 */
+ br13_bits |= 1 << 24;
+ break;
+ case 32:
+ br13_bits |= 3 << 24;
+ cmd_bits |= XY_SRC_COPY_BLT_WRITE_ALPHA |
+ XY_SRC_COPY_BLT_WRITE_RGB;
+ break;
+ default:
+ igt_fail(IGT_EXIT_FAILURE);
+ }
+
+ intel_bb_blit_start(ibb, cmd_bits);
+ intel_bb_out(ibb, (br13_bits) |
+ (0xcc << 16) | /* copy ROP */
+ dst_pitch);
+ intel_bb_out(ibb, (dst_y1 << 16) | dst_x1); /* dst x1,y1 */
+ intel_bb_out(ibb, ((dst_y1 + height) << 16) | (dst_x1 + width)); /* dst x2,y2 */
+ intel_bb_emit_reloc_fenced(ibb, dst->handle,
+ I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
+ 0, dst->addr.offset);
+ intel_bb_out(ibb, (src_y1 << 16) | src_x1); /* src x1,y1 */
+ intel_bb_out(ibb, src_pitch);
+ intel_bb_emit_reloc_fenced(ibb, src->handle,
+ I915_GEM_DOMAIN_RENDER, 0,
+ 0, src->addr.offset);
+
+#define CMD_POLY_STIPPLE_OFFSET 0x7906
+ if (gen == 5) {
+ intel_bb_out(ibb, CMD_POLY_STIPPLE_OFFSET << 16);
+ intel_bb_out(ibb, 0);
+ }
+
+ if (gen >= 6 && src->handle == dst->handle) {
+ intel_bb_out(ibb, XY_SETUP_CLIP_BLT_CMD);
+ intel_bb_out(ibb, 0);
+ intel_bb_out(ibb, 0);
+ }
+
+ intel_bb_flush(ibb);
}
diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h
index 0649fc22..d0bd0197 100644
--- a/lib/intel_batchbuffer.h
+++ b/lib/intel_batchbuffer.h
@@ -433,6 +433,7 @@ struct intel_bb {
int i915;
int gen;
bool debug;
+ bool enforce_relocs;
uint32_t devid;
uint32_t handle;
uint32_t size;
@@ -457,9 +458,12 @@ struct intel_bb {
};
struct intel_bb *intel_bb_create(int i915, uint32_t size);
-
+struct intel_bb *intel_bb_create_with_relocs(int i915, uint32_t size);
void intel_bb_destroy(struct intel_bb *ibb);
void intel_bb_reset(struct intel_bb *ibb, bool purge_objects_cache);
+void intel_bb_sync(struct intel_bb *ibb);
+void intel_bb_print(struct intel_bb *ibb);
+void intel_bb_dump(struct intel_bb *ibb, const char *filename);
void intel_bb_set_debug(struct intel_bb *ibb, bool debug);
static inline uint32_t intel_bb_offset(struct intel_bb *ibb)
@@ -479,10 +483,22 @@ static inline void intel_bb_ptr_add(struct intel_bb *ibb, uint32_t offset)
intel_bb_ptr_set(ibb, intel_bb_offset(ibb) + offset);
}
-static inline void intel_bb_ptr_align(struct intel_bb *ibb,
+static inline uint32_t intel_bb_ptr_add_return_prev_offset(struct intel_bb *ibb,
+ uint32_t offset)
+{
+ uint32_t previous_offset = intel_bb_offset(ibb);
+
+ intel_bb_ptr_set(ibb, previous_offset + offset);
+
+ return previous_offset;
+}
+
+static inline void *intel_bb_ptr_align(struct intel_bb *ibb,
uint32_t alignment)
{
intel_bb_ptr_set(ibb, ALIGN(intel_bb_offset(ibb), alignment));
+
+ return (void *) ibb->ptr;
}
static inline void *intel_bb_ptr(struct intel_bb *ibb)
@@ -510,6 +526,13 @@ uint64_t intel_bb_emit_reloc(struct intel_bb *ibb,
uint64_t delta,
uint64_t presumed_offset);
+uint64_t intel_bb_emit_reloc_fenced(struct intel_bb *ibb,
+ uint32_t handle,
+ uint32_t read_domains,
+ uint32_t write_domain,
+ uint64_t delta,
+ uint64_t presumed_offset);
+
uint64_t intel_bb_offset_reloc(struct intel_bb *ibb,
uint32_t handle,
uint32_t read_domains,
@@ -517,6 +540,14 @@ uint64_t intel_bb_offset_reloc(struct intel_bb *ibb,
uint32_t offset,
uint64_t presumed_offset);
+uint64_t intel_bb_offset_reloc_with_delta(struct intel_bb *ibb,
+ uint32_t handle,
+ uint32_t read_domains,
+ uint32_t write_domain,
+ uint32_t delta,
+ uint32_t offset,
+ uint64_t presumed_offset);
+
int __intel_bb_exec(struct intel_bb *ibb, uint32_t end_offset,
uint32_t ctx, uint64_t flags, bool sync);
@@ -529,4 +560,21 @@ void intel_bb_exec_with_context(struct intel_bb *ibb, uint32_t end_offset,
uint64_t intel_bb_get_object_offset(struct intel_bb *ibb, uint32_t handle);
bool intel_bb_object_offset_to_buf(struct intel_bb *ibb, struct intel_buf *buf);
+uint32_t intel_bb_out_flush(struct intel_bb *ibb);
+void intel_bb_flush_with_context(struct intel_bb *ibb, uint32_t ctx);
+void intel_bb_flush_on_ring(struct intel_bb *ibb, int ring);
+void intel_bb_flush(struct intel_bb *ibb);
+
+uint32_t intel_bb_copy_data(struct intel_bb *ibb,
+ const void *data, unsigned int bytes,
+ uint32_t align);
+
+void intel_bb_blit_start(struct intel_bb *ibb, uint32_t flags);
+
+void intel_bb_blt_copy(struct intel_bb *ibb,
+ struct intel_buf *src,
+ int src_x1, int src_y1, int src_pitch,
+ struct intel_buf *dst,
+ int dst_x1, int dst_y1, int dst_pitch,
+ int width, int height, int bpp);
#endif
--
2.26.0
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^ permalink raw reply related [flat|nested] 8+ messages in thread* [igt-dev] [PATCH i-g-t v3 2/4] lib/intel_bufops: Add new functions and intel_buf fields
2020-06-23 13:00 [igt-dev] [PATCH i-g-t v3 0/4] Add api_intel_bb test Zbigniew Kempczyński
2020-06-23 13:00 ` [igt-dev] [PATCH i-g-t v3 1/4] lib/intel_batchbuffer: Extend intel_bb Zbigniew Kempczyński
@ 2020-06-23 13:00 ` Zbigniew Kempczyński
2020-06-23 13:00 ` [igt-dev] [PATCH i-g-t v3 3/4] tests/api_intel_bb: Add intel_bb API test Zbigniew Kempczyński
` (3 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Zbigniew Kempczyński @ 2020-06-23 13:00 UTC (permalink / raw)
To: igt-dev; +Cc: Chris Wilson
This is minor step toward removing libdrm from rendercopy. Lets
add new functions and structure fields to verify we don't introduce
regressions in already migrated code.
Some utility functions - write buf/aux (ccs) to png were added.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
lib/intel_bufops.c | 135 ++++++++++++++++++++++++++++++++++++++++++---
lib/intel_bufops.h | 24 +++++++-
2 files changed, 149 insertions(+), 10 deletions(-)
diff --git a/lib/intel_bufops.c b/lib/intel_bufops.c
index 0337b638..13d01396 100644
--- a/lib/intel_bufops.c
+++ b/lib/intel_bufops.c
@@ -23,6 +23,7 @@
*/
#include <sys/ioctl.h>
+#include <cairo.h>
#include "igt.h"
#include "igt_x86.h"
#include "intel_bufops.h"
@@ -174,10 +175,14 @@ static bool __get_tiling(int fd, uint32_t handle, uint32_t *tiling,
}
static int __set_tiling(int fd, uint32_t handle, uint32_t tiling,
- uint32_t stride)
+ uint32_t stride,
+ uint32_t *ret_tiling, uint32_t *ret_swizzle)
{
+ struct drm_i915_gem_set_tiling st;
+
+ memset(&st, 0, sizeof(st));
do {
- struct drm_i915_gem_set_tiling st;
+
int err;
st.handle = handle;
@@ -188,13 +193,22 @@ static int __set_tiling(int fd, uint32_t handle, uint32_t tiling,
if (ioctl(fd, DRM_IOCTL_I915_GEM_SET_TILING, &st))
err = -errno;
errno = 0;
- if (err != -EINTR)
+ if (err != -EINTR) {
+ if (ret_tiling)
+ *ret_tiling = st.tiling_mode;
+
+ if (ret_swizzle)
+ *ret_swizzle = st.swizzle_mode;
+
return err;
+ }
} while (1);
}
static void set_hw_tiled(struct buf_ops *bops, struct intel_buf *buf)
{
+ uint32_t ret_tiling, ret_swizzle;
+
if (buf->tiling != I915_TILING_X && buf->tiling != I915_TILING_Y)
return;
@@ -202,8 +216,12 @@ static void set_hw_tiled(struct buf_ops *bops, struct intel_buf *buf)
return;
igt_assert_eq(__set_tiling(bops->fd,
- buf->handle, buf->tiling, buf->stride),
+ buf->handle, buf->tiling, buf->stride,
+ &ret_tiling, &ret_swizzle),
0);
+
+ igt_assert(ret_tiling == buf->tiling);
+ buf->swizzle_mode = ret_swizzle;
}
static unsigned long swizzle_bit(unsigned int bit, unsigned long offset)
@@ -697,7 +715,6 @@ static void __intel_buf_init(struct buf_ops *bops,
igt_require(bops->intel_gen >= 9);
igt_assert(req_tiling == I915_TILING_Y ||
req_tiling == I915_TILING_Yf);
-
/*
* On GEN12+ we align the main surface to 4 * 4 main surface
* tiles, which is 64kB. These 16 tiles are mapped by 4 AUX
@@ -724,7 +741,6 @@ static void __intel_buf_init(struct buf_ops *bops,
buf->aux.stride = aux_width;
size = buf->aux.offset + aux_width * aux_height;
-
} else {
if (buf->tiling) {
devid = intel_get_drm_devid(bops->fd);
@@ -826,6 +842,98 @@ void intel_buf_init_using_handle(struct buf_ops *bops,
req_tiling, compression);
}
+struct intel_buf *intel_buf_create(struct buf_ops *bops,
+ int width, int height,
+ int bpp, int alignment,
+ uint32_t req_tiling, uint32_t compression)
+{
+ struct intel_buf *buf;
+
+ igt_assert(bops);
+
+ buf = calloc(1, sizeof(*buf));
+ igt_assert(buf);
+
+ intel_buf_init(bops, buf, width, height, bpp, alignment,
+ req_tiling, compression);
+
+ return buf;
+}
+
+void intel_buf_destroy(struct intel_buf *buf)
+{
+ igt_assert(buf);
+
+ intel_buf_close(buf->bops, buf);
+ free(buf);
+}
+
+void intel_buf_print(const struct intel_buf *buf)
+{
+ igt_info("[name: %s]\n", buf->name);
+ igt_info("[%u]: w: %u, h: %u, stride: %u, size: %u, bo-size: %u, "
+ "bpp: %u, tiling: %u, compress: %u\n",
+ buf->handle, intel_buf_width(buf), intel_buf_height(buf),
+ buf->stride, buf->size,
+ intel_buf_bo_size(buf), buf->bpp,
+ buf->tiling, buf->compression);
+ igt_info(" aux <offset: %u, stride: %u, w: %u, h: %u> cc <offset: %u>\n",
+ buf->aux.offset,
+ intel_buf_aux_width(buf->bops->intel_gen, buf),
+ intel_buf_aux_height(buf->bops->intel_gen, buf),
+ buf->aux.stride, buf->cc.offset);
+ igt_info(" addr <offset: %p, ctx: %u>\n",
+ from_user_pointer(buf->addr.offset), buf->addr.ctx);
+}
+
+const char *intel_buf_set_name(struct intel_buf *buf, const char *name)
+{
+ return strncpy(buf->name, name, INTEL_BUF_NAME_MAXSIZE);
+}
+
+static void __intel_buf_write_to_png(struct buf_ops *bops,
+ struct intel_buf *buf,
+ const char *filename,
+ bool write_aux)
+{
+ cairo_surface_t *surface;
+ cairo_status_t ret;
+ void *linear;
+ int format, width, height, stride, offset;
+ int gen = bops->intel_gen;
+
+ igt_assert_eq(posix_memalign(&linear, 16, intel_buf_bo_size(buf)), 0);
+
+ format = write_aux ? CAIRO_FORMAT_A8 : CAIRO_FORMAT_RGB24;
+ width = write_aux ? intel_buf_aux_width(gen, buf) : intel_buf_width(buf);
+ height = write_aux ? intel_buf_aux_height(gen, buf) : intel_buf_height(buf);
+ stride = write_aux ? buf->aux.stride : buf->stride;
+ offset = write_aux ? buf->aux.offset : 0;
+
+ intel_buf_to_linear(bops, buf, linear);
+
+ surface = cairo_image_surface_create_for_data((uint8_t *) linear + offset,
+ format, width, height,
+ stride);
+ ret = cairo_surface_write_to_png(surface, filename);
+ igt_assert(ret == CAIRO_STATUS_SUCCESS);
+ cairo_surface_destroy(surface);
+
+ free(linear);
+}
+
+void intel_buf_write_to_png(struct intel_buf *buf, const char *filename)
+{
+ __intel_buf_write_to_png(buf->bops, buf, filename, false);
+}
+
+void intel_buf_write_aux_to_png(struct intel_buf *buf, const char *filename)
+{
+ igt_assert(buf->compression);
+
+ __intel_buf_write_to_png(buf->bops, buf, filename, true);
+}
+
#define DEFAULT_BUFOPS(__gen_start, __gen_end) \
.gen_start = __gen_start, \
.gen_end = __gen_end, \
@@ -876,7 +984,7 @@ static bool probe_hw_tiling(struct buf_ops *bops, uint32_t tiling)
handle = gem_create(bops->fd, size);
/* Single shot, if no fences are available we fail immediately */
- ret = __set_tiling(bops->fd, handle, tiling, stride);
+ ret = __set_tiling(bops->fd, handle, tiling, stride, NULL, NULL);
if (ret)
goto end;
@@ -956,6 +1064,15 @@ static void idempotency_selftest(struct buf_ops *bops, uint32_t tiling)
buf_ops_set_software_tiling(bops, tiling, false);
}
+int intel_buf_bo_size(const struct intel_buf *buf)
+{
+ int offset = CCS_OFFSET(buf) ?: buf->size;
+ int ccs_size = buf->compression ?
+ CCS_SIZE(buf->bops->intel_gen, buf) : 0;
+
+ return offset + ccs_size;
+}
+
/**
* buf_ops_create
* @fd: device filedescriptor
@@ -1061,12 +1178,12 @@ void buf_ops_destroy(struct buf_ops *bops)
}
/**
- * buf_ops_getfd
+ * buf_ops_get_fd
* @bops: pointer to buf_ops
*
* Returns: drm fd
*/
-int buf_ops_getfd(struct buf_ops *bops)
+int buf_ops_get_fd(struct buf_ops *bops)
{
igt_assert(bops);
diff --git a/lib/intel_bufops.h b/lib/intel_bufops.h
index 95217cfe..ab19d916 100644
--- a/lib/intel_bufops.h
+++ b/lib/intel_bufops.h
@@ -6,6 +6,7 @@
struct buf_ops;
+#define INTEL_BUF_NAME_MAXSIZE 32
struct intel_buf {
struct buf_ops *bops;
uint32_t handle;
@@ -14,14 +15,21 @@ struct intel_buf {
uint32_t bpp;
uint32_t size;
uint32_t compression;
+ uint32_t swizzle_mode;
struct {
uint32_t offset;
uint32_t stride;
} aux;
+ struct {
+ uint32_t offset;
+ } cc;
struct {
uint64_t offset;
uint32_t ctx;
} addr;
+
+ /* For debugging purposes */
+ char name[INTEL_BUF_NAME_MAXSIZE + 1];
};
static inline unsigned int intel_buf_width(const struct intel_buf *buf)
@@ -62,9 +70,11 @@ intel_buf_aux_height(int gen, const struct intel_buf *buf)
return DIV_ROUND_UP(intel_buf_height(buf), 512) * 32;
}
+int intel_buf_bo_size(const struct intel_buf *buf);
+
struct buf_ops *buf_ops_create(int fd);
void buf_ops_destroy(struct buf_ops *bops);
-int buf_ops_getfd(struct buf_ops *bops);
+int buf_ops_get_fd(struct buf_ops *bops);
bool buf_ops_set_software_tiling(struct buf_ops *bops,
uint32_t tiling,
@@ -90,4 +100,16 @@ void intel_buf_init_using_handle(struct buf_ops *bops,
int width, int height, int bpp, int alignment,
uint32_t req_tiling, uint32_t compression);
+struct intel_buf *intel_buf_create(struct buf_ops *bops,
+ int width, int height,
+ int bpp, int alignment,
+ uint32_t req_tiling, uint32_t compression);
+void intel_buf_destroy(struct intel_buf *buf);
+
+void intel_buf_print(const struct intel_buf *buf);
+const char *intel_buf_set_name(struct intel_buf *buf, const char *name);
+
+void intel_buf_write_to_png(struct intel_buf *buf, const char *filename);
+void intel_buf_write_aux_to_png(struct intel_buf *buf, const char *filename);
+
#endif
--
2.26.0
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 8+ messages in thread* [igt-dev] [PATCH i-g-t v3 3/4] tests/api_intel_bb: Add intel_bb API test
2020-06-23 13:00 [igt-dev] [PATCH i-g-t v3 0/4] Add api_intel_bb test Zbigniew Kempczyński
2020-06-23 13:00 ` [igt-dev] [PATCH i-g-t v3 1/4] lib/intel_batchbuffer: Extend intel_bb Zbigniew Kempczyński
2020-06-23 13:00 ` [igt-dev] [PATCH i-g-t v3 2/4] lib/intel_bufops: Add new functions and intel_buf fields Zbigniew Kempczyński
@ 2020-06-23 13:00 ` Zbigniew Kempczyński
2020-06-23 13:00 ` [igt-dev] [PATCH i-g-t v3 4/4] HAX: run api_intel_bb tests and check (gpgpu|media)_fill are ok Zbigniew Kempczyński
` (2 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Zbigniew Kempczyński @ 2020-06-23 13:00 UTC (permalink / raw)
To: igt-dev; +Cc: Chris Wilson
IGT code contains some mechanisms which are quite large and cover
different gens so they deserve own api_* checks.
Starting with api_intel_bb verify intel_bb functions work as expected.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
tests/i915/api_intel_bb.c | 563 ++++++++++++++++++++++++++++++++++++++
tests/meson.build | 1 +
2 files changed, 564 insertions(+)
create mode 100644 tests/i915/api_intel_bb.c
diff --git a/tests/i915/api_intel_bb.c b/tests/i915/api_intel_bb.c
new file mode 100644
index 00000000..ecc5c156
--- /dev/null
+++ b/tests/i915/api_intel_bb.c
@@ -0,0 +1,563 @@
+/*
+ * Copyright © 2020 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include "igt.h"
+#include <unistd.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <fcntl.h>
+#include <inttypes.h>
+#include <cairo.h>
+#include <errno.h>
+#include <sys/stat.h>
+#include <sys/ioctl.h>
+#include "intel_bufops.h"
+
+#define PAGE_SIZE 4096
+
+#define WIDTH 64
+#define HEIGHT 64
+#define COLOR_00 0x00
+#define COLOR_33 0x33
+#define COLOR_77 0x77
+#define COLOR_CC 0xcc
+
+IGT_TEST_DESCRIPTION("intel_bb API check.");
+
+enum reloc_objects {
+ RELOC,
+ NORELOC,
+};
+
+enum obj_cache_ops {
+ PURGE_CACHE,
+ KEEP_CACHE,
+};
+
+static bool debug_bb = false;
+static bool write_png = false;
+static bool buf_info = false;
+
+static void *alloc_aligned(uint64_t size)
+{
+ void *p;
+
+ igt_assert_eq(posix_memalign(&p, 16, size), 0);
+
+ return p;
+}
+
+static void fill_buf(struct intel_buf *buf, uint8_t color)
+{
+ uint8_t *ptr;
+ int i915 = buf_ops_get_fd(buf->bops);
+ int i;
+
+ ptr = gem_mmap__device_coherent(i915, buf->handle, 0, buf->size,
+ PROT_WRITE);
+
+ for (i = 0; i < buf->size; i++)
+ ptr[i] = color;
+
+ munmap(ptr, buf->size);
+}
+
+static void check_buf(struct intel_buf *buf, uint8_t color)
+{
+ uint8_t *ptr;
+ int i915 = buf_ops_get_fd(buf->bops);
+ int i;
+
+ ptr = gem_mmap__device_coherent(i915, buf->handle, 0, buf->size,
+ PROT_READ);
+
+ for (i = 0; i < buf->size; i++)
+ igt_assert(ptr[i] == color);
+
+ munmap(ptr, buf->size);
+}
+
+
+static struct intel_buf *
+create_buf(struct buf_ops *bops, int width, int height, uint8_t color)
+{
+ struct intel_buf *buf;
+
+ buf = calloc(1, sizeof(*buf));
+ igt_assert(buf);
+
+ intel_buf_init(bops, buf, width/4, height, 32, 0, I915_TILING_NONE, 0);
+ fill_buf(buf, color);
+
+ return buf;
+}
+
+static void print_buf(struct intel_buf *buf, const char *name)
+{
+ uint8_t *ptr;
+ int i915 = buf_ops_get_fd(buf->bops);
+
+ ptr = gem_mmap__device_coherent(i915, buf->handle, 0, buf->size,
+ PROT_READ);
+ igt_debug("[%s] Buf handle: %d, size: %d, v: 0x%02x\n", name,
+ buf->handle, buf->size, ptr[0]);
+ munmap(ptr, buf->size);
+}
+
+static void simple_bb(struct buf_ops *bops)
+{
+ int i915 = buf_ops_get_fd(bops);
+ struct intel_bb *ibb;
+ uint32_t ctx;
+
+ gem_require_contexts(i915);
+
+ ctx = gem_context_create(i915);
+ ibb = intel_bb_create(i915, PAGE_SIZE);
+ if (debug_bb)
+ intel_bb_set_debug(ibb, true);
+
+ intel_bb_out(ibb, MI_BATCH_BUFFER_END);
+ intel_bb_ptr_align(ibb, 8);
+
+ intel_bb_exec(ibb, intel_bb_offset(ibb),
+ I915_EXEC_DEFAULT | I915_EXEC_NO_RELOC, true);
+
+ /* Check we're safe with reset and no double-free will occur */
+ intel_bb_reset(ibb, true);
+ intel_bb_reset(ibb, false);
+ intel_bb_reset(ibb, true);
+
+ intel_bb_out(ibb, MI_BATCH_BUFFER_END);
+ intel_bb_ptr_align(ibb, 8);
+
+ intel_bb_exec_with_context(ibb, intel_bb_offset(ibb), ctx,
+ I915_EXEC_DEFAULT | I915_EXEC_NO_RELOC, true);
+
+ intel_bb_destroy(ibb);
+ gem_context_destroy(i915, ctx);
+}
+
+static void __emit_blit(struct intel_bb *ibb,
+ struct intel_buf *src, struct intel_buf *dst)
+{
+ bool has_64b_reloc;
+
+ has_64b_reloc = ibb->gen >= 8;
+
+ intel_bb_out(ibb,
+ XY_SRC_COPY_BLT_CMD |
+ XY_SRC_COPY_BLT_WRITE_ALPHA |
+ XY_SRC_COPY_BLT_WRITE_RGB |
+ (6 + 2 * has_64b_reloc));
+ intel_bb_out(ibb, 3 << 24 | 0xcc << 16 | dst->stride);
+ intel_bb_out(ibb, 0);
+ intel_bb_out(ibb, intel_buf_height(dst) << 16 | intel_buf_width(dst));
+ intel_bb_emit_reloc_fenced(ibb, dst->handle,
+ I915_GEM_DOMAIN_RENDER,
+ I915_GEM_DOMAIN_RENDER,
+ 0, 0x0);
+ intel_bb_out(ibb, 0);
+ intel_bb_out(ibb, src->stride);
+ intel_bb_emit_reloc_fenced(ibb, src->handle,
+ I915_GEM_DOMAIN_RENDER, 0,
+ 0, 0x0);
+
+ intel_bb_out(ibb, MI_BATCH_BUFFER_END);
+ intel_bb_ptr_align(ibb, 8);
+}
+
+static void blit(struct buf_ops *bops,
+ enum reloc_objects reloc_obj,
+ enum obj_cache_ops cache_op)
+{
+ int i915 = buf_ops_get_fd(bops);
+ struct intel_bb *ibb;
+ struct intel_buf *src, *dst;
+ uint64_t poff_bb, poff_src, poff_dst;
+ uint64_t poff2_bb, poff2_src, poff2_dst;
+ uint64_t flags = I915_EXEC_BLT;
+ bool purge_cache = cache_op == PURGE_CACHE ? true : false;
+ bool do_relocs = reloc_obj == RELOC ? true : false;
+
+ src = create_buf(bops, WIDTH, HEIGHT, COLOR_CC);
+ dst = create_buf(bops, WIDTH, HEIGHT, COLOR_00);
+
+ if (buf_info) {
+ print_buf(src, "src");
+ print_buf(dst, "dst");
+ }
+
+ if (do_relocs) {
+ ibb = intel_bb_create_with_relocs(i915, PAGE_SIZE);
+ } else {
+ ibb = intel_bb_create(i915, PAGE_SIZE);
+ flags |= I915_EXEC_NO_RELOC;
+ }
+
+ if (debug_bb)
+ intel_bb_set_debug(ibb, true);
+
+ __emit_blit(ibb, src, dst);
+
+ /* We expect initial addresses are zeroed for relocs */
+ if (reloc_obj == RELOC) {
+ igt_assert(intel_bb_get_object_offset(ibb, ibb->handle) == 0);
+ igt_assert(intel_bb_get_object_offset(ibb, src->handle) == 0);
+ igt_assert(intel_bb_get_object_offset(ibb, dst->handle) == 0);
+ }
+
+ intel_bb_exec(ibb, intel_bb_offset(ibb), flags, true);
+ check_buf(dst, COLOR_CC);
+
+ poff_bb = intel_bb_get_object_offset(ibb, ibb->handle);
+ poff_src = intel_bb_get_object_offset(ibb, src->handle);
+ poff_dst = intel_bb_get_object_offset(ibb, dst->handle);
+ igt_debug("bb presumed offset: 0x%lx\n", poff_bb);
+ igt_debug("src presumed offset: 0x%lx\n", poff_src);
+ igt_debug("dst presumed offset: 0x%lx\n", poff_dst);
+
+ intel_bb_reset(ibb, purge_cache);
+
+ fill_buf(src, COLOR_77);
+ fill_buf(dst, COLOR_00);
+
+ __emit_blit(ibb, src, dst);
+
+ poff2_bb = intel_bb_get_object_offset(ibb, ibb->handle);
+ poff2_src = intel_bb_get_object_offset(ibb, src->handle);
+ poff2_dst = intel_bb_get_object_offset(ibb, dst->handle);
+ igt_debug("bb2 presumed offset: 0x%lx\n", poff2_bb);
+ igt_debug("src2 presumed offset: 0x%lx\n", poff2_src);
+ igt_debug("dst2 presumed offset: 0x%lx\n", poff2_dst);
+ if (purge_cache) {
+ if (do_relocs) {
+ igt_assert(poff2_bb == 0);
+ igt_assert(poff2_src == 0);
+ igt_assert(poff2_dst == 0);
+ } else {
+ igt_assert(poff_bb != poff2_bb);
+ igt_assert(poff_src != poff2_src);
+ igt_assert(poff_dst != poff2_dst);
+ }
+ } else {
+ igt_assert(poff_bb == poff2_bb);
+ igt_assert(poff_src == poff2_src);
+ igt_assert(poff_dst == poff2_dst);
+ }
+
+ intel_bb_exec(ibb, intel_bb_offset(ibb), flags, true);
+ check_buf(dst, COLOR_77);
+
+ poff2_src = intel_bb_get_object_offset(ibb, src->handle);
+ poff2_dst = intel_bb_get_object_offset(ibb, dst->handle);
+ igt_assert(poff_src == poff2_src);
+ igt_assert(poff_dst == poff2_dst);
+
+ intel_bb_destroy(ibb);
+}
+
+static void scratch_buf_init(struct buf_ops *bops,
+ struct intel_buf *buf,
+ int width, int height,
+ uint32_t req_tiling,
+ enum i915_compression compression)
+{
+ int bpp = 32;
+
+ intel_buf_init(bops, buf, width, height, bpp, 0,
+ req_tiling, compression);
+
+ igt_assert(intel_buf_width(buf) == width);
+ igt_assert(intel_buf_height(buf) == height);
+}
+
+static void scratch_buf_draw_pattern(struct buf_ops *bops,
+ struct intel_buf *buf,
+ int x, int y, int w, int h,
+ int cx, int cy, int cw, int ch,
+ bool use_alternate_colors)
+{
+ cairo_surface_t *surface;
+ cairo_pattern_t *pat;
+ cairo_t *cr;
+ void *linear;
+
+ linear = alloc_aligned(buf->size);
+
+ surface = cairo_image_surface_create_for_data(linear,
+ CAIRO_FORMAT_RGB24,
+ intel_buf_width(buf),
+ intel_buf_height(buf),
+ buf->stride);
+
+ cr = cairo_create(surface);
+
+ cairo_rectangle(cr, cx, cy, cw, ch);
+ cairo_clip(cr);
+
+ pat = cairo_pattern_create_mesh();
+ cairo_mesh_pattern_begin_patch(pat);
+ cairo_mesh_pattern_move_to(pat, x, y);
+ cairo_mesh_pattern_line_to(pat, x+w, y);
+ cairo_mesh_pattern_line_to(pat, x+w, y+h);
+ cairo_mesh_pattern_line_to(pat, x, y+h);
+ if (use_alternate_colors) {
+ cairo_mesh_pattern_set_corner_color_rgb(pat, 0, 0.0, 1.0, 1.0);
+ cairo_mesh_pattern_set_corner_color_rgb(pat, 1, 1.0, 0.0, 1.0);
+ cairo_mesh_pattern_set_corner_color_rgb(pat, 2, 1.0, 1.0, 0.0);
+ cairo_mesh_pattern_set_corner_color_rgb(pat, 3, 0.0, 0.0, 0.0);
+ } else {
+ cairo_mesh_pattern_set_corner_color_rgb(pat, 0, 1.0, 0.0, 0.0);
+ cairo_mesh_pattern_set_corner_color_rgb(pat, 1, 0.0, 1.0, 0.0);
+ cairo_mesh_pattern_set_corner_color_rgb(pat, 2, 0.0, 0.0, 1.0);
+ cairo_mesh_pattern_set_corner_color_rgb(pat, 3, 1.0, 1.0, 1.0);
+ }
+ cairo_mesh_pattern_end_patch(pat);
+
+ cairo_rectangle(cr, x, y, w, h);
+ cairo_set_source(cr, pat);
+ cairo_fill(cr);
+ cairo_pattern_destroy(pat);
+
+ cairo_destroy(cr);
+
+ cairo_surface_destroy(surface);
+
+ linear_to_intel_buf(bops, buf, linear);
+
+ free(linear);
+}
+
+static bool compare_bufs(struct intel_buf *buf1, struct intel_buf *buf2)
+{
+ void *ptr1, *ptr2;
+ int fd1, fd2, ret;
+
+ igt_assert(buf1->size == buf2->size);
+
+ fd1 = buf_ops_get_fd(buf1->bops);
+ fd2 = buf_ops_get_fd(buf2->bops);
+
+ ptr1 = gem_mmap__device_coherent(fd1, buf1->handle, 0, buf1->size,
+ PROT_READ);
+ ptr2 = gem_mmap__device_coherent(fd2, buf2->handle, 0, buf2->size,
+ PROT_READ);
+ ret = memcmp(ptr1, ptr2, buf1->size);
+
+ munmap(ptr1, buf1->size);
+ munmap(ptr2, buf2->size);
+
+ return ret;
+}
+
+static void do_intel_bb_blit(struct buf_ops *bops)
+{
+ struct intel_bb *ibb;
+ const int width = 1024;
+ const int height = 1024;
+ struct intel_buf src, dst, final;
+ int i915 = buf_ops_get_fd(bops);
+
+ ibb = intel_bb_create(i915, PAGE_SIZE);
+ if (debug_bb)
+ intel_bb_set_debug(ibb, true);
+
+ scratch_buf_init(bops, &src, width, height, I915_TILING_NONE,
+ I915_COMPRESSION_NONE);
+ scratch_buf_init(bops, &dst, width, height, I915_TILING_Y,
+ I915_COMPRESSION_NONE);
+ scratch_buf_init(bops, &final, width, height, I915_TILING_NONE,
+ I915_COMPRESSION_NONE);
+
+ if (buf_info) {
+ intel_buf_print(&src);
+ intel_buf_print(&dst);
+ }
+
+ scratch_buf_draw_pattern(bops, &src,
+ 0, 0, width, height,
+ 0, 0, width, height, 0);
+
+ intel_bb_blt_copy(ibb,
+ &src, 0, 0, src.stride,
+ &dst, 0, 0, dst.stride,
+ intel_buf_width(&dst),
+ intel_buf_height(&dst),
+ dst.bpp);
+
+ intel_bb_blt_copy(ibb,
+ &dst, 0, 0, dst.stride,
+ &final, 0, 0, final.stride,
+ intel_buf_width(&dst),
+ intel_buf_height(&dst),
+ dst.bpp);
+
+ intel_bb_destroy(ibb);
+
+ if (write_png) {
+ intel_buf_write_to_png(&src, "bb_blit_src_tiling_none.png");
+ intel_buf_write_to_png(&dst, "bb_blit_dst_tiling_y.png");
+ intel_buf_write_to_png(&final, "bb_blit_final_tiling_none.png");
+ }
+
+ igt_assert(compare_bufs(&src, &dst) != 0);
+ igt_assert(compare_bufs(&src, &final) == 0);
+
+ intel_buf_close(bops, &src);
+ intel_buf_close(bops, &dst);
+ intel_buf_close(bops, &final);
+}
+
+
+static void offset_control(struct buf_ops *bops)
+{
+ int i915 = buf_ops_get_fd(bops);
+ struct intel_bb *ibb;
+ struct intel_buf *src, *dst1, *dst2, *dst3;
+ uint64_t poff_src, poff_dst1, poff_dst2;
+
+ ibb = intel_bb_create(i915, PAGE_SIZE);
+ if (debug_bb)
+ intel_bb_set_debug(ibb, true);
+
+ src = create_buf(bops, WIDTH, HEIGHT, COLOR_CC);
+ dst1 = create_buf(bops, WIDTH, HEIGHT, COLOR_00);
+ dst2 = create_buf(bops, WIDTH, HEIGHT, COLOR_77);
+
+ intel_bb_add_object(ibb, src->handle, src->addr.offset, false);
+ intel_bb_add_object(ibb, dst1->handle, dst1->addr.offset, true);
+ intel_bb_add_object(ibb, dst2->handle, dst2->addr.offset, true);
+
+ intel_bb_out(ibb, MI_BATCH_BUFFER_END);
+ intel_bb_ptr_align(ibb, 8);
+
+ intel_bb_exec(ibb, intel_bb_offset(ibb),
+ I915_EXEC_DEFAULT | I915_EXEC_NO_RELOC, false);
+
+ if (buf_info) {
+ print_buf(src, "src ");
+ print_buf(dst1, "dst1");
+ print_buf(dst2, "dst2");
+ }
+
+ igt_assert(intel_bb_object_offset_to_buf(ibb, src) == true);
+ igt_assert(intel_bb_object_offset_to_buf(ibb, dst1) == true);
+ igt_assert(intel_bb_object_offset_to_buf(ibb, dst2) == true);
+ poff_src = src->addr.offset;
+ poff_dst1 = dst1->addr.offset;
+ poff_dst2 = dst2->addr.offset;
+ intel_bb_reset(ibb, true);
+
+ dst3 = create_buf(bops, WIDTH, HEIGHT, COLOR_33);
+ intel_bb_add_object(ibb, dst3->handle, dst3->addr.offset, true);
+ intel_bb_add_object(ibb, src->handle, src->addr.offset, false);
+ intel_bb_add_object(ibb, dst1->handle, dst1->addr.offset, true);
+ intel_bb_add_object(ibb, dst2->handle, dst2->addr.offset, true);
+
+ intel_bb_out(ibb, MI_BATCH_BUFFER_END);
+ intel_bb_ptr_align(ibb, 8);
+
+ intel_bb_exec(ibb, intel_bb_offset(ibb),
+ I915_EXEC_DEFAULT | I915_EXEC_NO_RELOC, false);
+ intel_bb_sync(ibb);
+
+ igt_assert(intel_bb_object_offset_to_buf(ibb, src) == true);
+ igt_assert(intel_bb_object_offset_to_buf(ibb, dst1) == true);
+ igt_assert(intel_bb_object_offset_to_buf(ibb, dst2) == true);
+ igt_assert(intel_bb_object_offset_to_buf(ibb, dst3) == true);
+ igt_assert(poff_src == src->addr.offset);
+ igt_assert(poff_dst1 == dst1->addr.offset);
+ igt_assert(poff_dst2 == dst2->addr.offset);
+
+ if (buf_info) {
+ print_buf(src, "src ");
+ print_buf(dst1, "dst1");
+ print_buf(dst2, "dst2");
+ }
+
+ intel_bb_destroy(ibb);
+}
+
+static int opt_handler(int opt, int opt_index, void *data)
+{
+ switch (opt) {
+ case 'd':
+ debug_bb = true;
+ break;
+ case 'p':
+ write_png = true;
+ break;
+ case 'i':
+ buf_info = true;
+ break;
+ default:
+ return IGT_OPT_HANDLER_ERROR;
+ }
+
+ return IGT_OPT_HANDLER_SUCCESS;
+}
+
+const char *help_str =
+ " -d\tDebug bb\n"
+ " -p\tWrite surfaces to png\n"
+ " -i\tPrint buffer info\n"
+ ;
+
+igt_main_args("dpi", NULL, help_str, opt_handler, NULL)
+{
+ int i915;
+ struct buf_ops *bops;
+
+ igt_fixture {
+ i915 = drm_open_driver(DRIVER_INTEL);
+ bops = buf_ops_create(i915);
+ }
+
+ igt_subtest("simple-bb")
+ simple_bb(bops);
+
+ igt_subtest("blit-noreloc-keep-cache")
+ blit(bops, NORELOC, KEEP_CACHE);
+
+ igt_subtest("blit-reloc-purge-cache")
+ blit(bops, RELOC, PURGE_CACHE);
+
+ igt_subtest("blit-noreloc-purge-cache")
+ blit(bops, NORELOC, PURGE_CACHE);
+
+ igt_subtest("blit-reloc-keep-cache")
+ blit(bops, RELOC, KEEP_CACHE);
+
+ igt_subtest("intel-bb-blit")
+ do_intel_bb_blit(bops);
+
+ igt_subtest("offset-control")
+ offset_control(bops);
+
+ igt_fixture {
+ buf_ops_destroy(bops);
+ close(i915);
+ }
+}
diff --git a/tests/meson.build b/tests/meson.build
index 28091794..06a47e37 100644
--- a/tests/meson.build
+++ b/tests/meson.build
@@ -103,6 +103,7 @@ test_progs = [
]
i915_progs = [
+ 'api_intel_bb',
'gen3_mixed_blits',
'gen3_render_linear_blits',
'gen3_render_mixed_blits',
--
2.26.0
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