* [igt-dev] [PATCH i-g-t v3] tests/i915/gem_blits: Added XY_FAST_COPY_BLT support for gem_blits @ 2022-12-05 17:01 Vikas Srivastava 2022-12-05 19:06 ` [igt-dev] ✗ Fi.CI.BAT: failure for " Patchwork 2022-12-08 17:37 ` [igt-dev] [PATCH i-g-t v3] " Kamil Konieczny 0 siblings, 2 replies; 3+ messages in thread From: Vikas Srivastava @ 2022-12-05 17:01 UTC (permalink / raw) To: igt-dev, kamil.konieczny From: Arjun Melkaveri <arjun.melkaveri@intel.com> Test case uses legacy command which is not supported starting from PVC. Modified test to use XY_FAST_COPY_BLT. Signed-off-by: Arjun Melkaveri <arjun.melkaveri@intel.com> Signed-off-by: Vikas Srivastava <vikas.srivastava@intel.com> Acked-by: Priyanka Dandamudi <priyanka.dandamudi@intel.com> --- lib/intel_batchbuffer.c | 33 ++++++++++++--- lib/intel_batchbuffer.h | 6 +++ tests/i915/gem_blits.c | 94 ++++++++++++++++++++++++++--------------- 3 files changed, 94 insertions(+), 39 deletions(-) diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c index 19a1fbe4d..6a61cbd2f 100644 --- a/lib/intel_batchbuffer.c +++ b/lib/intel_batchbuffer.c @@ -605,8 +605,19 @@ static uint32_t fast_copy_pitch(unsigned int stride, unsigned int tiling) return stride; } -static uint32_t fast_copy_dword0(unsigned int src_tiling, - unsigned int dst_tiling) +/** + * fast_copy_dword0: + * @src_tiling: The tile format supported by source + * @dst_tiling: The tile format supported by destination + * + * Set the source and destination tile format types bits for fast copy. + * + * Returns: + * The dwords that will conatin the set bit for source and destination tiling. + */ + +uint32_t fast_copy_dword0(unsigned int src_tiling, + unsigned int dst_tiling) { uint32_t dword0 = 0; @@ -649,9 +660,21 @@ static uint32_t fast_copy_dword0(unsigned int src_tiling, return dword0; } -static uint32_t fast_copy_dword1(unsigned int src_tiling, - unsigned int dst_tiling, - int bpp) +/** + * fast_copy_dword1: + * @src_tiling: The tile format supported by source + * @dst_tiling: The tile format supported by destination + * @bpp: Fast copy color depth parameter + + * Set the source and destination tile format types and color depth bits for fast copy. + * + * Returns: + * The dword1 that will conatin the set bit for color depth and source ,destination tiling. + */ + +uint32_t fast_copy_dword1(unsigned int src_tiling, + unsigned int dst_tiling, + int bpp) { uint32_t dword1 = 0; diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h index 2c19c39b1..5ce719951 100644 --- a/lib/intel_batchbuffer.h +++ b/lib/intel_batchbuffer.h @@ -271,6 +271,12 @@ unsigned int igt_buf_intel_ccs_width(unsigned int gen, unsigned int igt_buf_intel_ccs_height(unsigned int gen, const struct igt_buf *buf); +uint32_t fast_copy_dword0(unsigned int src_tiling, + unsigned int dst_tiling); +uint32_t fast_copy_dword1(unsigned int src_tiling, + unsigned int dst_tiling, + int bpp); + void igt_blitter_src_copy(int fd, uint64_t ahnd, uint32_t ctx, diff --git a/tests/i915/gem_blits.c b/tests/i915/gem_blits.c index 24e83b9f5..63dea350c 100644 --- a/tests/i915/gem_blits.c +++ b/tests/i915/gem_blits.c @@ -22,6 +22,7 @@ * */ +#include "intel_batchbuffer.h" #include "i915/gem.h" #include "i915/gem_create.h" #include "igt.h" @@ -33,6 +34,8 @@ #define BCS_SRC_Y (1 << 0) #define BCS_DST_Y (1 << 1) +static uint32_t devid; + struct device { int fd; int gen; @@ -147,8 +150,7 @@ static void buffer_set_tiling(const struct device *device, struct drm_i915_gem_relocation_entry reloc[2]; struct drm_i915_gem_execbuffer2 execbuf; const bool has_64b_reloc = device->gen >= 8; - uint32_t stride, size, pitch; - uint32_t *batch; + uint32_t stride, size, pitch, *batch, dword1; int i; if (buffer->tiling == tiling) @@ -209,19 +211,28 @@ static void buffer_set_tiling(const struct device *device, batch[i++] = mask; } - batch[i] = (XY_SRC_COPY_BLT_CMD | - XY_SRC_COPY_BLT_WRITE_ALPHA | - XY_SRC_COPY_BLT_WRITE_RGB); - if (device->gen >= 4 && buffer->tiling) - batch[i] |= XY_SRC_COPY_BLT_SRC_TILED; - if (device->gen >= 4 && tiling) - batch[i] |= XY_SRC_COPY_BLT_DST_TILED; - batch[i++] |= 6 + 2 * has_64b_reloc; - pitch = stride; if (device->gen >= 4 && tiling) pitch /= 4; - batch[i++] = 3 << 24 | 0xcc << 16 | pitch; + + if (intel_graphics_ver(devid) >= IP_VER(12, 60)) { + batch[i++] = fast_copy_dword0(buffer->tiling, tiling); + /* PVC requires tile4 bit to be set for YMAJOR mode */ + dword1 = fast_copy_dword1( + (buffer->tiling) ? I915_TILING_Yf : I915_TILING_NONE, + (tiling) ? I915_TILING_Yf : I915_TILING_NONE, 32); + batch[i++] = dword1 | pitch; + } else { + batch[i] = (XY_SRC_COPY_BLT_CMD | + XY_SRC_COPY_BLT_WRITE_ALPHA | + XY_SRC_COPY_BLT_WRITE_RGB); + if (device->gen >= 4 && buffer->tiling) + batch[i] |= XY_SRC_COPY_BLT_SRC_TILED; + if (device->gen >= 4 && tiling) + batch[i] |= XY_SRC_COPY_BLT_DST_TILED; + batch[i++] |= 6 + 2 * has_64b_reloc; + batch[i++] = 3 << 24 | 0xcc << 16 | pitch; + } batch[i++] = 0; batch[i++] = buffer->height << 16 | buffer->width; reloc[0].target_handle = obj[0].handle; @@ -298,8 +309,7 @@ static bool blit_to_linear(const struct device *device, struct drm_i915_gem_relocation_entry reloc[2]; struct drm_i915_gem_execbuffer2 execbuf; const bool has_64b_reloc = device->gen >= 8; - uint32_t *batch; - uint32_t pitch; + uint32_t *batch, pitch, dword1; int i = 0; igt_assert(buffer->tiling); @@ -354,14 +364,22 @@ static bool blit_to_linear(const struct device *device, batch[i++] = mask; } - batch[i] = (XY_SRC_COPY_BLT_CMD | - XY_SRC_COPY_BLT_WRITE_ALPHA | - XY_SRC_COPY_BLT_WRITE_RGB); - if (device->gen >= 4 && buffer->tiling) - batch[i] |= XY_SRC_COPY_BLT_SRC_TILED; - batch[i++] |= 6 + 2 * has_64b_reloc; - - batch[i++] = 3 << 24 | 0xcc << 16 | buffer->stride; + if (intel_graphics_ver(devid) >= IP_VER(12, 60)) { + batch[i++] = fast_copy_dword0(buffer->tiling, 0); + /* PVC requires tile4 bit to be set for YMAJOR mode */ + dword1 = fast_copy_dword1( + (buffer->tiling) ? I915_TILING_Yf : I915_TILING_NONE, + 0, 32); + batch[i++] = dword1 | buffer->stride; + } else { + batch[i] = (XY_SRC_COPY_BLT_CMD | + XY_SRC_COPY_BLT_WRITE_ALPHA | + XY_SRC_COPY_BLT_WRITE_RGB); + if (device->gen >= 4 && buffer->tiling) + batch[i] |= XY_SRC_COPY_BLT_SRC_TILED; + batch[i++] |= 6 + 2 * has_64b_reloc; + batch[i++] = 3 << 24 | 0xcc << 16 | buffer->stride; + } batch[i++] = 0; batch[i++] = buffer->height << 16 | buffer->width; reloc[0].target_handle = obj[0].handle; @@ -600,8 +618,7 @@ blit(const struct device *device, struct drm_i915_gem_relocation_entry reloc[2]; struct drm_i915_gem_execbuffer2 execbuf; const bool has_64b_reloc = device->gen >= 8; - uint32_t *batch; - uint32_t pitch; + uint32_t *batch, dword1, pitch; int i = 0; if (src_x < 0) { @@ -689,20 +706,29 @@ blit(const struct device *device, batch[i++] = mask; } - batch[i] = (XY_SRC_COPY_BLT_CMD | - XY_SRC_COPY_BLT_WRITE_ALPHA | - XY_SRC_COPY_BLT_WRITE_RGB); - if (device->gen >= 4 && src->tiling) - batch[i] |= XY_SRC_COPY_BLT_SRC_TILED; - if (device->gen >= 4 && dst->tiling) - batch[i] |= XY_SRC_COPY_BLT_DST_TILED; - batch[i++] |= 6 + 2 * has_64b_reloc; - pitch = dst->stride; if (device->gen >= 4 && dst->tiling) pitch /= 4; - batch[i++] = 3 << 24 | 0xcc << 16 | pitch; + if (intel_graphics_ver(devid) >= IP_VER(12, 60)) { + batch[i++] = fast_copy_dword0(src->tiling, dst->tiling); + /* PVC requires tile4 bit to be set for YMAJOR mode */ + dword1 = fast_copy_dword1( + (src->tiling) ? I915_TILING_Yf : I915_TILING_NONE, + (dst->tiling) ? I915_TILING_Yf : I915_TILING_NONE, + 32); + batch[i++] = dword1 | pitch; + } else { + batch[i] = (XY_SRC_COPY_BLT_CMD | + XY_SRC_COPY_BLT_WRITE_ALPHA | + XY_SRC_COPY_BLT_WRITE_RGB); + if (device->gen >= 4 && src->tiling) + batch[i] |= XY_SRC_COPY_BLT_SRC_TILED; + if (device->gen >= 4 && dst->tiling) + batch[i] |= XY_SRC_COPY_BLT_DST_TILED; + batch[i++] |= 6 + 2 * has_64b_reloc; + batch[i++] = 3 << 24 | 0xcc << 16 | pitch; + } batch[i++] = dst_y << 16 | dst_x; batch[i++] = (height + dst_y) << 16 | (width + dst_x); reloc[0].target_handle = obj[0].handle; -- 2.25.1 ^ permalink raw reply related [flat|nested] 3+ messages in thread
* [igt-dev] ✗ Fi.CI.BAT: failure for tests/i915/gem_blits: Added XY_FAST_COPY_BLT support for gem_blits 2022-12-05 17:01 [igt-dev] [PATCH i-g-t v3] tests/i915/gem_blits: Added XY_FAST_COPY_BLT support for gem_blits Vikas Srivastava @ 2022-12-05 19:06 ` Patchwork 2022-12-08 17:37 ` [igt-dev] [PATCH i-g-t v3] " Kamil Konieczny 1 sibling, 0 replies; 3+ messages in thread From: Patchwork @ 2022-12-05 19:06 UTC (permalink / raw) To: Vikas Srivastava; +Cc: igt-dev [-- Attachment #1: Type: text/plain, Size: 6579 bytes --] == Series Details == Series: tests/i915/gem_blits: Added XY_FAST_COPY_BLT support for gem_blits URL : https://patchwork.freedesktop.org/series/111635/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12468 -> IGTPW_8194 ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with IGTPW_8194 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in IGTPW_8194, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8194/index.html Participating hosts (44 -> 44) ------------------------------ Additional (1): fi-tgl-dsi Missing (1): bat-adlp-6 Possible new issues ------------------- Here are the unknown changes that may have been introduced in IGTPW_8194: ### IGT changes ### #### Possible regressions #### * igt@i915_selftest@live@execlists: - fi-bsw-nick: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12468/fi-bsw-nick/igt@i915_selftest@live@execlists.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8194/fi-bsw-nick/igt@i915_selftest@live@execlists.html Known issues ------------ Here are the changes found in IGTPW_8194 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@i915_selftest@live@hangcheck: - fi-hsw-4770: [PASS][3] -> [INCOMPLETE][4] ([i915#4785]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12468/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8194/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html - fi-rkl-guc: [PASS][5] -> [INCOMPLETE][6] ([i915#4983]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12468/fi-rkl-guc/igt@i915_selftest@live@hangcheck.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8194/fi-rkl-guc/igt@i915_selftest@live@hangcheck.html * igt@kms_chamelium@common-hpd-after-suspend: - fi-ivb-3770: NOTRUN -> [SKIP][7] ([fdo#109271] / [fdo#111827]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8194/fi-ivb-3770/igt@kms_chamelium@common-hpd-after-suspend.html * igt@runner@aborted: - fi-hsw-4770: NOTRUN -> [FAIL][8] ([fdo#109271] / [i915#4312] / [i915#5594]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8194/fi-hsw-4770/igt@runner@aborted.html #### Possible fixes #### * igt@gem_exec_gttfill@basic: - fi-pnv-d510: [FAIL][9] ([i915#7229]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12468/fi-pnv-d510/igt@gem_exec_gttfill@basic.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8194/fi-pnv-d510/igt@gem_exec_gttfill@basic.html * igt@i915_pm_rpm@module-reload: - {bat-rpls-2}: [WARN][11] ([i915#7346]) -> [PASS][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12468/bat-rpls-2/igt@i915_pm_rpm@module-reload.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8194/bat-rpls-2/igt@i915_pm_rpm@module-reload.html * igt@i915_selftest@live@hangcheck: - fi-ivb-3770: [INCOMPLETE][13] ([i915#3303] / [i915#7122]) -> [PASS][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12468/fi-ivb-3770/igt@i915_selftest@live@hangcheck.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8194/fi-ivb-3770/igt@i915_selftest@live@hangcheck.html * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-dp-3: - {bat-dg2-9}: [FAIL][15] ([fdo#103375]) -> [PASS][16] +1 similar issue [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12468/bat-dg2-9/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-dp-3.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8194/bat-dg2-9/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-dp-3.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284 [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285 [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295 [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189 [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 [i915#1759]: https://gitlab.freedesktop.org/drm/intel/issues/1759 [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190 [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301 [i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303 [i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546 [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555 [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103 [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312 [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613 [i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785 [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983 [i915#5594]: https://gitlab.freedesktop.org/drm/intel/issues/5594 [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367 [i915#6434]: https://gitlab.freedesktop.org/drm/intel/issues/6434 [i915#6949]: https://gitlab.freedesktop.org/drm/intel/issues/6949 [i915#6997]: https://gitlab.freedesktop.org/drm/intel/issues/6997 [i915#7058]: https://gitlab.freedesktop.org/drm/intel/issues/7058 [i915#7122]: https://gitlab.freedesktop.org/drm/intel/issues/7122 [i915#7229]: https://gitlab.freedesktop.org/drm/intel/issues/7229 [i915#7346]: https://gitlab.freedesktop.org/drm/intel/issues/7346 [i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456 [i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561 Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_7083 -> IGTPW_8194 CI-20190529: 20190529 CI_DRM_12468: af29385be15ff0c030e00e8d9e48cebab385d7a0 @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_8194: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8194/index.html IGT_7083: c001793d5f22deb01918b6ba52af829794582df1 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8194/index.html [-- Attachment #2: Type: text/html, Size: 6246 bytes --] ^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v3] tests/i915/gem_blits: Added XY_FAST_COPY_BLT support for gem_blits 2022-12-05 17:01 [igt-dev] [PATCH i-g-t v3] tests/i915/gem_blits: Added XY_FAST_COPY_BLT support for gem_blits Vikas Srivastava 2022-12-05 19:06 ` [igt-dev] ✗ Fi.CI.BAT: failure for " Patchwork @ 2022-12-08 17:37 ` Kamil Konieczny 1 sibling, 0 replies; 3+ messages in thread From: Kamil Konieczny @ 2022-12-08 17:37 UTC (permalink / raw) To: igt-dev Hi Vikas, commit subject needs improvement: tests/i915/gem_blits: Added XY_FAST_COPY_BLT support for gem_blits ---------- ^ ------------------------------------------- ^ These are repetition. As Sinjan commented, it is better not to use past tense, so maybe: tests/i915/gem_blits: enable test for MTL and PVC platforms On 2022-12-05 at 22:31:14 +0530, Vikas Srivastava wrote: > From: Arjun Melkaveri <arjun.melkaveri@intel.com> > > Test case uses legacy command which is not supported starting from PVC. > Modified test to use XY_FAST_COPY_BLT. > > Signed-off-by: Arjun Melkaveri <arjun.melkaveri@intel.com> > Signed-off-by: Vikas Srivastava <vikas.srivastava@intel.com> > Acked-by: Priyanka Dandamudi <priyanka.dandamudi@intel.com> > --- > lib/intel_batchbuffer.c | 33 ++++++++++++--- > lib/intel_batchbuffer.h | 6 +++ > tests/i915/gem_blits.c | 94 ++++++++++++++++++++++++++--------------- > 3 files changed, 94 insertions(+), 39 deletions(-) > > diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c > index 19a1fbe4d..6a61cbd2f 100644 > --- a/lib/intel_batchbuffer.c > +++ b/lib/intel_batchbuffer.c > @@ -605,8 +605,19 @@ static uint32_t fast_copy_pitch(unsigned int stride, unsigned int tiling) > return stride; > } > > -static uint32_t fast_copy_dword0(unsigned int src_tiling, > - unsigned int dst_tiling) > +/** > + * fast_copy_dword0: > + * @src_tiling: The tile format supported by source > + * @dst_tiling: The tile format supported by destination > + * > + * Set the source and destination tile format types bits for fast copy. > + * > + * Returns: > + * The dwords that will conatin the set bit for source and destination tiling. > + */ > + > +uint32_t fast_copy_dword0(unsigned int src_tiling, > + unsigned int dst_tiling) > { > uint32_t dword0 = 0; > > @@ -649,9 +660,21 @@ static uint32_t fast_copy_dword0(unsigned int src_tiling, > return dword0; > } > > -static uint32_t fast_copy_dword1(unsigned int src_tiling, > - unsigned int dst_tiling, > - int bpp) > +/** > + * fast_copy_dword1: > + * @src_tiling: The tile format supported by source > + * @dst_tiling: The tile format supported by destination > + * @bpp: Fast copy color depth parameter > + > + * Set the source and destination tile format types and color depth bits for fast copy. > + * > + * Returns: > + * The dword1 that will conatin the set bit for color depth and source ,destination tiling. > + */ > + > +uint32_t fast_copy_dword1(unsigned int src_tiling, > + unsigned int dst_tiling, > + int bpp) > { > uint32_t dword1 = 0; > > diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h > index 2c19c39b1..5ce719951 100644 > --- a/lib/intel_batchbuffer.h > +++ b/lib/intel_batchbuffer.h > @@ -271,6 +271,12 @@ unsigned int igt_buf_intel_ccs_width(unsigned int gen, > unsigned int igt_buf_intel_ccs_height(unsigned int gen, > const struct igt_buf *buf); > > +uint32_t fast_copy_dword0(unsigned int src_tiling, > + unsigned int dst_tiling); > +uint32_t fast_copy_dword1(unsigned int src_tiling, > + unsigned int dst_tiling, > + int bpp); > + > void igt_blitter_src_copy(int fd, > uint64_t ahnd, > uint32_t ctx, > diff --git a/tests/i915/gem_blits.c b/tests/i915/gem_blits.c > index 24e83b9f5..63dea350c 100644 > --- a/tests/i915/gem_blits.c > +++ b/tests/i915/gem_blits.c > @@ -22,6 +22,7 @@ > * > */ > > +#include "intel_batchbuffer.h" > #include "i915/gem.h" > #include "i915/gem_create.h" > #include "igt.h" > @@ -33,6 +34,8 @@ > #define BCS_SRC_Y (1 << 0) > #define BCS_DST_Y (1 << 1) > > +static uint32_t devid; > + Remove this as you use it but there is no assignment to it. It's better to use local vars or reuse that from device struct below. > struct device { > int fd; > int gen; > @@ -147,8 +150,7 @@ static void buffer_set_tiling(const struct device *device, > struct drm_i915_gem_relocation_entry reloc[2]; > struct drm_i915_gem_execbuffer2 execbuf; > const bool has_64b_reloc = device->gen >= 8; > - uint32_t stride, size, pitch; > - uint32_t *batch; > + uint32_t stride, size, pitch, *batch, dword1; > int i; > > if (buffer->tiling == tiling) > @@ -209,19 +211,28 @@ static void buffer_set_tiling(const struct device *device, > batch[i++] = mask; > } > > - batch[i] = (XY_SRC_COPY_BLT_CMD | > - XY_SRC_COPY_BLT_WRITE_ALPHA | > - XY_SRC_COPY_BLT_WRITE_RGB); > - if (device->gen >= 4 && buffer->tiling) > - batch[i] |= XY_SRC_COPY_BLT_SRC_TILED; > - if (device->gen >= 4 && tiling) > - batch[i] |= XY_SRC_COPY_BLT_DST_TILED; > - batch[i++] |= 6 + 2 * has_64b_reloc; > - > pitch = stride; > if (device->gen >= 4 && tiling) > pitch /= 4; > - batch[i++] = 3 << 24 | 0xcc << 16 | pitch; > + > + if (intel_graphics_ver(devid) >= IP_VER(12, 60)) { ------------------------------ ^ ------- ^ Use device->pciid instead of above, it should look like: if (intel_graphics_ver(device->pciid) >= IP_VER(12, 60)) { > + batch[i++] = fast_copy_dword0(buffer->tiling, tiling); > + /* PVC requires tile4 bit to be set for YMAJOR mode */ > + dword1 = fast_copy_dword1( > + (buffer->tiling) ? I915_TILING_Yf : I915_TILING_NONE, > + (tiling) ? I915_TILING_Yf : I915_TILING_NONE, 32); > + batch[i++] = dword1 | pitch; > + } else { > + batch[i] = (XY_SRC_COPY_BLT_CMD | > + XY_SRC_COPY_BLT_WRITE_ALPHA | > + XY_SRC_COPY_BLT_WRITE_RGB); > + if (device->gen >= 4 && buffer->tiling) > + batch[i] |= XY_SRC_COPY_BLT_SRC_TILED; > + if (device->gen >= 4 && tiling) > + batch[i] |= XY_SRC_COPY_BLT_DST_TILED; > + batch[i++] |= 6 + 2 * has_64b_reloc; > + batch[i++] = 3 << 24 | 0xcc << 16 | pitch; > + } > batch[i++] = 0; > batch[i++] = buffer->height << 16 | buffer->width; > reloc[0].target_handle = obj[0].handle; > @@ -298,8 +309,7 @@ static bool blit_to_linear(const struct device *device, > struct drm_i915_gem_relocation_entry reloc[2]; > struct drm_i915_gem_execbuffer2 execbuf; > const bool has_64b_reloc = device->gen >= 8; > - uint32_t *batch; > - uint32_t pitch; > + uint32_t *batch, pitch, dword1; > int i = 0; > > igt_assert(buffer->tiling); > @@ -354,14 +364,22 @@ static bool blit_to_linear(const struct device *device, > batch[i++] = mask; > } > > - batch[i] = (XY_SRC_COPY_BLT_CMD | > - XY_SRC_COPY_BLT_WRITE_ALPHA | > - XY_SRC_COPY_BLT_WRITE_RGB); > - if (device->gen >= 4 && buffer->tiling) > - batch[i] |= XY_SRC_COPY_BLT_SRC_TILED; > - batch[i++] |= 6 + 2 * has_64b_reloc; > - > - batch[i++] = 3 << 24 | 0xcc << 16 | buffer->stride; > + if (intel_graphics_ver(devid) >= IP_VER(12, 60)) { ----------- ^ Same here, use device->pciid instead. > + batch[i++] = fast_copy_dword0(buffer->tiling, 0); > + /* PVC requires tile4 bit to be set for YMAJOR mode */ > + dword1 = fast_copy_dword1( > + (buffer->tiling) ? I915_TILING_Yf : I915_TILING_NONE, > + 0, 32); > + batch[i++] = dword1 | buffer->stride; > + } else { > + batch[i] = (XY_SRC_COPY_BLT_CMD | > + XY_SRC_COPY_BLT_WRITE_ALPHA | > + XY_SRC_COPY_BLT_WRITE_RGB); > + if (device->gen >= 4 && buffer->tiling) > + batch[i] |= XY_SRC_COPY_BLT_SRC_TILED; > + batch[i++] |= 6 + 2 * has_64b_reloc; > + batch[i++] = 3 << 24 | 0xcc << 16 | buffer->stride; > + } > batch[i++] = 0; > batch[i++] = buffer->height << 16 | buffer->width; > reloc[0].target_handle = obj[0].handle; > @@ -600,8 +618,7 @@ blit(const struct device *device, > struct drm_i915_gem_relocation_entry reloc[2]; > struct drm_i915_gem_execbuffer2 execbuf; > const bool has_64b_reloc = device->gen >= 8; > - uint32_t *batch; > - uint32_t pitch; > + uint32_t *batch, dword1, pitch; > int i = 0; > > if (src_x < 0) { > @@ -689,20 +706,29 @@ blit(const struct device *device, > batch[i++] = mask; > } > > - batch[i] = (XY_SRC_COPY_BLT_CMD | > - XY_SRC_COPY_BLT_WRITE_ALPHA | > - XY_SRC_COPY_BLT_WRITE_RGB); > - if (device->gen >= 4 && src->tiling) > - batch[i] |= XY_SRC_COPY_BLT_SRC_TILED; > - if (device->gen >= 4 && dst->tiling) > - batch[i] |= XY_SRC_COPY_BLT_DST_TILED; > - batch[i++] |= 6 + 2 * has_64b_reloc; > - > pitch = dst->stride; > if (device->gen >= 4 && dst->tiling) > pitch /= 4; > - batch[i++] = 3 << 24 | 0xcc << 16 | pitch; > > + if (intel_graphics_ver(devid) >= IP_VER(12, 60)) { ----------- ^ Same here, use device->pciid instead. Regards, Kamil > + batch[i++] = fast_copy_dword0(src->tiling, dst->tiling); > + /* PVC requires tile4 bit to be set for YMAJOR mode */ > + dword1 = fast_copy_dword1( > + (src->tiling) ? I915_TILING_Yf : I915_TILING_NONE, > + (dst->tiling) ? I915_TILING_Yf : I915_TILING_NONE, > + 32); > + batch[i++] = dword1 | pitch; > + } else { > + batch[i] = (XY_SRC_COPY_BLT_CMD | > + XY_SRC_COPY_BLT_WRITE_ALPHA | > + XY_SRC_COPY_BLT_WRITE_RGB); > + if (device->gen >= 4 && src->tiling) > + batch[i] |= XY_SRC_COPY_BLT_SRC_TILED; > + if (device->gen >= 4 && dst->tiling) > + batch[i] |= XY_SRC_COPY_BLT_DST_TILED; > + batch[i++] |= 6 + 2 * has_64b_reloc; > + batch[i++] = 3 << 24 | 0xcc << 16 | pitch; > + } > batch[i++] = dst_y << 16 | dst_x; > batch[i++] = (height + dst_y) << 16 | (width + dst_x); > reloc[0].target_handle = obj[0].handle; > -- > 2.25.1 > ^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2022-12-08 17:37 UTC | newest] Thread overview: 3+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2022-12-05 17:01 [igt-dev] [PATCH i-g-t v3] tests/i915/gem_blits: Added XY_FAST_COPY_BLT support for gem_blits Vikas Srivastava 2022-12-05 19:06 ` [igt-dev] ✗ Fi.CI.BAT: failure for " Patchwork 2022-12-08 17:37 ` [igt-dev] [PATCH i-g-t v3] " Kamil Konieczny
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