[igt-dev] [PATCH i-g-t v2] lib/igt_draw: Change MOCS settings for MTL

[igt-dev] [PATCH i-g-t v2] lib/igt_draw: Change MOCS settings for MTL

[Jeevan B]

On MTL, we want the table entry labelled "UC (GO:Mem)"
which has index 5.  This means that the MOCS value is 10.

v2: Add define for MOCS settings. (Lucas)

Signed-off-by: Jeevan B <jeevan.b@intel.com>
---
 lib/igt_draw.c | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/lib/igt_draw.c b/lib/igt_draw.c
index 975d65cd..4e19e42a 100644
--- a/lib/igt_draw.c
+++ b/lib/igt_draw.c
@@ -651,13 +651,16 @@ static struct intel_buf *create_buf(int fd, struct buf_ops *bops,
 	return buf;
 }
 
+#define DG2_MOCS_UC_GO_MEM	2	/* MOCS index 0x1 */
+#define MTL_MOCS_UC_GO_MEM	10	/* MOCS index 0x5 */
+
 static void draw_rect_blt(int fd, struct cmd_data *cmd_data,
 			  struct buf_data *buf, struct rect *rect,
 			  uint32_t tiling, uint32_t color)
 {
 	struct intel_bb *ibb;
 	struct intel_buf *dst;
-	int blt_cmd_len, blt_cmd_tiling, blt_cmd_depth;
+	int blt_cmd_len, blt_cmd_tiling, blt_cmd_depth, mocs_val;
 	uint32_t devid = intel_get_drm_devid(fd);
 	int gen = intel_gen(devid);
 	int pitch;
@@ -702,8 +705,11 @@ static void draw_rect_blt(int fd, struct cmd_data *cmd_data,
 		pitch = tiling ? buf->stride / 4 : buf->stride;
 
 		intel_bb_out(ibb, XY_FAST_COLOR_BLT | blt_cmd_depth);
-		/* DG2 MOCS entry 2 is "UC - Non-Coherent; GO:Memory" */
-		intel_bb_out(ibb, blt_cmd_tiling | 2 << 21 | (pitch-1));
+		if (IS_METEORLAKE(intel_get_drm_devid(fd)))
+			mocs_val = MTL_MOCS_UC_GO_MEM;
+		else
+			mocs_val = DG2_MOCS_UC_GO_MEM;
+		intel_bb_out(ibb, blt_cmd_tiling | mocs_val << 21 | (pitch-1));
 		intel_bb_out(ibb, (rect->y << 16) | rect->x);
 		intel_bb_out(ibb, ((rect->y + rect->h) << 16) | (rect->x + rect->w));
 		intel_bb_emit_reloc_fenced(ibb, dst->handle, 0,
-- 
2.36.0

[igt-dev] ✗ Fi.CI.BAT: failure for lib/igt_draw: Change MOCS settings for MTL (rev3)

[Patchwork]

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== Series Details ==

Series: lib/igt_draw: Change MOCS settings for MTL (rev3)
URL   : https://patchwork.freedesktop.org/series/111958/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_12514 -> IGTPW_8245
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_8245 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_8245, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8245/index.html

Participating hosts (41 -> 41)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_8245:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_selftest@live@execlists:
    - fi-bsw-nick:        [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12514/fi-bsw-nick/igt@i915_selftest@live@execlists.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8245/fi-bsw-nick/igt@i915_selftest@live@execlists.html

  
Known issues
------------

  Here are the changes found in IGTPW_8245 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_suspend@basic-s3@smem:
    - fi-rkl-11600:       NOTRUN -> [FAIL][3] ([fdo#103375])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8245/fi-rkl-11600/igt@gem_exec_suspend@basic-s3@smem.html

  * igt@i915_pm_rpm@basic-rte:
    - bat-adlp-4:         [PASS][4] -> [DMESG-WARN][5] ([i915#7077])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12514/bat-adlp-4/igt@i915_pm_rpm@basic-rte.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8245/bat-adlp-4/igt@i915_pm_rpm@basic-rte.html

  * igt@kms_chamelium@common-hpd-after-suspend:
    - fi-rkl-11600:       NOTRUN -> [SKIP][6] ([fdo#111827])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8245/fi-rkl-11600/igt@kms_chamelium@common-hpd-after-suspend.html

  * igt@runner@aborted:
    - bat-adlp-4:         NOTRUN -> [FAIL][7] ([i915#4312])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8245/bat-adlp-4/igt@runner@aborted.html
    - fi-bsw-nick:        NOTRUN -> [FAIL][8] ([fdo#109271] / [i915#4312])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8245/fi-bsw-nick/igt@runner@aborted.html

  
#### Possible fixes ####

  * igt@gem_exec_gttfill@basic:
    - fi-pnv-d510:        [FAIL][9] ([i915#7229]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12514/fi-pnv-d510/igt@gem_exec_gttfill@basic.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8245/fi-pnv-d510/igt@gem_exec_gttfill@basic.html

  * igt@i915_selftest@live@gt_heartbeat:
    - fi-kbl-soraka:      [DMESG-FAIL][11] ([i915#5334]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12514/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8245/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@late_gt_pm:
    - fi-kbl-soraka:      [INCOMPLETE][13] ([i915#7640]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12514/fi-kbl-soraka/igt@i915_selftest@live@late_gt_pm.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8245/fi-kbl-soraka/igt@i915_selftest@live@late_gt_pm.html

  * igt@i915_selftest@live@slpc:
    - {bat-rpls-1}:       [DMESG-FAIL][15] ([i915#6367]) -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12514/bat-rpls-1/igt@i915_selftest@live@slpc.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8245/bat-rpls-1/igt@i915_selftest@live@slpc.html

  * igt@i915_suspend@basic-s3-without-i915:
    - fi-rkl-11600:       [INCOMPLETE][17] ([i915#4817]) -> [PASS][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12514/fi-rkl-11600/igt@i915_suspend@basic-s3-without-i915.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8245/fi-rkl-11600/igt@i915_suspend@basic-s3-without-i915.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4817]: https://gitlab.freedesktop.org/drm/intel/issues/4817
  [i915#5153]: https://gitlab.freedesktop.org/drm/intel/issues/5153
  [i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
  [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
  [i915#6997]: https://gitlab.freedesktop.org/drm/intel/issues/6997
  [i915#7077]: https://gitlab.freedesktop.org/drm/intel/issues/7077
  [i915#7229]: https://gitlab.freedesktop.org/drm/intel/issues/7229
  [i915#7640]: https://gitlab.freedesktop.org/drm/intel/issues/7640


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_7097 -> IGTPW_8245

  CI-20190529: 20190529
  CI_DRM_12514: 6d562ff2af212328d4d4d02d7f26caa184ac2729 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_8245: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8245/index.html
  IGT_7097: 1ff2643cb7187ddd01b0c34c59113721303e65a2 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8245/index.html

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Re: [igt-dev] [PATCH i-g-t v2] lib/igt_draw: Change MOCS settings for MTL

[Lucas De Marchi]

On Mon, Dec 19, 2022 at 02:41:54PM +0530, Jeevan B wrote:
>On MTL, we want the table entry labelled "UC (GO:Mem)"
>which has index 5.  This means that the MOCS value is 10.
>
>v2: Add define for MOCS settings. (Lucas)
>
>Signed-off-by: Jeevan B <jeevan.b@intel.com>
>---
> lib/igt_draw.c | 12 +++++++++---
> 1 file changed, 9 insertions(+), 3 deletions(-)
>
>diff --git a/lib/igt_draw.c b/lib/igt_draw.c
>index 975d65cd..4e19e42a 100644
>--- a/lib/igt_draw.c
>+++ b/lib/igt_draw.c
>@@ -651,13 +651,16 @@ static struct intel_buf *create_buf(int fd, struct buf_ops *bops,
> 	return buf;
> }
>
>+#define DG2_MOCS_UC_GO_MEM	2	/* MOCS index 0x1 */
>+#define MTL_MOCS_UC_GO_MEM	10	/* MOCS index 0x5 */
>+
> static void draw_rect_blt(int fd, struct cmd_data *cmd_data,
> 			  struct buf_data *buf, struct rect *rect,
> 			  uint32_t tiling, uint32_t color)
> {
> 	struct intel_bb *ibb;
> 	struct intel_buf *dst;
>-	int blt_cmd_len, blt_cmd_tiling, blt_cmd_depth;
>+	int blt_cmd_len, blt_cmd_tiling, blt_cmd_depth, mocs_val;
> 	uint32_t devid = intel_get_drm_devid(fd);
> 	int gen = intel_gen(devid);
> 	int pitch;
>@@ -702,8 +705,11 @@ static void draw_rect_blt(int fd, struct cmd_data *cmd_data,
> 		pitch = tiling ? buf->stride / 4 : buf->stride;
>
> 		intel_bb_out(ibb, XY_FAST_COLOR_BLT | blt_cmd_depth);
>-		/* DG2 MOCS entry 2 is "UC - Non-Coherent; GO:Memory" */
>-		intel_bb_out(ibb, blt_cmd_tiling | 2 << 21 | (pitch-1));
>+		if (IS_METEORLAKE(intel_get_drm_devid(fd)))
>+			mocs_val = MTL_MOCS_UC_GO_MEM;
>+		else
>+			mocs_val = DG2_MOCS_UC_GO_MEM;

nit: doing this before the calls to intel_bb_out() would be better since
it's what is done for all the other fields (e.g. pitch, bld_cmd_depth,
etc). With that
	
	Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>

Lucas De Marchi

>+		intel_bb_out(ibb, blt_cmd_tiling | mocs_val << 21 | (pitch-1));
> 		intel_bb_out(ibb, (rect->y << 16) | rect->x);
> 		intel_bb_out(ibb, ((rect->y + rect->h) << 16) | (rect->x + rect->w));
> 		intel_bb_emit_reloc_fenced(ibb, dst->handle, 0,
>-- 
>2.36.0
>

Re: [igt-dev] [PATCH i-g-t v2] lib/igt_draw: Change MOCS settings for MTL

[Zbigniew Kempczyński]

On Mon, Dec 19, 2022 at 06:58:40AM -0800, Lucas De Marchi wrote:
> On Mon, Dec 19, 2022 at 02:41:54PM +0530, Jeevan B wrote:
> > On MTL, we want the table entry labelled "UC (GO:Mem)"
> > which has index 5.  This means that the MOCS value is 10.
> > 
> > v2: Add define for MOCS settings. (Lucas)
> > 
> > Signed-off-by: Jeevan B <jeevan.b@intel.com>
> > ---
> > lib/igt_draw.c | 12 +++++++++---
> > 1 file changed, 9 insertions(+), 3 deletions(-)
> > 
> > diff --git a/lib/igt_draw.c b/lib/igt_draw.c
> > index 975d65cd..4e19e42a 100644
> > --- a/lib/igt_draw.c
> > +++ b/lib/igt_draw.c
> > @@ -651,13 +651,16 @@ static struct intel_buf *create_buf(int fd, struct buf_ops *bops,
> > 	return buf;
> > }
> > 
> > +#define DG2_MOCS_UC_GO_MEM	2	/* MOCS index 0x1 */
> > +#define MTL_MOCS_UC_GO_MEM	10	/* MOCS index 0x5 */
> > +
> > static void draw_rect_blt(int fd, struct cmd_data *cmd_data,
> > 			  struct buf_data *buf, struct rect *rect,
> > 			  uint32_t tiling, uint32_t color)
> > {
> > 	struct intel_bb *ibb;
> > 	struct intel_buf *dst;
> > -	int blt_cmd_len, blt_cmd_tiling, blt_cmd_depth;
> > +	int blt_cmd_len, blt_cmd_tiling, blt_cmd_depth, mocs_val;
> > 	uint32_t devid = intel_get_drm_devid(fd);
> > 	int gen = intel_gen(devid);
> > 	int pitch;
> > @@ -702,8 +705,11 @@ static void draw_rect_blt(int fd, struct cmd_data *cmd_data,
> > 		pitch = tiling ? buf->stride / 4 : buf->stride;
> > 
> > 		intel_bb_out(ibb, XY_FAST_COLOR_BLT | blt_cmd_depth);
> > -		/* DG2 MOCS entry 2 is "UC - Non-Coherent; GO:Memory" */
> > -		intel_bb_out(ibb, blt_cmd_tiling | 2 << 21 | (pitch-1));
> > +		if (IS_METEORLAKE(intel_get_drm_devid(fd)))
> > +			mocs_val = MTL_MOCS_UC_GO_MEM;
> > +		else
> > +			mocs_val = DG2_MOCS_UC_GO_MEM;
> 
> nit: doing this before the calls to intel_bb_out() would be better since
> it's what is done for all the other fields (e.g. pitch, bld_cmd_depth,
> etc). With that
> 	
> 	Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>

I think better would be to extend intel_mocs.c and add appropriate 
function instead of cascaded if's.

--
Zbigniew

> 
> Lucas De Marchi
> 
> > +		intel_bb_out(ibb, blt_cmd_tiling | mocs_val << 21 | (pitch-1));
> > 		intel_bb_out(ibb, (rect->y << 16) | rect->x);
> > 		intel_bb_out(ibb, ((rect->y + rect->h) << 16) | (rect->x + rect->w));
> > 		intel_bb_emit_reloc_fenced(ibb, dst->handle, 0,
> > -- 
> > 2.36.0
> > 

Re: [igt-dev] [PATCH i-g-t v2] lib/igt_draw: Change MOCS settings for MTL

[Lucas De Marchi]

On Tue, Dec 20, 2022 at 07:53:18AM +0100, Zbigniew Kempczyński wrote:
>On Mon, Dec 19, 2022 at 06:58:40AM -0800, Lucas De Marchi wrote:
>> On Mon, Dec 19, 2022 at 02:41:54PM +0530, Jeevan B wrote:
>> > On MTL, we want the table entry labelled "UC (GO:Mem)"
>> > which has index 5.  This means that the MOCS value is 10.
>> >
>> > v2: Add define for MOCS settings. (Lucas)
>> >
>> > Signed-off-by: Jeevan B <jeevan.b@intel.com>
>> > ---
>> > lib/igt_draw.c | 12 +++++++++---
>> > 1 file changed, 9 insertions(+), 3 deletions(-)
>> >
>> > diff --git a/lib/igt_draw.c b/lib/igt_draw.c
>> > index 975d65cd..4e19e42a 100644
>> > --- a/lib/igt_draw.c
>> > +++ b/lib/igt_draw.c
>> > @@ -651,13 +651,16 @@ static struct intel_buf *create_buf(int fd, struct buf_ops *bops,
>> > 	return buf;
>> > }
>> >
>> > +#define DG2_MOCS_UC_GO_MEM	2	/* MOCS index 0x1 */
>> > +#define MTL_MOCS_UC_GO_MEM	10	/* MOCS index 0x5 */
>> > +
>> > static void draw_rect_blt(int fd, struct cmd_data *cmd_data,
>> > 			  struct buf_data *buf, struct rect *rect,
>> > 			  uint32_t tiling, uint32_t color)
>> > {
>> > 	struct intel_bb *ibb;
>> > 	struct intel_buf *dst;
>> > -	int blt_cmd_len, blt_cmd_tiling, blt_cmd_depth;
>> > +	int blt_cmd_len, blt_cmd_tiling, blt_cmd_depth, mocs_val;
>> > 	uint32_t devid = intel_get_drm_devid(fd);
>> > 	int gen = intel_gen(devid);
>> > 	int pitch;
>> > @@ -702,8 +705,11 @@ static void draw_rect_blt(int fd, struct cmd_data *cmd_data,
>> > 		pitch = tiling ? buf->stride / 4 : buf->stride;
>> >
>> > 		intel_bb_out(ibb, XY_FAST_COLOR_BLT | blt_cmd_depth);
>> > -		/* DG2 MOCS entry 2 is "UC - Non-Coherent; GO:Memory" */
>> > -		intel_bb_out(ibb, blt_cmd_tiling | 2 << 21 | (pitch-1));
>> > +		if (IS_METEORLAKE(intel_get_drm_devid(fd)))
>> > +			mocs_val = MTL_MOCS_UC_GO_MEM;
>> > +		else
>> > +			mocs_val = DG2_MOCS_UC_GO_MEM;
>>
>> nit: doing this before the calls to intel_bb_out() would be better since
>> it's what is done for all the other fields (e.g. pitch, bld_cmd_depth,
>> etc). With that
>> 	
>> 	Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
>
>I think better would be to extend intel_mocs.c and add appropriate
>function instead of cascaded if's.

indeed. I missed that file. Extending get_mocs_index() and then here
simply callying intel_get_uc_mocs() would be better.

While at it, reordering the if/else ladder in get_mocs_index() to follow
the convention of last platform first.

Lucas De Marchi

>
>--
>Zbigniew
>
>>
>> Lucas De Marchi
>>
>> > +		intel_bb_out(ibb, blt_cmd_tiling | mocs_val << 21 | (pitch-1));
>> > 		intel_bb_out(ibb, (rect->y << 16) | rect->x);
>> > 		intel_bb_out(ibb, ((rect->y + rect->h) << 16) | (rect->x + rect->w));
>> > 		intel_bb_emit_reloc_fenced(ibb, dst->handle, 0,
>> > --
>> > 2.36.0
>> >