[igt-dev] [PATCH i-g-t 0/5] Make xe_compute test more generic

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* [igt-dev] [PATCH i-g-t 0/5] Make xe_compute test more generic
@ 2023-03-27 13:41 Mauro Carvalho Chehab
  2023-03-27 13:41 ` [igt-dev] [PATCH i-g-t 1/5] compute_square_kernel.cl: add CL file used at xe_compute.c Mauro Carvalho Chehab
                   ` (6 more replies)
  0 siblings, 7 replies; 13+ messages in thread
From: Mauro Carvalho Chehab @ 2023-03-27 13:41 UTC (permalink / raw)
  To: igt-dev

From: Mauro Carvalho Chehab <mchehab@kernel.org>

Currently, xe_compute test runs only on an specific TGL PCI ID.
Make the test more generic, preparing to add support for more
platforms.

Mauro Carvalho Chehab (5):
  compute_square_kernel.cl: add CL file used at xe_compute.c
  xe/xe_compute: place OpenCL kernel on a separate file
  lib/xe/xe_compute: use registers defs from intel_gpu_commands.h
  gen_opencl_kernel: add script to dynamically create OpenCL kernels
  [RFC EXAMPLE] lib/xe/xe_compute_kernels.c: re-generate TGL binary

 lib/meson.build                    |    1 +
 lib/xe/xe_compute.c                |  236 ++--
 lib/xe/xe_compute.h                |   31 +-
 lib/xe/xe_compute_square_kernels.c | 1845 ++++++++++++++++++++++++++++
 opencl/README                      |   11 +
 opencl/compute_square_kernel.cl    |    5 +
 opencl/gen_opencl_kernel           |   86 ++
 tests/xe/xe_compute.c              |  108 +-
 8 files changed, 2129 insertions(+), 194 deletions(-)
 create mode 100644 lib/xe/xe_compute_square_kernels.c
 create mode 100644 opencl/README
 create mode 100644 opencl/compute_square_kernel.cl
 create mode 100755 opencl/gen_opencl_kernel

-- 
2.39.2

^ permalink raw reply	[flat|nested] 13+ messages in thread

* [igt-dev] [PATCH i-g-t 1/5] compute_square_kernel.cl: add CL file used at xe_compute.c
  2023-03-27 13:41 [igt-dev] [PATCH i-g-t 0/5] Make xe_compute test more generic Mauro Carvalho Chehab
@ 2023-03-27 13:41 ` Mauro Carvalho Chehab
  2023-04-03 10:45   ` Zbigniew Kempczyński
  2023-03-27 13:41 ` [igt-dev] [PATCH i-g-t 2/5] xe/xe_compute: place OpenCL kernel on a separate file Mauro Carvalho Chehab
                   ` (5 subsequent siblings)
  6 siblings, 1 reply; 13+ messages in thread
From: Mauro Carvalho Chehab @ 2023-03-27 13:41 UTC (permalink / raw)
  To: igt-dev

From: Mauro Carvalho Chehab <mchehab@kernel.org>

Provide the cl file that it was used to produce the OpenCL
Kernel used by xe_compute, and document how the binary at
xe_compute.h was produced.

Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
---
 lib/xe/xe_compute.c             | 3 ++-
 opencl/compute_square_kernel.cl | 5 +++++
 2 files changed, 7 insertions(+), 1 deletion(-)
 create mode 100644 opencl/compute_square_kernel.cl

diff --git a/lib/xe/xe_compute.c b/lib/xe/xe_compute.c
index 8c0f8c87d50f..2165eada8931 100644
--- a/lib/xe/xe_compute.c
+++ b/lib/xe/xe_compute.c
@@ -18,7 +18,8 @@
 #define GPGPU_WALKER			0x7105000d
 #define MI_BATCH_BUFFER_END		(0xA << 23)
 
-// generated with: ocloc -file kernel.cl -device tgllp && xxd -i kernel_Gen12LPlp.gen
+// generated with:
+// ocloc -file opencl/compute_square_kernel.cl -device tgllp && xxd -i compute_square_kernel_Gen12LPlp.bin
 unsigned char tgllp_kernel_square_bin[] = {
 	0x61, 0x00, 0x03, 0x80, 0x20, 0x02, 0x05, 0x03, 0x04, 0x00, 0x10, 0x00,
 	0x00, 0x00, 0x00, 0x00, 0x66, 0x01, 0x00, 0x80, 0x20, 0x82, 0x01, 0x80,
diff --git a/opencl/compute_square_kernel.cl b/opencl/compute_square_kernel.cl
new file mode 100644
index 000000000000..f6260fb934dc
--- /dev/null
+++ b/opencl/compute_square_kernel.cl
@@ -0,0 +1,5 @@
+__kernel void square(__global float* input, __global float* output, const unsigned int count) {
+  int i = get_global_id(0);
+  if(i < count)
+    output[i] = input[i] * input[i];
+}
-- 
2.39.2

^ permalink raw reply related	[flat|nested] 13+ messages in thread

* Re: [igt-dev] [PATCH i-g-t 1/5] compute_square_kernel.cl: add CL file used at xe_compute.c
  2023-03-27 13:41 ` [igt-dev] [PATCH i-g-t 1/5] compute_square_kernel.cl: add CL file used at xe_compute.c Mauro Carvalho Chehab
@ 2023-04-03 10:45   ` Zbigniew Kempczyński
  0 siblings, 0 replies; 13+ messages in thread
From: Zbigniew Kempczyński @ 2023-04-03 10:45 UTC (permalink / raw)
  To: Mauro Carvalho Chehab; +Cc: igt-dev

On Mon, Mar 27, 2023 at 03:41:15PM +0200, Mauro Carvalho Chehab wrote:
> From: Mauro Carvalho Chehab <mchehab@kernel.org>
> 
> Provide the cl file that it was used to produce the OpenCL
> Kernel used by xe_compute, and document how the binary at
> xe_compute.h was produced.
> 
> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
> ---
>  lib/xe/xe_compute.c             | 3 ++-
>  opencl/compute_square_kernel.cl | 5 +++++
>  2 files changed, 7 insertions(+), 1 deletion(-)
>  create mode 100644 opencl/compute_square_kernel.cl
> 
> diff --git a/lib/xe/xe_compute.c b/lib/xe/xe_compute.c
> index 8c0f8c87d50f..2165eada8931 100644
> --- a/lib/xe/xe_compute.c
> +++ b/lib/xe/xe_compute.c
> @@ -18,7 +18,8 @@
>  #define GPGPU_WALKER			0x7105000d
>  #define MI_BATCH_BUFFER_END		(0xA << 23)
>  
> -// generated with: ocloc -file kernel.cl -device tgllp && xxd -i kernel_Gen12LPlp.gen
> +// generated with:
> +// ocloc -file opencl/compute_square_kernel.cl -device tgllp && xxd -i compute_square_kernel_Gen12LPlp.bin
>  unsigned char tgllp_kernel_square_bin[] = {
>  	0x61, 0x00, 0x03, 0x80, 0x20, 0x02, 0x05, 0x03, 0x04, 0x00, 0x10, 0x00,
>  	0x00, 0x00, 0x00, 0x00, 0x66, 0x01, 0x00, 0x80, 0x20, 0x82, 0x01, 0x80,
> diff --git a/opencl/compute_square_kernel.cl b/opencl/compute_square_kernel.cl
> new file mode 100644
> index 000000000000..f6260fb934dc
> --- /dev/null
> +++ b/opencl/compute_square_kernel.cl
> @@ -0,0 +1,5 @@
> +__kernel void square(__global float* input, __global float* output, const unsigned int count) {
> +  int i = get_global_id(0);
> +  if(i < count)
> +    output[i] = input[i] * input[i];
> +}
> -- 
> 2.39.2
>

Looks good:

Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>

--
Zbigniew


^ permalink raw reply	[flat|nested] 13+ messages in thread

* [igt-dev] [PATCH i-g-t 2/5] xe/xe_compute: place OpenCL kernel on a separate file
  2023-03-27 13:41 [igt-dev] [PATCH i-g-t 0/5] Make xe_compute test more generic Mauro Carvalho Chehab
  2023-03-27 13:41 ` [igt-dev] [PATCH i-g-t 1/5] compute_square_kernel.cl: add CL file used at xe_compute.c Mauro Carvalho Chehab
@ 2023-03-27 13:41 ` Mauro Carvalho Chehab
  2023-04-03 10:49   ` Zbigniew Kempczyński
  2023-03-27 13:41 ` [igt-dev] [PATCH i-g-t 3/5] lib/xe/xe_compute: use registers defs from intel_gpu_commands.h Mauro Carvalho Chehab
                   ` (4 subsequent siblings)
  6 siblings, 1 reply; 13+ messages in thread
From: Mauro Carvalho Chehab @ 2023-03-27 13:41 UTC (permalink / raw)
  To: igt-dev

From: Mauro Carvalho Chehab <mchehab@kernel.org>

In order to prepare for supporting multiple Kernels, move
the tgllp to a separate file.

While here, address a few coding style nitpicks.

Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
---
 lib/meson.build                    |   1 +
 lib/xe/xe_compute.c                | 234 ++++++++++++++++++++---------
 lib/xe/xe_compute.h                |  31 ++--
 lib/xe/xe_compute_square_kernels.c |  71 +++++++++
 tests/xe/xe_compute.c              | 108 +------------
 5 files changed, 256 insertions(+), 189 deletions(-)
 create mode 100644 lib/xe/xe_compute_square_kernels.c

diff --git a/lib/meson.build b/lib/meson.build
index ad9e2abef4c3..ad68089dcf43 100644
--- a/lib/meson.build
+++ b/lib/meson.build
@@ -99,6 +99,7 @@ lib_sources = [
 	'igt_msm.c',
 	'igt_dsc.c',
 	'xe/xe_compute.c',
+	'xe/xe_compute_square_kernels.c',
 	'xe/xe_ioctl.c',
 	'xe/xe_query.c',
 	'xe/xe_spin.c'
diff --git a/lib/xe/xe_compute.c b/lib/xe/xe_compute.c
index 2165eada8931..7259b888eb9e 100644
--- a/lib/xe/xe_compute.c
+++ b/lib/xe/xe_compute.c
@@ -6,71 +6,51 @@
  *    Francois Dugast <francois.dugast@intel.com>
  */
 
+#include <stdint.h>
+
+#include "igt.h"
+#include "xe_drm.h"
+#include "lib/igt_syncobj.h"
+#include "lib/intel_reg.h"
+
 #include "xe_compute.h"
+#include "xe/xe_ioctl.h"
+#include "xe/xe_query.h"
 
 #define PIPE_CONTROL			0x7a000004
-#define MI_LOAD_REGISTER_IMM		0x11000001
-#define PIPELINE_SELECT			0x69040302
+#define MEDIA_STATE_FLUSH		0x0
+#define MAX(X, Y)			(((X) > (Y)) ? (X) : (Y))
+#define SIZE_DATA			64
+#define SIZE_BATCH			0x1000
+#define SIZE_BUFFER_INPUT		MAX(sizeof(float) * SIZE_DATA, 0x1000)
+#define SIZE_BUFFER_OUTPUT		MAX(sizeof(float) * SIZE_DATA, 0x1000)
+#define ADDR_BATCH			0x100000
+#define ADDR_INPUT			0x200000UL
+#define ADDR_OUTPUT			0x300000UL
+#define ADDR_SURFACE_STATE_BASE		0x400000UL
+#define ADDR_DYNAMIC_STATE_BASE		0x500000UL
+#define ADDR_INDIRECT_OBJECT_BASE	0x800100000000
+#define OFFSET_INDIRECT_DATA_START	0xFFFDF000
+#define OFFSET_KERNEL			0xFFFEF000
+
+#undef MEDIA_VFE_STATE
 #define MEDIA_VFE_STATE			0x70000007
+#undef STATE_BASE_ADDRESS
 #define STATE_BASE_ADDRESS		0x61010014
-#define MEDIA_STATE_FLUSH		0x0
+#undef MEDIA_INTERFACE_DESCRIPTOR_LOAD
 #define MEDIA_INTERFACE_DESCRIPTOR_LOAD	0x70020002
+#undef GPGPU_WALKER
 #define GPGPU_WALKER			0x7105000d
-#define MI_BATCH_BUFFER_END		(0xA << 23)
-
-// generated with:
-// ocloc -file opencl/compute_square_kernel.cl -device tgllp && xxd -i compute_square_kernel_Gen12LPlp.bin
-unsigned char tgllp_kernel_square_bin[] = {
-	0x61, 0x00, 0x03, 0x80, 0x20, 0x02, 0x05, 0x03, 0x04, 0x00, 0x10, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x66, 0x01, 0x00, 0x80, 0x20, 0x82, 0x01, 0x80,
-	0x00, 0x80, 0x00, 0x01, 0xc0, 0x04, 0xc0, 0x04, 0x41, 0x01, 0x20, 0x22,
-	0x16, 0x09, 0x11, 0x03, 0x49, 0x00, 0x04, 0xa2, 0x12, 0x09, 0x11, 0x03,
-	0x40, 0x01, 0x04, 0x00, 0x60, 0x06, 0x05, 0x05, 0x04, 0x04, 0x00, 0x01,
-	0x05, 0x01, 0x58, 0x00, 0x40, 0x00, 0x24, 0x00, 0x60, 0x06, 0x05, 0x0a,
-	0x04, 0x04, 0x00, 0x01, 0x05, 0x02, 0x58, 0x00, 0x40, 0x02, 0x0c, 0xa0,
-	0x02, 0x05, 0x10, 0x07, 0x40, 0x02, 0x0e, 0xa6, 0x02, 0x0a, 0x10, 0x07,
-	0x70, 0x02, 0x04, 0x00, 0x60, 0x02, 0x01, 0x00, 0x05, 0x0c, 0x46, 0x52,
-	0x84, 0x08, 0x00, 0x00, 0x70, 0x02, 0x24, 0x00, 0x60, 0x02, 0x01, 0x00,
-	0x05, 0x0e, 0x46, 0x52, 0x84, 0x08, 0x00, 0x00, 0x72, 0x00, 0x02, 0x80,
-	0x50, 0x0d, 0x04, 0x00, 0x05, 0x00, 0x05, 0x1d, 0x05, 0x00, 0x05, 0x00,
-	0x22, 0x00, 0x05, 0x01, 0x00, 0xc0, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00,
-	0x90, 0x00, 0x00, 0x00, 0x69, 0x00, 0x10, 0x60, 0x02, 0x0c, 0x20, 0x00,
-	0x69, 0x00, 0x12, 0x66, 0x02, 0x0e, 0x20, 0x00, 0x40, 0x02, 0x14, 0xa0,
-	0x32, 0x10, 0x10, 0x08, 0x40, 0x02, 0x16, 0xa6, 0x32, 0x12, 0x10, 0x08,
-	0x31, 0xa0, 0x04, 0x00, 0x00, 0x00, 0x14, 0x18, 0x14, 0x14, 0x00, 0xcc,
-	0x00, 0x00, 0x16, 0x00, 0x31, 0x91, 0x24, 0x00, 0x00, 0x00, 0x14, 0x1a,
-	0x14, 0x16, 0x00, 0xcc, 0x00, 0x00, 0x16, 0x00, 0x40, 0x00, 0x10, 0xa0,
-	0x4a, 0x10, 0x10, 0x08, 0x40, 0x00, 0x12, 0xa6, 0x4a, 0x12, 0x10, 0x08,
-	0x41, 0x20, 0x18, 0x20, 0x00, 0x18, 0x00, 0x18, 0x41, 0x21, 0x1a, 0x26,
-	0x00, 0x1a, 0x00, 0x1a, 0x31, 0xa2, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x14, 0x10, 0x02, 0xcc, 0x14, 0x18, 0x96, 0x00, 0x31, 0x93, 0x24, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x14, 0x12, 0x02, 0xcc, 0x14, 0x1a, 0x96, 0x00,
-	0x25, 0x00, 0x05, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x10, 0x00, 0x00, 0x00, 0x61, 0x00, 0x7f, 0x64, 0x00, 0x03, 0x10, 0x00,
-	0x31, 0x44, 0x03, 0x80, 0x00, 0x00, 0x0c, 0x1c, 0x0c, 0x03, 0x00, 0xa0,
-	0x00, 0x00, 0x78, 0x02, 0x61, 0x24, 0x03, 0x80, 0x20, 0x02, 0x01, 0x00,
-	0x05, 0x1c, 0x46, 0x00, 0x00, 0x00, 0x00, 0x00, 0x61, 0x00, 0x04, 0x80,
-	0xa0, 0x4a, 0x01, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x31, 0x01, 0x03, 0x80, 0x04, 0x00, 0x00, 0x00, 0x0c, 0x7f, 0x20, 0x70,
-	0x00, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+
+struct bo_dict_entry {
+	uint64_t addr;
+	uint32_t size;
+	void *data;
 };
-unsigned int tgllp_kernel_square_length = sizeof(tgllp_kernel_square_bin);
+
+/*
+ * TGL compatible batch
+ */
 
 /**
  * tgllp_create_indirect_data:
@@ -80,8 +60,9 @@ unsigned int tgllp_kernel_square_length = sizeof(tgllp_kernel_square_bin);
  *
  * Prepares indirect data for compute pipeline.
  */
-void tgllp_create_indirect_data(uint32_t *addr_bo_buffer_batch,
-				uint64_t addr_input, uint64_t addr_output)
+static void tgllp_create_indirect_data(uint32_t *addr_bo_buffer_batch,
+				       uint64_t addr_input,
+				       uint64_t addr_output)
 {
 	int b = 0;
 
@@ -183,8 +164,9 @@ void tgllp_create_indirect_data(uint32_t *addr_bo_buffer_batch,
  *
  * Prepares surface state for compute pipeline.
  */
-void tgllp_create_surface_state(uint32_t *addr_bo_buffer_batch,
-				uint64_t addr_input, uint64_t addr_output)
+static void tgllp_create_surface_state(uint32_t *addr_bo_buffer_batch,
+				       uint64_t addr_input,
+				       uint64_t addr_output)
 {
 	int b = 0;
 
@@ -261,8 +243,8 @@ void tgllp_create_surface_state(uint32_t *addr_bo_buffer_batch,
  *
  * Prepares dynamic state for compute pipeline.
  */
-void tgllp_create_dynamic_state(uint32_t *addr_bo_buffer_batch,
-				uint64_t offset_kernel)
+static void tgllp_create_dynamic_state(uint32_t *addr_bo_buffer_batch,
+				       uint64_t offset_kernel)
 {
 	int b = 0;
 
@@ -280,7 +262,7 @@ void tgllp_create_dynamic_state(uint32_t *addr_bo_buffer_batch,
 }
 
 /**
- * tgllp_create_batch_compute:
+ * tgllp_compute_exec_compute:
  * @addr_bo_buffer_batch: pointer to batch buffer
  * @addr_surface_state_base: gpu offset of surface state data
  * @addr_dynamic_state_base: gpu offset of dynamic state data
@@ -289,19 +271,19 @@ void tgllp_create_dynamic_state(uint32_t *addr_bo_buffer_batch,
  *
  * Prepares compute pipeline.
  */
-void tgllp_create_batch_compute(uint32_t *addr_bo_buffer_batch,
-				uint64_t addr_surface_state_base,
-				uint64_t addr_dynamic_state_base,
-				uint64_t addr_indirect_object_base,
-				uint64_t offset_indirect_data_start)
+static void tgllp_compute_exec_compute(uint32_t *addr_bo_buffer_batch,
+				       uint64_t addr_surface_state_base,
+				       uint64_t addr_dynamic_state_base,
+				       uint64_t addr_indirect_object_base,
+				       uint64_t offset_indirect_data_start)
 {
 	int b = 0;
 
-	addr_bo_buffer_batch[b++] = MI_LOAD_REGISTER_IMM;
+	addr_bo_buffer_batch[b++] = MI_LOAD_REGISTER_IMM(1);
 	addr_bo_buffer_batch[b++] = 0x00002580;
 	addr_bo_buffer_batch[b++] = 0x00060002;
 	addr_bo_buffer_batch[b++] = PIPELINE_SELECT;
-	addr_bo_buffer_batch[b++] = MI_LOAD_REGISTER_IMM;
+	addr_bo_buffer_batch[b++] = MI_LOAD_REGISTER_IMM(1);
 	addr_bo_buffer_batch[b++] = 0x00007034;
 	addr_bo_buffer_batch[b++] = 0x60000321;
 	addr_bo_buffer_batch[b++] = PIPE_CONTROL;
@@ -310,7 +292,7 @@ void tgllp_create_batch_compute(uint32_t *addr_bo_buffer_batch,
 	addr_bo_buffer_batch[b++] = 0x00000000;
 	addr_bo_buffer_batch[b++] = 0x00000000;
 	addr_bo_buffer_batch[b++] = 0x00000000;
-	addr_bo_buffer_batch[b++] = MI_LOAD_REGISTER_IMM;
+	addr_bo_buffer_batch[b++] = MI_LOAD_REGISTER_IMM(1);
 	addr_bo_buffer_batch[b++] = 0x0000E404;
 	addr_bo_buffer_batch[b++] = 0x00000100;
 	addr_bo_buffer_batch[b++] = PIPE_CONTROL;
@@ -405,3 +387,111 @@ void tgllp_create_batch_compute(uint32_t *addr_bo_buffer_batch,
 	addr_bo_buffer_batch[b++] = 0x00000000;
 	addr_bo_buffer_batch[b++] = MI_BATCH_BUFFER_END;
 }
+
+/**
+ * tgl_compute_exec - run a pipeline compatible with Tiger Lake
+ *
+ * @fd: file descriptor of the opened DRM device
+ * @kernel: GPU Kernel binary to be executed
+ * @size: size of @kernel.
+ */
+static void tgl_compute_exec(int fd, const unsigned char *kernel,
+			     unsigned int size)
+{
+	uint32_t vm, engine;
+	float *dinput;
+	struct drm_xe_sync sync = { 0 };
+#define TGL_BO_DICT_ENTRIES 7
+	struct bo_dict_entry bo_dict[TGL_BO_DICT_ENTRIES] = {
+		{ .addr = ADDR_INDIRECT_OBJECT_BASE + OFFSET_KERNEL}, // kernel
+		{ .addr = ADDR_DYNAMIC_STATE_BASE, .size =  0x1000}, // dynamic state
+		{ .addr = ADDR_SURFACE_STATE_BASE, .size =  0x1000}, // surface state
+		{ .addr = ADDR_INDIRECT_OBJECT_BASE + OFFSET_INDIRECT_DATA_START, .size =  0x10000}, // indirect data
+		{ .addr = ADDR_INPUT, .size = SIZE_BUFFER_INPUT }, // input
+		{ .addr = ADDR_OUTPUT, .size = SIZE_BUFFER_OUTPUT }, // output
+		{ .addr = ADDR_BATCH, .size = SIZE_BATCH }, // batch
+	};
+
+	/* Sets Kernel size */
+	bo_dict[0].size = ALIGN(size, 0x1000);
+
+	vm = xe_vm_create(fd, DRM_XE_VM_CREATE_ASYNC_BIND_OPS, 0);
+	engine = xe_engine_create_class(fd, vm, DRM_XE_ENGINE_CLASS_RENDER);
+	sync.flags = DRM_XE_SYNC_SYNCOBJ | DRM_XE_SYNC_SIGNAL;
+	sync.handle = syncobj_create(fd, 0);
+
+	for (int i = 0; i < TGL_BO_DICT_ENTRIES; i++) {
+		bo_dict[i].data = aligned_alloc(xe_get_default_alignment(fd), bo_dict[i].size);
+		xe_vm_bind_userptr_async(fd, vm, 0, to_user_pointer(bo_dict[i].data), bo_dict[i].addr, bo_dict[i].size, &sync, 1);
+		syncobj_wait(fd, &sync.handle, 1, INT64_MAX, 0, NULL);
+		memset(bo_dict[i].data, 0, bo_dict[i].size);
+	}
+	memcpy(bo_dict[0].data, kernel, size);
+	tgllp_create_dynamic_state(bo_dict[1].data, OFFSET_KERNEL);
+	tgllp_create_surface_state(bo_dict[2].data, ADDR_INPUT, ADDR_OUTPUT);
+	tgllp_create_indirect_data(bo_dict[3].data, ADDR_INPUT, ADDR_OUTPUT);
+	dinput = (float *)bo_dict[4].data;
+	srand(time(NULL));
+
+	for (int i = 0; i < SIZE_DATA; i++)
+		((float *)dinput)[i] = rand() / (float)RAND_MAX;
+
+	tgllp_compute_exec_compute(bo_dict[6].data, ADDR_SURFACE_STATE_BASE, ADDR_DYNAMIC_STATE_BASE, ADDR_INDIRECT_OBJECT_BASE, OFFSET_INDIRECT_DATA_START);
+
+	xe_exec_wait(fd, engine, ADDR_BATCH);
+
+	for (int i = 0; i < SIZE_DATA; i++)
+		igt_assert(((float *)bo_dict[5].data)[i] == ((float *)bo_dict[4].data)[i] * ((float *) bo_dict[4].data)[i]);
+
+	for (int i = 0; i < TGL_BO_DICT_ENTRIES; i++) {
+		xe_vm_unbind_async(fd, vm, 0, 0, bo_dict[i].addr, bo_dict[i].size, &sync, 1);
+		syncobj_wait(fd, &sync.handle, 1, INT64_MAX, 0, NULL);
+		free(bo_dict[i].data);
+	}
+
+	syncobj_destroy(fd, sync.handle);
+	xe_engine_destroy(fd, engine);
+	xe_vm_destroy(fd, vm);
+}
+
+/*
+ * Generic code
+ */
+
+static const struct {
+	unsigned int ip_ver;
+	void (*compute_exec)(int fd, const unsigned char *kernel,
+			     unsigned int size);
+} xe_compute_batches[] = {
+	{
+		.ip_ver = IP_VER(12, 0),
+		.compute_exec = tgl_compute_exec,
+	},
+};
+
+int run_xe_compute_kernel(int fd)
+{
+	unsigned int ip_ver = intel_graphics_ver(intel_get_drm_devid(fd));
+	unsigned int batch;
+	const struct xe_compute_kernels *kernels = xe_compute_square_kernels;
+
+	for (batch = 0; batch < ARRAY_SIZE(xe_compute_batches); batch++) {
+		if (ip_ver == xe_compute_batches[batch].ip_ver)
+			break;
+	}
+	if (batch == ARRAY_SIZE(xe_compute_batches))
+		return 1;
+
+	while (kernels->kernel) {
+		if (ip_ver == kernels->ip_ver)
+			break;
+		kernels++;
+	}
+	if (!kernels->kernel)
+		return 1;
+
+	xe_compute_batches[batch].compute_exec(fd, kernels->kernel,
+					       kernels->size);
+
+	return 0;
+}
diff --git a/lib/xe/xe_compute.h b/lib/xe/xe_compute.h
index de763101da90..5faa3713c40e 100644
--- a/lib/xe/xe_compute.h
+++ b/lib/xe/xe_compute.h
@@ -9,21 +9,24 @@
 #ifndef XE_COMPUTE_H
 #define XE_COMPUTE_H
 
-#include <stdint.h>
+/*
+ * OpenCL Kernels are generated using:
+ *
+ * GPU=tgllp &&                                                         \
+ *      ocloc -file opencl/compute_square_kernel.cl -device $GPU &&     \
+ *      xxd -i compute_square_kernel_Gen12LPlp.bin
+ *
+ * For each GPU model desired. A list of supported models can be obtained with: ocloc compile --help
+ */
+
+struct xe_compute_kernels {
+	int ip_ver;
+	unsigned int size;
+	const unsigned char *kernel;
+};
 
-void tgllp_create_indirect_data(uint32_t *addr_bo_buffer_batch,
-				uint64_t addr_input, uint64_t addr_output);
-void tgllp_create_surface_state(uint32_t *addr_bo_buffer_batch,
-				uint64_t addr_input, uint64_t addr_output);
-void tgllp_create_dynamic_state(uint32_t *addr_bo_buffer_batch,
-				uint64_t offset_kernel);
-void tgllp_create_batch_compute(uint32_t *addr_bo_buffer_batch,
-				uint64_t addr_surface_state_base,
-				uint64_t addr_dynamic_state_base,
-				uint64_t addr_indirect_object_base,
-				uint64_t offset_indirect_data_start);
+extern const struct xe_compute_kernels xe_compute_square_kernels[];
 
-extern unsigned char tgllp_kernel_square_bin[];
-extern unsigned int tgllp_kernel_square_length;
+int run_xe_compute_kernel(int fd);
 
 #endif	/* XE_COMPUTE_H */
diff --git a/lib/xe/xe_compute_square_kernels.c b/lib/xe/xe_compute_square_kernels.c
new file mode 100644
index 000000000000..f9c07dc778bd
--- /dev/null
+++ b/lib/xe/xe_compute_square_kernels.c
@@ -0,0 +1,71 @@
+/* SPDX-License-Identifier: MIT */
+
+/*
+ * Copyright © 2022 Intel Corporation
+ *
+ * Authors:
+ *		Francois Dugast <francois.dugast@intel.com>
+ */
+
+#include "intel_chipset.h"
+#include "lib/xe/xe_compute.h"
+
+static const unsigned char tgllp_kernel_square_bin[] = {
+	0x61, 0x00, 0x03, 0x80, 0x20, 0x02, 0x05, 0x03, 0x04, 0x00, 0x10, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x66, 0x01, 0x00, 0x80, 0x20, 0x82, 0x01, 0x80,
+	0x00, 0x80, 0x00, 0x01, 0xc0, 0x04, 0xc0, 0x04, 0x41, 0x01, 0x20, 0x22,
+	0x16, 0x09, 0x11, 0x03, 0x49, 0x00, 0x04, 0xa2, 0x12, 0x09, 0x11, 0x03,
+	0x40, 0x01, 0x04, 0x00, 0x60, 0x06, 0x05, 0x05, 0x04, 0x04, 0x00, 0x01,
+	0x05, 0x01, 0x58, 0x00, 0x40, 0x00, 0x24, 0x00, 0x60, 0x06, 0x05, 0x0a,
+	0x04, 0x04, 0x00, 0x01, 0x05, 0x02, 0x58, 0x00, 0x40, 0x02, 0x0c, 0xa0,
+	0x02, 0x05, 0x10, 0x07, 0x40, 0x02, 0x0e, 0xa6, 0x02, 0x0a, 0x10, 0x07,
+	0x70, 0x02, 0x04, 0x00, 0x60, 0x02, 0x01, 0x00, 0x05, 0x0c, 0x46, 0x52,
+	0x84, 0x08, 0x00, 0x00, 0x70, 0x02, 0x24, 0x00, 0x60, 0x02, 0x01, 0x00,
+	0x05, 0x0e, 0x46, 0x52, 0x84, 0x08, 0x00, 0x00, 0x72, 0x00, 0x02, 0x80,
+	0x50, 0x0d, 0x04, 0x00, 0x05, 0x00, 0x05, 0x1d, 0x05, 0x00, 0x05, 0x00,
+	0x22, 0x00, 0x05, 0x01, 0x00, 0xc0, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00,
+	0x90, 0x00, 0x00, 0x00, 0x69, 0x00, 0x10, 0x60, 0x02, 0x0c, 0x20, 0x00,
+	0x69, 0x00, 0x12, 0x66, 0x02, 0x0e, 0x20, 0x00, 0x40, 0x02, 0x14, 0xa0,
+	0x32, 0x10, 0x10, 0x08, 0x40, 0x02, 0x16, 0xa6, 0x32, 0x12, 0x10, 0x08,
+	0x31, 0xa0, 0x04, 0x00, 0x00, 0x00, 0x14, 0x18, 0x14, 0x14, 0x00, 0xcc,
+	0x00, 0x00, 0x16, 0x00, 0x31, 0x91, 0x24, 0x00, 0x00, 0x00, 0x14, 0x1a,
+	0x14, 0x16, 0x00, 0xcc, 0x00, 0x00, 0x16, 0x00, 0x40, 0x00, 0x10, 0xa0,
+	0x4a, 0x10, 0x10, 0x08, 0x40, 0x00, 0x12, 0xa6, 0x4a, 0x12, 0x10, 0x08,
+	0x41, 0x20, 0x18, 0x20, 0x00, 0x18, 0x00, 0x18, 0x41, 0x21, 0x1a, 0x26,
+	0x00, 0x1a, 0x00, 0x1a, 0x31, 0xa2, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x14, 0x10, 0x02, 0xcc, 0x14, 0x18, 0x96, 0x00, 0x31, 0x93, 0x24, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x14, 0x12, 0x02, 0xcc, 0x14, 0x1a, 0x96, 0x00,
+	0x25, 0x00, 0x05, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x10, 0x00, 0x00, 0x00, 0x61, 0x00, 0x7f, 0x64, 0x00, 0x03, 0x10, 0x00,
+	0x31, 0x44, 0x03, 0x80, 0x00, 0x00, 0x0c, 0x1c, 0x0c, 0x03, 0x00, 0xa0,
+	0x00, 0x00, 0x78, 0x02, 0x61, 0x24, 0x03, 0x80, 0x20, 0x02, 0x01, 0x00,
+	0x05, 0x1c, 0x46, 0x00, 0x00, 0x00, 0x00, 0x00, 0x61, 0x00, 0x04, 0x80,
+	0xa0, 0x4a, 0x01, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x31, 0x01, 0x03, 0x80, 0x04, 0x00, 0x00, 0x00, 0x0c, 0x7f, 0x20, 0x70,
+	0x00, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+};
+
+const struct xe_compute_kernels xe_compute_square_kernels[] = {
+	{
+		.ip_ver = IP_VER(12, 0),
+		.size = sizeof(tgllp_kernel_square_bin),
+		.kernel = tgllp_kernel_square_bin,
+	},
+	{}
+};
diff --git a/tests/xe/xe_compute.c b/tests/xe/xe_compute.c
index 138d80671435..202d318c60c0 100644
--- a/tests/xe/xe_compute.c
+++ b/tests/xe/xe_compute.c
@@ -14,117 +14,21 @@
 #include <string.h>
 
 #include "igt.h"
-#include "lib/igt_syncobj.h"
-#include "xe_drm.h"
-#include "xe/xe_ioctl.h"
 #include "xe/xe_query.h"
 #include "xe/xe_compute.h"
 
-#define MAX(X, Y)			(((X) > (Y)) ? (X) : (Y))
-#define SIZE_DATA			64
-#define SIZE_BATCH			0x1000
-#define SIZE_KERNEL			0x1000
-#define SIZE_BUFFER_INPUT		MAX(sizeof(float)*SIZE_DATA, 0x1000)
-#define SIZE_BUFFER_OUTPUT		MAX(sizeof(float)*SIZE_DATA, 0x1000)
-#define ADDR_BATCH			0x100000
-#define ADDR_INPUT			(unsigned long)0x200000
-#define ADDR_OUTPUT			(unsigned long)0x300000
-#define ADDR_SURFACE_STATE_BASE		(unsigned long)0x400000
-#define ADDR_DYNAMIC_STATE_BASE		(unsigned long)0x500000
-#define ADDR_INDIRECT_OBJECT_BASE	0x800100000000
-#define OFFSET_INDIRECT_DATA_START	0xFFFDF000
-#define OFFSET_KERNEL			0xFFFEF000
-
-struct bo_dict_entry {
-	uint64_t addr;
-	uint32_t size;
-	void *data;
-};
-
 /**
  * SUBTEST: compute-square
- * GPU requirement: only works on TGL_GT2 with device ID: 0x9a49
+ * GPU requirement: only works on TGL
  * Description:
- * 	This test shows how to create a batch to execute a
- * 	compute kernel. For now it supports tgllp only.
+ *	Run an openCL Kernel that returns output[i] = input[i] * input[i],
+ *	for an input dataset..
  * TODO: extend test to cover other platforms
  */
 static void
 test_compute_square(int fd)
 {
-	uint32_t vm, engine;
-	float *dinput;
-	struct drm_xe_sync sync = { 0 };
-
-#define BO_DICT_ENTRIES 7
-	struct bo_dict_entry bo_dict[BO_DICT_ENTRIES] = {
-		{ .addr = ADDR_INDIRECT_OBJECT_BASE + OFFSET_KERNEL, .size = SIZE_KERNEL }, // kernel
-		{ .addr = ADDR_DYNAMIC_STATE_BASE, .size =  0x1000}, // dynamic state
-		{ .addr = ADDR_SURFACE_STATE_BASE, .size =  0x1000}, // surface state
-		{ .addr = ADDR_INDIRECT_OBJECT_BASE + OFFSET_INDIRECT_DATA_START, .size =  0x10000}, // indirect data
-		{ .addr = ADDR_INPUT, .size = SIZE_BUFFER_INPUT }, // input
-		{ .addr = ADDR_OUTPUT, .size = SIZE_BUFFER_OUTPUT }, // output
-		{ .addr = ADDR_BATCH, .size = SIZE_BATCH }, // batch
-	};
-
-	vm = xe_vm_create(fd, DRM_XE_VM_CREATE_ASYNC_BIND_OPS, 0);
-	engine = xe_engine_create_class(fd, vm, DRM_XE_ENGINE_CLASS_RENDER);
-	sync.flags = DRM_XE_SYNC_SYNCOBJ | DRM_XE_SYNC_SIGNAL;
-	sync.handle = syncobj_create(fd, 0);
-
-	for(int i = 0; i < BO_DICT_ENTRIES; i++) {
-		bo_dict[i].data = aligned_alloc(xe_get_default_alignment(fd), bo_dict[i].size);
-		xe_vm_bind_userptr_async(fd, vm, 0, to_user_pointer(bo_dict[i].data), bo_dict[i].addr, bo_dict[i].size, &sync, 1);
-		syncobj_wait(fd, &sync.handle, 1, INT64_MAX, 0, NULL);
-		memset(bo_dict[i].data, 0, bo_dict[i].size);
-	}
-	memcpy(bo_dict[0].data, tgllp_kernel_square_bin, tgllp_kernel_square_length);
-	tgllp_create_dynamic_state(bo_dict[1].data, OFFSET_KERNEL);
-	tgllp_create_surface_state(bo_dict[2].data, ADDR_INPUT, ADDR_OUTPUT);
-	tgllp_create_indirect_data(bo_dict[3].data, ADDR_INPUT, ADDR_OUTPUT);
-	dinput = (float *)bo_dict[4].data;
-	srand(time(NULL));
-	for(int i=0; i < SIZE_DATA; i++) {
-		((float*) dinput)[i] = rand()/(float)RAND_MAX;
-	}
-	tgllp_create_batch_compute(bo_dict[6].data, ADDR_SURFACE_STATE_BASE, ADDR_DYNAMIC_STATE_BASE, ADDR_INDIRECT_OBJECT_BASE, OFFSET_INDIRECT_DATA_START);
-
-	xe_exec_wait(fd, engine, ADDR_BATCH);
-	for(int i = 0; i < SIZE_DATA; i++) {
-		igt_assert(((float*) bo_dict[5].data)[i] == ((float*) bo_dict[4].data)[i] * ((float*) bo_dict[4].data)[i]);
-	}
-
-	for(int i = 0; i < BO_DICT_ENTRIES; i++) {
-		xe_vm_unbind_async(fd, vm, 0, 0, bo_dict[i].addr, bo_dict[i].size, &sync, 1);
-		syncobj_wait(fd, &sync.handle, 1, INT64_MAX, 0, NULL);
-		free(bo_dict[i].data);
-	}
-
-	syncobj_destroy(fd, sync.handle);
-	xe_engine_destroy(fd, engine);
-	xe_vm_destroy(fd, vm);
-}
-
-static bool
-is_device_supported(int fd)
-{
-	struct drm_xe_query_config *config;
-	struct drm_xe_device_query query = {
-		.extensions = 0,
-		.query = DRM_XE_DEVICE_QUERY_CONFIG,
-		.size = 0,
-		.data = 0,
-	};
-
-	igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query), 0);
-
-	config = malloc(query.size);
-	igt_assert(config);
-
-	query.data = to_user_pointer(config);
-	igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query), 0);
-
-	return (config->info[XE_QUERY_CONFIG_REV_AND_DEVICE_ID] & 0xffff) == 0x9a49;
+	igt_require_f(!run_xe_compute_kernel(fd), "GPU not supported\n");
 }
 
 igt_main
@@ -136,10 +40,8 @@ igt_main
 		xe_device_get(xe);
 	}
 
-	igt_subtest("compute-square") {
-		igt_skip_on(!is_device_supported(xe));
+	igt_subtest("compute-square")
 		test_compute_square(xe);
-	}
 
 	igt_fixture {
 		xe_device_put(xe);
-- 
2.39.2

^ permalink raw reply related	[flat|nested] 13+ messages in thread

* Re: [igt-dev] [PATCH i-g-t 2/5] xe/xe_compute: place OpenCL kernel on a separate file
  2023-03-27 13:41 ` [igt-dev] [PATCH i-g-t 2/5] xe/xe_compute: place OpenCL kernel on a separate file Mauro Carvalho Chehab
@ 2023-04-03 10:49   ` Zbigniew Kempczyński
  0 siblings, 0 replies; 13+ messages in thread
From: Zbigniew Kempczyński @ 2023-04-03 10:49 UTC (permalink / raw)
  To: Mauro Carvalho Chehab; +Cc: igt-dev

On Mon, Mar 27, 2023 at 03:41:16PM +0200, Mauro Carvalho Chehab wrote:
> From: Mauro Carvalho Chehab <mchehab@kernel.org>
> 
> In order to prepare for supporting multiple Kernels, move
> the tgllp to a separate file.
> 
> While here, address a few coding style nitpicks.
> 
> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
> ---
>  lib/meson.build                    |   1 +
>  lib/xe/xe_compute.c                | 234 ++++++++++++++++++++---------
>  lib/xe/xe_compute.h                |  31 ++--
>  lib/xe/xe_compute_square_kernels.c |  71 +++++++++
>  tests/xe/xe_compute.c              | 108 +------------
>  5 files changed, 256 insertions(+), 189 deletions(-)
>  create mode 100644 lib/xe/xe_compute_square_kernels.c
> 
> diff --git a/lib/meson.build b/lib/meson.build
> index ad9e2abef4c3..ad68089dcf43 100644
> --- a/lib/meson.build
> +++ b/lib/meson.build
> @@ -99,6 +99,7 @@ lib_sources = [
>  	'igt_msm.c',
>  	'igt_dsc.c',
>  	'xe/xe_compute.c',
> +	'xe/xe_compute_square_kernels.c',
>  	'xe/xe_ioctl.c',
>  	'xe/xe_query.c',
>  	'xe/xe_spin.c'
> diff --git a/lib/xe/xe_compute.c b/lib/xe/xe_compute.c
> index 2165eada8931..7259b888eb9e 100644
> --- a/lib/xe/xe_compute.c
> +++ b/lib/xe/xe_compute.c
> @@ -6,71 +6,51 @@
>   *    Francois Dugast <francois.dugast@intel.com>
>   */
>  
> +#include <stdint.h>
> +
> +#include "igt.h"
> +#include "xe_drm.h"
> +#include "lib/igt_syncobj.h"
> +#include "lib/intel_reg.h"
> +
>  #include "xe_compute.h"
> +#include "xe/xe_ioctl.h"
> +#include "xe/xe_query.h"
>  
>  #define PIPE_CONTROL			0x7a000004
> -#define MI_LOAD_REGISTER_IMM		0x11000001
> -#define PIPELINE_SELECT			0x69040302
> +#define MEDIA_STATE_FLUSH		0x0
> +#define MAX(X, Y)			(((X) > (Y)) ? (X) : (Y))
> +#define SIZE_DATA			64
> +#define SIZE_BATCH			0x1000
> +#define SIZE_BUFFER_INPUT		MAX(sizeof(float) * SIZE_DATA, 0x1000)
> +#define SIZE_BUFFER_OUTPUT		MAX(sizeof(float) * SIZE_DATA, 0x1000)
> +#define ADDR_BATCH			0x100000
> +#define ADDR_INPUT			0x200000UL
> +#define ADDR_OUTPUT			0x300000UL
> +#define ADDR_SURFACE_STATE_BASE		0x400000UL
> +#define ADDR_DYNAMIC_STATE_BASE		0x500000UL
> +#define ADDR_INDIRECT_OBJECT_BASE	0x800100000000
> +#define OFFSET_INDIRECT_DATA_START	0xFFFDF000
> +#define OFFSET_KERNEL			0xFFFEF000
> +
> +#undef MEDIA_VFE_STATE
>  #define MEDIA_VFE_STATE			0x70000007
> +#undef STATE_BASE_ADDRESS
>  #define STATE_BASE_ADDRESS		0x61010014
> -#define MEDIA_STATE_FLUSH		0x0
> +#undef MEDIA_INTERFACE_DESCRIPTOR_LOAD
>  #define MEDIA_INTERFACE_DESCRIPTOR_LOAD	0x70020002
> +#undef GPGPU_WALKER
>  #define GPGPU_WALKER			0x7105000d
> -#define MI_BATCH_BUFFER_END		(0xA << 23)
> -
> -// generated with:
> -// ocloc -file opencl/compute_square_kernel.cl -device tgllp && xxd -i compute_square_kernel_Gen12LPlp.bin
> -unsigned char tgllp_kernel_square_bin[] = {
> -	0x61, 0x00, 0x03, 0x80, 0x20, 0x02, 0x05, 0x03, 0x04, 0x00, 0x10, 0x00,
> -	0x00, 0x00, 0x00, 0x00, 0x66, 0x01, 0x00, 0x80, 0x20, 0x82, 0x01, 0x80,
> -	0x00, 0x80, 0x00, 0x01, 0xc0, 0x04, 0xc0, 0x04, 0x41, 0x01, 0x20, 0x22,
> -	0x16, 0x09, 0x11, 0x03, 0x49, 0x00, 0x04, 0xa2, 0x12, 0x09, 0x11, 0x03,
> -	0x40, 0x01, 0x04, 0x00, 0x60, 0x06, 0x05, 0x05, 0x04, 0x04, 0x00, 0x01,
> -	0x05, 0x01, 0x58, 0x00, 0x40, 0x00, 0x24, 0x00, 0x60, 0x06, 0x05, 0x0a,
> -	0x04, 0x04, 0x00, 0x01, 0x05, 0x02, 0x58, 0x00, 0x40, 0x02, 0x0c, 0xa0,
> -	0x02, 0x05, 0x10, 0x07, 0x40, 0x02, 0x0e, 0xa6, 0x02, 0x0a, 0x10, 0x07,
> -	0x70, 0x02, 0x04, 0x00, 0x60, 0x02, 0x01, 0x00, 0x05, 0x0c, 0x46, 0x52,
> -	0x84, 0x08, 0x00, 0x00, 0x70, 0x02, 0x24, 0x00, 0x60, 0x02, 0x01, 0x00,
> -	0x05, 0x0e, 0x46, 0x52, 0x84, 0x08, 0x00, 0x00, 0x72, 0x00, 0x02, 0x80,
> -	0x50, 0x0d, 0x04, 0x00, 0x05, 0x00, 0x05, 0x1d, 0x05, 0x00, 0x05, 0x00,
> -	0x22, 0x00, 0x05, 0x01, 0x00, 0xc0, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00,
> -	0x90, 0x00, 0x00, 0x00, 0x69, 0x00, 0x10, 0x60, 0x02, 0x0c, 0x20, 0x00,
> -	0x69, 0x00, 0x12, 0x66, 0x02, 0x0e, 0x20, 0x00, 0x40, 0x02, 0x14, 0xa0,
> -	0x32, 0x10, 0x10, 0x08, 0x40, 0x02, 0x16, 0xa6, 0x32, 0x12, 0x10, 0x08,
> -	0x31, 0xa0, 0x04, 0x00, 0x00, 0x00, 0x14, 0x18, 0x14, 0x14, 0x00, 0xcc,
> -	0x00, 0x00, 0x16, 0x00, 0x31, 0x91, 0x24, 0x00, 0x00, 0x00, 0x14, 0x1a,
> -	0x14, 0x16, 0x00, 0xcc, 0x00, 0x00, 0x16, 0x00, 0x40, 0x00, 0x10, 0xa0,
> -	0x4a, 0x10, 0x10, 0x08, 0x40, 0x00, 0x12, 0xa6, 0x4a, 0x12, 0x10, 0x08,
> -	0x41, 0x20, 0x18, 0x20, 0x00, 0x18, 0x00, 0x18, 0x41, 0x21, 0x1a, 0x26,
> -	0x00, 0x1a, 0x00, 0x1a, 0x31, 0xa2, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00,
> -	0x14, 0x10, 0x02, 0xcc, 0x14, 0x18, 0x96, 0x00, 0x31, 0x93, 0x24, 0x00,
> -	0x00, 0x00, 0x00, 0x00, 0x14, 0x12, 0x02, 0xcc, 0x14, 0x1a, 0x96, 0x00,
> -	0x25, 0x00, 0x05, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> -	0x10, 0x00, 0x00, 0x00, 0x61, 0x00, 0x7f, 0x64, 0x00, 0x03, 0x10, 0x00,
> -	0x31, 0x44, 0x03, 0x80, 0x00, 0x00, 0x0c, 0x1c, 0x0c, 0x03, 0x00, 0xa0,
> -	0x00, 0x00, 0x78, 0x02, 0x61, 0x24, 0x03, 0x80, 0x20, 0x02, 0x01, 0x00,
> -	0x05, 0x1c, 0x46, 0x00, 0x00, 0x00, 0x00, 0x00, 0x61, 0x00, 0x04, 0x80,
> -	0xa0, 0x4a, 0x01, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> -	0x31, 0x01, 0x03, 0x80, 0x04, 0x00, 0x00, 0x00, 0x0c, 0x7f, 0x20, 0x70,
> -	0x00, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> -	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> -	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> -	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> -	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> -	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> -	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> -	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> -	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> -	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> -	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> -	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> -	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> -	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> -	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> -	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> -	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
> +
> +struct bo_dict_entry {
> +	uint64_t addr;
> +	uint32_t size;
> +	void *data;
>  };
> -unsigned int tgllp_kernel_square_length = sizeof(tgllp_kernel_square_bin);
> +
> +/*
> + * TGL compatible batch
> + */
>  
>  /**
>   * tgllp_create_indirect_data:
> @@ -80,8 +60,9 @@ unsigned int tgllp_kernel_square_length = sizeof(tgllp_kernel_square_bin);
>   *
>   * Prepares indirect data for compute pipeline.
>   */
> -void tgllp_create_indirect_data(uint32_t *addr_bo_buffer_batch,
> -				uint64_t addr_input, uint64_t addr_output)
> +static void tgllp_create_indirect_data(uint32_t *addr_bo_buffer_batch,
> +				       uint64_t addr_input,
> +				       uint64_t addr_output)
>  {
>  	int b = 0;
>  
> @@ -183,8 +164,9 @@ void tgllp_create_indirect_data(uint32_t *addr_bo_buffer_batch,
>   *
>   * Prepares surface state for compute pipeline.
>   */
> -void tgllp_create_surface_state(uint32_t *addr_bo_buffer_batch,
> -				uint64_t addr_input, uint64_t addr_output)
> +static void tgllp_create_surface_state(uint32_t *addr_bo_buffer_batch,
> +				       uint64_t addr_input,
> +				       uint64_t addr_output)
>  {
>  	int b = 0;
>  
> @@ -261,8 +243,8 @@ void tgllp_create_surface_state(uint32_t *addr_bo_buffer_batch,
>   *
>   * Prepares dynamic state for compute pipeline.
>   */
> -void tgllp_create_dynamic_state(uint32_t *addr_bo_buffer_batch,
> -				uint64_t offset_kernel)
> +static void tgllp_create_dynamic_state(uint32_t *addr_bo_buffer_batch,
> +				       uint64_t offset_kernel)
>  {
>  	int b = 0;
>  
> @@ -280,7 +262,7 @@ void tgllp_create_dynamic_state(uint32_t *addr_bo_buffer_batch,
>  }
>  
>  /**
> - * tgllp_create_batch_compute:
> + * tgllp_compute_exec_compute:
>   * @addr_bo_buffer_batch: pointer to batch buffer
>   * @addr_surface_state_base: gpu offset of surface state data
>   * @addr_dynamic_state_base: gpu offset of dynamic state data
> @@ -289,19 +271,19 @@ void tgllp_create_dynamic_state(uint32_t *addr_bo_buffer_batch,
>   *
>   * Prepares compute pipeline.
>   */
> -void tgllp_create_batch_compute(uint32_t *addr_bo_buffer_batch,
> -				uint64_t addr_surface_state_base,
> -				uint64_t addr_dynamic_state_base,
> -				uint64_t addr_indirect_object_base,
> -				uint64_t offset_indirect_data_start)
> +static void tgllp_compute_exec_compute(uint32_t *addr_bo_buffer_batch,
> +				       uint64_t addr_surface_state_base,
> +				       uint64_t addr_dynamic_state_base,
> +				       uint64_t addr_indirect_object_base,
> +				       uint64_t offset_indirect_data_start)
>  {
>  	int b = 0;
>  
> -	addr_bo_buffer_batch[b++] = MI_LOAD_REGISTER_IMM;
> +	addr_bo_buffer_batch[b++] = MI_LOAD_REGISTER_IMM(1);
>  	addr_bo_buffer_batch[b++] = 0x00002580;
>  	addr_bo_buffer_batch[b++] = 0x00060002;
>  	addr_bo_buffer_batch[b++] = PIPELINE_SELECT;
> -	addr_bo_buffer_batch[b++] = MI_LOAD_REGISTER_IMM;
> +	addr_bo_buffer_batch[b++] = MI_LOAD_REGISTER_IMM(1);
>  	addr_bo_buffer_batch[b++] = 0x00007034;
>  	addr_bo_buffer_batch[b++] = 0x60000321;
>  	addr_bo_buffer_batch[b++] = PIPE_CONTROL;
> @@ -310,7 +292,7 @@ void tgllp_create_batch_compute(uint32_t *addr_bo_buffer_batch,
>  	addr_bo_buffer_batch[b++] = 0x00000000;
>  	addr_bo_buffer_batch[b++] = 0x00000000;
>  	addr_bo_buffer_batch[b++] = 0x00000000;
> -	addr_bo_buffer_batch[b++] = MI_LOAD_REGISTER_IMM;
> +	addr_bo_buffer_batch[b++] = MI_LOAD_REGISTER_IMM(1);
>  	addr_bo_buffer_batch[b++] = 0x0000E404;
>  	addr_bo_buffer_batch[b++] = 0x00000100;
>  	addr_bo_buffer_batch[b++] = PIPE_CONTROL;
> @@ -405,3 +387,111 @@ void tgllp_create_batch_compute(uint32_t *addr_bo_buffer_batch,
>  	addr_bo_buffer_batch[b++] = 0x00000000;
>  	addr_bo_buffer_batch[b++] = MI_BATCH_BUFFER_END;
>  }
> +
> +/**
> + * tgl_compute_exec - run a pipeline compatible with Tiger Lake
> + *
> + * @fd: file descriptor of the opened DRM device
> + * @kernel: GPU Kernel binary to be executed
> + * @size: size of @kernel.
> + */
> +static void tgl_compute_exec(int fd, const unsigned char *kernel,
> +			     unsigned int size)
> +{
> +	uint32_t vm, engine;
> +	float *dinput;
> +	struct drm_xe_sync sync = { 0 };
> +#define TGL_BO_DICT_ENTRIES 7
> +	struct bo_dict_entry bo_dict[TGL_BO_DICT_ENTRIES] = {
> +		{ .addr = ADDR_INDIRECT_OBJECT_BASE + OFFSET_KERNEL}, // kernel
> +		{ .addr = ADDR_DYNAMIC_STATE_BASE, .size =  0x1000}, // dynamic state
> +		{ .addr = ADDR_SURFACE_STATE_BASE, .size =  0x1000}, // surface state
> +		{ .addr = ADDR_INDIRECT_OBJECT_BASE + OFFSET_INDIRECT_DATA_START, .size =  0x10000}, // indirect data
> +		{ .addr = ADDR_INPUT, .size = SIZE_BUFFER_INPUT }, // input
> +		{ .addr = ADDR_OUTPUT, .size = SIZE_BUFFER_OUTPUT }, // output
> +		{ .addr = ADDR_BATCH, .size = SIZE_BATCH }, // batch
> +	};
> +
> +	/* Sets Kernel size */
> +	bo_dict[0].size = ALIGN(size, 0x1000);
> +
> +	vm = xe_vm_create(fd, DRM_XE_VM_CREATE_ASYNC_BIND_OPS, 0);
> +	engine = xe_engine_create_class(fd, vm, DRM_XE_ENGINE_CLASS_RENDER);
> +	sync.flags = DRM_XE_SYNC_SYNCOBJ | DRM_XE_SYNC_SIGNAL;
> +	sync.handle = syncobj_create(fd, 0);
> +
> +	for (int i = 0; i < TGL_BO_DICT_ENTRIES; i++) {
> +		bo_dict[i].data = aligned_alloc(xe_get_default_alignment(fd), bo_dict[i].size);
> +		xe_vm_bind_userptr_async(fd, vm, 0, to_user_pointer(bo_dict[i].data), bo_dict[i].addr, bo_dict[i].size, &sync, 1);
> +		syncobj_wait(fd, &sync.handle, 1, INT64_MAX, 0, NULL);
> +		memset(bo_dict[i].data, 0, bo_dict[i].size);
> +	}
> +	memcpy(bo_dict[0].data, kernel, size);
> +	tgllp_create_dynamic_state(bo_dict[1].data, OFFSET_KERNEL);
> +	tgllp_create_surface_state(bo_dict[2].data, ADDR_INPUT, ADDR_OUTPUT);
> +	tgllp_create_indirect_data(bo_dict[3].data, ADDR_INPUT, ADDR_OUTPUT);
> +	dinput = (float *)bo_dict[4].data;
> +	srand(time(NULL));
> +
> +	for (int i = 0; i < SIZE_DATA; i++)
> +		((float *)dinput)[i] = rand() / (float)RAND_MAX;
> +
> +	tgllp_compute_exec_compute(bo_dict[6].data, ADDR_SURFACE_STATE_BASE, ADDR_DYNAMIC_STATE_BASE, ADDR_INDIRECT_OBJECT_BASE, OFFSET_INDIRECT_DATA_START);
> +
> +	xe_exec_wait(fd, engine, ADDR_BATCH);
> +
> +	for (int i = 0; i < SIZE_DATA; i++)
> +		igt_assert(((float *)bo_dict[5].data)[i] == ((float *)bo_dict[4].data)[i] * ((float *) bo_dict[4].data)[i]);
> +
> +	for (int i = 0; i < TGL_BO_DICT_ENTRIES; i++) {
> +		xe_vm_unbind_async(fd, vm, 0, 0, bo_dict[i].addr, bo_dict[i].size, &sync, 1);
> +		syncobj_wait(fd, &sync.handle, 1, INT64_MAX, 0, NULL);
> +		free(bo_dict[i].data);
> +	}
> +
> +	syncobj_destroy(fd, sync.handle);
> +	xe_engine_destroy(fd, engine);
> +	xe_vm_destroy(fd, vm);
> +}
> +
> +/*
> + * Generic code
> + */
> +
> +static const struct {
> +	unsigned int ip_ver;
> +	void (*compute_exec)(int fd, const unsigned char *kernel,
> +			     unsigned int size);
> +} xe_compute_batches[] = {
> +	{
> +		.ip_ver = IP_VER(12, 0),
> +		.compute_exec = tgl_compute_exec,
> +	},
> +};
> +
> +int run_xe_compute_kernel(int fd)
> +{
> +	unsigned int ip_ver = intel_graphics_ver(intel_get_drm_devid(fd));
> +	unsigned int batch;
> +	const struct xe_compute_kernels *kernels = xe_compute_square_kernels;
> +
> +	for (batch = 0; batch < ARRAY_SIZE(xe_compute_batches); batch++) {
> +		if (ip_ver == xe_compute_batches[batch].ip_ver)
> +			break;
> +	}
> +	if (batch == ARRAY_SIZE(xe_compute_batches))
> +		return 1;
> +
> +	while (kernels->kernel) {
> +		if (ip_ver == kernels->ip_ver)
> +			break;
> +		kernels++;
> +	}
> +	if (!kernels->kernel)
> +		return 1;
> +
> +	xe_compute_batches[batch].compute_exec(fd, kernels->kernel,
> +					       kernels->size);
> +
> +	return 0;
> +}
> diff --git a/lib/xe/xe_compute.h b/lib/xe/xe_compute.h
> index de763101da90..5faa3713c40e 100644
> --- a/lib/xe/xe_compute.h
> +++ b/lib/xe/xe_compute.h
> @@ -9,21 +9,24 @@
>  #ifndef XE_COMPUTE_H
>  #define XE_COMPUTE_H
>  
> -#include <stdint.h>
> +/*
> + * OpenCL Kernels are generated using:
> + *
> + * GPU=tgllp &&                                                         \
> + *      ocloc -file opencl/compute_square_kernel.cl -device $GPU &&     \
> + *      xxd -i compute_square_kernel_Gen12LPlp.bin
> + *
> + * For each GPU model desired. A list of supported models can be obtained with: ocloc compile --help
> + */
> +
> +struct xe_compute_kernels {
> +	int ip_ver;
> +	unsigned int size;
> +	const unsigned char *kernel;
> +};
>  
> -void tgllp_create_indirect_data(uint32_t *addr_bo_buffer_batch,
> -				uint64_t addr_input, uint64_t addr_output);
> -void tgllp_create_surface_state(uint32_t *addr_bo_buffer_batch,
> -				uint64_t addr_input, uint64_t addr_output);
> -void tgllp_create_dynamic_state(uint32_t *addr_bo_buffer_batch,
> -				uint64_t offset_kernel);
> -void tgllp_create_batch_compute(uint32_t *addr_bo_buffer_batch,
> -				uint64_t addr_surface_state_base,
> -				uint64_t addr_dynamic_state_base,
> -				uint64_t addr_indirect_object_base,
> -				uint64_t offset_indirect_data_start);
> +extern const struct xe_compute_kernels xe_compute_square_kernels[];
>  
> -extern unsigned char tgllp_kernel_square_bin[];
> -extern unsigned int tgllp_kernel_square_length;
> +int run_xe_compute_kernel(int fd);
>  
>  #endif	/* XE_COMPUTE_H */
> diff --git a/lib/xe/xe_compute_square_kernels.c b/lib/xe/xe_compute_square_kernels.c
> new file mode 100644
> index 000000000000..f9c07dc778bd
> --- /dev/null
> +++ b/lib/xe/xe_compute_square_kernels.c
> @@ -0,0 +1,71 @@
> +/* SPDX-License-Identifier: MIT */
> +
> +/*
> + * Copyright © 2022 Intel Corporation
> + *
> + * Authors:
> + *		Francois Dugast <francois.dugast@intel.com>
> + */
> +
> +#include "intel_chipset.h"
> +#include "lib/xe/xe_compute.h"
> +
> +static const unsigned char tgllp_kernel_square_bin[] = {
> +	0x61, 0x00, 0x03, 0x80, 0x20, 0x02, 0x05, 0x03, 0x04, 0x00, 0x10, 0x00,
> +	0x00, 0x00, 0x00, 0x00, 0x66, 0x01, 0x00, 0x80, 0x20, 0x82, 0x01, 0x80,
> +	0x00, 0x80, 0x00, 0x01, 0xc0, 0x04, 0xc0, 0x04, 0x41, 0x01, 0x20, 0x22,
> +	0x16, 0x09, 0x11, 0x03, 0x49, 0x00, 0x04, 0xa2, 0x12, 0x09, 0x11, 0x03,
> +	0x40, 0x01, 0x04, 0x00, 0x60, 0x06, 0x05, 0x05, 0x04, 0x04, 0x00, 0x01,
> +	0x05, 0x01, 0x58, 0x00, 0x40, 0x00, 0x24, 0x00, 0x60, 0x06, 0x05, 0x0a,
> +	0x04, 0x04, 0x00, 0x01, 0x05, 0x02, 0x58, 0x00, 0x40, 0x02, 0x0c, 0xa0,
> +	0x02, 0x05, 0x10, 0x07, 0x40, 0x02, 0x0e, 0xa6, 0x02, 0x0a, 0x10, 0x07,
> +	0x70, 0x02, 0x04, 0x00, 0x60, 0x02, 0x01, 0x00, 0x05, 0x0c, 0x46, 0x52,
> +	0x84, 0x08, 0x00, 0x00, 0x70, 0x02, 0x24, 0x00, 0x60, 0x02, 0x01, 0x00,
> +	0x05, 0x0e, 0x46, 0x52, 0x84, 0x08, 0x00, 0x00, 0x72, 0x00, 0x02, 0x80,
> +	0x50, 0x0d, 0x04, 0x00, 0x05, 0x00, 0x05, 0x1d, 0x05, 0x00, 0x05, 0x00,
> +	0x22, 0x00, 0x05, 0x01, 0x00, 0xc0, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00,
> +	0x90, 0x00, 0x00, 0x00, 0x69, 0x00, 0x10, 0x60, 0x02, 0x0c, 0x20, 0x00,
> +	0x69, 0x00, 0x12, 0x66, 0x02, 0x0e, 0x20, 0x00, 0x40, 0x02, 0x14, 0xa0,
> +	0x32, 0x10, 0x10, 0x08, 0x40, 0x02, 0x16, 0xa6, 0x32, 0x12, 0x10, 0x08,
> +	0x31, 0xa0, 0x04, 0x00, 0x00, 0x00, 0x14, 0x18, 0x14, 0x14, 0x00, 0xcc,
> +	0x00, 0x00, 0x16, 0x00, 0x31, 0x91, 0x24, 0x00, 0x00, 0x00, 0x14, 0x1a,
> +	0x14, 0x16, 0x00, 0xcc, 0x00, 0x00, 0x16, 0x00, 0x40, 0x00, 0x10, 0xa0,
> +	0x4a, 0x10, 0x10, 0x08, 0x40, 0x00, 0x12, 0xa6, 0x4a, 0x12, 0x10, 0x08,
> +	0x41, 0x20, 0x18, 0x20, 0x00, 0x18, 0x00, 0x18, 0x41, 0x21, 0x1a, 0x26,
> +	0x00, 0x1a, 0x00, 0x1a, 0x31, 0xa2, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	0x14, 0x10, 0x02, 0xcc, 0x14, 0x18, 0x96, 0x00, 0x31, 0x93, 0x24, 0x00,
> +	0x00, 0x00, 0x00, 0x00, 0x14, 0x12, 0x02, 0xcc, 0x14, 0x1a, 0x96, 0x00,
> +	0x25, 0x00, 0x05, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	0x10, 0x00, 0x00, 0x00, 0x61, 0x00, 0x7f, 0x64, 0x00, 0x03, 0x10, 0x00,
> +	0x31, 0x44, 0x03, 0x80, 0x00, 0x00, 0x0c, 0x1c, 0x0c, 0x03, 0x00, 0xa0,
> +	0x00, 0x00, 0x78, 0x02, 0x61, 0x24, 0x03, 0x80, 0x20, 0x02, 0x01, 0x00,
> +	0x05, 0x1c, 0x46, 0x00, 0x00, 0x00, 0x00, 0x00, 0x61, 0x00, 0x04, 0x80,
> +	0xa0, 0x4a, 0x01, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	0x31, 0x01, 0x03, 0x80, 0x04, 0x00, 0x00, 0x00, 0x0c, 0x7f, 0x20, 0x70,
> +	0x00, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
> +};
> +
> +const struct xe_compute_kernels xe_compute_square_kernels[] = {
> +	{
> +		.ip_ver = IP_VER(12, 0),
> +		.size = sizeof(tgllp_kernel_square_bin),
> +		.kernel = tgllp_kernel_square_bin,
> +	},
> +	{}
> +};
> diff --git a/tests/xe/xe_compute.c b/tests/xe/xe_compute.c
> index 138d80671435..202d318c60c0 100644
> --- a/tests/xe/xe_compute.c
> +++ b/tests/xe/xe_compute.c
> @@ -14,117 +14,21 @@
>  #include <string.h>
>  
>  #include "igt.h"
> -#include "lib/igt_syncobj.h"
> -#include "xe_drm.h"
> -#include "xe/xe_ioctl.h"
>  #include "xe/xe_query.h"
>  #include "xe/xe_compute.h"
>  
> -#define MAX(X, Y)			(((X) > (Y)) ? (X) : (Y))
> -#define SIZE_DATA			64
> -#define SIZE_BATCH			0x1000
> -#define SIZE_KERNEL			0x1000
> -#define SIZE_BUFFER_INPUT		MAX(sizeof(float)*SIZE_DATA, 0x1000)
> -#define SIZE_BUFFER_OUTPUT		MAX(sizeof(float)*SIZE_DATA, 0x1000)
> -#define ADDR_BATCH			0x100000
> -#define ADDR_INPUT			(unsigned long)0x200000
> -#define ADDR_OUTPUT			(unsigned long)0x300000
> -#define ADDR_SURFACE_STATE_BASE		(unsigned long)0x400000
> -#define ADDR_DYNAMIC_STATE_BASE		(unsigned long)0x500000
> -#define ADDR_INDIRECT_OBJECT_BASE	0x800100000000
> -#define OFFSET_INDIRECT_DATA_START	0xFFFDF000
> -#define OFFSET_KERNEL			0xFFFEF000
> -
> -struct bo_dict_entry {
> -	uint64_t addr;
> -	uint32_t size;
> -	void *data;
> -};
> -
>  /**
>   * SUBTEST: compute-square
> - * GPU requirement: only works on TGL_GT2 with device ID: 0x9a49
> + * GPU requirement: only works on TGL
>   * Description:
> - * 	This test shows how to create a batch to execute a
> - * 	compute kernel. For now it supports tgllp only.
> + *	Run an openCL Kernel that returns output[i] = input[i] * input[i],
> + *	for an input dataset..
>   * TODO: extend test to cover other platforms
>   */
>  static void
>  test_compute_square(int fd)
>  {
> -	uint32_t vm, engine;
> -	float *dinput;
> -	struct drm_xe_sync sync = { 0 };
> -
> -#define BO_DICT_ENTRIES 7
> -	struct bo_dict_entry bo_dict[BO_DICT_ENTRIES] = {
> -		{ .addr = ADDR_INDIRECT_OBJECT_BASE + OFFSET_KERNEL, .size = SIZE_KERNEL }, // kernel
> -		{ .addr = ADDR_DYNAMIC_STATE_BASE, .size =  0x1000}, // dynamic state
> -		{ .addr = ADDR_SURFACE_STATE_BASE, .size =  0x1000}, // surface state
> -		{ .addr = ADDR_INDIRECT_OBJECT_BASE + OFFSET_INDIRECT_DATA_START, .size =  0x10000}, // indirect data
> -		{ .addr = ADDR_INPUT, .size = SIZE_BUFFER_INPUT }, // input
> -		{ .addr = ADDR_OUTPUT, .size = SIZE_BUFFER_OUTPUT }, // output
> -		{ .addr = ADDR_BATCH, .size = SIZE_BATCH }, // batch
> -	};
> -
> -	vm = xe_vm_create(fd, DRM_XE_VM_CREATE_ASYNC_BIND_OPS, 0);
> -	engine = xe_engine_create_class(fd, vm, DRM_XE_ENGINE_CLASS_RENDER);
> -	sync.flags = DRM_XE_SYNC_SYNCOBJ | DRM_XE_SYNC_SIGNAL;
> -	sync.handle = syncobj_create(fd, 0);
> -
> -	for(int i = 0; i < BO_DICT_ENTRIES; i++) {
> -		bo_dict[i].data = aligned_alloc(xe_get_default_alignment(fd), bo_dict[i].size);
> -		xe_vm_bind_userptr_async(fd, vm, 0, to_user_pointer(bo_dict[i].data), bo_dict[i].addr, bo_dict[i].size, &sync, 1);
> -		syncobj_wait(fd, &sync.handle, 1, INT64_MAX, 0, NULL);
> -		memset(bo_dict[i].data, 0, bo_dict[i].size);
> -	}
> -	memcpy(bo_dict[0].data, tgllp_kernel_square_bin, tgllp_kernel_square_length);
> -	tgllp_create_dynamic_state(bo_dict[1].data, OFFSET_KERNEL);
> -	tgllp_create_surface_state(bo_dict[2].data, ADDR_INPUT, ADDR_OUTPUT);
> -	tgllp_create_indirect_data(bo_dict[3].data, ADDR_INPUT, ADDR_OUTPUT);
> -	dinput = (float *)bo_dict[4].data;
> -	srand(time(NULL));
> -	for(int i=0; i < SIZE_DATA; i++) {
> -		((float*) dinput)[i] = rand()/(float)RAND_MAX;
> -	}
> -	tgllp_create_batch_compute(bo_dict[6].data, ADDR_SURFACE_STATE_BASE, ADDR_DYNAMIC_STATE_BASE, ADDR_INDIRECT_OBJECT_BASE, OFFSET_INDIRECT_DATA_START);
> -
> -	xe_exec_wait(fd, engine, ADDR_BATCH);
> -	for(int i = 0; i < SIZE_DATA; i++) {
> -		igt_assert(((float*) bo_dict[5].data)[i] == ((float*) bo_dict[4].data)[i] * ((float*) bo_dict[4].data)[i]);
> -	}
> -
> -	for(int i = 0; i < BO_DICT_ENTRIES; i++) {
> -		xe_vm_unbind_async(fd, vm, 0, 0, bo_dict[i].addr, bo_dict[i].size, &sync, 1);
> -		syncobj_wait(fd, &sync.handle, 1, INT64_MAX, 0, NULL);
> -		free(bo_dict[i].data);
> -	}
> -
> -	syncobj_destroy(fd, sync.handle);
> -	xe_engine_destroy(fd, engine);
> -	xe_vm_destroy(fd, vm);
> -}
> -
> -static bool
> -is_device_supported(int fd)
> -{
> -	struct drm_xe_query_config *config;
> -	struct drm_xe_device_query query = {
> -		.extensions = 0,
> -		.query = DRM_XE_DEVICE_QUERY_CONFIG,
> -		.size = 0,
> -		.data = 0,
> -	};
> -
> -	igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query), 0);
> -
> -	config = malloc(query.size);
> -	igt_assert(config);
> -
> -	query.data = to_user_pointer(config);
> -	igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query), 0);
> -
> -	return (config->info[XE_QUERY_CONFIG_REV_AND_DEVICE_ID] & 0xffff) == 0x9a49;
> +	igt_require_f(!run_xe_compute_kernel(fd), "GPU not supported\n");

This looks weird. I interpret this "require NOT run xe compute kernel".
I think run_xe_compute_kernel() should return bool (true) if succeed,
false otherwise.

With this fixed:

Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>

--
Zbigniew

>  }
>  
>  igt_main
> @@ -136,10 +40,8 @@ igt_main
>  		xe_device_get(xe);
>  	}
>  
> -	igt_subtest("compute-square") {
> -		igt_skip_on(!is_device_supported(xe));
> +	igt_subtest("compute-square")
>  		test_compute_square(xe);
> -	}
>  
>  	igt_fixture {
>  		xe_device_put(xe);
> -- 
> 2.39.2
> 


^ permalink raw reply	[flat|nested] 13+ messages in thread

* [igt-dev] [PATCH i-g-t 3/5] lib/xe/xe_compute: use registers defs from intel_gpu_commands.h
  2023-03-27 13:41 [igt-dev] [PATCH i-g-t 0/5] Make xe_compute test more generic Mauro Carvalho Chehab
  2023-03-27 13:41 ` [igt-dev] [PATCH i-g-t 1/5] compute_square_kernel.cl: add CL file used at xe_compute.c Mauro Carvalho Chehab
  2023-03-27 13:41 ` [igt-dev] [PATCH i-g-t 2/5] xe/xe_compute: place OpenCL kernel on a separate file Mauro Carvalho Chehab
@ 2023-03-27 13:41 ` Mauro Carvalho Chehab
  2023-04-03 10:50   ` Zbigniew Kempczyński
  2023-03-27 13:41 ` [igt-dev] [PATCH i-g-t 4/5] gen_opencl_kernel: add script to dynamically create OpenCL kernels Mauro Carvalho Chehab
                   ` (3 subsequent siblings)
  6 siblings, 1 reply; 13+ messages in thread
From: Mauro Carvalho Chehab @ 2023-03-27 13:41 UTC (permalink / raw)
  To: igt-dev

From: Mauro Carvalho Chehab <mchehab@kernel.org>

There are some register definitions that are already defined inside
intel_gpu_commands.h with a different concept.

Change the code to re-use the definitions there.

Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
---
 lib/xe/xe_compute.c | 17 ++++-------------
 1 file changed, 4 insertions(+), 13 deletions(-)

diff --git a/lib/xe/xe_compute.c b/lib/xe/xe_compute.c
index 7259b888eb9e..9e50eba1b87b 100644
--- a/lib/xe/xe_compute.c
+++ b/lib/xe/xe_compute.c
@@ -33,15 +33,6 @@
 #define OFFSET_INDIRECT_DATA_START	0xFFFDF000
 #define OFFSET_KERNEL			0xFFFEF000
 
-#undef MEDIA_VFE_STATE
-#define MEDIA_VFE_STATE			0x70000007
-#undef STATE_BASE_ADDRESS
-#define STATE_BASE_ADDRESS		0x61010014
-#undef MEDIA_INTERFACE_DESCRIPTOR_LOAD
-#define MEDIA_INTERFACE_DESCRIPTOR_LOAD	0x70020002
-#undef GPGPU_WALKER
-#define GPGPU_WALKER			0x7105000d
-
 struct bo_dict_entry {
 	uint64_t addr;
 	uint32_t size;
@@ -301,7 +292,7 @@ static void tgllp_compute_exec_compute(uint32_t *addr_bo_buffer_batch,
 	addr_bo_buffer_batch[b++] = 0x00000000;
 	addr_bo_buffer_batch[b++] = 0x00000000;
 	addr_bo_buffer_batch[b++] = 0x00000000;
-	addr_bo_buffer_batch[b++] = MEDIA_VFE_STATE;
+	addr_bo_buffer_batch[b++] = MEDIA_VFE_STATE | (9 - 2);
 	addr_bo_buffer_batch[b++] = 0x00000000;
 	addr_bo_buffer_batch[b++] = 0x00000000;
 	addr_bo_buffer_batch[b++] = 0x00A70100;
@@ -316,7 +307,7 @@ static void tgllp_compute_exec_compute(uint32_t *addr_bo_buffer_batch,
 	addr_bo_buffer_batch[b++] = 0x00000000;
 	addr_bo_buffer_batch[b++] = 0x00000000;
 	addr_bo_buffer_batch[b++] = 0x00000000;
-	addr_bo_buffer_batch[b++] = STATE_BASE_ADDRESS;
+	addr_bo_buffer_batch[b++] = STATE_BASE_ADDRESS | (16 - 2);
 	addr_bo_buffer_batch[b++] = 0x00000001;
 	addr_bo_buffer_batch[b++] = 0x00000000;
 	addr_bo_buffer_batch[b++] = 0x00040000;
@@ -352,11 +343,11 @@ static void tgllp_compute_exec_compute(uint32_t *addr_bo_buffer_batch,
 	addr_bo_buffer_batch[b++] = 0x00000000;
 	addr_bo_buffer_batch[b++] = MEDIA_STATE_FLUSH;
 	addr_bo_buffer_batch[b++] = 0x00000000;
-	addr_bo_buffer_batch[b++] = MEDIA_INTERFACE_DESCRIPTOR_LOAD;
+	addr_bo_buffer_batch[b++] = MEDIA_INTERFACE_DESCRIPTOR_LOAD | (4 - 2);
 	addr_bo_buffer_batch[b++] = 0x00000000;
 	addr_bo_buffer_batch[b++] = 0x00000020;
 	addr_bo_buffer_batch[b++] = 0x00000000;
-	addr_bo_buffer_batch[b++] = GPGPU_WALKER;
+	addr_bo_buffer_batch[b++] = GPGPU_WALKER | 13;
 	addr_bo_buffer_batch[b++] = 0x00000000;
 	addr_bo_buffer_batch[b++] = 0x00000c80;
 	addr_bo_buffer_batch[b++] = offset_indirect_data_start;
-- 
2.39.2

^ permalink raw reply related	[flat|nested] 13+ messages in thread

* Re: [igt-dev] [PATCH i-g-t 3/5] lib/xe/xe_compute: use registers defs from intel_gpu_commands.h
  2023-03-27 13:41 ` [igt-dev] [PATCH i-g-t 3/5] lib/xe/xe_compute: use registers defs from intel_gpu_commands.h Mauro Carvalho Chehab
@ 2023-04-03 10:50   ` Zbigniew Kempczyński
  0 siblings, 0 replies; 13+ messages in thread
From: Zbigniew Kempczyński @ 2023-04-03 10:50 UTC (permalink / raw)
  To: Mauro Carvalho Chehab; +Cc: igt-dev

On Mon, Mar 27, 2023 at 03:41:17PM +0200, Mauro Carvalho Chehab wrote:
> From: Mauro Carvalho Chehab <mchehab@kernel.org>
> 
> There are some register definitions that are already defined inside
> intel_gpu_commands.h with a different concept.
> 
> Change the code to re-use the definitions there.

Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>

--
Zbigniew

> 
> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
> ---
>  lib/xe/xe_compute.c | 17 ++++-------------
>  1 file changed, 4 insertions(+), 13 deletions(-)
> 
> diff --git a/lib/xe/xe_compute.c b/lib/xe/xe_compute.c
> index 7259b888eb9e..9e50eba1b87b 100644
> --- a/lib/xe/xe_compute.c
> +++ b/lib/xe/xe_compute.c
> @@ -33,15 +33,6 @@
>  #define OFFSET_INDIRECT_DATA_START	0xFFFDF000
>  #define OFFSET_KERNEL			0xFFFEF000
>  
> -#undef MEDIA_VFE_STATE
> -#define MEDIA_VFE_STATE			0x70000007
> -#undef STATE_BASE_ADDRESS
> -#define STATE_BASE_ADDRESS		0x61010014
> -#undef MEDIA_INTERFACE_DESCRIPTOR_LOAD
> -#define MEDIA_INTERFACE_DESCRIPTOR_LOAD	0x70020002
> -#undef GPGPU_WALKER
> -#define GPGPU_WALKER			0x7105000d
> -
>  struct bo_dict_entry {
>  	uint64_t addr;
>  	uint32_t size;
> @@ -301,7 +292,7 @@ static void tgllp_compute_exec_compute(uint32_t *addr_bo_buffer_batch,
>  	addr_bo_buffer_batch[b++] = 0x00000000;
>  	addr_bo_buffer_batch[b++] = 0x00000000;
>  	addr_bo_buffer_batch[b++] = 0x00000000;
> -	addr_bo_buffer_batch[b++] = MEDIA_VFE_STATE;
> +	addr_bo_buffer_batch[b++] = MEDIA_VFE_STATE | (9 - 2);
>  	addr_bo_buffer_batch[b++] = 0x00000000;
>  	addr_bo_buffer_batch[b++] = 0x00000000;
>  	addr_bo_buffer_batch[b++] = 0x00A70100;
> @@ -316,7 +307,7 @@ static void tgllp_compute_exec_compute(uint32_t *addr_bo_buffer_batch,
>  	addr_bo_buffer_batch[b++] = 0x00000000;
>  	addr_bo_buffer_batch[b++] = 0x00000000;
>  	addr_bo_buffer_batch[b++] = 0x00000000;
> -	addr_bo_buffer_batch[b++] = STATE_BASE_ADDRESS;
> +	addr_bo_buffer_batch[b++] = STATE_BASE_ADDRESS | (16 - 2);
>  	addr_bo_buffer_batch[b++] = 0x00000001;
>  	addr_bo_buffer_batch[b++] = 0x00000000;
>  	addr_bo_buffer_batch[b++] = 0x00040000;
> @@ -352,11 +343,11 @@ static void tgllp_compute_exec_compute(uint32_t *addr_bo_buffer_batch,
>  	addr_bo_buffer_batch[b++] = 0x00000000;
>  	addr_bo_buffer_batch[b++] = MEDIA_STATE_FLUSH;
>  	addr_bo_buffer_batch[b++] = 0x00000000;
> -	addr_bo_buffer_batch[b++] = MEDIA_INTERFACE_DESCRIPTOR_LOAD;
> +	addr_bo_buffer_batch[b++] = MEDIA_INTERFACE_DESCRIPTOR_LOAD | (4 - 2);
>  	addr_bo_buffer_batch[b++] = 0x00000000;
>  	addr_bo_buffer_batch[b++] = 0x00000020;
>  	addr_bo_buffer_batch[b++] = 0x00000000;
> -	addr_bo_buffer_batch[b++] = GPGPU_WALKER;
> +	addr_bo_buffer_batch[b++] = GPGPU_WALKER | 13;
>  	addr_bo_buffer_batch[b++] = 0x00000000;
>  	addr_bo_buffer_batch[b++] = 0x00000c80;
>  	addr_bo_buffer_batch[b++] = offset_indirect_data_start;
> -- 
> 2.39.2
> 


^ permalink raw reply	[flat|nested] 13+ messages in thread

* [igt-dev] [PATCH i-g-t 4/5] gen_opencl_kernel: add script to dynamically create OpenCL kernels
  2023-03-27 13:41 [igt-dev] [PATCH i-g-t 0/5] Make xe_compute test more generic Mauro Carvalho Chehab
                   ` (2 preceding siblings ...)
  2023-03-27 13:41 ` [igt-dev] [PATCH i-g-t 3/5] lib/xe/xe_compute: use registers defs from intel_gpu_commands.h Mauro Carvalho Chehab
@ 2023-03-27 13:41 ` Mauro Carvalho Chehab
  2023-04-03 10:58   ` Zbigniew Kempczyński
  2023-03-27 13:41 ` [igt-dev] [PATCH i-g-t 5/5] [RFC EXAMPLE] lib/xe/xe_compute_kernels.c: re-generate TGL binary Mauro Carvalho Chehab
                   ` (2 subsequent siblings)
  6 siblings, 1 reply; 13+ messages in thread
From: Mauro Carvalho Chehab @ 2023-03-27 13:41 UTC (permalink / raw)
  To: igt-dev

From: Mauro Carvalho Chehab <mchehab@kernel.org>

Compute tests can be produced by using OpenCL, by calling ocloc.

While this can be part of IGT building system, for now, let's add
a script for such purpose.

Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
---
 opencl/README            | 11 +++++
 opencl/gen_opencl_kernel | 86 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 97 insertions(+)
 create mode 100644 opencl/README
 create mode 100755 opencl/gen_opencl_kernel

diff --git a/opencl/README b/opencl/README
new file mode 100644
index 000000000000..5d0df2ad6c33
--- /dev/null
+++ b/opencl/README
@@ -0,0 +1,11 @@
+This directory contains some OpenCL compute files, and a script to be used
+to produce a header file containing the binaries for the CL against
+multiple platforms.
+
+For instance, to generate compute square Kernel binaries for TGL and ADL
+variants, use this:
+
+    opencl/gen_opencl_kernel xe_compute_square opencl/compute_square_kernel.cl \
+	   xe_compute_square_kernels.c build/opencl tgllp adl-s adl-p adl-n
+
+    cp build/opencl/xe_compute_square_kernels.c lib/xe/
diff --git a/opencl/gen_opencl_kernel b/opencl/gen_opencl_kernel
new file mode 100755
index 000000000000..8bbc62a20cde
--- /dev/null
+++ b/opencl/gen_opencl_kernel
@@ -0,0 +1,86 @@
+#!/bin/bash
+
+trap 'catch $LINENO' ERR
+
+catch() {
+    echo "error in line $1"
+    exit 1
+}
+
+
+# Parse arguments
+if [ $# -lt 5 ]; then
+        echo -e 'Usage:\n\t$0: <Kernel name> <kernel.cl> <header name> <dest_dir> <GPU models>' >&2
+        echo -e "Example:\n\t$0 kernel_foo kernel.cl kernels.c ../build/opencl tgllp rkl\n" >&2
+        exit 1
+fi
+
+kernel_name=$1
+shift
+
+kernel_cl=$1
+shift
+
+output_fname=$1
+shift
+
+dest_dir=$1
+shift
+
+mkdir -p $dest_dir
+
+args=( "$@" )
+
+echo $args
+
+out_files=""
+for i in "${args[@]}"; do
+	name="$dest_dir/${i}_${kernel_name}"
+	out="$name.h"
+        echo "Generating $out"
+	ocloc compile -q -file ${kernel_cl} -device ${i} -output ${name}_bin -output_no_suffix
+	xxd -n "${i}_${kernel_name}" -i ${name}_bin >$out
+	sed "s,  ,\t,;s,.*unsigned int.*,,;s,\-,_,g;s,unsigned,static const unsigned," -i $out
+	sed "1 i// Match ID: $(ocloc ids $i|grep -v "Matched ids:")" -i $out
+	out_files+=" $out"
+done
+
+output_fname="$dest_dir/$output_fname"
+echo "Generating $output_fname"
+
+cat << PREFIX >$output_fname
+/* SPDX-License-Identifier: MIT */
+/*
+ * This file is auto-generated from $kernel_cl:
+ *
+PREFIX
+
+cat $kernel_cl |sed s,"^"," * ," >>$output_fname
+
+cat << INCLUDES >>$output_fname
+ */
+
+#include "intel_chipset.h"
+#include "lib/xe/xe_compute.h"
+
+INCLUDES
+
+cat $out_files >>$output_fname
+
+echo "const struct xe_compute_kernels ${kernel_name}_kernels[] = {" >>$output_fname
+
+for i in "${args[@]}"; do
+        out="$dest_dir/${i}_${kernel_name}.h"
+        echo -e "\t{" >>$output_fname; \
+	grep "Match ID:" $out|sed -E "s/.*\s([0-9]+)\.([0-9]+).*/\t\t.ip_ver = IP_VER(\1, \2),/" >>$output_fname;
+	grep unsigned $out|sed -E "s/.*\s+([_a-zA-Z0-9]+)\[\].*/\t\t.size = sizeof(\1),/" >>$output_fname;
+	grep unsigned $out|sed -E "s/.*\s+([_a-zA-Z0-9]+)\[\].*/\t\t.kernel = \1,/" >>$output_fname;
+	echo -e "\t}," >>$output_fname;
+done
+
+cat << SUFFIX >>$output_fname
+	{}
+};
+SUFFIX
+
+echo "Done."
-- 
2.39.2

^ permalink raw reply related	[flat|nested] 13+ messages in thread

* Re: [igt-dev] [PATCH i-g-t 4/5] gen_opencl_kernel: add script to dynamically create OpenCL kernels
  2023-03-27 13:41 ` [igt-dev] [PATCH i-g-t 4/5] gen_opencl_kernel: add script to dynamically create OpenCL kernels Mauro Carvalho Chehab
@ 2023-04-03 10:58   ` Zbigniew Kempczyński
  2023-04-04  6:07     ` Mauro Carvalho Chehab
  0 siblings, 1 reply; 13+ messages in thread
From: Zbigniew Kempczyński @ 2023-04-03 10:58 UTC (permalink / raw)
  To: Mauro Carvalho Chehab; +Cc: igt-dev

On Mon, Mar 27, 2023 at 03:41:18PM +0200, Mauro Carvalho Chehab wrote:
> From: Mauro Carvalho Chehab <mchehab@kernel.org>
> 
> Compute tests can be produced by using OpenCL, by calling ocloc.
> 
> While this can be part of IGT building system, for now, let's add
> a script for such purpose.
> 
> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
> ---
>  opencl/README            | 11 +++++
>  opencl/gen_opencl_kernel | 86 ++++++++++++++++++++++++++++++++++++++++
>  2 files changed, 97 insertions(+)
>  create mode 100644 opencl/README
>  create mode 100755 opencl/gen_opencl_kernel
> 
> diff --git a/opencl/README b/opencl/README
> new file mode 100644
> index 000000000000..5d0df2ad6c33
> --- /dev/null
> +++ b/opencl/README
> @@ -0,0 +1,11 @@
> +This directory contains some OpenCL compute files, and a script to be used
> +to produce a header file containing the binaries for the CL against
> +multiple platforms.
> +
> +For instance, to generate compute square Kernel binaries for TGL and ADL
> +variants, use this:
> +
> +    opencl/gen_opencl_kernel xe_compute_square opencl/compute_square_kernel.cl \
> +	   xe_compute_square_kernels.c build/opencl tgllp adl-s adl-p adl-n
> +
> +    cp build/opencl/xe_compute_square_kernels.c lib/xe/

Fails on Ubuntu 22.04.2 LTS:

./opencl/gen_opencl_kernel xe_compute_square opencl/compute_square_kernel.cl xe_compute_square_kernels.c build/opencl tgllp 
tgllp
Generating build/opencl/tgllp_xe_compute_square.h
Usage:
       xxd [options] [infile [outfile]]
    or
       xxd -r [-s [-]offset] [-c cols] [-ps] [infile [outfile]]
Options:
    -a          toggle autoskip: A single '*' replaces nul-lines. Default off.
    -b          binary digit dump (incompatible with -ps,-i,-r). Default hex.
    -C          capitalize variable names in C include file style (-i).
    -c cols     format <cols> octets per line. Default 16 (-i: 12, -ps: 30).
    -E          show characters in EBCDIC. Default ASCII.
    -e          little-endian dump (incompatible with -ps,-i,-r).
    -g bytes    number of octets per group in normal output. Default 2 (-e: 4).
    -h          print this summary.
    -i          output in C include file style.
    -l len      stop after <len> octets.
    -o off      add <off> to the displayed file position.
    -ps         output in postscript plain hexdump style.
    -r          reverse operation: convert (or patch) hexdump into binary.
    -r -s off   revert with <off> added to file positions found in hexdump.
    -d          show offset in decimal instead of hex.
    -s [+][-]seek  start at <seek> bytes abs. (or +: rel.) infile offset.
    -u          use upper case hex letters.
    -v          show version: "xxd 2021-10-22 by Juergen Weigert et al.".
error in line 42

--
Zbigniew

> diff --git a/opencl/gen_opencl_kernel b/opencl/gen_opencl_kernel
> new file mode 100755
> index 000000000000..8bbc62a20cde
> --- /dev/null
> +++ b/opencl/gen_opencl_kernel
> @@ -0,0 +1,86 @@
> +#!/bin/bash
> +
> +trap 'catch $LINENO' ERR
> +
> +catch() {
> +    echo "error in line $1"
> +    exit 1
> +}
> +
> +
> +# Parse arguments
> +if [ $# -lt 5 ]; then
> +        echo -e 'Usage:\n\t$0: <Kernel name> <kernel.cl> <header name> <dest_dir> <GPU models>' >&2
> +        echo -e "Example:\n\t$0 kernel_foo kernel.cl kernels.c ../build/opencl tgllp rkl\n" >&2
> +        exit 1
> +fi
> +
> +kernel_name=$1
> +shift
> +
> +kernel_cl=$1
> +shift
> +
> +output_fname=$1
> +shift
> +
> +dest_dir=$1
> +shift
> +
> +mkdir -p $dest_dir
> +
> +args=( "$@" )
> +
> +echo $args
> +
> +out_files=""
> +for i in "${args[@]}"; do
> +	name="$dest_dir/${i}_${kernel_name}"
> +	out="$name.h"
> +        echo "Generating $out"
> +	ocloc compile -q -file ${kernel_cl} -device ${i} -output ${name}_bin -output_no_suffix
> +	xxd -n "${i}_${kernel_name}" -i ${name}_bin >$out
> +	sed "s,  ,\t,;s,.*unsigned int.*,,;s,\-,_,g;s,unsigned,static const unsigned," -i $out
> +	sed "1 i// Match ID: $(ocloc ids $i|grep -v "Matched ids:")" -i $out
> +	out_files+=" $out"
> +done
> +
> +output_fname="$dest_dir/$output_fname"
> +echo "Generating $output_fname"
> +
> +cat << PREFIX >$output_fname
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * This file is auto-generated from $kernel_cl:
> + *
> +PREFIX
> +
> +cat $kernel_cl |sed s,"^"," * ," >>$output_fname
> +
> +cat << INCLUDES >>$output_fname
> + */
> +
> +#include "intel_chipset.h"
> +#include "lib/xe/xe_compute.h"
> +
> +INCLUDES
> +
> +cat $out_files >>$output_fname
> +
> +echo "const struct xe_compute_kernels ${kernel_name}_kernels[] = {" >>$output_fname
> +
> +for i in "${args[@]}"; do
> +        out="$dest_dir/${i}_${kernel_name}.h"
> +        echo -e "\t{" >>$output_fname; \
> +	grep "Match ID:" $out|sed -E "s/.*\s([0-9]+)\.([0-9]+).*/\t\t.ip_ver = IP_VER(\1, \2),/" >>$output_fname;
> +	grep unsigned $out|sed -E "s/.*\s+([_a-zA-Z0-9]+)\[\].*/\t\t.size = sizeof(\1),/" >>$output_fname;
> +	grep unsigned $out|sed -E "s/.*\s+([_a-zA-Z0-9]+)\[\].*/\t\t.kernel = \1,/" >>$output_fname;
> +	echo -e "\t}," >>$output_fname;
> +done
> +
> +cat << SUFFIX >>$output_fname
> +	{}
> +};
> +SUFFIX
> +
> +echo "Done."
> -- 
> 2.39.2
> 


^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: [igt-dev] [PATCH i-g-t 4/5] gen_opencl_kernel: add script to dynamically create OpenCL kernels
  2023-04-03 10:58   ` Zbigniew Kempczyński
@ 2023-04-04  6:07     ` Mauro Carvalho Chehab
  0 siblings, 0 replies; 13+ messages in thread
From: Mauro Carvalho Chehab @ 2023-04-04  6:07 UTC (permalink / raw)
  To: Zbigniew Kempczyński; +Cc: igt-dev

On 4/3/23 12:58, Zbigniew Kempczyński wrote:
> On Mon, Mar 27, 2023 at 03:41:18PM +0200, Mauro Carvalho Chehab wrote:
>> From: Mauro Carvalho Chehab <mchehab@kernel.org>
>>
>> Compute tests can be produced by using OpenCL, by calling ocloc.
>>
>> While this can be part of IGT building system, for now, let's add
>> a script for such purpose.
>>
>> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
>> ---
>>   opencl/README            | 11 +++++
>>   opencl/gen_opencl_kernel | 86 ++++++++++++++++++++++++++++++++++++++++
>>   2 files changed, 97 insertions(+)
>>   create mode 100644 opencl/README
>>   create mode 100755 opencl/gen_opencl_kernel
>>
>> diff --git a/opencl/README b/opencl/README
>> new file mode 100644
>> index 000000000000..5d0df2ad6c33
>> --- /dev/null
>> +++ b/opencl/README
>> @@ -0,0 +1,11 @@
>> +This directory contains some OpenCL compute files, and a script to be used
>> +to produce a header file containing the binaries for the CL against
>> +multiple platforms.
>> +
>> +For instance, to generate compute square Kernel binaries for TGL and ADL
>> +variants, use this:
>> +
>> +    opencl/gen_opencl_kernel xe_compute_square opencl/compute_square_kernel.cl \
>> +	   xe_compute_square_kernels.c build/opencl tgllp adl-s adl-p adl-n
>> +
>> +    cp build/opencl/xe_compute_square_kernels.c lib/xe/
> Fails on Ubuntu 22.04.2 LTS:
>
> ./opencl/gen_opencl_kernel xe_compute_square opencl/compute_square_kernel.cl xe_compute_square_kernels.c build/opencl tgllp
> tgllp
> Generating build/opencl/tgllp_xe_compute_square.h
> Usage:
>         xxd [options] [infile [outfile]]
>      or
>         xxd -r [-s [-]offset] [-c cols] [-ps] [infile [outfile]]
> Options:
>      -a          toggle autoskip: A single '*' replaces nul-lines. Default off.
>      -b          binary digit dump (incompatible with -ps,-i,-r). Default hex.
>      -C          capitalize variable names in C include file style (-i).
>      -c cols     format <cols> octets per line. Default 16 (-i: 12, -ps: 30).
>      -E          show characters in EBCDIC. Default ASCII.
>      -e          little-endian dump (incompatible with -ps,-i,-r).
>      -g bytes    number of octets per group in normal output. Default 2 (-e: 4).
>      -h          print this summary.
>      -i          output in C include file style.
>      -l len      stop after <len> octets.
>      -o off      add <off> to the displayed file position.
>      -ps         output in postscript plain hexdump style.
>      -r          reverse operation: convert (or patch) hexdump into binary.
>      -r -s off   revert with <off> added to file positions found in hexdump.
>      -d          show offset in decimal instead of hex.
>      -s [+][-]seek  start at <seek> bytes abs. (or +: rel.) infile offset.
>      -u          use upper case hex letters.
>      -v          show version: "xxd 2021-10-22 by Juergen Weigert et al.".
> error in line 42

The issue is that xxd is too old on Ubuntu and doesn't support "-n 
<name>" parameter.

I'll add an extra patch addressing it.

Yet, the above command will fail as-is with native ocloc provided via 
intel-opencl-icd

package, as it doesn't support other Gen12 targets but tgllp.


On Ubuntu 22.04 (intel-opencl-icd/focal,now 20.13.16352-1 amd64):

     $ ocloc compile --help 2>&1|grep -A1 'Target device.'
       -device <device_type>         Target device.
                                 <device_type> can be: 
bdw,skl,kbl,cfl,bxt,glk,icllp,lkf,ehl,tgllp


On Fedora 37 (intel-ocloc-22.43.24558-1.fc37.x86_64 package):

     $ ocloc compile --help 2>&1|grep -A1 'Target device.'
       -device <device_type>         Target device.
                                 <device_type> can be: bdw, skl, kbl, 
cfl, apl, bxt, glk, whl, aml, cml, icllp, lkf, ehl, jsl, tgllp, rkl, 
adl-s, adl-p, adl-n, dg1, acm-g10, ats-m150, dg2-g10, acm-g11, ats-m75, 
dg2-g11, acm-g12, dg2-g12, pvc-sdv, pvc, gen11, gen12lp, gen8, gen9, xe, 
xe-hp, xe-hpc, xe-hpg, version  or hexadecimal value with 0x prefix

So, you need to either use a more modern distribution or download OpenCL 
by hand if you want

to compile OpenCL for newer GPU models.

I'll add a note at the patch.


Regards,
Mauro

^ permalink raw reply	[flat|nested] 13+ messages in thread

* [igt-dev] [PATCH i-g-t 5/5] [RFC EXAMPLE] lib/xe/xe_compute_kernels.c: re-generate TGL binary
  2023-03-27 13:41 [igt-dev] [PATCH i-g-t 0/5] Make xe_compute test more generic Mauro Carvalho Chehab
                   ` (3 preceding siblings ...)
  2023-03-27 13:41 ` [igt-dev] [PATCH i-g-t 4/5] gen_opencl_kernel: add script to dynamically create OpenCL kernels Mauro Carvalho Chehab
@ 2023-03-27 13:41 ` Mauro Carvalho Chehab
  2023-03-27 16:54 ` [igt-dev] ✓ Fi.CI.BAT: success for Make xe_compute test more generic Patchwork
  2023-03-27 23:09 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
  6 siblings, 0 replies; 13+ messages in thread
From: Mauro Carvalho Chehab @ 2023-03-27 13:41 UTC (permalink / raw)
  To: igt-dev

From: Mauro Carvalho Chehab <mchehab@kernel.org>

PS: THIS PATCH IS NOT MEANT TO ME MERGED AS-IS. Its goal is just to
provide an example of the opencl/gen_opencl_kernel script output.
The intend is to add more GPU models only when the GPU pipelines
receive support to them too.

As an example of using opencl/gen_opencl_kernel script, re-generate
the OpenCL compute square kernel binary for tgllp using intel-ocloc
version 22.43.24558, by running:

	opencl/gen_opencl_kernel xe_compute_square		       \
	   opencl/compute_square_kernel.cl xe_compute_square_kernels.c \
	   build/opencl tgllp

	cp build/opencl/xe_compute_square_kernels.c lib/xe/

Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
---
 lib/xe/xe_compute_square_kernels.c | 1814 +++++++++++++++++++++++++++-
 1 file changed, 1794 insertions(+), 20 deletions(-)

diff --git a/lib/xe/xe_compute_square_kernels.c b/lib/xe/xe_compute_square_kernels.c
index f9c07dc778bd..d92adc93f2be 100644
--- a/lib/xe/xe_compute_square_kernels.c
+++ b/lib/xe/xe_compute_square_kernels.c
@@ -1,28 +1,487 @@
 /* SPDX-License-Identifier: MIT */
-
 /*
- * Copyright © 2022 Intel Corporation
+ * This file is auto-generated from opencl/compute_square_kernel.cl:
  *
- * Authors:
- *		Francois Dugast <francois.dugast@intel.com>
+ * __kernel void square(__global float* input, __global float* output, const unsigned int count) {
+ *   int i = get_global_id(0);
+ *   if(i < count)
+ *     output[i] = input[i] * input[i];
+ * }
  */
 
 #include "intel_chipset.h"
 #include "lib/xe/xe_compute.h"
 
-static const unsigned char tgllp_kernel_square_bin[] = {
-	0x61, 0x00, 0x03, 0x80, 0x20, 0x02, 0x05, 0x03, 0x04, 0x00, 0x10, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x66, 0x01, 0x00, 0x80, 0x20, 0x82, 0x01, 0x80,
-	0x00, 0x80, 0x00, 0x01, 0xc0, 0x04, 0xc0, 0x04, 0x41, 0x01, 0x20, 0x22,
-	0x16, 0x09, 0x11, 0x03, 0x49, 0x00, 0x04, 0xa2, 0x12, 0x09, 0x11, 0x03,
-	0x40, 0x01, 0x04, 0x00, 0x60, 0x06, 0x05, 0x05, 0x04, 0x04, 0x00, 0x01,
-	0x05, 0x01, 0x58, 0x00, 0x40, 0x00, 0x24, 0x00, 0x60, 0x06, 0x05, 0x0a,
-	0x04, 0x04, 0x00, 0x01, 0x05, 0x02, 0x58, 0x00, 0x40, 0x02, 0x0c, 0xa0,
-	0x02, 0x05, 0x10, 0x07, 0x40, 0x02, 0x0e, 0xa6, 0x02, 0x0a, 0x10, 0x07,
-	0x70, 0x02, 0x04, 0x00, 0x60, 0x02, 0x01, 0x00, 0x05, 0x0c, 0x46, 0x52,
-	0x84, 0x08, 0x00, 0x00, 0x70, 0x02, 0x24, 0x00, 0x60, 0x02, 0x01, 0x00,
-	0x05, 0x0e, 0x46, 0x52, 0x84, 0x08, 0x00, 0x00, 0x72, 0x00, 0x02, 0x80,
-	0x50, 0x0d, 0x04, 0x00, 0x05, 0x00, 0x05, 0x1d, 0x05, 0x00, 0x05, 0x00,
+// Match ID: 12.0.0
+static const unsigned char tgllp_xe_compute_square[] = {
+	0x7f, 0x45, 0x4c, 0x46, 0x02, 0x01, 0x01, 0x00, 0x01, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0xcd, 0x00, 0x01, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00,
+	0x08, 0x00, 0x07, 0x00, 0x61, 0x00, 0x03, 0x80, 0x20, 0x02, 0x05, 0x03,
+	0x04, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x01, 0x00, 0x80,
+	0x20, 0x82, 0x01, 0x80, 0x00, 0x80, 0x00, 0x01, 0xc0, 0x04, 0xc0, 0x04,
+	0x41, 0x01, 0x20, 0x22, 0x16, 0x09, 0x11, 0x03, 0x49, 0x00, 0x04, 0xa2,
+	0x12, 0x09, 0x11, 0x03, 0x40, 0x01, 0x04, 0x00, 0x60, 0x06, 0x05, 0x05,
+	0x04, 0x04, 0x00, 0x01, 0x05, 0x01, 0x58, 0x00, 0x40, 0x00, 0x24, 0x00,
+	0x60, 0x06, 0x05, 0x0a, 0x04, 0x04, 0x00, 0x01, 0x05, 0x02, 0x58, 0x00,
+	0x40, 0x02, 0x0c, 0xa0, 0x02, 0x05, 0x10, 0x07, 0x40, 0x02, 0x0e, 0xa6,
+	0x02, 0x0a, 0x10, 0x07, 0x70, 0x02, 0x04, 0x00, 0x60, 0x02, 0x01, 0x00,
+	0x05, 0x0c, 0x46, 0x52, 0x84, 0x08, 0x00, 0x00, 0x70, 0x02, 0x24, 0x00,
+	0x60, 0x02, 0x01, 0x00, 0x05, 0x0e, 0x46, 0x52, 0x84, 0x08, 0x00, 0x00,
+	0x72, 0x00, 0x02, 0x80, 0x50, 0x0d, 0x04, 0x01, 0x05, 0x01, 0x05, 0x1d,
+	0x05, 0x01, 0x05, 0x01, 0x22, 0x00, 0x05, 0x01, 0x00, 0xc0, 0x00, 0x00,
+	0x90, 0x00, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00, 0x69, 0x00, 0x10, 0x60,
+	0x02, 0x0c, 0x20, 0x00, 0x69, 0x00, 0x12, 0x66, 0x02, 0x0e, 0x20, 0x00,
+	0x40, 0x02, 0x14, 0xa0, 0x32, 0x10, 0x10, 0x08, 0x40, 0x02, 0x16, 0xa6,
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+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
+	0x01, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x0e, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x40, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x48, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x16, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0xff,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x88, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x70, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x00, 0x00,
+	0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x07, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x31, 0x00, 0x00, 0x00, 0x11, 0x00, 0x00, 0xff, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x38, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf3, 0x09, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x3a, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x30, 0x12, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x4f, 0x00, 0x00, 0x00,
+	0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x98, 0x12, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x65, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+};
+
+// Match ID: 12.2.0
+static const unsigned char adl_s_xe_compute_square[] = {
+	0x7f, 0x45, 0x4c, 0x46, 0x02, 0x01, 0x01, 0x00, 0x01, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0xcd, 0x00, 0x01, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00,
+	0x08, 0x00, 0x07, 0x00, 0x61, 0x00, 0x03, 0x80, 0x20, 0x02, 0x05, 0x03,
+	0x04, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x01, 0x00, 0x80,
+	0x20, 0x82, 0x01, 0x80, 0x00, 0x80, 0x00, 0x01, 0xc0, 0x04, 0xc0, 0x04,
+	0x41, 0x01, 0x20, 0x22, 0x16, 0x09, 0x11, 0x03, 0x49, 0x00, 0x04, 0xa2,
+	0x12, 0x09, 0x11, 0x03, 0x40, 0x01, 0x04, 0x00, 0x60, 0x06, 0x05, 0x05,
+	0x04, 0x04, 0x00, 0x01, 0x05, 0x01, 0x58, 0x00, 0x40, 0x00, 0x24, 0x00,
+	0x60, 0x06, 0x05, 0x0a, 0x04, 0x04, 0x00, 0x01, 0x05, 0x02, 0x58, 0x00,
+	0x40, 0x02, 0x0c, 0xa0, 0x02, 0x05, 0x10, 0x07, 0x40, 0x02, 0x0e, 0xa6,
+	0x02, 0x0a, 0x10, 0x07, 0x70, 0x02, 0x04, 0x00, 0x60, 0x02, 0x01, 0x00,
+	0x05, 0x0c, 0x46, 0x52, 0x84, 0x08, 0x00, 0x00, 0x70, 0x02, 0x24, 0x00,
+	0x60, 0x02, 0x01, 0x00, 0x05, 0x0e, 0x46, 0x52, 0x84, 0x08, 0x00, 0x00,
 	0x22, 0x00, 0x05, 0x01, 0x00, 0xc0, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00,
 	0x90, 0x00, 0x00, 0x00, 0x69, 0x00, 0x10, 0x60, 0x02, 0x0c, 0x20, 0x00,
 	0x69, 0x00, 0x12, 0x66, 0x02, 0x0e, 0x20, 0x00, 0x40, 0x02, 0x14, 0xa0,
@@ -42,7 +501,6 @@ static const unsigned char tgllp_kernel_square_bin[] = {
 	0x05, 0x1c, 0x46, 0x00, 0x00, 0x00, 0x00, 0x00, 0x61, 0x00, 0x04, 0x80,
 	0xa0, 0x4a, 0x01, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 	0x31, 0x01, 0x03, 0x80, 0x04, 0x00, 0x00, 0x00, 0x0c, 0x7f, 0x20, 0x70,
-	0x00, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -58,14 +516,1330 @@ static const unsigned char tgllp_kernel_square_bin[] = {
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+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x4f, 0x00, 0x00, 0x00,
+	0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x98, 0x12, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x65, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+};
+
+// Match ID: 12.3.0
+static const unsigned char adl_p_xe_compute_square[] = {
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+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x4f, 0x00, 0x00, 0x00,
+	0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x98, 0x12, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x65, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+};
+
+// Match ID: 12.4.0
+static const unsigned char adl_n_xe_compute_square[] = {
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 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
 };
 
 const struct xe_compute_kernels xe_compute_square_kernels[] = {
 	{
 		.ip_ver = IP_VER(12, 0),
-		.size = sizeof(tgllp_kernel_square_bin),
-		.kernel = tgllp_kernel_square_bin,
+		.size = sizeof(tgllp_xe_compute_square),
+		.kernel = tgllp_xe_compute_square,
+	},
+	{
+		.ip_ver = IP_VER(12, 2),
+		.size = sizeof(adl_s_xe_compute_square),
+		.kernel = adl_s_xe_compute_square,
+	},
+	{
+		.ip_ver = IP_VER(12, 3),
+		.size = sizeof(adl_p_xe_compute_square),
+		.kernel = adl_p_xe_compute_square,
+	},
+	{
+		.ip_ver = IP_VER(12, 4),
+		.size = sizeof(adl_n_xe_compute_square),
+		.kernel = adl_n_xe_compute_square,
 	},
 	{}
 };
-- 
2.39.2

^ permalink raw reply related	[flat|nested] 13+ messages in thread

* [igt-dev] ✓ Fi.CI.BAT: success for Make xe_compute test more generic
  2023-03-27 13:41 [igt-dev] [PATCH i-g-t 0/5] Make xe_compute test more generic Mauro Carvalho Chehab
                   ` (4 preceding siblings ...)
  2023-03-27 13:41 ` [igt-dev] [PATCH i-g-t 5/5] [RFC EXAMPLE] lib/xe/xe_compute_kernels.c: re-generate TGL binary Mauro Carvalho Chehab
@ 2023-03-27 16:54 ` Patchwork
  2023-03-27 23:09 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
  6 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2023-03-27 16:54 UTC (permalink / raw)
  To: Mauro Carvalho Chehab; +Cc: igt-dev

[-- Attachment #1: Type: text/plain, Size: 3197 bytes --]

== Series Details ==

Series: Make xe_compute test more generic
URL   : https://patchwork.freedesktop.org/series/115670/
State : success

== Summary ==

CI Bug Log - changes from IGT_7221 -> IGTPW_8687
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8687/index.html

Participating hosts (36 -> 35)
------------------------------

  Missing    (1): fi-bsw-n3050 

Known issues
------------

  Here are the changes found in IGTPW_8687 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live@migrate:
    - bat-dg2-11:         [PASS][1] -> [DMESG-WARN][2] ([i915#7699])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7221/bat-dg2-11/igt@i915_selftest@live@migrate.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8687/bat-dg2-11/igt@i915_selftest@live@migrate.html

  * igt@i915_selftest@live@requests:
    - bat-rplp-1:         [PASS][3] -> [ABORT][4] ([i915#7913])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7221/bat-rplp-1/igt@i915_selftest@live@requests.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8687/bat-rplp-1/igt@i915_selftest@live@requests.html

  * igt@i915_selftest@live@reset:
    - bat-rpls-1:         [PASS][5] -> [ABORT][6] ([i915#4983])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7221/bat-rpls-1/igt@i915_selftest@live@reset.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8687/bat-rpls-1/igt@i915_selftest@live@reset.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
    - bat-dg2-11:         NOTRUN -> [SKIP][7] ([i915#5354])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8687/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html

  
#### Warnings ####

  * igt@i915_selftest@live@slpc:
    - bat-rpls-2:         [DMESG-FAIL][8] ([i915#6367] / [i915#7913] / [i915#7996]) -> [DMESG-FAIL][9] ([i915#6997] / [i915#7913])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7221/bat-rpls-2/igt@i915_selftest@live@slpc.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8687/bat-rpls-2/igt@i915_selftest@live@slpc.html

  
  [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
  [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
  [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
  [i915#6997]: https://gitlab.freedesktop.org/drm/intel/issues/6997
  [i915#7699]: https://gitlab.freedesktop.org/drm/intel/issues/7699
  [i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
  [i915#7996]: https://gitlab.freedesktop.org/drm/intel/issues/7996


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_7221 -> IGTPW_8687

  CI-20190529: 20190529
  CI_DRM_12920: 78054149ebf825810cd893726be90865a6faf25e @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_8687: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8687/index.html
  IGT_7221: 4b77c6d85024d22ca521d510f8eee574128fe04f @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8687/index.html

[-- Attachment #2: Type: text/html, Size: 4028 bytes --]

^ permalink raw reply	[flat|nested] 13+ messages in thread

* [igt-dev] ✓ Fi.CI.IGT: success for Make xe_compute test more generic
  2023-03-27 13:41 [igt-dev] [PATCH i-g-t 0/5] Make xe_compute test more generic Mauro Carvalho Chehab
                   ` (5 preceding siblings ...)
  2023-03-27 16:54 ` [igt-dev] ✓ Fi.CI.BAT: success for Make xe_compute test more generic Patchwork
@ 2023-03-27 23:09 ` Patchwork
  6 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2023-03-27 23:09 UTC (permalink / raw)
  To: Mauro Carvalho Chehab; +Cc: igt-dev

[-- Attachment #1: Type: text/plain, Size: 10513 bytes --]

== Series Details ==

Series: Make xe_compute test more generic
URL   : https://patchwork.freedesktop.org/series/115670/
State : success

== Summary ==

CI Bug Log - changes from IGT_7221_full -> IGTPW_8687_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8687/index.html

Participating hosts (7 -> 7)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in IGTPW_8687_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_fair@basic-deadline:
    - shard-glk:          [PASS][1] -> [FAIL][2] ([i915#2846])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7221/shard-glk1/igt@gem_exec_fair@basic-deadline.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8687/shard-glk6/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-glk:          [PASS][3] -> [FAIL][4] ([i915#2842]) +1 similar issue
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7221/shard-glk8/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8687/shard-glk9/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gem_render_copy@y-tiled-to-vebox-x-tiled:
    - shard-snb:          NOTRUN -> [SKIP][5] ([fdo#109271]) +17 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8687/shard-snb4/igt@gem_render_copy@y-tiled-to-vebox-x-tiled.html

  * igt@i915_suspend@forcewake:
    - shard-apl:          [PASS][6] -> [ABORT][7] ([i915#180])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7221/shard-apl1/igt@i915_suspend@forcewake.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8687/shard-apl1/igt@i915_suspend@forcewake.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1:
    - shard-glk:          NOTRUN -> [SKIP][8] ([fdo#109271])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8687/shard-glk6/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-apl:          [PASS][9] -> [FAIL][10] ([i915#4767])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7221/shard-apl2/igt@kms_fbcon_fbt@fbc-suspend.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8687/shard-apl1/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_vblank@pipe-c-accuracy-idle:
    - shard-glk:          [PASS][11] -> [FAIL][12] ([i915#43])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7221/shard-glk2/igt@kms_vblank@pipe-c-accuracy-idle.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8687/shard-glk6/igt@kms_vblank@pipe-c-accuracy-idle.html

  
#### Possible fixes ####

  * igt@i915_pm_dc@dc6-dpms:
    - {shard-tglu}:       [FAIL][13] ([i915#3989] / [i915#454]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7221/shard-tglu-2/igt@i915_pm_dc@dc6-dpms.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8687/shard-tglu-9/igt@i915_pm_dc@dc6-dpms.html

  * igt@i915_pm_dc@dc9-dpms:
    - shard-apl:          [SKIP][15] ([fdo#109271]) -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7221/shard-apl3/igt@i915_pm_dc@dc9-dpms.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8687/shard-apl1/igt@i915_pm_dc@dc9-dpms.html

  * igt@i915_pm_rps@engine-order:
    - shard-apl:          [FAIL][17] ([i915#6537]) -> [PASS][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7221/shard-apl4/igt@i915_pm_rps@engine-order.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8687/shard-apl2/igt@i915_pm_rps@engine-order.html

  * igt@i915_selftest@perf@engine_cs:
    - shard-snb:          [ABORT][19] ([i915#4528]) -> [PASS][20]
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7221/shard-snb5/igt@i915_selftest@perf@engine_cs.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8687/shard-snb4/igt@i915_selftest@perf@engine_cs.html

  * igt@kms_flip@2x-plain-flip-fb-recreate@ab-hdmi-a1-hdmi-a2:
    - shard-glk:          [FAIL][21] ([i915#2122]) -> [PASS][22]
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7221/shard-glk8/igt@kms_flip@2x-plain-flip-fb-recreate@ab-hdmi-a1-hdmi-a2.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8687/shard-glk6/igt@kms_flip@2x-plain-flip-fb-recreate@ab-hdmi-a1-hdmi-a2.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
  [fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
  [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
  [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [fdo#112054]: https://bugs.freedesktop.org/show_bug.cgi?id=112054
  [fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
  [i915#1755]: https://gitlab.freedesktop.org/drm/intel/issues/1755
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
  [i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
  [i915#2433]: https://gitlab.freedesktop.org/drm/intel/issues/2433
  [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
  [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
  [i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
  [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
  [i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
  [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
  [i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
  [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
  [i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
  [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
  [i915#3361]: https://gitlab.freedesktop.org/drm/intel/issues/3361
  [i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
  [i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
  [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
  [i915#3938]: https://gitlab.freedesktop.org/drm/intel/issues/3938
  [i915#3952]: https://gitlab.freedesktop.org/drm/intel/issues/3952
  [i915#3989]: https://gitlab.freedesktop.org/drm/intel/issues/3989
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
  [i915#426]: https://gitlab.freedesktop.org/drm/intel/issues/426
  [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
  [i915#43]: https://gitlab.freedesktop.org/drm/intel/issues/43
  [i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
  [i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
  [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
  [i915#4565]: https://gitlab.freedesktop.org/drm/intel/issues/4565
  [i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
  [i915#4767]: https://gitlab.freedesktop.org/drm/intel/issues/4767
  [i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
  [i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
  [i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
  [i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
  [i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880
  [i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
  [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
  [i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
  [i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288
  [i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
  [i915#5431]: https://gitlab.freedesktop.org/drm/intel/issues/5431
  [i915#5563]: https://gitlab.freedesktop.org/drm/intel/issues/5563
  [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
  [i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
  [i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
  [i915#6537]: https://gitlab.freedesktop.org/drm/intel/issues/6537
  [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
  [i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
  [i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697
  [i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
  [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
  [i915#8211]: https://gitlab.freedesktop.org/drm/intel/issues/8211
  [i915#8234]: https://gitlab.freedesktop.org/drm/intel/issues/8234


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_7221 -> IGTPW_8687

  CI-20190529: 20190529
  CI_DRM_12920: 78054149ebf825810cd893726be90865a6faf25e @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_8687: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8687/index.html
  IGT_7221: 4b77c6d85024d22ca521d510f8eee574128fe04f @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8687/index.html

[-- Attachment #2: Type: text/html, Size: 6861 bytes --]

^ permalink raw reply	[flat|nested] 13+ messages in thread

end of thread, other threads:[~2023-04-04  6:07 UTC | newest]

Thread overview: 13+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-03-27 13:41 [igt-dev] [PATCH i-g-t 0/5] Make xe_compute test more generic Mauro Carvalho Chehab
2023-03-27 13:41 ` [igt-dev] [PATCH i-g-t 1/5] compute_square_kernel.cl: add CL file used at xe_compute.c Mauro Carvalho Chehab
2023-04-03 10:45   ` Zbigniew Kempczyński
2023-03-27 13:41 ` [igt-dev] [PATCH i-g-t 2/5] xe/xe_compute: place OpenCL kernel on a separate file Mauro Carvalho Chehab
2023-04-03 10:49   ` Zbigniew Kempczyński
2023-03-27 13:41 ` [igt-dev] [PATCH i-g-t 3/5] lib/xe/xe_compute: use registers defs from intel_gpu_commands.h Mauro Carvalho Chehab
2023-04-03 10:50   ` Zbigniew Kempczyński
2023-03-27 13:41 ` [igt-dev] [PATCH i-g-t 4/5] gen_opencl_kernel: add script to dynamically create OpenCL kernels Mauro Carvalho Chehab
2023-04-03 10:58   ` Zbigniew Kempczyński
2023-04-04  6:07     ` Mauro Carvalho Chehab
2023-03-27 13:41 ` [igt-dev] [PATCH i-g-t 5/5] [RFC EXAMPLE] lib/xe/xe_compute_kernels.c: re-generate TGL binary Mauro Carvalho Chehab
2023-03-27 16:54 ` [igt-dev] ✓ Fi.CI.BAT: success for Make xe_compute test more generic Patchwork
2023-03-27 23:09 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork

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