[igt-dev] [PATCH i-g-t 0/2] List engines belonging to a gt

[igt-dev] [PATCH i-g-t 0/2] List engines belonging to a gt

[Vikas Srivastava]

Add a function that returns all engines belonging to a gt.
Create a intel_ctx_t with physical engines belonging to a gt

Signed-off-by: Vikas Srivastava <vikas.srivastava@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>

Ashutosh Dixit (1):
  lib/intel_ctx: Create intel_ctx with physical engines in a single gt

Riana Tauro (1):
  lib/i915/gem_engine_topology: list engines specific to gt

 lib/i915/gem_engine_topology.c | 73 ++++++++++++++++++++++++++++++++++
 lib/i915/gem_engine_topology.h |  6 +++
 lib/intel_ctx.c                | 42 +++++++++++++++++++
 lib/intel_ctx.h                |  2 +
 4 files changed, 123 insertions(+)

-- 
2.25.1

[igt-dev] [PATCH i-g-t 1/2] lib/i915/gem_engine_topology: list engines specific to gt

[Vikas Srivastava]

From: Riana Tauro <riana.tauro@intel.com>

Add a function that returns all engines belonging to a gt
Currently the function is specific to MTL and returns gt id
based on engine

Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Signed-off-by: Vikas Srivastava <vikas.srivastava@intel.com>
---
 lib/i915/gem_engine_topology.c | 73 ++++++++++++++++++++++++++++++++++
 lib/i915/gem_engine_topology.h |  6 +++
 2 files changed, 79 insertions(+)

diff --git a/lib/i915/gem_engine_topology.c b/lib/i915/gem_engine_topology.c
index ca3333c252..6c8929ec59 100644
--- a/lib/i915/gem_engine_topology.c
+++ b/lib/i915/gem_engine_topology.c
@@ -350,6 +350,79 @@ struct intel_execution_engine2 gem_eb_flags_to_engine(unsigned int flags)
 	return e2__;
 }
 
+/*
+ * MTL has two GT's, one containing render/compute/copy and the other
+ * containing media engines. Return gt id based on engine.
+ */
+static int
+mtl_engine_to_gt_map(const struct i915_engine_class_instance *e)
+{
+	switch (e->engine_class) {
+	case I915_ENGINE_CLASS_RENDER:
+	case I915_ENGINE_CLASS_COMPUTE:
+	case I915_ENGINE_CLASS_COPY:
+		return 0;
+	case I915_ENGINE_CLASS_VIDEO:
+	case I915_ENGINE_CLASS_VIDEO_ENHANCE:
+		return 1;
+	default:
+		igt_assert_f(0, "Unsupported engine class %d\n", e->engine_class);
+	}
+}
+
+static int gem_engine_to_gt_map(int i915, const struct i915_engine_class_instance *engine)
+{
+	igt_require(IS_METEORLAKE(intel_get_drm_devid(i915)));
+	return mtl_engine_to_gt_map(engine);
+}
+
+/**
+ * gem_list_engines:
+ * @i915: i915 drm file descriptor
+ * @gt_mask: gt mask
+ * @class_mask: engine class mask
+ * @out: returned engine count
+ *
+ * Returns: the list of all physical engines belonging to the gt.
+ * Caller must free memory after use
+ */
+struct i915_engine_class_instance *
+gem_list_engines(int i915,
+		 uint32_t gt_mask,
+		 uint32_t class_mask,
+		 unsigned int *out)
+{
+	struct i915_engine_class_instance *engines;
+	struct drm_i915_query_engine_info *info;
+	const int size = 256 << 10; /* enough for 8 classes of 256 engines */
+	unsigned int max = 0, count = 0;
+
+	info = calloc(1, size);
+	igt_assert(!__gem_query_engines(i915, info, size));
+
+	max = info->num_engines;
+	engines = (struct i915_engine_class_instance *)info;
+	for (unsigned int i = 0; i < max; i++) {
+		const struct i915_engine_class_instance *e =
+			&info->engines[i].engine;
+
+		if (!((class_mask >> e->engine_class) & 1))
+			continue;
+		if (!((gt_mask >> gem_engine_to_gt_map(i915, e)) & 1))
+			continue;
+
+		engines[count++] = *e;
+	}
+
+	if (!count) {
+		free(engines);
+		engines = NULL;
+	}
+
+	*out = count;
+	return engines;
+}
+
 bool gem_engine_is_equal(const struct intel_execution_engine2 *e1,
 			 const struct intel_execution_engine2 *e2)
 {
diff --git a/lib/i915/gem_engine_topology.h b/lib/i915/gem_engine_topology.h
index 987f2bf944..89642c3172 100644
--- a/lib/i915/gem_engine_topology.h
+++ b/lib/i915/gem_engine_topology.h
@@ -61,6 +61,12 @@ intel_get_current_physical_engine(struct intel_engine_data *ed);
 
 void intel_next_engine(struct intel_engine_data *ed);
 
+struct i915_engine_class_instance *
+gem_list_engines(int i915,
+		 uint32_t gt_mask,
+		 uint32_t class_mask,
+		 unsigned int *count);
+
 bool gem_engine_is_equal(const struct intel_execution_engine2 *e1,
 			 const struct intel_execution_engine2 *e2);
 
-- 
2.25.1

Re: [igt-dev] [PATCH i-g-t 1/2] lib/i915/gem_engine_topology: list engines specific to gt

[Kamil Konieczny]

Hi,

On 2023-04-05 at 12:28:31 +0530, Vikas Srivastava wrote:
> From: Riana Tauro <riana.tauro@intel.com>
> 
> Add a function that returns all engines belonging to a gt
> Currently the function is specific to MTL and returns gt id
> based on engine
> 
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
> Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
> Signed-off-by: Vikas Srivastava <vikas.srivastava@intel.com>
> ---
>  lib/i915/gem_engine_topology.c | 73 ++++++++++++++++++++++++++++++++++
>  lib/i915/gem_engine_topology.h |  6 +++
>  2 files changed, 79 insertions(+)
> 
> diff --git a/lib/i915/gem_engine_topology.c b/lib/i915/gem_engine_topology.c
> index ca3333c252..6c8929ec59 100644
> --- a/lib/i915/gem_engine_topology.c
> +++ b/lib/i915/gem_engine_topology.c
> @@ -350,6 +350,79 @@ struct intel_execution_engine2 gem_eb_flags_to_engine(unsigned int flags)
>  	return e2__;
>  }
>  
> +/*
> + * MTL has two GT's, one containing render/compute/copy and the other
> + * containing media engines. Return gt id based on engine.
> + */
> +static int
> +mtl_engine_to_gt_map(const struct i915_engine_class_instance *e)
> +{
> +	switch (e->engine_class) {
> +	case I915_ENGINE_CLASS_RENDER:
> +	case I915_ENGINE_CLASS_COMPUTE:
> +	case I915_ENGINE_CLASS_COPY:
> +		return 0;
> +	case I915_ENGINE_CLASS_VIDEO:
> +	case I915_ENGINE_CLASS_VIDEO_ENHANCE:
> +		return 1;
> +	default:
> +		igt_assert_f(0, "Unsupported engine class %d\n", e->engine_class);
> +	}
> +}
> +
> +static int gem_engine_to_gt_map(int i915, const struct i915_engine_class_instance *engine)
> +{
> +	igt_require(IS_METEORLAKE(intel_get_drm_devid(i915)));

This will make it work only for MTL so imho it needs
to be improved later and also keep in mind that this
should work for multi-gpu case, for example MTL with
Arc 750 card(s).

Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>

--
Kamil

> +	return mtl_engine_to_gt_map(engine);
> +}
> +
> +/**
> + * gem_list_engines:
> + * @i915: i915 drm file descriptor
> + * @gt_mask: gt mask
> + * @class_mask: engine class mask
> + * @out: returned engine count
> + *
> + * Returns: the list of all physical engines belonging to the gt.
> + * Caller must free memory after use
> + */
> +struct i915_engine_class_instance *
> +gem_list_engines(int i915,
> +		 uint32_t gt_mask,
> +		 uint32_t class_mask,
> +		 unsigned int *out)
> +{
> +	struct i915_engine_class_instance *engines;
> +	struct drm_i915_query_engine_info *info;
> +	const int size = 256 << 10; /* enough for 8 classes of 256 engines */
> +	unsigned int max = 0, count = 0;
> +
> +	info = calloc(1, size);
> +	igt_assert(!__gem_query_engines(i915, info, size));
> +
> +	max = info->num_engines;
> +	engines = (struct i915_engine_class_instance *)info;
> +	for (unsigned int i = 0; i < max; i++) {
> +		const struct i915_engine_class_instance *e =
> +			&info->engines[i].engine;
> +
> +		if (!((class_mask >> e->engine_class) & 1))
> +			continue;
> +		if (!((gt_mask >> gem_engine_to_gt_map(i915, e)) & 1))
> +			continue;
> +
> +		engines[count++] = *e;
> +	}
> +
> +	if (!count) {
> +		free(engines);
> +		engines = NULL;
> +	}
> +
> +	*out = count;
> +	return engines;
> +}
> +
>  bool gem_engine_is_equal(const struct intel_execution_engine2 *e1,
>  			 const struct intel_execution_engine2 *e2)
>  {
> diff --git a/lib/i915/gem_engine_topology.h b/lib/i915/gem_engine_topology.h
> index 987f2bf944..89642c3172 100644
> --- a/lib/i915/gem_engine_topology.h
> +++ b/lib/i915/gem_engine_topology.h
> @@ -61,6 +61,12 @@ intel_get_current_physical_engine(struct intel_engine_data *ed);
>  
>  void intel_next_engine(struct intel_engine_data *ed);
>  
> +struct i915_engine_class_instance *
> +gem_list_engines(int i915,
> +		 uint32_t gt_mask,
> +		 uint32_t class_mask,
> +		 unsigned int *count);
> +
>  bool gem_engine_is_equal(const struct intel_execution_engine2 *e1,
>  			 const struct intel_execution_engine2 *e2);
>  
> -- 
> 2.25.1
> 

[igt-dev] [PATCH i-g-t 2/2] lib/intel_ctx: Create intel_ctx with physical engines in a single gt

[Vikas Srivastava]

From: Ashutosh Dixit <ashutosh.dixit@intel.com>

Introduce intel_ctx_create_for_gt for creating an intel_ctx_t containing
all physical engines belonging to a single gt.

Cc: Zbigniew Kempczynski <zbigniew.kempczynski@intel.com>
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Riana Tauro <riana.tauro@intel.com>
Signed-off-by: Vikas Srivastava <vikas.srivastava@intel.com>
---
 lib/intel_ctx.c | 42 ++++++++++++++++++++++++++++++++++++++++++
 lib/intel_ctx.h |  2 ++
 2 files changed, 44 insertions(+)

diff --git a/lib/intel_ctx.c b/lib/intel_ctx.c
index e19a54a896..ded9c0f1e4 100644
--- a/lib/intel_ctx.c
+++ b/lib/intel_ctx.c
@@ -61,6 +61,28 @@ intel_ctx_cfg_t intel_ctx_cfg_all_physical(int fd)
 	return cfg;
 }
 
+/**
+ * intel_ctx_cfg_for_gt:
+ * @fd: open i915 drm file descriptor
+ * @gt: gt id
+ *
+ * Returns an intel_ctx_cfg_t containing all physical engines belonging to @gt
+ */
+intel_ctx_cfg_t intel_ctx_cfg_for_gt(int fd, int gt)
+{
+	struct i915_engine_class_instance *ci;
+	intel_ctx_cfg_t cfg = {};
+	unsigned int count;
+
+	ci = gem_list_engines(fd, 1u << gt, ~0u, &count);
+	igt_assert(ci);
+	memcpy(&cfg.engines, ci, count * sizeof(*ci));
+	cfg.num_engines = count;
+	free(ci);
+
+	return cfg;
+}
+
 /**
  * intel_ctx_cfg_for_engine:
  * @class: engine class
@@ -295,6 +317,26 @@ const intel_ctx_t *intel_ctx_create_all_physical(int fd)
 	return intel_ctx_create(fd, &cfg);
 }
 
+/**
+ * intel_ctx_create_for_gt:
+ * @fd: open i915 drm file descriptor
+ * @gt: gt id
+ *
+ * Creates an intel_ctx_t containing all physical engines belonging to @gt
+ */
+const intel_ctx_t *intel_ctx_create_for_gt(int fd, int gt)
+{
+	intel_ctx_cfg_t cfg;
+
+	igt_require(gem_has_contexts(fd) || !gt);
+
+	if (!gem_has_contexts(fd))
+		return intel_ctx_0(fd);
+
+	cfg = intel_ctx_cfg_for_gt(fd, gt);
+	return intel_ctx_create(fd, &cfg);
+}
+
 /**
  * intel_ctx_cfg_engine_class:
  * @cfg: an intel_ctx_cfg_t
diff --git a/lib/intel_ctx.h b/lib/intel_ctx.h
index 89c65fcd39..3cfeaae81e 100644
--- a/lib/intel_ctx.h
+++ b/lib/intel_ctx.h
@@ -54,6 +54,7 @@ typedef struct intel_ctx_cfg {
 
 intel_ctx_cfg_t intel_ctx_cfg_for_engine(unsigned int class, unsigned int inst);
 intel_ctx_cfg_t intel_ctx_cfg_all_physical(int fd);
+intel_ctx_cfg_t intel_ctx_cfg_for_gt(int fd, int gt);
 int intel_ctx_cfg_engine_class(const intel_ctx_cfg_t *cfg, unsigned int engine);
 
 /**
@@ -75,6 +76,7 @@ const intel_ctx_t *intel_ctx_0(int fd);
 const intel_ctx_t *intel_ctx_create_for_engine(int fd, unsigned int class,
 					       unsigned int inst);
 const intel_ctx_t *intel_ctx_create_all_physical(int fd);
+const intel_ctx_t *intel_ctx_create_for_gt(int fd, int gt);
 void intel_ctx_destroy(int fd, const intel_ctx_t *ctx);
 
 unsigned int intel_ctx_engine_class(const intel_ctx_t *ctx, unsigned int engine);
-- 
2.25.1

Re: [igt-dev] [PATCH i-g-t 2/2] lib/intel_ctx: Create intel_ctx with physical engines in a single gt

[Kamil Konieczny]

On 2023-04-05 at 12:28:32 +0530, Vikas Srivastava wrote:
> From: Ashutosh Dixit <ashutosh.dixit@intel.com>
> 
> Introduce intel_ctx_create_for_gt for creating an intel_ctx_t containing
> all physical engines belonging to a single gt.
> 
> Cc: Zbigniew Kempczynski <zbigniew.kempczynski@intel.com>
> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
> Cc: Riana Tauro <riana.tauro@intel.com>
> Signed-off-by: Vikas Srivastava <vikas.srivastava@intel.com>

Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>

> ---
>  lib/intel_ctx.c | 42 ++++++++++++++++++++++++++++++++++++++++++
>  lib/intel_ctx.h |  2 ++
>  2 files changed, 44 insertions(+)
> 
> diff --git a/lib/intel_ctx.c b/lib/intel_ctx.c
> index e19a54a896..ded9c0f1e4 100644
> --- a/lib/intel_ctx.c
> +++ b/lib/intel_ctx.c
> @@ -61,6 +61,28 @@ intel_ctx_cfg_t intel_ctx_cfg_all_physical(int fd)
>  	return cfg;
>  }
>  
> +/**
> + * intel_ctx_cfg_for_gt:
> + * @fd: open i915 drm file descriptor
> + * @gt: gt id
> + *
> + * Returns an intel_ctx_cfg_t containing all physical engines belonging to @gt
> + */
> +intel_ctx_cfg_t intel_ctx_cfg_for_gt(int fd, int gt)
> +{
> +	struct i915_engine_class_instance *ci;
> +	intel_ctx_cfg_t cfg = {};
> +	unsigned int count;
> +
> +	ci = gem_list_engines(fd, 1u << gt, ~0u, &count);
> +	igt_assert(ci);
> +	memcpy(&cfg.engines, ci, count * sizeof(*ci));
> +	cfg.num_engines = count;
> +	free(ci);
> +
> +	return cfg;
> +}
> +
>  /**
>   * intel_ctx_cfg_for_engine:
>   * @class: engine class
> @@ -295,6 +317,26 @@ const intel_ctx_t *intel_ctx_create_all_physical(int fd)
>  	return intel_ctx_create(fd, &cfg);
>  }
>  
> +/**
> + * intel_ctx_create_for_gt:
> + * @fd: open i915 drm file descriptor
> + * @gt: gt id
> + *
> + * Creates an intel_ctx_t containing all physical engines belonging to @gt
> + */
> +const intel_ctx_t *intel_ctx_create_for_gt(int fd, int gt)
> +{
> +	intel_ctx_cfg_t cfg;
> +
> +	igt_require(gem_has_contexts(fd) || !gt);
> +
> +	if (!gem_has_contexts(fd))
> +		return intel_ctx_0(fd);
> +
> +	cfg = intel_ctx_cfg_for_gt(fd, gt);
> +	return intel_ctx_create(fd, &cfg);
> +}
> +
>  /**
>   * intel_ctx_cfg_engine_class:
>   * @cfg: an intel_ctx_cfg_t
> diff --git a/lib/intel_ctx.h b/lib/intel_ctx.h
> index 89c65fcd39..3cfeaae81e 100644
> --- a/lib/intel_ctx.h
> +++ b/lib/intel_ctx.h
> @@ -54,6 +54,7 @@ typedef struct intel_ctx_cfg {
>  
>  intel_ctx_cfg_t intel_ctx_cfg_for_engine(unsigned int class, unsigned int inst);
>  intel_ctx_cfg_t intel_ctx_cfg_all_physical(int fd);
> +intel_ctx_cfg_t intel_ctx_cfg_for_gt(int fd, int gt);
>  int intel_ctx_cfg_engine_class(const intel_ctx_cfg_t *cfg, unsigned int engine);
>  
>  /**
> @@ -75,6 +76,7 @@ const intel_ctx_t *intel_ctx_0(int fd);
>  const intel_ctx_t *intel_ctx_create_for_engine(int fd, unsigned int class,
>  					       unsigned int inst);
>  const intel_ctx_t *intel_ctx_create_all_physical(int fd);
> +const intel_ctx_t *intel_ctx_create_for_gt(int fd, int gt);
>  void intel_ctx_destroy(int fd, const intel_ctx_t *ctx);
>  
>  unsigned int intel_ctx_engine_class(const intel_ctx_t *ctx, unsigned int engine);
> -- 
> 2.25.1
> 

[igt-dev] ✓ Fi.CI.BAT: success for List engines belonging to a gt

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 2630 bytes --]

== Series Details ==

Series: List engines belonging to a gt
URL   : https://patchwork.freedesktop.org/series/116135/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12970 -> IGTPW_8759
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8759/index.html

Participating hosts (37 -> 35)
------------------------------

  Missing    (2): fi-kbl-soraka fi-snb-2520m 

Known issues
------------

  Here are the changes found in IGTPW_8759 that come from known issues:

### IGT changes ###

#### Possible fixes ####

  * igt@i915_pm_rps@basic-api:
    - bat-dg2-11:         [FAIL][1] ([i915#8308]) -> [PASS][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12970/bat-dg2-11/igt@i915_pm_rps@basic-api.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8759/bat-dg2-11/igt@i915_pm_rps@basic-api.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1:
    - bat-dg2-8:          [FAIL][3] ([i915#7932]) -> [PASS][4] +1 similar issue
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12970/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8759/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1.html

  
#### Warnings ####

  * igt@i915_selftest@live@slpc:
    - bat-rpls-2:         [DMESG-FAIL][5] ([i915#6997] / [i915#7913]) -> [DMESG-FAIL][6] ([i915#6367] / [i915#6997] / [i915#7913])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12970/bat-rpls-2/igt@i915_selftest@live@slpc.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8759/bat-rpls-2/igt@i915_selftest@live@slpc.html

  
  [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
  [i915#6997]: https://gitlab.freedesktop.org/drm/intel/issues/6997
  [i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
  [i915#7932]: https://gitlab.freedesktop.org/drm/intel/issues/7932
  [i915#8308]: https://gitlab.freedesktop.org/drm/intel/issues/8308


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_7239 -> IGTPW_8759

  CI-20190529: 20190529
  CI_DRM_12970: 9009e501d394d70613abb67fae3ff19cc044bcc9 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_8759: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8759/index.html
  IGT_7239: cbac5f457ab5d99586f24c6c9c48705d63ddf433 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8759/index.html

[-- Attachment #2: Type: text/html, Size: 3404 bytes --]

[igt-dev] ✓ Fi.CI.IGT: success for List engines belonging to a gt

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 17152 bytes --]

== Series Details ==

Series: List engines belonging to a gt
URL   : https://patchwork.freedesktop.org/series/116135/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12970_full -> IGTPW_8759_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8759/index.html

Participating hosts (7 -> 7)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in IGTPW_8759_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_fair@basic-deadline:
    - shard-glk:          NOTRUN -> [FAIL][1] ([i915#2846])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8759/shard-glk9/igt@gem_exec_fair@basic-deadline.html

  * igt@gen9_exec_parse@allowed-all:
    - shard-glk:          [PASS][2] -> [ABORT][3] ([i915#5566])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12970/shard-glk7/igt@gen9_exec_parse@allowed-all.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8759/shard-glk6/igt@gen9_exec_parse@allowed-all.html

  * igt@i915_pm_dc@dc9-dpms:
    - shard-apl:          [PASS][4] -> [SKIP][5] ([fdo#109271])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12970/shard-apl4/igt@i915_pm_dc@dc9-dpms.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8759/shard-apl3/igt@i915_pm_dc@dc9-dpms.html

  * igt@i915_selftest@live@dmabuf:
    - shard-apl:          [PASS][6] -> [DMESG-FAIL][7] ([i915#7562])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12970/shard-apl2/igt@i915_selftest@live@dmabuf.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8759/shard-apl2/igt@i915_selftest@live@dmabuf.html

  * igt@i915_suspend@fence-restore-untiled:
    - shard-apl:          [PASS][8] -> [ABORT][9] ([i915#180])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12970/shard-apl7/igt@i915_suspend@fence-restore-untiled.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8759/shard-apl3/igt@i915_suspend@fence-restore-untiled.html

  * igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_mc_ccs:
    - shard-glk:          NOTRUN -> [SKIP][10] ([fdo#109271] / [i915#3886]) +1 similar issue
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8759/shard-glk5/igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-c-crc-primary-rotation-180-y_tiled_gen12_mc_ccs:
    - shard-apl:          NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#3886]) +1 similar issue
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8759/shard-apl2/igt@kms_ccs@pipe-c-crc-primary-rotation-180-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-d-crc-sprite-planes-basic-yf_tiled_ccs:
    - shard-apl:          NOTRUN -> [SKIP][12] ([fdo#109271]) +22 similar issues
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8759/shard-apl4/igt@kms_ccs@pipe-d-crc-sprite-planes-basic-yf_tiled_ccs.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-glk:          [PASS][13] -> [FAIL][14] ([i915#2346])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12970/shard-glk4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8759/shard-glk9/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
    - shard-apl:          [PASS][15] -> [FAIL][16] ([i915#2346])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12970/shard-apl7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8759/shard-apl6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html

  * igt@kms_flip@flip-vs-expired-vblank@b-dp1:
    - shard-apl:          [PASS][17] -> [FAIL][18] ([i915#79])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12970/shard-apl7/igt@kms_flip@flip-vs-expired-vblank@b-dp1.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8759/shard-apl6/igt@kms_flip@flip-vs-expired-vblank@b-dp1.html

  * igt@kms_frontbuffer_tracking@psr-1p-pri-indfb-multidraw:
    - shard-glk:          NOTRUN -> [SKIP][19] ([fdo#109271]) +74 similar issues
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8759/shard-glk6/igt@kms_frontbuffer_tracking@psr-1p-pri-indfb-multidraw.html

  
#### Possible fixes ####

  * igt@gem_ctx_isolation@preservation-s3@bcs0:
    - {shard-tglu}:       [DMESG-WARN][20] ([i915#5122] / [i915#5251]) -> [PASS][21]
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12970/shard-tglu-5/igt@gem_ctx_isolation@preservation-s3@bcs0.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8759/shard-tglu-6/igt@gem_ctx_isolation@preservation-s3@bcs0.html

  * igt@gem_ctx_isolation@preservation-s3@rcs0:
    - {shard-tglu}:       [ABORT][22] ([i915#5122]) -> [PASS][23] +1 similar issue
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12970/shard-tglu-5/igt@gem_ctx_isolation@preservation-s3@rcs0.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8759/shard-tglu-6/igt@gem_ctx_isolation@preservation-s3@rcs0.html

  * igt@gem_ctx_isolation@preservation-s3@vcs0:
    - {shard-tglu}:       [DMESG-WARN][24] ([i915#5251]) -> [PASS][25]
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12970/shard-tglu-5/igt@gem_ctx_isolation@preservation-s3@vcs0.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8759/shard-tglu-6/igt@gem_ctx_isolation@preservation-s3@vcs0.html

  * igt@gem_eio@hibernate:
    - {shard-tglu}:       [ABORT][26] ([i915#7975]) -> [PASS][27]
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12970/shard-tglu-10/igt@gem_eio@hibernate.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8759/shard-tglu-6/igt@gem_eio@hibernate.html

  * igt@gem_exec_fair@basic-none-solo@rcs0:
    - shard-apl:          [FAIL][28] ([i915#2842]) -> [PASS][29]
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12970/shard-apl4/igt@gem_exec_fair@basic-none-solo@rcs0.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8759/shard-apl3/igt@gem_exec_fair@basic-none-solo@rcs0.html

  * igt@i915_pm_rpm@modeset-lpsp-stress:
    - {shard-rkl}:        [SKIP][30] ([i915#1397]) -> [PASS][31]
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12970/shard-rkl-4/igt@i915_pm_rpm@modeset-lpsp-stress.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8759/shard-rkl-7/igt@i915_pm_rpm@modeset-lpsp-stress.html

  * igt@i915_pm_rpm@system-suspend:
    - {shard-rkl}:        [ABORT][32] -> [PASS][33]
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12970/shard-rkl-6/igt@i915_pm_rpm@system-suspend.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8759/shard-rkl-4/igt@i915_pm_rpm@system-suspend.html

  * igt@kms_cursor_legacy@single-bo@pipe-b:
    - {shard-rkl}:        [INCOMPLETE][34] ([i915#8011]) -> [PASS][35]
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12970/shard-rkl-7/igt@kms_cursor_legacy@single-bo@pipe-b.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8759/shard-rkl-2/igt@kms_cursor_legacy@single-bo@pipe-b.html

  * igt@kms_flip@flip-vs-suspend@a-dp1:
    - shard-apl:          [ABORT][36] ([i915#180]) -> [PASS][37]
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12970/shard-apl1/igt@kms_flip@flip-vs-suspend@a-dp1.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8759/shard-apl3/igt@kms_flip@flip-vs-suspend@a-dp1.html

  * igt@perf_pmu@idle@rcs0:
    - {shard-rkl}:        [FAIL][38] ([i915#4349]) -> [PASS][39]
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12970/shard-rkl-3/igt@perf_pmu@idle@rcs0.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8759/shard-rkl-1/igt@perf_pmu@idle@rcs0.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
  [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
  [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
  [fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
  [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
  [fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656
  [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1257]: https://gitlab.freedesktop.org/drm/intel/issues/1257
  [i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
  [i915#2433]: https://gitlab.freedesktop.org/drm/intel/issues/2433
  [i915#2434]: https://gitlab.freedesktop.org/drm/intel/issues/2434
  [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
  [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
  [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
  [i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
  [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
  [i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
  [i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
  [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
  [i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
  [i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
  [i915#3023]: https://gitlab.freedesktop.org/drm/intel/issues/3023
  [i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116
  [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
  [i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
  [i915#3318]: https://gitlab.freedesktop.org/drm/intel/issues/3318
  [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
  [i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
  [i915#3528]: https://gitlab.freedesktop.org/drm/intel/issues/3528
  [i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
  [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
  [i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
  [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734
  [i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742
  [i915#3804]: https://gitlab.freedesktop.org/drm/intel/issues/3804
  [i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
  [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
  [i915#3938]: https://gitlab.freedesktop.org/drm/intel/issues/3938
  [i915#3952]: https://gitlab.freedesktop.org/drm/intel/issues/3952
  [i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
  [i915#3989]: https://gitlab.freedesktop.org/drm/intel/issues/3989
  [i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
  [i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
  [i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215
  [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
  [i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349
  [i915#4387]: https://gitlab.freedesktop.org/drm/intel/issues/4387
  [i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391
  [i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
  [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
  [i915#4565]: https://gitlab.freedesktop.org/drm/intel/issues/4565
  [i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771
  [i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
  [i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
  [i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
  [i915#4859]: https://gitlab.freedesktop.org/drm/intel/issues/4859
  [i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
  [i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880
  [i915#4881]: https://gitlab.freedesktop.org/drm/intel/issues/4881
  [i915#4885]: https://gitlab.freedesktop.org/drm/intel/issues/4885
  [i915#5122]: https://gitlab.freedesktop.org/drm/intel/issues/5122
  [i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
  [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
  [i915#5251]: https://gitlab.freedesktop.org/drm/intel/issues/5251
  [i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
  [i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
  [i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
  [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
  [i915#5431]: https://gitlab.freedesktop.org/drm/intel/issues/5431
  [i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439
  [i915#5461]: https://gitlab.freedesktop.org/drm/intel/issues/5461
  [i915#5563]: https://gitlab.freedesktop.org/drm/intel/issues/5563
  [i915#5566]: https://gitlab.freedesktop.org/drm/intel/issues/5566
  [i915#5723]: https://gitlab.freedesktop.org/drm/intel/issues/5723
  [i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
  [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
  [i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
  [i915#6335]: https://gitlab.freedesktop.org/drm/intel/issues/6335
  [i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433
  [i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
  [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
  [i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
  [i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953
  [i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
  [i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456
  [i915#7562]: https://gitlab.freedesktop.org/drm/intel/issues/7562
  [i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697
  [i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701
  [i915#7707]: https://gitlab.freedesktop.org/drm/intel/issues/7707
  [i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
  [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
  [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
  [i915#7953]: https://gitlab.freedesktop.org/drm/intel/issues/7953
  [i915#7975]: https://gitlab.freedesktop.org/drm/intel/issues/7975
  [i915#8011]: https://gitlab.freedesktop.org/drm/intel/issues/8011
  [i915#8292]: https://gitlab.freedesktop.org/drm/intel/issues/8292
  [i915#8308]: https://gitlab.freedesktop.org/drm/intel/issues/8308


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_7239 -> IGTPW_8759
  * Piglit: piglit_4509 -> None

  CI-20190529: 20190529
  CI_DRM_12970: 9009e501d394d70613abb67fae3ff19cc044bcc9 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_8759: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8759/index.html
  IGT_7239: cbac5f457ab5d99586f24c6c9c48705d63ddf433 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8759/index.html

[-- Attachment #2: Type: text/html, Size: 11452 bytes --]

[igt-dev] [PATCH i-g-t 1/2] lib/i915/gem_engine_topology: list engines specific to gt

[Vikas Srivastava]

From: Riana Tauro <riana.tauro@intel.com>

Add a function that returns all engines belonging to a gt
Currently the function is specific to MTL and returns gt id
based on engine

Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Signed-off-by: Vikas Srivastava <vikas.srivastava@intel.com>
---
 lib/i915/gem_engine_topology.c | 73 ++++++++++++++++++++++++++++++++++
 lib/i915/gem_engine_topology.h |  6 +++
 2 files changed, 79 insertions(+)

diff --git a/lib/i915/gem_engine_topology.c b/lib/i915/gem_engine_topology.c
index ca3333c252..6c8929ec59 100644
--- a/lib/i915/gem_engine_topology.c
+++ b/lib/i915/gem_engine_topology.c
@@ -350,6 +350,79 @@ struct intel_execution_engine2 gem_eb_flags_to_engine(unsigned int flags)
 	return e2__;
 }
 
+/*
+ * MTL has two GT's, one containing render/compute/copy and the other
+ * containing media engines. Return gt id based on engine.
+ */
+static int
+mtl_engine_to_gt_map(const struct i915_engine_class_instance *e)
+{
+	switch (e->engine_class) {
+	case I915_ENGINE_CLASS_RENDER:
+	case I915_ENGINE_CLASS_COMPUTE:
+	case I915_ENGINE_CLASS_COPY:
+		return 0;
+	case I915_ENGINE_CLASS_VIDEO:
+	case I915_ENGINE_CLASS_VIDEO_ENHANCE:
+		return 1;
+	default:
+		igt_assert_f(0, "Unsupported engine class %d\n", e->engine_class);
+	}
+}
+
+static int gem_engine_to_gt_map(int i915, const struct i915_engine_class_instance *engine)
+{
+	igt_require(IS_METEORLAKE(intel_get_drm_devid(i915)));
+	return mtl_engine_to_gt_map(engine);
+}
+
+/**
+ * gem_list_engines:
+ * @i915: i915 drm file descriptor
+ * @gt_mask: gt mask
+ * @class_mask: engine class mask
+ * @out: returned engine count
+ *
+ * Returns: the list of all physical engines belonging to the gt.
+ * Caller must free memory after use
+ */
+struct i915_engine_class_instance *
+gem_list_engines(int i915,
+		 uint32_t gt_mask,
+		 uint32_t class_mask,
+		 unsigned int *out)
+{
+	struct i915_engine_class_instance *engines;
+	struct drm_i915_query_engine_info *info;
+	const int size = 256 << 10; /* enough for 8 classes of 256 engines */
+	unsigned int max = 0, count = 0;
+
+	info = calloc(1, size);
+	igt_assert(!__gem_query_engines(i915, info, size));
+
+	max = info->num_engines;
+	engines = (struct i915_engine_class_instance *)info;
+	for (unsigned int i = 0; i < max; i++) {
+		const struct i915_engine_class_instance *e =
+			&info->engines[i].engine;
+
+		if (!((class_mask >> e->engine_class) & 1))
+			continue;
+		if (!((gt_mask >> gem_engine_to_gt_map(i915, e)) & 1))
+			continue;
+
+		engines[count++] = *e;
+	}
+
+	if (!count) {
+		free(engines);
+		engines = NULL;
+	}
+
+	*out = count;
+	return engines;
+}
+
 bool gem_engine_is_equal(const struct intel_execution_engine2 *e1,
 			 const struct intel_execution_engine2 *e2)
 {
diff --git a/lib/i915/gem_engine_topology.h b/lib/i915/gem_engine_topology.h
index 987f2bf944..89642c3172 100644
--- a/lib/i915/gem_engine_topology.h
+++ b/lib/i915/gem_engine_topology.h
@@ -61,6 +61,12 @@ intel_get_current_physical_engine(struct intel_engine_data *ed);
 
 void intel_next_engine(struct intel_engine_data *ed);
 
+struct i915_engine_class_instance *
+gem_list_engines(int i915,
+		 uint32_t gt_mask,
+		 uint32_t class_mask,
+		 unsigned int *count);
+
 bool gem_engine_is_equal(const struct intel_execution_engine2 *e1,
 			 const struct intel_execution_engine2 *e2);
 
-- 
2.25.1

[igt-dev] [PATCH i-g-t 2/2] lib/intel_ctx: Create intel_ctx with physical engines in a single gt

[Vikas Srivastava]

From: Ashutosh Dixit <ashutosh.dixit@intel.com>

Introduce intel_ctx_create_for_gt for creating an intel_ctx_t containing
all physical engines belonging to a single gt.

Cc: Zbigniew Kempczynski <zbigniew.kempczynski@intel.com>
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Signed-off-by: Vikas Srivastava <vikas.srivastava@intel.com>
---
 lib/intel_ctx.c | 42 ++++++++++++++++++++++++++++++++++++++++++
 lib/intel_ctx.h |  2 ++
 2 files changed, 44 insertions(+)

diff --git a/lib/intel_ctx.c b/lib/intel_ctx.c
index e19a54a896..ded9c0f1e4 100644
--- a/lib/intel_ctx.c
+++ b/lib/intel_ctx.c
@@ -61,6 +61,28 @@ intel_ctx_cfg_t intel_ctx_cfg_all_physical(int fd)
 	return cfg;
 }
 
+/**
+ * intel_ctx_cfg_for_gt:
+ * @fd: open i915 drm file descriptor
+ * @gt: gt id
+ *
+ * Returns an intel_ctx_cfg_t containing all physical engines belonging to @gt
+ */
+intel_ctx_cfg_t intel_ctx_cfg_for_gt(int fd, int gt)
+{
+	struct i915_engine_class_instance *ci;
+	intel_ctx_cfg_t cfg = {};
+	unsigned int count;
+
+	ci = gem_list_engines(fd, 1u << gt, ~0u, &count);
+	igt_assert(ci);
+	memcpy(&cfg.engines, ci, count * sizeof(*ci));
+	cfg.num_engines = count;
+	free(ci);
+
+	return cfg;
+}
+
 /**
  * intel_ctx_cfg_for_engine:
  * @class: engine class
@@ -295,6 +317,26 @@ const intel_ctx_t *intel_ctx_create_all_physical(int fd)
 	return intel_ctx_create(fd, &cfg);
 }
 
+/**
+ * intel_ctx_create_for_gt:
+ * @fd: open i915 drm file descriptor
+ * @gt: gt id
+ *
+ * Creates an intel_ctx_t containing all physical engines belonging to @gt
+ */
+const intel_ctx_t *intel_ctx_create_for_gt(int fd, int gt)
+{
+	intel_ctx_cfg_t cfg;
+
+	igt_require(gem_has_contexts(fd) || !gt);
+
+	if (!gem_has_contexts(fd))
+		return intel_ctx_0(fd);
+
+	cfg = intel_ctx_cfg_for_gt(fd, gt);
+	return intel_ctx_create(fd, &cfg);
+}
+
 /**
  * intel_ctx_cfg_engine_class:
  * @cfg: an intel_ctx_cfg_t
diff --git a/lib/intel_ctx.h b/lib/intel_ctx.h
index 89c65fcd39..3cfeaae81e 100644
--- a/lib/intel_ctx.h
+++ b/lib/intel_ctx.h
@@ -54,6 +54,7 @@ typedef struct intel_ctx_cfg {
 
 intel_ctx_cfg_t intel_ctx_cfg_for_engine(unsigned int class, unsigned int inst);
 intel_ctx_cfg_t intel_ctx_cfg_all_physical(int fd);
+intel_ctx_cfg_t intel_ctx_cfg_for_gt(int fd, int gt);
 int intel_ctx_cfg_engine_class(const intel_ctx_cfg_t *cfg, unsigned int engine);
 
 /**
@@ -75,6 +76,7 @@ const intel_ctx_t *intel_ctx_0(int fd);
 const intel_ctx_t *intel_ctx_create_for_engine(int fd, unsigned int class,
 					       unsigned int inst);
 const intel_ctx_t *intel_ctx_create_all_physical(int fd);
+const intel_ctx_t *intel_ctx_create_for_gt(int fd, int gt);
 void intel_ctx_destroy(int fd, const intel_ctx_t *ctx);
 
 unsigned int intel_ctx_engine_class(const intel_ctx_t *ctx, unsigned int engine);
-- 
2.25.1

Re: [igt-dev] [PATCH i-g-t 2/2] lib/intel_ctx: Create intel_ctx with physical engines in a single gt

[Kamil Konieczny]

Hi Vikas,

On 2023-03-13 at 23:29:28 +0530, Vikas Srivastava wrote:
> From: Ashutosh Dixit <ashutosh.dixit@intel.com>
> 
> Introduce intel_ctx_create_for_gt for creating an intel_ctx_t containing
> all physical engines belonging to a single gt.
> 
> Cc: Zbigniew Kempczynski <zbigniew.kempczynski@intel.com>

I do not see Zbigniew in headers, please do send your patch to
people on Cc list.

> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>

imho you should also cc Ashutosh and Riana.

> Signed-off-by: Vikas Srivastava <vikas.srivastava@intel.com>
> ---
>  lib/intel_ctx.c | 42 ++++++++++++++++++++++++++++++++++++++++++
>  lib/intel_ctx.h |  2 ++
>  2 files changed, 44 insertions(+)
> 
> diff --git a/lib/intel_ctx.c b/lib/intel_ctx.c
> index e19a54a896..ded9c0f1e4 100644
> --- a/lib/intel_ctx.c
> +++ b/lib/intel_ctx.c
> @@ -61,6 +61,28 @@ intel_ctx_cfg_t intel_ctx_cfg_all_physical(int fd)
>  	return cfg;
>  }
>  
> +/**
> + * intel_ctx_cfg_for_gt:
> + * @fd: open i915 drm file descriptor
> + * @gt: gt id
> + *
> + * Returns an intel_ctx_cfg_t containing all physical engines belonging to @gt
> + */
> +intel_ctx_cfg_t intel_ctx_cfg_for_gt(int fd, int gt)
> +{
> +	struct i915_engine_class_instance *ci;
> +	intel_ctx_cfg_t cfg = {};
> +	unsigned int count;
> +
> +	ci = gem_list_engines(fd, 1u << gt, ~0u, &count);
> +	igt_assert(ci);
> +	memcpy(&cfg.engines, ci, count * sizeof(*ci));
> +	cfg.num_engines = count;
> +	free(ci);
> +
> +	return cfg;
> +}
> +
>  /**
>   * intel_ctx_cfg_for_engine:
>   * @class: engine class
> @@ -295,6 +317,26 @@ const intel_ctx_t *intel_ctx_create_all_physical(int fd)
>  	return intel_ctx_create(fd, &cfg);
>  }
>  
> +/**
> + * intel_ctx_create_for_gt:
> + * @fd: open i915 drm file descriptor
> + * @gt: gt id
> + *
> + * Creates an intel_ctx_t containing all physical engines belonging to @gt
> + */
> +const intel_ctx_t *intel_ctx_create_for_gt(int fd, int gt)
> +{
> +	intel_ctx_cfg_t cfg;
> +
> +	igt_require(gem_has_contexts(fd) || !gt);
------- ^
It would fail here for
	!gem_has_contexts(fd) && gt != 0
Does it really happen on new platforms ?
imho we should avoid igt_require in lib, it should be checked in
test itself so please remove it from here.

> +
> +	if (!gem_has_contexts(fd))

It check has_contexts here - in case contexts are not supported 
it return default one, so it is argument againts above
igt_require.

Regards,
Kamil

> +		return intel_ctx_0(fd);
> +
> +	cfg = intel_ctx_cfg_for_gt(fd, gt);
> +	return intel_ctx_create(fd, &cfg);
> +}
> +
>  /**
>   * intel_ctx_cfg_engine_class:
>   * @cfg: an intel_ctx_cfg_t
> diff --git a/lib/intel_ctx.h b/lib/intel_ctx.h
> index 89c65fcd39..3cfeaae81e 100644
> --- a/lib/intel_ctx.h
> +++ b/lib/intel_ctx.h
> @@ -54,6 +54,7 @@ typedef struct intel_ctx_cfg {
>  
>  intel_ctx_cfg_t intel_ctx_cfg_for_engine(unsigned int class, unsigned int inst);
>  intel_ctx_cfg_t intel_ctx_cfg_all_physical(int fd);
> +intel_ctx_cfg_t intel_ctx_cfg_for_gt(int fd, int gt);
>  int intel_ctx_cfg_engine_class(const intel_ctx_cfg_t *cfg, unsigned int engine);
>  
>  /**
> @@ -75,6 +76,7 @@ const intel_ctx_t *intel_ctx_0(int fd);
>  const intel_ctx_t *intel_ctx_create_for_engine(int fd, unsigned int class,
>  					       unsigned int inst);
>  const intel_ctx_t *intel_ctx_create_all_physical(int fd);
> +const intel_ctx_t *intel_ctx_create_for_gt(int fd, int gt);
>  void intel_ctx_destroy(int fd, const intel_ctx_t *ctx);
>  
>  unsigned int intel_ctx_engine_class(const intel_ctx_t *ctx, unsigned int engine);
> -- 
> 2.25.1
>