* [igt-dev] [PATCH i-g-t v3 1/3] tests/i915/kms_frontbuffer_tracking: Split fbc into library
2023-04-21 8:52 [igt-dev] [PATCH i-g-t v3 0/3] Testcases for dirtyfb ioctl Jouni Högander
@ 2023-04-21 8:52 ` Jouni Högander
2023-04-21 9:35 ` Kamil Konieczny
2023-04-21 8:52 ` [igt-dev] [PATCH i-g-t v3 2/3] tests/i915/kms_frontbuffer_tracking: Split drrs " Jouni Högander
` (2 subsequent siblings)
3 siblings, 1 reply; 7+ messages in thread
From: Jouni Högander @ 2023-04-21 8:52 UTC (permalink / raw)
To: igt-dev
Split fbc handling into library to be used by other tests as well.
v2: Moved into libigt instead of static kms_fbc_helper
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
lib/i915/intel_fbc.c | 62 +++++++++++++++++++++++++++
lib/i915/intel_fbc.h | 19 ++++++++
lib/meson.build | 1 +
tests/i915/kms_frontbuffer_tracking.c | 57 +++++-------------------
4 files changed, 92 insertions(+), 47 deletions(-)
create mode 100644 lib/i915/intel_fbc.c
create mode 100644 lib/i915/intel_fbc.h
diff --git a/lib/i915/intel_fbc.c b/lib/i915/intel_fbc.c
new file mode 100644
index 00000000..2a1a65d5
--- /dev/null
+++ b/lib/i915/intel_fbc.c
@@ -0,0 +1,62 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#include <fcntl.h>
+
+#include "igt.h"
+
+#include "intel_fbc.h"
+
+bool intel_fbc_supported_on_chipset(int device, enum pipe pipe)
+{
+ char buf[128];
+ int dir;
+
+ dir = igt_debugfs_pipe_dir(device, pipe, O_DIRECTORY);
+ igt_require_fd(dir);
+ igt_debugfs_simple_read(dir, "i915_fbc_status", buf, sizeof(buf));
+ close(dir);
+ if (*buf == '\0')
+ return false;
+
+ return !strstr(buf, "FBC unsupported on this chipset\n");
+}
+
+static bool _intel_fbc_is_enabled(int device, enum pipe pipe, int log_level, char *last_fbc_buf)
+{
+ char buf[128];
+ bool print = true;
+ int dir;
+
+ dir = igt_debugfs_pipe_dir(device, pipe, O_DIRECTORY);
+ igt_require_fd(dir);
+ igt_debugfs_simple_read(dir, "i915_fbc_status", buf, sizeof(buf));
+ close(dir);
+ if (log_level != IGT_LOG_DEBUG)
+ last_fbc_buf[0] = '\0';
+ else if (strcmp(last_fbc_buf, buf))
+ strcpy(last_fbc_buf, buf);
+ else
+ print = false;
+
+ if (print)
+ igt_log(IGT_LOG_DOMAIN, log_level, "fbc_is_enabled()?\n%s", buf);
+
+ return strstr(buf, "FBC enabled\n");
+}
+
+bool intel_fbc_is_enabled(int device, enum pipe pipe, int log_level)
+{
+ char last_fbc_buf[128] = {'\0'};
+
+ return _intel_fbc_is_enabled(device, pipe, log_level, last_fbc_buf);
+}
+
+bool intel_fbc_wait_until_enabled(int device, enum pipe pipe)
+{
+ char last_fbc_buf[128] = {'\0'};
+
+ return igt_wait(_intel_fbc_is_enabled(device, pipe, IGT_LOG_DEBUG, last_fbc_buf), 2000, 1);
+}
diff --git a/lib/i915/intel_fbc.h b/lib/i915/intel_fbc.h
new file mode 100644
index 00000000..901bf984
--- /dev/null
+++ b/lib/i915/intel_fbc.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2022 Intel Corporation
+ */
+
+#ifndef INTEL_FBC_H
+#define INTEL_FBC_H
+
+#include "igt.h"
+
+#define intel_fbc_enable(device) igt_set_module_param_int(device, "enable_fbc", 1)
+#define intel_fbc_disable(device) igt_set_module_param_int(device, "enable_fbc", 0)
+
+bool intel_fbc_supported_on_chipset(int device, enum pipe pipe);
+bool intel_fbc_wait_until_enabled(int device, enum pipe pipe);
+bool intel_fbc_is_enabled(int device, enum pipe pipe, int log_level);
+
+#endif
+
diff --git a/lib/meson.build b/lib/meson.build
index b21c252b..e3916096 100644
--- a/lib/meson.build
+++ b/lib/meson.build
@@ -12,6 +12,7 @@ lib_sources = [
'i915/gem_mman.c',
'i915/gem_vm.c',
'i915/intel_decode.c',
+ 'i915/intel_fbc.c',
'i915/intel_memory_region.c',
'i915/intel_mocs.c',
'i915/intel_cmds_info.c',
diff --git a/tests/i915/kms_frontbuffer_tracking.c b/tests/i915/kms_frontbuffer_tracking.c
index 650e14a7..f5da0f24 100644
--- a/tests/i915/kms_frontbuffer_tracking.c
+++ b/tests/i915/kms_frontbuffer_tracking.c
@@ -32,6 +32,7 @@
#include "i915/gem.h"
#include "i915/gem_create.h"
+#include "i915/intel_fbc.h"
#include "igt.h"
#include "igt_sysfs.h"
#include "igt_psr.h"
@@ -775,27 +776,6 @@ static void __debugfs_read_connector(const char *param, char *buf, int len)
#define debugfs_write_crtc(p, arr) __debugfs_write_crtc(p, arr, sizeof(arr))
#define debugfs_read_connector(p, arr) __debugfs_read_connector(p, arr, sizeof(arr))
-static char last_fbc_buf[128];
-
-static bool fbc_is_enabled(int lvl)
-{
- char buf[128];
- bool print = true;
-
- debugfs_read_crtc("i915_fbc_status", buf);
- if (lvl != IGT_LOG_DEBUG)
- last_fbc_buf[0] = '\0';
- else if (strcmp(last_fbc_buf, buf))
- strcpy(last_fbc_buf, buf);
- else
- print = false;
-
- if (print)
- igt_log(IGT_LOG_DOMAIN, lvl, "fbc_is_enabled()?\n%s", buf);
-
- return strstr(buf, "FBC enabled\n");
-}
-
static void drrs_set(unsigned int val)
{
char buf[2];
@@ -970,20 +950,11 @@ static bool fbc_mode_too_large(void)
return strstr(buf, "FBC disabled: mode too large for compression\n");
}
-static bool fbc_wait_until_enabled(void)
-{
- last_fbc_buf[0] = '\0';
-
- return igt_wait(fbc_is_enabled(IGT_LOG_DEBUG), 2000, 1);
-}
-
static bool drrs_wait_until_rr_switch_to_low(void)
{
return igt_wait(is_drrs_low(), 5000, 1);
}
-#define fbc_enable() igt_set_module_param_int(drm.fd, "enable_fbc", 1)
-#define fbc_disable() igt_set_module_param_int(drm.fd, "enable_fbc", 0)
#define drrs_enable() drrs_set(1)
#define drrs_disable() drrs_set(0)
@@ -1188,8 +1159,8 @@ static bool disable_features(const struct test_mode *t)
if (t->feature == FEATURE_DEFAULT)
return false;
- fbc_disable();
drrs_disable();
+ intel_fbc_disable(drm.fd);
return psr.can_test ? psr_disable(drm.fd, drm.debugfs) : false;
}
@@ -1429,20 +1400,9 @@ static void teardown_crcs(void)
igt_pipe_crc_free(pipe_crc);
}
-static bool fbc_supported_on_chipset(void)
-{
- char buf[128];
-
- debugfs_read_crtc("i915_fbc_status", buf);
- if (*buf == '\0')
- return false;
-
- return !strstr(buf, "FBC unsupported on this chipset\n");
-}
-
static void setup_fbc(void)
{
- if (!fbc_supported_on_chipset()) {
+ if (!intel_fbc_supported_on_chipset(drm.fd, prim_mode_params.pipe)) {
igt_info("Can't test FBC: not supported on this chipset\n");
return;
}
@@ -1649,15 +1609,18 @@ static void do_status_assertions(int flags)
igt_require(!fbc_not_enough_stolen());
igt_require(!fbc_stride_not_supported());
igt_require(!fbc_mode_too_large());
- if (!fbc_wait_until_enabled()) {
- igt_assert_f(fbc_is_enabled(IGT_LOG_WARN),
+ if (!intel_fbc_wait_until_enabled(drm.fd, prim_mode_params.pipe)) {
+ igt_assert_f(intel_fbc_is_enabled(drm.fd,
+ prim_mode_params.pipe,
+ IGT_LOG_WARN),
"FBC disabled\n");
}
if (opt.fbc_check_compression)
igt_assert(fbc_wait_for_compression());
} else if (flags & ASSERT_FBC_DISABLED) {
- igt_assert(!fbc_wait_until_enabled());
+ igt_assert(!intel_fbc_wait_until_enabled(drm.fd,
+ prim_mode_params.pipe));
}
if (flags & ASSERT_PSR_ENABLED)
@@ -1797,7 +1760,7 @@ static bool enable_features_for_test(const struct test_mode *t)
return false;
if (t->feature & FEATURE_FBC)
- fbc_enable();
+ intel_fbc_enable(drm.fd);
if (t->feature & FEATURE_PSR)
ret = psr_enable(drm.fd, drm.debugfs, PSR_MODE_1);
if (t->feature & FEATURE_DRRS)
--
2.34.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [igt-dev] [PATCH i-g-t v3 1/3] tests/i915/kms_frontbuffer_tracking: Split fbc into library
2023-04-21 8:52 ` [igt-dev] [PATCH i-g-t v3 1/3] tests/i915/kms_frontbuffer_tracking: Split fbc into library Jouni Högander
@ 2023-04-21 9:35 ` Kamil Konieczny
2023-04-26 10:57 ` Hogander, Jouni
0 siblings, 1 reply; 7+ messages in thread
From: Kamil Konieczny @ 2023-04-21 9:35 UTC (permalink / raw)
To: igt-dev
Hi Jouni,
On 2023-04-21 at 11:52:51 +0300, Jouni Högander wrote:
> Split fbc handling into library to be used by other tests as well.
>
> v2: Moved into libigt instead of static kms_fbc_helper
>
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> lib/i915/intel_fbc.c | 62 +++++++++++++++++++++++++++
> lib/i915/intel_fbc.h | 19 ++++++++
> lib/meson.build | 1 +
> tests/i915/kms_frontbuffer_tracking.c | 57 +++++-------------------
> 4 files changed, 92 insertions(+), 47 deletions(-)
> create mode 100644 lib/i915/intel_fbc.c
> create mode 100644 lib/i915/intel_fbc.h
>
> diff --git a/lib/i915/intel_fbc.c b/lib/i915/intel_fbc.c
> new file mode 100644
> index 00000000..2a1a65d5
> --- /dev/null
> +++ b/lib/i915/intel_fbc.c
> @@ -0,0 +1,62 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2023 Intel Corporation
> + */
> +
> +#include <fcntl.h>
> +
> +#include "igt.h"
> +
> +#include "intel_fbc.h"
> +
Please describe all public library functions, for example look
into intel_iosf.c, something like:
/**
* function_name:
* @param_1: description 1
*
* general description what function do
*
* Returns:
* describe return values here
*/
> +bool intel_fbc_supported_on_chipset(int device, enum pipe pipe)
> +{
> + char buf[128];
---------------- ^
Make this global define.
> + int dir;
> +
> + dir = igt_debugfs_pipe_dir(device, pipe, O_DIRECTORY);
> + igt_require_fd(dir);
------- ^
I am not fond of igt_require iside lib functions, could you
replace it ? maybe make dir a parameter ?
Or return int, -1 = error, 0 = ok, 1 = not supported ?
> + igt_debugfs_simple_read(dir, "i915_fbc_status", buf, sizeof(buf));
> + close(dir);
> + if (*buf == '\0')
> + return false;
> +
> + return !strstr(buf, "FBC unsupported on this chipset\n");
> +}
> +
> +static bool _intel_fbc_is_enabled(int device, enum pipe pipe, int log_level, char *last_fbc_buf)
> +{
> + char buf[128];
---------------- ^
> + bool print = true;
> + int dir;
> +
> + dir = igt_debugfs_pipe_dir(device, pipe, O_DIRECTORY);
> + igt_require_fd(dir);
------- ^
Same here, maybe dir should be a param ?
> + igt_debugfs_simple_read(dir, "i915_fbc_status", buf, sizeof(buf));
> + close(dir);
> + if (log_level != IGT_LOG_DEBUG)
> + last_fbc_buf[0] = '\0';
> + else if (strcmp(last_fbc_buf, buf))
> + strcpy(last_fbc_buf, buf);
> + else
> + print = false;
> +
> + if (print)
> + igt_log(IGT_LOG_DOMAIN, log_level, "fbc_is_enabled()?\n%s", buf);
------------------------------------------------------------------- ^^^
imho s/?/:/ and maybe put '\n' after %s ?
> +
> + return strstr(buf, "FBC enabled\n");
> +}
> +
Same here, describe.
> +bool intel_fbc_is_enabled(int device, enum pipe pipe, int log_level)
> +{
> + char last_fbc_buf[128] = {'\0'};
------------------------- ^
> +
> + return _intel_fbc_is_enabled(device, pipe, log_level, last_fbc_buf);
> +}
> +
Same here, describe.
> +bool intel_fbc_wait_until_enabled(int device, enum pipe pipe)
> +{
> + char last_fbc_buf[128] = {'\0'};
------------------------- ^
> +
> + return igt_wait(_intel_fbc_is_enabled(device, pipe, IGT_LOG_DEBUG, last_fbc_buf), 2000, 1);
----------------------------------------------------------------------------------------- ^
Make this a param or desribe it (add also info about how long will you wait).
Regards,
Kamil
> +}
> diff --git a/lib/i915/intel_fbc.h b/lib/i915/intel_fbc.h
> new file mode 100644
> index 00000000..901bf984
> --- /dev/null
> +++ b/lib/i915/intel_fbc.h
> @@ -0,0 +1,19 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2022 Intel Corporation
> + */
> +
> +#ifndef INTEL_FBC_H
> +#define INTEL_FBC_H
> +
> +#include "igt.h"
> +
> +#define intel_fbc_enable(device) igt_set_module_param_int(device, "enable_fbc", 1)
> +#define intel_fbc_disable(device) igt_set_module_param_int(device, "enable_fbc", 0)
> +
> +bool intel_fbc_supported_on_chipset(int device, enum pipe pipe);
> +bool intel_fbc_wait_until_enabled(int device, enum pipe pipe);
> +bool intel_fbc_is_enabled(int device, enum pipe pipe, int log_level);
> +
> +#endif
> +
> diff --git a/lib/meson.build b/lib/meson.build
> index b21c252b..e3916096 100644
> --- a/lib/meson.build
> +++ b/lib/meson.build
> @@ -12,6 +12,7 @@ lib_sources = [
> 'i915/gem_mman.c',
> 'i915/gem_vm.c',
> 'i915/intel_decode.c',
> + 'i915/intel_fbc.c',
> 'i915/intel_memory_region.c',
> 'i915/intel_mocs.c',
> 'i915/intel_cmds_info.c',
> diff --git a/tests/i915/kms_frontbuffer_tracking.c b/tests/i915/kms_frontbuffer_tracking.c
> index 650e14a7..f5da0f24 100644
> --- a/tests/i915/kms_frontbuffer_tracking.c
> +++ b/tests/i915/kms_frontbuffer_tracking.c
> @@ -32,6 +32,7 @@
>
> #include "i915/gem.h"
> #include "i915/gem_create.h"
> +#include "i915/intel_fbc.h"
> #include "igt.h"
> #include "igt_sysfs.h"
> #include "igt_psr.h"
> @@ -775,27 +776,6 @@ static void __debugfs_read_connector(const char *param, char *buf, int len)
> #define debugfs_write_crtc(p, arr) __debugfs_write_crtc(p, arr, sizeof(arr))
> #define debugfs_read_connector(p, arr) __debugfs_read_connector(p, arr, sizeof(arr))
>
> -static char last_fbc_buf[128];
> -
> -static bool fbc_is_enabled(int lvl)
> -{
> - char buf[128];
> - bool print = true;
> -
> - debugfs_read_crtc("i915_fbc_status", buf);
> - if (lvl != IGT_LOG_DEBUG)
> - last_fbc_buf[0] = '\0';
> - else if (strcmp(last_fbc_buf, buf))
> - strcpy(last_fbc_buf, buf);
> - else
> - print = false;
> -
> - if (print)
> - igt_log(IGT_LOG_DOMAIN, lvl, "fbc_is_enabled()?\n%s", buf);
> -
> - return strstr(buf, "FBC enabled\n");
> -}
> -
> static void drrs_set(unsigned int val)
> {
> char buf[2];
> @@ -970,20 +950,11 @@ static bool fbc_mode_too_large(void)
> return strstr(buf, "FBC disabled: mode too large for compression\n");
> }
>
> -static bool fbc_wait_until_enabled(void)
> -{
> - last_fbc_buf[0] = '\0';
> -
> - return igt_wait(fbc_is_enabled(IGT_LOG_DEBUG), 2000, 1);
> -}
> -
> static bool drrs_wait_until_rr_switch_to_low(void)
> {
> return igt_wait(is_drrs_low(), 5000, 1);
> }
>
> -#define fbc_enable() igt_set_module_param_int(drm.fd, "enable_fbc", 1)
> -#define fbc_disable() igt_set_module_param_int(drm.fd, "enable_fbc", 0)
> #define drrs_enable() drrs_set(1)
> #define drrs_disable() drrs_set(0)
>
> @@ -1188,8 +1159,8 @@ static bool disable_features(const struct test_mode *t)
> if (t->feature == FEATURE_DEFAULT)
> return false;
>
> - fbc_disable();
> drrs_disable();
> + intel_fbc_disable(drm.fd);
> return psr.can_test ? psr_disable(drm.fd, drm.debugfs) : false;
> }
>
> @@ -1429,20 +1400,9 @@ static void teardown_crcs(void)
> igt_pipe_crc_free(pipe_crc);
> }
>
> -static bool fbc_supported_on_chipset(void)
> -{
> - char buf[128];
> -
> - debugfs_read_crtc("i915_fbc_status", buf);
> - if (*buf == '\0')
> - return false;
> -
> - return !strstr(buf, "FBC unsupported on this chipset\n");
> -}
> -
> static void setup_fbc(void)
> {
> - if (!fbc_supported_on_chipset()) {
> + if (!intel_fbc_supported_on_chipset(drm.fd, prim_mode_params.pipe)) {
> igt_info("Can't test FBC: not supported on this chipset\n");
> return;
> }
> @@ -1649,15 +1609,18 @@ static void do_status_assertions(int flags)
> igt_require(!fbc_not_enough_stolen());
> igt_require(!fbc_stride_not_supported());
> igt_require(!fbc_mode_too_large());
> - if (!fbc_wait_until_enabled()) {
> - igt_assert_f(fbc_is_enabled(IGT_LOG_WARN),
> + if (!intel_fbc_wait_until_enabled(drm.fd, prim_mode_params.pipe)) {
> + igt_assert_f(intel_fbc_is_enabled(drm.fd,
> + prim_mode_params.pipe,
> + IGT_LOG_WARN),
> "FBC disabled\n");
> }
>
> if (opt.fbc_check_compression)
> igt_assert(fbc_wait_for_compression());
> } else if (flags & ASSERT_FBC_DISABLED) {
> - igt_assert(!fbc_wait_until_enabled());
> + igt_assert(!intel_fbc_wait_until_enabled(drm.fd,
> + prim_mode_params.pipe));
> }
>
> if (flags & ASSERT_PSR_ENABLED)
> @@ -1797,7 +1760,7 @@ static bool enable_features_for_test(const struct test_mode *t)
> return false;
>
> if (t->feature & FEATURE_FBC)
> - fbc_enable();
> + intel_fbc_enable(drm.fd);
> if (t->feature & FEATURE_PSR)
> ret = psr_enable(drm.fd, drm.debugfs, PSR_MODE_1);
> if (t->feature & FEATURE_DRRS)
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [igt-dev] [PATCH i-g-t v3 1/3] tests/i915/kms_frontbuffer_tracking: Split fbc into library
2023-04-21 9:35 ` Kamil Konieczny
@ 2023-04-26 10:57 ` Hogander, Jouni
0 siblings, 0 replies; 7+ messages in thread
From: Hogander, Jouni @ 2023-04-26 10:57 UTC (permalink / raw)
To: igt-dev@lists.freedesktop.org, kamil.konieczny@linux.intel.com
Hello Kamil,
Thank you for checking my patch. I sent new version of the set. Please
check if you are fine with my fixes. Check also my responses below.
On Fri, 2023-04-21 at 11:35 +0200, Kamil Konieczny wrote:
> Hi Jouni,
>
> On 2023-04-21 at 11:52:51 +0300, Jouni Högander wrote:
> > Split fbc handling into library to be used by other tests as well.
> >
> > v2: Moved into libigt instead of static kms_fbc_helper
> >
> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > ---
> > lib/i915/intel_fbc.c | 62
> > +++++++++++++++++++++++++++
> > lib/i915/intel_fbc.h | 19 ++++++++
> > lib/meson.build | 1 +
> > tests/i915/kms_frontbuffer_tracking.c | 57 +++++------------------
> > -
> > 4 files changed, 92 insertions(+), 47 deletions(-)
> > create mode 100644 lib/i915/intel_fbc.c
> > create mode 100644 lib/i915/intel_fbc.h
> >
> > diff --git a/lib/i915/intel_fbc.c b/lib/i915/intel_fbc.c
> > new file mode 100644
> > index 00000000..2a1a65d5
> > --- /dev/null
> > +++ b/lib/i915/intel_fbc.c
> > @@ -0,0 +1,62 @@
> > +/* SPDX-License-Identifier: MIT */
> > +/*
> > + * Copyright © 2023 Intel Corporation
> > + */
> > +
> > +#include <fcntl.h>
> > +
> > +#include "igt.h"
> > +
> > +#include "intel_fbc.h"
> > +
>
> Please describe all public library functions, for example look
> into intel_iosf.c, something like:
>
> /**
> * function_name:
> * @param_1: description 1
> *
> * general description what function do
> *
> * Returns:
> * describe return values here
> */
Fixed.
> > +bool intel_fbc_supported_on_chipset(int device, enum pipe pipe)
> > +{
> > + char buf[128];
Fixed.
> ---------------- ^
> Make this global define.
>
> > + int dir;
> > +
> > + dir = igt_debugfs_pipe_dir(device, pipe, O_DIRECTORY);
> > + igt_require_fd(dir);
> ------- ^
> I am not fond of igt_require iside lib functions, could you
> replace it ? maybe make dir a parameter ?
> Or return int, -1 = error, 0 = ok, 1 = not supported ?
I would like to keep this. This is currently common approach in
library:
grep igt_require lib/* -R | wc -l
185
What do you think?
>
> > + igt_debugfs_simple_read(dir, "i915_fbc_status", buf,
> > sizeof(buf));
> > + close(dir);
> > + if (*buf == '\0')
> > + return false;
> > +
> > + return !strstr(buf, "FBC unsupported on this chipset\n");
> > +}
> > +
> > +static bool _intel_fbc_is_enabled(int device, enum pipe pipe, int
> > log_level, char *last_fbc_buf)
> > +{
> > + char buf[128];
> ---------------- ^
> > + bool print = true;
> > + int dir;
> > +
> > + dir = igt_debugfs_pipe_dir(device, pipe, O_DIRECTORY);
> > + igt_require_fd(dir);
> ------- ^
> Same here, maybe dir should be a param ?
>
> > + igt_debugfs_simple_read(dir, "i915_fbc_status", buf,
> > sizeof(buf));
> > + close(dir);
> > + if (log_level != IGT_LOG_DEBUG)
> > + last_fbc_buf[0] = '\0';
> > + else if (strcmp(last_fbc_buf, buf))
> > + strcpy(last_fbc_buf, buf);
> > + else
> > + print = false;
> > +
> > + if (print)
> > + igt_log(IGT_LOG_DOMAIN, log_level,
> > "fbc_is_enabled()?\n%s", buf);
> -------------------------------------------------------------------
> ^^^
> imho s/?/:/ and maybe put '\n' after %s ?
>
> > +
> > + return strstr(buf, "FBC enabled\n");
> > +}
> > +
>
> Same here, describe.
>
> > +bool intel_fbc_is_enabled(int device, enum pipe pipe, int
> > log_level)
> > +{
> > + char last_fbc_buf[128] = {'\0'};
> ------------------------- ^
> > +
> > + return _intel_fbc_is_enabled(device, pipe, log_level,
> > last_fbc_buf);
> > +}
> > +
>
> Same here, describe.
Fixed.
>
> > +bool intel_fbc_wait_until_enabled(int device, enum pipe pipe)
> > +{
> > + char last_fbc_buf[128] = {'\0'};
> ------------------------- ^
> > +
> > + return igt_wait(_intel_fbc_is_enabled(device, pipe,
> > IGT_LOG_DEBUG, last_fbc_buf), 2000, 1);
> ---------------------------------------------------------------------
> -------------------- ^
> Make this a param or desribe it (add also info about how long will
> you wait).
I choose to describe it. Please check new version.
>
> Regards,
> Kamil
>
> > +}
> > diff --git a/lib/i915/intel_fbc.h b/lib/i915/intel_fbc.h
> > new file mode 100644
> > index 00000000..901bf984
> > --- /dev/null
> > +++ b/lib/i915/intel_fbc.h
> > @@ -0,0 +1,19 @@
> > +/* SPDX-License-Identifier: MIT */
> > +/*
> > + * Copyright © 2022 Intel Corporation
> > + */
> > +
> > +#ifndef INTEL_FBC_H
> > +#define INTEL_FBC_H
> > +
> > +#include "igt.h"
> > +
> > +#define intel_fbc_enable(device) igt_set_module_param_int(device,
> > "enable_fbc", 1)
> > +#define intel_fbc_disable(device) igt_set_module_param_int(device,
> > "enable_fbc", 0)
> > +
> > +bool intel_fbc_supported_on_chipset(int device, enum pipe pipe);
> > +bool intel_fbc_wait_until_enabled(int device, enum pipe pipe);
> > +bool intel_fbc_is_enabled(int device, enum pipe pipe, int
> > log_level);
> > +
> > +#endif
> > +
> > diff --git a/lib/meson.build b/lib/meson.build
> > index b21c252b..e3916096 100644
> > --- a/lib/meson.build
> > +++ b/lib/meson.build
> > @@ -12,6 +12,7 @@ lib_sources = [
> > 'i915/gem_mman.c',
> > 'i915/gem_vm.c',
> > 'i915/intel_decode.c',
> > + 'i915/intel_fbc.c',
> > 'i915/intel_memory_region.c',
> > 'i915/intel_mocs.c',
> > 'i915/intel_cmds_info.c',
> > diff --git a/tests/i915/kms_frontbuffer_tracking.c
> > b/tests/i915/kms_frontbuffer_tracking.c
> > index 650e14a7..f5da0f24 100644
> > --- a/tests/i915/kms_frontbuffer_tracking.c
> > +++ b/tests/i915/kms_frontbuffer_tracking.c
> > @@ -32,6 +32,7 @@
> >
> > #include "i915/gem.h"
> > #include "i915/gem_create.h"
> > +#include "i915/intel_fbc.h"
> > #include "igt.h"
> > #include "igt_sysfs.h"
> > #include "igt_psr.h"
> > @@ -775,27 +776,6 @@ static void __debugfs_read_connector(const
> > char *param, char *buf, int len)
> > #define debugfs_write_crtc(p, arr) __debugfs_write_crtc(p, arr,
> > sizeof(arr))
> > #define debugfs_read_connector(p, arr) __debugfs_read_connector(p,
> > arr, sizeof(arr))
> >
> > -static char last_fbc_buf[128];
> > -
> > -static bool fbc_is_enabled(int lvl)
> > -{
> > - char buf[128];
> > - bool print = true;
> > -
> > - debugfs_read_crtc("i915_fbc_status", buf);
> > - if (lvl != IGT_LOG_DEBUG)
> > - last_fbc_buf[0] = '\0';
> > - else if (strcmp(last_fbc_buf, buf))
> > - strcpy(last_fbc_buf, buf);
> > - else
> > - print = false;
> > -
> > - if (print)
> > - igt_log(IGT_LOG_DOMAIN, lvl,
> > "fbc_is_enabled()?\n%s", buf);
> > -
> > - return strstr(buf, "FBC enabled\n");
> > -}
> > -
> > static void drrs_set(unsigned int val)
> > {
> > char buf[2];
> > @@ -970,20 +950,11 @@ static bool fbc_mode_too_large(void)
> > return strstr(buf, "FBC disabled: mode too large for
> > compression\n");
> > }
> >
> > -static bool fbc_wait_until_enabled(void)
> > -{
> > - last_fbc_buf[0] = '\0';
> > -
> > - return igt_wait(fbc_is_enabled(IGT_LOG_DEBUG), 2000, 1);
> > -}
> > -
> > static bool drrs_wait_until_rr_switch_to_low(void)
> > {
> > return igt_wait(is_drrs_low(), 5000, 1);
> > }
> >
> > -#define fbc_enable() igt_set_module_param_int(drm.fd,
> > "enable_fbc", 1)
> > -#define fbc_disable() igt_set_module_param_int(drm.fd,
> > "enable_fbc", 0)
> > #define drrs_enable() drrs_set(1)
> > #define drrs_disable() drrs_set(0)
> >
> > @@ -1188,8 +1159,8 @@ static bool disable_features(const struct
> > test_mode *t)
> > if (t->feature == FEATURE_DEFAULT)
> > return false;
> >
> > - fbc_disable();
> > drrs_disable();
> > + intel_fbc_disable(drm.fd);
> > return psr.can_test ? psr_disable(drm.fd, drm.debugfs) :
> > false;
> > }
> >
> > @@ -1429,20 +1400,9 @@ static void teardown_crcs(void)
> > igt_pipe_crc_free(pipe_crc);
> > }
> >
> > -static bool fbc_supported_on_chipset(void)
> > -{
> > - char buf[128];
> > -
> > - debugfs_read_crtc("i915_fbc_status", buf);
> > - if (*buf == '\0')
> > - return false;
> > -
> > - return !strstr(buf, "FBC unsupported on this chipset\n");
> > -}
> > -
> > static void setup_fbc(void)
> > {
> > - if (!fbc_supported_on_chipset()) {
> > + if (!intel_fbc_supported_on_chipset(drm.fd,
> > prim_mode_params.pipe)) {
> > igt_info("Can't test FBC: not supported on this
> > chipset\n");
> > return;
> > }
> > @@ -1649,15 +1609,18 @@ static void do_status_assertions(int flags)
> > igt_require(!fbc_not_enough_stolen());
> > igt_require(!fbc_stride_not_supported());
> > igt_require(!fbc_mode_too_large());
> > - if (!fbc_wait_until_enabled()) {
> > - igt_assert_f(fbc_is_enabled(IGT_LOG_WARN),
> > + if (!intel_fbc_wait_until_enabled(drm.fd,
> > prim_mode_params.pipe)) {
> > + igt_assert_f(intel_fbc_is_enabled(drm.fd,
> > +
> > prim_mode_params.pipe,
> > + IGT_LOG_WARN),
> > "FBC disabled\n");
> > }
> >
> > if (opt.fbc_check_compression)
> > igt_assert(fbc_wait_for_compression());
> > } else if (flags & ASSERT_FBC_DISABLED) {
> > - igt_assert(!fbc_wait_until_enabled());
> > + igt_assert(!intel_fbc_wait_until_enabled(drm.fd,
> > +
> > prim_mode_params.pipe));
> > }
> >
> > if (flags & ASSERT_PSR_ENABLED)
> > @@ -1797,7 +1760,7 @@ static bool enable_features_for_test(const
> > struct test_mode *t)
> > return false;
> >
> > if (t->feature & FEATURE_FBC)
> > - fbc_enable();
> > + intel_fbc_enable(drm.fd);
> > if (t->feature & FEATURE_PSR)
> > ret = psr_enable(drm.fd, drm.debugfs, PSR_MODE_1);
> > if (t->feature & FEATURE_DRRS)
> > --
> > 2.34.1
> >
^ permalink raw reply [flat|nested] 7+ messages in thread
* [igt-dev] [PATCH i-g-t v3 2/3] tests/i915/kms_frontbuffer_tracking: Split drrs into library
2023-04-21 8:52 [igt-dev] [PATCH i-g-t v3 0/3] Testcases for dirtyfb ioctl Jouni Högander
2023-04-21 8:52 ` [igt-dev] [PATCH i-g-t v3 1/3] tests/i915/kms_frontbuffer_tracking: Split fbc into library Jouni Högander
@ 2023-04-21 8:52 ` Jouni Högander
2023-04-21 8:52 ` [igt-dev] [PATCH i-g-t v3 3/3] tests/kms_dirtyfb: Add new test for dirtyfb ioctl Jouni Högander
2023-04-21 10:52 ` [igt-dev] ✗ Fi.CI.BAT: failure for Testcases for dirtyfb ioctl (rev4) Patchwork
3 siblings, 0 replies; 7+ messages in thread
From: Jouni Högander @ 2023-04-21 8:52 UTC (permalink / raw)
To: igt-dev
Split drrs handling into library to be used by other testcases as well.
v2: Moved into libigt instead of static kms_drrs_helper
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
lib/i915/intel_drrs.c | 83 +++++++++++++++++++++++++++
lib/i915/intel_drrs.h | 17 ++++++
lib/meson.build | 1 +
tests/i915/kms_frontbuffer_tracking.c | 83 +++------------------------
4 files changed, 108 insertions(+), 76 deletions(-)
create mode 100644 lib/i915/intel_drrs.c
create mode 100644 lib/i915/intel_drrs.h
diff --git a/lib/i915/intel_drrs.c b/lib/i915/intel_drrs.c
new file mode 100644
index 00000000..75ed7fdc
--- /dev/null
+++ b/lib/i915/intel_drrs.c
@@ -0,0 +1,83 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#include <fcntl.h>
+
+#include "igt.h"
+#include "igt_sysfs.h"
+
+#include "intel_drrs.h"
+
+bool intel_is_drrs_supported(int device, enum pipe pipe)
+{
+ char buf[256];
+ int dir;
+
+ dir = igt_debugfs_pipe_dir(device, pipe, O_DIRECTORY);
+ igt_require_fd(dir);
+ igt_debugfs_simple_read(dir, "i915_drrs_status", buf, sizeof(buf));
+ close(dir);
+ if (*buf == '\0')
+ return false;
+
+ return !strcasestr(buf, "DRRS enabled:");
+}
+
+bool intel_output_has_drrs(int device, igt_output_t *output)
+{
+ char buf[256];
+ int dir;
+
+ dir = igt_debugfs_connector_dir(device, output->name, O_DIRECTORY);
+ igt_require_fd(dir);
+ igt_debugfs_simple_read(dir, "i915_drrs_type", buf, sizeof(buf));
+ close(dir);
+
+ return strstr(buf, "seamless");
+}
+
+static void drrs_set(int device, enum pipe pipe, unsigned int val)
+{
+ char buf[2];
+ int dir, ret;
+
+ igt_debug("Manually %sabling DRRS. %u\n", val ? "en" : "dis", val);
+ snprintf(buf, sizeof(buf), "%d", val);
+
+ dir = igt_debugfs_pipe_dir(device, pipe, O_DIRECTORY);
+ igt_require_fd(dir);
+ ret = igt_sysfs_write(dir, "i915_drrs_ctl", buf, sizeof(buf) - 1);
+
+ /*
+ * drrs_enable() is called on DRRS capable platform only,
+ * whereas drrs_disable() is called on all platforms.
+ * So handle the failure of debugfs_write only for drrs_enable().
+ */
+ if (val)
+ igt_assert_f(ret == (sizeof(buf) - 1), "debugfs_write failed");
+}
+
+void intel_drrs_enable(int device, enum pipe pipe)
+{
+ drrs_set(device, pipe, 1);
+}
+
+void intel_drrs_disable(int device, enum pipe pipe)
+{
+ drrs_set(device, pipe, 0);
+}
+
+bool intel_is_drrs_inactive(int device, enum pipe pipe)
+{
+ char buf[256];
+ int dir;
+
+ dir = igt_debugfs_pipe_dir(device, pipe, O_DIRECTORY);
+ igt_require_fd(dir);
+ igt_debugfs_simple_read(dir, "i915_drrs_status", buf, sizeof(buf));
+ close(dir);
+
+ return strstr(buf, "DRRS active: no");
+}
diff --git a/lib/i915/intel_drrs.h b/lib/i915/intel_drrs.h
new file mode 100644
index 00000000..d4d27a5f
--- /dev/null
+++ b/lib/i915/intel_drrs.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2022 Intel Corporation
+ */
+
+#ifndef INTEL_DRRS_H
+#define INTEL_DRRS_H
+
+#include "igt.h"
+
+bool intel_is_drrs_supported(int device, enum pipe pipe);
+bool intel_output_has_drrs(int device, igt_output_t *output);
+void intel_drrs_enable(int device, enum pipe pipe);
+void intel_drrs_disable(int device, enum pipe pipe);
+bool intel_is_drrs_inactive(int device, enum pipe pipe);
+
+#endif
diff --git a/lib/meson.build b/lib/meson.build
index e3916096..64abc76b 100644
--- a/lib/meson.build
+++ b/lib/meson.build
@@ -12,6 +12,7 @@ lib_sources = [
'i915/gem_mman.c',
'i915/gem_vm.c',
'i915/intel_decode.c',
+ 'i915/intel_drrs.c',
'i915/intel_fbc.c',
'i915/intel_memory_region.c',
'i915/intel_mocs.c',
diff --git a/tests/i915/kms_frontbuffer_tracking.c b/tests/i915/kms_frontbuffer_tracking.c
index f5da0f24..4669e0d4 100644
--- a/tests/i915/kms_frontbuffer_tracking.c
+++ b/tests/i915/kms_frontbuffer_tracking.c
@@ -32,6 +32,7 @@
#include "i915/gem.h"
#include "i915/gem_create.h"
+#include "i915/intel_drrs.h"
#include "i915/intel_fbc.h"
#include "igt.h"
#include "igt_sysfs.h"
@@ -746,54 +747,10 @@ static void __debugfs_read_crtc(const char *param, char *buf, int len)
close(dir);
}
-static int __debugfs_write_crtc(const char *param, const char *buf, int len)
-{
- int dir, ret;
- enum pipe pipe;
-
- pipe = prim_mode_params.pipe;
- dir = igt_debugfs_pipe_dir(drm.fd, pipe, O_DIRECTORY);
- igt_require_fd(dir);
- ret = igt_sysfs_write(dir, param, buf, len - 1);
- close(dir);
-
- return ret;
-}
-
-static void __debugfs_read_connector(const char *param, char *buf, int len)
-{
- int dir;
- igt_output_t *output;
-
- output = prim_mode_params.output;
- dir = igt_debugfs_connector_dir(drm.fd, output->name, O_DIRECTORY);
- igt_require_fd(dir);
- igt_debugfs_simple_read(dir, param, buf, len);
- close(dir);
-}
-
#define debugfs_read_crtc(p, arr) __debugfs_read_crtc(p, arr, sizeof(arr))
#define debugfs_write_crtc(p, arr) __debugfs_write_crtc(p, arr, sizeof(arr))
#define debugfs_read_connector(p, arr) __debugfs_read_connector(p, arr, sizeof(arr))
-static void drrs_set(unsigned int val)
-{
- char buf[2];
- int ret;
-
- igt_debug("Manually %sabling DRRS. %u\n", val ? "en" : "dis", val);
- snprintf(buf, sizeof(buf), "%d", val);
- ret = debugfs_write_crtc("i915_drrs_ctl", buf);
-
- /*
- * drrs_enable() is called on DRRS capable platform only,
- * whereas drrs_disable() is called on all platforms.
- * So handle the failure of debugfs_write only for drrs_enable().
- */
- if (val)
- igt_assert_f(ret == (sizeof(buf) - 1), "debugfs_write failed");
-}
-
static bool is_drrs_high(void)
{
char buf[MAX_DRRS_STATUS_BUF_LEN];
@@ -810,22 +767,6 @@ static bool is_drrs_low(void)
return strstr(buf, "DRRS refresh rate: low");
}
-static bool is_drrs_supported(void)
-{
- char buf[MAX_DRRS_STATUS_BUF_LEN];
-
- debugfs_read_crtc("i915_drrs_status", buf);
- return strcasestr(buf, "DRRS enabled:");
-}
-
-static bool is_drrs_inactive(void)
-{
- char buf[MAX_DRRS_STATUS_BUF_LEN];
-
- debugfs_read_crtc("i915_drrs_status", buf);
- return strstr(buf, "DRRS active: no");
-}
-
static void drrs_print_status(void)
{
char buf[MAX_DRRS_STATUS_BUF_LEN];
@@ -834,14 +775,6 @@ static void drrs_print_status(void)
igt_info("DRRS STATUS :\n%s\n", buf);
}
-static bool output_has_drrs(void)
-{
- char buf[MAX_DRRS_STATUS_BUF_LEN];
-
- debugfs_read_connector("i915_drrs_type", buf);
- return strstr(buf, "seamless");
-}
-
static struct timespec fbc_get_last_action(void)
{
struct timespec ret = { 0, 0 };
@@ -955,9 +888,6 @@ static bool drrs_wait_until_rr_switch_to_low(void)
return igt_wait(is_drrs_low(), 5000, 1);
}
-#define drrs_enable() drrs_set(1)
-#define drrs_disable() drrs_set(0)
-
static struct rect pat1_get_rect(struct fb_region *fb, int r)
{
struct rect rect;
@@ -1159,8 +1089,9 @@ static bool disable_features(const struct test_mode *t)
if (t->feature == FEATURE_DEFAULT)
return false;
- drrs_disable();
intel_fbc_disable(drm.fd);
+ intel_drrs_disable(drm.fd, prim_mode_params.pipe);
+
return psr.can_test ? psr_disable(drm.fd, drm.debugfs) : false;
}
@@ -1437,12 +1368,12 @@ static void teardown_psr(void)
static void setup_drrs(void)
{
- if (!output_has_drrs()) {
+ if (!intel_output_has_drrs(drm.fd, prim_mode_params.output)) {
igt_info("Can't test DRRS: no usable screen.\n");
return;
}
- if (!is_drrs_supported()) {
+ if (!intel_is_drrs_supported(drm.fd, prim_mode_params.pipe)) {
igt_info("Can't test DRRS: Not supported.\n");
return;
}
@@ -1599,7 +1530,7 @@ static void do_status_assertions(int flags)
igt_assert_f(false, "DRRS LOW\n");
}
} else if (flags & ASSERT_DRRS_INACTIVE) {
- if (!is_drrs_inactive()) {
+ if (!intel_is_drrs_inactive(drm.fd, prim_mode_params.pipe)) {
drrs_print_status();
igt_assert_f(false, "DRRS INACTIVE\n");
}
@@ -1764,7 +1695,7 @@ static bool enable_features_for_test(const struct test_mode *t)
if (t->feature & FEATURE_PSR)
ret = psr_enable(drm.fd, drm.debugfs, PSR_MODE_1);
if (t->feature & FEATURE_DRRS)
- drrs_enable();
+ intel_drrs_enable(drm.fd, prim_mode_params.pipe);
return ret;
}
--
2.34.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* [igt-dev] [PATCH i-g-t v3 3/3] tests/kms_dirtyfb: Add new test for dirtyfb ioctl
2023-04-21 8:52 [igt-dev] [PATCH i-g-t v3 0/3] Testcases for dirtyfb ioctl Jouni Högander
2023-04-21 8:52 ` [igt-dev] [PATCH i-g-t v3 1/3] tests/i915/kms_frontbuffer_tracking: Split fbc into library Jouni Högander
2023-04-21 8:52 ` [igt-dev] [PATCH i-g-t v3 2/3] tests/i915/kms_frontbuffer_tracking: Split drrs " Jouni Högander
@ 2023-04-21 8:52 ` Jouni Högander
2023-04-21 10:52 ` [igt-dev] ✗ Fi.CI.BAT: failure for Testcases for dirtyfb ioctl (rev4) Patchwork
3 siblings, 0 replies; 7+ messages in thread
From: Jouni Högander @ 2023-04-21 8:52 UTC (permalink / raw)
To: igt-dev
Add new test to validate dirtyfb ioctl is working properly with GPU
frontbuffer rendering.
Create big framebuffer and use only lower right corner for the
plane. Initiate GPU drawing for a rectangle over the whole
framebuffer and perform dirtyfb ioctl. Then wait for the drawing to
complete and collect crc and check that it matches with expected.
v3:
- Use spinner
- Drop allocating big frambuffers
v2:
- Change license comment
- Move disable_features and do not apply for FEATURE_DEFAULT
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
tests/i915/kms_dirtyfb.c | 291 +++++++++++++++++++++++++++++++++++++++
tests/meson.build | 1 +
2 files changed, 292 insertions(+)
create mode 100644 tests/i915/kms_dirtyfb.c
diff --git a/tests/i915/kms_dirtyfb.c b/tests/i915/kms_dirtyfb.c
new file mode 100644
index 00000000..d56d6989
--- /dev/null
+++ b/tests/i915/kms_dirtyfb.c
@@ -0,0 +1,291 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#include <sys/types.h>
+
+#include "igt.h"
+#include "igt_psr.h"
+
+#include "i915/intel_drrs.h"
+#include "i915/intel_fbc.h"
+
+IGT_TEST_DESCRIPTION("Test the DIRTYFB ioctl is working properly with "
+ "its related features: FBC, PSR and DRRS");
+
+#ifndef PAGE_ALIGN
+#ifndef PAGE_SIZE
+#define PAGE_SIZE 4096
+#endif
+#define PAGE_ALIGN(x) ALIGN(x, PAGE_SIZE)
+#endif
+
+typedef struct {
+ int drm_fd;
+ int debugfs_fd;
+ igt_display_t display;
+ drmModeModeInfo *mode;
+ igt_output_t *output;
+ igt_pipe_crc_t *pipe_crc;
+ enum pipe pipe;
+
+ struct igt_fb fbs[3];
+
+ igt_crc_t ref_crc;
+
+ struct buf_ops *bops;
+ enum {
+ FEATURE_NONE = 0,
+ FEATURE_PSR = 1,
+ FEATURE_FBC = 2,
+ FEATURE_DRRS = 4,
+ FEATURE_COUNT = 8,
+ FEATURE_DEFAULT = 8,
+ } feature;
+} data_t;
+
+static const char *feature_str(int feature)
+{
+ switch (feature) {
+ case FEATURE_NONE:
+ return "nop";
+ case FEATURE_FBC:
+ return "fbc";
+ case FEATURE_PSR:
+ return "psr";
+ case FEATURE_DRRS:
+ return "drrs";
+ case FEATURE_DEFAULT:
+ return "default";
+ default:
+ igt_assert(false);
+ }
+}
+
+static bool check_support(data_t *data)
+{
+ switch (data->feature) {
+ case FEATURE_NONE:
+ return true;
+ case FEATURE_FBC:
+ return intel_fbc_supported_on_chipset(data->drm_fd, data->pipe);
+ case FEATURE_PSR:
+ return psr_sink_support(data->drm_fd, data->debugfs_fd,
+ PSR_MODE_1);
+ case FEATURE_DRRS:
+ return intel_is_drrs_supported(data->drm_fd, data->pipe) &&
+ intel_output_has_drrs(data->drm_fd, data->output);
+ case FEATURE_DEFAULT:
+ return true;
+ default:
+ igt_assert(false);
+ }
+}
+
+static void enable_feature(data_t *data)
+{
+ switch (data->feature) {
+ case FEATURE_NONE:
+ break;
+ case FEATURE_FBC:
+ intel_fbc_enable(data->drm_fd);
+ break;
+ case FEATURE_PSR:
+ psr_enable(data->drm_fd, data->debugfs_fd, PSR_MODE_1);
+ break;
+ case FEATURE_DRRS:
+ intel_drrs_enable(data->drm_fd, data->pipe);
+ break;
+ case FEATURE_DEFAULT:
+ break;
+ default:
+ igt_assert(false);
+ }
+}
+
+static void check_feature(data_t *data)
+{
+ switch (data->feature) {
+ case FEATURE_NONE:
+ break;
+ case FEATURE_FBC:
+ igt_assert_f(intel_fbc_wait_until_enabled(data->drm_fd,
+ data->pipe),
+ "FBC still disabled");
+ break;
+ case FEATURE_PSR:
+ igt_assert_f(psr_wait_entry(data->debugfs_fd, PSR_MODE_1),
+ "PSR still disabled\n");
+ break;
+ case FEATURE_DRRS:
+ igt_assert_f(intel_is_drrs_inactive(data->drm_fd, data->pipe),
+ "DRRS INACTIVE\n");
+ break;
+ case FEATURE_DEFAULT:
+ break;
+ default:
+ igt_assert(false);
+ }
+}
+
+static void disable_features(data_t *data)
+{
+ intel_fbc_disable(data->drm_fd);
+ psr_disable(data->drm_fd, data->debugfs_fd);
+ intel_drrs_disable(data->drm_fd, data->pipe);
+}
+
+static void prepare(data_t *data)
+{
+ igt_plane_t *primary;
+
+ igt_skip_on(!check_support(data));
+
+ data->mode = igt_output_get_mode(data->output);
+
+ igt_output_set_pipe(data->output, data->pipe);
+
+ data->pipe_crc = igt_pipe_crc_new(data->drm_fd, data->pipe,
+ IGT_PIPE_CRC_SOURCE_AUTO);
+
+ igt_create_color_fb(data->drm_fd, data->mode->hdisplay,
+ data->mode->vdisplay, DRM_FORMAT_XRGB8888,
+ DRM_FORMAT_MOD_LINEAR, 0.0, 1.0, 0.0,
+ &data->fbs[0]);
+ igt_draw_rect_fb(data->drm_fd, data->bops, 0, &data->fbs[0],
+ IGT_DRAW_MMAP_CPU, 0, 0, data->fbs[0].width,
+ data->fbs[0].height, 0xFF);
+
+ primary = igt_output_get_plane_type(data->output,
+ DRM_PLANE_TYPE_PRIMARY);
+
+ igt_plane_set_fb(primary, &data->fbs[0]);
+
+ if (data->feature != FEATURE_DEFAULT)
+ disable_features(data);
+
+ igt_display_commit2(&data->display, COMMIT_ATOMIC);
+
+ igt_pipe_crc_collect_crc(data->pipe_crc, &data->ref_crc);
+
+ igt_create_color_fb(data->drm_fd, data->mode->hdisplay,
+ data->mode->vdisplay, DRM_FORMAT_XRGB8888,
+ DRM_FORMAT_MOD_LINEAR, 0.0, 1.0, 0.0,
+ &data->fbs[1]);
+ igt_draw_rect_fb(data->drm_fd, data->bops, 0, &data->fbs[1],
+ IGT_DRAW_MMAP_CPU, 0, 0, data->fbs[1].width,
+ data->fbs[1].height, 0xFF);
+
+ igt_create_color_fb(data->drm_fd, data->mode->hdisplay,
+ data->mode->vdisplay, DRM_FORMAT_XRGB8888,
+ DRM_FORMAT_MOD_LINEAR, 0.0, 1.0, 0.0,
+ &data->fbs[2]);
+
+ igt_plane_set_fb(primary, &data->fbs[2]);
+
+ enable_feature(data);
+
+ igt_display_commit2(&data->display, COMMIT_ATOMIC);
+
+ check_feature(data);
+}
+
+static void cleanup(data_t *data)
+{
+ igt_remove_fb(data->drm_fd, &data->fbs[0]);
+ igt_remove_fb(data->drm_fd, &data->fbs[1]);
+ igt_remove_fb(data->drm_fd, &data->fbs[2]);
+
+ igt_pipe_crc_free(data->pipe_crc);
+
+ igt_output_set_pipe(data->output, PIPE_NONE);
+
+ igt_display_commit2(&data->display, COMMIT_ATOMIC);
+}
+
+static void run_test(data_t *data)
+{
+ igt_crc_t crc;
+ struct intel_buf *src, *dst;
+ struct intel_bb *ibb;
+ igt_spin_t *spin;
+ uint64_t ahnd = 0;
+ uint32_t devid = intel_get_drm_devid(data->drm_fd);
+ igt_render_copyfunc_t rendercopy = igt_get_render_copyfunc(devid);
+ int r;
+
+ igt_skip_on(!rendercopy);
+
+ src = intel_buf_create_using_handle(data->bops, data->fbs[1].gem_handle,
+ data->fbs[1].width,
+ data->fbs[1].height,
+ igt_drm_format_to_bpp(data->fbs[1].drm_format),
+ 0, igt_fb_mod_to_tiling(data->fbs[1].modifier), 0);
+ dst = intel_buf_create_using_handle(data->bops, data->fbs[2].gem_handle,
+ data->fbs[2].width,
+ data->fbs[2].height,
+ igt_drm_format_to_bpp(data->fbs[2].drm_format),
+ 0, igt_fb_mod_to_tiling(data->fbs[2].modifier), 0);
+ ibb = intel_bb_create_with_context(data->drm_fd, 0, NULL, PAGE_SIZE);
+
+ spin = igt_spin_new(data->drm_fd, .ahnd = ahnd);
+ igt_spin_set_timeout(spin, NSEC_PER_SEC);
+
+ rendercopy(ibb, src, 0, 0, data->fbs[2].width, data->fbs[2].height, dst, 0, 0);
+
+ /* Perfom dirtyfb right after initiating rendercopy */
+ r = drmModeDirtyFB(data->drm_fd, data->fbs[2].fb_id, NULL, 0);
+ igt_assert(r == 0 || r == -ENOSYS);
+
+ /* Ensure rendercopy is complete */
+ intel_bb_sync(ibb);
+
+ igt_pipe_crc_collect_crc(data->pipe_crc, &crc);
+ igt_assert_crc_equal(&crc, &data->ref_crc);
+
+ igt_spin_free(data->drm_fd, spin);
+ intel_bb_destroy(ibb);
+ intel_buf_destroy(src);
+ intel_buf_destroy(dst);
+}
+
+igt_main
+{
+ data_t data = {};
+
+ igt_fixture {
+ data.drm_fd = drm_open_driver_master(DRIVER_INTEL);
+ data.debugfs_fd = igt_debugfs_dir(data.drm_fd);
+ kmstest_set_vt_graphics_mode();
+
+ igt_display_require(&data.display, data.drm_fd);
+
+ data.bops = buf_ops_create(data.drm_fd);
+
+ igt_display_reset(&data.display);
+ }
+
+ igt_describe("Test dirtyFB ioctl");
+ igt_subtest_with_dynamic("dirtyfb-ioctl") {
+ data.pipe = PIPE_A;
+ for_each_valid_output_on_pipe(&data.display, data.pipe,
+ data.output) {
+ for (data.feature = FEATURE_DEFAULT; data.feature > 0;
+ data.feature = data.feature >> 1) {
+ igt_dynamic_f("%s-%s", feature_str(data.feature),
+ igt_output_name(data.output)) {
+ prepare(&data);
+ run_test(&data);
+ cleanup(&data);
+ }
+ }
+ }
+ }
+
+ igt_fixture {
+ buf_ops_destroy(data.bops);
+ igt_display_fini(&data.display);
+ close(data.drm_fd);
+ }
+}
diff --git a/tests/meson.build b/tests/meson.build
index 9072cfad..1a467e7d 100644
--- a/tests/meson.build
+++ b/tests/meson.build
@@ -222,6 +222,7 @@ i915_progs = [
'kms_busy',
'kms_ccs',
'kms_cdclk',
+ 'kms_dirtyfb',
'kms_draw_crc',
'kms_fbcon_fbt',
'kms_fence_pin_leak',
--
2.34.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* [igt-dev] ✗ Fi.CI.BAT: failure for Testcases for dirtyfb ioctl (rev4)
2023-04-21 8:52 [igt-dev] [PATCH i-g-t v3 0/3] Testcases for dirtyfb ioctl Jouni Högander
` (2 preceding siblings ...)
2023-04-21 8:52 ` [igt-dev] [PATCH i-g-t v3 3/3] tests/kms_dirtyfb: Add new test for dirtyfb ioctl Jouni Högander
@ 2023-04-21 10:52 ` Patchwork
3 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2023-04-21 10:52 UTC (permalink / raw)
To: Jouni Högander; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 5480 bytes --]
== Series Details ==
Series: Testcases for dirtyfb ioctl (rev4)
URL : https://patchwork.freedesktop.org/series/116130/
State : failure
== Summary ==
CI Bug Log - changes from IGT_7264 -> IGTPW_8838
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with IGTPW_8838 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_8838, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8838/index.html
Participating hosts (37 -> 35)
------------------------------
Missing (2): bat-mtlp-8 fi-snb-2520m
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_8838:
### IGT changes ###
#### Possible regressions ####
* igt@gem_exec_suspend@basic-s0@lmem0:
- bat-atsm-1: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7264/bat-atsm-1/igt@gem_exec_suspend@basic-s0@lmem0.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8838/bat-atsm-1/igt@gem_exec_suspend@basic-s0@lmem0.html
Known issues
------------
Here are the changes found in IGTPW_8838 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_suspend@basic-s0@smem:
- fi-rkl-11600: [PASS][3] -> [FAIL][4] ([fdo#103375])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7264/fi-rkl-11600/igt@gem_exec_suspend@basic-s0@smem.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8838/fi-rkl-11600/igt@gem_exec_suspend@basic-s0@smem.html
* igt@gem_exec_suspend@basic-s3@smem:
- bat-rpls-1: [PASS][5] -> [ABORT][6] ([i915#6687] / [i915#7978])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7264/bat-rpls-1/igt@gem_exec_suspend@basic-s3@smem.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8838/bat-rpls-1/igt@gem_exec_suspend@basic-s3@smem.html
* igt@i915_selftest@live@slpc:
- bat-adln-1: NOTRUN -> [DMESG-FAIL][7] ([i915#6997])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8838/bat-adln-1/igt@i915_selftest@live@slpc.html
* igt@kms_chamelium_hpd@common-hpd-after-suspend:
- fi-bsw-nick: NOTRUN -> [SKIP][8] ([fdo#109271]) +1 similar issue
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8838/fi-bsw-nick/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
- bat-adln-1: NOTRUN -> [SKIP][9] ([i915#7828])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8838/bat-adln-1/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-1:
- bat-dg2-8: [PASS][10] -> [FAIL][11] ([i915#7932])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7264/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-1.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8838/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-1.html
#### Possible fixes ####
* igt@i915_selftest@live@execlists:
- fi-bsw-nick: [ABORT][12] ([i915#7913]) -> [PASS][13]
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7264/fi-bsw-nick/igt@i915_selftest@live@execlists.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8838/fi-bsw-nick/igt@i915_selftest@live@execlists.html
* igt@i915_selftest@live@gt_lrc:
- bat-adln-1: [INCOMPLETE][14] ([i915#4983] / [i915#7609]) -> [PASS][15]
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7264/bat-adln-1/igt@i915_selftest@live@gt_lrc.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8838/bat-adln-1/igt@i915_selftest@live@gt_lrc.html
* igt@i915_selftest@live@reset:
- bat-rpls-1: [DMESG-WARN][16] ([i915#7794]) -> [PASS][17]
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7264/bat-rpls-1/igt@i915_selftest@live@reset.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8838/bat-rpls-1/igt@i915_selftest@live@reset.html
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#6687]: https://gitlab.freedesktop.org/drm/intel/issues/6687
[i915#6997]: https://gitlab.freedesktop.org/drm/intel/issues/6997
[i915#7609]: https://gitlab.freedesktop.org/drm/intel/issues/7609
[i915#7794]: https://gitlab.freedesktop.org/drm/intel/issues/7794
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
[i915#7932]: https://gitlab.freedesktop.org/drm/intel/issues/7932
[i915#7978]: https://gitlab.freedesktop.org/drm/intel/issues/7978
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_7264 -> IGTPW_8838
CI-20190529: 20190529
CI_DRM_13039: 13aec8c5451c1c81d81b6b8ef1b29da9f29a7396 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_8838: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8838/index.html
IGT_7264: 2f0a07378e58e5c7d7b589b39ace7e3a2317f6b2 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Testlist changes
----------------
+igt@kms_dirtyfb@dirtyfb-ioctl
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8838/index.html
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^ permalink raw reply [flat|nested] 7+ messages in thread