[igt-dev] [PATCH] tests/xe: Prepare for widening drm_xe_sync.handle to 64-bits.

[igt-dev] [PATCH] tests/xe: Prepare for widening drm_xe_sync.handle to 64-bits.

[Maarten Lankhorst]

By not using a pointer to drm_xe_sync.handle, but taking the value, it
becomes safer when we change the word size to 64-bits. This is required
to make drm_xe_sync.handle safe on big-endian, and to explicitly set
the high 32-bits to 0.

I've chosen to create the wait functions with a 1 prefix, instead of
single, because a lot of code is in the form:

syncobj_wait(drm_fd, &sync.handle, 1, timeout, 0, NULL);
and it simply becomes:
syncobj_wait1(drm_fd, sync.handle, timeout, 0, NULL);
which is a lot easier for people to use than to add a _single prefix:
syncobj_wait_single(drm_fd, sync.handle, timeout, NULL);

It's more typing, so people are more likely to use the function when
absolutely necessary.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
 lib/igt_syncobj.c           | 21 ++++++++++
 lib/igt_syncobj.h           |  6 +++
 lib/intel_batchbuffer.c     |  2 +-
 lib/xe/xe_compute.c         |  4 +-
 lib/xe/xe_ioctl.c           |  4 +-
 tests/xe/xe_dma_buf_sync.c  |  7 ++--
 tests/xe/xe_evict.c         |  4 +-
 tests/xe/xe_exec_balancer.c |  8 ++--
 tests/xe/xe_exec_basic.c    |  6 +--
 tests/xe/xe_exec_reset.c    | 19 +++++----
 tests/xe/xe_exec_threads.c  | 20 ++++-----
 tests/xe/xe_guc_pc.c        |  4 +-
 tests/xe/xe_huc_copy.c      |  4 +-
 tests/xe/xe_pm.c            |  8 ++--
 tests/xe/xe_vm.c            | 81 +++++++++++++++++--------------------
 15 files changed, 106 insertions(+), 92 deletions(-)

diff --git a/lib/igt_syncobj.c b/lib/igt_syncobj.c
index a24ed10b7..19d74aa9f 100644
--- a/lib/igt_syncobj.c
+++ b/lib/igt_syncobj.c
@@ -209,6 +209,13 @@ syncobj_wait_err(int fd, uint32_t *handles, uint32_t count,
 	return __syncobj_wait(fd, &wait);
 }
 
+int
+syncobj_wait1_err(int fd, uint32_t handle,
+                 uint64_t abs_timeout_nsec, uint32_t flags)
+{
+	return syncobj_wait_err(fd, &handle, 1, abs_timeout_nsec, flags);
+}
+
 /**
  * syncobj_wait:
  * @fd: The DRM file descriptor
@@ -248,6 +255,14 @@ syncobj_wait(int fd, uint32_t *handles, uint32_t count,
 	return true;
 }
 
+bool
+syncobj_wait1(int fd, uint32_t handle,
+	     uint64_t abs_timeout_nsec, uint32_t flags,
+	     uint32_t *first_signaled)
+{
+	return syncobj_wait(fd, &handle, 1, abs_timeout_nsec, flags, first_signaled);
+}
+
 static int
 __syncobj_reset(int fd, uint32_t *handles, uint32_t count)
 {
@@ -278,6 +293,12 @@ syncobj_reset(int fd, uint32_t *handles, uint32_t count)
 	igt_assert_eq(__syncobj_reset(fd, handles, count), 0);
 }
 
+void
+syncobj_reset1(int fd, uint32_t handle)
+{
+	syncobj_reset(fd, &handle, 1);
+}
+
 static int
 __syncobj_signal(int fd, uint32_t *handles, uint32_t count)
 {
diff --git a/lib/igt_syncobj.h b/lib/igt_syncobj.h
index e6725671d..a4f4ee700 100644
--- a/lib/igt_syncobj.h
+++ b/lib/igt_syncobj.h
@@ -38,9 +38,14 @@ void syncobj_import_sync_file(int fd, uint32_t handle, int sync_file);
 int __syncobj_wait(int fd, struct drm_syncobj_wait *args);
 int syncobj_wait_err(int fd, uint32_t *handles, uint32_t count,
 		     uint64_t abs_timeout_nsec, uint32_t flags);
+int syncobj_wait1_err(int fd, uint32_t handle,
+		      uint64_t abs_timeout_nsec, uint32_t flags);
 bool syncobj_wait(int fd, uint32_t *handles, uint32_t count,
 		  uint64_t abs_timeout_nsec, uint32_t flags,
 		  uint32_t *first_signaled);
+bool syncobj_wait1(int fd, __u32 handle,
+		   uint64_t abs_timeout_nsec, uint32_t flags,
+		   uint32_t *first_signaled);
 int __syncobj_timeline_wait_ioctl(int fd,
 				  struct drm_syncobj_timeline_wait *args);
 bool syncobj_timeline_wait(int fd, uint32_t *handles, uint64_t *points,
@@ -51,6 +56,7 @@ int syncobj_timeline_wait_err(int fd, uint32_t *handles, uint64_t *points,
 			      unsigned num_handles,
 			      int64_t timeout_nsec, unsigned flags);
 void syncobj_reset(int fd, uint32_t *handles, uint32_t count);
+void syncobj_reset1(int fd, uint32_t handle);
 void syncobj_signal(int fd, uint32_t *handles, uint32_t count);
 void syncobj_timeline_query(int fd, uint32_t *handles, uint64_t *points,
 			    uint32_t count);
diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
index 545d17054..aa1e99eaa 100644
--- a/lib/intel_batchbuffer.c
+++ b/lib/intel_batchbuffer.c
@@ -1316,7 +1316,7 @@ static void __unbind_xe_objects(struct intel_bb *ibb)
 		xe_vm_unbind_async(ibb->fd, ibb->vm_id, 0, 0,
 				   ibb->batch_offset, ibb->size, syncs, 2);
 	}
-	ret = syncobj_wait_err(ibb->fd, &syncs[1].handle, 1, INT64_MAX, 0);
+	ret = syncobj_wait1_err(ibb->fd, syncs[1].handle, INT64_MAX, 0);
 	igt_assert_eq(ret, 0);
 	syncobj_destroy(ibb->fd, syncs[1].handle);
 
diff --git a/lib/xe/xe_compute.c b/lib/xe/xe_compute.c
index 2a3686a1b..19e0308ab 100644
--- a/lib/xe/xe_compute.c
+++ b/lib/xe/xe_compute.c
@@ -414,7 +414,7 @@ static void tgl_compute_exec(int fd, const unsigned char *kernel,
 	for (int i = 0; i < TGL_BO_DICT_ENTRIES; i++) {
 		bo_dict[i].data = aligned_alloc(xe_get_default_alignment(fd), bo_dict[i].size);
 		xe_vm_bind_userptr_async(fd, vm, 0, to_user_pointer(bo_dict[i].data), bo_dict[i].addr, bo_dict[i].size, &sync, 1);
-		syncobj_wait(fd, &sync.handle, 1, INT64_MAX, 0, NULL);
+		syncobj_wait1(fd, sync.handle, INT64_MAX, 0, NULL);
 		memset(bo_dict[i].data, 0, bo_dict[i].size);
 	}
 	memcpy(bo_dict[0].data, kernel, size);
@@ -436,7 +436,7 @@ static void tgl_compute_exec(int fd, const unsigned char *kernel,
 
 	for (int i = 0; i < TGL_BO_DICT_ENTRIES; i++) {
 		xe_vm_unbind_async(fd, vm, 0, 0, bo_dict[i].addr, bo_dict[i].size, &sync, 1);
-		syncobj_wait(fd, &sync.handle, 1, INT64_MAX, 0, NULL);
+		syncobj_wait1(fd, sync.handle, INT64_MAX, 0, NULL);
 		free(bo_dict[i].data);
 	}
 
diff --git a/lib/xe/xe_ioctl.c b/lib/xe/xe_ioctl.c
index 66a8393fe..30d3272c0 100644
--- a/lib/xe/xe_ioctl.c
+++ b/lib/xe/xe_ioctl.c
@@ -207,7 +207,7 @@ static void __xe_vm_bind_sync(int fd, uint32_t vm, uint32_t bo, uint64_t offset,
 	__xe_vm_bind_assert(fd, vm, 0, bo, offset, addr, size, op, &sync, 1, 0,
 			    0);
 
-	igt_assert(syncobj_wait(fd, &sync.handle, 1, INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, sync.handle, INT64_MAX, 0, NULL));
 	syncobj_destroy(fd, sync.handle);
 }
 
@@ -396,7 +396,7 @@ void xe_exec_wait(int fd, uint32_t engine, uint64_t addr)
 
 	xe_exec_sync(fd, engine, addr, &sync, 1);
 
-	igt_assert(syncobj_wait(fd, &sync.handle, 1, INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, sync.handle, INT64_MAX, 0, NULL));
 	syncobj_destroy(fd, sync.handle);
 }
 
diff --git a/tests/xe/xe_dma_buf_sync.c b/tests/xe/xe_dma_buf_sync.c
index 8920b141b..43ef0f76f 100644
--- a/tests/xe/xe_dma_buf_sync.c
+++ b/tests/xe/xe_dma_buf_sync.c
@@ -195,14 +195,13 @@ test_export_dma_buf(struct drm_xe_engine_class_instance *hwe0,
 
 		/* Verify exec blocked on spinner / prime BO */
 		usleep(5000);
-		igt_assert(!syncobj_wait(fd[1], &sync[1].handle, 1, 1, 0,
-					 NULL));
+		igt_assert(!syncobj_wait1(fd[1], sync[1].handle, 1, 0, NULL));
 		igt_assert_eq(data[i]->data, 0x0);
 
 		/* End spinner and verify exec complete */
 		xe_spin_end(&data[i]->spin);
-		igt_assert(syncobj_wait(fd[1], &sync[1].handle, 1, INT64_MAX,
-					0, NULL));
+		igt_assert(syncobj_wait1(fd[1], sync[1].handle, INT64_MAX, 0,
+					 NULL));
 		igt_assert_eq(data[i]->data, 0xc0ffee);
 
 		/* Clean up */
diff --git a/tests/xe/xe_evict.c b/tests/xe/xe_evict.c
index 5687cce30..b93b45d48 100644
--- a/tests/xe/xe_evict.c
+++ b/tests/xe/xe_evict.c
@@ -124,7 +124,7 @@ test_evict(int fd, struct drm_xe_engine_class_instance *eci,
 				xe_vm_bind_async(fd, vm3, bind_engines[2], __bo,
 						 0, addr,
 						 bo_size, sync, 1);
-				igt_assert(syncobj_wait(fd, &sync[0].handle, 1,
+				igt_assert(syncobj_wait1(fd, sync[0].handle,
 							INT64_MAX, 0, NULL));
 				xe_vm_bind_async(fd, i & 1 ? vm2 : vm,
 						 i & 1 ? bind_engines[1] :
@@ -168,7 +168,7 @@ test_evict(int fd, struct drm_xe_engine_class_instance *eci,
 	for (i = 0; i < n_engines; i++)
 		igt_assert(syncobj_wait(fd, &syncobjs[i], 1, INT64_MAX, 0,
 					NULL));
-	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
 
 	for (i = 0; i < n_execs; i++) {
 		uint32_t __bo;
diff --git a/tests/xe/xe_exec_balancer.c b/tests/xe/xe_exec_balancer.c
index 2018c8104..0a8eeb998 100644
--- a/tests/xe/xe_exec_balancer.c
+++ b/tests/xe/xe_exec_balancer.c
@@ -110,11 +110,11 @@ static void test_all_active(int fd, int gt, int class)
 		igt_assert(syncobj_wait(fd, &syncobjs[i], 1, INT64_MAX, 0,
 					NULL));
 	}
-	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
 
 	sync[0].flags |= DRM_XE_SYNC_SIGNAL;
 	xe_vm_unbind_async(fd, vm, 0, 0, addr, bo_size, sync, 1);
-	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
 
 	syncobj_destroy(fd, sync[0].handle);
 	for (i = 0; i < num_placements; i++) {
@@ -332,11 +332,11 @@ test_exec(int fd, int gt, int class, int n_engines, int n_execs,
 	for (i = 0; i < n_engines && n_execs; i++)
 		igt_assert(syncobj_wait(fd, &syncobjs[i], 1, INT64_MAX, 0,
 					NULL));
-	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
 
 	sync[0].flags |= DRM_XE_SYNC_SIGNAL;
 	xe_vm_unbind_async(fd, vm, 0, 0, addr, bo_size, sync, 1);
-	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
 
 	for (i = (flags & INVALIDATE && n_execs) ? n_execs - 1 : 0;
 	     i < n_execs; i++)
diff --git a/tests/xe/xe_exec_basic.c b/tests/xe/xe_exec_basic.c
index 2a176a5b3..8747c790c 100644
--- a/tests/xe/xe_exec_basic.c
+++ b/tests/xe/xe_exec_basic.c
@@ -254,11 +254,11 @@ test_exec(int fd, struct drm_xe_engine_class_instance *eci,
 
 	sync[0].flags |= DRM_XE_SYNC_SIGNAL;
 	for (i = 0; i < n_vm; ++i) {
-		syncobj_reset(fd, &sync[0].handle, 1);
+		syncobj_reset1(fd, sync[0].handle);
 		xe_vm_unbind_async(fd, vm[i], bind_engines[i], 0, addr[i],
 				   bo_size, sync, 1);
-		igt_assert(syncobj_wait(fd, &sync[0].handle, 1,
-					INT64_MAX, 0, NULL));
+		igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0,
+					 NULL));
 	}
 
 	for (i = (flags & INVALIDATE && n_execs) ? n_execs - 1 : 0;
diff --git a/tests/xe/xe_exec_reset.c b/tests/xe/xe_exec_reset.c
index 0d72a3f20..087ad4503 100644
--- a/tests/xe/xe_exec_reset.c
+++ b/tests/xe/xe_exec_reset.c
@@ -72,15 +72,15 @@ static void test_spin(int fd, struct drm_xe_engine_class_instance *eci)
 
 	xe_spin_wait_started(spin);
 	usleep(50000);
-	igt_assert(!syncobj_wait(fd, &syncobj, 1, 1, 0, NULL));
+	igt_assert(!syncobj_wait1(fd, syncobj, 1, 0, NULL));
 	xe_spin_end(spin);
 
-	igt_assert(syncobj_wait(fd, &syncobj, 1, INT64_MAX, 0, NULL));
-	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, syncobj, INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
 
 	sync[0].flags |= DRM_XE_SYNC_SIGNAL;
 	xe_vm_unbind_async(fd, vm, 0, 0, addr, bo_size, sync, 1);
-	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
 
 	syncobj_destroy(fd, sync[0].handle);
 	syncobj_destroy(fd, syncobj);
@@ -301,13 +301,12 @@ test_balancer(int fd, int gt, int class, int n_engines, int n_execs,
 	}
 
 	for (i = 0; i < n_engines && n_execs; i++)
-		igt_assert(syncobj_wait(fd, &syncobjs[i], 1, INT64_MAX, 0,
-					NULL));
-	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
+		igt_assert(syncobj_wait1(fd, syncobjs[i], INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
 
 	sync[0].flags |= DRM_XE_SYNC_SIGNAL;
 	xe_vm_unbind_async(fd, vm, 0, 0, addr, bo_size, sync, 1);
-	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
 
 	for (i = bad_batches; i < n_execs; i++)
 		igt_assert_eq(data[i].data, 0xc0ffee);
@@ -484,11 +483,11 @@ test_legacy_mode(int fd, struct drm_xe_engine_class_instance *eci,
 	for (i = 0; i < n_engines && n_execs; i++)
 		igt_assert(syncobj_wait(fd, &syncobjs[i], 1, INT64_MAX, 0,
 					NULL));
-	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
 
 	sync[0].flags |= DRM_XE_SYNC_SIGNAL;
 	xe_vm_unbind_async(fd, vm, 0, 0, addr, bo_size, sync, 1);
-	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
 
 	for (i = 1; i < n_execs; i++)
 		igt_assert_eq(data[i].data, 0xc0ffee);
diff --git a/tests/xe/xe_exec_threads.c b/tests/xe/xe_exec_threads.c
index 3f2c2de9e..ec88b412c 100644
--- a/tests/xe/xe_exec_threads.c
+++ b/tests/xe/xe_exec_threads.c
@@ -194,8 +194,7 @@ test_balancer(int fd, int gt, uint32_t vm, uint64_t addr, uint64_t userptr,
 				 * an invalidate.
 				 */
 				for (j = 0; j < n_engines; ++j)
-					igt_assert(syncobj_wait(fd,
-								&syncobjs[j], 1,
+					igt_assert(syncobj_wait1(fd, syncobjs[j],
 								INT64_MAX, 0,
 								NULL));
 				igt_assert_eq(data[i].data, 0xc0ffee);
@@ -217,13 +216,12 @@ test_balancer(int fd, int gt, uint32_t vm, uint64_t addr, uint64_t userptr,
 	}
 
 	for (i = 0; i < n_engines; i++)
-		igt_assert(syncobj_wait(fd, &syncobjs[i], 1, INT64_MAX, 0,
-					NULL));
-	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
+		igt_assert(syncobj_wait1(fd, syncobjs[i], INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
 
 	sync[0].flags |= DRM_XE_SYNC_SIGNAL;
 	xe_vm_unbind_async(fd, vm, 0, 0, addr, bo_size, sync, 1);
-	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
 
 	for (i = (flags & INVALIDATE && n_execs) ? n_execs - 1 : 0;
 	     i < n_execs; i++)
@@ -637,8 +635,7 @@ test_legacy_mode(int fd, uint32_t vm, uint64_t addr, uint64_t userptr,
 				 * an invalidate.
 				 */
 				for (j = 0; j < n_engines; ++j)
-					igt_assert(syncobj_wait(fd,
-								&syncobjs[j], 1,
+					igt_assert(syncobj_wait1(fd, syncobjs[j],
 								INT64_MAX, 0,
 								NULL));
 				if (!(flags & HANG && e == hang_engine))
@@ -661,14 +658,13 @@ test_legacy_mode(int fd, uint32_t vm, uint64_t addr, uint64_t userptr,
 	}
 
 	for (i = 0; i < n_engines; i++)
-		igt_assert(syncobj_wait(fd, &syncobjs[i], 1, INT64_MAX, 0,
-					NULL));
-	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
+		igt_assert(syncobj_wait1(fd, syncobjs[i], INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
 
 	sync[0].flags |= DRM_XE_SYNC_SIGNAL;
 	xe_vm_unbind_async(fd, vm, bind_engines[0], 0, addr,
 			   bo_size, sync, 1);
-	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
 
 	for (i = flags & INVALIDATE ? n_execs - 1 : 0;
 	     i < n_execs; i++) {
diff --git a/tests/xe/xe_guc_pc.c b/tests/xe/xe_guc_pc.c
index 5c71ae147..d97fc9914 100644
--- a/tests/xe/xe_guc_pc.c
+++ b/tests/xe/xe_guc_pc.c
@@ -110,12 +110,12 @@ static void exec_basic(int fd, struct drm_xe_engine_class_instance *eci,
 		igt_assert_eq(data[i].data, 0xc0ffee);
 	}
 
-	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
 
 	sync[0].flags |= DRM_XE_SYNC_SIGNAL;
 	xe_vm_unbind_async(fd, vm, bind_engines[0], 0, addr,
 			   bo_size, sync, 1);
-	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
 
 	for (i = 0; i < n_execs; i++)
 		igt_assert_eq(data[i].data, 0xc0ffee);
diff --git a/tests/xe/xe_huc_copy.c b/tests/xe/xe_huc_copy.c
index fdac907d6..d4fc74397 100644
--- a/tests/xe/xe_huc_copy.c
+++ b/tests/xe/xe_huc_copy.c
@@ -126,7 +126,7 @@ test_huc_copy(int fd)
 	for(int i = 0; i < BO_DICT_ENTRIES; i++) {
 		bo_dict[i].data = aligned_alloc(xe_get_default_alignment(fd), bo_dict[i].size);
 		xe_vm_bind_userptr_async(fd, vm, 0, to_user_pointer(bo_dict[i].data), bo_dict[i].addr, bo_dict[i].size, &sync, 1);
-		syncobj_wait(fd, &sync.handle, 1, INT64_MAX, 0, NULL);
+		syncobj_wait1(fd, sync.handle, INT64_MAX, 0, NULL);
 		memset(bo_dict[i].data, 0, bo_dict[i].size);
 	}
 	dinput = (char *)bo_dict[0].data;
@@ -143,7 +143,7 @@ test_huc_copy(int fd)
 
 	for(int i = 0; i < BO_DICT_ENTRIES; i++) {
 		xe_vm_unbind_async(fd, vm, 0, 0, bo_dict[i].addr, bo_dict[i].size, &sync, 1);
-		syncobj_wait(fd, &sync.handle, 1, INT64_MAX, 0, NULL);
+		syncobj_wait1(fd, sync.handle, INT64_MAX, 0, NULL);
 		free(bo_dict[i].data);
 	}
 
diff --git a/tests/xe/xe_pm.c b/tests/xe/xe_pm.c
index 44154143c..a31aa3033 100644
--- a/tests/xe/xe_pm.c
+++ b/tests/xe/xe_pm.c
@@ -303,8 +303,8 @@ test_exec(device_t device, struct drm_xe_engine_class_instance *eci,
 						      SUSPEND_TEST_NONE);
 	}
 
-	igt_assert(syncobj_wait(device.fd_xe, &sync[0].handle, 1, INT64_MAX, 0,
-				NULL));
+	igt_assert(syncobj_wait1(device.fd_xe, sync[0].handle, INT64_MAX, 0,
+				 NULL));
 
 	if (check_rpm && runtime_usage_available(device.pci_xe))
 		rpm_usage = igt_pm_get_runtime_usage(device.pci_xe);
@@ -312,8 +312,8 @@ test_exec(device_t device, struct drm_xe_engine_class_instance *eci,
 	sync[0].flags |= DRM_XE_SYNC_SIGNAL;
 	xe_vm_unbind_async(device.fd_xe, vm, bind_engines[0], 0, addr,
 			   bo_size, sync, 1);
-	igt_assert(syncobj_wait(device.fd_xe, &sync[0].handle, 1, INT64_MAX, 0,
-NULL));
+	igt_assert(syncobj_wait1(device.fd_xe, sync[0].handle, INT64_MAX, 0,
+				 NULL));
 
 	for (i = 0; i < n_execs; i++)
 		igt_assert_eq(data[i].data, 0xc0ffee);
diff --git a/tests/xe/xe_vm.c b/tests/xe/xe_vm.c
index d4cec104e..d25d37ac2 100644
--- a/tests/xe/xe_vm.c
+++ b/tests/xe/xe_vm.c
@@ -285,7 +285,7 @@ static void unbind_all(int fd, int n_vmas)
 	sync[0].handle = syncobj_create(fd, 0);
 	xe_vm_unbind_all_async(fd, vm, 0, bo, sync, 1);
 
-	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
 	syncobj_destroy(fd, sync[0].handle);
 
 	gem_close(fd, bo);
@@ -489,8 +489,7 @@ static void vm_async_ops_err(int fd, bool destroy)
 	}
 
 	for (i = 0; i < N_BINDS; i++)
-		igt_assert(syncobj_wait(fd, &syncobjs[i], 1, INT64_MAX, 0,
-					NULL));
+		igt_assert(syncobj_wait1(fd, syncobjs[i], INT64_MAX, 0, NULL));
 
 	if (!destroy)
 		xe_vm_destroy(fd, vm);
@@ -603,14 +602,12 @@ shared_pte_page(int fd, struct drm_xe_engine_class_instance *eci, int n_bo,
 		sync_all[n_execs].handle = sync[0].handle;
 		xe_vm_unbind_async(fd, vm, 0, 0, addr + i * addr_stride,
 				   bo_size, sync_all, n_execs + 1);
-		igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0,
-					NULL));
+		igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
 	}
 
 	for (i = 0; i < n_execs; i++)
-		igt_assert(syncobj_wait(fd, &syncobjs[i], 1, INT64_MAX, 0,
-					NULL));
-	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
+		igt_assert(syncobj_wait1(fd, syncobjs[i], INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
 
 	for (i = 0; i < n_execs; i++)
 		igt_assert_eq(data[i]->data, 0xc0ffee);
@@ -641,7 +638,7 @@ shared_pte_page(int fd, struct drm_xe_engine_class_instance *eci, int n_bo,
 
 		exec.engine_id = engines[e];
 		exec.address = batch_addr;
-		syncobj_reset(fd, &syncobjs[e], 1);
+		syncobj_reset1(fd, syncobjs[e]);
 		xe_exec(fd, &exec);
 	}
 
@@ -653,17 +650,15 @@ shared_pte_page(int fd, struct drm_xe_engine_class_instance *eci, int n_bo,
 		sync_all[n_execs].handle = sync[0].handle;
 		xe_vm_unbind_async(fd, vm, 0, 0, addr + i * addr_stride,
 				   bo_size, sync_all, n_execs + 1);
-		igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0,
-					NULL));
+		igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
 	}
 
 	for (i = 0; i < n_execs; i++) {
 		if (!(i % 2))
 			continue;
-		igt_assert(syncobj_wait(fd, &syncobjs[i], 1, INT64_MAX, 0,
-					NULL));
+		igt_assert(syncobj_wait1(fd, syncobjs[i], INT64_MAX, 0, NULL));
 	}
-	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
 
 	for (i = 0; i < n_execs; i++)
 		igt_assert_eq(data[i]->data, 0xc0ffee);
@@ -794,19 +789,18 @@ test_bind_engines_independent(int fd, struct drm_xe_engine_class_instance *eci)
 	}
 
 	/* Verify initial bind, bind + write to 2nd engine done */
-	igt_assert(syncobj_wait(fd, &syncobjs[1], 1, INT64_MAX, 0, NULL));
-	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, syncobjs[1], INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
 	igt_assert_eq(data[1].data, 0xc0ffee);
 
 	/* Verify bind + write to 1st engine still inflight */
-	igt_assert(!syncobj_wait(fd, &syncobjs[0], 1, 1, 0, NULL));
-	igt_assert(!syncobj_wait(fd, &syncobjs[N_ENGINES], 1, 1, 0, NULL));
+	igt_assert(!syncobj_wait1(fd, syncobjs[0], 1, 0, NULL));
+	igt_assert(!syncobj_wait1(fd, syncobjs[N_ENGINES], 1, 0, NULL));
 
 	/* Verify bind + write to 1st engine done after ending spinner */
 	xe_spin_end(&data[0].spin);
-	igt_assert(syncobj_wait(fd, &syncobjs[0], 1, INT64_MAX, 0, NULL));
-	igt_assert(syncobj_wait(fd, &syncobjs[N_ENGINES], 1, INT64_MAX, 0,
-				NULL));
+	igt_assert(syncobj_wait1(fd, syncobjs[0], INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, syncobjs[N_ENGINES], INT64_MAX, 0, NULL));
 	igt_assert_eq(data[0].data, 0xc0ffee);
 
 	syncobj_destroy(fd, sync[0].handle);
@@ -938,13 +932,13 @@ test_bind_array(int fd, struct drm_xe_engine_class_instance *eci, int n_execs,
 		bind_ops[i].op = XE_VM_BIND_OP_UNMAP | XE_VM_BIND_FLAG_ASYNC;
 	}
 
-	syncobj_reset(fd, &sync[0].handle, 1);
+	syncobj_reset1(fd, sync[0].handle);
 	sync[0].flags |= DRM_XE_SYNC_SIGNAL;
 	sync[1].flags &= ~DRM_XE_SYNC_SIGNAL;
 	xe_vm_bind_array(fd, vm, bind_engine, bind_ops, n_execs, sync, 2);
 
-	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
-	igt_assert(syncobj_wait(fd, &sync[1].handle, 1, INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, sync[1].handle, INT64_MAX, 0, NULL));
 
 	for (i = 0; i < n_execs; i++)
 		igt_assert_eq(data[i].data, 0xc0ffee);
@@ -1108,7 +1102,7 @@ test_large_binds(int fd, struct drm_xe_engine_class_instance *eci,
 		sync[1].handle = syncobjs[e];
 
 		if (i != e)
-			syncobj_reset(fd, &sync[1].handle, 1);
+			syncobj_reset1(fd, sync[1].handle);
 
 		exec.engine_id = engines[e];
 		exec.address = batch_addr;
@@ -1121,11 +1115,10 @@ test_large_binds(int fd, struct drm_xe_engine_class_instance *eci,
 	}
 
 	for (i = 0; i < n_engines; i++)
-		igt_assert(syncobj_wait(fd, &syncobjs[i], 1, INT64_MAX, 0,
-					NULL));
-	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
+		igt_assert(syncobj_wait1(fd, syncobjs[i], INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
 
-	syncobj_reset(fd, &sync[0].handle, 1);
+	syncobj_reset1(fd, sync[0].handle);
 	sync[0].flags |= DRM_XE_SYNC_SIGNAL;
 	if (flags & LARGE_BIND_FLAG_SPLIT) {
 		xe_vm_unbind_async(fd, vm, 0, 0, base_addr,
@@ -1136,7 +1129,7 @@ test_large_binds(int fd, struct drm_xe_engine_class_instance *eci,
 		xe_vm_unbind_async(fd, vm, 0, 0, base_addr, bo_size,
 				   sync, 1);
 	}
-	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
 
 	addr = base_addr;
 	for (i = 0; i < n_execs; i++) {
@@ -1220,9 +1213,9 @@ static void *hammer_thread(void *tdata)
 		} else {
 			exec.num_syncs = 1;
 			xe_exec(t->fd, &exec);
-			igt_assert(syncobj_wait(t->fd, &sync[0].handle, 1,
-						INT64_MAX, 0, NULL));
-			syncobj_reset(t->fd, &sync[0].handle, 1);
+			igt_assert(syncobj_wait1(t->fd, sync[0].handle,
+						 INT64_MAX, 0, NULL));
+			syncobj_reset1(t->fd, sync[0].handle);
 		}
 		++i;
 	}
@@ -1393,7 +1386,7 @@ test_munmap_style_unbind(int fd, struct drm_xe_engine_class_instance *eci,
 
 		sync[0].flags &= ~DRM_XE_SYNC_SIGNAL;
 		if (i)
-			syncobj_reset(fd, &sync[1].handle, 1);
+			syncobj_reset1(fd, sync[1].handle);
 		sync[1].flags |= DRM_XE_SYNC_SIGNAL;
 
 		exec.engine_id = engine;
@@ -1405,15 +1398,15 @@ test_munmap_style_unbind(int fd, struct drm_xe_engine_class_instance *eci,
 	addr = base_addr;
 
 	/* Unbind some of the pages */
-	syncobj_reset(fd, &sync[0].handle, 1);
+	syncobj_reset1(fd, sync[0].handle);
 	sync[0].flags |= DRM_XE_SYNC_SIGNAL;
 	sync[1].flags &= ~DRM_XE_SYNC_SIGNAL;
 	xe_vm_unbind_async(fd, vm, 0, 0,
 			   addr + unbind_n_page_offfset * page_size,
 			   unbind_n_pages * page_size, sync, 2);
 
-	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
-	igt_assert(syncobj_wait(fd, &sync[1].handle, 1, INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, sync[1].handle, INT64_MAX, 0, NULL));
 
 	/* Verify all pages written */
 	for (i = 0; i < n_binds; ++i) {
@@ -1449,7 +1442,7 @@ try_again_after_invalidate:
 			igt_assert(b <= ARRAY_SIZE(data[i].batch));
 
 			sync[0].flags &= ~DRM_XE_SYNC_SIGNAL;
-			syncobj_reset(fd, &sync[1].handle, 1);
+			syncobj_reset1(fd, sync[1].handle);
 			sync[1].flags |= DRM_XE_SYNC_SIGNAL;
 
 			exec.engine_id = engine;
@@ -1459,8 +1452,8 @@ try_again_after_invalidate:
 	}
 	addr = base_addr;
 
-	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
-	igt_assert(syncobj_wait(fd, &sync[1].handle, 1, INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, sync[1].handle, INT64_MAX, 0, NULL));
 
 	/* Verify all pages still bound written */
 	for (i = 0; i < n_binds; ++i) {
@@ -1490,7 +1483,7 @@ try_again_after_invalidate:
 	}
 
 	/* Confirm unbound region can be rebound */
-	syncobj_reset(fd, &sync[0].handle, 1);
+	syncobj_reset1(fd, sync[0].handle);
 	sync[0].flags |= DRM_XE_SYNC_SIGNAL;
 	if (flags & MUNMAP_FLAG_USERPTR)
 		xe_vm_bind_userptr_async(fd, vm, 0,
@@ -1520,7 +1513,7 @@ try_again_after_invalidate:
 		igt_assert(b <= ARRAY_SIZE(data[i].batch));
 
 		sync[0].flags &= ~DRM_XE_SYNC_SIGNAL;
-		syncobj_reset(fd, &sync[1].handle, 1);
+		syncobj_reset1(fd, sync[1].handle);
 		sync[1].flags |= DRM_XE_SYNC_SIGNAL;
 
 		exec.engine_id = engine;
@@ -1531,8 +1524,8 @@ try_again_after_invalidate:
 	}
 	addr = base_addr;
 
-	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
-	igt_assert(syncobj_wait(fd, &sync[1].handle, 1, INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
+	igt_assert(syncobj_wait1(fd, sync[1].handle, INT64_MAX, 0, NULL));
 
 	/* Verify all pages written */
 	for (i = 0; i < n_binds; ++i) {
-- 
2.37.2

[igt-dev] ✓ Fi.CI.BAT: success for tests/xe: Prepare for widening drm_xe_sync.handle to 64-bits.

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 6805 bytes --]

== Series Details ==

Series: tests/xe: Prepare for widening drm_xe_sync.handle to 64-bits.
URL   : https://patchwork.freedesktop.org/series/117386/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13112 -> IGTPW_8923
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/index.html

Participating hosts (40 -> 39)
------------------------------

  Additional (1): bat-mtlp-6 
  Missing    (2): fi-kbl-soraka fi-snb-2520m 

Known issues
------------

  Here are the changes found in IGTPW_8923 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live@gt_heartbeat:
    - fi-cfl-8109u:       [PASS][1] -> [DMESG-FAIL][2] ([i915#5334])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13112/fi-cfl-8109u/igt@i915_selftest@live@gt_heartbeat.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/fi-cfl-8109u/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@slpc:
    - bat-rpls-1:         [PASS][3] -> [DMESG-WARN][4] ([i915#6367])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13112/bat-rpls-1/igt@i915_selftest@live@slpc.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/bat-rpls-1/igt@i915_selftest@live@slpc.html

  * igt@i915_suspend@basic-s3-without-i915:
    - bat-atsm-1:         NOTRUN -> [SKIP][5] ([i915#6645])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/bat-atsm-1/igt@i915_suspend@basic-s3-without-i915.html
    - bat-rpls-2:         [PASS][6] -> [ABORT][7] ([i915#6687] / [i915#7978])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13112/bat-rpls-2/igt@i915_suspend@basic-s3-without-i915.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/bat-rpls-2/igt@i915_suspend@basic-s3-without-i915.html

  * igt@kms_chamelium_hpd@common-hpd-after-suspend:
    - bat-atsm-1:         NOTRUN -> [SKIP][8] ([i915#6078])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/bat-atsm-1/igt@kms_chamelium_hpd@common-hpd-after-suspend.html

  * igt@kms_pipe_crc_basic@suspend-read-crc:
    - bat-atsm-1:         NOTRUN -> [SKIP][9] ([i915#1836])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/bat-atsm-1/igt@kms_pipe_crc_basic@suspend-read-crc.html

  
#### Possible fixes ####

  * igt@gem_exec_fence@basic-await@bcs0:
    - bat-rplp-1:         [FAIL][10] -> [PASS][11]
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13112/bat-rplp-1/igt@gem_exec_fence@basic-await@bcs0.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/bat-rplp-1/igt@gem_exec_fence@basic-await@bcs0.html

  * igt@i915_selftest@live@gt_heartbeat:
    - fi-kbl-guc:         [DMESG-FAIL][12] ([i915#5334] / [i915#7872]) -> [PASS][13]
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13112/fi-kbl-guc/igt@i915_selftest@live@gt_heartbeat.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/fi-kbl-guc/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@hangcheck:
    - fi-hsw-4770:        [DMESG-WARN][14] -> [PASS][15]
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13112/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html

  * igt@i915_selftest@live@slpc:
    - bat-rpls-2:         [DMESG-WARN][16] ([i915#6367]) -> [PASS][17]
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13112/bat-rpls-2/igt@i915_selftest@live@slpc.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/bat-rpls-2/igt@i915_selftest@live@slpc.html
    - {bat-mtlp-8}:       [DMESG-WARN][18] ([i915#6367]) -> [PASS][19]
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13112/bat-mtlp-8/igt@i915_selftest@live@slpc.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/bat-mtlp-8/igt@i915_selftest@live@slpc.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1836]: https://gitlab.freedesktop.org/drm/intel/issues/1836
  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
  [i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
  [i915#3595]: https://gitlab.freedesktop.org/drm/intel/issues/3595
  [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
  [i915#4342]: https://gitlab.freedesktop.org/drm/intel/issues/4342
  [i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
  [i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
  [i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274
  [i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
  [i915#6078]: https://gitlab.freedesktop.org/drm/intel/issues/6078
  [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
  [i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
  [i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645
  [i915#6687]: https://gitlab.freedesktop.org/drm/intel/issues/6687
  [i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456
  [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
  [i915#7872]: https://gitlab.freedesktop.org/drm/intel/issues/7872
  [i915#7920]: https://gitlab.freedesktop.org/drm/intel/issues/7920
  [i915#7978]: https://gitlab.freedesktop.org/drm/intel/issues/7978
  [i915#8368]: https://gitlab.freedesktop.org/drm/intel/issues/8368


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_7279 -> IGTPW_8923

  CI-20190529: 20190529
  CI_DRM_13112: 90ecd907cd4b9c1fe1275a9da536e79e10ca85ec @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_8923: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/index.html
  IGT_7279: 3c22c8491f753d513892c479e9f4ab2f1336d5bb @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/index.html

[-- Attachment #2: Type: text/html, Size: 6249 bytes --]

[igt-dev] ✓ Fi.CI.IGT: success for tests/xe: Prepare for widening drm_xe_sync.handle to 64-bits.

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 16406 bytes --]

== Series Details ==

Series: tests/xe: Prepare for widening drm_xe_sync.handle to 64-bits.
URL   : https://patchwork.freedesktop.org/series/117386/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13112_full -> IGTPW_8923_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/index.html

Participating hosts (7 -> 9)
------------------------------

  Additional (2): shard-rkl0 shard-tglu0 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_8923_full:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_pm_rps@reset:
    - {shard-tglu}:       [PASS][1] -> [ABORT][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13112/shard-tglu-3/igt@i915_pm_rps@reset.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/shard-tglu-3/igt@i915_pm_rps@reset.html

  * igt@kms_dsc@dsc-with-output-formats:
    - {shard-tglu}:       NOTRUN -> [SKIP][3]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/shard-tglu-9/igt@kms_dsc@dsc-with-output-formats.html

  
Known issues
------------

  Here are the changes found in IGTPW_8923_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_capture@capture-invisible@smem0:
    - shard-apl:          NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#6334])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/shard-apl2/igt@gem_exec_capture@capture-invisible@smem0.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-apl:          [PASS][5] -> [FAIL][6] ([i915#2842])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13112/shard-apl4/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/shard-apl3/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gem_lmem_swapping@heavy-verify-multi-ccs:
    - shard-apl:          NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#4613])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/shard-apl6/igt@gem_lmem_swapping@heavy-verify-multi-ccs.html

  * igt@i915_selftest@live@gt_heartbeat:
    - shard-apl:          [PASS][8] -> [DMESG-FAIL][9] ([i915#5334])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13112/shard-apl7/igt@i915_selftest@live@gt_heartbeat.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/shard-apl4/igt@i915_selftest@live@gt_heartbeat.html

  * igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc:
    - shard-apl:          NOTRUN -> [SKIP][10] ([fdo#109271] / [i915#3886]) +1 similar issue
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/shard-apl1/igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-b-random-ccs-data-4_tiled_dg2_rc_ccs:
    - shard-apl:          NOTRUN -> [SKIP][11] ([fdo#109271]) +29 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/shard-apl6/igt@kms_ccs@pipe-b-random-ccs-data-4_tiled_dg2_rc_ccs.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
    - shard-glk:          [PASS][12] -> [FAIL][13] ([i915#2346])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13112/shard-glk9/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/shard-glk4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html

  * igt@kms_flip@flip-vs-blocking-wf-vblank@a-hdmi-a2:
    - shard-glk:          [PASS][14] -> [FAIL][15] ([i915#2122])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13112/shard-glk9/igt@kms_flip@flip-vs-blocking-wf-vblank@a-hdmi-a2.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/shard-glk3/igt@kms_flip@flip-vs-blocking-wf-vblank@a-hdmi-a2.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling@pipe-b-vga-1:
    - shard-snb:          NOTRUN -> [SKIP][16] ([fdo#109271]) +100 similar issues
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/shard-snb5/igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling@pipe-b-vga-1.html

  * igt@kms_psr2_su@page_flip-nv12:
    - shard-apl:          NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#658])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/shard-apl6/igt@kms_psr2_su@page_flip-nv12.html

  * igt@kms_setmode@basic@pipe-a-hdmi-a-1:
    - shard-snb:          NOTRUN -> [FAIL][18] ([i915#5465]) +1 similar issue
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/shard-snb1/igt@kms_setmode@basic@pipe-a-hdmi-a-1.html

  
#### Possible fixes ####

  * igt@gem_barrier_race@remote-request@rcs0:
    - {shard-tglu}:       [ABORT][19] ([i915#8211] / [i915#8234]) -> [PASS][20]
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13112/shard-tglu-4/igt@gem_barrier_race@remote-request@rcs0.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/shard-tglu-6/igt@gem_barrier_race@remote-request@rcs0.html

  * igt@gem_ctx_freq@sysfs:
    - {shard-dg1}:        [FAIL][21] ([i915#6786]) -> [PASS][22]
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13112/shard-dg1-16/igt@gem_ctx_freq@sysfs.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/shard-dg1-14/igt@gem_ctx_freq@sysfs.html

  * igt@gem_eio@unwedge-stress:
    - {shard-dg1}:        [FAIL][23] ([i915#5784]) -> [PASS][24]
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13112/shard-dg1-13/igt@gem_eio@unwedge-stress.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/shard-dg1-14/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_fair@basic-none@bcs0:
    - {shard-rkl}:        [FAIL][25] ([i915#2842]) -> [PASS][26] +1 similar issue
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13112/shard-rkl-2/igt@gem_exec_fair@basic-none@bcs0.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/shard-rkl-7/igt@gem_exec_fair@basic-none@bcs0.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
    - shard-glk:          [FAIL][27] ([i915#2842]) -> [PASS][28]
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13112/shard-glk4/igt@gem_exec_fair@basic-pace-solo@rcs0.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/shard-glk4/igt@gem_exec_fair@basic-pace-solo@rcs0.html

  * igt@gen9_exec_parse@allowed-single:
    - shard-apl:          [ABORT][29] ([i915#5566]) -> [PASS][30]
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13112/shard-apl4/igt@gen9_exec_parse@allowed-single.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/shard-apl2/igt@gen9_exec_parse@allowed-single.html

  * igt@i915_pm_rc6_residency@rc6-idle@rcs0:
    - {shard-dg1}:        [FAIL][31] ([i915#3591]) -> [PASS][32]
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13112/shard-dg1-15/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/shard-dg1-17/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html

  * igt@i915_pm_rpm@dpms-non-lpsp:
    - {shard-rkl}:        [SKIP][33] ([i915#1397]) -> [PASS][34] +3 similar issues
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13112/shard-rkl-7/igt@i915_pm_rpm@dpms-non-lpsp.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/shard-rkl-6/igt@i915_pm_rpm@dpms-non-lpsp.html

  * igt@i915_pm_rps@engine-order:
    - shard-apl:          [FAIL][35] ([i915#6537]) -> [PASS][36]
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13112/shard-apl2/igt@i915_pm_rps@engine-order.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/shard-apl2/igt@i915_pm_rps@engine-order.html

  * igt@i915_selftest@live@sanitycheck:
    - shard-snb:          [ABORT][37] ([i915#4528]) -> [PASS][38]
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13112/shard-snb2/igt@i915_selftest@live@sanitycheck.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/shard-snb6/igt@i915_selftest@live@sanitycheck.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-glk:          [FAIL][39] ([i915#2346]) -> [PASS][40]
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13112/shard-glk7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/shard-glk5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
    - shard-apl:          [FAIL][41] ([i915#2346]) -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13112/shard-apl4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/shard-apl6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a1:
    - shard-glk:          [FAIL][43] ([i915#79]) -> [PASS][44]
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13112/shard-glk9/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a1.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/shard-glk8/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a1.html

  * igt@kms_hdr@bpc-switch-suspend@pipe-a-dp-1:
    - shard-apl:          [FAIL][45] ([i915#1188]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13112/shard-apl1/igt@kms_hdr@bpc-switch-suspend@pipe-a-dp-1.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/shard-apl1/igt@kms_hdr@bpc-switch-suspend@pipe-a-dp-1.html

  * igt@kms_plane@pixel-format-source-clamping@pipe-a-planes:
    - shard-glk:          [DMESG-FAIL][47] ([i915#118]) -> [PASS][48]
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13112/shard-glk2/igt@kms_plane@pixel-format-source-clamping@pipe-a-planes.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/shard-glk7/igt@kms_plane@pixel-format-source-clamping@pipe-a-planes.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
  [fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
  [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
  [fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
  [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
  [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
  [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
  [i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
  [i915#1257]: https://gitlab.freedesktop.org/drm/intel/issues/1257
  [i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
  [i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
  [i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
  [i915#2433]: https://gitlab.freedesktop.org/drm/intel/issues/2433
  [i915#2435]: https://gitlab.freedesktop.org/drm/intel/issues/2435
  [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
  [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
  [i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
  [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
  [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
  [i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
  [i915#3023]: https://gitlab.freedesktop.org/drm/intel/issues/3023
  [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
  [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
  [i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
  [i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
  [i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
  [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
  [i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734
  [i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742
  [i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
  [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
  [i915#3936]: https://gitlab.freedesktop.org/drm/intel/issues/3936
  [i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
  [i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
  [i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
  [i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
  [i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
  [i915#4885]: https://gitlab.freedesktop.org/drm/intel/issues/4885
  [i915#4958]: https://gitlab.freedesktop.org/drm/intel/issues/4958
  [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
  [i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
  [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
  [i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
  [i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
  [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
  [i915#5465]: https://gitlab.freedesktop.org/drm/intel/issues/5465
  [i915#5566]: https://gitlab.freedesktop.org/drm/intel/issues/5566
  [i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
  [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
  [i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
  [i915#6334]: https://gitlab.freedesktop.org/drm/intel/issues/6334
  [i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433
  [i915#6537]: https://gitlab.freedesktop.org/drm/intel/issues/6537
  [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
  [i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
  [i915#6786]: https://gitlab.freedesktop.org/drm/intel/issues/6786
  [i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
  [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
  [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
  [i915#8211]: https://gitlab.freedesktop.org/drm/intel/issues/8211
  [i915#8234]: https://gitlab.freedesktop.org/drm/intel/issues/8234
  [i915#8399]: https://gitlab.freedesktop.org/drm/intel/issues/8399
  [i915#8414]: https://gitlab.freedesktop.org/drm/intel/issues/8414


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_7279 -> IGTPW_8923
  * Piglit: piglit_4509 -> None

  CI-20190529: 20190529
  CI_DRM_13112: 90ecd907cd4b9c1fe1275a9da536e79e10ca85ec @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_8923: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/index.html
  IGT_7279: 3c22c8491f753d513892c479e9f4ab2f1336d5bb @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8923/index.html

[-- Attachment #2: Type: text/html, Size: 14253 bytes --]

Re: [igt-dev] [PATCH] tests/xe: Prepare for widening drm_xe_sync.handle to 64-bits.

[Zbigniew Kempczyński]

On Fri, May 05, 2023 at 03:41:57PM +0200, Maarten Lankhorst wrote:
> By not using a pointer to drm_xe_sync.handle, but taking the value, it
> becomes safer when we change the word size to 64-bits. This is required
> to make drm_xe_sync.handle safe on big-endian, and to explicitly set
> the high 32-bits to 0.

Ok, now it is clear to me why you want to introduce 1-handle helper.
In previous patch you've passed handle instead of &handle and that
was confusing.

> 
> I've chosen to create the wait functions with a 1 prefix, instead of
> single, because a lot of code is in the form:
> 
> syncobj_wait(drm_fd, &sync.handle, 1, timeout, 0, NULL);
> and it simply becomes:
> syncobj_wait1(drm_fd, sync.handle, timeout, 0, NULL);
> which is a lot easier for people to use than to add a _single prefix:
> syncobj_wait_single(drm_fd, sync.handle, timeout, NULL);

Ok, as there's common pattern for waiting for single syncobj _wait1()
suffix is acceptable.

> 
> It's more typing, so people are more likely to use the function when
> absolutely necessary.
> 
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> ---
>  lib/igt_syncobj.c           | 21 ++++++++++
>  lib/igt_syncobj.h           |  6 +++
>  lib/intel_batchbuffer.c     |  2 +-
>  lib/xe/xe_compute.c         |  4 +-
>  lib/xe/xe_ioctl.c           |  4 +-
>  tests/xe/xe_dma_buf_sync.c  |  7 ++--
>  tests/xe/xe_evict.c         |  4 +-
>  tests/xe/xe_exec_balancer.c |  8 ++--
>  tests/xe/xe_exec_basic.c    |  6 +--
>  tests/xe/xe_exec_reset.c    | 19 +++++----
>  tests/xe/xe_exec_threads.c  | 20 ++++-----
>  tests/xe/xe_guc_pc.c        |  4 +-
>  tests/xe/xe_huc_copy.c      |  4 +-
>  tests/xe/xe_pm.c            |  8 ++--
>  tests/xe/xe_vm.c            | 81 +++++++++++++++++--------------------
>  15 files changed, 106 insertions(+), 92 deletions(-)
> 
> diff --git a/lib/igt_syncobj.c b/lib/igt_syncobj.c
> index a24ed10b7..19d74aa9f 100644
> --- a/lib/igt_syncobj.c
> +++ b/lib/igt_syncobj.c
> @@ -209,6 +209,13 @@ syncobj_wait_err(int fd, uint32_t *handles, uint32_t count,
>  	return __syncobj_wait(fd, &wait);
>  }
>  
> +int
> +syncobj_wait1_err(int fd, uint32_t handle,
> +                 uint64_t abs_timeout_nsec, uint32_t flags)
> +{
> +	return syncobj_wait_err(fd, &handle, 1, abs_timeout_nsec, flags);
> +}

Function is public so add the documentation to it.

> +
>  /**
>   * syncobj_wait:
>   * @fd: The DRM file descriptor
> @@ -248,6 +255,14 @@ syncobj_wait(int fd, uint32_t *handles, uint32_t count,
>  	return true;
>  }
>  
> +bool
> +syncobj_wait1(int fd, uint32_t handle,
> +	     uint64_t abs_timeout_nsec, uint32_t flags,
> +	     uint32_t *first_signaled)
> +{
> +	return syncobj_wait(fd, &handle, 1, abs_timeout_nsec, flags, first_signaled);
> +}
> +

Same here.

>  static int
>  __syncobj_reset(int fd, uint32_t *handles, uint32_t count)
>  {
> @@ -278,6 +293,12 @@ syncobj_reset(int fd, uint32_t *handles, uint32_t count)
>  	igt_assert_eq(__syncobj_reset(fd, handles, count), 0);
>  }
>  
> +void
> +syncobj_reset1(int fd, uint32_t handle)
> +{
> +	syncobj_reset(fd, &handle, 1);
> +}
> +

And here.

With those three doc nits above fixed:

Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>

--
Zbigniew

>  static int
>  __syncobj_signal(int fd, uint32_t *handles, uint32_t count)
>  {
> diff --git a/lib/igt_syncobj.h b/lib/igt_syncobj.h
> index e6725671d..a4f4ee700 100644
> --- a/lib/igt_syncobj.h
> +++ b/lib/igt_syncobj.h
> @@ -38,9 +38,14 @@ void syncobj_import_sync_file(int fd, uint32_t handle, int sync_file);
>  int __syncobj_wait(int fd, struct drm_syncobj_wait *args);
>  int syncobj_wait_err(int fd, uint32_t *handles, uint32_t count,
>  		     uint64_t abs_timeout_nsec, uint32_t flags);
> +int syncobj_wait1_err(int fd, uint32_t handle,
> +		      uint64_t abs_timeout_nsec, uint32_t flags);
>  bool syncobj_wait(int fd, uint32_t *handles, uint32_t count,
>  		  uint64_t abs_timeout_nsec, uint32_t flags,
>  		  uint32_t *first_signaled);
> +bool syncobj_wait1(int fd, __u32 handle,
> +		   uint64_t abs_timeout_nsec, uint32_t flags,
> +		   uint32_t *first_signaled);
>  int __syncobj_timeline_wait_ioctl(int fd,
>  				  struct drm_syncobj_timeline_wait *args);
>  bool syncobj_timeline_wait(int fd, uint32_t *handles, uint64_t *points,
> @@ -51,6 +56,7 @@ int syncobj_timeline_wait_err(int fd, uint32_t *handles, uint64_t *points,
>  			      unsigned num_handles,
>  			      int64_t timeout_nsec, unsigned flags);
>  void syncobj_reset(int fd, uint32_t *handles, uint32_t count);
> +void syncobj_reset1(int fd, uint32_t handle);
>  void syncobj_signal(int fd, uint32_t *handles, uint32_t count);
>  void syncobj_timeline_query(int fd, uint32_t *handles, uint64_t *points,
>  			    uint32_t count);
> diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
> index 545d17054..aa1e99eaa 100644
> --- a/lib/intel_batchbuffer.c
> +++ b/lib/intel_batchbuffer.c
> @@ -1316,7 +1316,7 @@ static void __unbind_xe_objects(struct intel_bb *ibb)
>  		xe_vm_unbind_async(ibb->fd, ibb->vm_id, 0, 0,
>  				   ibb->batch_offset, ibb->size, syncs, 2);
>  	}
> -	ret = syncobj_wait_err(ibb->fd, &syncs[1].handle, 1, INT64_MAX, 0);
> +	ret = syncobj_wait1_err(ibb->fd, syncs[1].handle, INT64_MAX, 0);
>  	igt_assert_eq(ret, 0);
>  	syncobj_destroy(ibb->fd, syncs[1].handle);
>  
> diff --git a/lib/xe/xe_compute.c b/lib/xe/xe_compute.c
> index 2a3686a1b..19e0308ab 100644
> --- a/lib/xe/xe_compute.c
> +++ b/lib/xe/xe_compute.c
> @@ -414,7 +414,7 @@ static void tgl_compute_exec(int fd, const unsigned char *kernel,
>  	for (int i = 0; i < TGL_BO_DICT_ENTRIES; i++) {
>  		bo_dict[i].data = aligned_alloc(xe_get_default_alignment(fd), bo_dict[i].size);
>  		xe_vm_bind_userptr_async(fd, vm, 0, to_user_pointer(bo_dict[i].data), bo_dict[i].addr, bo_dict[i].size, &sync, 1);
> -		syncobj_wait(fd, &sync.handle, 1, INT64_MAX, 0, NULL);
> +		syncobj_wait1(fd, sync.handle, INT64_MAX, 0, NULL);
>  		memset(bo_dict[i].data, 0, bo_dict[i].size);
>  	}
>  	memcpy(bo_dict[0].data, kernel, size);
> @@ -436,7 +436,7 @@ static void tgl_compute_exec(int fd, const unsigned char *kernel,
>  
>  	for (int i = 0; i < TGL_BO_DICT_ENTRIES; i++) {
>  		xe_vm_unbind_async(fd, vm, 0, 0, bo_dict[i].addr, bo_dict[i].size, &sync, 1);
> -		syncobj_wait(fd, &sync.handle, 1, INT64_MAX, 0, NULL);
> +		syncobj_wait1(fd, sync.handle, INT64_MAX, 0, NULL);
>  		free(bo_dict[i].data);
>  	}
>  
> diff --git a/lib/xe/xe_ioctl.c b/lib/xe/xe_ioctl.c
> index 66a8393fe..30d3272c0 100644
> --- a/lib/xe/xe_ioctl.c
> +++ b/lib/xe/xe_ioctl.c
> @@ -207,7 +207,7 @@ static void __xe_vm_bind_sync(int fd, uint32_t vm, uint32_t bo, uint64_t offset,
>  	__xe_vm_bind_assert(fd, vm, 0, bo, offset, addr, size, op, &sync, 1, 0,
>  			    0);
>  
> -	igt_assert(syncobj_wait(fd, &sync.handle, 1, INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, sync.handle, INT64_MAX, 0, NULL));
>  	syncobj_destroy(fd, sync.handle);
>  }
>  
> @@ -396,7 +396,7 @@ void xe_exec_wait(int fd, uint32_t engine, uint64_t addr)
>  
>  	xe_exec_sync(fd, engine, addr, &sync, 1);
>  
> -	igt_assert(syncobj_wait(fd, &sync.handle, 1, INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, sync.handle, INT64_MAX, 0, NULL));
>  	syncobj_destroy(fd, sync.handle);
>  }
>  
> diff --git a/tests/xe/xe_dma_buf_sync.c b/tests/xe/xe_dma_buf_sync.c
> index 8920b141b..43ef0f76f 100644
> --- a/tests/xe/xe_dma_buf_sync.c
> +++ b/tests/xe/xe_dma_buf_sync.c
> @@ -195,14 +195,13 @@ test_export_dma_buf(struct drm_xe_engine_class_instance *hwe0,
>  
>  		/* Verify exec blocked on spinner / prime BO */
>  		usleep(5000);
> -		igt_assert(!syncobj_wait(fd[1], &sync[1].handle, 1, 1, 0,
> -					 NULL));
> +		igt_assert(!syncobj_wait1(fd[1], sync[1].handle, 1, 0, NULL));
>  		igt_assert_eq(data[i]->data, 0x0);
>  
>  		/* End spinner and verify exec complete */
>  		xe_spin_end(&data[i]->spin);
> -		igt_assert(syncobj_wait(fd[1], &sync[1].handle, 1, INT64_MAX,
> -					0, NULL));
> +		igt_assert(syncobj_wait1(fd[1], sync[1].handle, INT64_MAX, 0,
> +					 NULL));
>  		igt_assert_eq(data[i]->data, 0xc0ffee);
>  
>  		/* Clean up */
> diff --git a/tests/xe/xe_evict.c b/tests/xe/xe_evict.c
> index 5687cce30..b93b45d48 100644
> --- a/tests/xe/xe_evict.c
> +++ b/tests/xe/xe_evict.c
> @@ -124,7 +124,7 @@ test_evict(int fd, struct drm_xe_engine_class_instance *eci,
>  				xe_vm_bind_async(fd, vm3, bind_engines[2], __bo,
>  						 0, addr,
>  						 bo_size, sync, 1);
> -				igt_assert(syncobj_wait(fd, &sync[0].handle, 1,
> +				igt_assert(syncobj_wait1(fd, sync[0].handle,
>  							INT64_MAX, 0, NULL));
>  				xe_vm_bind_async(fd, i & 1 ? vm2 : vm,
>  						 i & 1 ? bind_engines[1] :
> @@ -168,7 +168,7 @@ test_evict(int fd, struct drm_xe_engine_class_instance *eci,
>  	for (i = 0; i < n_engines; i++)
>  		igt_assert(syncobj_wait(fd, &syncobjs[i], 1, INT64_MAX, 0,
>  					NULL));
> -	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
>  
>  	for (i = 0; i < n_execs; i++) {
>  		uint32_t __bo;
> diff --git a/tests/xe/xe_exec_balancer.c b/tests/xe/xe_exec_balancer.c
> index 2018c8104..0a8eeb998 100644
> --- a/tests/xe/xe_exec_balancer.c
> +++ b/tests/xe/xe_exec_balancer.c
> @@ -110,11 +110,11 @@ static void test_all_active(int fd, int gt, int class)
>  		igt_assert(syncobj_wait(fd, &syncobjs[i], 1, INT64_MAX, 0,
>  					NULL));
>  	}
> -	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
>  
>  	sync[0].flags |= DRM_XE_SYNC_SIGNAL;
>  	xe_vm_unbind_async(fd, vm, 0, 0, addr, bo_size, sync, 1);
> -	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
>  
>  	syncobj_destroy(fd, sync[0].handle);
>  	for (i = 0; i < num_placements; i++) {
> @@ -332,11 +332,11 @@ test_exec(int fd, int gt, int class, int n_engines, int n_execs,
>  	for (i = 0; i < n_engines && n_execs; i++)
>  		igt_assert(syncobj_wait(fd, &syncobjs[i], 1, INT64_MAX, 0,
>  					NULL));
> -	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
>  
>  	sync[0].flags |= DRM_XE_SYNC_SIGNAL;
>  	xe_vm_unbind_async(fd, vm, 0, 0, addr, bo_size, sync, 1);
> -	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
>  
>  	for (i = (flags & INVALIDATE && n_execs) ? n_execs - 1 : 0;
>  	     i < n_execs; i++)
> diff --git a/tests/xe/xe_exec_basic.c b/tests/xe/xe_exec_basic.c
> index 2a176a5b3..8747c790c 100644
> --- a/tests/xe/xe_exec_basic.c
> +++ b/tests/xe/xe_exec_basic.c
> @@ -254,11 +254,11 @@ test_exec(int fd, struct drm_xe_engine_class_instance *eci,
>  
>  	sync[0].flags |= DRM_XE_SYNC_SIGNAL;
>  	for (i = 0; i < n_vm; ++i) {
> -		syncobj_reset(fd, &sync[0].handle, 1);
> +		syncobj_reset1(fd, sync[0].handle);
>  		xe_vm_unbind_async(fd, vm[i], bind_engines[i], 0, addr[i],
>  				   bo_size, sync, 1);
> -		igt_assert(syncobj_wait(fd, &sync[0].handle, 1,
> -					INT64_MAX, 0, NULL));
> +		igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0,
> +					 NULL));
>  	}
>  
>  	for (i = (flags & INVALIDATE && n_execs) ? n_execs - 1 : 0;
> diff --git a/tests/xe/xe_exec_reset.c b/tests/xe/xe_exec_reset.c
> index 0d72a3f20..087ad4503 100644
> --- a/tests/xe/xe_exec_reset.c
> +++ b/tests/xe/xe_exec_reset.c
> @@ -72,15 +72,15 @@ static void test_spin(int fd, struct drm_xe_engine_class_instance *eci)
>  
>  	xe_spin_wait_started(spin);
>  	usleep(50000);
> -	igt_assert(!syncobj_wait(fd, &syncobj, 1, 1, 0, NULL));
> +	igt_assert(!syncobj_wait1(fd, syncobj, 1, 0, NULL));
>  	xe_spin_end(spin);
>  
> -	igt_assert(syncobj_wait(fd, &syncobj, 1, INT64_MAX, 0, NULL));
> -	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, syncobj, INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
>  
>  	sync[0].flags |= DRM_XE_SYNC_SIGNAL;
>  	xe_vm_unbind_async(fd, vm, 0, 0, addr, bo_size, sync, 1);
> -	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
>  
>  	syncobj_destroy(fd, sync[0].handle);
>  	syncobj_destroy(fd, syncobj);
> @@ -301,13 +301,12 @@ test_balancer(int fd, int gt, int class, int n_engines, int n_execs,
>  	}
>  
>  	for (i = 0; i < n_engines && n_execs; i++)
> -		igt_assert(syncobj_wait(fd, &syncobjs[i], 1, INT64_MAX, 0,
> -					NULL));
> -	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
> +		igt_assert(syncobj_wait1(fd, syncobjs[i], INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
>  
>  	sync[0].flags |= DRM_XE_SYNC_SIGNAL;
>  	xe_vm_unbind_async(fd, vm, 0, 0, addr, bo_size, sync, 1);
> -	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
>  
>  	for (i = bad_batches; i < n_execs; i++)
>  		igt_assert_eq(data[i].data, 0xc0ffee);
> @@ -484,11 +483,11 @@ test_legacy_mode(int fd, struct drm_xe_engine_class_instance *eci,
>  	for (i = 0; i < n_engines && n_execs; i++)
>  		igt_assert(syncobj_wait(fd, &syncobjs[i], 1, INT64_MAX, 0,
>  					NULL));
> -	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
>  
>  	sync[0].flags |= DRM_XE_SYNC_SIGNAL;
>  	xe_vm_unbind_async(fd, vm, 0, 0, addr, bo_size, sync, 1);
> -	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
>  
>  	for (i = 1; i < n_execs; i++)
>  		igt_assert_eq(data[i].data, 0xc0ffee);
> diff --git a/tests/xe/xe_exec_threads.c b/tests/xe/xe_exec_threads.c
> index 3f2c2de9e..ec88b412c 100644
> --- a/tests/xe/xe_exec_threads.c
> +++ b/tests/xe/xe_exec_threads.c
> @@ -194,8 +194,7 @@ test_balancer(int fd, int gt, uint32_t vm, uint64_t addr, uint64_t userptr,
>  				 * an invalidate.
>  				 */
>  				for (j = 0; j < n_engines; ++j)
> -					igt_assert(syncobj_wait(fd,
> -								&syncobjs[j], 1,
> +					igt_assert(syncobj_wait1(fd, syncobjs[j],
>  								INT64_MAX, 0,
>  								NULL));
>  				igt_assert_eq(data[i].data, 0xc0ffee);
> @@ -217,13 +216,12 @@ test_balancer(int fd, int gt, uint32_t vm, uint64_t addr, uint64_t userptr,
>  	}
>  
>  	for (i = 0; i < n_engines; i++)
> -		igt_assert(syncobj_wait(fd, &syncobjs[i], 1, INT64_MAX, 0,
> -					NULL));
> -	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
> +		igt_assert(syncobj_wait1(fd, syncobjs[i], INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
>  
>  	sync[0].flags |= DRM_XE_SYNC_SIGNAL;
>  	xe_vm_unbind_async(fd, vm, 0, 0, addr, bo_size, sync, 1);
> -	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
>  
>  	for (i = (flags & INVALIDATE && n_execs) ? n_execs - 1 : 0;
>  	     i < n_execs; i++)
> @@ -637,8 +635,7 @@ test_legacy_mode(int fd, uint32_t vm, uint64_t addr, uint64_t userptr,
>  				 * an invalidate.
>  				 */
>  				for (j = 0; j < n_engines; ++j)
> -					igt_assert(syncobj_wait(fd,
> -								&syncobjs[j], 1,
> +					igt_assert(syncobj_wait1(fd, syncobjs[j],
>  								INT64_MAX, 0,
>  								NULL));
>  				if (!(flags & HANG && e == hang_engine))
> @@ -661,14 +658,13 @@ test_legacy_mode(int fd, uint32_t vm, uint64_t addr, uint64_t userptr,
>  	}
>  
>  	for (i = 0; i < n_engines; i++)
> -		igt_assert(syncobj_wait(fd, &syncobjs[i], 1, INT64_MAX, 0,
> -					NULL));
> -	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
> +		igt_assert(syncobj_wait1(fd, syncobjs[i], INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
>  
>  	sync[0].flags |= DRM_XE_SYNC_SIGNAL;
>  	xe_vm_unbind_async(fd, vm, bind_engines[0], 0, addr,
>  			   bo_size, sync, 1);
> -	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
>  
>  	for (i = flags & INVALIDATE ? n_execs - 1 : 0;
>  	     i < n_execs; i++) {
> diff --git a/tests/xe/xe_guc_pc.c b/tests/xe/xe_guc_pc.c
> index 5c71ae147..d97fc9914 100644
> --- a/tests/xe/xe_guc_pc.c
> +++ b/tests/xe/xe_guc_pc.c
> @@ -110,12 +110,12 @@ static void exec_basic(int fd, struct drm_xe_engine_class_instance *eci,
>  		igt_assert_eq(data[i].data, 0xc0ffee);
>  	}
>  
> -	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
>  
>  	sync[0].flags |= DRM_XE_SYNC_SIGNAL;
>  	xe_vm_unbind_async(fd, vm, bind_engines[0], 0, addr,
>  			   bo_size, sync, 1);
> -	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
>  
>  	for (i = 0; i < n_execs; i++)
>  		igt_assert_eq(data[i].data, 0xc0ffee);
> diff --git a/tests/xe/xe_huc_copy.c b/tests/xe/xe_huc_copy.c
> index fdac907d6..d4fc74397 100644
> --- a/tests/xe/xe_huc_copy.c
> +++ b/tests/xe/xe_huc_copy.c
> @@ -126,7 +126,7 @@ test_huc_copy(int fd)
>  	for(int i = 0; i < BO_DICT_ENTRIES; i++) {
>  		bo_dict[i].data = aligned_alloc(xe_get_default_alignment(fd), bo_dict[i].size);
>  		xe_vm_bind_userptr_async(fd, vm, 0, to_user_pointer(bo_dict[i].data), bo_dict[i].addr, bo_dict[i].size, &sync, 1);
> -		syncobj_wait(fd, &sync.handle, 1, INT64_MAX, 0, NULL);
> +		syncobj_wait1(fd, sync.handle, INT64_MAX, 0, NULL);
>  		memset(bo_dict[i].data, 0, bo_dict[i].size);
>  	}
>  	dinput = (char *)bo_dict[0].data;
> @@ -143,7 +143,7 @@ test_huc_copy(int fd)
>  
>  	for(int i = 0; i < BO_DICT_ENTRIES; i++) {
>  		xe_vm_unbind_async(fd, vm, 0, 0, bo_dict[i].addr, bo_dict[i].size, &sync, 1);
> -		syncobj_wait(fd, &sync.handle, 1, INT64_MAX, 0, NULL);
> +		syncobj_wait1(fd, sync.handle, INT64_MAX, 0, NULL);
>  		free(bo_dict[i].data);
>  	}
>  
> diff --git a/tests/xe/xe_pm.c b/tests/xe/xe_pm.c
> index 44154143c..a31aa3033 100644
> --- a/tests/xe/xe_pm.c
> +++ b/tests/xe/xe_pm.c
> @@ -303,8 +303,8 @@ test_exec(device_t device, struct drm_xe_engine_class_instance *eci,
>  						      SUSPEND_TEST_NONE);
>  	}
>  
> -	igt_assert(syncobj_wait(device.fd_xe, &sync[0].handle, 1, INT64_MAX, 0,
> -				NULL));
> +	igt_assert(syncobj_wait1(device.fd_xe, sync[0].handle, INT64_MAX, 0,
> +				 NULL));
>  
>  	if (check_rpm && runtime_usage_available(device.pci_xe))
>  		rpm_usage = igt_pm_get_runtime_usage(device.pci_xe);
> @@ -312,8 +312,8 @@ test_exec(device_t device, struct drm_xe_engine_class_instance *eci,
>  	sync[0].flags |= DRM_XE_SYNC_SIGNAL;
>  	xe_vm_unbind_async(device.fd_xe, vm, bind_engines[0], 0, addr,
>  			   bo_size, sync, 1);
> -	igt_assert(syncobj_wait(device.fd_xe, &sync[0].handle, 1, INT64_MAX, 0,
> -NULL));
> +	igt_assert(syncobj_wait1(device.fd_xe, sync[0].handle, INT64_MAX, 0,
> +				 NULL));
>  
>  	for (i = 0; i < n_execs; i++)
>  		igt_assert_eq(data[i].data, 0xc0ffee);
> diff --git a/tests/xe/xe_vm.c b/tests/xe/xe_vm.c
> index d4cec104e..d25d37ac2 100644
> --- a/tests/xe/xe_vm.c
> +++ b/tests/xe/xe_vm.c
> @@ -285,7 +285,7 @@ static void unbind_all(int fd, int n_vmas)
>  	sync[0].handle = syncobj_create(fd, 0);
>  	xe_vm_unbind_all_async(fd, vm, 0, bo, sync, 1);
>  
> -	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
>  	syncobj_destroy(fd, sync[0].handle);
>  
>  	gem_close(fd, bo);
> @@ -489,8 +489,7 @@ static void vm_async_ops_err(int fd, bool destroy)
>  	}
>  
>  	for (i = 0; i < N_BINDS; i++)
> -		igt_assert(syncobj_wait(fd, &syncobjs[i], 1, INT64_MAX, 0,
> -					NULL));
> +		igt_assert(syncobj_wait1(fd, syncobjs[i], INT64_MAX, 0, NULL));
>  
>  	if (!destroy)
>  		xe_vm_destroy(fd, vm);
> @@ -603,14 +602,12 @@ shared_pte_page(int fd, struct drm_xe_engine_class_instance *eci, int n_bo,
>  		sync_all[n_execs].handle = sync[0].handle;
>  		xe_vm_unbind_async(fd, vm, 0, 0, addr + i * addr_stride,
>  				   bo_size, sync_all, n_execs + 1);
> -		igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0,
> -					NULL));
> +		igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
>  	}
>  
>  	for (i = 0; i < n_execs; i++)
> -		igt_assert(syncobj_wait(fd, &syncobjs[i], 1, INT64_MAX, 0,
> -					NULL));
> -	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
> +		igt_assert(syncobj_wait1(fd, syncobjs[i], INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
>  
>  	for (i = 0; i < n_execs; i++)
>  		igt_assert_eq(data[i]->data, 0xc0ffee);
> @@ -641,7 +638,7 @@ shared_pte_page(int fd, struct drm_xe_engine_class_instance *eci, int n_bo,
>  
>  		exec.engine_id = engines[e];
>  		exec.address = batch_addr;
> -		syncobj_reset(fd, &syncobjs[e], 1);
> +		syncobj_reset1(fd, syncobjs[e]);
>  		xe_exec(fd, &exec);
>  	}
>  
> @@ -653,17 +650,15 @@ shared_pte_page(int fd, struct drm_xe_engine_class_instance *eci, int n_bo,
>  		sync_all[n_execs].handle = sync[0].handle;
>  		xe_vm_unbind_async(fd, vm, 0, 0, addr + i * addr_stride,
>  				   bo_size, sync_all, n_execs + 1);
> -		igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0,
> -					NULL));
> +		igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
>  	}
>  
>  	for (i = 0; i < n_execs; i++) {
>  		if (!(i % 2))
>  			continue;
> -		igt_assert(syncobj_wait(fd, &syncobjs[i], 1, INT64_MAX, 0,
> -					NULL));
> +		igt_assert(syncobj_wait1(fd, syncobjs[i], INT64_MAX, 0, NULL));
>  	}
> -	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
>  
>  	for (i = 0; i < n_execs; i++)
>  		igt_assert_eq(data[i]->data, 0xc0ffee);
> @@ -794,19 +789,18 @@ test_bind_engines_independent(int fd, struct drm_xe_engine_class_instance *eci)
>  	}
>  
>  	/* Verify initial bind, bind + write to 2nd engine done */
> -	igt_assert(syncobj_wait(fd, &syncobjs[1], 1, INT64_MAX, 0, NULL));
> -	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, syncobjs[1], INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
>  	igt_assert_eq(data[1].data, 0xc0ffee);
>  
>  	/* Verify bind + write to 1st engine still inflight */
> -	igt_assert(!syncobj_wait(fd, &syncobjs[0], 1, 1, 0, NULL));
> -	igt_assert(!syncobj_wait(fd, &syncobjs[N_ENGINES], 1, 1, 0, NULL));
> +	igt_assert(!syncobj_wait1(fd, syncobjs[0], 1, 0, NULL));
> +	igt_assert(!syncobj_wait1(fd, syncobjs[N_ENGINES], 1, 0, NULL));
>  
>  	/* Verify bind + write to 1st engine done after ending spinner */
>  	xe_spin_end(&data[0].spin);
> -	igt_assert(syncobj_wait(fd, &syncobjs[0], 1, INT64_MAX, 0, NULL));
> -	igt_assert(syncobj_wait(fd, &syncobjs[N_ENGINES], 1, INT64_MAX, 0,
> -				NULL));
> +	igt_assert(syncobj_wait1(fd, syncobjs[0], INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, syncobjs[N_ENGINES], INT64_MAX, 0, NULL));
>  	igt_assert_eq(data[0].data, 0xc0ffee);
>  
>  	syncobj_destroy(fd, sync[0].handle);
> @@ -938,13 +932,13 @@ test_bind_array(int fd, struct drm_xe_engine_class_instance *eci, int n_execs,
>  		bind_ops[i].op = XE_VM_BIND_OP_UNMAP | XE_VM_BIND_FLAG_ASYNC;
>  	}
>  
> -	syncobj_reset(fd, &sync[0].handle, 1);
> +	syncobj_reset1(fd, sync[0].handle);
>  	sync[0].flags |= DRM_XE_SYNC_SIGNAL;
>  	sync[1].flags &= ~DRM_XE_SYNC_SIGNAL;
>  	xe_vm_bind_array(fd, vm, bind_engine, bind_ops, n_execs, sync, 2);
>  
> -	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
> -	igt_assert(syncobj_wait(fd, &sync[1].handle, 1, INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, sync[1].handle, INT64_MAX, 0, NULL));
>  
>  	for (i = 0; i < n_execs; i++)
>  		igt_assert_eq(data[i].data, 0xc0ffee);
> @@ -1108,7 +1102,7 @@ test_large_binds(int fd, struct drm_xe_engine_class_instance *eci,
>  		sync[1].handle = syncobjs[e];
>  
>  		if (i != e)
> -			syncobj_reset(fd, &sync[1].handle, 1);
> +			syncobj_reset1(fd, sync[1].handle);
>  
>  		exec.engine_id = engines[e];
>  		exec.address = batch_addr;
> @@ -1121,11 +1115,10 @@ test_large_binds(int fd, struct drm_xe_engine_class_instance *eci,
>  	}
>  
>  	for (i = 0; i < n_engines; i++)
> -		igt_assert(syncobj_wait(fd, &syncobjs[i], 1, INT64_MAX, 0,
> -					NULL));
> -	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
> +		igt_assert(syncobj_wait1(fd, syncobjs[i], INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
>  
> -	syncobj_reset(fd, &sync[0].handle, 1);
> +	syncobj_reset1(fd, sync[0].handle);
>  	sync[0].flags |= DRM_XE_SYNC_SIGNAL;
>  	if (flags & LARGE_BIND_FLAG_SPLIT) {
>  		xe_vm_unbind_async(fd, vm, 0, 0, base_addr,
> @@ -1136,7 +1129,7 @@ test_large_binds(int fd, struct drm_xe_engine_class_instance *eci,
>  		xe_vm_unbind_async(fd, vm, 0, 0, base_addr, bo_size,
>  				   sync, 1);
>  	}
> -	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
>  
>  	addr = base_addr;
>  	for (i = 0; i < n_execs; i++) {
> @@ -1220,9 +1213,9 @@ static void *hammer_thread(void *tdata)
>  		} else {
>  			exec.num_syncs = 1;
>  			xe_exec(t->fd, &exec);
> -			igt_assert(syncobj_wait(t->fd, &sync[0].handle, 1,
> -						INT64_MAX, 0, NULL));
> -			syncobj_reset(t->fd, &sync[0].handle, 1);
> +			igt_assert(syncobj_wait1(t->fd, sync[0].handle,
> +						 INT64_MAX, 0, NULL));
> +			syncobj_reset1(t->fd, sync[0].handle);
>  		}
>  		++i;
>  	}
> @@ -1393,7 +1386,7 @@ test_munmap_style_unbind(int fd, struct drm_xe_engine_class_instance *eci,
>  
>  		sync[0].flags &= ~DRM_XE_SYNC_SIGNAL;
>  		if (i)
> -			syncobj_reset(fd, &sync[1].handle, 1);
> +			syncobj_reset1(fd, sync[1].handle);
>  		sync[1].flags |= DRM_XE_SYNC_SIGNAL;
>  
>  		exec.engine_id = engine;
> @@ -1405,15 +1398,15 @@ test_munmap_style_unbind(int fd, struct drm_xe_engine_class_instance *eci,
>  	addr = base_addr;
>  
>  	/* Unbind some of the pages */
> -	syncobj_reset(fd, &sync[0].handle, 1);
> +	syncobj_reset1(fd, sync[0].handle);
>  	sync[0].flags |= DRM_XE_SYNC_SIGNAL;
>  	sync[1].flags &= ~DRM_XE_SYNC_SIGNAL;
>  	xe_vm_unbind_async(fd, vm, 0, 0,
>  			   addr + unbind_n_page_offfset * page_size,
>  			   unbind_n_pages * page_size, sync, 2);
>  
> -	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
> -	igt_assert(syncobj_wait(fd, &sync[1].handle, 1, INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, sync[1].handle, INT64_MAX, 0, NULL));
>  
>  	/* Verify all pages written */
>  	for (i = 0; i < n_binds; ++i) {
> @@ -1449,7 +1442,7 @@ try_again_after_invalidate:
>  			igt_assert(b <= ARRAY_SIZE(data[i].batch));
>  
>  			sync[0].flags &= ~DRM_XE_SYNC_SIGNAL;
> -			syncobj_reset(fd, &sync[1].handle, 1);
> +			syncobj_reset1(fd, sync[1].handle);
>  			sync[1].flags |= DRM_XE_SYNC_SIGNAL;
>  
>  			exec.engine_id = engine;
> @@ -1459,8 +1452,8 @@ try_again_after_invalidate:
>  	}
>  	addr = base_addr;
>  
> -	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
> -	igt_assert(syncobj_wait(fd, &sync[1].handle, 1, INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, sync[1].handle, INT64_MAX, 0, NULL));
>  
>  	/* Verify all pages still bound written */
>  	for (i = 0; i < n_binds; ++i) {
> @@ -1490,7 +1483,7 @@ try_again_after_invalidate:
>  	}
>  
>  	/* Confirm unbound region can be rebound */
> -	syncobj_reset(fd, &sync[0].handle, 1);
> +	syncobj_reset1(fd, sync[0].handle);
>  	sync[0].flags |= DRM_XE_SYNC_SIGNAL;
>  	if (flags & MUNMAP_FLAG_USERPTR)
>  		xe_vm_bind_userptr_async(fd, vm, 0,
> @@ -1520,7 +1513,7 @@ try_again_after_invalidate:
>  		igt_assert(b <= ARRAY_SIZE(data[i].batch));
>  
>  		sync[0].flags &= ~DRM_XE_SYNC_SIGNAL;
> -		syncobj_reset(fd, &sync[1].handle, 1);
> +		syncobj_reset1(fd, sync[1].handle);
>  		sync[1].flags |= DRM_XE_SYNC_SIGNAL;
>  
>  		exec.engine_id = engine;
> @@ -1531,8 +1524,8 @@ try_again_after_invalidate:
>  	}
>  	addr = base_addr;
>  
> -	igt_assert(syncobj_wait(fd, &sync[0].handle, 1, INT64_MAX, 0, NULL));
> -	igt_assert(syncobj_wait(fd, &sync[1].handle, 1, INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, sync[0].handle, INT64_MAX, 0, NULL));
> +	igt_assert(syncobj_wait1(fd, sync[1].handle, INT64_MAX, 0, NULL));
>  
>  	/* Verify all pages written */
>  	for (i = 0; i < n_binds; ++i) {
> -- 
> 2.37.2
>