* [igt-dev] [PATCH i-g-t v3] lib/intel_bb: Enable custom engine support for xe
@ 2023-05-29 15:17 Christoph Manszewski
2023-05-30 13:27 ` Zbigniew Kempczyński
` (3 more replies)
0 siblings, 4 replies; 5+ messages in thread
From: Christoph Manszewski @ 2023-05-29 15:17 UTC (permalink / raw)
To: igt-dev
Currently the 'ctx' field in batch buffer creation is interpreted as
a vm id for xe. In i915 it is interpreted as a context id. Since a xe
engine more closely resembles an i915 context, change the current
behaviour and interpret the 'ctx' fied as an xe engine id. This also
allows us to use the compute engine on xe, which currently is not
possible, due to reliance on legacy i915 flags.
v2:
- don't destroy user provided engine in 'intel_bb_destroy' (Zbigniew)
- destroy internally created engine before creating a new one
v3:
- introduce 'vm' parameter to be able to provide probler vm_id for
custom xe engine (Dominik, Zbigniew)
Signed-off-by: Christoph Manszewski <christoph.manszewski@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
lib/igt_draw.c | 2 +-
lib/intel_batchbuffer.c | 51 ++++++++++++++++++++-------------
lib/intel_batchbuffer.h | 16 ++++++-----
lib/media_fill.c | 2 +-
tests/i915/api_intel_bb.c | 14 ++++-----
tests/i915/gem_ppgtt.c | 2 +-
tests/i915/gem_pxp.c | 16 +++++------
tests/i915/kms_fence_pin_leak.c | 2 +-
tests/i915/perf.c | 18 ++++++------
tests/xe/xe_intel_bb.c | 19 ++++++------
10 files changed, 78 insertions(+), 64 deletions(-)
diff --git a/lib/igt_draw.c b/lib/igt_draw.c
index d719b240..a5c0cbbf 100644
--- a/lib/igt_draw.c
+++ b/lib/igt_draw.c
@@ -807,7 +807,7 @@ static void draw_rect_render(int fd, struct cmd_data *cmd_data,
src = create_buf(fd, cmd_data->bops, &tmp, I915_TILING_NONE);
dst = create_buf(fd, cmd_data->bops, buf, tiling);
- ibb = intel_bb_create_with_context(fd, cmd_data->ctx, NULL, PAGE_SIZE);
+ ibb = intel_bb_create_with_context(fd, cmd_data->ctx, 0, NULL, PAGE_SIZE);
rendercopy(ibb, src, 0, 0, rect->w, rect->h, dst, rect->x, rect->y);
diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
index dfccc4f4..fbd73a5d 100644
--- a/lib/intel_batchbuffer.c
+++ b/lib/intel_batchbuffer.c
@@ -837,7 +837,8 @@ static inline uint64_t __intel_bb_get_offset(struct intel_bb *ibb,
/**
* __intel_bb_create:
* @fd: drm fd - i915 or xe
- * @ctx: context id
+ * @ctx: for i915 context id, for xe engine id
+ * @vm: for xe vm_id, unused for i915
* @cfg: for i915 intel_ctx configuration, NULL for default context or legacy mode,
* unused for xe
* @size: size of the batchbuffer
@@ -883,7 +884,7 @@ static inline uint64_t __intel_bb_get_offset(struct intel_bb *ibb,
* Pointer the intel_bb, asserts on failure.
*/
static struct intel_bb *
-__intel_bb_create(int fd, uint32_t ctx, const intel_ctx_cfg_t *cfg,
+__intel_bb_create(int fd, uint32_t ctx, uint32_t vm, const intel_ctx_cfg_t *cfg,
uint32_t size, bool do_relocs,
uint64_t start, uint64_t end,
uint8_t allocator_type, enum allocator_strategy strategy)
@@ -946,15 +947,17 @@ __intel_bb_create(int fd, uint32_t ctx, const intel_ctx_cfg_t *cfg,
ibb->gtt_size = 1ull << min_t(uint32_t, xe_va_bits(fd), 48);
end = ibb->gtt_size;
- if (!ctx)
- ctx = xe_vm_create(fd, DRM_XE_VM_CREATE_ASYNC_BIND_OPS, 0);
+ if (!vm) {
+ igt_assert_f(!ctx, "No vm provided for engine");
+ vm = xe_vm_create(fd, DRM_XE_VM_CREATE_ASYNC_BIND_OPS, 0);
+ }
ibb->uses_full_ppgtt = true;
ibb->allocator_handle =
- intel_allocator_open_full(fd, ctx, start, end,
+ intel_allocator_open_full(fd, vm, start, end,
allocator_type, strategy,
ibb->alignment);
- ibb->vm_id = ctx;
+ ibb->vm_id = vm;
ibb->last_engine = ~0U;
}
@@ -1001,7 +1004,8 @@ __intel_bb_create(int fd, uint32_t ctx, const intel_ctx_cfg_t *cfg,
/**
* intel_bb_create_full:
* @fd: drm fd - i915 or xe
- * @ctx: context
+ * @ctx: for i915 context id, for xe engine id
+ * @vm: for xe vm_id, unused for i915
* @cfg: intel_ctx configuration, NULL for default context or legacy mode
* @size: size of the batchbuffer
* @start: allocator vm start address
@@ -1019,20 +1023,21 @@ __intel_bb_create(int fd, uint32_t ctx, const intel_ctx_cfg_t *cfg,
*
* Pointer the intel_bb, asserts on failure.
*/
-struct intel_bb *intel_bb_create_full(int fd, uint32_t ctx,
+struct intel_bb *intel_bb_create_full(int fd, uint32_t ctx, uint32_t vm,
const intel_ctx_cfg_t *cfg, uint32_t size,
uint64_t start, uint64_t end,
uint8_t allocator_type,
enum allocator_strategy strategy)
{
- return __intel_bb_create(fd, ctx, cfg, size, false, start, end,
+ return __intel_bb_create(fd, ctx, vm, cfg, size, false, start, end,
allocator_type, strategy);
}
/**
* intel_bb_create_with_allocator:
* @fd: drm fd - i915 or xe
- * @ctx: context
+ * @ctx: for i915 context id, for xe engine id
+ * @vm: for xe vm_id, unused for i915
* @cfg: intel_ctx configuration, NULL for default context or legacy mode
* @size: size of the batchbuffer
* @allocator_type: allocator type, SIMPLE, RANDOM, ...
@@ -1045,12 +1050,12 @@ struct intel_bb *intel_bb_create_full(int fd, uint32_t ctx,
*
* Pointer the intel_bb, asserts on failure.
*/
-struct intel_bb *intel_bb_create_with_allocator(int fd, uint32_t ctx,
+struct intel_bb *intel_bb_create_with_allocator(int fd, uint32_t ctx, uint32_t vm,
const intel_ctx_cfg_t *cfg,
uint32_t size,
uint8_t allocator_type)
{
- return __intel_bb_create(fd, ctx, cfg, size, false, 0, 0,
+ return __intel_bb_create(fd, ctx, vm, cfg, size, false, 0, 0,
allocator_type, ALLOC_STRATEGY_HIGH_TO_LOW);
}
@@ -1088,7 +1093,7 @@ struct intel_bb *intel_bb_create(int fd, uint32_t size)
{
bool relocs = is_i915_device(fd) && gem_has_relocations(fd);
- return __intel_bb_create(fd, 0, NULL, size,
+ return __intel_bb_create(fd, 0, 0, NULL, size,
relocs && !aux_needs_softpin(fd), 0, 0,
INTEL_ALLOCATOR_SIMPLE,
ALLOC_STRATEGY_HIGH_TO_LOW);
@@ -1097,7 +1102,8 @@ struct intel_bb *intel_bb_create(int fd, uint32_t size)
/**
* intel_bb_create_with_context:
* @fd: drm fd - i915 or xe
- * @ctx: context id
+ * @ctx: for i915 context id, for xe engine id
+ * @vm: for xe vm_id, unused for i915
* @cfg: intel_ctx configuration, NULL for default context or legacy mode
* @size: size of the batchbuffer
*
@@ -1109,12 +1115,12 @@ struct intel_bb *intel_bb_create(int fd, uint32_t size)
* Pointer the intel_bb, asserts on failure.
*/
struct intel_bb *
-intel_bb_create_with_context(int fd, uint32_t ctx,
+intel_bb_create_with_context(int fd, uint32_t ctx, uint32_t vm,
const intel_ctx_cfg_t *cfg, uint32_t size)
{
bool relocs = is_i915_device(fd) && gem_has_relocations(fd);
- return __intel_bb_create(fd, ctx, cfg, size,
+ return __intel_bb_create(fd, ctx, vm, cfg, size,
relocs && !aux_needs_softpin(fd), 0, 0,
INTEL_ALLOCATOR_SIMPLE,
ALLOC_STRATEGY_HIGH_TO_LOW);
@@ -1136,7 +1142,7 @@ struct intel_bb *intel_bb_create_with_relocs(int fd, uint32_t size)
{
igt_require(is_i915_device(fd) && gem_has_relocations(fd));
- return __intel_bb_create(fd, 0, NULL, size, true, 0, 0,
+ return __intel_bb_create(fd, 0, 0, NULL, size, true, 0, 0,
INTEL_ALLOCATOR_NONE, ALLOC_STRATEGY_NONE);
}
@@ -1161,7 +1167,7 @@ intel_bb_create_with_relocs_and_context(int fd, uint32_t ctx,
{
igt_require(is_i915_device(fd) && gem_has_relocations(fd));
- return __intel_bb_create(fd, ctx, cfg, size, true, 0, 0,
+ return __intel_bb_create(fd, ctx, 0, cfg, size, true, 0, 0,
INTEL_ALLOCATOR_NONE, ALLOC_STRATEGY_NONE);
}
@@ -1181,7 +1187,7 @@ struct intel_bb *intel_bb_create_no_relocs(int fd, uint32_t size)
{
igt_require(gem_uses_full_ppgtt(fd));
- return __intel_bb_create(fd, 0, NULL, size, false, 0, 0,
+ return __intel_bb_create(fd, 0, 0, NULL, size, false, 0, 0,
INTEL_ALLOCATOR_SIMPLE,
ALLOC_STRATEGY_HIGH_TO_LOW);
}
@@ -2298,7 +2304,9 @@ __xe_bb_exec(struct intel_bb *ibb, uint64_t flags, bool sync)
igt_assert_eq(ibb->num_relocs, 0);
igt_assert_eq(ibb->xe_bound, false);
- if (ibb->last_engine != engine) {
+ if (ibb->ctx) {
+ engine_id = ibb->ctx;
+ } else if (ibb->last_engine != engine) {
struct drm_xe_engine_class_instance inst = { };
inst.engine_instance =
@@ -2323,6 +2331,9 @@ __xe_bb_exec(struct intel_bb *ibb, uint64_t flags, bool sync)
}
igt_debug("Run on %s\n", xe_engine_class_string(inst.engine_class));
+ if (ibb->engine_id)
+ xe_engine_destroy(ibb->fd, ibb->engine_id);
+
ibb->engine_id = engine_id =
xe_engine_create(ibb->fd, ibb->vm_id, &inst, 0);
} else {
diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h
index 9a58fb78..bdb3b6a6 100644
--- a/lib/intel_batchbuffer.h
+++ b/lib/intel_batchbuffer.h
@@ -305,16 +305,18 @@ struct intel_bb {
};
struct intel_bb *
-intel_bb_create_full(int fd, uint32_t ctx, const intel_ctx_cfg_t *cfg,
- uint32_t size, uint64_t start, uint64_t end,
- uint8_t allocator_type, enum allocator_strategy strategy);
+intel_bb_create_full(int fd, uint32_t ctx, uint32_t vm,
+ const intel_ctx_cfg_t *cfg, uint32_t size, uint64_t start,
+ uint64_t end, uint8_t allocator_type,
+ enum allocator_strategy strategy);
struct intel_bb *
-intel_bb_create_with_allocator(int fd, uint32_t ctx, const intel_ctx_cfg_t *cfg,
- uint32_t size, uint8_t allocator_type);
+intel_bb_create_with_allocator(int fd, uint32_t ctx, uint32_t vm,
+ const intel_ctx_cfg_t *cfg, uint32_t size,
+ uint8_t allocator_type);
struct intel_bb *intel_bb_create(int fd, uint32_t size);
struct intel_bb *
-intel_bb_create_with_context(int fd, uint32_t ctx, const intel_ctx_cfg_t *cfg,
- uint32_t size);
+intel_bb_create_with_context(int fd, uint32_t ctx, uint32_t vm,
+ const intel_ctx_cfg_t *cfg, uint32_t size);
struct intel_bb *intel_bb_create_with_relocs(int fd, uint32_t size);
struct intel_bb *
intel_bb_create_with_relocs_and_context(int fd, uint32_t ctx,
diff --git a/lib/media_fill.c b/lib/media_fill.c
index 4f8b50e8..e80dae15 100644
--- a/lib/media_fill.c
+++ b/lib/media_fill.c
@@ -309,7 +309,7 @@ __gen11_media_vme_func(int i915,
struct intel_bb *ibb;
uint32_t curbe_buffer, interface_descriptor;
- ibb = intel_bb_create_with_context(i915, ctx, NULL, PAGE_SIZE);
+ ibb = intel_bb_create_with_context(i915, ctx, 0, NULL, PAGE_SIZE);
intel_bb_add_intel_buf(ibb, dst, true);
intel_bb_add_intel_buf(ibb, src, false);
diff --git a/tests/i915/api_intel_bb.c b/tests/i915/api_intel_bb.c
index 38ffd763..85ca86ee 100644
--- a/tests/i915/api_intel_bb.c
+++ b/tests/i915/api_intel_bb.c
@@ -394,7 +394,7 @@ static void simple_bb(struct buf_ops *bops, bool use_context)
if (use_context)
gem_require_contexts(i915);
- ibb = intel_bb_create_with_allocator(i915, ctx, NULL, PAGE_SIZE,
+ ibb = intel_bb_create_with_allocator(i915, ctx, 0, NULL, PAGE_SIZE,
INTEL_ALLOCATOR_SIMPLE);
if (debug_bb)
intel_bb_set_debug(ibb, true);
@@ -413,7 +413,7 @@ static void simple_bb(struct buf_ops *bops, bool use_context)
if (use_context) {
ctx = gem_context_create(i915);
intel_bb_destroy(ibb);
- ibb = intel_bb_create_with_context(i915, ctx, NULL, PAGE_SIZE);
+ ibb = intel_bb_create_with_context(i915, ctx, 0, NULL, PAGE_SIZE);
intel_bb_out(ibb, MI_BATCH_BUFFER_END);
intel_bb_ptr_align(ibb, 8);
intel_bb_exec(ibb, intel_bb_offset(ibb),
@@ -434,7 +434,7 @@ static void bb_with_allocator(struct buf_ops *bops)
igt_require(gem_uses_full_ppgtt(i915));
- ibb = intel_bb_create_with_allocator(i915, ctx, NULL, PAGE_SIZE,
+ ibb = intel_bb_create_with_allocator(i915, ctx, 0, NULL, PAGE_SIZE,
INTEL_ALLOCATOR_SIMPLE);
if (debug_bb)
intel_bb_set_debug(ibb, true);
@@ -768,7 +768,7 @@ static void object_noreloc(struct buf_ops *bops, enum obj_cache_ops cache_op,
igt_require(gem_uses_full_ppgtt(i915));
- ibb = intel_bb_create_with_allocator(i915, 0, NULL, PAGE_SIZE, allocator_type);
+ ibb = intel_bb_create_with_allocator(i915, 0, 0, NULL, PAGE_SIZE, allocator_type);
if (debug_bb)
intel_bb_set_debug(ibb, true);
@@ -882,7 +882,7 @@ static void blit(struct buf_ops *bops,
if (do_relocs) {
ibb = intel_bb_create_with_relocs(i915, PAGE_SIZE);
} else {
- ibb = intel_bb_create_with_allocator(i915, 0, NULL, PAGE_SIZE,
+ ibb = intel_bb_create_with_allocator(i915, 0, 0, NULL, PAGE_SIZE,
allocator_type);
flags |= I915_EXEC_NO_RELOC;
}
@@ -1346,7 +1346,7 @@ static void delta_check(struct buf_ops *bops)
uint64_t delta = gem_detect_safe_alignment(i915) + 0x1000;
bool supports_48bit;
- ibb = intel_bb_create_with_allocator(i915, 0, NULL, PAGE_SIZE,
+ ibb = intel_bb_create_with_allocator(i915, 0, 0, NULL, PAGE_SIZE,
INTEL_ALLOCATOR_SIMPLE);
supports_48bit = ibb->supports_48b_address;
if (!supports_48bit)
@@ -1466,7 +1466,7 @@ static void misplaced_blitter(struct buf_ops *bops)
err = __intel_ctx_create(i915, &cfg, &ctx);
igt_assert_eq(err, 0);
- ibb = intel_bb_create_with_context(i915, ctx->id, &ctx->cfg, PAGE_SIZE);
+ ibb = intel_bb_create_with_context(i915, ctx->id, 0, &ctx->cfg, PAGE_SIZE);
/* Prepare for blitter copy, done to verify we found the blitter engine */
src = intel_buf_create(bops, WIDTH, HEIGHT, 32, 0, I915_TILING_NONE,
diff --git a/tests/i915/gem_ppgtt.c b/tests/i915/gem_ppgtt.c
index 6a0512ab..9dc6ccfe 100644
--- a/tests/i915/gem_ppgtt.c
+++ b/tests/i915/gem_ppgtt.c
@@ -139,7 +139,7 @@ static void fork_rcs_copy(int timeout, uint32_t final,
ctx = gem_context_create(buf_ops_get_fd(dst[child]->bops));
ibb = intel_bb_create_with_context(buf_ops_get_fd(dst[child]->bops),
- ctx, NULL, 4096);
+ ctx, 0, NULL, 4096);
i = 0;
igt_until_timeout(timeout) {
src = create_bo(dst[child]->bops,
diff --git a/tests/i915/gem_pxp.c b/tests/i915/gem_pxp.c
index 7668834d..167877d3 100644
--- a/tests/i915/gem_pxp.c
+++ b/tests/i915/gem_pxp.c
@@ -541,7 +541,7 @@ static void test_render_baseline(int i915)
/* Perform a regular 3d copy as a control checkpoint */
ret = create_ctx_with_params(i915, false, false, false, false, &ctx);
igt_assert_eq(ret, 0);
- ibb = intel_bb_create_with_context(i915, ctx, NULL, 4096);
+ ibb = intel_bb_create_with_context(i915, ctx, 0, NULL, 4096);
igt_assert(ibb);
dstbo = alloc_and_fill_dest_buff(i915, false, TSTSURF_SIZE, TSTSURF_INITCOLOR1);
@@ -590,7 +590,7 @@ static void __test_render_pxp_src_to_protdest(int i915, uint32_t *outpixels, int
ret = create_ctx_with_params(i915, true, true, true, false, &ctx);
igt_assert_eq(ret, 0);
igt_assert_eq(get_ctx_protected_param(i915, ctx), 1);
- ibb = intel_bb_create_with_context(i915, ctx, NULL, 4096);
+ ibb = intel_bb_create_with_context(i915, ctx, 0, NULL, 4096);
igt_assert(ibb);
intel_bb_set_pxp(ibb, true, DISPLAY_APPTYPE, I915_PROTECTED_CONTENT_DEFAULT_SESSION);
@@ -651,7 +651,7 @@ static void test_render_pxp_protsrc_to_protdest(int i915)
ret = create_ctx_with_params(i915, true, true, true, false, &ctx);
igt_assert_eq(ret, 0);
igt_assert_eq(get_ctx_protected_param(i915, ctx), 1);
- ibb = intel_bb_create_with_context(i915, ctx, NULL, 4096);
+ ibb = intel_bb_create_with_context(i915, ctx, 0, NULL, 4096);
igt_assert(ibb);
intel_bb_set_pxp(ibb, true, DISPLAY_APPTYPE, I915_PROTECTED_CONTENT_DEFAULT_SESSION);
@@ -743,7 +743,7 @@ static void test_pxp_dmabuffshare_refcnt(int i915)
ret = create_ctx_with_params(fd[n], true, true, true, false, &ctx[n]);
igt_assert_eq(ret, 0);
igt_assert_eq(get_ctx_protected_param(fd[n], ctx[n]), 1);
- ibb[n] = intel_bb_create_with_context(fd[n], ctx[n], NULL, 4096);
+ ibb[n] = intel_bb_create_with_context(fd[n], ctx[n], 0, NULL, 4096);
intel_bb_set_pxp(ibb[n], true, DISPLAY_APPTYPE,
I915_PROTECTED_CONTENT_DEFAULT_SESSION);
@@ -905,7 +905,7 @@ static void prepare_exec_assets(int i915, struct simple_exec_assets *data, bool
ret = create_ctx_with_params(i915, false, false, false, false, &(data->ctx));
igt_assert_eq(ret, 0);
igt_assert_eq(get_ctx_protected_param(i915, data->ctx), ctx_pxp);
- data->ibb = intel_bb_create_with_context(i915, data->ctx, NULL, 4096);
+ data->ibb = intel_bb_create_with_context(i915, data->ctx, 0, NULL, 4096);
igt_assert(data->ibb);
data->fencebo = alloc_and_fill_dest_buff(i915, buf_pxp, 4096, 0);
@@ -993,7 +993,7 @@ static void test_pxp_stale_buf_execution(int i915)
ret = create_ctx_with_params(i915, true, true, true, false, &ctx2);
igt_assert_eq(ret, 0);
igt_assert_eq(get_ctx_protected_param(i915, ctx2), 1);
- ibb2 = intel_bb_create_with_context(i915, ctx2, NULL, 4096);
+ ibb2 = intel_bb_create_with_context(i915, ctx2, 0, NULL, 4096);
igt_assert(ibb2);
intel_bb_remove_intel_buf(data.ibb, data.fencebuf);
intel_bb_add_intel_buf(ibb2, data.fencebuf, true);
@@ -1094,7 +1094,7 @@ static void test_pxp_pwrcycle_staleasset_execution(int i915, struct powermgt_dat
ret = create_ctx_with_params(i915, true, true, true, false, &ctx2);
igt_assert_eq(ret, 0);
igt_assert_eq(get_ctx_protected_param(i915, ctx2), 1);
- ibb2 = intel_bb_create_with_context(i915, ctx2, NULL, 4096);
+ ibb2 = intel_bb_create_with_context(i915, ctx2, 0, NULL, 4096);
igt_assert(ibb2);
intel_bb_remove_intel_buf(data[1].ibb, data[1].fencebuf);
intel_bb_add_intel_buf(ibb2, data[1].fencebuf, true);
@@ -1154,7 +1154,7 @@ static void setup_protected_fb(int i915, int width, int height, igt_fb_t *fb, ui
fb->plane_bpp[0], 0,
igt_fb_mod_to_tiling(fb->modifier), 0);
- ibb = intel_bb_create_with_context(i915, ctx, NULL, 4096);
+ ibb = intel_bb_create_with_context(i915, ctx, 0, NULL, 4096);
igt_assert(ibb);
ibb->pxp.enabled = true;
diff --git a/tests/i915/kms_fence_pin_leak.c b/tests/i915/kms_fence_pin_leak.c
index 63657a74..127c01c1 100644
--- a/tests/i915/kms_fence_pin_leak.c
+++ b/tests/i915/kms_fence_pin_leak.c
@@ -62,7 +62,7 @@ static void exec_nop(data_t *data, struct igt_fb *fb, uint32_t ctx)
intel_buf_set_ownership(dst, true);
ibb = intel_bb_create_with_context(buf_ops_get_fd(data->bops),
- ctx, NULL, 4096);
+ ctx, 0, NULL, 4096);
/* add the reloc to make sure the kernel will think we write to dst */
intel_bb_add_intel_buf(ibb, dst, true);
diff --git a/tests/i915/perf.c b/tests/i915/perf.c
index 9b1518d1..069ab8c0 100644
--- a/tests/i915/perf.c
+++ b/tests/i915/perf.c
@@ -2071,7 +2071,7 @@ static void load_helper_init(void)
lh.context_id = gem_context_create(drm_fd);
igt_assert_neq(lh.context_id, 0xffffffff);
- lh.ibb = intel_bb_create_with_context(drm_fd, lh.context_id, NULL, BATCH_SZ);
+ lh.ibb = intel_bb_create_with_context(drm_fd, lh.context_id, 0, NULL, BATCH_SZ);
scratch_buf_init(lh.bops, &lh.dst, 1920, 1080, 0);
scratch_buf_init(lh.bops, &lh.src, 1920, 1080, 0);
@@ -3574,7 +3574,7 @@ gen12_test_mi_rpc(const struct intel_execution_engine2 *e)
igt_assert_neq(ctx_id, INVALID_CTX_ID);
properties[1] = ctx_id;
- ibb = intel_bb_create_with_context(drm_fd, ctx_id, NULL, BATCH_SZ);
+ ibb = intel_bb_create_with_context(drm_fd, ctx_id, 0, NULL, BATCH_SZ);
buf = intel_buf_create(bops, 4096, 1, 8, 64,
I915_TILING_NONE, I915_COMPRESSION_NONE);
@@ -3653,7 +3653,7 @@ test_mi_rpc(void)
ctx_id = gem_context_create(drm_fd);
- ibb = intel_bb_create_with_context(drm_fd, ctx_id, NULL, BATCH_SZ);
+ ibb = intel_bb_create_with_context(drm_fd, ctx_id, 0, NULL, BATCH_SZ);
buf = intel_buf_create(bops, 4096, 1, 8, 64,
I915_TILING_NONE, I915_COMPRESSION_NONE);
@@ -3780,8 +3780,8 @@ hsw_test_single_ctx_counters(void)
*/
context0_id = gem_context_create(drm_fd);
context1_id = gem_context_create(drm_fd);
- ibb0 = intel_bb_create_with_context(drm_fd, context0_id, NULL, BATCH_SZ);
- ibb1 = intel_bb_create_with_context(drm_fd, context1_id, NULL, BATCH_SZ);
+ ibb0 = intel_bb_create_with_context(drm_fd, context0_id, 0, NULL, BATCH_SZ);
+ ibb1 = intel_bb_create_with_context(drm_fd, context1_id, 0, NULL, BATCH_SZ);
igt_debug("submitting warm up render_copy\n");
@@ -4024,8 +4024,8 @@ gen8_test_single_ctx_render_target_writes_a_counter(void)
context0_id = gem_context_create(drm_fd);
context1_id = gem_context_create(drm_fd);
- ibb0 = intel_bb_create_with_context(drm_fd, context0_id, NULL, BATCH_SZ);
- ibb1 = intel_bb_create_with_context(drm_fd, context1_id, NULL, BATCH_SZ);
+ ibb0 = intel_bb_create_with_context(drm_fd, context0_id, 0, NULL, BATCH_SZ);
+ ibb1 = intel_bb_create_with_context(drm_fd, context1_id, 0, NULL, BATCH_SZ);
igt_debug("submitting warm up render_copy\n");
@@ -4435,8 +4435,8 @@ static void gen12_single_ctx_helper(const struct intel_execution_engine2 *e)
context0_id = gem_context_create(drm_fd);
context1_id = gem_context_create(drm_fd);
- ibb0 = intel_bb_create_with_context(drm_fd, context0_id, NULL, BATCH_SZ);
- ibb1 = intel_bb_create_with_context(drm_fd, context1_id, NULL, BATCH_SZ);
+ ibb0 = intel_bb_create_with_context(drm_fd, context0_id, 0, NULL, BATCH_SZ);
+ ibb1 = intel_bb_create_with_context(drm_fd, context1_id, 0, NULL, BATCH_SZ);
igt_debug("submitting warm up render_copy\n");
diff --git a/tests/xe/xe_intel_bb.c b/tests/xe/xe_intel_bb.c
index 4cdc0434..755cc530 100644
--- a/tests/xe/xe_intel_bb.c
+++ b/tests/xe/xe_intel_bb.c
@@ -176,9 +176,9 @@ static void simple_bb(struct buf_ops *bops, bool new_context)
{
int xe = buf_ops_get_fd(bops);
struct intel_bb *ibb;
- uint32_t ctx = 0;
+ uint32_t ctx = 0, vm = 0;
- ibb = intel_bb_create_with_allocator(xe, ctx, NULL, PAGE_SIZE,
+ ibb = intel_bb_create_with_allocator(xe, 0, 0, NULL, PAGE_SIZE,
INTEL_ALLOCATOR_SIMPLE);
if (debug_bb)
intel_bb_set_debug(ibb, true);
@@ -195,15 +195,17 @@ static void simple_bb(struct buf_ops *bops, bool new_context)
intel_bb_reset(ibb, true);
if (new_context) {
- ctx = xe_vm_create(xe, DRM_XE_VM_CREATE_ASYNC_BIND_OPS, 0);
+ vm = xe_vm_create(xe, DRM_XE_VM_CREATE_ASYNC_BIND_OPS, 0);
+ ctx = xe_engine_create(xe, vm, xe_hw_engine(xe, 0), 0);
intel_bb_destroy(ibb);
- ibb = intel_bb_create_with_context(xe, ctx, NULL, PAGE_SIZE);
+ ibb = intel_bb_create_with_context(xe, ctx, vm, NULL, PAGE_SIZE);
intel_bb_out(ibb, MI_BATCH_BUFFER_END);
intel_bb_ptr_align(ibb, 8);
intel_bb_exec(ibb, intel_bb_offset(ibb),
I915_EXEC_DEFAULT | I915_EXEC_NO_RELOC,
true);
- xe_vm_destroy(xe, ctx);
+ xe_engine_destroy(xe, ctx);
+ xe_vm_destroy(xe, vm);
}
intel_bb_destroy(ibb);
@@ -220,9 +222,8 @@ static void bb_with_allocator(struct buf_ops *bops)
int xe = buf_ops_get_fd(bops);
struct intel_bb *ibb;
struct intel_buf *src, *dst;
- uint32_t ctx = 0;
- ibb = intel_bb_create_with_allocator(xe, ctx, NULL, PAGE_SIZE,
+ ibb = intel_bb_create_with_allocator(xe, 0, 0, NULL, PAGE_SIZE,
INTEL_ALLOCATOR_SIMPLE);
if (debug_bb)
intel_bb_set_debug(ibb, true);
@@ -455,7 +456,7 @@ static void blit(struct buf_ops *bops, uint8_t allocator_type)
uint64_t poff_src, poff_dst;
uint64_t flags = 0;
- ibb = intel_bb_create_with_allocator(xe, 0, NULL, PAGE_SIZE,
+ ibb = intel_bb_create_with_allocator(xe, 0, 0, NULL, PAGE_SIZE,
allocator_type);
flags |= I915_EXEC_NO_RELOC;
@@ -892,7 +893,7 @@ static void delta_check(struct buf_ops *bops)
uint64_t obj_offset = (1ULL << 32) - xe_get_default_alignment(xe);
uint64_t delta = xe_get_default_alignment(xe) + 0x1000;
- ibb = intel_bb_create_with_allocator(xe, 0, NULL, PAGE_SIZE,
+ ibb = intel_bb_create_with_allocator(xe, 0, 0, NULL, PAGE_SIZE,
INTEL_ALLOCATOR_SIMPLE);
if (debug_bb)
intel_bb_set_debug(ibb, true);
--
2.40.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v3] lib/intel_bb: Enable custom engine support for xe
2023-05-29 15:17 [igt-dev] [PATCH i-g-t v3] lib/intel_bb: Enable custom engine support for xe Christoph Manszewski
@ 2023-05-30 13:27 ` Zbigniew Kempczyński
2023-05-30 14:04 ` [igt-dev] ✗ GitLab.Pipeline: warning for lib/intel_bb: Enable custom engine support for xe (rev3) Patchwork
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Zbigniew Kempczyński @ 2023-05-30 13:27 UTC (permalink / raw)
To: Christoph Manszewski; +Cc: igt-dev
On Mon, May 29, 2023 at 05:17:54PM +0200, Christoph Manszewski wrote:
> Currently the 'ctx' field in batch buffer creation is interpreted as
> a vm id for xe. In i915 it is interpreted as a context id. Since a xe
> engine more closely resembles an i915 context, change the current
> behaviour and interpret the 'ctx' fied as an xe engine id. This also
> allows us to use the compute engine on xe, which currently is not
> possible, due to reliance on legacy i915 flags.
>
> v2:
> - don't destroy user provided engine in 'intel_bb_destroy' (Zbigniew)
> - destroy internally created engine before creating a new one
> v3:
> - introduce 'vm' parameter to be able to provide probler vm_id for
> custom xe engine (Dominik, Zbigniew)
>
> Signed-off-by: Christoph Manszewski <christoph.manszewski@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
> lib/igt_draw.c | 2 +-
> lib/intel_batchbuffer.c | 51 ++++++++++++++++++++-------------
> lib/intel_batchbuffer.h | 16 ++++++-----
> lib/media_fill.c | 2 +-
> tests/i915/api_intel_bb.c | 14 ++++-----
> tests/i915/gem_ppgtt.c | 2 +-
> tests/i915/gem_pxp.c | 16 +++++------
> tests/i915/kms_fence_pin_leak.c | 2 +-
> tests/i915/perf.c | 18 ++++++------
> tests/xe/xe_intel_bb.c | 19 ++++++------
> 10 files changed, 78 insertions(+), 64 deletions(-)
>
> diff --git a/lib/igt_draw.c b/lib/igt_draw.c
> index d719b240..a5c0cbbf 100644
> --- a/lib/igt_draw.c
> +++ b/lib/igt_draw.c
> @@ -807,7 +807,7 @@ static void draw_rect_render(int fd, struct cmd_data *cmd_data,
>
> src = create_buf(fd, cmd_data->bops, &tmp, I915_TILING_NONE);
> dst = create_buf(fd, cmd_data->bops, buf, tiling);
> - ibb = intel_bb_create_with_context(fd, cmd_data->ctx, NULL, PAGE_SIZE);
> + ibb = intel_bb_create_with_context(fd, cmd_data->ctx, 0, NULL, PAGE_SIZE);
>
> rendercopy(ibb, src, 0, 0, rect->w, rect->h, dst, rect->x, rect->y);
>
> diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
> index dfccc4f4..fbd73a5d 100644
> --- a/lib/intel_batchbuffer.c
> +++ b/lib/intel_batchbuffer.c
> @@ -837,7 +837,8 @@ static inline uint64_t __intel_bb_get_offset(struct intel_bb *ibb,
> /**
> * __intel_bb_create:
> * @fd: drm fd - i915 or xe
> - * @ctx: context id
> + * @ctx: for i915 context id, for xe engine id
> + * @vm: for xe vm_id, unused for i915
> * @cfg: for i915 intel_ctx configuration, NULL for default context or legacy mode,
> * unused for xe
> * @size: size of the batchbuffer
> @@ -883,7 +884,7 @@ static inline uint64_t __intel_bb_get_offset(struct intel_bb *ibb,
> * Pointer the intel_bb, asserts on failure.
> */
> static struct intel_bb *
> -__intel_bb_create(int fd, uint32_t ctx, const intel_ctx_cfg_t *cfg,
> +__intel_bb_create(int fd, uint32_t ctx, uint32_t vm, const intel_ctx_cfg_t *cfg,
> uint32_t size, bool do_relocs,
> uint64_t start, uint64_t end,
> uint8_t allocator_type, enum allocator_strategy strategy)
> @@ -946,15 +947,17 @@ __intel_bb_create(int fd, uint32_t ctx, const intel_ctx_cfg_t *cfg,
> ibb->gtt_size = 1ull << min_t(uint32_t, xe_va_bits(fd), 48);
> end = ibb->gtt_size;
>
> - if (!ctx)
> - ctx = xe_vm_create(fd, DRM_XE_VM_CREATE_ASYNC_BIND_OPS, 0);
> + if (!vm) {
> + igt_assert_f(!ctx, "No vm provided for engine");
> + vm = xe_vm_create(fd, DRM_XE_VM_CREATE_ASYNC_BIND_OPS, 0);
> + }
>
> ibb->uses_full_ppgtt = true;
> ibb->allocator_handle =
> - intel_allocator_open_full(fd, ctx, start, end,
> + intel_allocator_open_full(fd, vm, start, end,
> allocator_type, strategy,
> ibb->alignment);
> - ibb->vm_id = ctx;
> + ibb->vm_id = vm;
> ibb->last_engine = ~0U;
> }
>
> @@ -1001,7 +1004,8 @@ __intel_bb_create(int fd, uint32_t ctx, const intel_ctx_cfg_t *cfg,
> /**
> * intel_bb_create_full:
> * @fd: drm fd - i915 or xe
> - * @ctx: context
> + * @ctx: for i915 context id, for xe engine id
> + * @vm: for xe vm_id, unused for i915
> * @cfg: intel_ctx configuration, NULL for default context or legacy mode
> * @size: size of the batchbuffer
> * @start: allocator vm start address
> @@ -1019,20 +1023,21 @@ __intel_bb_create(int fd, uint32_t ctx, const intel_ctx_cfg_t *cfg,
> *
> * Pointer the intel_bb, asserts on failure.
> */
> -struct intel_bb *intel_bb_create_full(int fd, uint32_t ctx,
> +struct intel_bb *intel_bb_create_full(int fd, uint32_t ctx, uint32_t vm,
> const intel_ctx_cfg_t *cfg, uint32_t size,
> uint64_t start, uint64_t end,
> uint8_t allocator_type,
> enum allocator_strategy strategy)
> {
> - return __intel_bb_create(fd, ctx, cfg, size, false, start, end,
> + return __intel_bb_create(fd, ctx, vm, cfg, size, false, start, end,
> allocator_type, strategy);
> }
>
> /**
> * intel_bb_create_with_allocator:
> * @fd: drm fd - i915 or xe
> - * @ctx: context
> + * @ctx: for i915 context id, for xe engine id
> + * @vm: for xe vm_id, unused for i915
> * @cfg: intel_ctx configuration, NULL for default context or legacy mode
> * @size: size of the batchbuffer
> * @allocator_type: allocator type, SIMPLE, RANDOM, ...
> @@ -1045,12 +1050,12 @@ struct intel_bb *intel_bb_create_full(int fd, uint32_t ctx,
> *
> * Pointer the intel_bb, asserts on failure.
> */
> -struct intel_bb *intel_bb_create_with_allocator(int fd, uint32_t ctx,
> +struct intel_bb *intel_bb_create_with_allocator(int fd, uint32_t ctx, uint32_t vm,
> const intel_ctx_cfg_t *cfg,
> uint32_t size,
> uint8_t allocator_type)
> {
> - return __intel_bb_create(fd, ctx, cfg, size, false, 0, 0,
> + return __intel_bb_create(fd, ctx, vm, cfg, size, false, 0, 0,
> allocator_type, ALLOC_STRATEGY_HIGH_TO_LOW);
> }
>
> @@ -1088,7 +1093,7 @@ struct intel_bb *intel_bb_create(int fd, uint32_t size)
> {
> bool relocs = is_i915_device(fd) && gem_has_relocations(fd);
>
> - return __intel_bb_create(fd, 0, NULL, size,
> + return __intel_bb_create(fd, 0, 0, NULL, size,
> relocs && !aux_needs_softpin(fd), 0, 0,
> INTEL_ALLOCATOR_SIMPLE,
> ALLOC_STRATEGY_HIGH_TO_LOW);
> @@ -1097,7 +1102,8 @@ struct intel_bb *intel_bb_create(int fd, uint32_t size)
> /**
> * intel_bb_create_with_context:
> * @fd: drm fd - i915 or xe
> - * @ctx: context id
> + * @ctx: for i915 context id, for xe engine id
> + * @vm: for xe vm_id, unused for i915
> * @cfg: intel_ctx configuration, NULL for default context or legacy mode
> * @size: size of the batchbuffer
> *
> @@ -1109,12 +1115,12 @@ struct intel_bb *intel_bb_create(int fd, uint32_t size)
> * Pointer the intel_bb, asserts on failure.
> */
> struct intel_bb *
> -intel_bb_create_with_context(int fd, uint32_t ctx,
> +intel_bb_create_with_context(int fd, uint32_t ctx, uint32_t vm,
> const intel_ctx_cfg_t *cfg, uint32_t size)
> {
> bool relocs = is_i915_device(fd) && gem_has_relocations(fd);
>
> - return __intel_bb_create(fd, ctx, cfg, size,
> + return __intel_bb_create(fd, ctx, vm, cfg, size,
> relocs && !aux_needs_softpin(fd), 0, 0,
> INTEL_ALLOCATOR_SIMPLE,
> ALLOC_STRATEGY_HIGH_TO_LOW);
> @@ -1136,7 +1142,7 @@ struct intel_bb *intel_bb_create_with_relocs(int fd, uint32_t size)
> {
> igt_require(is_i915_device(fd) && gem_has_relocations(fd));
>
> - return __intel_bb_create(fd, 0, NULL, size, true, 0, 0,
> + return __intel_bb_create(fd, 0, 0, NULL, size, true, 0, 0,
> INTEL_ALLOCATOR_NONE, ALLOC_STRATEGY_NONE);
> }
>
> @@ -1161,7 +1167,7 @@ intel_bb_create_with_relocs_and_context(int fd, uint32_t ctx,
> {
> igt_require(is_i915_device(fd) && gem_has_relocations(fd));
>
> - return __intel_bb_create(fd, ctx, cfg, size, true, 0, 0,
> + return __intel_bb_create(fd, ctx, 0, cfg, size, true, 0, 0,
> INTEL_ALLOCATOR_NONE, ALLOC_STRATEGY_NONE);
> }
>
> @@ -1181,7 +1187,7 @@ struct intel_bb *intel_bb_create_no_relocs(int fd, uint32_t size)
> {
> igt_require(gem_uses_full_ppgtt(fd));
>
> - return __intel_bb_create(fd, 0, NULL, size, false, 0, 0,
> + return __intel_bb_create(fd, 0, 0, NULL, size, false, 0, 0,
> INTEL_ALLOCATOR_SIMPLE,
> ALLOC_STRATEGY_HIGH_TO_LOW);
> }
> @@ -2298,7 +2304,9 @@ __xe_bb_exec(struct intel_bb *ibb, uint64_t flags, bool sync)
> igt_assert_eq(ibb->num_relocs, 0);
> igt_assert_eq(ibb->xe_bound, false);
>
> - if (ibb->last_engine != engine) {
> + if (ibb->ctx) {
> + engine_id = ibb->ctx;
> + } else if (ibb->last_engine != engine) {
> struct drm_xe_engine_class_instance inst = { };
>
> inst.engine_instance =
> @@ -2323,6 +2331,9 @@ __xe_bb_exec(struct intel_bb *ibb, uint64_t flags, bool sync)
> }
> igt_debug("Run on %s\n", xe_engine_class_string(inst.engine_class));
>
> + if (ibb->engine_id)
> + xe_engine_destroy(ibb->fd, ibb->engine_id);
> +
> ibb->engine_id = engine_id =
> xe_engine_create(ibb->fd, ibb->vm_id, &inst, 0);
> } else {
> diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h
> index 9a58fb78..bdb3b6a6 100644
> --- a/lib/intel_batchbuffer.h
> +++ b/lib/intel_batchbuffer.h
> @@ -305,16 +305,18 @@ struct intel_bb {
> };
>
> struct intel_bb *
> -intel_bb_create_full(int fd, uint32_t ctx, const intel_ctx_cfg_t *cfg,
> - uint32_t size, uint64_t start, uint64_t end,
> - uint8_t allocator_type, enum allocator_strategy strategy);
> +intel_bb_create_full(int fd, uint32_t ctx, uint32_t vm,
> + const intel_ctx_cfg_t *cfg, uint32_t size, uint64_t start,
> + uint64_t end, uint8_t allocator_type,
> + enum allocator_strategy strategy);
> struct intel_bb *
> -intel_bb_create_with_allocator(int fd, uint32_t ctx, const intel_ctx_cfg_t *cfg,
> - uint32_t size, uint8_t allocator_type);
> +intel_bb_create_with_allocator(int fd, uint32_t ctx, uint32_t vm,
> + const intel_ctx_cfg_t *cfg, uint32_t size,
> + uint8_t allocator_type);
> struct intel_bb *intel_bb_create(int fd, uint32_t size);
> struct intel_bb *
> -intel_bb_create_with_context(int fd, uint32_t ctx, const intel_ctx_cfg_t *cfg,
> - uint32_t size);
> +intel_bb_create_with_context(int fd, uint32_t ctx, uint32_t vm,
> + const intel_ctx_cfg_t *cfg, uint32_t size);
> struct intel_bb *intel_bb_create_with_relocs(int fd, uint32_t size);
> struct intel_bb *
> intel_bb_create_with_relocs_and_context(int fd, uint32_t ctx,
> diff --git a/lib/media_fill.c b/lib/media_fill.c
> index 4f8b50e8..e80dae15 100644
> --- a/lib/media_fill.c
> +++ b/lib/media_fill.c
> @@ -309,7 +309,7 @@ __gen11_media_vme_func(int i915,
> struct intel_bb *ibb;
> uint32_t curbe_buffer, interface_descriptor;
>
> - ibb = intel_bb_create_with_context(i915, ctx, NULL, PAGE_SIZE);
> + ibb = intel_bb_create_with_context(i915, ctx, 0, NULL, PAGE_SIZE);
> intel_bb_add_intel_buf(ibb, dst, true);
> intel_bb_add_intel_buf(ibb, src, false);
>
> diff --git a/tests/i915/api_intel_bb.c b/tests/i915/api_intel_bb.c
> index 38ffd763..85ca86ee 100644
> --- a/tests/i915/api_intel_bb.c
> +++ b/tests/i915/api_intel_bb.c
> @@ -394,7 +394,7 @@ static void simple_bb(struct buf_ops *bops, bool use_context)
> if (use_context)
> gem_require_contexts(i915);
>
> - ibb = intel_bb_create_with_allocator(i915, ctx, NULL, PAGE_SIZE,
> + ibb = intel_bb_create_with_allocator(i915, ctx, 0, NULL, PAGE_SIZE,
> INTEL_ALLOCATOR_SIMPLE);
> if (debug_bb)
> intel_bb_set_debug(ibb, true);
> @@ -413,7 +413,7 @@ static void simple_bb(struct buf_ops *bops, bool use_context)
> if (use_context) {
> ctx = gem_context_create(i915);
> intel_bb_destroy(ibb);
> - ibb = intel_bb_create_with_context(i915, ctx, NULL, PAGE_SIZE);
> + ibb = intel_bb_create_with_context(i915, ctx, 0, NULL, PAGE_SIZE);
> intel_bb_out(ibb, MI_BATCH_BUFFER_END);
> intel_bb_ptr_align(ibb, 8);
> intel_bb_exec(ibb, intel_bb_offset(ibb),
> @@ -434,7 +434,7 @@ static void bb_with_allocator(struct buf_ops *bops)
>
> igt_require(gem_uses_full_ppgtt(i915));
>
> - ibb = intel_bb_create_with_allocator(i915, ctx, NULL, PAGE_SIZE,
> + ibb = intel_bb_create_with_allocator(i915, ctx, 0, NULL, PAGE_SIZE,
> INTEL_ALLOCATOR_SIMPLE);
> if (debug_bb)
> intel_bb_set_debug(ibb, true);
> @@ -768,7 +768,7 @@ static void object_noreloc(struct buf_ops *bops, enum obj_cache_ops cache_op,
>
> igt_require(gem_uses_full_ppgtt(i915));
>
> - ibb = intel_bb_create_with_allocator(i915, 0, NULL, PAGE_SIZE, allocator_type);
> + ibb = intel_bb_create_with_allocator(i915, 0, 0, NULL, PAGE_SIZE, allocator_type);
> if (debug_bb)
> intel_bb_set_debug(ibb, true);
>
> @@ -882,7 +882,7 @@ static void blit(struct buf_ops *bops,
> if (do_relocs) {
> ibb = intel_bb_create_with_relocs(i915, PAGE_SIZE);
> } else {
> - ibb = intel_bb_create_with_allocator(i915, 0, NULL, PAGE_SIZE,
> + ibb = intel_bb_create_with_allocator(i915, 0, 0, NULL, PAGE_SIZE,
> allocator_type);
> flags |= I915_EXEC_NO_RELOC;
> }
> @@ -1346,7 +1346,7 @@ static void delta_check(struct buf_ops *bops)
> uint64_t delta = gem_detect_safe_alignment(i915) + 0x1000;
> bool supports_48bit;
>
> - ibb = intel_bb_create_with_allocator(i915, 0, NULL, PAGE_SIZE,
> + ibb = intel_bb_create_with_allocator(i915, 0, 0, NULL, PAGE_SIZE,
> INTEL_ALLOCATOR_SIMPLE);
> supports_48bit = ibb->supports_48b_address;
> if (!supports_48bit)
> @@ -1466,7 +1466,7 @@ static void misplaced_blitter(struct buf_ops *bops)
> err = __intel_ctx_create(i915, &cfg, &ctx);
> igt_assert_eq(err, 0);
>
> - ibb = intel_bb_create_with_context(i915, ctx->id, &ctx->cfg, PAGE_SIZE);
> + ibb = intel_bb_create_with_context(i915, ctx->id, 0, &ctx->cfg, PAGE_SIZE);
>
> /* Prepare for blitter copy, done to verify we found the blitter engine */
> src = intel_buf_create(bops, WIDTH, HEIGHT, 32, 0, I915_TILING_NONE,
> diff --git a/tests/i915/gem_ppgtt.c b/tests/i915/gem_ppgtt.c
> index 6a0512ab..9dc6ccfe 100644
> --- a/tests/i915/gem_ppgtt.c
> +++ b/tests/i915/gem_ppgtt.c
> @@ -139,7 +139,7 @@ static void fork_rcs_copy(int timeout, uint32_t final,
> ctx = gem_context_create(buf_ops_get_fd(dst[child]->bops));
>
> ibb = intel_bb_create_with_context(buf_ops_get_fd(dst[child]->bops),
> - ctx, NULL, 4096);
> + ctx, 0, NULL, 4096);
> i = 0;
> igt_until_timeout(timeout) {
> src = create_bo(dst[child]->bops,
> diff --git a/tests/i915/gem_pxp.c b/tests/i915/gem_pxp.c
> index 7668834d..167877d3 100644
> --- a/tests/i915/gem_pxp.c
> +++ b/tests/i915/gem_pxp.c
> @@ -541,7 +541,7 @@ static void test_render_baseline(int i915)
> /* Perform a regular 3d copy as a control checkpoint */
> ret = create_ctx_with_params(i915, false, false, false, false, &ctx);
> igt_assert_eq(ret, 0);
> - ibb = intel_bb_create_with_context(i915, ctx, NULL, 4096);
> + ibb = intel_bb_create_with_context(i915, ctx, 0, NULL, 4096);
> igt_assert(ibb);
>
> dstbo = alloc_and_fill_dest_buff(i915, false, TSTSURF_SIZE, TSTSURF_INITCOLOR1);
> @@ -590,7 +590,7 @@ static void __test_render_pxp_src_to_protdest(int i915, uint32_t *outpixels, int
> ret = create_ctx_with_params(i915, true, true, true, false, &ctx);
> igt_assert_eq(ret, 0);
> igt_assert_eq(get_ctx_protected_param(i915, ctx), 1);
> - ibb = intel_bb_create_with_context(i915, ctx, NULL, 4096);
> + ibb = intel_bb_create_with_context(i915, ctx, 0, NULL, 4096);
> igt_assert(ibb);
> intel_bb_set_pxp(ibb, true, DISPLAY_APPTYPE, I915_PROTECTED_CONTENT_DEFAULT_SESSION);
>
> @@ -651,7 +651,7 @@ static void test_render_pxp_protsrc_to_protdest(int i915)
> ret = create_ctx_with_params(i915, true, true, true, false, &ctx);
> igt_assert_eq(ret, 0);
> igt_assert_eq(get_ctx_protected_param(i915, ctx), 1);
> - ibb = intel_bb_create_with_context(i915, ctx, NULL, 4096);
> + ibb = intel_bb_create_with_context(i915, ctx, 0, NULL, 4096);
> igt_assert(ibb);
> intel_bb_set_pxp(ibb, true, DISPLAY_APPTYPE, I915_PROTECTED_CONTENT_DEFAULT_SESSION);
>
> @@ -743,7 +743,7 @@ static void test_pxp_dmabuffshare_refcnt(int i915)
> ret = create_ctx_with_params(fd[n], true, true, true, false, &ctx[n]);
> igt_assert_eq(ret, 0);
> igt_assert_eq(get_ctx_protected_param(fd[n], ctx[n]), 1);
> - ibb[n] = intel_bb_create_with_context(fd[n], ctx[n], NULL, 4096);
> + ibb[n] = intel_bb_create_with_context(fd[n], ctx[n], 0, NULL, 4096);
> intel_bb_set_pxp(ibb[n], true, DISPLAY_APPTYPE,
> I915_PROTECTED_CONTENT_DEFAULT_SESSION);
>
> @@ -905,7 +905,7 @@ static void prepare_exec_assets(int i915, struct simple_exec_assets *data, bool
> ret = create_ctx_with_params(i915, false, false, false, false, &(data->ctx));
> igt_assert_eq(ret, 0);
> igt_assert_eq(get_ctx_protected_param(i915, data->ctx), ctx_pxp);
> - data->ibb = intel_bb_create_with_context(i915, data->ctx, NULL, 4096);
> + data->ibb = intel_bb_create_with_context(i915, data->ctx, 0, NULL, 4096);
> igt_assert(data->ibb);
>
> data->fencebo = alloc_and_fill_dest_buff(i915, buf_pxp, 4096, 0);
> @@ -993,7 +993,7 @@ static void test_pxp_stale_buf_execution(int i915)
> ret = create_ctx_with_params(i915, true, true, true, false, &ctx2);
> igt_assert_eq(ret, 0);
> igt_assert_eq(get_ctx_protected_param(i915, ctx2), 1);
> - ibb2 = intel_bb_create_with_context(i915, ctx2, NULL, 4096);
> + ibb2 = intel_bb_create_with_context(i915, ctx2, 0, NULL, 4096);
> igt_assert(ibb2);
> intel_bb_remove_intel_buf(data.ibb, data.fencebuf);
> intel_bb_add_intel_buf(ibb2, data.fencebuf, true);
> @@ -1094,7 +1094,7 @@ static void test_pxp_pwrcycle_staleasset_execution(int i915, struct powermgt_dat
> ret = create_ctx_with_params(i915, true, true, true, false, &ctx2);
> igt_assert_eq(ret, 0);
> igt_assert_eq(get_ctx_protected_param(i915, ctx2), 1);
> - ibb2 = intel_bb_create_with_context(i915, ctx2, NULL, 4096);
> + ibb2 = intel_bb_create_with_context(i915, ctx2, 0, NULL, 4096);
> igt_assert(ibb2);
> intel_bb_remove_intel_buf(data[1].ibb, data[1].fencebuf);
> intel_bb_add_intel_buf(ibb2, data[1].fencebuf, true);
> @@ -1154,7 +1154,7 @@ static void setup_protected_fb(int i915, int width, int height, igt_fb_t *fb, ui
> fb->plane_bpp[0], 0,
> igt_fb_mod_to_tiling(fb->modifier), 0);
>
> - ibb = intel_bb_create_with_context(i915, ctx, NULL, 4096);
> + ibb = intel_bb_create_with_context(i915, ctx, 0, NULL, 4096);
> igt_assert(ibb);
>
> ibb->pxp.enabled = true;
> diff --git a/tests/i915/kms_fence_pin_leak.c b/tests/i915/kms_fence_pin_leak.c
> index 63657a74..127c01c1 100644
> --- a/tests/i915/kms_fence_pin_leak.c
> +++ b/tests/i915/kms_fence_pin_leak.c
> @@ -62,7 +62,7 @@ static void exec_nop(data_t *data, struct igt_fb *fb, uint32_t ctx)
> intel_buf_set_ownership(dst, true);
>
> ibb = intel_bb_create_with_context(buf_ops_get_fd(data->bops),
> - ctx, NULL, 4096);
> + ctx, 0, NULL, 4096);
>
> /* add the reloc to make sure the kernel will think we write to dst */
> intel_bb_add_intel_buf(ibb, dst, true);
> diff --git a/tests/i915/perf.c b/tests/i915/perf.c
> index 9b1518d1..069ab8c0 100644
> --- a/tests/i915/perf.c
> +++ b/tests/i915/perf.c
> @@ -2071,7 +2071,7 @@ static void load_helper_init(void)
> lh.context_id = gem_context_create(drm_fd);
> igt_assert_neq(lh.context_id, 0xffffffff);
>
> - lh.ibb = intel_bb_create_with_context(drm_fd, lh.context_id, NULL, BATCH_SZ);
> + lh.ibb = intel_bb_create_with_context(drm_fd, lh.context_id, 0, NULL, BATCH_SZ);
>
> scratch_buf_init(lh.bops, &lh.dst, 1920, 1080, 0);
> scratch_buf_init(lh.bops, &lh.src, 1920, 1080, 0);
> @@ -3574,7 +3574,7 @@ gen12_test_mi_rpc(const struct intel_execution_engine2 *e)
> igt_assert_neq(ctx_id, INVALID_CTX_ID);
> properties[1] = ctx_id;
>
> - ibb = intel_bb_create_with_context(drm_fd, ctx_id, NULL, BATCH_SZ);
> + ibb = intel_bb_create_with_context(drm_fd, ctx_id, 0, NULL, BATCH_SZ);
> buf = intel_buf_create(bops, 4096, 1, 8, 64,
> I915_TILING_NONE, I915_COMPRESSION_NONE);
>
> @@ -3653,7 +3653,7 @@ test_mi_rpc(void)
>
> ctx_id = gem_context_create(drm_fd);
>
> - ibb = intel_bb_create_with_context(drm_fd, ctx_id, NULL, BATCH_SZ);
> + ibb = intel_bb_create_with_context(drm_fd, ctx_id, 0, NULL, BATCH_SZ);
> buf = intel_buf_create(bops, 4096, 1, 8, 64,
> I915_TILING_NONE, I915_COMPRESSION_NONE);
>
> @@ -3780,8 +3780,8 @@ hsw_test_single_ctx_counters(void)
> */
> context0_id = gem_context_create(drm_fd);
> context1_id = gem_context_create(drm_fd);
> - ibb0 = intel_bb_create_with_context(drm_fd, context0_id, NULL, BATCH_SZ);
> - ibb1 = intel_bb_create_with_context(drm_fd, context1_id, NULL, BATCH_SZ);
> + ibb0 = intel_bb_create_with_context(drm_fd, context0_id, 0, NULL, BATCH_SZ);
> + ibb1 = intel_bb_create_with_context(drm_fd, context1_id, 0, NULL, BATCH_SZ);
>
> igt_debug("submitting warm up render_copy\n");
>
> @@ -4024,8 +4024,8 @@ gen8_test_single_ctx_render_target_writes_a_counter(void)
>
> context0_id = gem_context_create(drm_fd);
> context1_id = gem_context_create(drm_fd);
> - ibb0 = intel_bb_create_with_context(drm_fd, context0_id, NULL, BATCH_SZ);
> - ibb1 = intel_bb_create_with_context(drm_fd, context1_id, NULL, BATCH_SZ);
> + ibb0 = intel_bb_create_with_context(drm_fd, context0_id, 0, NULL, BATCH_SZ);
> + ibb1 = intel_bb_create_with_context(drm_fd, context1_id, 0, NULL, BATCH_SZ);
>
> igt_debug("submitting warm up render_copy\n");
>
> @@ -4435,8 +4435,8 @@ static void gen12_single_ctx_helper(const struct intel_execution_engine2 *e)
>
> context0_id = gem_context_create(drm_fd);
> context1_id = gem_context_create(drm_fd);
> - ibb0 = intel_bb_create_with_context(drm_fd, context0_id, NULL, BATCH_SZ);
> - ibb1 = intel_bb_create_with_context(drm_fd, context1_id, NULL, BATCH_SZ);
> + ibb0 = intel_bb_create_with_context(drm_fd, context0_id, 0, NULL, BATCH_SZ);
> + ibb1 = intel_bb_create_with_context(drm_fd, context1_id, 0, NULL, BATCH_SZ);
>
> igt_debug("submitting warm up render_copy\n");
>
> diff --git a/tests/xe/xe_intel_bb.c b/tests/xe/xe_intel_bb.c
> index 4cdc0434..755cc530 100644
> --- a/tests/xe/xe_intel_bb.c
> +++ b/tests/xe/xe_intel_bb.c
> @@ -176,9 +176,9 @@ static void simple_bb(struct buf_ops *bops, bool new_context)
> {
> int xe = buf_ops_get_fd(bops);
> struct intel_bb *ibb;
> - uint32_t ctx = 0;
> + uint32_t ctx = 0, vm = 0;
>
> - ibb = intel_bb_create_with_allocator(xe, ctx, NULL, PAGE_SIZE,
> + ibb = intel_bb_create_with_allocator(xe, 0, 0, NULL, PAGE_SIZE,
> INTEL_ALLOCATOR_SIMPLE);
> if (debug_bb)
> intel_bb_set_debug(ibb, true);
> @@ -195,15 +195,17 @@ static void simple_bb(struct buf_ops *bops, bool new_context)
> intel_bb_reset(ibb, true);
>
> if (new_context) {
> - ctx = xe_vm_create(xe, DRM_XE_VM_CREATE_ASYNC_BIND_OPS, 0);
> + vm = xe_vm_create(xe, DRM_XE_VM_CREATE_ASYNC_BIND_OPS, 0);
> + ctx = xe_engine_create(xe, vm, xe_hw_engine(xe, 0), 0);
> intel_bb_destroy(ibb);
> - ibb = intel_bb_create_with_context(xe, ctx, NULL, PAGE_SIZE);
> + ibb = intel_bb_create_with_context(xe, ctx, vm, NULL, PAGE_SIZE);
> intel_bb_out(ibb, MI_BATCH_BUFFER_END);
> intel_bb_ptr_align(ibb, 8);
> intel_bb_exec(ibb, intel_bb_offset(ibb),
> I915_EXEC_DEFAULT | I915_EXEC_NO_RELOC,
> true);
> - xe_vm_destroy(xe, ctx);
> + xe_engine_destroy(xe, ctx);
> + xe_vm_destroy(xe, vm);
> }
>
> intel_bb_destroy(ibb);
> @@ -220,9 +222,8 @@ static void bb_with_allocator(struct buf_ops *bops)
> int xe = buf_ops_get_fd(bops);
> struct intel_bb *ibb;
> struct intel_buf *src, *dst;
> - uint32_t ctx = 0;
>
> - ibb = intel_bb_create_with_allocator(xe, ctx, NULL, PAGE_SIZE,
> + ibb = intel_bb_create_with_allocator(xe, 0, 0, NULL, PAGE_SIZE,
> INTEL_ALLOCATOR_SIMPLE);
> if (debug_bb)
> intel_bb_set_debug(ibb, true);
> @@ -455,7 +456,7 @@ static void blit(struct buf_ops *bops, uint8_t allocator_type)
> uint64_t poff_src, poff_dst;
> uint64_t flags = 0;
>
> - ibb = intel_bb_create_with_allocator(xe, 0, NULL, PAGE_SIZE,
> + ibb = intel_bb_create_with_allocator(xe, 0, 0, NULL, PAGE_SIZE,
> allocator_type);
> flags |= I915_EXEC_NO_RELOC;
>
> @@ -892,7 +893,7 @@ static void delta_check(struct buf_ops *bops)
> uint64_t obj_offset = (1ULL << 32) - xe_get_default_alignment(xe);
> uint64_t delta = xe_get_default_alignment(xe) + 0x1000;
>
> - ibb = intel_bb_create_with_allocator(xe, 0, NULL, PAGE_SIZE,
> + ibb = intel_bb_create_with_allocator(xe, 0, 0, NULL, PAGE_SIZE,
> INTEL_ALLOCATOR_SIMPLE);
> if (debug_bb)
> intel_bb_set_debug(ibb, true);
> --
> 2.40.1
>
Ok, your change looks good imo. It allows to solve my gpgpu fill problem
on pvc in two possible choices (with RENDER->COMPUTE replace I've sent
before) or with passing engine/vm (but this requires diversity code
in gpgpu pipeline creation I would like to avoid at the moment.
So from my side (but wait for the result for i915, xe I've checked
manually):
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
--
Zbigniew
^ permalink raw reply [flat|nested] 5+ messages in thread
* [igt-dev] ✗ GitLab.Pipeline: warning for lib/intel_bb: Enable custom engine support for xe (rev3)
2023-05-29 15:17 [igt-dev] [PATCH i-g-t v3] lib/intel_bb: Enable custom engine support for xe Christoph Manszewski
2023-05-30 13:27 ` Zbigniew Kempczyński
@ 2023-05-30 14:04 ` Patchwork
2023-05-30 14:28 ` [igt-dev] ✓ Fi.CI.BAT: success " Patchwork
2023-05-31 6:47 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
3 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2023-05-30 14:04 UTC (permalink / raw)
To: Manszewski, Christoph; +Cc: igt-dev
== Series Details ==
Series: lib/intel_bb: Enable custom engine support for xe (rev3)
URL : https://patchwork.freedesktop.org/series/118227/
State : warning
== Summary ==
Pipeline status: FAILED.
see https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/pipelines/894550 for the overview.
build-containers:build-debian has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/42709996):
time="2023-05-30T13:59:33Z" level=fatal msg="Invalid status code returned when fetching blob 500 (Internal Server Error)"
Building!
STEP 1: FROM debian:buster
Getting image source signatures
Copying blob sha256:c722db24a050621ee87ea07acd5d066d3d6a94737c32012f27d73a1ad5cc645c
Copying config sha256:8b5601a5a7f855241ac7f372ec0042e793b0b3eb3f3a601014845f22bd371c90
Writing manifest to image destination
Storing signatures
STEP 2: RUN apt-get update
error running container: error creating container for [/bin/sh -c apt-get update]: time="2023-05-30T13:59:38Z" level=warning msg="signal: killed"
time="2023-05-30T13:59:38Z" level=error msg="container_linux.go:346: starting container process caused \"process_linux.go:297: applying cgroup configuration for process caused \\\"mountpoint for cgroup not found\\\"\"\n"
container_linux.go:346: starting container process caused "process_linux.go:297: applying cgroup configuration for process caused \"mountpoint for cgroup not found\""
: exit status 1
Error: error building at STEP "RUN apt-get update": error while running runtime: exit status 1
section_end:1685455180:step_script
section_start:1685455180:cleanup_file_variables
Cleaning up project directory and file based variables
section_end:1685455181:cleanup_file_variables
ERROR: Job failed: exit code 1
build-containers:build-debian-arm64 has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/42709998):
time="2023-05-30T13:59:49Z" level=fatal msg="Invalid status code returned when fetching blob 500 (Internal Server Error)"
Building!
STEP 1: FROM debian:buster
Getting image source signatures
Copying blob sha256:c722db24a050621ee87ea07acd5d066d3d6a94737c32012f27d73a1ad5cc645c
Copying config sha256:8b5601a5a7f855241ac7f372ec0042e793b0b3eb3f3a601014845f22bd371c90
Writing manifest to image destination
Storing signatures
STEP 2: RUN apt-get update
error running container: error creating container for [/bin/sh -c apt-get update]: time="2023-05-30T13:59:55Z" level=warning msg="signal: killed"
time="2023-05-30T13:59:55Z" level=error msg="container_linux.go:346: starting container process caused \"process_linux.go:297: applying cgroup configuration for process caused \\\"mountpoint for cgroup not found\\\"\"\n"
container_linux.go:346: starting container process caused "process_linux.go:297: applying cgroup configuration for process caused \"mountpoint for cgroup not found\""
: exit status 1
Error: error building at STEP "RUN apt-get update": error while running runtime: exit status 1
section_end:1685455196:step_script
section_start:1685455196:cleanup_file_variables
Cleaning up project directory and file based variables
section_end:1685455197:cleanup_file_variables
ERROR: Job failed: exit code 1
build-containers:build-debian-armhf has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/42709997):
time="2023-05-30T13:59:34Z" level=fatal msg="Invalid status code returned when fetching blob 500 (Internal Server Error)"
Building!
STEP 1: FROM debian:buster
Getting image source signatures
Copying blob sha256:c722db24a050621ee87ea07acd5d066d3d6a94737c32012f27d73a1ad5cc645c
Copying config sha256:8b5601a5a7f855241ac7f372ec0042e793b0b3eb3f3a601014845f22bd371c90
Writing manifest to image destination
Storing signatures
STEP 2: RUN apt-get update
error running container: error creating container for [/bin/sh -c apt-get update]: time="2023-05-30T13:59:39Z" level=warning msg="signal: killed"
time="2023-05-30T13:59:39Z" level=error msg="container_linux.go:346: starting container process caused \"process_linux.go:297: applying cgroup configuration for process caused \\\"mountpoint for cgroup not found\\\"\"\n"
container_linux.go:346: starting container process caused "process_linux.go:297: applying cgroup configuration for process caused \"mountpoint for cgroup not found\""
: exit status 1
Error: error building at STEP "RUN apt-get update": error while running runtime: exit status 1
section_end:1685455180:step_script
section_start:1685455180:cleanup_file_variables
Cleaning up project directory and file based variables
section_end:1685455181:cleanup_file_variables
ERROR: Job failed: exit code 1
build-containers:build-debian-mips has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/42709999):
time="2023-05-30T14:00:12Z" level=fatal msg="Invalid status code returned when fetching blob 500 (Internal Server Error)"
Building!
STEP 1: FROM debian:buster
Getting image source signatures
Copying blob sha256:c722db24a050621ee87ea07acd5d066d3d6a94737c32012f27d73a1ad5cc645c
Copying config sha256:8b5601a5a7f855241ac7f372ec0042e793b0b3eb3f3a601014845f22bd371c90
Writing manifest to image destination
Storing signatures
STEP 2: RUN apt-get update
error running container: error creating container for [/bin/sh -c apt-get update]: time="2023-05-30T14:00:17Z" level=warning msg="signal: killed"
time="2023-05-30T14:00:17Z" level=error msg="container_linux.go:346: starting container process caused \"process_linux.go:297: applying cgroup configuration for process caused \\\"mountpoint for cgroup not found\\\"\"\n"
container_linux.go:346: starting container process caused "process_linux.go:297: applying cgroup configuration for process caused \"mountpoint for cgroup not found\""
: exit status 1
Error: error building at STEP "RUN apt-get update": error while running runtime: exit status 1
section_end:1685455220:step_script
section_start:1685455220:cleanup_file_variables
Cleaning up project directory and file based variables
section_end:1685455223:cleanup_file_variables
ERROR: Job failed: exit code 1
build-containers:build-fedora has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/42710000):
"maintainer": "Clement Verna \u003ccverna@fedoraproject.org\u003e"
},
"Architecture": "amd64",
"Os": "linux",
"Layers": [
"sha256:b39735705e69a2516323755ff4698ea5cd86b08b31d8c8287bc83d76d34c3bfc"
]
}
Skipping, already built
Getting image source signatures
Copying blob sha256:b39735705e69a2516323755ff4698ea5cd86b08b31d8c8287bc83d76d34c3bfc
Copying config sha256:4b3054d89ef79f9be95501786fbbbe22857d02c867fff99693808cd80909939f
Writing manifest to image destination
time="2023-05-30T14:00:05Z" level=fatal msg="Error writing manifest: Error uploading manifest commit-593f5a445f3b5d0d94702273da07c4aa0097c794 to registry.freedesktop.org/gfx-ci/igt-ci-tags/build-fedora: received unexpected HTTP status: 500 Internal Server Error"
section_end:1685455205:step_script
section_start:1685455205:cleanup_file_variables
Cleaning up project directory and file based variables
section_end:1685455207:cleanup_file_variables
ERROR: Job failed: exit code 1
== Logs ==
For more details see: https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/pipelines/894550
^ permalink raw reply [flat|nested] 5+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for lib/intel_bb: Enable custom engine support for xe (rev3)
2023-05-29 15:17 [igt-dev] [PATCH i-g-t v3] lib/intel_bb: Enable custom engine support for xe Christoph Manszewski
2023-05-30 13:27 ` Zbigniew Kempczyński
2023-05-30 14:04 ` [igt-dev] ✗ GitLab.Pipeline: warning for lib/intel_bb: Enable custom engine support for xe (rev3) Patchwork
@ 2023-05-30 14:28 ` Patchwork
2023-05-31 6:47 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
3 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2023-05-30 14:28 UTC (permalink / raw)
To: Manszewski, Christoph; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 5382 bytes --]
== Series Details ==
Series: lib/intel_bb: Enable custom engine support for xe (rev3)
URL : https://patchwork.freedesktop.org/series/118227/
State : success
== Summary ==
CI Bug Log - changes from IGT_7310 -> IGTPW_9063
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/index.html
Participating hosts (38 -> 37)
------------------------------
Missing (1): fi-kbl-soraka
Known issues
------------
Here are the changes found in IGTPW_9063 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@core_hotunplug@unbind-rebind:
- fi-kbl-8809g: NOTRUN -> [ABORT][1] ([i915#8298] / [i915#8299] / [i915#8397])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/fi-kbl-8809g/igt@core_hotunplug@unbind-rebind.html
* igt@gem_huc_copy@huc-copy:
- fi-kbl-8809g: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#2190])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/fi-kbl-8809g/igt@gem_huc_copy@huc-copy.html
* igt@i915_selftest@live@requests:
- bat-rpls-2: [PASS][3] -> [ABORT][4] ([i915#4983] / [i915#7913])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7310/bat-rpls-2/igt@i915_selftest@live@requests.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/bat-rpls-2/igt@i915_selftest@live@requests.html
* igt@kms_addfb_basic@too-high:
- fi-kbl-8809g: NOTRUN -> [FAIL][5] ([i915#8296]) +2 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/fi-kbl-8809g/igt@kms_addfb_basic@too-high.html
* igt@kms_force_connector_basic@force-connector-state:
- fi-kbl-8809g: NOTRUN -> [DMESG-FAIL][6] ([i915#8299])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/fi-kbl-8809g/igt@kms_force_connector_basic@force-connector-state.html
* igt@kms_force_connector_basic@force-edid:
- fi-kbl-8809g: NOTRUN -> [CRASH][7] ([i915#8299])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/fi-kbl-8809g/igt@kms_force_connector_basic@force-edid.html
* igt@kms_psr@cursor_plane_move:
- fi-kbl-8809g: NOTRUN -> [SKIP][8] ([fdo#109271]) +59 similar issues
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/fi-kbl-8809g/igt@kms_psr@cursor_plane_move.html
* igt@kms_setmode@basic-clone-single-crtc:
- fi-kbl-8809g: NOTRUN -> [SKIP][9] ([fdo#109271] / [i915#4579])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/fi-kbl-8809g/igt@kms_setmode@basic-clone-single-crtc.html
#### Possible fixes ####
* igt@core_hotunplug@unbind-rebind:
- {bat-mtlp-6}: [ABORT][10] -> [PASS][11]
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7310/bat-mtlp-6/igt@core_hotunplug@unbind-rebind.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/bat-mtlp-6/igt@core_hotunplug@unbind-rebind.html
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-hsw-4770: [SKIP][12] ([fdo#109271]) -> [PASS][13]
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7310/fi-hsw-4770/igt@i915_pm_rpm@basic-pci-d3-state.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/fi-hsw-4770/igt@i915_pm_rpm@basic-pci-d3-state.html
* igt@i915_pm_rpm@basic-rte:
- fi-hsw-4770: [FAIL][14] ([i915#7364]) -> [PASS][15]
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7310/fi-hsw-4770/igt@i915_pm_rpm@basic-rte.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/fi-hsw-4770/igt@i915_pm_rpm@basic-rte.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645
[i915#7364]: https://gitlab.freedesktop.org/drm/intel/issues/7364
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
[i915#8296]: https://gitlab.freedesktop.org/drm/intel/issues/8296
[i915#8298]: https://gitlab.freedesktop.org/drm/intel/issues/8298
[i915#8299]: https://gitlab.freedesktop.org/drm/intel/issues/8299
[i915#8397]: https://gitlab.freedesktop.org/drm/intel/issues/8397
[i915#8497]: https://gitlab.freedesktop.org/drm/intel/issues/8497
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_7310 -> IGTPW_9063
CI-20190529: 20190529
CI_DRM_13200: 0ae4ee2c735979030a0219218081eee661606921 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_9063: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/index.html
IGT_7310: 2f9acfea5e3a93303f71cbda6e80ba64b8d75a4d @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/index.html
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^ permalink raw reply [flat|nested] 5+ messages in thread
* [igt-dev] ✓ Fi.CI.IGT: success for lib/intel_bb: Enable custom engine support for xe (rev3)
2023-05-29 15:17 [igt-dev] [PATCH i-g-t v3] lib/intel_bb: Enable custom engine support for xe Christoph Manszewski
` (2 preceding siblings ...)
2023-05-30 14:28 ` [igt-dev] ✓ Fi.CI.BAT: success " Patchwork
@ 2023-05-31 6:47 ` Patchwork
3 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2023-05-31 6:47 UTC (permalink / raw)
To: Manszewski, Christoph; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 20791 bytes --]
== Series Details ==
Series: lib/intel_bb: Enable custom engine support for xe (rev3)
URL : https://patchwork.freedesktop.org/series/118227/
State : success
== Summary ==
CI Bug Log - changes from IGT_7310_full -> IGTPW_9063_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/index.html
Participating hosts (7 -> 7)
------------------------------
No changes in participating hosts
New tests
---------
New tests have been introduced between IGT_7310_full and IGTPW_9063_full:
### New IGT tests (3) ###
* igt@kms_plane_scaling@plane-scaler-with-rotation-unity-scaling@pipe-a-hdmi-a-2:
- Statuses : 1 skip(s)
- Exec time: [0.0] s
* igt@kms_plane_scaling@plane-upscale-with-modifiers-20x20@pipe-a-hdmi-a-2:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_plane_scaling@plane-upscale-with-rotation-factor-0-25@pipe-a-hdmi-a-2:
- Statuses : 1 skip(s)
- Exec time: [0.0] s
Known issues
------------
Here are the changes found in IGTPW_9063_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_barrier_race@remote-request@rcs0:
- shard-apl: [PASS][1] -> [ABORT][2] ([i915#7461] / [i915#8211] / [i915#8234])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7310/shard-apl7/igt@gem_barrier_race@remote-request@rcs0.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/shard-apl3/igt@gem_barrier_race@remote-request@rcs0.html
* igt@gem_ctx_persistence@legacy-engines-hang@render:
- shard-apl: [PASS][3] -> [FAIL][4] ([i915#2410])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7310/shard-apl7/igt@gem_ctx_persistence@legacy-engines-hang@render.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/shard-apl4/igt@gem_ctx_persistence@legacy-engines-hang@render.html
* igt@gem_exec_fair@basic-deadline:
- shard-glk: [PASS][5] -> [FAIL][6] ([i915#2846])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7310/shard-glk8/igt@gem_exec_fair@basic-deadline.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/shard-glk1/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-pace@vcs0:
- shard-glk: [PASS][7] -> [FAIL][8] ([i915#2842]) +2 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7310/shard-glk9/igt@gem_exec_fair@basic-pace@vcs0.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/shard-glk9/igt@gem_exec_fair@basic-pace@vcs0.html
* igt@kms_async_flips@alternate-sync-async-flip@pipe-c-hdmi-a-2:
- shard-glk: [PASS][9] -> [FAIL][10] ([i915#2521])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7310/shard-glk5/igt@kms_async_flips@alternate-sync-async-flip@pipe-c-hdmi-a-2.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/shard-glk2/igt@kms_async_flips@alternate-sync-async-flip@pipe-c-hdmi-a-2.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
- shard-apl: [PASS][11] -> [FAIL][12] ([IGT#6] / [i915#2346])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7310/shard-apl6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/shard-apl2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-hdmi-a1-hdmi-a2:
- shard-glk: [PASS][13] -> [FAIL][14] ([i915#79]) +1 similar issue
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7310/shard-glk5/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-hdmi-a1-hdmi-a2.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/shard-glk5/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-hdmi-a1-hdmi-a2.html
* igt@kms_plane_scaling@plane-upscale-with-rotation-factor-0-25@pipe-a-hdmi-a-2 (NEW):
- {shard-rkl}: NOTRUN -> [SKIP][15] ([i915#5176]) +1 similar issue
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/shard-rkl-6/igt@kms_plane_scaling@plane-upscale-with-rotation-factor-0-25@pipe-a-hdmi-a-2.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-b-vga-1:
- shard-snb: NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#4579]) +8 similar issues
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/shard-snb4/igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-b-vga-1.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-a-vga-1:
- shard-snb: NOTRUN -> [SKIP][17] ([fdo#109271]) +10 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/shard-snb4/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-a-vga-1.html
* igt@perf@stress-open-close@0-rcs0:
- shard-glk: [PASS][18] -> [ABORT][19] ([i915#5213] / [i915#7941])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7310/shard-glk2/igt@perf@stress-open-close@0-rcs0.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/shard-glk1/igt@perf@stress-open-close@0-rcs0.html
#### Possible fixes ####
* igt@drm_fdinfo@most-busy-check-all@rcs0:
- {shard-rkl}: [FAIL][20] ([i915#7742]) -> [PASS][21]
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7310/shard-rkl-4/igt@drm_fdinfo@most-busy-check-all@rcs0.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/shard-rkl-7/igt@drm_fdinfo@most-busy-check-all@rcs0.html
* igt@gem_barrier_race@remote-request@rcs0:
- {shard-tglu}: [ABORT][22] ([i915#8211] / [i915#8234]) -> [PASS][23]
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7310/shard-tglu-10/igt@gem_barrier_race@remote-request@rcs0.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/shard-tglu-6/igt@gem_barrier_race@remote-request@rcs0.html
* igt@gem_ctx_exec@basic-nohangcheck:
- {shard-tglu}: [FAIL][24] ([i915#6268]) -> [PASS][25]
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7310/shard-tglu-9/igt@gem_ctx_exec@basic-nohangcheck.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/shard-tglu-3/igt@gem_ctx_exec@basic-nohangcheck.html
* igt@gem_ctx_freq@sysfs:
- {shard-dg1}: [FAIL][26] ([i915#6786]) -> [PASS][27]
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7310/shard-dg1-14/igt@gem_ctx_freq@sysfs.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/shard-dg1-16/igt@gem_ctx_freq@sysfs.html
* igt@gem_exec_fair@basic-none@bcs0:
- {shard-rkl}: [FAIL][28] ([i915#2842]) -> [PASS][29]
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7310/shard-rkl-6/igt@gem_exec_fair@basic-none@bcs0.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/shard-rkl-7/igt@gem_exec_fair@basic-none@bcs0.html
* igt@i915_pm_rc6_residency@rc6-idle@bcs0:
- {shard-dg1}: [FAIL][30] ([i915#3591]) -> [PASS][31]
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7310/shard-dg1-14/igt@i915_pm_rc6_residency@rc6-idle@bcs0.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/shard-dg1-15/igt@i915_pm_rc6_residency@rc6-idle@bcs0.html
* igt@i915_pm_rpm@dpms-mode-unset-lpsp:
- {shard-rkl}: [SKIP][32] ([i915#1397]) -> [PASS][33] +1 similar issue
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7310/shard-rkl-4/igt@i915_pm_rpm@dpms-mode-unset-lpsp.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/shard-rkl-7/igt@i915_pm_rpm@dpms-mode-unset-lpsp.html
* igt@i915_selftest@live@workarounds:
- {shard-dg1}: [ABORT][34] ([i915#4983]) -> [PASS][35]
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7310/shard-dg1-16/igt@i915_selftest@live@workarounds.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/shard-dg1-17/igt@i915_selftest@live@workarounds.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
- {shard-rkl}: [FAIL][36] ([i915#3743]) -> [PASS][37] +1 similar issue
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7310/shard-rkl-7/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/shard-rkl-2/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
* igt@kms_hdmi_inject@inject-audio:
- {shard-rkl}: [SKIP][38] ([i915#433]) -> [PASS][39]
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7310/shard-rkl-3/igt@kms_hdmi_inject@inject-audio.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/shard-rkl-3/igt@kms_hdmi_inject@inject-audio.html
- shard-snb: [SKIP][40] ([fdo#109271]) -> [PASS][41]
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7310/shard-snb4/igt@kms_hdmi_inject@inject-audio.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/shard-snb6/igt@kms_hdmi_inject@inject-audio.html
- shard-glk: [SKIP][42] ([IGT#6] / [fdo#109271]) -> [PASS][43]
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7310/shard-glk9/igt@kms_hdmi_inject@inject-audio.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/shard-glk9/igt@kms_hdmi_inject@inject-audio.html
* igt@perf_pmu@busy-double-start@vecs0:
- {shard-dg1}: [FAIL][44] ([i915#4349]) -> [PASS][45] +2 similar issues
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7310/shard-dg1-14/igt@perf_pmu@busy-double-start@vecs0.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/shard-dg1-14/igt@perf_pmu@busy-double-start@vecs0.html
#### Warnings ####
* igt@kms_big_fb@4-tiled-32bpp-rotate-0:
- shard-apl: [SKIP][46] ([fdo#109271]) -> [SKIP][47] ([IGT#6] / [fdo#109271]) +3 similar issues
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7310/shard-apl1/igt@kms_big_fb@4-tiled-32bpp-rotate-0.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/shard-apl4/igt@kms_big_fb@4-tiled-32bpp-rotate-0.html
* igt@kms_big_fb@4-tiled-64bpp-rotate-180:
- shard-glk: [SKIP][48] ([fdo#109271]) -> [SKIP][49] ([IGT#6] / [fdo#109271]) +3 similar issues
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7310/shard-glk8/igt@kms_big_fb@4-tiled-64bpp-rotate-180.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/shard-glk4/igt@kms_big_fb@4-tiled-64bpp-rotate-180.html
* igt@kms_content_protection@mei_interface:
- shard-apl: [SKIP][50] ([IGT#6] / [fdo#109271] / [i915#4579]) -> [SKIP][51] ([IGT#6] / [fdo#109271])
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7310/shard-apl4/igt@kms_content_protection@mei_interface.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/shard-apl6/igt@kms_content_protection@mei_interface.html
- shard-snb: [SKIP][52] ([fdo#109271] / [i915#4579]) -> [SKIP][53] ([fdo#109271])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7310/shard-snb5/igt@kms_content_protection@mei_interface.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/shard-snb6/igt@kms_content_protection@mei_interface.html
- shard-glk: [SKIP][54] ([IGT#6] / [fdo#109271] / [i915#4579]) -> [SKIP][55] ([IGT#6] / [fdo#109271])
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7310/shard-glk7/igt@kms_content_protection@mei_interface.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/shard-glk8/igt@kms_content_protection@mei_interface.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[IGT#6]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/6
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109300]: https://bugs.freedesktop.org/show_bug.cgi?id=109300
[fdo#109302]: https://bugs.freedesktop.org/show_bug.cgi?id=109302
[fdo#109303]: https://bugs.freedesktop.org/show_bug.cgi?id=109303
[fdo#109307]: https://bugs.freedesktop.org/show_bug.cgi?id=109307
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1257]: https://gitlab.freedesktop.org/drm/intel/issues/1257
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2410]: https://gitlab.freedesktop.org/drm/intel/issues/2410
[i915#2434]: https://gitlab.freedesktop.org/drm/intel/issues/2434
[i915#2521]: https://gitlab.freedesktop.org/drm/intel/issues/2521
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#3023]: https://gitlab.freedesktop.org/drm/intel/issues/3023
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
[i915#3318]: https://gitlab.freedesktop.org/drm/intel/issues/3318
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3528]: https://gitlab.freedesktop.org/drm/intel/issues/3528
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734
[i915#3743]: https://gitlab.freedesktop.org/drm/intel/issues/3743
[i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#426]: https://gitlab.freedesktop.org/drm/intel/issues/426
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4281]: https://gitlab.freedesktop.org/drm/intel/issues/4281
[i915#433]: https://gitlab.freedesktop.org/drm/intel/issues/433
[i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349
[i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391
[i915#4423]: https://gitlab.freedesktop.org/drm/intel/issues/4423
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#4565]: https://gitlab.freedesktop.org/drm/intel/issues/4565
[i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771
[i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
[i915#4818]: https://gitlab.freedesktop.org/drm/intel/issues/4818
[i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
[i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
[i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
[i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880
[i915#4885]: https://gitlab.freedesktop.org/drm/intel/issues/4885
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#5122]: https://gitlab.freedesktop.org/drm/intel/issues/5122
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5213]: https://gitlab.freedesktop.org/drm/intel/issues/5213
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#5461]: https://gitlab.freedesktop.org/drm/intel/issues/5461
[i915#5493]: https://gitlab.freedesktop.org/drm/intel/issues/5493
[i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6230]: https://gitlab.freedesktop.org/drm/intel/issues/6230
[i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
[i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433
[i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6590]: https://gitlab.freedesktop.org/drm/intel/issues/6590
[i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
[i915#6786]: https://gitlab.freedesktop.org/drm/intel/issues/6786
[i915#6944]: https://gitlab.freedesktop.org/drm/intel/issues/6944
[i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953
[i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
[i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
[i915#7461]: https://gitlab.freedesktop.org/drm/intel/issues/7461
[i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701
[i915#7707]: https://gitlab.freedesktop.org/drm/intel/issues/7707
[i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
[i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#7941]: https://gitlab.freedesktop.org/drm/intel/issues/7941
[i915#7975]: https://gitlab.freedesktop.org/drm/intel/issues/7975
[i915#8011]: https://gitlab.freedesktop.org/drm/intel/issues/8011
[i915#8211]: https://gitlab.freedesktop.org/drm/intel/issues/8211
[i915#8213]: https://gitlab.freedesktop.org/drm/intel/issues/8213
[i915#8228]: https://gitlab.freedesktop.org/drm/intel/issues/8228
[i915#8234]: https://gitlab.freedesktop.org/drm/intel/issues/8234
[i915#8311]: https://gitlab.freedesktop.org/drm/intel/issues/8311
[i915#8414]: https://gitlab.freedesktop.org/drm/intel/issues/8414
[i915#8502]: https://gitlab.freedesktop.org/drm/intel/issues/8502
[i915#8516]: https://gitlab.freedesktop.org/drm/intel/issues/8516
[i915#8555]: https://gitlab.freedesktop.org/drm/intel/issues/8555
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_7310 -> IGTPW_9063
CI-20190529: 20190529
CI_DRM_13200: 0ae4ee2c735979030a0219218081eee661606921 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_9063: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/index.html
IGT_7310: 2f9acfea5e3a93303f71cbda6e80ba64b8d75a4d @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9063/index.html
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Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-05-29 15:17 [igt-dev] [PATCH i-g-t v3] lib/intel_bb: Enable custom engine support for xe Christoph Manszewski
2023-05-30 13:27 ` Zbigniew Kempczyński
2023-05-30 14:04 ` [igt-dev] ✗ GitLab.Pipeline: warning for lib/intel_bb: Enable custom engine support for xe (rev3) Patchwork
2023-05-30 14:28 ` [igt-dev] ✓ Fi.CI.BAT: success " Patchwork
2023-05-31 6:47 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
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