* [igt-dev] [PATCH i-g-t 0/3] Try to have one less blitter path.
@ 2023-05-31 19:21 Juha-Pekka Heikkila
2023-05-31 19:21 ` [igt-dev] [PATCH i-g-t 1/3] lib/i915/i915_blt: Add offset to block and fast copy Juha-Pekka Heikkila
` (4 more replies)
0 siblings, 5 replies; 11+ messages in thread
From: Juha-Pekka Heikkila @ 2023-05-31 19:21 UTC (permalink / raw)
To: igt-dev
Here switch blitcopy in igt_fb.c to use lib/i915/i915_blt functions. This allow
start to use blitter path for doing rc ccs comression with new hardware, here
limit is set at having flat ccs since i915_blt functions didn't have aux ccs
support.
For compressing mc ccs still need to use Vebox copy as it seems copy engine
doesn't support destination compression with mc ccs.
/Juha-Pekka
Juha-Pekka Heikkila (3):
lib/i915/i915_blt: Add offset to block and fast copy
lib/igt_fb: switch blitcopy to use lib/i915/i915_blt functions
lib/igt_fb: use blitter for rendercompression on Intel hw with flat
ccs
lib/i915/i915_blt.c | 12 ++-
lib/i915/i915_blt.h | 3 +
lib/igt_fb.c | 254 +++++++++++++++++++++++++++++++++++++-------
3 files changed, 224 insertions(+), 45 deletions(-)
--
2.25.1
^ permalink raw reply [flat|nested] 11+ messages in thread* [igt-dev] [PATCH i-g-t 1/3] lib/i915/i915_blt: Add offset to block and fast copy 2023-05-31 19:21 [igt-dev] [PATCH i-g-t 0/3] Try to have one less blitter path Juha-Pekka Heikkila @ 2023-05-31 19:21 ` Juha-Pekka Heikkila 2023-05-31 19:21 ` [igt-dev] [PATCH i-g-t 2/3] lib/igt_fb: switch blitcopy to use lib/i915/i915_blt functions Juha-Pekka Heikkila ` (3 subsequent siblings) 4 siblings, 0 replies; 11+ messages in thread From: Juha-Pekka Heikkila @ 2023-05-31 19:21 UTC (permalink / raw) To: igt-dev Add offset to src and dst blits, this allow to use i915_blt with multiplane framebuffers. Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> --- lib/i915/i915_blt.c | 12 ++++++++---- lib/i915/i915_blt.h | 3 +++ 2 files changed, 11 insertions(+), 4 deletions(-) diff --git a/lib/i915/i915_blt.c b/lib/i915/i915_blt.c index ef67fe26..f18b6326 100644 --- a/lib/i915/i915_blt.c +++ b/lib/i915/i915_blt.c @@ -708,8 +708,10 @@ uint64_t emit_blt_block_copy(int i915, igt_assert_f(blt, "block-copy requires data to do blit\n"); alignment = gem_detect_safe_alignment(i915); - src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment); - dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment); + src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment) + + blt->src.plane_offset; + dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment) + + blt->dst.plane_offset; bb_offset = get_offset(ahnd, blt->bb.handle, blt->bb.size, alignment); fill_data(&data, blt, src_offset, dst_offset, ext); @@ -1179,8 +1181,10 @@ uint64_t emit_blt_fast_copy(int i915, data.dw03.dst_x2 = blt->dst.x2; data.dw03.dst_y2 = blt->dst.y2; - src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment); - dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment); + src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment) + + blt->src.plane_offset; + dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment) + + blt->dst.plane_offset; bb_offset = get_offset(ahnd, blt->bb.handle, blt->bb.size, alignment); data.dw04.dst_address_lo = dst_offset; diff --git a/lib/i915/i915_blt.h b/lib/i915/i915_blt.h index a5f0edd1..05a80ce6 100644 --- a/lib/i915/i915_blt.h +++ b/lib/i915/i915_blt.h @@ -85,6 +85,9 @@ struct blt_copy_object { /* mapping or null */ uint32_t *ptr; + + /* enable to use multiplane framebuffers */ + uint32_t plane_offset; }; struct blt_copy_batch { -- 2.25.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* [igt-dev] [PATCH i-g-t 2/3] lib/igt_fb: switch blitcopy to use lib/i915/i915_blt functions 2023-05-31 19:21 [igt-dev] [PATCH i-g-t 0/3] Try to have one less blitter path Juha-Pekka Heikkila 2023-05-31 19:21 ` [igt-dev] [PATCH i-g-t 1/3] lib/i915/i915_blt: Add offset to block and fast copy Juha-Pekka Heikkila @ 2023-05-31 19:21 ` Juha-Pekka Heikkila 2023-06-07 6:47 ` Zbigniew Kempczyński 2023-05-31 19:21 ` [igt-dev] [PATCH i-g-t 3/3] lib/igt_fb: use blitter for rendercompression on Intel hw with flat ccs Juha-Pekka Heikkila ` (2 subsequent siblings) 4 siblings, 1 reply; 11+ messages in thread From: Juha-Pekka Heikkila @ 2023-05-31 19:21 UTC (permalink / raw) To: igt-dev reduce code duplication Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> --- lib/igt_fb.c | 243 +++++++++++++++++++++++++++++++++++++++++++-------- 1 file changed, 205 insertions(+), 38 deletions(-) diff --git a/lib/igt_fb.c b/lib/igt_fb.c index 71a199d4..b3fc3766 100644 --- a/lib/igt_fb.c +++ b/lib/igt_fb.c @@ -35,6 +35,8 @@ #include "drmtest.h" #include "i915/gem_create.h" #include "i915/gem_mman.h" +#include "i915/i915_blt.h" +#include "i915/intel_mocs.h" #include "igt_aux.h" #include "igt_color_encoding.h" #include "igt_fb.h" @@ -2453,21 +2455,30 @@ struct fb_blit_upload { struct intel_bb *ibb; }; -static bool fast_blit_ok(const struct igt_fb *fb) +static enum blt_tiling_type fb_tile_to_blt_tile(uint64_t tile) { - int dev_id = intel_get_drm_devid(fb->fd); - int ver = intel_display_ver(dev_id); - - if (ver < 9) - return false; - - if (ver < 12) - return true; - - if (ver >= 13 && !IS_ALDERLAKE_P(dev_id)) - return true; + switch (igt_fb_mod_to_tiling(tile)) { + case I915_TILING_NONE: + return T_LINEAR; + case I915_TILING_X: + return T_XMAJOR; + case I915_TILING_Y: + return T_YMAJOR; + case I915_TILING_4: + return T_TILE4; + case I915_TILING_Yf: + return T_YFMAJOR; + default: + igt_assert_f(0, "Unknown tiling!\n"); + } +} - return fb->modifier != I915_FORMAT_MOD_X_TILED; +static bool fast_blit_ok(const struct igt_fb *fb) +{ + return blt_has_fast_copy(fb->fd) && + !is_ccs_modifier(fb->modifier) && + blt_block_copy_supports_tiling(fb->fd, + fb_tile_to_blt_tile(fb->modifier)); } static bool blitter_ok(const struct igt_fb *fb) @@ -2510,9 +2521,10 @@ static bool use_enginecopy(const struct igt_fb *fb) return false; return fb->modifier == I915_FORMAT_MOD_Yf_TILED || - is_ccs_modifier(fb->modifier) || + (!HAS_FLATCCS(intel_get_drm_devid(fb->fd)) && is_ccs_modifier(fb->modifier)) || (is_xe_device(fb->fd) && fb->modifier == DRM_FORMAT_MOD_LINEAR) || - (is_i915_device(fb->fd) && !gem_has_mappable_ggtt(fb->fd)); + (is_i915_device(fb->fd) && !gem_has_mappable_ggtt(fb->fd)) || + is_gen12_mc_ccs_modifier(fb->modifier); } static bool use_blitter(const struct igt_fb *fb) @@ -2712,12 +2724,115 @@ static void copy_with_engine(struct fb_blit_upload *blit, fini_buf(src); } +static struct blt_copy_object *blt_fb_init(const struct igt_fb *fb, + uint32_t plane, uint32_t memregion) +{ + uint32_t name, handle; + struct blt_copy_object *blt; + enum blt_tiling_type blt_tile; + uint64_t stride; + + blt = malloc(sizeof(*blt)); + igt_assert(blt); + + name = gem_flink(fb->fd, fb->gem_handle); + handle = gem_open(fb->fd, name); + + blt_tile = fb_tile_to_blt_tile(fb->modifier); + stride = blt_tile == T_LINEAR ? fb->strides[plane] : fb->strides[plane] / 4; + + blt_set_object(blt, handle, fb->size, memregion, + intel_get_uc_mocs(fb->fd), + blt_tile, + is_ccs_modifier(fb->modifier) ? COMPRESSION_ENABLED : COMPRESSION_DISABLED, + is_gen12_mc_ccs_modifier(fb->modifier) ? COMPRESSION_TYPE_MEDIA : COMPRESSION_TYPE_3D); + + blt_set_geom(blt, stride, 0, 0, fb->width, fb->plane_height[plane], 0, 0); + + blt->plane_offset = fb->offsets[plane]; + + blt->ptr = gem_mmap__device_coherent(fb->fd, handle, 0, fb->size, + PROT_READ | PROT_WRITE); + return blt; +} + +static enum blt_color_depth blt_get_bpp(const struct igt_fb *fb) +{ + switch (fb->plane_bpp[0]) { + case 8: + return CD_8bit; + case 16: + return CD_16bit; + case 32: + return CD_32bit; + case 64: + return CD_64bit; + case 96: + return CD_96bit; + case 128: + return CD_128bit; + default: + igt_assert(0); + } +} + +#define BLT_TARGET_RC(x) (x.compression == COMPRESSION_ENABLED && \ + x.compression_type == COMPRESSION_TYPE_3D) + +#define BLT_TARGET_MC(x) (x.compression == COMPRESSION_ENABLED && \ + x.compression_type == COMPRESSION_TYPE_MEDIA) + +static uint32_t blt_compression_format(struct blt_copy_data *blt, + const struct igt_fb *fb) +{ + if (blt->src.compression == COMPRESSION_DISABLED && + blt->dst.compression == COMPRESSION_DISABLED) + return 0; + + if (BLT_TARGET_RC(blt->src) || BLT_TARGET_RC(blt->dst)) { + switch (blt->color_depth) { + case CD_32bit: + return 8; + default: + igt_assert_f(0, "COMPRESSION_TYPE_3D unknown color depth\n"); + } + } else if (BLT_TARGET_MC(blt->src)) { + switch (fb->drm_format) { + case DRM_FORMAT_XRGB8888: + return 8; + case DRM_FORMAT_XYUV8888: + return 9; + case DRM_FORMAT_NV12: + return 9; + case DRM_FORMAT_P010: + case DRM_FORMAT_P012: + case DRM_FORMAT_P016: + return 8; + default: + igt_assert_f(0, "COMPRESSION_TYPE_MEDIA unknown format\n"); + } + } else if (BLT_TARGET_MC(blt->dst)) { + igt_assert_f(0, "Destination compression not supported on mc ccs\n"); + } else { + igt_assert_f(0, "unknown compression\n"); + } +} + static void blitcopy(const struct igt_fb *dst_fb, const struct igt_fb *src_fb) { uint32_t src_tiling, dst_tiling; uint32_t ctx = 0; uint64_t ahnd = 0; + const intel_ctx_t *ictx = intel_ctx_create_all_physical(src_fb->fd); + struct intel_execution_engine2 *e; + uint32_t bb; + uint64_t bb_size = 4096; + struct blt_copy_data blt = {}; + struct blt_copy_object *src, *dst; + struct blt_block_copy_data_ext ext = {}, *pext = NULL; + uint32_t mem_region = HAS_FLATCCS(intel_get_drm_devid(src_fb->fd)) + ? REGION_LMEM(0) : REGION_SMEM; igt_assert_eq(dst_fb->fd, src_fb->fd); igt_assert_eq(dst_fb->num_planes, src_fb->num_planes); @@ -2729,36 +2844,87 @@ static void blitcopy(const struct igt_fb *dst_fb, igt_require(gem_has_contexts(dst_fb->fd)); ctx = gem_context_create(dst_fb->fd); ahnd = get_reloc_ahnd(dst_fb->fd, ctx); + + igt_assert(__gem_create_in_memory_regions(src_fb->fd, + &bb, + &bb_size, + mem_region) == 0); } for (int i = 0; i < dst_fb->num_planes; i++) { igt_assert_eq(dst_fb->plane_bpp[i], src_fb->plane_bpp[i]); igt_assert_eq(dst_fb->plane_width[i], src_fb->plane_width[i]); igt_assert_eq(dst_fb->plane_height[i], src_fb->plane_height[i]); - /* - * On GEN12+ X-tiled format support is removed from the fast - * blit command, so use the XY_SRC blit command for it - * instead. - */ - if (fast_blit_ok(src_fb) && fast_blit_ok(dst_fb)) { - igt_blitter_fast_copy__raw(dst_fb->fd, - ahnd, ctx, NULL, - src_fb->gem_handle, - src_fb->offsets[i], - src_fb->strides[i], - src_tiling, - 0, 0, /* src_x, src_y */ - src_fb->size, - dst_fb->plane_width[i], - dst_fb->plane_height[i], - dst_fb->plane_bpp[i], - dst_fb->gem_handle, - dst_fb->offsets[i], - dst_fb->strides[i], - dst_tiling, - 0, 0 /* dst_x, dst_y */, - dst_fb->size); + + if (ahnd && fast_blit_ok(src_fb) && fast_blit_ok(dst_fb)) { + for_each_ctx_engine(src_fb->fd, ictx, e) { + if (e->class == I915_ENGINE_CLASS_COPY) + break; + } + igt_assert_f(e, "No copy engine found!\n"); + + memset(&blt, 0, sizeof(blt)); + blt.color_depth = blt_get_bpp(src_fb); + + src = blt_fb_init(src_fb, i, mem_region); + dst = blt_fb_init(dst_fb, i, mem_region); + + blt_set_copy_object(&blt.src, src); + blt_set_copy_object(&blt.dst, dst); + + blt_set_batch(&blt.bb, bb, bb_size, mem_region); + + blt_fast_copy(src_fb->fd, ictx, e, ahnd, &blt); + gem_sync(src_fb->fd, blt.dst.handle); + + blt_destroy_object(src_fb->fd, src); + blt_destroy_object(dst_fb->fd, dst); + } else if (ahnd && blt_has_block_copy(src_fb->fd)) { + /* + * On GEN12+ X-tiled format support is removed from + * the fast blit command, so use the block copy blit + * command for it instead. + */ + for_each_ctx_engine(src_fb->fd, ictx, e) { + if (gem_engine_can_block_copy(src_fb->fd, e)) + break; + } + igt_assert_f(e, "No block copy capable engine found!\n"); + + src = blt_fb_init(src_fb, i, mem_region); + dst = blt_fb_init(dst_fb, i, mem_region); + + memset(&blt, 0, sizeof(blt)); + blt.color_depth = blt_get_bpp(src_fb); + blt_set_copy_object(&blt.src, src); + blt_set_copy_object(&blt.dst, dst); + + if (HAS_FLATCCS(intel_get_drm_devid(src_fb->fd))) { + blt_set_object_ext(&ext.src, + blt_compression_format(&blt, src_fb), + src_fb->width, src_fb->height, + SURFACE_TYPE_2D); + + blt_set_object_ext(&ext.dst, + blt_compression_format(&blt, dst_fb), + dst_fb->width, dst_fb->height, + SURFACE_TYPE_2D); + + pext = &ext; + } + + blt_set_batch(&blt.bb, bb, bb_size, mem_region); + + blt_block_copy(src_fb->fd, ictx, e, ahnd, &blt, pext); + gem_sync(src_fb->fd, blt.dst.handle); + + blt_destroy_object(src_fb->fd, src); + blt_destroy_object(dst_fb->fd, dst); } else { + /* + * If on legacy hardware where relocations are supported + * we'll use XY_SRC blit command instead + */ igt_blitter_src_copy(dst_fb->fd, ahnd, ctx, NULL, src_fb->gem_handle, @@ -2782,6 +2948,7 @@ static void blitcopy(const struct igt_fb *dst_fb, if (ctx) gem_context_destroy(dst_fb->fd, ctx); put_ahnd(ahnd); + intel_ctx_destroy(src_fb->fd, ictx); } static void free_linear_mapping(struct fb_blit_upload *blit) -- 2.25.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/3] lib/igt_fb: switch blitcopy to use lib/i915/i915_blt functions 2023-05-31 19:21 ` [igt-dev] [PATCH i-g-t 2/3] lib/igt_fb: switch blitcopy to use lib/i915/i915_blt functions Juha-Pekka Heikkila @ 2023-06-07 6:47 ` Zbigniew Kempczyński 0 siblings, 0 replies; 11+ messages in thread From: Zbigniew Kempczyński @ 2023-06-07 6:47 UTC (permalink / raw) To: Juha-Pekka Heikkila; +Cc: igt-dev On Wed, May 31, 2023 at 10:21:03PM +0300, Juha-Pekka Heikkila wrote: > reduce code duplication > > Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> > --- > lib/igt_fb.c | 243 +++++++++++++++++++++++++++++++++++++++++++-------- > 1 file changed, 205 insertions(+), 38 deletions(-) > > diff --git a/lib/igt_fb.c b/lib/igt_fb.c > index 71a199d4..b3fc3766 100644 > --- a/lib/igt_fb.c > +++ b/lib/igt_fb.c > @@ -35,6 +35,8 @@ > #include "drmtest.h" > #include "i915/gem_create.h" > #include "i915/gem_mman.h" > +#include "i915/i915_blt.h" > +#include "i915/intel_mocs.h" > #include "igt_aux.h" > #include "igt_color_encoding.h" > #include "igt_fb.h" > @@ -2453,21 +2455,30 @@ struct fb_blit_upload { > struct intel_bb *ibb; > }; > > -static bool fast_blit_ok(const struct igt_fb *fb) > +static enum blt_tiling_type fb_tile_to_blt_tile(uint64_t tile) > { > - int dev_id = intel_get_drm_devid(fb->fd); > - int ver = intel_display_ver(dev_id); > - > - if (ver < 9) > - return false; > - > - if (ver < 12) > - return true; > - > - if (ver >= 13 && !IS_ALDERLAKE_P(dev_id)) > - return true; > + switch (igt_fb_mod_to_tiling(tile)) { > + case I915_TILING_NONE: > + return T_LINEAR; > + case I915_TILING_X: > + return T_XMAJOR; > + case I915_TILING_Y: > + return T_YMAJOR; > + case I915_TILING_4: > + return T_TILE4; > + case I915_TILING_Yf: > + return T_YFMAJOR; > + default: > + igt_assert_f(0, "Unknown tiling!\n"); > + } > +} > > - return fb->modifier != I915_FORMAT_MOD_X_TILED; > +static bool fast_blit_ok(const struct igt_fb *fb) > +{ > + return blt_has_fast_copy(fb->fd) && > + !is_ccs_modifier(fb->modifier) && > + blt_block_copy_supports_tiling(fb->fd, > + fb_tile_to_blt_tile(fb->modifier)); Shouldn't be blt_fast_copy_supports_tiling() here? > } > > static bool blitter_ok(const struct igt_fb *fb) > @@ -2510,9 +2521,10 @@ static bool use_enginecopy(const struct igt_fb *fb) > return false; > > return fb->modifier == I915_FORMAT_MOD_Yf_TILED || > - is_ccs_modifier(fb->modifier) || > + (!HAS_FLATCCS(intel_get_drm_devid(fb->fd)) && is_ccs_modifier(fb->modifier)) || > (is_xe_device(fb->fd) && fb->modifier == DRM_FORMAT_MOD_LINEAR) || > - (is_i915_device(fb->fd) && !gem_has_mappable_ggtt(fb->fd)); > + (is_i915_device(fb->fd) && !gem_has_mappable_ggtt(fb->fd)) || > + is_gen12_mc_ccs_modifier(fb->modifier); > } > > static bool use_blitter(const struct igt_fb *fb) > @@ -2712,12 +2724,115 @@ static void copy_with_engine(struct fb_blit_upload *blit, > fini_buf(src); > } > > +static struct blt_copy_object *blt_fb_init(const struct igt_fb *fb, > + uint32_t plane, uint32_t memregion) > +{ > + uint32_t name, handle; > + struct blt_copy_object *blt; > + enum blt_tiling_type blt_tile; > + uint64_t stride; > + > + blt = malloc(sizeof(*blt)); > + igt_assert(blt); > + > + name = gem_flink(fb->fd, fb->gem_handle); > + handle = gem_open(fb->fd, name); > + > + blt_tile = fb_tile_to_blt_tile(fb->modifier); > + stride = blt_tile == T_LINEAR ? fb->strides[plane] : fb->strides[plane] / 4; > + > + blt_set_object(blt, handle, fb->size, memregion, > + intel_get_uc_mocs(fb->fd), > + blt_tile, > + is_ccs_modifier(fb->modifier) ? COMPRESSION_ENABLED : COMPRESSION_DISABLED, > + is_gen12_mc_ccs_modifier(fb->modifier) ? COMPRESSION_TYPE_MEDIA : COMPRESSION_TYPE_3D); > + > + blt_set_geom(blt, stride, 0, 0, fb->width, fb->plane_height[plane], 0, 0); > + > + blt->plane_offset = fb->offsets[plane]; > + > + blt->ptr = gem_mmap__device_coherent(fb->fd, handle, 0, fb->size, > + PROT_READ | PROT_WRITE); > + return blt; > +} > + > +static enum blt_color_depth blt_get_bpp(const struct igt_fb *fb) > +{ > + switch (fb->plane_bpp[0]) { > + case 8: > + return CD_8bit; > + case 16: > + return CD_16bit; > + case 32: > + return CD_32bit; > + case 64: > + return CD_64bit; > + case 96: > + return CD_96bit; > + case 128: > + return CD_128bit; > + default: > + igt_assert(0); > + } > +} > + > +#define BLT_TARGET_RC(x) (x.compression == COMPRESSION_ENABLED && \ > + x.compression_type == COMPRESSION_TYPE_3D) > + > +#define BLT_TARGET_MC(x) (x.compression == COMPRESSION_ENABLED && \ > + x.compression_type == COMPRESSION_TYPE_MEDIA) > + > +static uint32_t blt_compression_format(struct blt_copy_data *blt, > + const struct igt_fb *fb) > +{ > + if (blt->src.compression == COMPRESSION_DISABLED && > + blt->dst.compression == COMPRESSION_DISABLED) > + return 0; > + > + if (BLT_TARGET_RC(blt->src) || BLT_TARGET_RC(blt->dst)) { > + switch (blt->color_depth) { > + case CD_32bit: > + return 8; > + default: > + igt_assert_f(0, "COMPRESSION_TYPE_3D unknown color depth\n"); > + } > + } else if (BLT_TARGET_MC(blt->src)) { > + switch (fb->drm_format) { > + case DRM_FORMAT_XRGB8888: > + return 8; > + case DRM_FORMAT_XYUV8888: > + return 9; > + case DRM_FORMAT_NV12: > + return 9; > + case DRM_FORMAT_P010: > + case DRM_FORMAT_P012: > + case DRM_FORMAT_P016: > + return 8; > + default: > + igt_assert_f(0, "COMPRESSION_TYPE_MEDIA unknown format\n"); > + } > + } else if (BLT_TARGET_MC(blt->dst)) { > + igt_assert_f(0, "Destination compression not supported on mc ccs\n"); > + } else { > + igt_assert_f(0, "unknown compression\n"); > + } > +} > + > static void blitcopy(const struct igt_fb *dst_fb, > const struct igt_fb *src_fb) > { > uint32_t src_tiling, dst_tiling; > uint32_t ctx = 0; > uint64_t ahnd = 0; > + const intel_ctx_t *ictx = intel_ctx_create_all_physical(src_fb->fd); > + struct intel_execution_engine2 *e; > + uint32_t bb; > + uint64_t bb_size = 4096; > + struct blt_copy_data blt = {}; > + struct blt_copy_object *src, *dst; > + struct blt_block_copy_data_ext ext = {}, *pext = NULL; > + uint32_t mem_region = HAS_FLATCCS(intel_get_drm_devid(src_fb->fd)) > + ? REGION_LMEM(0) : REGION_SMEM; > > igt_assert_eq(dst_fb->fd, src_fb->fd); > igt_assert_eq(dst_fb->num_planes, src_fb->num_planes); > @@ -2729,36 +2844,87 @@ static void blitcopy(const struct igt_fb *dst_fb, > igt_require(gem_has_contexts(dst_fb->fd)); > ctx = gem_context_create(dst_fb->fd); > ahnd = get_reloc_ahnd(dst_fb->fd, ctx); > + > + igt_assert(__gem_create_in_memory_regions(src_fb->fd, > + &bb, > + &bb_size, > + mem_region) == 0); > } > > for (int i = 0; i < dst_fb->num_planes; i++) { > igt_assert_eq(dst_fb->plane_bpp[i], src_fb->plane_bpp[i]); > igt_assert_eq(dst_fb->plane_width[i], src_fb->plane_width[i]); > igt_assert_eq(dst_fb->plane_height[i], src_fb->plane_height[i]); > - /* > - * On GEN12+ X-tiled format support is removed from the fast > - * blit command, so use the XY_SRC blit command for it > - * instead. > - */ > - if (fast_blit_ok(src_fb) && fast_blit_ok(dst_fb)) { > - igt_blitter_fast_copy__raw(dst_fb->fd, > - ahnd, ctx, NULL, > - src_fb->gem_handle, > - src_fb->offsets[i], > - src_fb->strides[i], > - src_tiling, > - 0, 0, /* src_x, src_y */ > - src_fb->size, > - dst_fb->plane_width[i], > - dst_fb->plane_height[i], > - dst_fb->plane_bpp[i], > - dst_fb->gem_handle, > - dst_fb->offsets[i], > - dst_fb->strides[i], > - dst_tiling, > - 0, 0 /* dst_x, dst_y */, > - dst_fb->size); > + > + if (ahnd && fast_blit_ok(src_fb) && fast_blit_ok(dst_fb)) { > + for_each_ctx_engine(src_fb->fd, ictx, e) { > + if (e->class == I915_ENGINE_CLASS_COPY) > + break; > + } > + igt_assert_f(e, "No copy engine found!\n"); > + > + memset(&blt, 0, sizeof(blt)); > + blt.color_depth = blt_get_bpp(src_fb); > + > + src = blt_fb_init(src_fb, i, mem_region); > + dst = blt_fb_init(dst_fb, i, mem_region); > + > + blt_set_copy_object(&blt.src, src); > + blt_set_copy_object(&blt.dst, dst); > + > + blt_set_batch(&blt.bb, bb, bb_size, mem_region); > + > + blt_fast_copy(src_fb->fd, ictx, e, ahnd, &blt); > + gem_sync(src_fb->fd, blt.dst.handle); > + > + blt_destroy_object(src_fb->fd, src); > + blt_destroy_object(dst_fb->fd, dst); > + } else if (ahnd && blt_has_block_copy(src_fb->fd)) { > + /* > + * On GEN12+ X-tiled format support is removed from > + * the fast blit command, so use the block copy blit > + * command for it instead. > + */ I think this comment is inadequate to DG2 and beyond as X-tiling is back there. Apart of that I haven't spotted other issues here: With above nit addressed: Acked-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> -- Zbigniew > + for_each_ctx_engine(src_fb->fd, ictx, e) { > + if (gem_engine_can_block_copy(src_fb->fd, e)) > + break; > + } > + igt_assert_f(e, "No block copy capable engine found!\n"); > + > + src = blt_fb_init(src_fb, i, mem_region); > + dst = blt_fb_init(dst_fb, i, mem_region); > + > + memset(&blt, 0, sizeof(blt)); > + blt.color_depth = blt_get_bpp(src_fb); > + blt_set_copy_object(&blt.src, src); > + blt_set_copy_object(&blt.dst, dst); > + > + if (HAS_FLATCCS(intel_get_drm_devid(src_fb->fd))) { > + blt_set_object_ext(&ext.src, > + blt_compression_format(&blt, src_fb), > + src_fb->width, src_fb->height, > + SURFACE_TYPE_2D); > + > + blt_set_object_ext(&ext.dst, > + blt_compression_format(&blt, dst_fb), > + dst_fb->width, dst_fb->height, > + SURFACE_TYPE_2D); > + > + pext = &ext; > + } > + > + blt_set_batch(&blt.bb, bb, bb_size, mem_region); > + > + blt_block_copy(src_fb->fd, ictx, e, ahnd, &blt, pext); > + gem_sync(src_fb->fd, blt.dst.handle); > + > + blt_destroy_object(src_fb->fd, src); > + blt_destroy_object(dst_fb->fd, dst); > } else { > + /* > + * If on legacy hardware where relocations are supported > + * we'll use XY_SRC blit command instead > + */ > igt_blitter_src_copy(dst_fb->fd, > ahnd, ctx, NULL, > src_fb->gem_handle, > @@ -2782,6 +2948,7 @@ static void blitcopy(const struct igt_fb *dst_fb, > if (ctx) > gem_context_destroy(dst_fb->fd, ctx); > put_ahnd(ahnd); > + intel_ctx_destroy(src_fb->fd, ictx); > } > > static void free_linear_mapping(struct fb_blit_upload *blit) > -- > 2.25.1 > ^ permalink raw reply [flat|nested] 11+ messages in thread
* [igt-dev] [PATCH i-g-t 3/3] lib/igt_fb: use blitter for rendercompression on Intel hw with flat ccs 2023-05-31 19:21 [igt-dev] [PATCH i-g-t 0/3] Try to have one less blitter path Juha-Pekka Heikkila 2023-05-31 19:21 ` [igt-dev] [PATCH i-g-t 1/3] lib/i915/i915_blt: Add offset to block and fast copy Juha-Pekka Heikkila 2023-05-31 19:21 ` [igt-dev] [PATCH i-g-t 2/3] lib/igt_fb: switch blitcopy to use lib/i915/i915_blt functions Juha-Pekka Heikkila @ 2023-05-31 19:21 ` Juha-Pekka Heikkila 2023-05-31 21:31 ` [igt-dev] ✓ Fi.CI.BAT: success for Try to have one less blitter path Patchwork 2023-06-02 12:52 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork 4 siblings, 0 replies; 11+ messages in thread From: Juha-Pekka Heikkila @ 2023-05-31 19:21 UTC (permalink / raw) To: igt-dev When on flat ccs use blitter for doing rc ccs and rc ccs cc instead of rendercopy Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> --- lib/igt_fb.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/lib/igt_fb.c b/lib/igt_fb.c index b3fc3766..fd84ef24 100644 --- a/lib/igt_fb.c +++ b/lib/igt_fb.c @@ -2486,7 +2486,9 @@ static bool blitter_ok(const struct igt_fb *fb) if (!is_i915_device(fb->fd)) return false; - if (is_ccs_modifier(fb->modifier)) + if ((is_ccs_modifier(fb->modifier) && + !HAS_FLATCCS(intel_get_drm_devid(fb->fd))) + || is_gen12_mc_ccs_modifier(fb->modifier)) return false; for (int i = 0; i < fb->num_planes; i++) { @@ -2833,9 +2835,12 @@ static void blitcopy(const struct igt_fb *dst_fb, struct blt_block_copy_data_ext ext = {}, *pext = NULL; uint32_t mem_region = HAS_FLATCCS(intel_get_drm_devid(src_fb->fd)) ? REGION_LMEM(0) : REGION_SMEM; + /* To ignore CC plane */ + uint32_t src_cc = src_fb->modifier == I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC ? 1 : 0; + uint32_t dst_cc = dst_fb->modifier == I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC ? 1 : 0; igt_assert_eq(dst_fb->fd, src_fb->fd); - igt_assert_eq(dst_fb->num_planes, src_fb->num_planes); + igt_assert_eq(dst_fb->num_planes - dst_cc, src_fb->num_planes - src_cc); src_tiling = igt_fb_mod_to_tiling(src_fb->modifier); dst_tiling = igt_fb_mod_to_tiling(dst_fb->modifier); @@ -2851,7 +2856,7 @@ static void blitcopy(const struct igt_fb *dst_fb, mem_region) == 0); } - for (int i = 0; i < dst_fb->num_planes; i++) { + for (int i = 0; i < dst_fb->num_planes - dst_cc; i++) { igt_assert_eq(dst_fb->plane_bpp[i], src_fb->plane_bpp[i]); igt_assert_eq(dst_fb->plane_width[i], src_fb->plane_width[i]); igt_assert_eq(dst_fb->plane_height[i], src_fb->plane_height[i]); -- 2.25.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for Try to have one less blitter path. 2023-05-31 19:21 [igt-dev] [PATCH i-g-t 0/3] Try to have one less blitter path Juha-Pekka Heikkila ` (2 preceding siblings ...) 2023-05-31 19:21 ` [igt-dev] [PATCH i-g-t 3/3] lib/igt_fb: use blitter for rendercompression on Intel hw with flat ccs Juha-Pekka Heikkila @ 2023-05-31 21:31 ` Patchwork 2023-06-02 12:52 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork 4 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2023-05-31 21:31 UTC (permalink / raw) To: Juha-Pekka Heikkila; +Cc: igt-dev [-- Attachment #1: Type: text/plain, Size: 7829 bytes --] == Series Details == Series: Try to have one less blitter path. URL : https://patchwork.freedesktop.org/series/118669/ State : success == Summary == CI Bug Log - changes from CI_DRM_13209 -> IGTPW_9084 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/index.html Participating hosts (38 -> 37) ------------------------------ Missing (1): fi-kbl-8809g Known issues ------------ Here are the changes found in IGTPW_9084 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@i915_pm_backlight@basic-brightness@edp-1: - bat-rplp-1: NOTRUN -> [ABORT][1] ([i915#7077]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/bat-rplp-1/igt@i915_pm_backlight@basic-brightness@edp-1.html * igt@i915_selftest@live@gt_pm: - bat-rpls-2: [PASS][2] -> [DMESG-FAIL][3] ([i915#4258] / [i915#7913]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/bat-rpls-2/igt@i915_selftest@live@gt_pm.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/bat-rpls-2/igt@i915_selftest@live@gt_pm.html * igt@i915_selftest@live@requests: - bat-rpls-2: [PASS][4] -> [ABORT][5] ([i915#7913] / [i915#7982]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/bat-rpls-2/igt@i915_selftest@live@requests.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/bat-rpls-2/igt@i915_selftest@live@requests.html * igt@i915_selftest@live@slpc: - bat-rpls-1: NOTRUN -> [DMESG-WARN][6] ([i915#6367]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/bat-rpls-1/igt@i915_selftest@live@slpc.html * igt@i915_suspend@basic-s3-without-i915: - bat-rpls-1: NOTRUN -> [ABORT][7] ([i915#6687] / [i915#7978]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/bat-rpls-1/igt@i915_suspend@basic-s3-without-i915.html * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence: - bat-dg2-11: NOTRUN -> [SKIP][8] ([i915#1845] / [i915#5354]) +2 similar issues [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html * igt@kms_pipe_crc_basic@read-crc: - bat-adlp-9: NOTRUN -> [SKIP][9] ([i915#3546]) +1 similar issue [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/bat-adlp-9/igt@kms_pipe_crc_basic@read-crc.html * igt@kms_psr@primary_mmap_gtt: - bat-rplp-1: NOTRUN -> [SKIP][10] ([i915#1072]) +1 similar issue [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/bat-rplp-1/igt@kms_psr@primary_mmap_gtt.html * igt@kms_setmode@basic-clone-single-crtc: - bat-rplp-1: NOTRUN -> [SKIP][11] ([i915#3555] / [i915#4579]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/bat-rplp-1/igt@kms_setmode@basic-clone-single-crtc.html #### Possible fixes #### * igt@i915_pm_rpm@basic-pci-d3-state: - fi-hsw-4770: [SKIP][12] ([fdo#109271]) -> [PASS][13] [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/fi-hsw-4770/igt@i915_pm_rpm@basic-pci-d3-state.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/fi-hsw-4770/igt@i915_pm_rpm@basic-pci-d3-state.html * igt@i915_pm_rpm@basic-rte: - fi-hsw-4770: [FAIL][14] ([i915#7364]) -> [PASS][15] [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/fi-hsw-4770/igt@i915_pm_rpm@basic-rte.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/fi-hsw-4770/igt@i915_pm_rpm@basic-rte.html * igt@i915_selftest@live@migrate: - bat-dg2-11: [DMESG-WARN][16] ([i915#7699]) -> [PASS][17] [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/bat-dg2-11/igt@i915_selftest@live@migrate.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/bat-dg2-11/igt@i915_selftest@live@migrate.html * igt@i915_selftest@live@requests: - {bat-mtlp-8}: [DMESG-FAIL][18] ([i915#8497]) -> [PASS][19] [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/bat-mtlp-8/igt@i915_selftest@live@requests.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/bat-mtlp-8/igt@i915_selftest@live@requests.html - bat-rpls-1: [ABORT][20] ([i915#7911] / [i915#7920] / [i915#7982]) -> [PASS][21] [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/bat-rpls-1/igt@i915_selftest@live@requests.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/bat-rpls-1/igt@i915_selftest@live@requests.html * igt@i915_selftest@live@slpc: - {bat-mtlp-6}: [DMESG-WARN][22] ([i915#6367]) -> [PASS][23] [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/bat-mtlp-6/igt@i915_selftest@live@slpc.html [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/bat-mtlp-6/igt@i915_selftest@live@slpc.html * igt@kms_pipe_crc_basic@nonblocking-crc@pipe-d-dp-1: - bat-dg2-8: [FAIL][24] ([i915#7932]) -> [PASS][25] [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc@pipe-d-dp-1.html [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc@pipe-d-dp-1.html #### Warnings #### * igt@kms_psr@cursor_plane_move: - bat-rplp-1: [ABORT][26] -> [SKIP][27] ([i915#1072]) [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/bat-rplp-1/igt@kms_psr@cursor_plane_move.html [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/bat-rplp-1/igt@kms_psr@cursor_plane_move.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072 [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845 [i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546 [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555 [i915#4258]: https://gitlab.freedesktop.org/drm/intel/issues/4258 [i915#4423]: https://gitlab.freedesktop.org/drm/intel/issues/4423 [i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579 [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354 [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367 [i915#6687]: https://gitlab.freedesktop.org/drm/intel/issues/6687 [i915#7059]: https://gitlab.freedesktop.org/drm/intel/issues/7059 [i915#7077]: https://gitlab.freedesktop.org/drm/intel/issues/7077 [i915#7364]: https://gitlab.freedesktop.org/drm/intel/issues/7364 [i915#7699]: https://gitlab.freedesktop.org/drm/intel/issues/7699 [i915#7911]: https://gitlab.freedesktop.org/drm/intel/issues/7911 [i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913 [i915#7920]: https://gitlab.freedesktop.org/drm/intel/issues/7920 [i915#7932]: https://gitlab.freedesktop.org/drm/intel/issues/7932 [i915#7978]: https://gitlab.freedesktop.org/drm/intel/issues/7978 [i915#7982]: https://gitlab.freedesktop.org/drm/intel/issues/7982 [i915#8189]: https://gitlab.freedesktop.org/drm/intel/issues/8189 [i915#8497]: https://gitlab.freedesktop.org/drm/intel/issues/8497 Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_7314 -> IGTPW_9084 CI-20190529: 20190529 CI_DRM_13209: 045f7c1641d711d0cd364db15e760b60bdf85d9e @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_9084: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/index.html IGT_7314: ab70dfcdecf93a17fcaddb774855f726325fa0dd @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/index.html [-- Attachment #2: Type: text/html, Size: 8898 bytes --] ^ permalink raw reply [flat|nested] 11+ messages in thread
* [igt-dev] ✗ Fi.CI.IGT: failure for Try to have one less blitter path. 2023-05-31 19:21 [igt-dev] [PATCH i-g-t 0/3] Try to have one less blitter path Juha-Pekka Heikkila ` (3 preceding siblings ...) 2023-05-31 21:31 ` [igt-dev] ✓ Fi.CI.BAT: success for Try to have one less blitter path Patchwork @ 2023-06-02 12:52 ` Patchwork 4 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2023-06-02 12:52 UTC (permalink / raw) To: Juha-Pekka Heikkila; +Cc: igt-dev [-- Attachment #1: Type: text/plain, Size: 26385 bytes --] == Series Details == Series: Try to have one less blitter path. URL : https://patchwork.freedesktop.org/series/118669/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13209_full -> IGTPW_9084_full ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with IGTPW_9084_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in IGTPW_9084_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/index.html Participating hosts (8 -> 7) ------------------------------ Missing (1): shard-rkl0 Possible new issues ------------------- Here are the unknown changes that may have been introduced in IGTPW_9084_full: ### IGT changes ### #### Possible regressions #### * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-c-hdmi-a-1-yf: - shard-glk: NOTRUN -> [FAIL][1] +8 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-glk6/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-c-hdmi-a-1-yf.html * igt@kms_plane@pixel-format-source-clamping@pipe-a-planes: - shard-apl: NOTRUN -> [FAIL][2] +1 similar issue [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-apl6/igt@kms_plane@pixel-format-source-clamping@pipe-a-planes.html * igt@kms_plane_scaling@plane-scaler-with-modifiers-unity-scaling@pipe-a-hdmi-a-1: - shard-glk: [PASS][3] -> [FAIL][4] +100 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/shard-glk8/igt@kms_plane_scaling@plane-scaler-with-modifiers-unity-scaling@pipe-a-hdmi-a-1.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-glk5/igt@kms_plane_scaling@plane-scaler-with-modifiers-unity-scaling@pipe-a-hdmi-a-1.html * igt@kms_plane_scaling@plane-upscale-with-modifiers-20x20@pipe-b-dp-1: - shard-apl: [PASS][5] -> [FAIL][6] +69 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/shard-apl3/igt@kms_plane_scaling@plane-upscale-with-modifiers-20x20@pipe-b-dp-1.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-apl6/igt@kms_plane_scaling@plane-upscale-with-modifiers-20x20@pipe-b-dp-1.html #### Warnings #### * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-valid-mode: - shard-glk: [SKIP][7] ([fdo#109271] / [i915#4579]) -> [FAIL][8] +1 similar issue [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/shard-glk9/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-valid-mode.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-glk8/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-valid-mode.html * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling@pipe-a-valid-mode: - shard-apl: [SKIP][9] ([fdo#109271] / [i915#4579]) -> [FAIL][10] +1 similar issue [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/shard-apl6/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling@pipe-a-valid-mode.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-apl3/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling@pipe-a-valid-mode.html #### Suppressed #### The following results come from untrusted machines, tests, or statuses. They do not affect the overall result. * igt@kms_plane@pixel-format@pipe-b-planes: - {shard-dg1}: [PASS][11] -> [FAIL][12] +3 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/shard-dg1-17/igt@kms_plane@pixel-format@pipe-b-planes.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-dg1-19/igt@kms_plane@pixel-format@pipe-b-planes.html * igt@kms_plane_multiple@tiling-x@pipe-d-hdmi-a-4: - {shard-dg1}: NOTRUN -> [FAIL][13] +3 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-dg1-17/igt@kms_plane_multiple@tiling-x@pipe-d-hdmi-a-4.html Known issues ------------ Here are the changes found in IGTPW_9084_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_exec_fair@basic-deadline: - shard-glk: [PASS][14] -> [FAIL][15] ([i915#2846]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/shard-glk9/igt@gem_exec_fair@basic-deadline.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-glk1/igt@gem_exec_fair@basic-deadline.html * igt@gem_exec_fair@basic-pace@rcs0: - shard-glk: [PASS][16] -> [FAIL][17] ([i915#2842]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/shard-glk1/igt@gem_exec_fair@basic-pace@rcs0.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-glk5/igt@gem_exec_fair@basic-pace@rcs0.html * igt@gem_lmem_swapping@parallel-random-engines: - shard-apl: NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#4613]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-apl2/igt@gem_lmem_swapping@parallel-random-engines.html * igt@gem_pwrite@basic-exhaustion: - shard-apl: NOTRUN -> [WARN][19] ([i915#2658]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-apl7/igt@gem_pwrite@basic-exhaustion.html - shard-snb: NOTRUN -> [WARN][20] ([i915#2658]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-snb4/igt@gem_pwrite@basic-exhaustion.html * igt@gem_userptr_blits@vma-merge: - shard-apl: NOTRUN -> [FAIL][21] ([i915#3318]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-apl4/igt@gem_userptr_blits@vma-merge.html - shard-snb: NOTRUN -> [FAIL][22] ([i915#2724]) [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-snb2/igt@gem_userptr_blits@vma-merge.html * igt@i915_selftest@live@gt_heartbeat: - shard-apl: [PASS][23] -> [DMESG-FAIL][24] ([i915#5334]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/shard-apl7/igt@i915_selftest@live@gt_heartbeat.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-apl7/igt@i915_selftest@live@gt_heartbeat.html * igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_mc_ccs: - shard-glk: NOTRUN -> [SKIP][25] ([fdo#109271] / [i915#3886]) +1 similar issue [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-glk7/igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_mc_ccs.html * igt@kms_chamelium_hpd@common-hpd-after-suspend: - shard-apl: NOTRUN -> [SKIP][26] ([fdo#109271]) +58 similar issues [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-apl4/igt@kms_chamelium_hpd@common-hpd-after-suspend.html * igt@kms_content_protection@lic@pipe-a-dp-1: - shard-apl: NOTRUN -> [TIMEOUT][27] ([i915#7173]) [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-apl3/igt@kms_content_protection@lic@pipe-a-dp-1.html * igt@kms_cursor_crc@cursor-suspend@pipe-b-vga-1: - shard-snb: [PASS][28] -> [DMESG-WARN][29] ([i915#5090]) [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/shard-snb7/igt@kms_cursor_crc@cursor-suspend@pipe-b-vga-1.html [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-snb2/igt@kms_cursor_crc@cursor-suspend@pipe-b-vga-1.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions: - shard-glk: [PASS][30] -> [FAIL][31] ([i915#2346]) +1 similar issue [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/shard-glk6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-glk3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling@pipe-a-valid-mode: - shard-glk: NOTRUN -> [SKIP][32] ([fdo#109271] / [i915#4579]) +1 similar issue [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-glk7/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling@pipe-a-valid-mode.html * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-valid-mode: - shard-apl: NOTRUN -> [SKIP][33] ([fdo#109271] / [i915#4579]) +2 similar issues [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-apl6/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-valid-mode.html * igt@kms_frontbuffer_tracking@fbcpsr-tiling-linear: - shard-glk: NOTRUN -> [SKIP][34] ([fdo#109271]) +51 similar issues [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-glk8/igt@kms_frontbuffer_tracking@fbcpsr-tiling-linear.html * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc: - shard-snb: NOTRUN -> [SKIP][35] ([fdo#109271]) +101 similar issues [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-snb4/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc.html * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5@pipe-b-vga-1: - shard-snb: NOTRUN -> [SKIP][36] ([fdo#109271] / [i915#4579]) +15 similar issues [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-snb4/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5@pipe-b-vga-1.html * igt@kms_psr2_sf@cursor-plane-move-continuous-sf: - shard-glk: NOTRUN -> [SKIP][37] ([fdo#109271] / [i915#658]) [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-glk6/igt@kms_psr2_sf@cursor-plane-move-continuous-sf.html * igt@kms_psr2_sf@overlay-plane-update-continuous-sf: - shard-apl: NOTRUN -> [SKIP][38] ([fdo#109271] / [i915#658]) [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-apl7/igt@kms_psr2_sf@overlay-plane-update-continuous-sf.html * igt@kms_rotation_crc@multiplane-rotation-cropping-bottom: - shard-apl: [PASS][39] -> [DMESG-FAIL][40] ([IGT#6]) +2 similar issues [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/shard-apl4/igt@kms_rotation_crc@multiplane-rotation-cropping-bottom.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-apl3/igt@kms_rotation_crc@multiplane-rotation-cropping-bottom.html #### Possible fixes #### * igt@drm_fdinfo@most-busy-idle-check-all@rcs0: - {shard-rkl}: [FAIL][41] ([i915#7742]) -> [PASS][42] [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/shard-rkl-3/igt@drm_fdinfo@most-busy-idle-check-all@rcs0.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-rkl-2/igt@drm_fdinfo@most-busy-idle-check-all@rcs0.html * igt@gem_ctx_exec@basic-nohangcheck: - {shard-tglu}: [FAIL][43] ([i915#6268]) -> [PASS][44] [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/shard-tglu-10/igt@gem_ctx_exec@basic-nohangcheck.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-tglu-8/igt@gem_ctx_exec@basic-nohangcheck.html * igt@gem_eio@reset-stress: - {shard-dg1}: [FAIL][45] ([i915#5784]) -> [PASS][46] [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/shard-dg1-16/igt@gem_eio@reset-stress.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-dg1-15/igt@gem_eio@reset-stress.html * igt@gem_eio@wait-1us: - {shard-dg1}: [INCOMPLETE][47] -> [PASS][48] [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/shard-dg1-13/igt@gem_eio@wait-1us.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-dg1-18/igt@gem_eio@wait-1us.html * igt@gem_exec_fair@basic-none-solo@rcs0: - shard-apl: [FAIL][49] ([i915#2842]) -> [PASS][50] [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/shard-apl4/igt@gem_exec_fair@basic-none-solo@rcs0.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-apl6/igt@gem_exec_fair@basic-none-solo@rcs0.html * igt@gem_exec_fair@basic-none@bcs0: - {shard-rkl}: [FAIL][51] ([i915#2842]) -> [PASS][52] [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/shard-rkl-6/igt@gem_exec_fair@basic-none@bcs0.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-rkl-3/igt@gem_exec_fair@basic-none@bcs0.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-glk: [FAIL][53] ([i915#2842]) -> [PASS][54] [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/shard-glk9/igt@gem_exec_fair@basic-pace-share@rcs0.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-glk8/igt@gem_exec_fair@basic-pace-share@rcs0.html * igt@gem_exec_suspend@basic-s4-devices@smem: - {shard-tglu}: [ABORT][55] ([i915#7975] / [i915#8213]) -> [PASS][56] [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/shard-tglu-10/igt@gem_exec_suspend@basic-s4-devices@smem.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-tglu-8/igt@gem_exec_suspend@basic-s4-devices@smem.html * igt@gem_mmap_gtt@fault-concurrent-x: - shard-snb: [ABORT][57] ([i915#5161]) -> [PASS][58] [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/shard-snb2/igt@gem_mmap_gtt@fault-concurrent-x.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-snb5/igt@gem_mmap_gtt@fault-concurrent-x.html * igt@gen9_exec_parse@allowed-single: - shard-apl: [ABORT][59] ([i915#5566]) -> [PASS][60] [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/shard-apl4/igt@gen9_exec_parse@allowed-single.html [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-apl4/igt@gen9_exec_parse@allowed-single.html * igt@i915_module_load@reload-with-fault-injection: - shard-snb: [ABORT][61] ([i915#4528]) -> [PASS][62] [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/shard-snb6/igt@i915_module_load@reload-with-fault-injection.html [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-snb7/igt@i915_module_load@reload-with-fault-injection.html * igt@i915_pm_rc6_residency@rc6-idle@rcs0: - {shard-tglu}: [WARN][63] ([i915#2681]) -> [PASS][64] [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/shard-tglu-7/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-tglu-4/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html * igt@i915_pm_rpm@dpms-mode-unset-non-lpsp: - {shard-rkl}: [SKIP][65] ([i915#1397]) -> [PASS][66] +2 similar issues [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/shard-rkl-7/igt@i915_pm_rpm@dpms-mode-unset-non-lpsp.html [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-rkl-6/igt@i915_pm_rpm@dpms-mode-unset-non-lpsp.html * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-async-flip: - {shard-rkl}: [FAIL][67] ([i915#3743]) -> [PASS][68] [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/shard-rkl-7/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-rkl-3/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic: - shard-glk: [FAIL][69] ([i915#72]) -> [PASS][70] [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/shard-glk5/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-glk8/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size: - shard-apl: [FAIL][71] ([i915#2346]) -> [PASS][72] [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/shard-apl4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-apl4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html #### Warnings #### * igt@i915_pm_dc@dc9-dpms: - shard-apl: [FAIL][73] ([i915#4275]) -> [SKIP][74] ([fdo#109271]) [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/shard-apl6/igt@i915_pm_dc@dc9-dpms.html [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-apl6/igt@i915_pm_dc@dc9-dpms.html * igt@kms_hdmi_inject@inject-audio: - shard-snb: [FAIL][75] ([IGT#3]) -> [SKIP][76] ([fdo#109271]) [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13209/shard-snb5/igt@kms_hdmi_inject@inject-audio.html [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/shard-snb7/igt@kms_hdmi_inject@inject-audio.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [IGT#2]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/2 [IGT#3]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/3 [IGT#6]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/6 [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280 [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285 [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289 [fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291 [fdo#109300]: https://bugs.freedesktop.org/show_bug.cgi?id=109300 [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315 [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189 [fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723 [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068 [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614 [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615 [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825 [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 [fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283 [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072 [i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397 [i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825 [i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839 [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346 [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437 [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527 [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575 [i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587 [i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658 [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672 [i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681 [i915#2724]: https://gitlab.freedesktop.org/drm/intel/issues/2724 [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842 [i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846 [i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856 [i915#3023]: https://gitlab.freedesktop.org/drm/intel/issues/3023 [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281 [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282 [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297 [i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299 [i915#3318]: https://gitlab.freedesktop.org/drm/intel/issues/3318 [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359 [i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458 [i915#3469]: https://gitlab.freedesktop.org/drm/intel/issues/3469 [i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539 [i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546 [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555 [i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591 [i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638 [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689 [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708 [i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734 [i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742 [i915#3743]: https://gitlab.freedesktop.org/drm/intel/issues/3743 [i915#3804]: https://gitlab.freedesktop.org/drm/intel/issues/3804 [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886 [i915#3936]: https://gitlab.freedesktop.org/drm/intel/issues/3936 [i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955 [i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070 [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077 [i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078 [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079 [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083 [i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098 [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103 [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212 [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270 [i915#4275]: https://gitlab.freedesktop.org/drm/intel/issues/4275 [i915#4281]: https://gitlab.freedesktop.org/drm/intel/issues/4281 [i915#4387]: https://gitlab.freedesktop.org/drm/intel/issues/4387 [i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528 [i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538 [i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579 [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613 [i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771 [i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812 [i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833 [i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852 [i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860 [i915#4879]: https://gitlab.freedesktop.org/drm/intel/issues/4879 [i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880 [i915#4881]: https://gitlab.freedesktop.org/drm/intel/issues/4881 [i915#5090]: https://gitlab.freedesktop.org/drm/intel/issues/5090 [i915#5161]: https://gitlab.freedesktop.org/drm/intel/issues/5161 [i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176 [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235 [i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286 [i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289 [i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325 [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533 [i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334 [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354 [i915#5566]: https://gitlab.freedesktop.org/drm/intel/issues/5566 [i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784 [i915#5852]: https://gitlab.freedesktop.org/drm/intel/issues/5852 [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095 [i915#6230]: https://gitlab.freedesktop.org/drm/intel/issues/6230 [i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268 [i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301 [i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433 [i915#6493]: https://gitlab.freedesktop.org/drm/intel/issues/6493 [i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524 [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658 [i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768 [i915#6786]: https://gitlab.freedesktop.org/drm/intel/issues/6786 [i915#6806]: https://gitlab.freedesktop.org/drm/intel/issues/6806 [i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953 [i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116 [i915#7173]: https://gitlab.freedesktop.org/drm/intel/issues/7173 [i915#7178]: https://gitlab.freedesktop.org/drm/intel/issues/7178 [i915#72]: https://gitlab.freedesktop.org/drm/intel/issues/72 [i915#7479]: https://gitlab.freedesktop.org/drm/intel/issues/7479 [i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561 [i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697 [i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701 [i915#7707]: https://gitlab.freedesktop.org/drm/intel/issues/7707 [i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711 [i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742 [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828 [i915#7975]: https://gitlab.freedesktop.org/drm/intel/issues/7975 [i915#8151]: https://gitlab.freedesktop.org/drm/intel/issues/8151 [i915#8213]: https://gitlab.freedesktop.org/drm/intel/issues/8213 [i915#8228]: https://gitlab.freedesktop.org/drm/intel/issues/8228 [i915#8247]: https://gitlab.freedesktop.org/drm/intel/issues/8247 [i915#8292]: https://gitlab.freedesktop.org/drm/intel/issues/8292 [i915#8304]: https://gitlab.freedesktop.org/drm/intel/issues/8304 [i915#8381]: https://gitlab.freedesktop.org/drm/intel/issues/8381 [i915#8414]: https://gitlab.freedesktop.org/drm/intel/issues/8414 Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_7314 -> IGTPW_9084 * Piglit: piglit_4509 -> None CI-20190529: 20190529 CI_DRM_13209: 045f7c1641d711d0cd364db15e760b60bdf85d9e @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_9084: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/index.html IGT_7314: ab70dfcdecf93a17fcaddb774855f726325fa0dd @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9084/index.html [-- Attachment #2: Type: text/html, Size: 23040 bytes --] ^ permalink raw reply [flat|nested] 11+ messages in thread
* [igt-dev] [PATCH i-g-t 0/3] switch lib/igt_fb.c to use lib/i915/i915_blt functions for blitter on Intel hw
@ 2023-03-28 18:30 Juha-Pekka Heikkila
2023-03-28 18:30 ` [igt-dev] [PATCH i-g-t 2/3] lib/igt_fb: switch blitcopy to use lib/i915/i915_blt functions Juha-Pekka Heikkila
0 siblings, 1 reply; 11+ messages in thread
From: Juha-Pekka Heikkila @ 2023-03-28 18:30 UTC (permalink / raw)
To: igt-dev
Switch to new blitter functions on framebuffer creation. On Intel CI there's
still some legacy machines with relocation support hence left XY_SRC path as
legacy path.
v2. Do rendercompression with blitter when have flat ccs
Juha-Pekka Heikkila (3):
lib/i915/i915_blt: Add offset to block and fast copy
lib/igt_fb: switch blitcopy to use lib/i915/i915_blt functions
lib/igt_fb: use blitter for rendercompression on Intel hw with flat
ccs
lib/i915/i915_blt.c | 12 ++-
lib/i915/i915_blt.h | 1 +
lib/igt_fb.c | 225 +++++++++++++++++++++++++++++++++++++++-----
3 files changed, 208 insertions(+), 30 deletions(-)
--
2.39.0
^ permalink raw reply [flat|nested] 11+ messages in thread* [igt-dev] [PATCH i-g-t 2/3] lib/igt_fb: switch blitcopy to use lib/i915/i915_blt functions 2023-03-28 18:30 [igt-dev] [PATCH i-g-t 0/3] switch lib/igt_fb.c to use lib/i915/i915_blt functions for blitter on Intel hw Juha-Pekka Heikkila @ 2023-03-28 18:30 ` Juha-Pekka Heikkila 2023-04-03 6:17 ` Zbigniew Kempczyński 0 siblings, 1 reply; 11+ messages in thread From: Juha-Pekka Heikkila @ 2023-03-28 18:30 UTC (permalink / raw) To: igt-dev reduce code duplication Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> --- lib/igt_fb.c | 214 +++++++++++++++++++++++++++++++++++++++++++++------ 1 file changed, 191 insertions(+), 23 deletions(-) diff --git a/lib/igt_fb.c b/lib/igt_fb.c index ba89e1f60..7668fc553 100644 --- a/lib/igt_fb.c +++ b/lib/igt_fb.c @@ -35,6 +35,8 @@ #include "drmtest.h" #include "i915/gem_create.h" #include "i915/gem_mman.h" +#include "i915/i915_blt.h" +#include "i915/intel_mocs.h" #include "igt_aux.h" #include "igt_color_encoding.h" #include "igt_fb.h" @@ -2680,12 +2682,132 @@ static void copy_with_engine(struct fb_blit_upload *blit, fini_buf(src); } +static struct blt_copy_object *blt_fb_init(const struct igt_fb *fb, + uint32_t plane, uint32_t memregion) +{ + uint32_t name, handle; + struct blt_copy_object *blt; + enum blt_tiling_type blt_tile; + uint64_t stride; + + blt = malloc(sizeof(*blt)); + igt_assert(blt); + + name = gem_flink(fb->fd, fb->gem_handle); + handle = gem_open(fb->fd, name); + + switch (igt_fb_mod_to_tiling(fb->modifier)) { + case I915_TILING_X: + blt_tile = T_XMAJOR; + stride = fb->strides[plane] / 4; + break; + case I915_TILING_Y: + blt_tile = T_YMAJOR; + stride = fb->strides[plane] / 4; + break; + case I915_TILING_4: + blt_tile = T_TILE4; + stride = fb->strides[plane] / 4; + break; + case I915_TILING_NONE: + default: + blt_tile = T_LINEAR; + stride = fb->strides[plane]; + break; + } + + blt_set_object(blt, handle, fb->size, memregion, + intel_get_uc_mocs(fb->fd), + blt_tile, + is_ccs_modifier(fb->modifier) ? COMPRESSION_ENABLED : COMPRESSION_DISABLED, + is_gen12_mc_ccs_modifier(fb->modifier) ? COMPRESSION_TYPE_MEDIA : COMPRESSION_TYPE_3D); + + blt_set_geom(blt, stride, 0, 0, fb->width, fb->plane_height[plane], 0, 0); + + blt->offset = fb->offsets[plane]; + + blt->ptr = gem_mmap__device_coherent(fb->fd, handle, 0, fb->size, + PROT_READ | PROT_WRITE); + return blt; +} + +static enum blt_color_depth blt_get_bpp(const struct igt_fb *fb) +{ + switch (fb->plane_bpp[0]) { + case 8: + return CD_8bit; + case 16: + return CD_16bit; + case 32: + return CD_32bit; + case 64: + return CD_64bit; + case 96: + return CD_96bit; + case 128: + return CD_128bit; + default: + igt_assert(0); + } +} + +#define BLT_TARGET_RC(x) (x.compression == COMPRESSION_ENABLED && \ + x.compression_type == COMPRESSION_TYPE_3D) + +#define BLT_TARGET_MC(x) (x.compression == COMPRESSION_ENABLED && \ + x.compression_type == COMPRESSION_TYPE_MEDIA) + +static uint32_t blt_compression_format(struct blt_copy_data *blt, + const struct igt_fb *fb) +{ + if (blt->src.compression == COMPRESSION_DISABLED && + blt->dst.compression == COMPRESSION_DISABLED) + return 0; + + if (BLT_TARGET_RC(blt->src) || BLT_TARGET_RC(blt->dst)) { + switch (blt->color_depth) { + case CD_32bit: + return 8; + default: + igt_assert_f(0, "COMPRESSION_TYPE_3D unknown color depth\n"); + } + } + + if (BLT_TARGET_MC(blt->src) || BLT_TARGET_MC(blt->dst)) { + switch (fb->drm_format) { + case DRM_FORMAT_XRGB8888: + return 8; + case DRM_FORMAT_XYUV8888: + return 9; + case DRM_FORMAT_NV12: + return 9; + case DRM_FORMAT_P010: + case DRM_FORMAT_P012: + case DRM_FORMAT_P016: + return 8; + default: + igt_assert_f(0, "COMPRESSION_TYPE_MEDIA unknown format\n"); + } + } else { + igt_assert_f(0, "unknown compression\n"); + } +} + static void blitcopy(const struct igt_fb *dst_fb, const struct igt_fb *src_fb) { uint32_t src_tiling, dst_tiling; uint32_t ctx = 0; uint64_t ahnd = 0; + const intel_ctx_t *ictx = intel_ctx_create_all_physical(src_fb->fd); + struct intel_execution_engine2 *e; + uint32_t bb; + uint64_t bb_size = 4096; + struct blt_copy_data blt = {}; + struct blt_copy_object *src, *dst; + struct blt_block_copy_data_ext ext = {}, *pext = NULL; + uint32_t mem_region = HAS_FLATCCS(intel_get_drm_devid(src_fb->fd)) + ? REGION_LMEM(0) : REGION_SMEM; igt_assert_eq(dst_fb->fd, src_fb->fd); igt_assert_eq(dst_fb->num_planes, src_fb->num_planes); @@ -2697,36 +2819,81 @@ static void blitcopy(const struct igt_fb *dst_fb, igt_require(gem_has_contexts(dst_fb->fd)); ctx = gem_context_create(dst_fb->fd); ahnd = get_reloc_ahnd(dst_fb->fd, ctx); + + igt_assert(__gem_create_in_memory_regions(src_fb->fd, + &bb, + &bb_size, + mem_region) == 0); + + for_each_ctx_engine(src_fb->fd, ictx, e) { + if (gem_engine_can_block_copy(src_fb->fd, e)) + break; + } } for (int i = 0; i < dst_fb->num_planes; i++) { igt_assert_eq(dst_fb->plane_bpp[i], src_fb->plane_bpp[i]); igt_assert_eq(dst_fb->plane_width[i], src_fb->plane_width[i]); igt_assert_eq(dst_fb->plane_height[i], src_fb->plane_height[i]); - /* - * On GEN12+ X-tiled format support is removed from the fast - * blit command, so use the XY_SRC blit command for it - * instead. - */ - if (fast_blit_ok(src_fb) && fast_blit_ok(dst_fb)) { - igt_blitter_fast_copy__raw(dst_fb->fd, - ahnd, ctx, NULL, - src_fb->gem_handle, - src_fb->offsets[i], - src_fb->strides[i], - src_tiling, - 0, 0, /* src_x, src_y */ - src_fb->size, - dst_fb->plane_width[i], - dst_fb->plane_height[i], - dst_fb->plane_bpp[i], - dst_fb->gem_handle, - dst_fb->offsets[i], - dst_fb->strides[i], - dst_tiling, - 0, 0 /* dst_x, dst_y */, - dst_fb->size); + + if (ahnd && fast_blit_ok(src_fb) && fast_blit_ok(dst_fb)) { + memset(&blt, 0, sizeof(blt)); + blt.color_depth = blt_get_bpp(src_fb); + + src = blt_fb_init(src_fb, i, mem_region); + dst = blt_fb_init(dst_fb, i, mem_region); + + blt_set_copy_object(&blt.src, src); + blt_set_copy_object(&blt.dst, dst); + + blt_set_batch(&blt.bb, bb, bb_size, mem_region); + + blt_fast_copy(src_fb->fd, ictx, e, ahnd, &blt); + gem_sync(src_fb->fd, blt.dst.handle); + + blt_destroy_object(src_fb->fd, src); + blt_destroy_object(dst_fb->fd, dst); + } else if (ahnd && blt_has_block_copy(src_fb->fd)) { + /* + * On GEN12+ X-tiled format support is removed from + * the fast blit command, so use the block copy blit + * command for it instead. + */ + src = blt_fb_init(src_fb, i, mem_region); + dst = blt_fb_init(dst_fb, i, mem_region); + + memset(&blt, 0, sizeof(blt)); + blt.print_bb = true; + blt.color_depth = blt_get_bpp(src_fb); + blt_set_copy_object(&blt.src, src); + blt_set_copy_object(&blt.dst, dst); + + if (HAS_FLATCCS(intel_get_drm_devid(src_fb->fd))) { + blt_set_object_ext(&ext.src, + blt_compression_format(&blt, src_fb), + src_fb->width, src_fb->height, + SURFACE_TYPE_2D); + + blt_set_object_ext(&ext.dst, + blt_compression_format(&blt, dst_fb), + dst_fb->width, dst_fb->height, + SURFACE_TYPE_2D); + + pext = &ext; + } + + blt_set_batch(&blt.bb, bb, bb_size, mem_region); + + blt_block_copy(src_fb->fd, ictx, e, ahnd, &blt, pext); + gem_sync(src_fb->fd, blt.dst.handle); + + blt_destroy_object(src_fb->fd, src); + blt_destroy_object(dst_fb->fd, dst); } else { + /* + * If on legacy hardware where relocations are supported + * we'll use XY_SRC blit command instead + */ igt_blitter_src_copy(dst_fb->fd, ahnd, ctx, NULL, src_fb->gem_handle, @@ -2750,6 +2917,7 @@ static void blitcopy(const struct igt_fb *dst_fb, if (ctx) gem_context_destroy(dst_fb->fd, ctx); put_ahnd(ahnd); + intel_ctx_destroy(src_fb->fd, ictx); } static void free_linear_mapping(struct fb_blit_upload *blit) -- 2.39.0 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/3] lib/igt_fb: switch blitcopy to use lib/i915/i915_blt functions 2023-03-28 18:30 ` [igt-dev] [PATCH i-g-t 2/3] lib/igt_fb: switch blitcopy to use lib/i915/i915_blt functions Juha-Pekka Heikkila @ 2023-04-03 6:17 ` Zbigniew Kempczyński 2023-05-31 15:50 ` Juha-Pekka Heikkila 0 siblings, 1 reply; 11+ messages in thread From: Zbigniew Kempczyński @ 2023-04-03 6:17 UTC (permalink / raw) To: Juha-Pekka Heikkila; +Cc: igt-dev On Tue, Mar 28, 2023 at 09:30:42PM +0300, Juha-Pekka Heikkila wrote: > reduce code duplication > > Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> > --- > lib/igt_fb.c | 214 +++++++++++++++++++++++++++++++++++++++++++++------ > 1 file changed, 191 insertions(+), 23 deletions(-) > > diff --git a/lib/igt_fb.c b/lib/igt_fb.c > index ba89e1f60..7668fc553 100644 > --- a/lib/igt_fb.c > +++ b/lib/igt_fb.c > @@ -35,6 +35,8 @@ > #include "drmtest.h" > #include "i915/gem_create.h" > #include "i915/gem_mman.h" > +#include "i915/i915_blt.h" > +#include "i915/intel_mocs.h" > #include "igt_aux.h" > #include "igt_color_encoding.h" > #include "igt_fb.h" > @@ -2680,12 +2682,132 @@ static void copy_with_engine(struct fb_blit_upload *blit, > fini_buf(src); > } > > +static struct blt_copy_object *blt_fb_init(const struct igt_fb *fb, > + uint32_t plane, uint32_t memregion) > +{ > + uint32_t name, handle; > + struct blt_copy_object *blt; > + enum blt_tiling_type blt_tile; > + uint64_t stride; > + > + blt = malloc(sizeof(*blt)); > + igt_assert(blt); > + > + name = gem_flink(fb->fd, fb->gem_handle); > + handle = gem_open(fb->fd, name); > + > + switch (igt_fb_mod_to_tiling(fb->modifier)) { > + case I915_TILING_X: > + blt_tile = T_XMAJOR; > + stride = fb->strides[plane] / 4; > + break; > + case I915_TILING_Y: > + blt_tile = T_YMAJOR; > + stride = fb->strides[plane] / 4; > + break; > + case I915_TILING_4: > + blt_tile = T_TILE4; > + stride = fb->strides[plane] / 4; > + break; > + case I915_TILING_NONE: > + default: > + blt_tile = T_LINEAR; > + stride = fb->strides[plane]; > + break; > + } > + > + blt_set_object(blt, handle, fb->size, memregion, > + intel_get_uc_mocs(fb->fd), > + blt_tile, > + is_ccs_modifier(fb->modifier) ? COMPRESSION_ENABLED : COMPRESSION_DISABLED, > + is_gen12_mc_ccs_modifier(fb->modifier) ? COMPRESSION_TYPE_MEDIA : COMPRESSION_TYPE_3D); > + > + blt_set_geom(blt, stride, 0, 0, fb->width, fb->plane_height[plane], 0, 0); > + > + blt->offset = fb->offsets[plane]; > + > + blt->ptr = gem_mmap__device_coherent(fb->fd, handle, 0, fb->size, > + PROT_READ | PROT_WRITE); > + return blt; > +} > + > +static enum blt_color_depth blt_get_bpp(const struct igt_fb *fb) > +{ > + switch (fb->plane_bpp[0]) { > + case 8: > + return CD_8bit; > + case 16: > + return CD_16bit; > + case 32: > + return CD_32bit; > + case 64: > + return CD_64bit; > + case 96: > + return CD_96bit; > + case 128: > + return CD_128bit; > + default: > + igt_assert(0); > + } > +} > + > +#define BLT_TARGET_RC(x) (x.compression == COMPRESSION_ENABLED && \ > + x.compression_type == COMPRESSION_TYPE_3D) > + > +#define BLT_TARGET_MC(x) (x.compression == COMPRESSION_ENABLED && \ > + x.compression_type == COMPRESSION_TYPE_MEDIA) > + > +static uint32_t blt_compression_format(struct blt_copy_data *blt, > + const struct igt_fb *fb) > +{ > + if (blt->src.compression == COMPRESSION_DISABLED && > + blt->dst.compression == COMPRESSION_DISABLED) > + return 0; > + > + if (BLT_TARGET_RC(blt->src) || BLT_TARGET_RC(blt->dst)) { > + switch (blt->color_depth) { > + case CD_32bit: > + return 8; > + default: > + igt_assert_f(0, "COMPRESSION_TYPE_3D unknown color depth\n"); > + } > + } > + > + if (BLT_TARGET_MC(blt->src) || BLT_TARGET_MC(blt->dst)) { > + switch (fb->drm_format) { > + case DRM_FORMAT_XRGB8888: > + return 8; > + case DRM_FORMAT_XYUV8888: > + return 9; > + case DRM_FORMAT_NV12: > + return 9; > + case DRM_FORMAT_P010: > + case DRM_FORMAT_P012: > + case DRM_FORMAT_P016: > + return 8; > + default: > + igt_assert_f(0, "COMPRESSION_TYPE_MEDIA unknown format\n"); > + } > + } else { > + igt_assert_f(0, "unknown compression\n"); > + } > +} > + > static void blitcopy(const struct igt_fb *dst_fb, > const struct igt_fb *src_fb) > { > uint32_t src_tiling, dst_tiling; > uint32_t ctx = 0; > uint64_t ahnd = 0; > + const intel_ctx_t *ictx = intel_ctx_create_all_physical(src_fb->fd); > + struct intel_execution_engine2 *e; > + uint32_t bb; > + uint64_t bb_size = 4096; > + struct blt_copy_data blt = {}; > + struct blt_copy_object *src, *dst; > + struct blt_block_copy_data_ext ext = {}, *pext = NULL; > + uint32_t mem_region = HAS_FLATCCS(intel_get_drm_devid(src_fb->fd)) > + ? REGION_LMEM(0) : REGION_SMEM; > > igt_assert_eq(dst_fb->fd, src_fb->fd); > igt_assert_eq(dst_fb->num_planes, src_fb->num_planes); > @@ -2697,36 +2819,81 @@ static void blitcopy(const struct igt_fb *dst_fb, > igt_require(gem_has_contexts(dst_fb->fd)); > ctx = gem_context_create(dst_fb->fd); > ahnd = get_reloc_ahnd(dst_fb->fd, ctx); > + > + igt_assert(__gem_create_in_memory_regions(src_fb->fd, > + &bb, > + &bb_size, > + mem_region) == 0); > + > + for_each_ctx_engine(src_fb->fd, ictx, e) { > + if (gem_engine_can_block_copy(src_fb->fd, e)) > + break; Hmm, this means we need to be careful when using cmds_info. As not all engines support block-copy simple information from the library (blt_has_block_copy()) is not enough. > + } > } > > for (int i = 0; i < dst_fb->num_planes; i++) { > igt_assert_eq(dst_fb->plane_bpp[i], src_fb->plane_bpp[i]); > igt_assert_eq(dst_fb->plane_width[i], src_fb->plane_width[i]); > igt_assert_eq(dst_fb->plane_height[i], src_fb->plane_height[i]); > - /* > - * On GEN12+ X-tiled format support is removed from the fast > - * blit command, so use the XY_SRC blit command for it > - * instead. > - */ > - if (fast_blit_ok(src_fb) && fast_blit_ok(dst_fb)) { > - igt_blitter_fast_copy__raw(dst_fb->fd, > - ahnd, ctx, NULL, > - src_fb->gem_handle, > - src_fb->offsets[i], > - src_fb->strides[i], > - src_tiling, > - 0, 0, /* src_x, src_y */ > - src_fb->size, > - dst_fb->plane_width[i], > - dst_fb->plane_height[i], > - dst_fb->plane_bpp[i], > - dst_fb->gem_handle, > - dst_fb->offsets[i], > - dst_fb->strides[i], > - dst_tiling, > - 0, 0 /* dst_x, dst_y */, > - dst_fb->size); > + > + if (ahnd && fast_blit_ok(src_fb) && fast_blit_ok(dst_fb)) { > + memset(&blt, 0, sizeof(blt)); > + blt.color_depth = blt_get_bpp(src_fb); > + > + src = blt_fb_init(src_fb, i, mem_region); > + dst = blt_fb_init(dst_fb, i, mem_region); > + > + blt_set_copy_object(&blt.src, src); > + blt_set_copy_object(&blt.dst, dst); > + > + blt_set_batch(&blt.bb, bb, bb_size, mem_region); > + > + blt_fast_copy(src_fb->fd, ictx, e, ahnd, &blt); Do we require block-copy engine here? > + gem_sync(src_fb->fd, blt.dst.handle); > + > + blt_destroy_object(src_fb->fd, src); > + blt_destroy_object(dst_fb->fd, dst); > + } else if (ahnd && blt_has_block_copy(src_fb->fd)) { > + /* > + * On GEN12+ X-tiled format support is removed from > + * the fast blit command, so use the block copy blit > + * command for it instead. > + */ > + src = blt_fb_init(src_fb, i, mem_region); > + dst = blt_fb_init(dst_fb, i, mem_region); > + > + memset(&blt, 0, sizeof(blt)); > + blt.print_bb = true; > + blt.color_depth = blt_get_bpp(src_fb); > + blt_set_copy_object(&blt.src, src); > + blt_set_copy_object(&blt.dst, dst); > + > + if (HAS_FLATCCS(intel_get_drm_devid(src_fb->fd))) { > + blt_set_object_ext(&ext.src, > + blt_compression_format(&blt, src_fb), > + src_fb->width, src_fb->height, > + SURFACE_TYPE_2D); > + > + blt_set_object_ext(&ext.dst, > + blt_compression_format(&blt, dst_fb), > + dst_fb->width, dst_fb->height, > + SURFACE_TYPE_2D); > + > + pext = &ext; > + } > + > + blt_set_batch(&blt.bb, bb, bb_size, mem_region); > + > + blt_block_copy(src_fb->fd, ictx, e, ahnd, &blt, pext); I think to prepend with: igt_assert(e); for potential situation there's no block-copy capable engine. -- Zbigniew > + gem_sync(src_fb->fd, blt.dst.handle); > + > + blt_destroy_object(src_fb->fd, src); > + blt_destroy_object(dst_fb->fd, dst); > } else { > + /* > + * If on legacy hardware where relocations are supported > + * we'll use XY_SRC blit command instead > + */ > igt_blitter_src_copy(dst_fb->fd, > ahnd, ctx, NULL, > src_fb->gem_handle, > @@ -2750,6 +2917,7 @@ static void blitcopy(const struct igt_fb *dst_fb, > if (ctx) > gem_context_destroy(dst_fb->fd, ctx); > put_ahnd(ahnd); > + intel_ctx_destroy(src_fb->fd, ictx); > } > > static void free_linear_mapping(struct fb_blit_upload *blit) > -- > 2.39.0 > ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/3] lib/igt_fb: switch blitcopy to use lib/i915/i915_blt functions 2023-04-03 6:17 ` Zbigniew Kempczyński @ 2023-05-31 15:50 ` Juha-Pekka Heikkila 2023-06-05 7:26 ` Zbigniew Kempczyński 0 siblings, 1 reply; 11+ messages in thread From: Juha-Pekka Heikkila @ 2023-05-31 15:50 UTC (permalink / raw) To: Zbigniew Kempczyński; +Cc: igt-dev On 3.4.2023 9.17, Zbigniew Kempczyński wrote: > On Tue, Mar 28, 2023 at 09:30:42PM +0300, Juha-Pekka Heikkila wrote: >> reduce code duplication >> >> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> >> --- >> lib/igt_fb.c | 214 +++++++++++++++++++++++++++++++++++++++++++++------ >> 1 file changed, 191 insertions(+), 23 deletions(-) >> >> diff --git a/lib/igt_fb.c b/lib/igt_fb.c >> index ba89e1f60..7668fc553 100644 >> --- a/lib/igt_fb.c >> +++ b/lib/igt_fb.c >> @@ -35,6 +35,8 @@ >> #include "drmtest.h" >> #include "i915/gem_create.h" >> #include "i915/gem_mman.h" >> +#include "i915/i915_blt.h" >> +#include "i915/intel_mocs.h" >> #include "igt_aux.h" >> #include "igt_color_encoding.h" >> #include "igt_fb.h" >> @@ -2680,12 +2682,132 @@ static void copy_with_engine(struct fb_blit_upload *blit, >> fini_buf(src); >> } >> >> +static struct blt_copy_object *blt_fb_init(const struct igt_fb *fb, >> + uint32_t plane, uint32_t memregion) >> +{ >> + uint32_t name, handle; >> + struct blt_copy_object *blt; >> + enum blt_tiling_type blt_tile; >> + uint64_t stride; >> + >> + blt = malloc(sizeof(*blt)); >> + igt_assert(blt); >> + >> + name = gem_flink(fb->fd, fb->gem_handle); >> + handle = gem_open(fb->fd, name); >> + >> + switch (igt_fb_mod_to_tiling(fb->modifier)) { >> + case I915_TILING_X: >> + blt_tile = T_XMAJOR; >> + stride = fb->strides[plane] / 4; >> + break; >> + case I915_TILING_Y: >> + blt_tile = T_YMAJOR; >> + stride = fb->strides[plane] / 4; >> + break; >> + case I915_TILING_4: >> + blt_tile = T_TILE4; >> + stride = fb->strides[plane] / 4; >> + break; >> + case I915_TILING_NONE: >> + default: >> + blt_tile = T_LINEAR; >> + stride = fb->strides[plane]; >> + break; >> + } >> + >> + blt_set_object(blt, handle, fb->size, memregion, >> + intel_get_uc_mocs(fb->fd), >> + blt_tile, >> + is_ccs_modifier(fb->modifier) ? COMPRESSION_ENABLED : COMPRESSION_DISABLED, >> + is_gen12_mc_ccs_modifier(fb->modifier) ? COMPRESSION_TYPE_MEDIA : COMPRESSION_TYPE_3D); >> + >> + blt_set_geom(blt, stride, 0, 0, fb->width, fb->plane_height[plane], 0, 0); >> + >> + blt->offset = fb->offsets[plane]; >> + >> + blt->ptr = gem_mmap__device_coherent(fb->fd, handle, 0, fb->size, >> + PROT_READ | PROT_WRITE); >> + return blt; >> +} >> + >> +static enum blt_color_depth blt_get_bpp(const struct igt_fb *fb) >> +{ >> + switch (fb->plane_bpp[0]) { >> + case 8: >> + return CD_8bit; >> + case 16: >> + return CD_16bit; >> + case 32: >> + return CD_32bit; >> + case 64: >> + return CD_64bit; >> + case 96: >> + return CD_96bit; >> + case 128: >> + return CD_128bit; >> + default: >> + igt_assert(0); >> + } >> +} >> + >> +#define BLT_TARGET_RC(x) (x.compression == COMPRESSION_ENABLED && \ >> + x.compression_type == COMPRESSION_TYPE_3D) >> + >> +#define BLT_TARGET_MC(x) (x.compression == COMPRESSION_ENABLED && \ >> + x.compression_type == COMPRESSION_TYPE_MEDIA) >> + >> +static uint32_t blt_compression_format(struct blt_copy_data *blt, >> + const struct igt_fb *fb) >> +{ >> + if (blt->src.compression == COMPRESSION_DISABLED && >> + blt->dst.compression == COMPRESSION_DISABLED) >> + return 0; >> + >> + if (BLT_TARGET_RC(blt->src) || BLT_TARGET_RC(blt->dst)) { >> + switch (blt->color_depth) { >> + case CD_32bit: >> + return 8; >> + default: >> + igt_assert_f(0, "COMPRESSION_TYPE_3D unknown color depth\n"); >> + } >> + } >> + >> + if (BLT_TARGET_MC(blt->src) || BLT_TARGET_MC(blt->dst)) { >> + switch (fb->drm_format) { >> + case DRM_FORMAT_XRGB8888: >> + return 8; >> + case DRM_FORMAT_XYUV8888: >> + return 9; >> + case DRM_FORMAT_NV12: >> + return 9; >> + case DRM_FORMAT_P010: >> + case DRM_FORMAT_P012: >> + case DRM_FORMAT_P016: >> + return 8; >> + default: >> + igt_assert_f(0, "COMPRESSION_TYPE_MEDIA unknown format\n"); >> + } >> + } else { >> + igt_assert_f(0, "unknown compression\n"); >> + } >> +} >> + >> static void blitcopy(const struct igt_fb *dst_fb, >> const struct igt_fb *src_fb) >> { >> uint32_t src_tiling, dst_tiling; >> uint32_t ctx = 0; >> uint64_t ahnd = 0; >> + const intel_ctx_t *ictx = intel_ctx_create_all_physical(src_fb->fd); >> + struct intel_execution_engine2 *e; >> + uint32_t bb; >> + uint64_t bb_size = 4096; >> + struct blt_copy_data blt = {}; >> + struct blt_copy_object *src, *dst; >> + struct blt_block_copy_data_ext ext = {}, *pext = NULL; >> + uint32_t mem_region = HAS_FLATCCS(intel_get_drm_devid(src_fb->fd)) >> + ? REGION_LMEM(0) : REGION_SMEM; >> >> igt_assert_eq(dst_fb->fd, src_fb->fd); >> igt_assert_eq(dst_fb->num_planes, src_fb->num_planes); >> @@ -2697,36 +2819,81 @@ static void blitcopy(const struct igt_fb *dst_fb, >> igt_require(gem_has_contexts(dst_fb->fd)); >> ctx = gem_context_create(dst_fb->fd); >> ahnd = get_reloc_ahnd(dst_fb->fd, ctx); >> + >> + igt_assert(__gem_create_in_memory_regions(src_fb->fd, >> + &bb, >> + &bb_size, >> + mem_region) == 0); >> + >> + for_each_ctx_engine(src_fb->fd, ictx, e) { >> + if (gem_engine_can_block_copy(src_fb->fd, e)) >> + break; > > Hmm, this means we need to be careful when using cmds_info. As > not all engines support block-copy simple information from the > library (blt_has_block_copy()) is not enough. Thanks for the comments Zbigniew, I fell out from this work for a while with Covid and now finally reached to state with all other things I can continue with this. I wasn't certain what you meant with above comment? There would be better way to find correct engine for doing block copy? As is I'm testing new version of this set where these parts are bit changed, I'll probably today/tomorrow send another version for ci to show what I still missed. My final target with all this is blitter path would do rc ccs and I'd need Vebox only for compressing mc ccs. /Juha-Pekka > >> + } >> } >> >> for (int i = 0; i < dst_fb->num_planes; i++) { >> igt_assert_eq(dst_fb->plane_bpp[i], src_fb->plane_bpp[i]); >> igt_assert_eq(dst_fb->plane_width[i], src_fb->plane_width[i]); >> igt_assert_eq(dst_fb->plane_height[i], src_fb->plane_height[i]); >> - /* >> - * On GEN12+ X-tiled format support is removed from the fast >> - * blit command, so use the XY_SRC blit command for it >> - * instead. >> - */ >> - if (fast_blit_ok(src_fb) && fast_blit_ok(dst_fb)) { >> - igt_blitter_fast_copy__raw(dst_fb->fd, >> - ahnd, ctx, NULL, >> - src_fb->gem_handle, >> - src_fb->offsets[i], >> - src_fb->strides[i], >> - src_tiling, >> - 0, 0, /* src_x, src_y */ >> - src_fb->size, >> - dst_fb->plane_width[i], >> - dst_fb->plane_height[i], >> - dst_fb->plane_bpp[i], >> - dst_fb->gem_handle, >> - dst_fb->offsets[i], >> - dst_fb->strides[i], >> - dst_tiling, >> - 0, 0 /* dst_x, dst_y */, >> - dst_fb->size); >> + >> + if (ahnd && fast_blit_ok(src_fb) && fast_blit_ok(dst_fb)) { >> + memset(&blt, 0, sizeof(blt)); >> + blt.color_depth = blt_get_bpp(src_fb); >> + >> + src = blt_fb_init(src_fb, i, mem_region); >> + dst = blt_fb_init(dst_fb, i, mem_region); >> + >> + blt_set_copy_object(&blt.src, src); >> + blt_set_copy_object(&blt.dst, dst); >> + >> + blt_set_batch(&blt.bb, bb, bb_size, mem_region); >> + >> + blt_fast_copy(src_fb->fd, ictx, e, ahnd, &blt); > > Do we require block-copy engine here? > >> + gem_sync(src_fb->fd, blt.dst.handle); >> + >> + blt_destroy_object(src_fb->fd, src); >> + blt_destroy_object(dst_fb->fd, dst); >> + } else if (ahnd && blt_has_block_copy(src_fb->fd)) { >> + /* >> + * On GEN12+ X-tiled format support is removed from >> + * the fast blit command, so use the block copy blit >> + * command for it instead. >> + */ >> + src = blt_fb_init(src_fb, i, mem_region); >> + dst = blt_fb_init(dst_fb, i, mem_region); >> + >> + memset(&blt, 0, sizeof(blt)); >> + blt.print_bb = true; >> + blt.color_depth = blt_get_bpp(src_fb); >> + blt_set_copy_object(&blt.src, src); >> + blt_set_copy_object(&blt.dst, dst); >> + >> + if (HAS_FLATCCS(intel_get_drm_devid(src_fb->fd))) { >> + blt_set_object_ext(&ext.src, >> + blt_compression_format(&blt, src_fb), >> + src_fb->width, src_fb->height, >> + SURFACE_TYPE_2D); >> + >> + blt_set_object_ext(&ext.dst, >> + blt_compression_format(&blt, dst_fb), >> + dst_fb->width, dst_fb->height, >> + SURFACE_TYPE_2D); >> + >> + pext = &ext; >> + } >> + >> + blt_set_batch(&blt.bb, bb, bb_size, mem_region); >> + >> + blt_block_copy(src_fb->fd, ictx, e, ahnd, &blt, pext); > > I think to prepend with: > > igt_assert(e); > > for potential situation there's no block-copy capable engine. > > -- > Zbigniew > >> + gem_sync(src_fb->fd, blt.dst.handle); >> + >> + blt_destroy_object(src_fb->fd, src); >> + blt_destroy_object(dst_fb->fd, dst); >> } else { >> + /* >> + * If on legacy hardware where relocations are supported >> + * we'll use XY_SRC blit command instead >> + */ >> igt_blitter_src_copy(dst_fb->fd, >> ahnd, ctx, NULL, >> src_fb->gem_handle, >> @@ -2750,6 +2917,7 @@ static void blitcopy(const struct igt_fb *dst_fb, >> if (ctx) >> gem_context_destroy(dst_fb->fd, ctx); >> put_ahnd(ahnd); >> + intel_ctx_destroy(src_fb->fd, ictx); >> } >> >> static void free_linear_mapping(struct fb_blit_upload *blit) >> -- >> 2.39.0 >> ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/3] lib/igt_fb: switch blitcopy to use lib/i915/i915_blt functions 2023-05-31 15:50 ` Juha-Pekka Heikkila @ 2023-06-05 7:26 ` Zbigniew Kempczyński 0 siblings, 0 replies; 11+ messages in thread From: Zbigniew Kempczyński @ 2023-06-05 7:26 UTC (permalink / raw) To: Juha-Pekka Heikkila; +Cc: igt-dev On Wed, May 31, 2023 at 06:50:39PM +0300, Juha-Pekka Heikkila wrote: <cut> > > > + for_each_ctx_engine(src_fb->fd, ictx, e) { > > > + if (gem_engine_can_block_copy(src_fb->fd, e)) > > > + break; > > > > Hmm, this means we need to be careful when using cmds_info. As > > not all engines support block-copy simple information from the > > library (blt_has_block_copy()) is not enough. > > Thanks for the comments Zbigniew, I fell out from this work for a while with > Covid and now finally reached to state with all other things I can continue > with this. > > I wasn't certain what you meant with above comment? There would be better > way to find correct engine for doing block copy? As is I'm testing new > version of this set where these parts are bit changed, I'll probably > today/tomorrow send another version for ci to show what I still missed. I'm sorry for the confusion, I was sure gem_engine_can_block_copy() calls i915_blt function which doesn't check engine capability, just reports platform supports block-copy or not. Function you're using just does what I mean - checks engine block-copy capability. -- Zbigniew > > My final target with all this is blitter path would do rc ccs and I'd need > Vebox only for compressing mc ccs. > > /Juha-Pekka > ^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2023-06-07 6:47 UTC | newest] Thread overview: 11+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2023-05-31 19:21 [igt-dev] [PATCH i-g-t 0/3] Try to have one less blitter path Juha-Pekka Heikkila 2023-05-31 19:21 ` [igt-dev] [PATCH i-g-t 1/3] lib/i915/i915_blt: Add offset to block and fast copy Juha-Pekka Heikkila 2023-05-31 19:21 ` [igt-dev] [PATCH i-g-t 2/3] lib/igt_fb: switch blitcopy to use lib/i915/i915_blt functions Juha-Pekka Heikkila 2023-06-07 6:47 ` Zbigniew Kempczyński 2023-05-31 19:21 ` [igt-dev] [PATCH i-g-t 3/3] lib/igt_fb: use blitter for rendercompression on Intel hw with flat ccs Juha-Pekka Heikkila 2023-05-31 21:31 ` [igt-dev] ✓ Fi.CI.BAT: success for Try to have one less blitter path Patchwork 2023-06-02 12:52 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork -- strict thread matches above, loose matches on Subject: below -- 2023-03-28 18:30 [igt-dev] [PATCH i-g-t 0/3] switch lib/igt_fb.c to use lib/i915/i915_blt functions for blitter on Intel hw Juha-Pekka Heikkila 2023-03-28 18:30 ` [igt-dev] [PATCH i-g-t 2/3] lib/igt_fb: switch blitcopy to use lib/i915/i915_blt functions Juha-Pekka Heikkila 2023-04-03 6:17 ` Zbigniew Kempczyński 2023-05-31 15:50 ` Juha-Pekka Heikkila 2023-06-05 7:26 ` Zbigniew Kempczyński
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