Igt-dev Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Ashutosh Dixit <ashutosh.dixit@intel.com>
To: igt-dev@lists.freedesktop.org
Subject: [igt-dev] [PATCH i-g-t 1/4] tests/gem_ctx_freq: Add support for multi-gts
Date: Mon,  5 Jun 2023 18:21:47 -0700	[thread overview]
Message-ID: <20230606012150.2119065-2-ashutosh.dixit@intel.com> (raw)
In-Reply-To: <20230606012150.2119065-1-ashutosh.dixit@intel.com>

From: Vinay Belgaumkar <vinay.belgaumkar@intel.com>

Run subtest sysfs-range on available sysfs interfaces.

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
---
 tests/i915/gem_ctx_freq.c | 99 ++++++++++++++++++++++++++-------------
 1 file changed, 66 insertions(+), 33 deletions(-)

diff --git a/tests/i915/gem_ctx_freq.c b/tests/i915/gem_ctx_freq.c
index 2c30934daa23..b2f6c2af55e1 100644
--- a/tests/i915/gem_ctx_freq.c
+++ b/tests/i915/gem_ctx_freq.c
@@ -24,12 +24,15 @@
 
 #include <errno.h>
 #include <fcntl.h>
+#include <limits.h>
 #include <sched.h>
 #include <stdlib.h>
 #include <stdint.h>
 #include <unistd.h>
 
 #include "i915/gem.h"
+#include "i915/gem_engine_topology.h"
+#include "i915_drm.h"
 #include "igt.h"
 #include "igt_perf.h"
 #include "igt_sysfs.h"
@@ -49,6 +52,7 @@
 #define SAMPLE_PERIOD (USEC_PER_SEC / 10)
 #define PMU_TOLERANCE 100
 
+static int i915 = -1;
 static int sysfs = -1;
 
 static void kick_rps_worker(void)
@@ -90,7 +94,7 @@ static void pmu_assert(double actual, double target)
 		     actual, target, PMU_TOLERANCE);
 }
 
-static void busy_wait_until_idle(int i915, igt_spin_t *spin)
+static void busy_wait_until_idle(igt_spin_t *spin)
 {
 	igt_spin_end(spin);
 	do {
@@ -98,9 +102,9 @@ static void busy_wait_until_idle(int i915, igt_spin_t *spin)
 	} while (gem_bo_busy(i915, spin->handle));
 }
 
-static void __igt_spin_free_idle(int i915, igt_spin_t *spin)
+static void __igt_spin_free_idle(igt_spin_t *spin)
 {
-	busy_wait_until_idle(i915, spin);
+	busy_wait_until_idle(spin);
 
 	igt_spin_free(i915, spin);
 }
@@ -115,23 +119,25 @@ static void triangle_fill(uint32_t *t, unsigned int nstep,
 	}
 }
 
-static void set_sysfs_freq(uint32_t min, uint32_t max)
+static void set_sysfs_freq(int dirfd, uint32_t min, uint32_t max)
 {
-	igt_sysfs_printf(sysfs, "gt_min_freq_mhz", "%u", min);
-	igt_sysfs_printf(sysfs, "gt_max_freq_mhz", "%u", max);
+	igt_sysfs_rps_printf(dirfd, RPS_MIN_FREQ_MHZ, "%u", min);
+	igt_sysfs_rps_printf(dirfd, RPS_MAX_FREQ_MHZ, "%u", max);
 }
 
-static bool get_sysfs_freq(uint32_t *min, uint32_t *max)
+static bool get_sysfs_freq(int dirfd, uint32_t *min, uint32_t *max)
 {
-	return (igt_sysfs_scanf(sysfs, "gt_min_freq_mhz", "%u", min) == 1 &&
-		igt_sysfs_scanf(sysfs, "gt_max_freq_mhz", "%u", max) == 1);
+	return (igt_sysfs_rps_scanf(dirfd, RPS_MIN_FREQ_MHZ, "%u", min) == 1 &&
+		igt_sysfs_rps_scanf(dirfd, RPS_MAX_FREQ_MHZ, "%u", max) == 1);
 }
 
-static void sysfs_range(int i915)
+static void sysfs_range(int dirfd, int gt)
 {
 #define N_STEPS 10
 	uint32_t frequencies[TRIANGLE_SIZE(N_STEPS)];
-	uint32_t sys_min, sys_max;
+	struct i915_engine_class_instance *ci;
+	uint32_t sys_min, sys_max, ctx;
+	unsigned int count;
 	igt_spin_t *spin;
 	double measured;
 	int pmu;
@@ -144,12 +150,19 @@ static void sysfs_range(int i915)
 	 * constriained sysfs range.
 	 */
 
-	igt_require(get_sysfs_freq(&sys_min, &sys_max));
+	igt_require(get_sysfs_freq(dirfd, &sys_min, &sys_max));
 	igt_info("System min freq: %dMHz; max freq: %dMHz\n", sys_min, sys_max);
 
 	triangle_fill(frequencies, N_STEPS, sys_min, sys_max);
 
-	pmu = perf_i915_open(i915, I915_PMU_REQUESTED_FREQUENCY);
+	ci = gem_list_engines(i915, 1 << gt, ~0U, &count);
+	igt_require(ci);
+	ctx = gem_context_create_for_engine(i915,
+					    ci[0].engine_class,
+					    ci[0].engine_instance);
+	free(ci);
+
+	pmu = perf_i915_open(i915, __I915_PMU_REQUESTED_FREQUENCY(gt));
 	igt_require(pmu >= 0);
 
 	for (int outer = 0; outer <= 2*N_STEPS; outer++) {
@@ -157,17 +170,17 @@ static void sysfs_range(int i915)
 		uint32_t cur, discard;
 
 		gem_quiescent_gpu(i915);
-		spin = igt_spin_new(i915, .ahnd = ahnd);
+		spin = igt_spin_new(i915, .ahnd = ahnd, .ctx_id = ctx);
 		usleep(10000);
 
-		set_sysfs_freq(sys_freq, sys_freq);
-		get_sysfs_freq(&cur, &discard);
+		set_sysfs_freq(dirfd, sys_freq, sys_freq);
+		get_sysfs_freq(dirfd, &cur, &discard);
 
 		measured = measure_frequency(pmu, SAMPLE_PERIOD);
 		igt_debugfs_dump(i915, "i915_rps_boost_info");
 
-		set_sysfs_freq(sys_min, sys_max);
-		__igt_spin_free_idle(i915, spin);
+		set_sysfs_freq(dirfd, sys_min, sys_max);
+		__igt_spin_free_idle(spin);
 
 		igt_info("sysfs: Measured %.1fMHz, expected %dMhz\n",
 			 measured, cur);
@@ -175,42 +188,57 @@ static void sysfs_range(int i915)
 	}
 	gem_quiescent_gpu(i915);
 
+	gem_context_destroy(i915, ctx);
 	close(pmu);
 	put_ahnd(ahnd);
 
 #undef N_STEPS
 }
 
-static void restore_sysfs_freq(int sig)
+static void __restore_sysfs_freq(int dirfd)
 {
 	char buf[256];
 
 	if (igt_sysfs_read(sysfs, "gt_RPn_freq_mhz", buf, sizeof(buf)) > 0)
-		igt_sysfs_set(sysfs, "gt_min_freq_mhz", buf);
+		igt_sysfs_rps_set(dirfd, RPS_MIN_FREQ_MHZ, buf);
 
-	if (igt_sysfs_read(sysfs, "gt_RP0_freq_mhz", buf, sizeof(buf)) > 0) {
-		igt_sysfs_set(sysfs, "gt_max_freq_mhz", buf);
-		igt_sysfs_set(sysfs, "gt_boost_freq_mhz", buf);
+	if (igt_sysfs_rps_read(dirfd, RPS_RP0_FREQ_MHZ, buf, sizeof(buf)) > 0) {
+		igt_sysfs_rps_set(dirfd, RPS_MAX_FREQ_MHZ, buf);
+		igt_sysfs_rps_set(dirfd, RPS_BOOST_FREQ_MHZ, buf);
 	}
 }
 
-static void disable_boost(void)
+static void restore_sysfs_freq(int sig)
+{
+	int dirfd, gt;
+
+	for_each_sysfs_gt_dirfd(i915, dirfd, gt)
+		__restore_sysfs_freq(dirfd);
+}
+
+static void __disable_boost(int dirfd)
 {
 	char buf[256];
 
-	if (igt_sysfs_read(sysfs, "gt_RPn_freq_mhz", buf, sizeof(buf)) > 0) {
-		igt_sysfs_set(sysfs, "gt_min_freq_mhz", buf);
-		igt_sysfs_set(sysfs, "gt_boost_freq_mhz", buf);
+	if (igt_sysfs_rps_read(dirfd, RPS_RPn_FREQ_MHZ, buf, sizeof(buf)) > 0) {
+		igt_sysfs_rps_set(dirfd, RPS_MIN_FREQ_MHZ, buf);
+		igt_sysfs_rps_set(dirfd, RPS_BOOST_FREQ_MHZ, buf);
 	}
 
-	if (igt_sysfs_read(sysfs, "gt_RP0_freq_mhz", buf, sizeof(buf)) > 0)
-		igt_sysfs_set(sysfs, "gt_max_freq_mhz", buf);
+	if (igt_sysfs_rps_read(dirfd, RPS_RP0_FREQ_MHZ, buf, sizeof(buf)) > 0)
+		igt_sysfs_rps_set(dirfd, RPS_MAX_FREQ_MHZ, buf);
 }
 
-igt_main
+static void disable_boost(void)
 {
-	int i915 = -1;
+	int dirfd, gt;
+
+	for_each_sysfs_gt_dirfd(i915, dirfd, gt)
+		__disable_boost(dirfd);
+}
 
+igt_main
+{
 	igt_fixture {
 		i915 = drm_open_driver(DRIVER_INTEL);
 		igt_require_gem(i915);
@@ -222,6 +250,11 @@ igt_main
 		disable_boost();
 	}
 
-	igt_subtest_f("sysfs")
-		sysfs_range(i915);
+	igt_subtest_with_dynamic_f("sysfs") {
+		int dirfd, gt;
+
+		for_each_sysfs_gt_dirfd(i915, dirfd, gt)
+			igt_dynamic_f("gt%u", gt)
+				sysfs_range(dirfd, gt);
+	}
 }
-- 
2.38.0

  reply	other threads:[~2023-06-06  1:21 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-06  1:21 [igt-dev] [PATCH i-g-t 0/4] gem_ctx_freq: multi-gt support and disable efficient freq Ashutosh Dixit
2023-06-06  1:21 ` Ashutosh Dixit [this message]
2023-06-07 23:47   ` [igt-dev] [PATCH i-g-t 1/4] tests/gem_ctx_freq: Add support for multi-gts Dixit, Ashutosh
2023-06-06  1:21 ` [igt-dev] [PATCH i-g-t 2/4] lib/igt_sysfs: Don't assert in igt_sysfs_dir_id_to_name Ashutosh Dixit
2023-06-06  1:27   ` Dixit, Ashutosh
2023-06-07 20:53   ` Umesh Nerlige Ramappa
2023-06-06  1:21 ` [igt-dev] [PATCH i-g-t 3/4] tests/gem_ctx_freq: Disable SLPC efficient freq for the test Ashutosh Dixit
2023-06-07 21:35   ` Umesh Nerlige Ramappa
2023-06-08  2:28     ` Dixit, Ashutosh
2023-06-08  6:01   ` Belgaumkar, Vinay
2023-06-08 15:50     ` Dixit, Ashutosh
2023-06-06  1:21 ` [igt-dev] [PATCH i-g-t 4/4] HAX: Add gem_ctx_freq to BAT testlist Ashutosh Dixit
2023-06-06  2:27 ` [igt-dev] ✓ Fi.CI.BAT: success for gem_ctx_freq: multi-gt support and disable efficient freq Patchwork
2023-06-06 23:36 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2023-06-08 15:47 [igt-dev] [PATCH v2 i-g-t 0/4] " Ashutosh Dixit
2023-06-08 15:47 ` [igt-dev] [PATCH i-g-t 1/4] tests/gem_ctx_freq: Add support for multi-gts Ashutosh Dixit

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20230606012150.2119065-2-ashutosh.dixit@intel.com \
    --to=ashutosh.dixit@intel.com \
    --cc=igt-dev@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox