[igt-dev] [PATCH i-g-t v2 0/6] IGT bits for small-bar

[igt-dev] [PATCH i-g-t v2 0/6] IGT bits for small-bar

[Matthew Auld]

small-bar IGT changes for Xe.

v2: Rebase on latest IGT, plus various improvements

Kernel: https://patchwork.freedesktop.org/series/115515/

-- 
2.40.1

[igt-dev] [PATCH i-g-t v2 1/6] xe: sync small-bar uapi

[Matthew Auld]

We need a couple new fields for the region query and the new flag to
ensure the buffer is CPU accessible.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
---
 include/drm-uapi/xe_drm.h | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h
index 593b01ba5..441b377b7 100644
--- a/include/drm-uapi/xe_drm.h
+++ b/include/drm-uapi/xe_drm.h
@@ -169,7 +169,9 @@ struct drm_xe_query_mem_usage {
 		__u32 max_page_size;
 		__u64 total_size;
 		__u64 used;
-		__u64 reserved[8];
+		__u64 cpu_visible_size;
+		__u64 cpu_visible_used;
+		__u64 reserved[6];
 	} regions[];
 };
 
@@ -270,6 +272,7 @@ struct drm_xe_gem_create {
 	 */
 #define XE_GEM_CREATE_FLAG_DEFER_BACKING	(0x1 << 24)
 #define XE_GEM_CREATE_FLAG_SCANOUT		(0x1 << 25)
+#define XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM	(0x1 << 26)
 	__u32 flags;
 
 	/**
-- 
2.40.1

[igt-dev] [PATCH i-g-t v2 2/6] lib/xe: add visible vram helpers

[Matthew Auld]

Add helpers for object creation and querying the cpu_visible related bits.

v2: Make it backwards compat with older kernels

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
---
 lib/xe/xe_query.c | 86 ++++++++++++++++++++++++++++++++++++++++++++++-
 lib/xe/xe_query.h |  6 ++++
 2 files changed, 91 insertions(+), 1 deletion(-)

diff --git a/lib/xe/xe_query.c b/lib/xe/xe_query.c
index 47be8f301..81a9ec664 100644
--- a/lib/xe/xe_query.c
+++ b/lib/xe/xe_query.c
@@ -140,6 +140,17 @@ static uint64_t gt_vram_size(const struct drm_xe_query_mem_usage *mem_usage,
 	return 0;
 }
 
+static uint64_t gt_visible_vram_size(const struct drm_xe_query_mem_usage *mem_usage,
+				     const struct drm_xe_query_gts *gts, int gt)
+{
+	int region_idx = ffs(native_region_for_gt(gts, gt)) - 1;
+
+	if (XE_IS_CLASS_VRAM(&mem_usage->regions[region_idx]))
+		return mem_usage->regions[region_idx].cpu_visible_size;
+
+	return 0;
+}
+
 static bool __mem_has_vram(struct drm_xe_query_mem_usage *mem_usage)
 {
 	for (int i = 0; i < mem_usage->num_regions; i++)
@@ -246,9 +257,14 @@ struct xe_device *xe_device_get(int fd)
 	xe_dev->hw_engines = xe_query_engines_new(fd, &xe_dev->number_hw_engines);
 	xe_dev->mem_usage = xe_query_mem_usage_new(fd);
 	xe_dev->vram_size = calloc(xe_dev->number_gt, sizeof(*xe_dev->vram_size));
-	for (int gt = 0; gt < xe_dev->number_gt; gt++)
+	xe_dev->visible_vram_size = calloc(xe_dev->number_gt, sizeof(*xe_dev->visible_vram_size));
+	for (int gt = 0; gt < xe_dev->number_gt; gt++) {
 		xe_dev->vram_size[gt] = gt_vram_size(xe_dev->mem_usage,
 						     xe_dev->gts, gt);
+		xe_dev->visible_vram_size[gt] =
+			gt_visible_vram_size(xe_dev->mem_usage,
+					     xe_dev->gts, gt);
+	}
 	xe_dev->default_alignment = __mem_default_alignment(xe_dev->mem_usage);
 	xe_dev->has_vram = __mem_has_vram(xe_dev->mem_usage);
 
@@ -383,6 +399,33 @@ uint64_t vram_memory(int fd, int gt)
 	return xe_has_vram(fd) ? native_region_for_gt(xe_dev->gts, gt) : 0;
 }
 
+static uint64_t __xe_visible_vram_size(int fd, int gt)
+{
+	struct xe_device *xe_dev;
+
+	xe_dev = find_in_cache(fd);
+	igt_assert(xe_dev);
+
+	return xe_dev->visible_vram_size[gt];
+}
+
+/**
+ * visible_vram_memory:
+ * @fd: xe device fd
+ * @gt: gt id
+ *
+ * Returns vram memory bitmask for xe device @fd and @gt id, with
+ * XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM also set, to ensure that CPU access is
+ * possible.
+ */
+uint64_t visible_vram_memory(int fd, int gt)
+{
+	if (__xe_visible_vram_size(fd, gt))
+		return vram_memory(fd, gt) | XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM;
+	else
+		return vram_memory(fd, gt); /* older kernel */
+}
+
 /**
  * vram_if_possible:
  * @fd: xe device fd
@@ -396,6 +439,28 @@ uint64_t vram_if_possible(int fd, int gt)
 	return vram_memory(fd, gt) ?: system_memory(fd);
 }
 
+/**
+ * visible_vram_if_possible:
+ * @fd: xe device fd
+ * @gt: gt id
+ *
+ * Returns vram memory bitmask for xe device @fd and @gt id or system memory if
+ * there's no vram memory available for @gt. Also attaches the
+ * XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM to ensure that CPU access is possible
+ * when using vram.
+ */
+uint64_t visible_vram_if_possible(int fd, int gt)
+{
+	uint64_t regions = all_memory_regions(fd);
+	uint64_t system_memory = regions & 0x1;
+	uint64_t vram = regions & (0x2 << gt);
+
+	if (__xe_visible_vram_size(fd, gt))
+		return vram ? vram | XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM : system_memory;
+	else
+		return vram ? vram : system_memory; /* older kernel */
+}
+
 /**
  * xe_hw_engines:
  * @fd: xe device fd
@@ -512,6 +577,24 @@ uint64_t xe_vram_size(int fd, int gt)
 	return xe_dev->vram_size[gt];
 }
 
+/**
+ * xe_visible_vram_size:
+ * @fd: xe device fd
+ * @gt: gt
+ *
+ * Returns size of visible vram of xe device @fd.
+ */
+uint64_t xe_visible_vram_size(int fd, int gt)
+{
+	uint64_t visible_size;
+
+	visible_size = __xe_visible_vram_size(fd, gt);
+	if (!visible_size) /* older kernel */
+		visible_size = xe_vram_size(fd, gt);
+
+	return visible_size;
+}
+
 /**
  * xe_get_default_alignment:
  * @fd: xe device fd
@@ -528,6 +611,7 @@ xe_dev_FN(xe_get_default_alignment, default_alignment, uint32_t);
  */
 xe_dev_FN(xe_va_bits, va_bits, uint32_t);
 
+
 /**
  * xe_dev_id:
  * @fd: xe device fd
diff --git a/lib/xe/xe_query.h b/lib/xe/xe_query.h
index 943ca558a..e2e5dcd00 100644
--- a/lib/xe/xe_query.h
+++ b/lib/xe/xe_query.h
@@ -47,6 +47,9 @@ struct xe_device {
 	/** @vram_size: array of vram sizes for all gts */
 	uint64_t *vram_size;
 
+	/** @visible_vram_size: array of visible vram sizes for all gts */
+	uint64_t *visible_vram_size;
+
 	/** @default_alignment: safe alignment regardless region location */
 	uint32_t default_alignment;
 
@@ -80,7 +83,9 @@ unsigned int xe_number_gt(int fd);
 uint64_t all_memory_regions(int fd);
 uint64_t system_memory(int fd);
 uint64_t vram_memory(int fd, int gt);
+uint64_t visible_vram_memory(int fd, int gt);
 uint64_t vram_if_possible(int fd, int gt);
+uint64_t visible_vram_if_possible(int fd, int gt);
 struct drm_xe_engine_class_instance *xe_hw_engines(int fd);
 struct drm_xe_engine_class_instance *xe_hw_engine(int fd, int idx);
 struct drm_xe_query_mem_region *xe_mem_region(int fd, uint64_t region);
@@ -89,6 +94,7 @@ uint32_t xe_min_page_size(int fd, uint64_t region);
 unsigned int xe_number_hw_engines(int fd);
 bool xe_has_vram(int fd);
 uint64_t xe_vram_size(int fd, int gt);
+uint64_t xe_visible_vram_size(int fd, int gt);
 uint32_t xe_get_default_alignment(int fd);
 uint32_t xe_va_bits(int fd);
 uint16_t xe_dev_id(int fd);
-- 
2.40.1

[igt-dev] [PATCH i-g-t v2 3/6] lib/xe: handle small-bar systems

[Matthew Auld]

The spinner stuff wants to use mmap. The fb related stuff might want to
CPU access the buffer, so just always ask for it. And the batch buffer
stuff is pretty much always going to need to CPU access the buffer.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
---
 lib/igt_draw.c          | 2 +-
 lib/igt_fb.c            | 2 +-
 lib/intel_batchbuffer.c | 4 ++--
 lib/xe/xe_spin.c        | 3 ++-
 4 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/lib/igt_draw.c b/lib/igt_draw.c
index a5c0cbbf6..519018eb3 100644
--- a/lib/igt_draw.c
+++ b/lib/igt_draw.c
@@ -794,7 +794,7 @@ static void draw_rect_render(int fd, struct cmd_data *cmd_data,
 	else
 		tmp.handle = xe_bo_create_flags(fd, 0,
 						ALIGN(tmp.size, xe_get_default_alignment(fd)),
-						vram_if_possible(fd, 0));
+						visible_vram_if_possible(fd, 0));
 
 	tmp.stride = rect->w * pixel_size;
 	tmp.bpp = buf->bpp;
diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index 9be312a28..e5e52946e 100644
--- a/lib/igt_fb.c
+++ b/lib/igt_fb.c
@@ -1192,7 +1192,7 @@ static int create_bo_for_fb(struct igt_fb *fb, bool prefer_sysmem)
 			igt_assert(err == 0 || err == -EOPNOTSUPP);
 		} else if (is_xe_device(fd)) {
 			fb->gem_handle = xe_bo_create_flags(fd, 0, fb->size,
-							vram_if_possible(fd, 0));
+							visible_vram_if_possible(fd, 0));
 		} else if (is_vc4_device(fd)) {
 			fb->gem_handle = igt_vc4_create_bo(fd, fb->size);
 
diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
index 3cd680072..047843006 100644
--- a/lib/intel_batchbuffer.c
+++ b/lib/intel_batchbuffer.c
@@ -943,7 +943,7 @@ __intel_bb_create(int fd, uint32_t ctx, uint32_t vm, const intel_ctx_cfg_t *cfg,
 
 		ibb->alignment = xe_get_default_alignment(fd);
 		size = ALIGN(size, ibb->alignment);
-		ibb->handle = xe_bo_create_flags(fd, 0, size, vram_if_possible(fd, 0));
+		ibb->handle = xe_bo_create_flags(fd, 0, size, visible_vram_if_possible(fd, 0));
 
 		/* Limit to 48-bit due to MI_* address limitation */
 		ibb->gtt_size = 1ull << min_t(uint32_t, xe_va_bits(fd), 48);
@@ -1399,7 +1399,7 @@ void intel_bb_reset(struct intel_bb *ibb, bool purge_objects_cache)
 		ibb->handle = gem_create(ibb->fd, ibb->size);
 	else
 		ibb->handle = xe_bo_create_flags(ibb->fd, 0, ibb->size,
-						 vram_if_possible(ibb->fd, 0));
+						 visible_vram_if_possible(ibb->fd, 0));
 
 	/* Reacquire offset for RELOC and SIMPLE */
 	if (ibb->allocator_type == INTEL_ALLOCATOR_SIMPLE ||
diff --git a/lib/xe/xe_spin.c b/lib/xe/xe_spin.c
index 856d0ba22..3266905c9 100644
--- a/lib/xe/xe_spin.c
+++ b/lib/xe/xe_spin.c
@@ -100,7 +100,8 @@ void xe_cork_init(int fd, struct drm_xe_engine_class_instance *hwe,
 
 	vm = xe_vm_create(fd, 0, 0);
 
-	bo = xe_bo_create(fd, hwe->gt_id, vm, bo_size);
+	bo = xe_bo_create_flags(fd, vm, bo_size,
+				visible_vram_if_possible(fd, hwe->gt_id));
 	spin = xe_bo_map(fd, bo, 0x1000);
 
 	xe_vm_bind_sync(fd, vm, bo, 0, addr, bo_size);
-- 
2.40.1

[igt-dev] [PATCH i-g-t v2 4/6] tests/xe: handle small-bar systems

[Matthew Auld]

Convert all the existing tests that require CPU access.

v2:
  - Split out the lib changes
  - Prefer SZ_256M and SZ_1G in xe_evict
  - Simplify and fix the bo_flags handling in test_exec

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
---
 tests/xe/xe_dma_buf_sync.c      |  3 ++-
 tests/xe/xe_evict.c             | 35 +++++++++++++++++++++------------
 tests/xe/xe_exec_balancer.c     |  6 +++---
 tests/xe/xe_exec_basic.c        | 17 ++++++++--------
 tests/xe/xe_exec_compute_mode.c |  4 ++--
 tests/xe/xe_exec_fault_mode.c   | 12 +++++++----
 tests/xe/xe_exec_reset.c        | 13 +++++++-----
 tests/xe/xe_exec_threads.c      |  9 ++++++---
 tests/xe/xe_guc_pc.c            |  3 ++-
 tests/xe/xe_mmap.c              |  4 ++--
 tests/xe/xe_pm.c                |  3 ++-
 tests/xe/xe_prime_self_import.c |  8 ++++----
 tests/xe/xe_vm.c                | 23 +++++++++++++++-------
 13 files changed, 85 insertions(+), 55 deletions(-)

diff --git a/tests/xe/xe_dma_buf_sync.c b/tests/xe/xe_dma_buf_sync.c
index 1d7ffc60f..05f2bc643 100644
--- a/tests/xe/xe_dma_buf_sync.c
+++ b/tests/xe/xe_dma_buf_sync.c
@@ -123,7 +123,8 @@ test_export_dma_buf(struct drm_xe_engine_class_instance *hwe0,
 	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd[0]),
 			xe_get_default_alignment(fd[0]));
 	for (i = 0; i < n_bo; ++i) {
-		bo[i] = xe_bo_create(fd[0], hwe0->gt_id, 0, bo_size);
+		bo[i] = xe_bo_create_flags(fd[0], 0, bo_size,
+					   visible_vram_if_possible(fd[0], hwe0->gt_id));
 		dma_buf_fd[i] = prime_handle_to_fd(fd[0], bo[i]);
 		import_bo[i] = prime_fd_to_handle(fd[1], dma_buf_fd[i]);
 
diff --git a/tests/xe/xe_evict.c b/tests/xe/xe_evict.c
index 7fef4efc5..5f99a11cd 100644
--- a/tests/xe/xe_evict.c
+++ b/tests/xe/xe_evict.c
@@ -98,15 +98,17 @@ test_evict(int fd, struct drm_xe_engine_class_instance *eci,
                                 i < n_execs / 8 ? 0 : vm;
 
 			if (flags & MULTI_VM) {
-				__bo = bo[i] = xe_bo_create(fd, eci->gt_id, 0,
-							    bo_size);
+				__bo = bo[i] = xe_bo_create_flags(fd, 0,
+								  bo_size,
+								  visible_vram_memory(fd, eci->gt_id));
 			} else if (flags & THREADED) {
-				__bo = bo[i] = xe_bo_create(fd, eci->gt_id, vm,
-							    bo_size);
+				__bo = bo[i] = xe_bo_create_flags(fd, vm,
+								  bo_size,
+								  visible_vram_memory(fd, eci->gt_id));
 			} else {
 				__bo = bo[i] = xe_bo_create_flags(fd, _vm,
 								  bo_size,
-								  vram_memory(fd, eci->gt_id) |
+								  visible_vram_memory(fd, eci->gt_id) |
 								  system_memory(fd));
 			}
 		} else {
@@ -281,16 +283,17 @@ test_evict_cm(int fd, struct drm_xe_engine_class_instance *eci,
                                 i < n_execs / 8 ? 0 : vm;
 
 			if (flags & MULTI_VM) {
-				__bo = bo[i] = xe_bo_create(fd, eci->gt_id,
-							    0, bo_size);
+				__bo = bo[i] = xe_bo_create_flags(fd, 0,
+								  bo_size,
+								  visible_vram_memory(fd, eci->gt_id));
 			} else if (flags & THREADED) {
-				__bo = bo[i] = xe_bo_create(fd, eci->gt_id,
-							    vm, bo_size);
+				__bo = bo[i] = xe_bo_create_flags(fd, vm,
+								  bo_size,
+								  visible_vram_memory(fd, eci->gt_id));
 			} else {
 				__bo = bo[i] = xe_bo_create_flags(fd, _vm,
 								  bo_size,
-								  vram_memory(fd, eci->gt_id) |
-								  system_memory(fd));
+								  visible_vram_memory(fd, eci->gt_id));
 			}
 		} else {
 			__bo = bo[i % (n_execs / 2)];
@@ -453,9 +456,15 @@ threads(int fd, struct drm_xe_engine_class_instance *eci,
 		pthread_join(threads_data[i].thread, NULL);
 }
 
+#define SZ_256M	0x10000000
+#define SZ_1G	0x40000000
+
 static uint64_t calc_bo_size(uint64_t vram_size, int mul, int div)
 {
-	return (ALIGN(vram_size, 0x40000000)  * mul) / div;
+	if (vram_size >= SZ_1G)
+		return (ALIGN(vram_size, SZ_1G)  * mul) / div;
+	else
+		return (ALIGN(vram_size, SZ_256M)  * mul) / div; /* small-bar */
 }
 
 /**
@@ -670,7 +679,7 @@ igt_main
 		fd = drm_open_driver(DRIVER_XE);
 		xe_device_get(fd);
 		igt_require(xe_has_vram(fd));
-		vram_size = xe_vram_size(fd, 0);
+		vram_size = xe_visible_vram_size(fd, 0);
 		igt_assert(vram_size);
 
 		xe_for_each_hw_engine(fd, hwe)
diff --git a/tests/xe/xe_exec_balancer.c b/tests/xe/xe_exec_balancer.c
index 2018c8104..f0b25b782 100644
--- a/tests/xe/xe_exec_balancer.c
+++ b/tests/xe/xe_exec_balancer.c
@@ -70,7 +70,7 @@ static void test_all_active(int fd, int gt, int class)
 	bo_size = sizeof(*data) * num_placements;
 	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd), xe_get_default_alignment(fd));
 
-	bo = xe_bo_create(fd, gt, vm, bo_size);
+	bo = xe_bo_create_flags(fd, vm, bo_size, visible_vram_if_possible(fd, gt));
 	data = xe_bo_map(fd, bo, bo_size);
 
 	for (i = 0; i < num_placements; i++) {
@@ -229,7 +229,7 @@ test_exec(int fd, int gt, int class, int n_engines, int n_execs,
 		}
 		memset(data, 0, bo_size);
 	} else {
-		bo = xe_bo_create(fd, gt, vm, bo_size);
+		bo = xe_bo_create_flags(fd, vm, bo_size, visible_vram_if_possible(fd, gt));
 		data = xe_bo_map(fd, bo, bo_size);
 	}
 
@@ -454,7 +454,7 @@ test_cm(int fd, int gt, int class, int n_engines, int n_execs,
 			igt_assert(data);
 		}
 	} else {
-		bo = xe_bo_create(fd, gt, vm, bo_size);
+		bo = xe_bo_create_flags(fd, vm, bo_size, visible_vram_if_possible(fd, gt));
 		data = xe_bo_map(fd, bo, bo_size);
 	}
 	memset(data, 0, bo_size);
diff --git a/tests/xe/xe_exec_basic.c b/tests/xe/xe_exec_basic.c
index 059e6ae89..64c0a5b5e 100644
--- a/tests/xe/xe_exec_basic.c
+++ b/tests/xe/xe_exec_basic.c
@@ -130,15 +130,14 @@ test_exec(int fd, struct drm_xe_engine_class_instance *eci,
 		}
 		memset(data, 0, bo_size);
 	} else {
-		if (flags & DEFER_ALLOC) {
-			bo = xe_bo_create_flags(fd, n_vm == 1 ? vm[0] : 0,
-						bo_size,
-						vram_if_possible(fd, eci->gt_id) |
-						XE_GEM_CREATE_FLAG_DEFER_BACKING);
-		} else {
-			bo = xe_bo_create(fd, eci->gt_id, n_vm == 1 ? vm[0] : 0,
-					  bo_size);
-		}
+		uint32_t bo_flags;
+
+		bo_flags = visible_vram_if_possible(fd, eci->gt_id);
+		if (flags & DEFER_ALLOC)
+			bo_flags |= XE_GEM_CREATE_FLAG_DEFER_BACKING;
+
+		bo = xe_bo_create_flags(fd, n_vm == 1 ? vm[0] : 0,
+					bo_size, bo_flags);
 		if (!(flags & DEFER_BIND))
 			data = xe_bo_map(fd, bo, bo_size);
 	}
diff --git a/tests/xe/xe_exec_compute_mode.c b/tests/xe/xe_exec_compute_mode.c
index 685193990..4506046f6 100644
--- a/tests/xe/xe_exec_compute_mode.c
+++ b/tests/xe/xe_exec_compute_mode.c
@@ -152,8 +152,8 @@ test_exec(int fd, struct drm_xe_engine_class_instance *eci,
 			igt_assert(data);
 		}
 	} else {
-		bo = xe_bo_create(fd, eci->gt_id, flags & VM_FOR_BO ? vm : 0,
-				  bo_size);
+		bo = xe_bo_create_flags(fd, flags & VM_FOR_BO ? vm : 0,
+					bo_size, visible_vram_if_possible(fd, eci->gt_id));
 		data = xe_bo_map(fd, bo, bo_size);
 	}
 	memset(data, 0, bo_size);
diff --git a/tests/xe/xe_exec_fault_mode.c b/tests/xe/xe_exec_fault_mode.c
index a3ab17270..742e955f8 100644
--- a/tests/xe/xe_exec_fault_mode.c
+++ b/tests/xe/xe_exec_fault_mode.c
@@ -157,9 +157,11 @@ test_exec(int fd, struct drm_xe_engine_class_instance *eci,
 	} else {
 		if (flags & PREFETCH)
 			bo = xe_bo_create_flags(fd, 0, bo_size,
-						all_memory_regions(fd));
+						all_memory_regions(fd) |
+						visible_vram_if_possible(fd, 0));
 		else
-			bo = xe_bo_create(fd, eci->gt_id, 0, bo_size);
+			bo = xe_bo_create_flags(fd, 0, bo_size,
+						visible_vram_if_possible(fd, eci->gt_id));
 		data = xe_bo_map(fd, bo, bo_size);
 	}
 	memset(data, 0, bo_size);
@@ -390,8 +392,10 @@ test_atomic(int fd, struct drm_xe_engine_class_instance *eci,
 	addr_wait = addr + bo_size;
 
 	bo = xe_bo_create_flags(fd, vm, bo_size,
-				all_memory_regions(fd));
-	bo_wait = xe_bo_create(fd, eci->gt_id, vm, bo_size);
+				all_memory_regions(fd) |
+				visible_vram_if_possible(fd, 0));
+	bo_wait = xe_bo_create_flags(fd, vm, bo_size,
+				     visible_vram_if_possible(fd, eci->gt_id));
 	data = xe_bo_map(fd, bo, bo_size);
 	wait = xe_bo_map(fd, bo_wait, bo_size);
 	ptr = &data[0].data;
diff --git a/tests/xe/xe_exec_reset.c b/tests/xe/xe_exec_reset.c
index 0d72a3f20..c002b7882 100644
--- a/tests/xe/xe_exec_reset.c
+++ b/tests/xe/xe_exec_reset.c
@@ -51,7 +51,8 @@ static void test_spin(int fd, struct drm_xe_engine_class_instance *eci)
 	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
 			xe_get_default_alignment(fd));
 
-	bo = xe_bo_create(fd, eci->gt_id, vm, bo_size);
+	bo = xe_bo_create_flags(fd, vm, bo_size,
+				visible_vram_if_possible(fd, eci->gt_id));
 	spin = xe_bo_map(fd, bo, bo_size);
 
 	engine = xe_engine_create(fd, vm, eci, 0);
@@ -197,7 +198,7 @@ test_balancer(int fd, int gt, int class, int n_engines, int n_execs,
 	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
 			xe_get_default_alignment(fd));
 
-	bo = xe_bo_create(fd, gt, vm, bo_size);
+	bo = xe_bo_create_flags(fd, vm, bo_size, visible_vram_if_possible(fd, gt));
 	data = xe_bo_map(fd, bo, bo_size);
 
 	for (i = 0; i < n_engines; i++) {
@@ -398,7 +399,8 @@ test_legacy_mode(int fd, struct drm_xe_engine_class_instance *eci,
 	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
 			xe_get_default_alignment(fd));
 
-	bo = xe_bo_create(fd, eci->gt_id, vm, bo_size);
+	bo = xe_bo_create_flags(fd, vm, bo_size,
+				visible_vram_if_possible(fd, eci->gt_id));
 	data = xe_bo_map(fd, bo, bo_size);
 
 	for (i = 0; i < n_engines; i++) {
@@ -577,7 +579,8 @@ test_compute_mode(int fd, struct drm_xe_engine_class_instance *eci,
 	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
 			xe_get_default_alignment(fd));
 
-	bo = xe_bo_create(fd, eci->gt_id, vm, bo_size);
+	bo = xe_bo_create_flags(fd, vm, bo_size,
+				visible_vram_if_possible(fd, eci->gt_id));
 	data = xe_bo_map(fd, bo, bo_size);
 	memset(data, 0, bo_size);
 
@@ -710,7 +713,7 @@ static void submit_jobs(struct gt_thread_data *t)
 	uint32_t bo;
 	uint32_t *data;
 
-	bo = xe_bo_create(fd, 0, vm, bo_size);
+	bo = xe_bo_create_flags(fd, vm, bo_size, visible_vram_if_possible(fd, 0));
 	data = xe_bo_map(fd, bo, bo_size);
 	data[0] = MI_BATCH_BUFFER_END;
 
diff --git a/tests/xe/xe_exec_threads.c b/tests/xe/xe_exec_threads.c
index 2e7779777..033c5859c 100644
--- a/tests/xe/xe_exec_threads.c
+++ b/tests/xe/xe_exec_threads.c
@@ -107,7 +107,8 @@ test_balancer(int fd, int gt, uint32_t vm, uint64_t addr, uint64_t userptr,
 			igt_assert(data);
 		}
 	} else {
-		bo = xe_bo_create(fd, gt, vm, bo_size);
+		bo = xe_bo_create_flags(fd, vm, bo_size,
+					visible_vram_if_possible(fd, gt));
 		data = xe_bo_map(fd, bo, bo_size);
 	}
 	memset(data, 0, bo_size);
@@ -310,7 +311,8 @@ test_compute_mode(int fd, uint32_t vm, uint64_t addr, uint64_t userptr,
 			igt_assert(data);
 		}
 	} else {
-		bo = xe_bo_create(fd, eci->gt_id, 0, bo_size);
+		bo = xe_bo_create_flags(fd, 0, bo_size,
+					visible_vram_if_possible(fd, eci->gt_id));
 		data = xe_bo_map(fd, bo, bo_size);
 	}
 	memset(data, 0, bo_size);
@@ -522,7 +524,8 @@ test_legacy_mode(int fd, uint32_t vm, uint64_t addr, uint64_t userptr,
 			igt_assert(data);
 		}
 	} else {
-		bo = xe_bo_create(fd, eci->gt_id, vm, bo_size);
+		bo = xe_bo_create_flags(fd, vm, bo_size,
+					visible_vram_if_possible(fd, eci->gt_id));
 		data = xe_bo_map(fd, bo, bo_size);
 	}
 	memset(data, 0, bo_size);
diff --git a/tests/xe/xe_guc_pc.c b/tests/xe/xe_guc_pc.c
index 5c71ae147..e2d917d64 100644
--- a/tests/xe/xe_guc_pc.c
+++ b/tests/xe/xe_guc_pc.c
@@ -64,7 +64,8 @@ static void exec_basic(int fd, struct drm_xe_engine_class_instance *eci,
 	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
 			xe_get_default_alignment(fd));
 
-	bo = xe_bo_create(fd, eci->gt_id, vm, bo_size);
+	bo = xe_bo_create_flags(fd, vm, bo_size,
+				visible_vram_if_possible(fd, eci->gt_id));
 	data = xe_bo_map(fd, bo, bo_size);
 
 	for (i = 0; i < n_engines; i++) {
diff --git a/tests/xe/xe_mmap.c b/tests/xe/xe_mmap.c
index 420c7f86c..7bfe72e51 100644
--- a/tests/xe/xe_mmap.c
+++ b/tests/xe/xe_mmap.c
@@ -124,10 +124,10 @@ igt_main
 		test_mmap(fd, system_memory(fd));
 
 	igt_subtest("vram")
-		test_mmap(fd, vram_memory(fd, 0));
+		test_mmap(fd, visible_vram_memory(fd, 0));
 
 	igt_subtest("vram-system")
-		test_mmap(fd, vram_memory(fd, 0) | system_memory(fd));
+		test_mmap(fd, visible_vram_memory(fd, 0) | system_memory(fd));
 
 	igt_subtest("bad-flags")
 		test_bad_flags(fd);
diff --git a/tests/xe/xe_pm.c b/tests/xe/xe_pm.c
index 355626e32..e4df09240 100644
--- a/tests/xe/xe_pm.c
+++ b/tests/xe/xe_pm.c
@@ -255,7 +255,8 @@ test_exec(device_t device, struct drm_xe_engine_class_instance *eci,
 	if (check_rpm && runtime_usage_available(device.pci_xe))
 		rpm_usage = igt_pm_get_runtime_usage(device.pci_xe);
 
-	bo = xe_bo_create(device.fd_xe, eci->gt_id, vm, bo_size);
+	bo = xe_bo_create_flags(device.fd_xe, vm, bo_size,
+				visible_vram_if_possible(device.fd_xe, eci->gt_id));
 	data = xe_bo_map(device.fd_xe, bo, bo_size);
 
 	for (i = 0; i < n_engines; i++) {
diff --git a/tests/xe/xe_prime_self_import.c b/tests/xe/xe_prime_self_import.c
index c2b292c15..2d5ae08ea 100644
--- a/tests/xe/xe_prime_self_import.c
+++ b/tests/xe/xe_prime_self_import.c
@@ -109,7 +109,7 @@ static void test_with_fd_dup(void)
 	fd2 = drm_open_driver(DRIVER_XE);
 	xe_device_get(fd2);
 
-	handle = xe_bo_create(fd1, 0, 0, BO_SIZE);
+	handle = xe_bo_create_flags(fd1, 0, BO_SIZE, visible_vram_if_possible(fd1, 0));
 
 	dma_buf_fd1 = prime_handle_to_fd(fd1, handle);
 	gem_close(fd1, handle);
@@ -148,8 +148,8 @@ static void test_with_two_bos(void)
 	fd2 = drm_open_driver(DRIVER_XE);
 	xe_device_get(fd2);
 
-	handle1 = xe_bo_create(fd1, 0, 0, BO_SIZE);
-	handle2 = xe_bo_create(fd1, 0, 0, BO_SIZE);
+	handle1 = xe_bo_create_flags(fd1, 0, BO_SIZE, visible_vram_if_possible(fd1, 0));
+	handle2 = xe_bo_create_flags(fd1, 0, BO_SIZE, visible_vram_if_possible(fd1, 0));
 
 	dma_buf_fd = prime_handle_to_fd(fd1, handle1);
 	handle_import = prime_fd_to_handle(fd2, dma_buf_fd);
@@ -227,7 +227,7 @@ static void test_with_one_bo(void)
 	fd2 = drm_open_driver(DRIVER_XE);
 	xe_device_get(fd2);
 
-	handle = xe_bo_create(fd1, 0, 0, BO_SIZE);
+	handle = xe_bo_create_flags(fd1, 0, BO_SIZE, visible_vram_if_possible(fd1, 0));
 
 	dma_buf_fd = prime_handle_to_fd(fd1, handle);
 	handle_import1 = prime_fd_to_handle(fd2, dma_buf_fd);
diff --git a/tests/xe/xe_vm.c b/tests/xe/xe_vm.c
index 861822b48..2af07c379 100644
--- a/tests/xe/xe_vm.c
+++ b/tests/xe/xe_vm.c
@@ -52,7 +52,8 @@ write_dwords(int fd, uint32_t vm, int n_dwords, uint64_t *addrs)
 	batch_size = (n_dwords * 4 + 1) * sizeof(uint32_t);
 	batch_size = ALIGN(batch_size + xe_cs_prefetch_size(fd),
 			   xe_get_default_alignment(fd));
-	batch_bo = xe_bo_create(fd, 0, vm, batch_size);
+	batch_bo = xe_bo_create_flags(fd, vm, batch_size,
+				      visible_vram_if_possible(fd, 0));
 	batch_map = xe_bo_map(fd, batch_bo, batch_size);
 
 	for (i = 0; i < n_dwords; i++) {
@@ -117,7 +118,7 @@ __test_bind_one_bo(int fd, uint32_t vm, int n_addrs, uint64_t *addrs)
 		vms = malloc(sizeof(*vms) * n_addrs);
 		igt_assert(vms);
 	}
-	bo = xe_bo_create(fd, 0, vm, bo_size);
+	bo = xe_bo_create_flags(fd, vm, bo_size, visible_vram_if_possible(fd, 0));
 	map = xe_bo_map(fd, bo, bo_size);
 	memset(map, 0, bo_size);
 
@@ -562,7 +563,8 @@ shared_pte_page(int fd, struct drm_xe_engine_class_instance *eci, int n_bo,
 			xe_get_default_alignment(fd));
 
 	for (i = 0; i < n_bo; ++i) {
-		bo[i] = xe_bo_create(fd, eci->gt_id, vm, bo_size);
+		bo[i] = xe_bo_create_flags(fd, vm, bo_size,
+					   visible_vram_if_possible(fd, eci->gt_id));
 		data[i] = xe_bo_map(fd, bo[i], bo_size);
 	}
 
@@ -731,7 +733,8 @@ test_bind_engines_independent(int fd, struct drm_xe_engine_class_instance *eci)
 	bo_size = sizeof(*data) * N_ENGINES;
 	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
 			xe_get_default_alignment(fd));
-	bo = xe_bo_create(fd, eci->gt_id, vm, bo_size);
+	bo = xe_bo_create_flags(fd, vm, bo_size,
+				visible_vram_if_possible(fd, eci->gt_id));
 	data = xe_bo_map(fd, bo, bo_size);
 
 	for (i = 0; i < N_ENGINES; i++) {
@@ -892,7 +895,8 @@ test_bind_array(int fd, struct drm_xe_engine_class_instance *eci, int n_execs,
 	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
 			xe_get_default_alignment(fd));
 
-	bo = xe_bo_create(fd, eci->gt_id, vm, bo_size);
+	bo = xe_bo_create_flags(fd, vm, bo_size,
+				visible_vram_if_possible(fd, eci->gt_id));
 	data = xe_bo_map(fd, bo, bo_size);
 
 	if (flags & BIND_ARRAY_BIND_ENGINE_FLAG)
@@ -1088,7 +1092,11 @@ test_large_binds(int fd, struct drm_xe_engine_class_instance *eci,
 		map = aligned_alloc(xe_get_default_alignment(fd), bo_size);
 		igt_assert(map);
 	} else {
-		bo = xe_bo_create(fd, eci->gt_id, vm, bo_size);
+		igt_skip_on(xe_visible_vram_size(fd, 0) && bo_size >
+			    xe_visible_vram_size(fd, 0));
+
+		bo = xe_bo_create_flags(fd, vm, bo_size,
+					visible_vram_if_possible(fd, eci->gt_id));
 		map = xe_bo_map(fd, bo, bo_size);
 	}
 
@@ -1367,7 +1375,8 @@ test_munmap_style_unbind(int fd, struct drm_xe_engine_class_instance *eci,
 			    MAP_ANONYMOUS, -1, 0);
 		igt_assert(map != MAP_FAILED);
 	} else {
-		bo = xe_bo_create(fd, eci->gt_id, vm, bo_size);
+		bo = xe_bo_create_flags(fd, vm, bo_size,
+					visible_vram_if_possible(fd, eci->gt_id));
 		map = xe_bo_map(fd, bo, bo_size);
 	}
 	memset(map, 0, bo_size);
-- 
2.40.1

[igt-dev] [PATCH i-g-t v2 5/6] tests/xe/query: extend for CPU visible accounting

[Matthew Auld]

Print the visible size and how much is used. Also sanity check the
values.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
---
 tests/xe/xe_query.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/tests/xe/xe_query.c b/tests/xe/xe_query.c
index 40bd19ae7..6c74a96a0 100644
--- a/tests/xe/xe_query.c
+++ b/tests/xe/xe_query.c
@@ -230,6 +230,23 @@ test_query_mem_usage(int fd)
 		igt_info("min_page_size=0x%x, max_page_size=0x%x\n",
 		       mem_usage->regions[i].min_page_size,
 		       mem_usage->regions[i].max_page_size);
+
+		igt_info("visible size=%lluMiB\n",
+			 mem_usage->regions[i].cpu_visible_size >> 20);
+		igt_info("visible used=%lluMiB\n",
+			 mem_usage->regions[i].cpu_visible_used >> 20);
+
+		igt_assert_lte_u64(mem_usage->regions[i].cpu_visible_size,
+				   mem_usage->regions[i].total_size);
+		igt_assert_lte_u64(mem_usage->regions[i].cpu_visible_used,
+				   mem_usage->regions[i].cpu_visible_size);
+		igt_assert_lte_u64(mem_usage->regions[i].cpu_visible_used,
+				   mem_usage->regions[i].used);
+		igt_assert_lte_u64(mem_usage->regions[i].used,
+				   mem_usage->regions[i].total_size);
+		igt_assert_lte_u64(mem_usage->regions[i].used -
+				   mem_usage->regions[i].cpu_visible_used,
+				   mem_usage->regions[i].total_size);
 	}
 	dump_hex_debug(mem_usage, query.size);
 	free(mem_usage);
-- 
2.40.1

[igt-dev] [PATCH i-g-t v2 6/6] tests/xe/mmap: sanity check small-bar

[Matthew Auld]

Some basic sanity checks.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
---
 lib/xe/xe_ioctl.c  | 28 ++++++++++----
 lib/xe/xe_ioctl.h  |  2 +
 tests/xe/xe_mmap.c | 95 +++++++++++++++++++++++++++++++++++++++++++++-
 3 files changed, 117 insertions(+), 8 deletions(-)

diff --git a/lib/xe/xe_ioctl.c b/lib/xe/xe_ioctl.c
index 66a8393fe..6c14f03d1 100644
--- a/lib/xe/xe_ioctl.c
+++ b/lib/xe/xe_ioctl.c
@@ -232,17 +232,31 @@ void xe_vm_destroy(int fd, uint32_t vm)
 	igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_VM_DESTROY, &destroy), 0);
 }
 
+uint32_t __xe_bo_create_flags(int fd, uint32_t vm, uint64_t size, uint32_t flags,
+			      uint32_t *handle)
+{
+	struct drm_xe_gem_create create = {
+		.vm_id = vm,
+		.size = size,
+		.flags = flags,
+	};
+	int err;
+
+	err = igt_ioctl(fd, DRM_IOCTL_XE_GEM_CREATE, &create);
+	if (err)
+		return err;
+
+	*handle = create.handle;
+	return 0;
+}
+
 uint32_t xe_bo_create_flags(int fd, uint32_t vm, uint64_t size, uint32_t flags)
 {
-	struct drm_xe_gem_create create = {
-		.vm_id = vm,
-		.size = size,
-		.flags = flags,
-	};
+	uint32_t handle;
 
-	igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_GEM_CREATE, &create), 0);
+	igt_assert_eq(__xe_bo_create_flags(fd, vm, size, flags, &handle), 0);
 
-	return create.handle;
+	return handle;
 }
 
 uint32_t xe_bo_create(int fd, int gt, uint32_t vm, uint64_t size)
diff --git a/lib/xe/xe_ioctl.h b/lib/xe/xe_ioctl.h
index 049cd183d..85389eff5 100644
--- a/lib/xe/xe_ioctl.h
+++ b/lib/xe/xe_ioctl.h
@@ -64,6 +64,8 @@ void xe_vm_unbind_all_async(int fd, uint32_t vm, uint32_t engine,
 			    uint32_t bo, struct drm_xe_sync *sync,
 			    uint32_t num_syncs);
 void xe_vm_destroy(int fd, uint32_t vm);
+uint32_t __xe_bo_create_flags(int fd, uint32_t vm, uint64_t size, uint32_t flags,
+			      uint32_t *handle);
 uint32_t xe_bo_create_flags(int fd, uint32_t vm, uint64_t size, uint32_t flags);
 uint32_t xe_bo_create(int fd, int gt, uint32_t vm, uint64_t size);
 uint32_t xe_engine_create(int fd, uint32_t vm,
diff --git a/tests/xe/xe_mmap.c b/tests/xe/xe_mmap.c
index 7bfe72e51..b75d8dc5a 100644
--- a/tests/xe/xe_mmap.c
+++ b/tests/xe/xe_mmap.c
@@ -18,14 +18,21 @@
 #include "xe/xe_ioctl.h"
 #include "xe/xe_query.h"
 
+#include <setjmp.h>
+#include <signal.h>
 #include <string.h>
 
-
 /**
  * SUBTEST: system
  * Description: Test mmap on system memory
  */
 
+/**
+ * SUBTEST: small-bar
+ * Description: Sanity check mmap behaviour on small-bar systems
+ * GPU requirements: GPU needs to have dedicated VRAM and using small-bar
+ */
+
 /**
  * SUBTEST: %s
  * Description: Test mmap on %arg[1] memory
@@ -111,6 +118,86 @@ static void test_bad_object(int fd)
 	do_ioctl_err(fd, DRM_IOCTL_XE_GEM_MMAP_OFFSET, &mmo, ENOENT);
 }
 
+static jmp_buf jmp;
+
+__noreturn static void sigtrap(int sig)
+{
+	siglongjmp(jmp, sig);
+}
+
+static void trap_sigbus(uint32_t *ptr)
+{
+	sighandler_t old_sigbus;
+
+	old_sigbus = signal(SIGBUS, sigtrap);
+	switch (sigsetjmp(jmp, SIGBUS)) {
+	case SIGBUS:
+		break;
+	case 0:
+		*ptr = 0xdeadbeaf;
+	default:
+		igt_assert(!"reached");
+		break;
+	}
+	signal(SIGBUS, old_sigbus);
+}
+
+/**
+ * SUBTEST: small-bar
+ * Description: Test mmap behaviour on small-bar systems.
+ *
+ */
+static void test_small_bar(int fd)
+{
+	uint32_t visible_size = xe_visible_vram_size(fd, 0);
+	uint32_t bo;
+	uint64_t mmo;
+	uint32_t *map;
+
+	/* Some 2BIG invalid cases */
+	igt_assert_neq(__xe_bo_create_flags(fd, 0, visible_size,
+					    visible_vram_memory(fd, 0), &bo),
+		       0);
+	igt_assert_neq(__xe_bo_create_flags(fd, 0, visible_size + 4096,
+					    visible_vram_memory(fd, 0), &bo),
+		       0);
+
+	/* Normal operation */
+	bo = xe_bo_create_flags(fd, 0, visible_size / 4,
+				visible_vram_memory(fd, 0));
+	mmo = xe_bo_mmap_offset(fd, bo);
+	map = mmap(NULL, 4096, PROT_WRITE, MAP_SHARED, fd, mmo);
+	igt_assert(map != MAP_FAILED);
+
+	map[0] = 0xdeadbeaf;
+
+	munmap(map, 4096);
+	gem_close(fd, bo);
+
+	/* Normal operation with system memory spilling */
+	bo = xe_bo_create_flags(fd, 0, visible_size,
+				visible_vram_memory(fd, 0) |
+				system_memory(fd));
+	mmo = xe_bo_mmap_offset(fd, bo);
+	map = mmap(NULL, 4096, PROT_WRITE, MAP_SHARED, fd, mmo);
+	igt_assert(map != MAP_FAILED);
+
+	map[0] = 0xdeadbeaf;
+
+	munmap(map, 4096);
+	gem_close(fd, bo);
+
+	/* Bogus operation with SIGBUS */
+	bo = xe_bo_create_flags(fd, 0, visible_size + 4096,
+				vram_memory(fd, 0));
+	mmo = xe_bo_mmap_offset(fd, bo);
+	map = mmap(NULL, 4096, PROT_WRITE, MAP_SHARED, fd, mmo);
+	igt_assert(map != MAP_FAILED);
+
+	trap_sigbus(map);
+	gem_close(fd, bo);
+}
+
 igt_main
 {
 	int fd;
@@ -138,6 +225,12 @@ igt_main
 	igt_subtest("bad-object")
 		test_bad_object(fd);
 
+	igt_subtest("small-bar") {
+		igt_require(xe_visible_vram_size(fd, 0));
+		igt_require(xe_visible_vram_size(fd, 0) < xe_vram_size(fd, 0));
+		test_small_bar(fd);
+	}
+
 	igt_fixture {
 		xe_device_put(fd);
 		close(fd);
-- 
2.40.1

[igt-dev] ✗ Fi.CI.BAT: failure for IGT bits for small-bar (rev3)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 6149 bytes --]

== Series Details ==

Series: IGT bits for small-bar (rev3)
URL   : https://patchwork.freedesktop.org/series/115786/
State : failure

== Summary ==

CI Bug Log - changes from IGT_7323 -> IGTPW_9144
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_9144 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_9144, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9144/index.html

Participating hosts (37 -> 36)
------------------------------

  Missing    (1): fi-kbl-soraka 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_9144:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_selftest@live@gt_timelines:
    - fi-apl-guc:         [PASS][1] -> [DMESG-FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7323/fi-apl-guc/igt@i915_selftest@live@gt_timelines.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9144/fi-apl-guc/igt@i915_selftest@live@gt_timelines.html

  
Known issues
------------

  Here are the changes found in IGTPW_9144 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live@gt_pm:
    - bat-rpls-2:         [PASS][3] -> [DMESG-FAIL][4] ([i915#4258] / [i915#7913])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7323/bat-rpls-2/igt@i915_selftest@live@gt_pm.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9144/bat-rpls-2/igt@i915_selftest@live@gt_pm.html

  * igt@i915_selftest@live@requests:
    - bat-rpls-1:         [PASS][5] -> [ABORT][6] ([i915#7911] / [i915#7920])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7323/bat-rpls-1/igt@i915_selftest@live@requests.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9144/bat-rpls-1/igt@i915_selftest@live@requests.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
    - bat-adlp-9:         NOTRUN -> [SKIP][7] ([i915#3546]) +2 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9144/bat-adlp-9/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-1:
    - bat-dg2-8:          [PASS][8] -> [FAIL][9] ([i915#7932])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7323/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-1.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9144/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-1.html

  
#### Possible fixes ####

  * igt@i915_selftest@live@gt_heartbeat:
    - fi-apl-guc:         [DMESG-FAIL][10] ([i915#5334]) -> [PASS][11]
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7323/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9144/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@gt_mocs:
    - {bat-mtlp-6}:       [DMESG-FAIL][12] ([i915#7059]) -> [PASS][13]
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7323/bat-mtlp-6/igt@i915_selftest@live@gt_mocs.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9144/bat-mtlp-6/igt@i915_selftest@live@gt_mocs.html

  * igt@i915_selftest@live@slpc:
    - {bat-mtlp-6}:       [DMESG-WARN][14] ([i915#6367]) -> [PASS][15]
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7323/bat-mtlp-6/igt@i915_selftest@live@slpc.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9144/bat-mtlp-6/igt@i915_selftest@live@slpc.html

  * igt@kms_pipe_crc_basic@nonblocking-crc@pipe-d-dp-1:
    - bat-dg2-8:          [FAIL][16] ([i915#7932]) -> [PASS][17]
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7323/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc@pipe-d-dp-1.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9144/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc@pipe-d-dp-1.html

  
#### Warnings ####

  * igt@i915_selftest@live@reset:
    - bat-rpls-2:         [ABORT][18] ([i915#4983] / [i915#7461] / [i915#7913] / [i915#7981] / [i915#8347]) -> [ABORT][19] ([i915#4983] / [i915#7461] / [i915#7913] / [i915#8347])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7323/bat-rpls-2/igt@i915_selftest@live@reset.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9144/bat-rpls-2/igt@i915_selftest@live@reset.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
  [i915#4258]: https://gitlab.freedesktop.org/drm/intel/issues/4258
  [i915#4423]: https://gitlab.freedesktop.org/drm/intel/issues/4423
  [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
  [i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
  [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
  [i915#7059]: https://gitlab.freedesktop.org/drm/intel/issues/7059
  [i915#7461]: https://gitlab.freedesktop.org/drm/intel/issues/7461
  [i915#7911]: https://gitlab.freedesktop.org/drm/intel/issues/7911
  [i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
  [i915#7920]: https://gitlab.freedesktop.org/drm/intel/issues/7920
  [i915#7932]: https://gitlab.freedesktop.org/drm/intel/issues/7932
  [i915#7981]: https://gitlab.freedesktop.org/drm/intel/issues/7981
  [i915#8347]: https://gitlab.freedesktop.org/drm/intel/issues/8347


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_7323 -> IGTPW_9144

  CI-20190529: 20190529
  CI_DRM_13256: be85dc2d44c075230eec4366e27bc1fe75ee59ff @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_9144: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9144/index.html
  IGT_7323: 7323


Testlist changes
----------------

+igt@xe_mmap@small-bar

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9144/index.html

[-- Attachment #2: Type: text/html, Size: 7315 bytes --]

[igt-dev] ✗ Fi.CI.BAT: failure for IGT bits for small-bar (rev4)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 10653 bytes --]

== Series Details ==

Series: IGT bits for small-bar (rev4)
URL   : https://patchwork.freedesktop.org/series/115786/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_13289 -> IGTPW_9204
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_9204 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_9204, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9204/index.html

Participating hosts (41 -> 42)
------------------------------

  Additional (3): fi-tgl-1115g4 bat-dg1-8 fi-pnv-d510 
  Missing    (2): fi-kbl-soraka fi-snb-2520m 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_9204:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_pm_rpm@basic-rte:
    - bat-mtlp-8:         [PASS][1] -> [ABORT][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13289/bat-mtlp-8/igt@i915_pm_rpm@basic-rte.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9204/bat-mtlp-8/igt@i915_pm_rpm@basic-rte.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@xe_compute@compute-square:
    - {bat-dg1-8}:        NOTRUN -> [SKIP][3] +2 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9204/bat-dg1-8/igt@xe_compute@compute-square.html

  * igt@xe_evict@evict-small-cm:
    - {bat-dg1-8}:        NOTRUN -> [DMESG-FAIL][4] +3 similar issues
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9204/bat-dg1-8/igt@xe_evict@evict-small-cm.html

  
Known issues
------------

  Here are the changes found in IGTPW_9204 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@debugfs_test@basic-hwmon:
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][5] ([i915#7456])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9204/fi-tgl-1115g4/igt@debugfs_test@basic-hwmon.html

  * igt@gem_huc_copy@huc-copy:
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][6] ([i915#2190])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9204/fi-tgl-1115g4/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_swapping@parallel-random-engines:
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][7] ([i915#4613]) +3 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9204/fi-tgl-1115g4/igt@gem_lmem_swapping@parallel-random-engines.html

  * igt@i915_pm_backlight@basic-brightness:
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][8] ([i915#3546] / [i915#7561])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9204/fi-tgl-1115g4/igt@i915_pm_backlight@basic-brightness.html

  * igt@i915_selftest@live@requests:
    - bat-rpls-2:         [PASS][9] -> [ABORT][10] ([i915#4983] / [i915#7913])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13289/bat-rpls-2/igt@i915_selftest@live@requests.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9204/bat-rpls-2/igt@i915_selftest@live@requests.html

  * igt@i915_selftest@live@slpc:
    - bat-rpls-1:         [PASS][11] -> [DMESG-WARN][12] ([i915#6367])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13289/bat-rpls-1/igt@i915_selftest@live@slpc.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9204/bat-rpls-1/igt@i915_selftest@live@slpc.html

  * igt@i915_selftest@live@workarounds:
    - bat-mtlp-6:         [PASS][13] -> [DMESG-FAIL][14] ([i915#6763])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13289/bat-mtlp-6/igt@i915_selftest@live@workarounds.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9204/bat-mtlp-6/igt@i915_selftest@live@workarounds.html

  * igt@i915_suspend@basic-s3-without-i915:
    - fi-tgl-1115g4:      NOTRUN -> [INCOMPLETE][15] ([i915#7443] / [i915#8102])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9204/fi-tgl-1115g4/igt@i915_suspend@basic-s3-without-i915.html
    - bat-atsm-1:         NOTRUN -> [SKIP][16] ([i915#6645])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9204/bat-atsm-1/igt@i915_suspend@basic-s3-without-i915.html

  * igt@kms_chamelium_frames@dp-crc-fast:
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][17] ([i915#7828]) +7 similar issues
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9204/fi-tgl-1115g4/igt@kms_chamelium_frames@dp-crc-fast.html

  * igt@kms_chamelium_hpd@common-hpd-after-suspend:
    - bat-atsm-1:         NOTRUN -> [SKIP][18] ([i915#6078])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9204/bat-atsm-1/igt@kms_chamelium_hpd@common-hpd-after-suspend.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][19] ([i915#4103]) +1 similar issue
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9204/fi-tgl-1115g4/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_force_connector_basic@force-load-detect:
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][20] ([fdo#109285])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9204/fi-tgl-1115g4/igt@kms_force_connector_basic@force-load-detect.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1:
    - bat-dg2-8:          [PASS][21] -> [FAIL][22] ([i915#7932])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13289/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9204/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1.html

  * igt@kms_pipe_crc_basic@suspend-read-crc:
    - bat-atsm-1:         NOTRUN -> [SKIP][23] ([i915#1836])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9204/bat-atsm-1/igt@kms_pipe_crc_basic@suspend-read-crc.html

  * igt@kms_psr@primary_page_flip:
    - fi-pnv-d510:        NOTRUN -> [SKIP][24] ([fdo#109271]) +37 similar issues
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9204/fi-pnv-d510/igt@kms_psr@primary_page_flip.html
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][25] ([fdo#110189]) +3 similar issues
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9204/fi-tgl-1115g4/igt@kms_psr@primary_page_flip.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][26] ([i915#3555] / [i915#4579])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9204/fi-tgl-1115g4/igt@kms_setmode@basic-clone-single-crtc.html
    - fi-pnv-d510:        NOTRUN -> [SKIP][27] ([fdo#109271] / [i915#4579])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9204/fi-pnv-d510/igt@kms_setmode@basic-clone-single-crtc.html

  
#### Warnings ####

  * igt@core_auth@basic-auth:
    - bat-adlp-11:        [ABORT][28] ([i915#4423] / [i915#8011]) -> [ABORT][29] ([i915#8011])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13289/bat-adlp-11/igt@core_auth@basic-auth.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9204/bat-adlp-11/igt@core_auth@basic-auth.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - bat-rplp-1:         [SKIP][30] ([i915#3555] / [i915#4579]) -> [ABORT][31] ([i915#4579] / [i915#8260])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13289/bat-rplp-1/igt@kms_setmode@basic-clone-single-crtc.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9204/bat-rplp-1/igt@kms_setmode@basic-clone-single-crtc.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1836]: https://gitlab.freedesktop.org/drm/intel/issues/1836
  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
  [i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391
  [i915#4423]: https://gitlab.freedesktop.org/drm/intel/issues/4423
  [i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
  [i915#6078]: https://gitlab.freedesktop.org/drm/intel/issues/6078
  [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
  [i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645
  [i915#6763]: https://gitlab.freedesktop.org/drm/intel/issues/6763
  [i915#7443]: https://gitlab.freedesktop.org/drm/intel/issues/7443
  [i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456
  [i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561
  [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
  [i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
  [i915#7932]: https://gitlab.freedesktop.org/drm/intel/issues/7932
  [i915#8011]: https://gitlab.freedesktop.org/drm/intel/issues/8011
  [i915#8102]: https://gitlab.freedesktop.org/drm/intel/issues/8102
  [i915#8213]: https://gitlab.freedesktop.org/drm/intel/issues/8213
  [i915#8260]: https://gitlab.freedesktop.org/drm/intel/issues/8260
  [i915#8513]: https://gitlab.freedesktop.org/drm/intel/issues/8513
  [i915#8676]: https://gitlab.freedesktop.org/drm/intel/issues/8676
  [i915#8678]: https://gitlab.freedesktop.org/drm/intel/issues/8678
  [i915#8679]: https://gitlab.freedesktop.org/drm/intel/issues/8679


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_7338 -> IGTPW_9204

  CI-20190529: 20190529
  CI_DRM_13289: 32e260cd0d16cee6f33e747679f168d63ea54bf6 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_9204: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9204/index.html
  IGT_7338: 4f2f4b61eafc613ec58fd07bb11be7072b41c6bf @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git


Testlist changes
----------------

+igt@xe_mmap@small-bar

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9204/index.html

[-- Attachment #2: Type: text/html, Size: 11582 bytes --]

Re: [igt-dev] [PATCH i-g-t v2 0/6] IGT bits for small-bar

[Matthew Auld]

On Fri, 9 Jun 2023 at 16:44, Matthew Auld <matthew.auld@intel.com> wrote:
>
> small-bar IGT changes for Xe.
>
> v2: Rebase on latest IGT, plus various improvements

Kamil, Matt any chance you can take a look at the remaining patches
here? The kernel and umd side is ready to go so just need to close on
these IGTs.

>
> Kernel: https://patchwork.freedesktop.org/series/115515/
>
> --
> 2.40.1
>

Re: [igt-dev] [PATCH i-g-t v2 3/6] lib/xe: handle small-bar systems

[Souza, Jose]

On Fri, 2023-06-09 at 16:43 +0100, Matthew Auld wrote:
> The spinner stuff wants to use mmap. The fb related stuff might want to
> CPU access the buffer, so just always ask for it. And the batch buffer
> stuff is pretty much always going to need to CPU access the buffer.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> 
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
> Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> ---
>  lib/igt_draw.c          | 2 +-
>  lib/igt_fb.c            | 2 +-
>  lib/intel_batchbuffer.c | 4 ++--
>  lib/xe/xe_spin.c        | 3 ++-
>  4 files changed, 6 insertions(+), 5 deletions(-)
> 
> diff --git a/lib/igt_draw.c b/lib/igt_draw.c
> index a5c0cbbf6..519018eb3 100644
> --- a/lib/igt_draw.c
> +++ b/lib/igt_draw.c
> @@ -794,7 +794,7 @@ static void draw_rect_render(int fd, struct cmd_data *cmd_data,
>  	else
>  		tmp.handle = xe_bo_create_flags(fd, 0,
>  						ALIGN(tmp.size, xe_get_default_alignment(fd)),
> -						vram_if_possible(fd, 0));
> +						visible_vram_if_possible(fd, 0));
>  
>  	tmp.stride = rect->w * pixel_size;
>  	tmp.bpp = buf->bpp;
> diff --git a/lib/igt_fb.c b/lib/igt_fb.c
> index 9be312a28..e5e52946e 100644
> --- a/lib/igt_fb.c
> +++ b/lib/igt_fb.c
> @@ -1192,7 +1192,7 @@ static int create_bo_for_fb(struct igt_fb *fb, bool prefer_sysmem)
>  			igt_assert(err == 0 || err == -EOPNOTSUPP);
>  		} else if (is_xe_device(fd)) {
>  			fb->gem_handle = xe_bo_create_flags(fd, 0, fb->size,
> -							vram_if_possible(fd, 0));
> +							visible_vram_if_possible(fd, 0));
>  		} else if (is_vc4_device(fd)) {
>  			fb->gem_handle = igt_vc4_create_bo(fd, fb->size);
>  
> diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
> index 3cd680072..047843006 100644
> --- a/lib/intel_batchbuffer.c
> +++ b/lib/intel_batchbuffer.c
> @@ -943,7 +943,7 @@ __intel_bb_create(int fd, uint32_t ctx, uint32_t vm, const intel_ctx_cfg_t *cfg,
>  
>  		ibb->alignment = xe_get_default_alignment(fd);
>  		size = ALIGN(size, ibb->alignment);
> -		ibb->handle = xe_bo_create_flags(fd, 0, size, vram_if_possible(fd, 0));
> +		ibb->handle = xe_bo_create_flags(fd, 0, size, visible_vram_if_possible(fd, 0));
>  
>  		/* Limit to 48-bit due to MI_* address limitation */
>  		ibb->gtt_size = 1ull << min_t(uint32_t, xe_va_bits(fd), 48);
> @@ -1399,7 +1399,7 @@ void intel_bb_reset(struct intel_bb *ibb, bool purge_objects_cache)
>  		ibb->handle = gem_create(ibb->fd, ibb->size);
>  	else
>  		ibb->handle = xe_bo_create_flags(ibb->fd, 0, ibb->size,
> -						 vram_if_possible(ibb->fd, 0));
> +						 visible_vram_if_possible(ibb->fd, 0));
>  
>  	/* Reacquire offset for RELOC and SIMPLE */
>  	if (ibb->allocator_type == INTEL_ALLOCATOR_SIMPLE ||
> diff --git a/lib/xe/xe_spin.c b/lib/xe/xe_spin.c
> index 856d0ba22..3266905c9 100644
> --- a/lib/xe/xe_spin.c
> +++ b/lib/xe/xe_spin.c
> @@ -100,7 +100,8 @@ void xe_cork_init(int fd, struct drm_xe_engine_class_instance *hwe,
>  
>  	vm = xe_vm_create(fd, 0, 0);
>  
> -	bo = xe_bo_create(fd, hwe->gt_id, vm, bo_size);
> +	bo = xe_bo_create_flags(fd, vm, bo_size,
> +				visible_vram_if_possible(fd, hwe->gt_id));
>  	spin = xe_bo_map(fd, bo, 0x1000);
>  
>  	xe_vm_bind_sync(fd, vm, bo, 0, addr, bo_size);

Re: [igt-dev] [PATCH i-g-t v2 6/6] tests/xe/mmap: sanity check small-bar

[Souza, Jose]

On Fri, 2023-06-09 at 16:43 +0100, Matthew Auld wrote:
> Some basic sanity checks.
> 
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> ---
>  lib/xe/xe_ioctl.c  | 28 ++++++++++----
>  lib/xe/xe_ioctl.h  |  2 +
>  tests/xe/xe_mmap.c | 95 +++++++++++++++++++++++++++++++++++++++++++++-
>  3 files changed, 117 insertions(+), 8 deletions(-)
> 
> diff --git a/lib/xe/xe_ioctl.c b/lib/xe/xe_ioctl.c
> index 66a8393fe..6c14f03d1 100644
> --- a/lib/xe/xe_ioctl.c
> +++ b/lib/xe/xe_ioctl.c
> @@ -232,17 +232,31 @@ void xe_vm_destroy(int fd, uint32_t vm)
>  	igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_VM_DESTROY, &destroy), 0);
>  }
>  
> +uint32_t __xe_bo_create_flags(int fd, uint32_t vm, uint64_t size, uint32_t flags,
> +			      uint32_t *handle)
> +{
> +	struct drm_xe_gem_create create = {
> +		.vm_id = vm,
> +		.size = size,
> +		.flags = flags,
> +	};
> +	int err;
> +
> +	err = igt_ioctl(fd, DRM_IOCTL_XE_GEM_CREATE, &create);
> +	if (err)
> +		return err;
> +
> +	*handle = create.handle;
> +	return 0;
> +}
> +
>  uint32_t xe_bo_create_flags(int fd, uint32_t vm, uint64_t size, uint32_t flags)
>  {
> -	struct drm_xe_gem_create create = {
> -		.vm_id = vm,
> -		.size = size,
> -		.flags = flags,
> -	};
> +	uint32_t handle;
>  
> -	igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_GEM_CREATE, &create), 0);
> +	igt_assert_eq(__xe_bo_create_flags(fd, vm, size, flags, &handle), 0);
>  
> -	return create.handle;
> +	return handle;
>  }
>  
>  uint32_t xe_bo_create(int fd, int gt, uint32_t vm, uint64_t size)
> diff --git a/lib/xe/xe_ioctl.h b/lib/xe/xe_ioctl.h
> index 049cd183d..85389eff5 100644
> --- a/lib/xe/xe_ioctl.h
> +++ b/lib/xe/xe_ioctl.h
> @@ -64,6 +64,8 @@ void xe_vm_unbind_all_async(int fd, uint32_t vm, uint32_t engine,
>  			    uint32_t bo, struct drm_xe_sync *sync,
>  			    uint32_t num_syncs);
>  void xe_vm_destroy(int fd, uint32_t vm);
> +uint32_t __xe_bo_create_flags(int fd, uint32_t vm, uint64_t size, uint32_t flags,
> +			      uint32_t *handle);
>  uint32_t xe_bo_create_flags(int fd, uint32_t vm, uint64_t size, uint32_t flags);
>  uint32_t xe_bo_create(int fd, int gt, uint32_t vm, uint64_t size);
>  uint32_t xe_engine_create(int fd, uint32_t vm,
> diff --git a/tests/xe/xe_mmap.c b/tests/xe/xe_mmap.c
> index 7bfe72e51..b75d8dc5a 100644
> --- a/tests/xe/xe_mmap.c
> +++ b/tests/xe/xe_mmap.c
> @@ -18,14 +18,21 @@
>  #include "xe/xe_ioctl.h"
>  #include "xe/xe_query.h"
>  
> +#include <setjmp.h>
> +#include <signal.h>
>  #include <string.h>
>  
> -
>  /**
>   * SUBTEST: system
>   * Description: Test mmap on system memory
>   */
>  
> +/**
> + * SUBTEST: small-bar
> + * Description: Sanity check mmap behaviour on small-bar systems
> + * GPU requirements: GPU needs to have dedicated VRAM and using small-bar
> + */
> +
>  /**
>   * SUBTEST: %s
>   * Description: Test mmap on %arg[1] memory
> @@ -111,6 +118,86 @@ static void test_bad_object(int fd)
>  	do_ioctl_err(fd, DRM_IOCTL_XE_GEM_MMAP_OFFSET, &mmo, ENOENT);
>  }
>  
> +static jmp_buf jmp;
> +
> +__noreturn static void sigtrap(int sig)
> +{
> +	siglongjmp(jmp, sig);
> +}
> +
> +static void trap_sigbus(uint32_t *ptr)
> +{
> +	sighandler_t old_sigbus;
> +
> +	old_sigbus = signal(SIGBUS, sigtrap);
> +	switch (sigsetjmp(jmp, SIGBUS)) {
> +	case SIGBUS:
> +		break;
> +	case 0:
> +		*ptr = 0xdeadbeaf;
> +	default:
> +		igt_assert(!"reached");
> +		break;
> +	}
> +	signal(SIGBUS, old_sigbus);
> +}
> +
> +/**
> + * SUBTEST: small-bar
> + * Description: Test mmap behaviour on small-bar systems.
> + *
> + */
> +static void test_small_bar(int fd)
> +{
> +	uint32_t visible_size = xe_visible_vram_size(fd, 0);
> +	uint32_t bo;
> +	uint64_t mmo;
> +	uint32_t *map;
> +
> +	/* Some 2BIG invalid cases */
> +	igt_assert_neq(__xe_bo_create_flags(fd, 0, visible_size,
> +					    visible_vram_memory(fd, 0), &bo),
> +		       0);

Are you sure that visible_size will always fail? What about when running it Intel GPU Flex?

Other than that LGTM.

> +	igt_assert_neq(__xe_bo_create_flags(fd, 0, visible_size + 4096,
> +					    visible_vram_memory(fd, 0), &bo),
> +		       0);
> +
> +	/* Normal operation */
> +	bo = xe_bo_create_flags(fd, 0, visible_size / 4,
> +				visible_vram_memory(fd, 0));
> +	mmo = xe_bo_mmap_offset(fd, bo);
> +	map = mmap(NULL, 4096, PROT_WRITE, MAP_SHARED, fd, mmo);
> +	igt_assert(map != MAP_FAILED);
> +
> +	map[0] = 0xdeadbeaf;
> +
> +	munmap(map, 4096);
> +	gem_close(fd, bo);
> +
> +	/* Normal operation with system memory spilling */
> +	bo = xe_bo_create_flags(fd, 0, visible_size,
> +				visible_vram_memory(fd, 0) |
> +				system_memory(fd));
> +	mmo = xe_bo_mmap_offset(fd, bo);
> +	map = mmap(NULL, 4096, PROT_WRITE, MAP_SHARED, fd, mmo);
> +	igt_assert(map != MAP_FAILED);
> +
> +	map[0] = 0xdeadbeaf;
> +
> +	munmap(map, 4096);
> +	gem_close(fd, bo);
> +
> +	/* Bogus operation with SIGBUS */
> +	bo = xe_bo_create_flags(fd, 0, visible_size + 4096,
> +				vram_memory(fd, 0));
> +	mmo = xe_bo_mmap_offset(fd, bo);
> +	map = mmap(NULL, 4096, PROT_WRITE, MAP_SHARED, fd, mmo);
> +	igt_assert(map != MAP_FAILED);
> +
> +	trap_sigbus(map);
> +	gem_close(fd, bo);
> +}
> +
>  igt_main
>  {
>  	int fd;
> @@ -138,6 +225,12 @@ igt_main
>  	igt_subtest("bad-object")
>  		test_bad_object(fd);
>  
> +	igt_subtest("small-bar") {
> +		igt_require(xe_visible_vram_size(fd, 0));
> +		igt_require(xe_visible_vram_size(fd, 0) < xe_vram_size(fd, 0));
> +		test_small_bar(fd);
> +	}
> +
>  	igt_fixture {
>  		xe_device_put(fd);
>  		close(fd);

Re: [igt-dev] [PATCH i-g-t v2 6/6] tests/xe/mmap: sanity check small-bar

[Matthew Auld]

On 11/07/2023 17:52, Souza, Jose wrote:
> On Fri, 2023-06-09 at 16:43 +0100, Matthew Auld wrote:
>> Some basic sanity checks.
>>
>> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
>> Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
>> ---
>>   lib/xe/xe_ioctl.c  | 28 ++++++++++----
>>   lib/xe/xe_ioctl.h  |  2 +
>>   tests/xe/xe_mmap.c | 95 +++++++++++++++++++++++++++++++++++++++++++++-
>>   3 files changed, 117 insertions(+), 8 deletions(-)
>>
>> diff --git a/lib/xe/xe_ioctl.c b/lib/xe/xe_ioctl.c
>> index 66a8393fe..6c14f03d1 100644
>> --- a/lib/xe/xe_ioctl.c
>> +++ b/lib/xe/xe_ioctl.c
>> @@ -232,17 +232,31 @@ void xe_vm_destroy(int fd, uint32_t vm)
>>   	igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_VM_DESTROY, &destroy), 0);
>>   }
>>   
>> +uint32_t __xe_bo_create_flags(int fd, uint32_t vm, uint64_t size, uint32_t flags,
>> +			      uint32_t *handle)
>> +{
>> +	struct drm_xe_gem_create create = {
>> +		.vm_id = vm,
>> +		.size = size,
>> +		.flags = flags,
>> +	};
>> +	int err;
>> +
>> +	err = igt_ioctl(fd, DRM_IOCTL_XE_GEM_CREATE, &create);
>> +	if (err)
>> +		return err;
>> +
>> +	*handle = create.handle;
>> +	return 0;
>> +}
>> +
>>   uint32_t xe_bo_create_flags(int fd, uint32_t vm, uint64_t size, uint32_t flags)
>>   {
>> -	struct drm_xe_gem_create create = {
>> -		.vm_id = vm,
>> -		.size = size,
>> -		.flags = flags,
>> -	};
>> +	uint32_t handle;
>>   
>> -	igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_GEM_CREATE, &create), 0);
>> +	igt_assert_eq(__xe_bo_create_flags(fd, vm, size, flags, &handle), 0);
>>   
>> -	return create.handle;
>> +	return handle;
>>   }
>>   
>>   uint32_t xe_bo_create(int fd, int gt, uint32_t vm, uint64_t size)
>> diff --git a/lib/xe/xe_ioctl.h b/lib/xe/xe_ioctl.h
>> index 049cd183d..85389eff5 100644
>> --- a/lib/xe/xe_ioctl.h
>> +++ b/lib/xe/xe_ioctl.h
>> @@ -64,6 +64,8 @@ void xe_vm_unbind_all_async(int fd, uint32_t vm, uint32_t engine,
>>   			    uint32_t bo, struct drm_xe_sync *sync,
>>   			    uint32_t num_syncs);
>>   void xe_vm_destroy(int fd, uint32_t vm);
>> +uint32_t __xe_bo_create_flags(int fd, uint32_t vm, uint64_t size, uint32_t flags,
>> +			      uint32_t *handle);
>>   uint32_t xe_bo_create_flags(int fd, uint32_t vm, uint64_t size, uint32_t flags);
>>   uint32_t xe_bo_create(int fd, int gt, uint32_t vm, uint64_t size);
>>   uint32_t xe_engine_create(int fd, uint32_t vm,
>> diff --git a/tests/xe/xe_mmap.c b/tests/xe/xe_mmap.c
>> index 7bfe72e51..b75d8dc5a 100644
>> --- a/tests/xe/xe_mmap.c
>> +++ b/tests/xe/xe_mmap.c
>> @@ -18,14 +18,21 @@
>>   #include "xe/xe_ioctl.h"
>>   #include "xe/xe_query.h"
>>   
>> +#include <setjmp.h>
>> +#include <signal.h>
>>   #include <string.h>
>>   
>> -
>>   /**
>>    * SUBTEST: system
>>    * Description: Test mmap on system memory
>>    */
>>   
>> +/**
>> + * SUBTEST: small-bar
>> + * Description: Sanity check mmap behaviour on small-bar systems
>> + * GPU requirements: GPU needs to have dedicated VRAM and using small-bar
>> + */
>> +
>>   /**
>>    * SUBTEST: %s
>>    * Description: Test mmap on %arg[1] memory
>> @@ -111,6 +118,86 @@ static void test_bad_object(int fd)
>>   	do_ioctl_err(fd, DRM_IOCTL_XE_GEM_MMAP_OFFSET, &mmo, ENOENT);
>>   }
>>   
>> +static jmp_buf jmp;
>> +
>> +__noreturn static void sigtrap(int sig)
>> +{
>> +	siglongjmp(jmp, sig);
>> +}
>> +
>> +static void trap_sigbus(uint32_t *ptr)
>> +{
>> +	sighandler_t old_sigbus;
>> +
>> +	old_sigbus = signal(SIGBUS, sigtrap);
>> +	switch (sigsetjmp(jmp, SIGBUS)) {
>> +	case SIGBUS:
>> +		break;
>> +	case 0:
>> +		*ptr = 0xdeadbeaf;
>> +	default:
>> +		igt_assert(!"reached");
>> +		break;
>> +	}
>> +	signal(SIGBUS, old_sigbus);
>> +}
>> +
>> +/**
>> + * SUBTEST: small-bar
>> + * Description: Test mmap behaviour on small-bar systems.
>> + *
>> + */
>> +static void test_small_bar(int fd)
>> +{
>> +	uint32_t visible_size = xe_visible_vram_size(fd, 0);
>> +	uint32_t bo;
>> +	uint64_t mmo;
>> +	uint32_t *map;
>> +
>> +	/* Some 2BIG invalid cases */
>> +	igt_assert_neq(__xe_bo_create_flags(fd, 0, visible_size,
>> +					    visible_vram_memory(fd, 0), &bo),
>> +		       0);
> 
> Are you sure that visible_size will always fail? What about when running it Intel GPU Flex?

KMD always need some minimal amount of mappable VRAM per tile for 
driver/hw initialisation, so userspace never really gets the entire 
thing. I can drop though, the below check should be sufficient.

> 
> Other than that LGTM.

Thanks.

> 
>> +	igt_assert_neq(__xe_bo_create_flags(fd, 0, visible_size + 4096,
>> +					    visible_vram_memory(fd, 0), &bo),
>> +		       0);
>> +
>> +	/* Normal operation */
>> +	bo = xe_bo_create_flags(fd, 0, visible_size / 4,
>> +				visible_vram_memory(fd, 0));
>> +	mmo = xe_bo_mmap_offset(fd, bo);
>> +	map = mmap(NULL, 4096, PROT_WRITE, MAP_SHARED, fd, mmo);
>> +	igt_assert(map != MAP_FAILED);
>> +
>> +	map[0] = 0xdeadbeaf;
>> +
>> +	munmap(map, 4096);
>> +	gem_close(fd, bo);
>> +
>> +	/* Normal operation with system memory spilling */
>> +	bo = xe_bo_create_flags(fd, 0, visible_size,
>> +				visible_vram_memory(fd, 0) |
>> +				system_memory(fd));
>> +	mmo = xe_bo_mmap_offset(fd, bo);
>> +	map = mmap(NULL, 4096, PROT_WRITE, MAP_SHARED, fd, mmo);
>> +	igt_assert(map != MAP_FAILED);
>> +
>> +	map[0] = 0xdeadbeaf;
>> +
>> +	munmap(map, 4096);
>> +	gem_close(fd, bo);
>> +
>> +	/* Bogus operation with SIGBUS */
>> +	bo = xe_bo_create_flags(fd, 0, visible_size + 4096,
>> +				vram_memory(fd, 0));
>> +	mmo = xe_bo_mmap_offset(fd, bo);
>> +	map = mmap(NULL, 4096, PROT_WRITE, MAP_SHARED, fd, mmo);
>> +	igt_assert(map != MAP_FAILED);
>> +
>> +	trap_sigbus(map);
>> +	gem_close(fd, bo);
>> +}
>> +
>>   igt_main
>>   {
>>   	int fd;
>> @@ -138,6 +225,12 @@ igt_main
>>   	igt_subtest("bad-object")
>>   		test_bad_object(fd);
>>   
>> +	igt_subtest("small-bar") {
>> +		igt_require(xe_visible_vram_size(fd, 0));
>> +		igt_require(xe_visible_vram_size(fd, 0) < xe_vram_size(fd, 0));
>> +		test_small_bar(fd);
>> +	}
>> +
>>   	igt_fixture {
>>   		xe_device_put(fd);
>>   		close(fd);
> 

Re: [igt-dev] [PATCH i-g-t v2 6/6] tests/xe/mmap: sanity check small-bar

[Souza, Jose]

On Fri, 2023-07-14 at 09:57 +0100, Matthew Auld wrote:
> On 11/07/2023 17:52, Souza, Jose wrote:
> > On Fri, 2023-06-09 at 16:43 +0100, Matthew Auld wrote:
> > > Some basic sanity checks.
> > > 
> > > Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> > > Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> > > ---
> > >   lib/xe/xe_ioctl.c  | 28 ++++++++++----
> > >   lib/xe/xe_ioctl.h  |  2 +
> > >   tests/xe/xe_mmap.c | 95 +++++++++++++++++++++++++++++++++++++++++++++-
> > >   3 files changed, 117 insertions(+), 8 deletions(-)
> > > 
> > > diff --git a/lib/xe/xe_ioctl.c b/lib/xe/xe_ioctl.c
> > > index 66a8393fe..6c14f03d1 100644
> > > --- a/lib/xe/xe_ioctl.c
> > > +++ b/lib/xe/xe_ioctl.c
> > > @@ -232,17 +232,31 @@ void xe_vm_destroy(int fd, uint32_t vm)
> > >   	igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_VM_DESTROY, &destroy), 0);
> > >   }
> > >   
> > > +uint32_t __xe_bo_create_flags(int fd, uint32_t vm, uint64_t size, uint32_t flags,
> > > +			      uint32_t *handle)
> > > +{
> > > +	struct drm_xe_gem_create create = {
> > > +		.vm_id = vm,
> > > +		.size = size,
> > > +		.flags = flags,
> > > +	};
> > > +	int err;
> > > +
> > > +	err = igt_ioctl(fd, DRM_IOCTL_XE_GEM_CREATE, &create);
> > > +	if (err)
> > > +		return err;
> > > +
> > > +	*handle = create.handle;
> > > +	return 0;
> > > +}
> > > +
> > >   uint32_t xe_bo_create_flags(int fd, uint32_t vm, uint64_t size, uint32_t flags)
> > >   {
> > > -	struct drm_xe_gem_create create = {
> > > -		.vm_id = vm,
> > > -		.size = size,
> > > -		.flags = flags,
> > > -	};
> > > +	uint32_t handle;
> > >   
> > > -	igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_GEM_CREATE, &create), 0);
> > > +	igt_assert_eq(__xe_bo_create_flags(fd, vm, size, flags, &handle), 0);
> > >   
> > > -	return create.handle;
> > > +	return handle;
> > >   }
> > >   
> > >   uint32_t xe_bo_create(int fd, int gt, uint32_t vm, uint64_t size)
> > > diff --git a/lib/xe/xe_ioctl.h b/lib/xe/xe_ioctl.h
> > > index 049cd183d..85389eff5 100644
> > > --- a/lib/xe/xe_ioctl.h
> > > +++ b/lib/xe/xe_ioctl.h
> > > @@ -64,6 +64,8 @@ void xe_vm_unbind_all_async(int fd, uint32_t vm, uint32_t engine,
> > >   			    uint32_t bo, struct drm_xe_sync *sync,
> > >   			    uint32_t num_syncs);
> > >   void xe_vm_destroy(int fd, uint32_t vm);
> > > +uint32_t __xe_bo_create_flags(int fd, uint32_t vm, uint64_t size, uint32_t flags,
> > > +			      uint32_t *handle);
> > >   uint32_t xe_bo_create_flags(int fd, uint32_t vm, uint64_t size, uint32_t flags);
> > >   uint32_t xe_bo_create(int fd, int gt, uint32_t vm, uint64_t size);
> > >   uint32_t xe_engine_create(int fd, uint32_t vm,
> > > diff --git a/tests/xe/xe_mmap.c b/tests/xe/xe_mmap.c
> > > index 7bfe72e51..b75d8dc5a 100644
> > > --- a/tests/xe/xe_mmap.c
> > > +++ b/tests/xe/xe_mmap.c
> > > @@ -18,14 +18,21 @@
> > >   #include "xe/xe_ioctl.h"
> > >   #include "xe/xe_query.h"
> > >   
> > > +#include <setjmp.h>
> > > +#include <signal.h>
> > >   #include <string.h>
> > >   
> > > -
> > >   /**
> > >    * SUBTEST: system
> > >    * Description: Test mmap on system memory
> > >    */
> > >   
> > > +/**
> > > + * SUBTEST: small-bar
> > > + * Description: Sanity check mmap behaviour on small-bar systems
> > > + * GPU requirements: GPU needs to have dedicated VRAM and using small-bar
> > > + */
> > > +
> > >   /**
> > >    * SUBTEST: %s
> > >    * Description: Test mmap on %arg[1] memory
> > > @@ -111,6 +118,86 @@ static void test_bad_object(int fd)
> > >   	do_ioctl_err(fd, DRM_IOCTL_XE_GEM_MMAP_OFFSET, &mmo, ENOENT);
> > >   }
> > >   
> > > +static jmp_buf jmp;
> > > +
> > > +__noreturn static void sigtrap(int sig)
> > > +{
> > > +	siglongjmp(jmp, sig);
> > > +}
> > > +
> > > +static void trap_sigbus(uint32_t *ptr)
> > > +{
> > > +	sighandler_t old_sigbus;
> > > +
> > > +	old_sigbus = signal(SIGBUS, sigtrap);
> > > +	switch (sigsetjmp(jmp, SIGBUS)) {
> > > +	case SIGBUS:
> > > +		break;
> > > +	case 0:
> > > +		*ptr = 0xdeadbeaf;
> > > +	default:
> > > +		igt_assert(!"reached");
> > > +		break;
> > > +	}
> > > +	signal(SIGBUS, old_sigbus);
> > > +}
> > > +
> > > +/**
> > > + * SUBTEST: small-bar
> > > + * Description: Test mmap behaviour on small-bar systems.
> > > + *
> > > + */
> > > +static void test_small_bar(int fd)
> > > +{
> > > +	uint32_t visible_size = xe_visible_vram_size(fd, 0);
> > > +	uint32_t bo;
> > > +	uint64_t mmo;
> > > +	uint32_t *map;
> > > +
> > > +	/* Some 2BIG invalid cases */
> > > +	igt_assert_neq(__xe_bo_create_flags(fd, 0, visible_size,
> > > +					    visible_vram_memory(fd, 0), &bo),
> > > +		       0);
> > 
> > Are you sure that visible_size will always fail? What about when running it Intel GPU Flex?
> 
> KMD always need some minimal amount of mappable VRAM per tile for 
> driver/hw initialisation, so userspace never really gets the entire 
> thing. I can drop though, the below check should be sufficient.

Okay then

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> 
> > 
> > Other than that LGTM.
> 
> Thanks.
> 
> > 
> > > +	igt_assert_neq(__xe_bo_create_flags(fd, 0, visible_size + 4096,
> > > +					    visible_vram_memory(fd, 0), &bo),
> > > +		       0);
> > > +
> > > +	/* Normal operation */
> > > +	bo = xe_bo_create_flags(fd, 0, visible_size / 4,
> > > +				visible_vram_memory(fd, 0));
> > > +	mmo = xe_bo_mmap_offset(fd, bo);
> > > +	map = mmap(NULL, 4096, PROT_WRITE, MAP_SHARED, fd, mmo);
> > > +	igt_assert(map != MAP_FAILED);
> > > +
> > > +	map[0] = 0xdeadbeaf;
> > > +
> > > +	munmap(map, 4096);
> > > +	gem_close(fd, bo);
> > > +
> > > +	/* Normal operation with system memory spilling */
> > > +	bo = xe_bo_create_flags(fd, 0, visible_size,
> > > +				visible_vram_memory(fd, 0) |
> > > +				system_memory(fd));
> > > +	mmo = xe_bo_mmap_offset(fd, bo);
> > > +	map = mmap(NULL, 4096, PROT_WRITE, MAP_SHARED, fd, mmo);
> > > +	igt_assert(map != MAP_FAILED);
> > > +
> > > +	map[0] = 0xdeadbeaf;
> > > +
> > > +	munmap(map, 4096);
> > > +	gem_close(fd, bo);
> > > +
> > > +	/* Bogus operation with SIGBUS */
> > > +	bo = xe_bo_create_flags(fd, 0, visible_size + 4096,
> > > +				vram_memory(fd, 0));
> > > +	mmo = xe_bo_mmap_offset(fd, bo);
> > > +	map = mmap(NULL, 4096, PROT_WRITE, MAP_SHARED, fd, mmo);
> > > +	igt_assert(map != MAP_FAILED);
> > > +
> > > +	trap_sigbus(map);
> > > +	gem_close(fd, bo);
> > > +}
> > > +
> > >   igt_main
> > >   {
> > >   	int fd;
> > > @@ -138,6 +225,12 @@ igt_main
> > >   	igt_subtest("bad-object")
> > >   		test_bad_object(fd);
> > >   
> > > +	igt_subtest("small-bar") {
> > > +		igt_require(xe_visible_vram_size(fd, 0));
> > > +		igt_require(xe_visible_vram_size(fd, 0) < xe_vram_size(fd, 0));
> > > +		test_small_bar(fd);
> > > +	}
> > > +
> > >   	igt_fixture {
> > >   		xe_device_put(fd);
> > >   		close(fd);
> >