[igt-dev] [PATCH v1 0/7] uAPI Alignment - Remove unused features

[igt-dev] [PATCH v1 0/7] uAPI Alignment - Remove unused features

[Francois Dugast]

The series "uAPI Alignment - take 2 v3" [1] has grown too much which makes
it difficult to review and to digest by UMDs. This new series is a first
break down which focuses only on removing features which were not used.

It aligns on kernel series [2].

[1] https://patchwork.freedesktop.org/series/126204/
[2] https://patchwork.freedesktop.org/series/126278/

Francois Dugast (5):
  drm-uapi/xe: Remove useless XE_QUERY_CONFIG_NUM_PARAM
  drm-uapi/xe: Remove unused inaccessible memory region
  drm-uapi/xe: Remove unused QUERY_CONFIG_MEM_REGION_COUNT
  drm-uapi/xe: Remove unused QUERY_CONFIG_GT_COUNT
  drm-uapi/xe: Drop interrupt pmu event

Rodrigo Vivi (2):
  drm-uapi/xe: Remove GT_TYPE_REMOTE.
  drm-uapi/xe: Kill VM_MADVISE IOCTL and the atomic tests

 include/drm-uapi/xe_drm.h        | 121 ++++-----------------
 lib/xe/xe_ioctl.c                |  14 ---
 lib/xe/xe_ioctl.h                |   2 -
 lib/xe/xe_query.c                |  11 +-
 lib/xe/xe_query.h                |   3 -
 tests/intel/xe_debugfs.c         |   2 -
 tests/intel/xe_exec_fault_mode.c | 174 ++-----------------------------
 tests/intel/xe_query.c           |   6 --
 8 files changed, 35 insertions(+), 298 deletions(-)

-- 
2.34.1

[igt-dev] [PATCH v1 1/7] drm-uapi/xe: Remove useless XE_QUERY_CONFIG_NUM_PARAM

[Francois Dugast]

Align with commit ("drm/xe/uapi: Remove useless XE_QUERY_CONFIG_NUM_PARAM")

Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
 include/drm-uapi/xe_drm.h | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h
index 66658d76c..b316868de 100644
--- a/include/drm-uapi/xe_drm.h
+++ b/include/drm-uapi/xe_drm.h
@@ -329,7 +329,6 @@ struct drm_xe_query_config {
 #define XE_QUERY_CONFIG_GT_COUNT		4
 #define XE_QUERY_CONFIG_MEM_REGION_COUNT	5
 #define XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY	6
-#define XE_QUERY_CONFIG_NUM_PARAM		(XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY + 1)
 	/** @info: array of elements containing the config info */
 	__u64 info[];
 };
-- 
2.34.1

Re: [igt-dev] [PATCH v1 1/7] drm-uapi/xe: Remove useless XE_QUERY_CONFIG_NUM_PARAM

[Rodrigo Vivi]

On Fri, Nov 10, 2023 at 03:52:05PM +0000, Francois Dugast wrote:
> Align with commit ("drm/xe/uapi: Remove useless XE_QUERY_CONFIG_NUM_PARAM")
> 
> Signed-off-by: Francois Dugast <francois.dugast@intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  include/drm-uapi/xe_drm.h | 1 -
>  1 file changed, 1 deletion(-)
> 
> diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h
> index 66658d76c..b316868de 100644
> --- a/include/drm-uapi/xe_drm.h
> +++ b/include/drm-uapi/xe_drm.h
> @@ -329,7 +329,6 @@ struct drm_xe_query_config {
>  #define XE_QUERY_CONFIG_GT_COUNT		4
>  #define XE_QUERY_CONFIG_MEM_REGION_COUNT	5
>  #define XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY	6
> -#define XE_QUERY_CONFIG_NUM_PARAM		(XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY + 1)
>  	/** @info: array of elements containing the config info */
>  	__u64 info[];
>  };
> -- 
> 2.34.1
> 

[igt-dev] [PATCH v1 2/7] drm-uapi/xe: Remove GT_TYPE_REMOTE.

[Francois Dugast]

From: Rodrigo Vivi <rodrigo.vivi@intel.com>

Align with commit ("drm/xe/uapi: Remove GT_TYPE_REMOTE")

Cc: Francois Dugast <francois.dugast@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
 include/drm-uapi/xe_drm.h | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h
index b316868de..8a18e1726 100644
--- a/include/drm-uapi/xe_drm.h
+++ b/include/drm-uapi/xe_drm.h
@@ -343,9 +343,8 @@ struct drm_xe_query_config {
  */
 struct drm_xe_query_gt {
 #define XE_QUERY_GT_TYPE_MAIN		0
-#define XE_QUERY_GT_TYPE_REMOTE		1
-#define XE_QUERY_GT_TYPE_MEDIA		2
-	/** @type: GT type: Main, Remote, or Media */
+#define XE_QUERY_GT_TYPE_MEDIA		1
+	/** @type: GT type: Main or Media */
 	__u16 type;
 	/** @gt_id: Unique ID of this GT within the PCI Device */
 	__u16 gt_id;
-- 
2.34.1

Re: [igt-dev] [PATCH v1 2/7] drm-uapi/xe: Remove GT_TYPE_REMOTE.

[Matthew Brost]

On Fri, Nov 10, 2023 at 03:52:06PM +0000, Francois Dugast wrote:
> From: Rodrigo Vivi <rodrigo.vivi@intel.com>
> 
> Align with commit ("drm/xe/uapi: Remove GT_TYPE_REMOTE")
> 
> Cc: Francois Dugast <francois.dugast@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Francois Dugast <francois.dugast@intel.com>

Reviewed-by: Matthew Brost <matthew.brost@intel.com>

> ---
>  include/drm-uapi/xe_drm.h | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h
> index b316868de..8a18e1726 100644
> --- a/include/drm-uapi/xe_drm.h
> +++ b/include/drm-uapi/xe_drm.h
> @@ -343,9 +343,8 @@ struct drm_xe_query_config {
>   */
>  struct drm_xe_query_gt {
>  #define XE_QUERY_GT_TYPE_MAIN		0
> -#define XE_QUERY_GT_TYPE_REMOTE		1
> -#define XE_QUERY_GT_TYPE_MEDIA		2
> -	/** @type: GT type: Main, Remote, or Media */
> +#define XE_QUERY_GT_TYPE_MEDIA		1
> +	/** @type: GT type: Main or Media */
>  	__u16 type;
>  	/** @gt_id: Unique ID of this GT within the PCI Device */
>  	__u16 gt_id;
> -- 
> 2.34.1
> 

Re: [igt-dev] [PATCH v1 2/7] drm-uapi/xe: Remove GT_TYPE_REMOTE.

[Kamil Konieczny]

Hi Francois,
On 2023-11-10 at 15:52:06 +0000, Francois Dugast wrote:
> From: Rodrigo Vivi <rodrigo.vivi@intel.com>
> 

please remove last dot "." from subject (you can do it at merge):

[PATCH v1 2/7] drm-uapi/xe: Remove GT_TYPE_REMOTE.
-------------------------------------------------^

Regards,
Kamil

> Align with commit ("drm/xe/uapi: Remove GT_TYPE_REMOTE")
> 
> Cc: Francois Dugast <francois.dugast@intel.com>
----- ^^^^^^^^^^^^^^^
Btw do you need to add yourself at Cc when you have s-o-b?

> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Francois Dugast <francois.dugast@intel.com>
> ---
>  include/drm-uapi/xe_drm.h | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h
> index b316868de..8a18e1726 100644
> --- a/include/drm-uapi/xe_drm.h
> +++ b/include/drm-uapi/xe_drm.h
> @@ -343,9 +343,8 @@ struct drm_xe_query_config {
>   */
>  struct drm_xe_query_gt {
>  #define XE_QUERY_GT_TYPE_MAIN		0
> -#define XE_QUERY_GT_TYPE_REMOTE		1
> -#define XE_QUERY_GT_TYPE_MEDIA		2
> -	/** @type: GT type: Main, Remote, or Media */
> +#define XE_QUERY_GT_TYPE_MEDIA		1
> +	/** @type: GT type: Main or Media */
>  	__u16 type;
>  	/** @gt_id: Unique ID of this GT within the PCI Device */
>  	__u16 gt_id;
> -- 
> 2.34.1
> 

[igt-dev] [PATCH v1 3/7] drm-uapi/xe: Kill VM_MADVISE IOCTL and the atomic tests

[Francois Dugast]

From: Rodrigo Vivi <rodrigo.vivi@intel.com>

Align with commit ("drm/xe/uapi: Kill VM_MADVISE IOCTL").

Cc: Francois Dugast <francois.dugast@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
 include/drm-uapi/xe_drm.h        |  92 ++--------------
 lib/xe/xe_ioctl.c                |  14 ---
 lib/xe/xe_ioctl.h                |   2 -
 tests/intel/xe_exec_fault_mode.c | 174 ++-----------------------------
 4 files changed, 20 insertions(+), 262 deletions(-)

diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h
index 8a18e1726..1d8dc1b9c 100644
--- a/include/drm-uapi/xe_drm.h
+++ b/include/drm-uapi/xe_drm.h
@@ -103,28 +103,26 @@ struct xe_user_extension {
 #define DRM_XE_VM_CREATE		0x03
 #define DRM_XE_VM_DESTROY		0x04
 #define DRM_XE_VM_BIND			0x05
-#define DRM_XE_EXEC_QUEUE_CREATE		0x06
-#define DRM_XE_EXEC_QUEUE_DESTROY		0x07
-#define DRM_XE_EXEC			0x08
+#define DRM_XE_EXEC			0x06
+#define DRM_XE_EXEC_QUEUE_CREATE	0x07
+#define DRM_XE_EXEC_QUEUE_DESTROY	0x08
 #define DRM_XE_EXEC_QUEUE_SET_PROPERTY	0x09
-#define DRM_XE_WAIT_USER_FENCE		0x0a
-#define DRM_XE_VM_MADVISE		0x0b
-#define DRM_XE_EXEC_QUEUE_GET_PROPERTY	0x0c
-
+#define DRM_XE_EXEC_QUEUE_GET_PROPERTY	0x0a
+#define DRM_XE_WAIT_USER_FENCE		0x0b
 /* Must be kept compact -- no holes */
+
 #define DRM_IOCTL_XE_DEVICE_QUERY		DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_DEVICE_QUERY, struct drm_xe_device_query)
 #define DRM_IOCTL_XE_GEM_CREATE			DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_GEM_CREATE, struct drm_xe_gem_create)
 #define DRM_IOCTL_XE_GEM_MMAP_OFFSET		DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_GEM_MMAP_OFFSET, struct drm_xe_gem_mmap_offset)
 #define DRM_IOCTL_XE_VM_CREATE			DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_VM_CREATE, struct drm_xe_vm_create)
-#define DRM_IOCTL_XE_VM_DESTROY			 DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_DESTROY, struct drm_xe_vm_destroy)
-#define DRM_IOCTL_XE_VM_BIND			 DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_BIND, struct drm_xe_vm_bind)
+#define DRM_IOCTL_XE_VM_DESTROY			DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_DESTROY, struct drm_xe_vm_destroy)
+#define DRM_IOCTL_XE_VM_BIND			DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_BIND, struct drm_xe_vm_bind)
+#define DRM_IOCTL_XE_EXEC			DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC, struct drm_xe_exec)
 #define DRM_IOCTL_XE_EXEC_QUEUE_CREATE		DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_CREATE, struct drm_xe_exec_queue_create)
+#define DRM_IOCTL_XE_EXEC_QUEUE_DESTROY		DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_DESTROY, struct drm_xe_exec_queue_destroy)
+#define DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY	DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_SET_PROPERTY, struct drm_xe_exec_queue_set_property)
 #define DRM_IOCTL_XE_EXEC_QUEUE_GET_PROPERTY	DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_GET_PROPERTY, struct drm_xe_exec_queue_get_property)
-#define DRM_IOCTL_XE_EXEC_QUEUE_DESTROY		 DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_DESTROY, struct drm_xe_exec_queue_destroy)
-#define DRM_IOCTL_XE_EXEC			 DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC, struct drm_xe_exec)
-#define DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY	 DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_SET_PROPERTY, struct drm_xe_exec_queue_set_property)
 #define DRM_IOCTL_XE_WAIT_USER_FENCE		DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence)
-#define DRM_IOCTL_XE_VM_MADVISE			 DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_MADVISE, struct drm_xe_vm_madvise)
 
 /** struct drm_xe_engine_class_instance - instance of an engine class */
 struct drm_xe_engine_class_instance {
@@ -978,74 +976,6 @@ struct drm_xe_wait_user_fence {
 	__u64 reserved[2];
 };
 
-struct drm_xe_vm_madvise {
-	/** @extensions: Pointer to the first extension struct, if any */
-	__u64 extensions;
-
-	/** @vm_id: The ID VM in which the VMA exists */
-	__u32 vm_id;
-
-	/** @pad: MBZ */
-	__u32 pad;
-
-	/** @range: Number of bytes in the VMA */
-	__u64 range;
-
-	/** @addr: Address of the VMA to operation on */
-	__u64 addr;
-
-	/*
-	 * Setting the preferred location will trigger a migrate of the VMA
-	 * backing store to new location if the backing store is already
-	 * allocated.
-	 *
-	 * For DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS usage, see enum
-	 * drm_xe_memory_class.
-	 */
-#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS	0
-#define DRM_XE_VM_MADVISE_PREFERRED_GT		1
-	/*
-	 * In this case lower 32 bits are mem class, upper 32 are GT.
-	 * Combination provides a single IOCTL plus migrate VMA to preferred
-	 * location.
-	 */
-#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS_GT	2
-	/*
-	 * The CPU will do atomic memory operations to this VMA. Must be set on
-	 * some devices for atomics to behave correctly.
-	 */
-#define DRM_XE_VM_MADVISE_CPU_ATOMIC		3
-	/*
-	 * The device will do atomic memory operations to this VMA. Must be set
-	 * on some devices for atomics to behave correctly.
-	 */
-#define DRM_XE_VM_MADVISE_DEVICE_ATOMIC		4
-	/*
-	 * Priority WRT to eviction (moving from preferred memory location due
-	 * to memory pressure). The lower the priority, the more likely to be
-	 * evicted.
-	 */
-#define DRM_XE_VM_MADVISE_PRIORITY		5
-#define		DRM_XE_VMA_PRIORITY_LOW		0
-		/* Default */
-#define		DRM_XE_VMA_PRIORITY_NORMAL	1
-		/* Must be user with elevated privileges */
-#define		DRM_XE_VMA_PRIORITY_HIGH	2
-	/* Pin the VMA in memory, must be user with elevated privileges */
-#define DRM_XE_VM_MADVISE_PIN			6
-	/** @property: property to set */
-	__u32 property;
-
-	/** @pad2: MBZ */
-	__u32 pad2;
-
-	/** @value: property value */
-	__u64 value;
-
-	/** @reserved: Reserved */
-	__u64 reserved[2];
-};
-
 /**
  * DOC: XE PMU event config IDs
  *
diff --git a/lib/xe/xe_ioctl.c b/lib/xe/xe_ioctl.c
index 895e3bd4e..c4077801e 100644
--- a/lib/xe/xe_ioctl.c
+++ b/lib/xe/xe_ioctl.c
@@ -475,17 +475,3 @@ void xe_force_gt_reset(int fd, int gt)
 		 minor(st.st_rdev), gt);
 	system(reset_string);
 }
-
-void xe_vm_madvise(int fd, uint32_t vm, uint64_t addr, uint64_t size,
-		   uint32_t property, uint32_t value)
-{
-	struct drm_xe_vm_madvise madvise = {
-		.vm_id = vm,
-		.range = size,
-		.addr = addr,
-		.property = property,
-		.value = value,
-	};
-
-	igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_VM_MADVISE, &madvise), 0);
-}
diff --git a/lib/xe/xe_ioctl.h b/lib/xe/xe_ioctl.h
index a8dbcf376..d9c97bf22 100644
--- a/lib/xe/xe_ioctl.h
+++ b/lib/xe/xe_ioctl.h
@@ -90,7 +90,5 @@ int64_t xe_wait_ufence_abstime(int fd, uint64_t *addr, uint64_t value,
 			       struct drm_xe_engine_class_instance *eci,
 			       int64_t timeout);
 void xe_force_gt_reset(int fd, int gt);
-void xe_vm_madvise(int fd, uint32_t vm, uint64_t addr, uint64_t size,
-		   uint32_t property, uint32_t value);
 
 #endif /* XE_IOCTL_H */
diff --git a/tests/intel/xe_exec_fault_mode.c b/tests/intel/xe_exec_fault_mode.c
index 92d8690a1..64b5c59a2 100644
--- a/tests/intel/xe_exec_fault_mode.c
+++ b/tests/intel/xe_exec_fault_mode.c
@@ -23,15 +23,15 @@
 #include <string.h>
 
 #define MAX_N_EXEC_QUEUES	16
-#define USERPTR				(0x1 << 0)
-#define REBIND				(0x1 << 1)
-#define INVALIDATE			(0x1 << 2)
-#define RACE				(0x1 << 3)
-#define BIND_EXEC_QUEUE		(0x1 << 4)
-#define WAIT_ATOMIC			(0x1 << 5)
-#define IMMEDIATE			(0x1 << 6)
-#define PREFETCH			(0x1 << 7)
-#define INVALID_FAULT		(0x1 << 8)
+
+#define USERPTR		(0x1 << 0)
+#define REBIND		(0x1 << 1)
+#define INVALIDATE	(0x1 << 2)
+#define RACE		(0x1 << 3)
+#define BIND_EXEC_QUEUE	(0x1 << 4)
+#define IMMEDIATE	(0x1 << 5)
+#define PREFETCH	(0x1 << 6)
+#define INVALID_FAULT	(0x1 << 7)
 
 /**
  * SUBTEST: once-%s
@@ -317,146 +317,6 @@ test_exec(int fd, struct drm_xe_engine_class_instance *eci,
 		close(map_fd);
 }
 
-#define   MI_ATOMIC_INLINE_DATA         (1 << 18)
-#define   MI_ATOMIC_ADD                 (0x7 << 8)
-
-/**
- * SUBTEST: atomic-once
- * Description: Run atomic fault mode test only once
- * Test category: functionality test
- *
- * SUBTEST: atomic-once-wait
- * Description: Run atomic wait fault mode test once
- * Test category: functionality test
- *
- * SUBTEST: atomic-many
- * Description: Run atomic fault mode test many times
- * Description: atomic many
- * Test category: functionality test
- *
- * SUBTEST: atomic-many-wait
- * Description: Run atomic wait fault mode test many times
- * Test category: functionality test
- *
- */
-static void
-test_atomic(int fd, struct drm_xe_engine_class_instance *eci,
-	    int n_atomic, unsigned int flags)
-{
-	uint32_t vm;
-	uint64_t addr = 0x1a0000, addr_wait;
-#define USER_FENCE_VALUE	0xdeadbeefdeadbeefull
-	struct drm_xe_sync sync[1] = {
-		{ .flags = DRM_XE_SYNC_USER_FENCE | DRM_XE_SYNC_SIGNAL,
-	          .timeline_value = USER_FENCE_VALUE },
-	};
-	struct drm_xe_exec exec = {
-		.num_batch_buffer = 1,
-		.num_syncs = 1,
-		.syncs = to_user_pointer(sync),
-	};
-	uint32_t exec_queue;
-	size_t bo_size;
-	uint32_t bo, bo_wait;
-	struct {
-		uint32_t batch[16];
-		uint64_t pad;
-		uint64_t vm_sync;
-		uint64_t exec_sync;
-		uint32_t data;
-	} *data;
-	struct {
-		uint32_t batch[16];
-		uint64_t pad;
-		uint64_t vm_sync;
-		uint64_t exec_sync;
-		uint32_t data;
-	} *wait;
-	uint32_t *ptr;
-	int i, b, wait_idx = 0;
-
-	vm = xe_vm_create(fd, DRM_XE_VM_CREATE_ASYNC_DEFAULT |
-			  DRM_XE_VM_CREATE_FAULT_MODE, 0);
-	bo_size = sizeof(*data) * n_atomic;
-	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
-			xe_get_default_alignment(fd));
-	addr_wait = addr + bo_size;
-
-	bo = xe_bo_create_flags(fd, vm, bo_size,
-				all_memory_regions(fd) |
-				visible_vram_if_possible(fd, 0));
-	bo_wait = xe_bo_create_flags(fd, vm, bo_size,
-				     visible_vram_if_possible(fd, eci->gt_id));
-	data = xe_bo_map(fd, bo, bo_size);
-	wait = xe_bo_map(fd, bo_wait, bo_size);
-	ptr = &data[0].data;
-	memset(data, 0, bo_size);
-	memset(wait, 0, bo_size);
-
-	exec_queue = xe_exec_queue_create(fd, vm, eci, 0);
-
-	sync[0].addr = to_user_pointer(&wait[wait_idx].vm_sync);
-	xe_vm_bind_async(fd, vm, 0, bo, 0, addr, bo_size, sync, 1);
-	xe_wait_ufence(fd, &wait[wait_idx++].vm_sync, USER_FENCE_VALUE, NULL,
-		       ONE_SEC);
-
-	sync[0].addr = to_user_pointer(&wait[wait_idx].vm_sync);
-	xe_vm_bind_async(fd, vm, 0, bo_wait, 0, addr_wait, bo_size, sync, 1);
-	xe_wait_ufence(fd, &wait[wait_idx++].vm_sync, USER_FENCE_VALUE, NULL,
-		       ONE_SEC);
-
-	xe_vm_madvise(fd, vm, addr, bo_size, DRM_XE_VM_MADVISE_CPU_ATOMIC, 1);
-	xe_vm_madvise(fd, vm, addr, bo_size, DRM_XE_VM_MADVISE_DEVICE_ATOMIC, 1);
-
-	for (i = 0; i < n_atomic; i++) {
-		uint64_t batch_offset = (char *)&data[i].batch - (char *)data;
-		uint64_t batch_addr = addr + batch_offset;
-		uint64_t sdi_offset = (char *)&data[0].data - (char *)data;
-		uint64_t sdi_addr = addr + sdi_offset;
-
-		b = 0;
-		data[i].batch[b++] = MI_ATOMIC | MI_ATOMIC_INLINE_DATA |
-			MI_ATOMIC_ADD;
-		data[i].batch[b++] = sdi_addr;
-		data[i].batch[b++] = sdi_addr >> 32;
-		data[i].batch[b++] = 1;
-		data[i].batch[b++] = MI_BATCH_BUFFER_END;
-
-		sync[0].addr = addr_wait +
-			(char *)&wait[i].exec_sync - (char *)wait;
-
-		exec.exec_queue_id = exec_queue;
-		exec.address = batch_addr;
-		xe_exec(fd, &exec);
-
-		if (flags & WAIT_ATOMIC)
-			xe_wait_ufence(fd, &wait[i].exec_sync, USER_FENCE_VALUE,
-				       NULL, ONE_SEC);
-		__atomic_add_fetch(ptr, 1, __ATOMIC_SEQ_CST);
-	}
-
-	xe_wait_ufence(fd, &wait[n_atomic - 1].exec_sync, USER_FENCE_VALUE,
-		       NULL, ONE_SEC);
-	igt_assert(*ptr == n_atomic * 2);
-
-	sync[0].addr = to_user_pointer(&wait[wait_idx].vm_sync);
-	xe_vm_unbind_async(fd, vm, 0, 0, addr, bo_size, sync, 1);
-	xe_wait_ufence(fd, &wait[wait_idx++].vm_sync, USER_FENCE_VALUE, NULL,
-		       ONE_SEC);
-
-	sync[0].addr = to_user_pointer(&wait[wait_idx].vm_sync);
-	xe_vm_unbind_async(fd, vm, 0, 0, addr_wait, bo_size, sync, 1);
-	xe_wait_ufence(fd, &wait[wait_idx++].vm_sync, USER_FENCE_VALUE, NULL,
-		       ONE_SEC);
-
-	xe_exec_queue_destroy(fd, exec_queue);
-	munmap(data, bo_size);
-	munmap(wait, bo_size);
-	gem_close(fd, bo);
-	gem_close(fd, bo_wait);
-	xe_vm_destroy(fd, vm);
-}
-
 igt_main
 {
 	struct drm_xe_engine_class_instance *hwe;
@@ -546,22 +406,6 @@ igt_main
 					  s->flags);
 	}
 
-	igt_subtest("atomic-once")
-		xe_for_each_hw_engine(fd, hwe)
-			test_atomic(fd, hwe, 1, 0);
-
-	igt_subtest("atomic-once-wait")
-		xe_for_each_hw_engine(fd, hwe)
-			test_atomic(fd, hwe, 1, WAIT_ATOMIC);
-
-	igt_subtest("atomic-many")
-		xe_for_each_hw_engine(fd, hwe)
-			test_atomic(fd, hwe, 8, 0);
-
-	igt_subtest("atomic-many-wait")
-		xe_for_each_hw_engine(fd, hwe)
-			test_atomic(fd, hwe, 8, WAIT_ATOMIC);
-
 	igt_fixture
 		drm_close_driver(fd);
 }
-- 
2.34.1

Re: [igt-dev] [PATCH v1 3/7] drm-uapi/xe: Kill VM_MADVISE IOCTL and the atomic tests

[Matthew Brost]

On Fri, Nov 10, 2023 at 03:52:07PM +0000, Francois Dugast wrote:
> From: Rodrigo Vivi <rodrigo.vivi@intel.com>
> 
> Align with commit ("drm/xe/uapi: Kill VM_MADVISE IOCTL").
> 
> Cc: Francois Dugast <francois.dugast@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Francois Dugast <francois.dugast@intel.com>

Reviewed-by: Matthew Brost <matthew.brost@intel.com>

> ---
>  include/drm-uapi/xe_drm.h        |  92 ++--------------
>  lib/xe/xe_ioctl.c                |  14 ---
>  lib/xe/xe_ioctl.h                |   2 -
>  tests/intel/xe_exec_fault_mode.c | 174 ++-----------------------------
>  4 files changed, 20 insertions(+), 262 deletions(-)
> 
> diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h
> index 8a18e1726..1d8dc1b9c 100644
> --- a/include/drm-uapi/xe_drm.h
> +++ b/include/drm-uapi/xe_drm.h
> @@ -103,28 +103,26 @@ struct xe_user_extension {
>  #define DRM_XE_VM_CREATE		0x03
>  #define DRM_XE_VM_DESTROY		0x04
>  #define DRM_XE_VM_BIND			0x05
> -#define DRM_XE_EXEC_QUEUE_CREATE		0x06
> -#define DRM_XE_EXEC_QUEUE_DESTROY		0x07
> -#define DRM_XE_EXEC			0x08
> +#define DRM_XE_EXEC			0x06
> +#define DRM_XE_EXEC_QUEUE_CREATE	0x07
> +#define DRM_XE_EXEC_QUEUE_DESTROY	0x08
>  #define DRM_XE_EXEC_QUEUE_SET_PROPERTY	0x09
> -#define DRM_XE_WAIT_USER_FENCE		0x0a
> -#define DRM_XE_VM_MADVISE		0x0b
> -#define DRM_XE_EXEC_QUEUE_GET_PROPERTY	0x0c
> -
> +#define DRM_XE_EXEC_QUEUE_GET_PROPERTY	0x0a
> +#define DRM_XE_WAIT_USER_FENCE		0x0b
>  /* Must be kept compact -- no holes */
> +
>  #define DRM_IOCTL_XE_DEVICE_QUERY		DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_DEVICE_QUERY, struct drm_xe_device_query)
>  #define DRM_IOCTL_XE_GEM_CREATE			DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_GEM_CREATE, struct drm_xe_gem_create)
>  #define DRM_IOCTL_XE_GEM_MMAP_OFFSET		DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_GEM_MMAP_OFFSET, struct drm_xe_gem_mmap_offset)
>  #define DRM_IOCTL_XE_VM_CREATE			DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_VM_CREATE, struct drm_xe_vm_create)
> -#define DRM_IOCTL_XE_VM_DESTROY			 DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_DESTROY, struct drm_xe_vm_destroy)
> -#define DRM_IOCTL_XE_VM_BIND			 DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_BIND, struct drm_xe_vm_bind)
> +#define DRM_IOCTL_XE_VM_DESTROY			DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_DESTROY, struct drm_xe_vm_destroy)
> +#define DRM_IOCTL_XE_VM_BIND			DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_BIND, struct drm_xe_vm_bind)
> +#define DRM_IOCTL_XE_EXEC			DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC, struct drm_xe_exec)
>  #define DRM_IOCTL_XE_EXEC_QUEUE_CREATE		DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_CREATE, struct drm_xe_exec_queue_create)
> +#define DRM_IOCTL_XE_EXEC_QUEUE_DESTROY		DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_DESTROY, struct drm_xe_exec_queue_destroy)
> +#define DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY	DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_SET_PROPERTY, struct drm_xe_exec_queue_set_property)
>  #define DRM_IOCTL_XE_EXEC_QUEUE_GET_PROPERTY	DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_GET_PROPERTY, struct drm_xe_exec_queue_get_property)
> -#define DRM_IOCTL_XE_EXEC_QUEUE_DESTROY		 DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_DESTROY, struct drm_xe_exec_queue_destroy)
> -#define DRM_IOCTL_XE_EXEC			 DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC, struct drm_xe_exec)
> -#define DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY	 DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_SET_PROPERTY, struct drm_xe_exec_queue_set_property)
>  #define DRM_IOCTL_XE_WAIT_USER_FENCE		DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence)
> -#define DRM_IOCTL_XE_VM_MADVISE			 DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_MADVISE, struct drm_xe_vm_madvise)
>  
>  /** struct drm_xe_engine_class_instance - instance of an engine class */
>  struct drm_xe_engine_class_instance {
> @@ -978,74 +976,6 @@ struct drm_xe_wait_user_fence {
>  	__u64 reserved[2];
>  };
>  
> -struct drm_xe_vm_madvise {
> -	/** @extensions: Pointer to the first extension struct, if any */
> -	__u64 extensions;
> -
> -	/** @vm_id: The ID VM in which the VMA exists */
> -	__u32 vm_id;
> -
> -	/** @pad: MBZ */
> -	__u32 pad;
> -
> -	/** @range: Number of bytes in the VMA */
> -	__u64 range;
> -
> -	/** @addr: Address of the VMA to operation on */
> -	__u64 addr;
> -
> -	/*
> -	 * Setting the preferred location will trigger a migrate of the VMA
> -	 * backing store to new location if the backing store is already
> -	 * allocated.
> -	 *
> -	 * For DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS usage, see enum
> -	 * drm_xe_memory_class.
> -	 */
> -#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS	0
> -#define DRM_XE_VM_MADVISE_PREFERRED_GT		1
> -	/*
> -	 * In this case lower 32 bits are mem class, upper 32 are GT.
> -	 * Combination provides a single IOCTL plus migrate VMA to preferred
> -	 * location.
> -	 */
> -#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS_GT	2
> -	/*
> -	 * The CPU will do atomic memory operations to this VMA. Must be set on
> -	 * some devices for atomics to behave correctly.
> -	 */
> -#define DRM_XE_VM_MADVISE_CPU_ATOMIC		3
> -	/*
> -	 * The device will do atomic memory operations to this VMA. Must be set
> -	 * on some devices for atomics to behave correctly.
> -	 */
> -#define DRM_XE_VM_MADVISE_DEVICE_ATOMIC		4
> -	/*
> -	 * Priority WRT to eviction (moving from preferred memory location due
> -	 * to memory pressure). The lower the priority, the more likely to be
> -	 * evicted.
> -	 */
> -#define DRM_XE_VM_MADVISE_PRIORITY		5
> -#define		DRM_XE_VMA_PRIORITY_LOW		0
> -		/* Default */
> -#define		DRM_XE_VMA_PRIORITY_NORMAL	1
> -		/* Must be user with elevated privileges */
> -#define		DRM_XE_VMA_PRIORITY_HIGH	2
> -	/* Pin the VMA in memory, must be user with elevated privileges */
> -#define DRM_XE_VM_MADVISE_PIN			6
> -	/** @property: property to set */
> -	__u32 property;
> -
> -	/** @pad2: MBZ */
> -	__u32 pad2;
> -
> -	/** @value: property value */
> -	__u64 value;
> -
> -	/** @reserved: Reserved */
> -	__u64 reserved[2];
> -};
> -
>  /**
>   * DOC: XE PMU event config IDs
>   *
> diff --git a/lib/xe/xe_ioctl.c b/lib/xe/xe_ioctl.c
> index 895e3bd4e..c4077801e 100644
> --- a/lib/xe/xe_ioctl.c
> +++ b/lib/xe/xe_ioctl.c
> @@ -475,17 +475,3 @@ void xe_force_gt_reset(int fd, int gt)
>  		 minor(st.st_rdev), gt);
>  	system(reset_string);
>  }
> -
> -void xe_vm_madvise(int fd, uint32_t vm, uint64_t addr, uint64_t size,
> -		   uint32_t property, uint32_t value)
> -{
> -	struct drm_xe_vm_madvise madvise = {
> -		.vm_id = vm,
> -		.range = size,
> -		.addr = addr,
> -		.property = property,
> -		.value = value,
> -	};
> -
> -	igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_VM_MADVISE, &madvise), 0);
> -}
> diff --git a/lib/xe/xe_ioctl.h b/lib/xe/xe_ioctl.h
> index a8dbcf376..d9c97bf22 100644
> --- a/lib/xe/xe_ioctl.h
> +++ b/lib/xe/xe_ioctl.h
> @@ -90,7 +90,5 @@ int64_t xe_wait_ufence_abstime(int fd, uint64_t *addr, uint64_t value,
>  			       struct drm_xe_engine_class_instance *eci,
>  			       int64_t timeout);
>  void xe_force_gt_reset(int fd, int gt);
> -void xe_vm_madvise(int fd, uint32_t vm, uint64_t addr, uint64_t size,
> -		   uint32_t property, uint32_t value);
>  
>  #endif /* XE_IOCTL_H */
> diff --git a/tests/intel/xe_exec_fault_mode.c b/tests/intel/xe_exec_fault_mode.c
> index 92d8690a1..64b5c59a2 100644
> --- a/tests/intel/xe_exec_fault_mode.c
> +++ b/tests/intel/xe_exec_fault_mode.c
> @@ -23,15 +23,15 @@
>  #include <string.h>
>  
>  #define MAX_N_EXEC_QUEUES	16
> -#define USERPTR				(0x1 << 0)
> -#define REBIND				(0x1 << 1)
> -#define INVALIDATE			(0x1 << 2)
> -#define RACE				(0x1 << 3)
> -#define BIND_EXEC_QUEUE		(0x1 << 4)
> -#define WAIT_ATOMIC			(0x1 << 5)
> -#define IMMEDIATE			(0x1 << 6)
> -#define PREFETCH			(0x1 << 7)
> -#define INVALID_FAULT		(0x1 << 8)
> +
> +#define USERPTR		(0x1 << 0)
> +#define REBIND		(0x1 << 1)
> +#define INVALIDATE	(0x1 << 2)
> +#define RACE		(0x1 << 3)
> +#define BIND_EXEC_QUEUE	(0x1 << 4)
> +#define IMMEDIATE	(0x1 << 5)
> +#define PREFETCH	(0x1 << 6)
> +#define INVALID_FAULT	(0x1 << 7)
>  
>  /**
>   * SUBTEST: once-%s
> @@ -317,146 +317,6 @@ test_exec(int fd, struct drm_xe_engine_class_instance *eci,
>  		close(map_fd);
>  }
>  
> -#define   MI_ATOMIC_INLINE_DATA         (1 << 18)
> -#define   MI_ATOMIC_ADD                 (0x7 << 8)
> -
> -/**
> - * SUBTEST: atomic-once
> - * Description: Run atomic fault mode test only once
> - * Test category: functionality test
> - *
> - * SUBTEST: atomic-once-wait
> - * Description: Run atomic wait fault mode test once
> - * Test category: functionality test
> - *
> - * SUBTEST: atomic-many
> - * Description: Run atomic fault mode test many times
> - * Description: atomic many
> - * Test category: functionality test
> - *
> - * SUBTEST: atomic-many-wait
> - * Description: Run atomic wait fault mode test many times
> - * Test category: functionality test
> - *
> - */
> -static void
> -test_atomic(int fd, struct drm_xe_engine_class_instance *eci,
> -	    int n_atomic, unsigned int flags)
> -{
> -	uint32_t vm;
> -	uint64_t addr = 0x1a0000, addr_wait;
> -#define USER_FENCE_VALUE	0xdeadbeefdeadbeefull
> -	struct drm_xe_sync sync[1] = {
> -		{ .flags = DRM_XE_SYNC_USER_FENCE | DRM_XE_SYNC_SIGNAL,
> -	          .timeline_value = USER_FENCE_VALUE },
> -	};
> -	struct drm_xe_exec exec = {
> -		.num_batch_buffer = 1,
> -		.num_syncs = 1,
> -		.syncs = to_user_pointer(sync),
> -	};
> -	uint32_t exec_queue;
> -	size_t bo_size;
> -	uint32_t bo, bo_wait;
> -	struct {
> -		uint32_t batch[16];
> -		uint64_t pad;
> -		uint64_t vm_sync;
> -		uint64_t exec_sync;
> -		uint32_t data;
> -	} *data;
> -	struct {
> -		uint32_t batch[16];
> -		uint64_t pad;
> -		uint64_t vm_sync;
> -		uint64_t exec_sync;
> -		uint32_t data;
> -	} *wait;
> -	uint32_t *ptr;
> -	int i, b, wait_idx = 0;
> -
> -	vm = xe_vm_create(fd, DRM_XE_VM_CREATE_ASYNC_DEFAULT |
> -			  DRM_XE_VM_CREATE_FAULT_MODE, 0);
> -	bo_size = sizeof(*data) * n_atomic;
> -	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
> -			xe_get_default_alignment(fd));
> -	addr_wait = addr + bo_size;
> -
> -	bo = xe_bo_create_flags(fd, vm, bo_size,
> -				all_memory_regions(fd) |
> -				visible_vram_if_possible(fd, 0));
> -	bo_wait = xe_bo_create_flags(fd, vm, bo_size,
> -				     visible_vram_if_possible(fd, eci->gt_id));
> -	data = xe_bo_map(fd, bo, bo_size);
> -	wait = xe_bo_map(fd, bo_wait, bo_size);
> -	ptr = &data[0].data;
> -	memset(data, 0, bo_size);
> -	memset(wait, 0, bo_size);
> -
> -	exec_queue = xe_exec_queue_create(fd, vm, eci, 0);
> -
> -	sync[0].addr = to_user_pointer(&wait[wait_idx].vm_sync);
> -	xe_vm_bind_async(fd, vm, 0, bo, 0, addr, bo_size, sync, 1);
> -	xe_wait_ufence(fd, &wait[wait_idx++].vm_sync, USER_FENCE_VALUE, NULL,
> -		       ONE_SEC);
> -
> -	sync[0].addr = to_user_pointer(&wait[wait_idx].vm_sync);
> -	xe_vm_bind_async(fd, vm, 0, bo_wait, 0, addr_wait, bo_size, sync, 1);
> -	xe_wait_ufence(fd, &wait[wait_idx++].vm_sync, USER_FENCE_VALUE, NULL,
> -		       ONE_SEC);
> -
> -	xe_vm_madvise(fd, vm, addr, bo_size, DRM_XE_VM_MADVISE_CPU_ATOMIC, 1);
> -	xe_vm_madvise(fd, vm, addr, bo_size, DRM_XE_VM_MADVISE_DEVICE_ATOMIC, 1);
> -
> -	for (i = 0; i < n_atomic; i++) {
> -		uint64_t batch_offset = (char *)&data[i].batch - (char *)data;
> -		uint64_t batch_addr = addr + batch_offset;
> -		uint64_t sdi_offset = (char *)&data[0].data - (char *)data;
> -		uint64_t sdi_addr = addr + sdi_offset;
> -
> -		b = 0;
> -		data[i].batch[b++] = MI_ATOMIC | MI_ATOMIC_INLINE_DATA |
> -			MI_ATOMIC_ADD;
> -		data[i].batch[b++] = sdi_addr;
> -		data[i].batch[b++] = sdi_addr >> 32;
> -		data[i].batch[b++] = 1;
> -		data[i].batch[b++] = MI_BATCH_BUFFER_END;
> -
> -		sync[0].addr = addr_wait +
> -			(char *)&wait[i].exec_sync - (char *)wait;
> -
> -		exec.exec_queue_id = exec_queue;
> -		exec.address = batch_addr;
> -		xe_exec(fd, &exec);
> -
> -		if (flags & WAIT_ATOMIC)
> -			xe_wait_ufence(fd, &wait[i].exec_sync, USER_FENCE_VALUE,
> -				       NULL, ONE_SEC);
> -		__atomic_add_fetch(ptr, 1, __ATOMIC_SEQ_CST);
> -	}
> -
> -	xe_wait_ufence(fd, &wait[n_atomic - 1].exec_sync, USER_FENCE_VALUE,
> -		       NULL, ONE_SEC);
> -	igt_assert(*ptr == n_atomic * 2);
> -
> -	sync[0].addr = to_user_pointer(&wait[wait_idx].vm_sync);
> -	xe_vm_unbind_async(fd, vm, 0, 0, addr, bo_size, sync, 1);
> -	xe_wait_ufence(fd, &wait[wait_idx++].vm_sync, USER_FENCE_VALUE, NULL,
> -		       ONE_SEC);
> -
> -	sync[0].addr = to_user_pointer(&wait[wait_idx].vm_sync);
> -	xe_vm_unbind_async(fd, vm, 0, 0, addr_wait, bo_size, sync, 1);
> -	xe_wait_ufence(fd, &wait[wait_idx++].vm_sync, USER_FENCE_VALUE, NULL,
> -		       ONE_SEC);
> -
> -	xe_exec_queue_destroy(fd, exec_queue);
> -	munmap(data, bo_size);
> -	munmap(wait, bo_size);
> -	gem_close(fd, bo);
> -	gem_close(fd, bo_wait);
> -	xe_vm_destroy(fd, vm);
> -}
> -
>  igt_main
>  {
>  	struct drm_xe_engine_class_instance *hwe;
> @@ -546,22 +406,6 @@ igt_main
>  					  s->flags);
>  	}
>  
> -	igt_subtest("atomic-once")
> -		xe_for_each_hw_engine(fd, hwe)
> -			test_atomic(fd, hwe, 1, 0);
> -
> -	igt_subtest("atomic-once-wait")
> -		xe_for_each_hw_engine(fd, hwe)
> -			test_atomic(fd, hwe, 1, WAIT_ATOMIC);
> -
> -	igt_subtest("atomic-many")
> -		xe_for_each_hw_engine(fd, hwe)
> -			test_atomic(fd, hwe, 8, 0);
> -
> -	igt_subtest("atomic-many-wait")
> -		xe_for_each_hw_engine(fd, hwe)
> -			test_atomic(fd, hwe, 8, WAIT_ATOMIC);
> -
>  	igt_fixture
>  		drm_close_driver(fd);
>  }
> -- 
> 2.34.1
> 

[igt-dev] [PATCH v1 4/7] drm-uapi/xe: Remove unused inaccessible memory region

[Francois Dugast]

Align with commit ("drm/xe/uapi: Remove unused inaccessible memory region")

Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
 include/drm-uapi/xe_drm.h | 5 -----
 tests/intel/xe_query.c    | 2 --
 2 files changed, 7 deletions(-)

diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h
index 1d8dc1b9c..68317a82e 100644
--- a/include/drm-uapi/xe_drm.h
+++ b/include/drm-uapi/xe_drm.h
@@ -360,11 +360,6 @@ struct drm_xe_query_gt {
 	 * they live on a different GPU/Tile.
 	 */
 	__u64 slow_mem_regions;
-	/**
-	 * @inaccessible_mem_regions: Bit mask of instances from
-	 * drm_xe_query_mem_usage that is not accessible by this GT at all.
-	 */
-	__u64 inaccessible_mem_regions;
 	/** @reserved: Reserved */
 	__u64 reserved[8];
 };
diff --git a/tests/intel/xe_query.c b/tests/intel/xe_query.c
index 2cff75414..e6258ff01 100644
--- a/tests/intel/xe_query.c
+++ b/tests/intel/xe_query.c
@@ -285,8 +285,6 @@ test_query_gt_list(int fd)
 		       gt_list->gt_list[i].native_mem_regions);
 		igt_info("slow_mem_regions: 0x%016llx\n",
 		       gt_list->gt_list[i].slow_mem_regions);
-		igt_info("inaccessible_mem_regions: 0x%016llx\n",
-		       gt_list->gt_list[i].inaccessible_mem_regions);
 	}
 }
 
-- 
2.34.1

Re: [igt-dev] [PATCH v1 4/7] drm-uapi/xe: Remove unused inaccessible memory region

[Rodrigo Vivi]

On Fri, Nov 10, 2023 at 03:52:08PM +0000, Francois Dugast wrote:
> Align with commit ("drm/xe/uapi: Remove unused inaccessible memory region")
> 
> Signed-off-by: Francois Dugast <francois.dugast@intel.com>


Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>


> ---
>  include/drm-uapi/xe_drm.h | 5 -----
>  tests/intel/xe_query.c    | 2 --
>  2 files changed, 7 deletions(-)
> 
> diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h
> index 1d8dc1b9c..68317a82e 100644
> --- a/include/drm-uapi/xe_drm.h
> +++ b/include/drm-uapi/xe_drm.h
> @@ -360,11 +360,6 @@ struct drm_xe_query_gt {
>  	 * they live on a different GPU/Tile.
>  	 */
>  	__u64 slow_mem_regions;
> -	/**
> -	 * @inaccessible_mem_regions: Bit mask of instances from
> -	 * drm_xe_query_mem_usage that is not accessible by this GT at all.
> -	 */
> -	__u64 inaccessible_mem_regions;
>  	/** @reserved: Reserved */
>  	__u64 reserved[8];
>  };
> diff --git a/tests/intel/xe_query.c b/tests/intel/xe_query.c
> index 2cff75414..e6258ff01 100644
> --- a/tests/intel/xe_query.c
> +++ b/tests/intel/xe_query.c
> @@ -285,8 +285,6 @@ test_query_gt_list(int fd)
>  		       gt_list->gt_list[i].native_mem_regions);
>  		igt_info("slow_mem_regions: 0x%016llx\n",
>  		       gt_list->gt_list[i].slow_mem_regions);
> -		igt_info("inaccessible_mem_regions: 0x%016llx\n",
> -		       gt_list->gt_list[i].inaccessible_mem_regions);
>  	}
>  }
>  
> -- 
> 2.34.1
> 

[igt-dev] [PATCH v1 5/7] drm-uapi/xe: Remove unused QUERY_CONFIG_MEM_REGION_COUNT

[Francois Dugast]

Align with commit ("drm/xe/uapi: Remove unused QUERY_CONFIG_MEM_REGION_COUNT")

Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
 include/drm-uapi/xe_drm.h | 4 ++--
 tests/intel/xe_query.c    | 2 --
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h
index 68317a82e..db883fb6b 100644
--- a/include/drm-uapi/xe_drm.h
+++ b/include/drm-uapi/xe_drm.h
@@ -311,6 +311,7 @@ struct drm_xe_query_mem_usage {
  * If a query is made with a struct drm_xe_device_query where .query
  * is equal to DRM_XE_DEVICE_QUERY_CONFIG, then the reply uses
  * struct drm_xe_query_config in .data.
+ *
  */
 struct drm_xe_query_config {
 	/** @num_params: number of parameters returned in info */
@@ -325,8 +326,7 @@ struct drm_xe_query_config {
 #define XE_QUERY_CONFIG_MIN_ALIGNMENT		2
 #define XE_QUERY_CONFIG_VA_BITS			3
 #define XE_QUERY_CONFIG_GT_COUNT		4
-#define XE_QUERY_CONFIG_MEM_REGION_COUNT	5
-#define XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY	6
+#define XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY	5
 	/** @info: array of elements containing the config info */
 	__u64 info[];
 };
diff --git a/tests/intel/xe_query.c b/tests/intel/xe_query.c
index e6258ff01..66a714518 100644
--- a/tests/intel/xe_query.c
+++ b/tests/intel/xe_query.c
@@ -376,8 +376,6 @@ test_query_config(int fd)
 		config->info[XE_QUERY_CONFIG_VA_BITS]);
 	igt_info("XE_QUERY_CONFIG_GT_COUNT\t\t%llu\n",
 		config->info[XE_QUERY_CONFIG_GT_COUNT]);
-	igt_info("XE_QUERY_CONFIG_MEM_REGION_COUNT\t%llu\n",
-		config->info[XE_QUERY_CONFIG_MEM_REGION_COUNT]);
 	igt_info("XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY\t%llu\n",
 		config->info[XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY]);
 	dump_hex_debug(config, query.size);
-- 
2.34.1

Re: [igt-dev] [PATCH v1 5/7] drm-uapi/xe: Remove unused QUERY_CONFIG_MEM_REGION_COUNT

[Matthew Brost]

On Fri, Nov 10, 2023 at 03:52:09PM +0000, Francois Dugast wrote:
> Align with commit ("drm/xe/uapi: Remove unused QUERY_CONFIG_MEM_REGION_COUNT")
> 
> Signed-off-by: Francois Dugast <francois.dugast@intel.com>

Reviewed-by: Matthew Brost <matthew.brost@intel.com>

> ---
>  include/drm-uapi/xe_drm.h | 4 ++--
>  tests/intel/xe_query.c    | 2 --
>  2 files changed, 2 insertions(+), 4 deletions(-)
> 
> diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h
> index 68317a82e..db883fb6b 100644
> --- a/include/drm-uapi/xe_drm.h
> +++ b/include/drm-uapi/xe_drm.h
> @@ -311,6 +311,7 @@ struct drm_xe_query_mem_usage {
>   * If a query is made with a struct drm_xe_device_query where .query
>   * is equal to DRM_XE_DEVICE_QUERY_CONFIG, then the reply uses
>   * struct drm_xe_query_config in .data.
> + *
>   */
>  struct drm_xe_query_config {
>  	/** @num_params: number of parameters returned in info */
> @@ -325,8 +326,7 @@ struct drm_xe_query_config {
>  #define XE_QUERY_CONFIG_MIN_ALIGNMENT		2
>  #define XE_QUERY_CONFIG_VA_BITS			3
>  #define XE_QUERY_CONFIG_GT_COUNT		4
> -#define XE_QUERY_CONFIG_MEM_REGION_COUNT	5
> -#define XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY	6
> +#define XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY	5
>  	/** @info: array of elements containing the config info */
>  	__u64 info[];
>  };
> diff --git a/tests/intel/xe_query.c b/tests/intel/xe_query.c
> index e6258ff01..66a714518 100644
> --- a/tests/intel/xe_query.c
> +++ b/tests/intel/xe_query.c
> @@ -376,8 +376,6 @@ test_query_config(int fd)
>  		config->info[XE_QUERY_CONFIG_VA_BITS]);
>  	igt_info("XE_QUERY_CONFIG_GT_COUNT\t\t%llu\n",
>  		config->info[XE_QUERY_CONFIG_GT_COUNT]);
> -	igt_info("XE_QUERY_CONFIG_MEM_REGION_COUNT\t%llu\n",
> -		config->info[XE_QUERY_CONFIG_MEM_REGION_COUNT]);
>  	igt_info("XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY\t%llu\n",
>  		config->info[XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY]);
>  	dump_hex_debug(config, query.size);
> -- 
> 2.34.1
> 

[igt-dev] [PATCH v1 6/7] drm-uapi/xe: Remove unused QUERY_CONFIG_GT_COUNT

[Francois Dugast]

Align with commit ("drm/xe/uapi: Remove unused QUERY_CONFIG_GT_COUNT")

Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
 include/drm-uapi/xe_drm.h |  3 +--
 lib/xe/xe_query.c         | 11 +++++------
 lib/xe/xe_query.h         |  3 ---
 tests/intel/xe_debugfs.c  |  2 --
 tests/intel/xe_query.c    |  2 --
 5 files changed, 6 insertions(+), 15 deletions(-)

diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h
index db883fb6b..0f4c83e4c 100644
--- a/include/drm-uapi/xe_drm.h
+++ b/include/drm-uapi/xe_drm.h
@@ -325,8 +325,7 @@ struct drm_xe_query_config {
 	#define XE_QUERY_CONFIG_FLAGS_HAS_VRAM		(0x1 << 0)
 #define XE_QUERY_CONFIG_MIN_ALIGNMENT		2
 #define XE_QUERY_CONFIG_VA_BITS			3
-#define XE_QUERY_CONFIG_GT_COUNT		4
-#define XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY	5
+#define XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY	4
 	/** @info: array of elements containing the config info */
 	__u64 info[];
 };
diff --git a/lib/xe/xe_query.c b/lib/xe/xe_query.c
index 986a3a0c1..06d216cf9 100644
--- a/lib/xe/xe_query.c
+++ b/lib/xe/xe_query.c
@@ -249,16 +249,15 @@ struct xe_device *xe_device_get(int fd)
 
 	xe_dev->fd = fd;
 	xe_dev->config = xe_query_config_new(fd);
-	xe_dev->number_gt = xe_dev->config->info[XE_QUERY_CONFIG_GT_COUNT];
 	xe_dev->va_bits = xe_dev->config->info[XE_QUERY_CONFIG_VA_BITS];
 	xe_dev->dev_id = xe_dev->config->info[XE_QUERY_CONFIG_REV_AND_DEVICE_ID] & 0xffff;
 	xe_dev->gt_list = xe_query_gt_list_new(fd);
 	xe_dev->memory_regions = __memory_regions(xe_dev->gt_list);
 	xe_dev->hw_engines = xe_query_engines_new(fd, &xe_dev->number_hw_engines);
 	xe_dev->mem_usage = xe_query_mem_usage_new(fd);
-	xe_dev->vram_size = calloc(xe_dev->number_gt, sizeof(*xe_dev->vram_size));
-	xe_dev->visible_vram_size = calloc(xe_dev->number_gt, sizeof(*xe_dev->visible_vram_size));
-	for (int gt = 0; gt < xe_dev->number_gt; gt++) {
+	xe_dev->vram_size = calloc(xe_dev->gt_list->num_gt, sizeof(*xe_dev->vram_size));
+	xe_dev->visible_vram_size = calloc(xe_dev->gt_list->num_gt, sizeof(*xe_dev->visible_vram_size));
+	for (int gt = 0; gt < xe_dev->gt_list->num_gt; gt++) {
 		xe_dev->vram_size[gt] = gt_vram_size(xe_dev->mem_usage,
 						     xe_dev->gt_list, gt);
 		xe_dev->visible_vram_size[gt] =
@@ -358,7 +357,7 @@ _TYPE _NAME(int fd)			\
  *
  * Return number of gt_list for xe device fd.
  */
-xe_dev_FN(xe_number_gt, number_gt, unsigned int);
+xe_dev_FN(xe_number_gt, gt_list->num_gt, unsigned int);
 
 /**
  * all_memory_regions:
@@ -394,7 +393,7 @@ uint64_t vram_memory(int fd, int gt)
 
 	xe_dev = find_in_cache(fd);
 	igt_assert(xe_dev);
-	igt_assert(gt >= 0 && gt < xe_dev->number_gt);
+	igt_assert(gt >= 0 && gt < xe_dev->gt_list->num_gt);
 
 	return xe_has_vram(fd) ? native_region_for_gt(xe_dev->gt_list, gt) : 0;
 }
diff --git a/lib/xe/xe_query.h b/lib/xe/xe_query.h
index 7c0849bc1..fc81cc263 100644
--- a/lib/xe/xe_query.h
+++ b/lib/xe/xe_query.h
@@ -27,9 +27,6 @@ struct xe_device {
 	/** @gt_list: gt info */
 	struct drm_xe_query_gt_list *gt_list;
 
-	/** @number_gt: number of gt */
-	unsigned int number_gt;
-
 	/** @gt_list: bitmask of all memory regions */
 	uint64_t memory_regions;
 
diff --git a/tests/intel/xe_debugfs.c b/tests/intel/xe_debugfs.c
index e5bbb364c..4104bf5ae 100644
--- a/tests/intel/xe_debugfs.c
+++ b/tests/intel/xe_debugfs.c
@@ -121,8 +121,6 @@ test_base(int fd, struct drm_xe_query_config *config)
 	igt_assert(igt_debugfs_search(fd, "info", reference));
 
 	igt_assert(igt_debugfs_exists(fd, "gt0", O_RDONLY));
-	if (config->info[XE_QUERY_CONFIG_GT_COUNT] > 1)
-		igt_assert(igt_debugfs_exists(fd, "gt1", O_RDONLY));
 
 	igt_assert(igt_debugfs_exists(fd, "gtt_mm", O_RDONLY));
 	igt_debugfs_dump(fd, "gtt_mm");
diff --git a/tests/intel/xe_query.c b/tests/intel/xe_query.c
index 66a714518..cf966d40d 100644
--- a/tests/intel/xe_query.c
+++ b/tests/intel/xe_query.c
@@ -374,8 +374,6 @@ test_query_config(int fd)
 		config->info[XE_QUERY_CONFIG_MIN_ALIGNMENT]);
 	igt_info("XE_QUERY_CONFIG_VA_BITS\t\t\t%llu\n",
 		config->info[XE_QUERY_CONFIG_VA_BITS]);
-	igt_info("XE_QUERY_CONFIG_GT_COUNT\t\t%llu\n",
-		config->info[XE_QUERY_CONFIG_GT_COUNT]);
 	igt_info("XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY\t%llu\n",
 		config->info[XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY]);
 	dump_hex_debug(config, query.size);
-- 
2.34.1

Re: [igt-dev] [PATCH v1 6/7] drm-uapi/xe: Remove unused QUERY_CONFIG_GT_COUNT

[Rodrigo Vivi]

On Fri, Nov 10, 2023 at 03:52:10PM +0000, Francois Dugast wrote:
> Align with commit ("drm/xe/uapi: Remove unused QUERY_CONFIG_GT_COUNT")
> 
> Signed-off-by: Francois Dugast <francois.dugast@intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  include/drm-uapi/xe_drm.h |  3 +--
>  lib/xe/xe_query.c         | 11 +++++------
>  lib/xe/xe_query.h         |  3 ---
>  tests/intel/xe_debugfs.c  |  2 --
>  tests/intel/xe_query.c    |  2 --
>  5 files changed, 6 insertions(+), 15 deletions(-)
> 
> diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h
> index db883fb6b..0f4c83e4c 100644
> --- a/include/drm-uapi/xe_drm.h
> +++ b/include/drm-uapi/xe_drm.h
> @@ -325,8 +325,7 @@ struct drm_xe_query_config {
>  	#define XE_QUERY_CONFIG_FLAGS_HAS_VRAM		(0x1 << 0)
>  #define XE_QUERY_CONFIG_MIN_ALIGNMENT		2
>  #define XE_QUERY_CONFIG_VA_BITS			3
> -#define XE_QUERY_CONFIG_GT_COUNT		4
> -#define XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY	5
> +#define XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY	4
>  	/** @info: array of elements containing the config info */
>  	__u64 info[];
>  };
> diff --git a/lib/xe/xe_query.c b/lib/xe/xe_query.c
> index 986a3a0c1..06d216cf9 100644
> --- a/lib/xe/xe_query.c
> +++ b/lib/xe/xe_query.c
> @@ -249,16 +249,15 @@ struct xe_device *xe_device_get(int fd)
>  
>  	xe_dev->fd = fd;
>  	xe_dev->config = xe_query_config_new(fd);
> -	xe_dev->number_gt = xe_dev->config->info[XE_QUERY_CONFIG_GT_COUNT];
>  	xe_dev->va_bits = xe_dev->config->info[XE_QUERY_CONFIG_VA_BITS];
>  	xe_dev->dev_id = xe_dev->config->info[XE_QUERY_CONFIG_REV_AND_DEVICE_ID] & 0xffff;
>  	xe_dev->gt_list = xe_query_gt_list_new(fd);
>  	xe_dev->memory_regions = __memory_regions(xe_dev->gt_list);
>  	xe_dev->hw_engines = xe_query_engines_new(fd, &xe_dev->number_hw_engines);
>  	xe_dev->mem_usage = xe_query_mem_usage_new(fd);
> -	xe_dev->vram_size = calloc(xe_dev->number_gt, sizeof(*xe_dev->vram_size));
> -	xe_dev->visible_vram_size = calloc(xe_dev->number_gt, sizeof(*xe_dev->visible_vram_size));
> -	for (int gt = 0; gt < xe_dev->number_gt; gt++) {
> +	xe_dev->vram_size = calloc(xe_dev->gt_list->num_gt, sizeof(*xe_dev->vram_size));
> +	xe_dev->visible_vram_size = calloc(xe_dev->gt_list->num_gt, sizeof(*xe_dev->visible_vram_size));
> +	for (int gt = 0; gt < xe_dev->gt_list->num_gt; gt++) {
>  		xe_dev->vram_size[gt] = gt_vram_size(xe_dev->mem_usage,
>  						     xe_dev->gt_list, gt);
>  		xe_dev->visible_vram_size[gt] =
> @@ -358,7 +357,7 @@ _TYPE _NAME(int fd)			\
>   *
>   * Return number of gt_list for xe device fd.
>   */
> -xe_dev_FN(xe_number_gt, number_gt, unsigned int);
> +xe_dev_FN(xe_number_gt, gt_list->num_gt, unsigned int);
>  
>  /**
>   * all_memory_regions:
> @@ -394,7 +393,7 @@ uint64_t vram_memory(int fd, int gt)
>  
>  	xe_dev = find_in_cache(fd);
>  	igt_assert(xe_dev);
> -	igt_assert(gt >= 0 && gt < xe_dev->number_gt);
> +	igt_assert(gt >= 0 && gt < xe_dev->gt_list->num_gt);
>  
>  	return xe_has_vram(fd) ? native_region_for_gt(xe_dev->gt_list, gt) : 0;
>  }
> diff --git a/lib/xe/xe_query.h b/lib/xe/xe_query.h
> index 7c0849bc1..fc81cc263 100644
> --- a/lib/xe/xe_query.h
> +++ b/lib/xe/xe_query.h
> @@ -27,9 +27,6 @@ struct xe_device {
>  	/** @gt_list: gt info */
>  	struct drm_xe_query_gt_list *gt_list;
>  
> -	/** @number_gt: number of gt */
> -	unsigned int number_gt;
> -
>  	/** @gt_list: bitmask of all memory regions */
>  	uint64_t memory_regions;
>  
> diff --git a/tests/intel/xe_debugfs.c b/tests/intel/xe_debugfs.c
> index e5bbb364c..4104bf5ae 100644
> --- a/tests/intel/xe_debugfs.c
> +++ b/tests/intel/xe_debugfs.c
> @@ -121,8 +121,6 @@ test_base(int fd, struct drm_xe_query_config *config)
>  	igt_assert(igt_debugfs_search(fd, "info", reference));
>  
>  	igt_assert(igt_debugfs_exists(fd, "gt0", O_RDONLY));
> -	if (config->info[XE_QUERY_CONFIG_GT_COUNT] > 1)
> -		igt_assert(igt_debugfs_exists(fd, "gt1", O_RDONLY));
>  
>  	igt_assert(igt_debugfs_exists(fd, "gtt_mm", O_RDONLY));
>  	igt_debugfs_dump(fd, "gtt_mm");
> diff --git a/tests/intel/xe_query.c b/tests/intel/xe_query.c
> index 66a714518..cf966d40d 100644
> --- a/tests/intel/xe_query.c
> +++ b/tests/intel/xe_query.c
> @@ -374,8 +374,6 @@ test_query_config(int fd)
>  		config->info[XE_QUERY_CONFIG_MIN_ALIGNMENT]);
>  	igt_info("XE_QUERY_CONFIG_VA_BITS\t\t\t%llu\n",
>  		config->info[XE_QUERY_CONFIG_VA_BITS]);
> -	igt_info("XE_QUERY_CONFIG_GT_COUNT\t\t%llu\n",
> -		config->info[XE_QUERY_CONFIG_GT_COUNT]);
>  	igt_info("XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY\t%llu\n",
>  		config->info[XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY]);
>  	dump_hex_debug(config, query.size);
> -- 
> 2.34.1
> 

[igt-dev] [PATCH v1 7/7] drm-uapi/xe: Drop interrupt pmu event

[Francois Dugast]

Align with kernel commit ("drm/xe/pmu: Drop interrupt pmu event")

Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
 include/drm-uapi/xe_drm.h | 13 ++++++-------
 1 file changed, 6 insertions(+), 7 deletions(-)

diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h
index 0f4c83e4c..babfaf0fe 100644
--- a/include/drm-uapi/xe_drm.h
+++ b/include/drm-uapi/xe_drm.h
@@ -977,7 +977,7 @@ struct drm_xe_wait_user_fence {
  * in 'struct perf_event_attr' as part of perf_event_open syscall to read a
  * particular event.
  *
- * For example to open the XE_PMU_INTERRUPTS(0):
+ * For example to open the XE_PMU_RENDER_GROUP_BUSY(0):
  *
  * .. code-block:: C
  *
@@ -991,7 +991,7 @@ struct drm_xe_wait_user_fence {
  *	attr.read_format = PERF_FORMAT_TOTAL_TIME_ENABLED;
  *	attr.use_clockid = 1;
  *	attr.clockid = CLOCK_MONOTONIC;
- *	attr.config = XE_PMU_INTERRUPTS(0);
+ *	attr.config = XE_PMU_RENDER_GROUP_BUSY(0);
  *
  *	fd = syscall(__NR_perf_event_open, &attr, -1, cpu, -1, 0);
  */
@@ -1004,11 +1004,10 @@ struct drm_xe_wait_user_fence {
 #define ___XE_PMU_OTHER(gt, x) \
 	(((__u64)(x)) | ((__u64)(gt) << __XE_PMU_GT_SHIFT))
 
-#define XE_PMU_INTERRUPTS(gt)			___XE_PMU_OTHER(gt, 0)
-#define XE_PMU_RENDER_GROUP_BUSY(gt)		___XE_PMU_OTHER(gt, 1)
-#define XE_PMU_COPY_GROUP_BUSY(gt)		___XE_PMU_OTHER(gt, 2)
-#define XE_PMU_MEDIA_GROUP_BUSY(gt)		___XE_PMU_OTHER(gt, 3)
-#define XE_PMU_ANY_ENGINE_GROUP_BUSY(gt)	___XE_PMU_OTHER(gt, 4)
+#define XE_PMU_RENDER_GROUP_BUSY(gt)		___XE_PMU_OTHER(gt, 0)
+#define XE_PMU_COPY_GROUP_BUSY(gt)		___XE_PMU_OTHER(gt, 1)
+#define XE_PMU_MEDIA_GROUP_BUSY(gt)		___XE_PMU_OTHER(gt, 2)
+#define XE_PMU_ANY_ENGINE_GROUP_BUSY(gt)	___XE_PMU_OTHER(gt, 3)
 
 #if defined(__cplusplus)
 }
-- 
2.34.1

Re: [igt-dev] [PATCH v1 7/7] drm-uapi/xe: Drop interrupt pmu event

[Rodrigo Vivi]

On Fri, Nov 10, 2023 at 03:52:11PM +0000, Francois Dugast wrote:
> Align with kernel commit ("drm/xe/pmu: Drop interrupt pmu event")
> 
> Signed-off-by: Francois Dugast <francois.dugast@intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  include/drm-uapi/xe_drm.h | 13 ++++++-------
>  1 file changed, 6 insertions(+), 7 deletions(-)
> 
> diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h
> index 0f4c83e4c..babfaf0fe 100644
> --- a/include/drm-uapi/xe_drm.h
> +++ b/include/drm-uapi/xe_drm.h
> @@ -977,7 +977,7 @@ struct drm_xe_wait_user_fence {
>   * in 'struct perf_event_attr' as part of perf_event_open syscall to read a
>   * particular event.
>   *
> - * For example to open the XE_PMU_INTERRUPTS(0):
> + * For example to open the XE_PMU_RENDER_GROUP_BUSY(0):
>   *
>   * .. code-block:: C
>   *
> @@ -991,7 +991,7 @@ struct drm_xe_wait_user_fence {
>   *	attr.read_format = PERF_FORMAT_TOTAL_TIME_ENABLED;
>   *	attr.use_clockid = 1;
>   *	attr.clockid = CLOCK_MONOTONIC;
> - *	attr.config = XE_PMU_INTERRUPTS(0);
> + *	attr.config = XE_PMU_RENDER_GROUP_BUSY(0);
>   *
>   *	fd = syscall(__NR_perf_event_open, &attr, -1, cpu, -1, 0);
>   */
> @@ -1004,11 +1004,10 @@ struct drm_xe_wait_user_fence {
>  #define ___XE_PMU_OTHER(gt, x) \
>  	(((__u64)(x)) | ((__u64)(gt) << __XE_PMU_GT_SHIFT))
>  
> -#define XE_PMU_INTERRUPTS(gt)			___XE_PMU_OTHER(gt, 0)
> -#define XE_PMU_RENDER_GROUP_BUSY(gt)		___XE_PMU_OTHER(gt, 1)
> -#define XE_PMU_COPY_GROUP_BUSY(gt)		___XE_PMU_OTHER(gt, 2)
> -#define XE_PMU_MEDIA_GROUP_BUSY(gt)		___XE_PMU_OTHER(gt, 3)
> -#define XE_PMU_ANY_ENGINE_GROUP_BUSY(gt)	___XE_PMU_OTHER(gt, 4)
> +#define XE_PMU_RENDER_GROUP_BUSY(gt)		___XE_PMU_OTHER(gt, 0)
> +#define XE_PMU_COPY_GROUP_BUSY(gt)		___XE_PMU_OTHER(gt, 1)
> +#define XE_PMU_MEDIA_GROUP_BUSY(gt)		___XE_PMU_OTHER(gt, 2)
> +#define XE_PMU_ANY_ENGINE_GROUP_BUSY(gt)	___XE_PMU_OTHER(gt, 3)
>  
>  #if defined(__cplusplus)
>  }
> -- 
> 2.34.1
> 

[igt-dev] ✗ CI.xeBAT: failure for uAPI Alignment - Remove unused features

[Patchwork]

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== Series Details ==

Series: uAPI Alignment - Remove unused features
URL   : https://patchwork.freedesktop.org/series/126279/
State : failure

== Summary ==

CI Bug Log - changes from XEIGT_7582_BAT -> XEIGTPW_10165_BAT
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with XEIGTPW_10165_BAT absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in XEIGTPW_10165_BAT, please notify your bug team (lgci.bug.filing@intel.com) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (3 -> 3)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in XEIGTPW_10165_BAT:

### IGT changes ###

#### Possible regressions ####

  * igt@xe_exec_compute_mode@twice-userptr-invalidate:
    - bat-atsm-2:         [PASS][1] -> [FAIL][2] +100 other tests fail
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7582/bat-atsm-2/igt@xe_exec_compute_mode@twice-userptr-invalidate.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10165/bat-atsm-2/igt@xe_exec_compute_mode@twice-userptr-invalidate.html

  * igt@xe_intel_bb@create-in-region:
    - bat-dg2-oem2:       [PASS][3] -> [FAIL][4] +158 other tests fail
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7582/bat-dg2-oem2/igt@xe_intel_bb@create-in-region.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10165/bat-dg2-oem2/igt@xe_intel_bb@create-in-region.html
    - bat-adlp-7:         [PASS][5] -> [FAIL][6] +130 other tests fail
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7582/bat-adlp-7/igt@xe_intel_bb@create-in-region.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10165/bat-adlp-7/igt@xe_intel_bb@create-in-region.html

  
#### Warnings ####

  * igt@kms_frontbuffer_tracking@basic:
    - bat-adlp-7:         [FAIL][7] ([Intel XE#616] / [Intel XE#750]) -> [FAIL][8]
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7582/bat-adlp-7/igt@kms_frontbuffer_tracking@basic.html
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10165/bat-adlp-7/igt@kms_frontbuffer_tracking@basic.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12:
    - bat-dg2-oem2:       [FAIL][9] ([Intel XE#400] / [Intel XE#616]) -> [FAIL][10] +2 other tests fail
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7582/bat-dg2-oem2/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12.html
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10165/bat-dg2-oem2/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * {igt@xe_create@create-execqueues-leak}:
    - bat-atsm-2:         [PASS][11] -> [WARN][12]
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7582/bat-atsm-2/igt@xe_create@create-execqueues-leak.html
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10165/bat-atsm-2/igt@xe_create@create-execqueues-leak.html
    - bat-adlp-7:         [PASS][13] -> [WARN][14]
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7582/bat-adlp-7/igt@xe_create@create-execqueues-leak.html
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10165/bat-adlp-7/igt@xe_create@create-execqueues-leak.html

  * {igt@xe_create@create-execqueues-noleak}:
    - bat-adlp-7:         [FAIL][15] ([Intel XE#524]) -> [WARN][16]
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7582/bat-adlp-7/igt@xe_create@create-execqueues-noleak.html
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10165/bat-adlp-7/igt@xe_create@create-execqueues-noleak.html
    - bat-dg2-oem2:       [PASS][17] -> [WARN][18] +1 other test warn
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7582/bat-dg2-oem2/igt@xe_create@create-execqueues-noleak.html
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10165/bat-dg2-oem2/igt@xe_create@create-execqueues-noleak.html
    - bat-atsm-2:         [FAIL][19] ([Intel XE#524]) -> [WARN][20]
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7582/bat-atsm-2/igt@xe_create@create-execqueues-noleak.html
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10165/bat-atsm-2/igt@xe_create@create-execqueues-noleak.html

  * {igt@xe_exec_basic@no-exec-bindexecqueue}:
    - bat-dg2-oem2:       [PASS][21] -> [FAIL][22] +13 other tests fail
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7582/bat-dg2-oem2/igt@xe_exec_basic@no-exec-bindexecqueue.html
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10165/bat-dg2-oem2/igt@xe_exec_basic@no-exec-bindexecqueue.html

  * {igt@xe_exec_compute_mode@twice-bindexecqueue-userptr-rebind}:
    - bat-atsm-2:         [PASS][23] -> [FAIL][24] +13 other tests fail
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7582/bat-atsm-2/igt@xe_exec_compute_mode@twice-bindexecqueue-userptr-rebind.html
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10165/bat-atsm-2/igt@xe_exec_compute_mode@twice-bindexecqueue-userptr-rebind.html

  * {igt@xe_vm@bind-execqueues-independent}:
    - bat-adlp-7:         [PASS][25] -> [FAIL][26] +11 other tests fail
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7582/bat-adlp-7/igt@xe_vm@bind-execqueues-independent.html
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10165/bat-adlp-7/igt@xe_vm@bind-execqueues-independent.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#400]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/400
  [Intel XE#524]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/524
  [Intel XE#616]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/616
  [Intel XE#750]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/750


Build changes
-------------

  * IGT: IGT_7582 -> IGTPW_10165

  IGTPW_10165: 10165
  IGT_7582: 453b9df12fbc9fff561bdb4eb97992983e74c3d4 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-485-b3890fb4386dcef68a96888141c4cc773f6241ce: b3890fb4386dcef68a96888141c4cc773f6241ce

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10165/index.html

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