* [igt-dev] [PATCH v4 i-g-t 0/2] add create-big-vram subtest
@ 2023-11-23 15:08 Marcin Bernatowicz
2023-11-23 15:08 ` [igt-dev] [PATCH v4 i-g-t 1/2] lib/xe/xe_query: xe_visible_available_vram_size helper Marcin Bernatowicz
` (4 more replies)
0 siblings, 5 replies; 12+ messages in thread
From: Marcin Bernatowicz @ 2023-11-23 15:08 UTC (permalink / raw)
To: igt-dev; +Cc: adam.miszczak, matthew.auld, jakub1.kolakowski
Validate the creation of significant Buffer Object (BO) within VRAM,
considering the entire available CPU-visible VRAM size.
Marcin Bernatowicz (2):
lib/xe/xe_query: xe_visible_available_vram_size helper
tests/intel/xe_create: create-big-vram subtest
lib/xe/xe_query.c | 57 +++++++++++++++++++-------
lib/xe/xe_query.h | 3 +-
tests/intel/xe_create.c | 84 +++++++++++++++++++++++++++++++++++++-
tests/intel/xe_evict_ccs.c | 2 +-
4 files changed, 129 insertions(+), 17 deletions(-)
--
2.31.1
^ permalink raw reply [flat|nested] 12+ messages in thread
* [igt-dev] [PATCH v4 i-g-t 1/2] lib/xe/xe_query: xe_visible_available_vram_size helper
2023-11-23 15:08 [igt-dev] [PATCH v4 i-g-t 0/2] add create-big-vram subtest Marcin Bernatowicz
@ 2023-11-23 15:08 ` Marcin Bernatowicz
2023-11-27 17:15 ` Kamil Konieczny
2023-11-23 15:08 ` [igt-dev] [PATCH v4 i-g-t 2/2] tests/intel/xe_create: create-big-vram subtest Marcin Bernatowicz
` (3 subsequent siblings)
4 siblings, 1 reply; 12+ messages in thread
From: Marcin Bernatowicz @ 2023-11-23 15:08 UTC (permalink / raw)
To: igt-dev; +Cc: adam.miszczak, matthew.auld, jakub1.kolakowski
Added 'xe_visible_available_vram_size' helper function
to query the available CPU-visible VRAM size.
Also, renamed 'xe_vram_available' to 'xe_available_vram_size'
for consistency with other function names.
Cc: Francois Dugast <francois.dugast@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Laguna, Lukasz <lukasz.laguna@intel.com>
Signed-off-by: Marcin Bernatowicz <marcin.bernatowicz@intel.com>
---
lib/xe/xe_query.c | 57 ++++++++++++++++++++++++++++----------
lib/xe/xe_query.h | 3 +-
tests/intel/xe_evict_ccs.c | 2 +-
3 files changed, 46 insertions(+), 16 deletions(-)
diff --git a/lib/xe/xe_query.c b/lib/xe/xe_query.c
index afd443be3..eb4759094 100644
--- a/lib/xe/xe_query.c
+++ b/lib/xe/xe_query.c
@@ -629,20 +629,20 @@ uint64_t xe_visible_vram_size(int fd, int gt)
return visible_size;
}
-/**
- * xe_vram_available:
- * @fd: xe device fd
- * @gt: gt
- *
- * Returns available vram of xe device @fd and @gt.
- */
-uint64_t xe_vram_available(int fd, int gt)
+
+struct __available_vram {
+ uint64_t total_available;
+ uint64_t cpu_visible_available;
+};
+
+static void __available_vram_size_snapshot(int fd, int gt, struct __available_vram *vram)
{
struct xe_device *xe_dev;
int region_idx;
struct drm_xe_query_mem_region *mem_region;
struct drm_xe_query_mem_regions *mem_regions;
+ igt_assert(vram);
xe_dev = find_in_cache(fd);
igt_assert(xe_dev);
@@ -650,19 +650,48 @@ uint64_t xe_vram_available(int fd, int gt)
mem_region = &xe_dev->mem_regions->regions[region_idx];
if (XE_IS_CLASS_VRAM(mem_region)) {
- uint64_t available_vram;
-
mem_regions = xe_query_mem_regions_new(fd);
pthread_mutex_lock(&cache.cache_mutex);
mem_region->used = mem_regions->regions[region_idx].used;
- available_vram = mem_region->total_size - mem_region->used;
+ mem_region->cpu_visible_used = mem_regions->regions[region_idx].cpu_visible_used;
+ vram->total_available = mem_region->total_size - mem_region->used;
+ vram->cpu_visible_available =
+ mem_region->cpu_visible_size - mem_region->cpu_visible_used;
pthread_mutex_unlock(&cache.cache_mutex);
free(mem_regions);
-
- return available_vram;
}
+}
- return 0;
+/**
+ * xe_available_vram_size:
+ * @fd: xe device fd
+ * @gt: gt
+ *
+ * Returns size of available vram of xe device @fd and @gt.
+ */
+uint64_t xe_available_vram_size(int fd, int gt)
+{
+ struct __available_vram vram = {};
+
+ __available_vram_size_snapshot(fd, gt, &vram);
+
+ return vram.total_available;
+}
+
+/**
+ * xe_visible_available_vram_size:
+ * @fd: xe device fd
+ * @gt: gt
+ *
+ * Returns size of visible available vram of xe device @fd and @gt.
+ */
+uint64_t xe_visible_available_vram_size(int fd, int gt)
+{
+ struct __available_vram vram = {};
+
+ __available_vram_size_snapshot(fd, gt, &vram);
+
+ return vram.cpu_visible_available;
}
/**
diff --git a/lib/xe/xe_query.h b/lib/xe/xe_query.h
index 38e9aa440..503d60b44 100644
--- a/lib/xe/xe_query.h
+++ b/lib/xe/xe_query.h
@@ -92,7 +92,8 @@ unsigned int xe_number_hw_engines(int fd);
bool xe_has_vram(int fd);
uint64_t xe_vram_size(int fd, int gt);
uint64_t xe_visible_vram_size(int fd, int gt);
-uint64_t xe_vram_available(int fd, int gt);
+uint64_t xe_available_vram_size(int fd, int gt);
+uint64_t xe_visible_available_vram_size(int fd, int gt);
uint32_t xe_get_default_alignment(int fd);
uint32_t xe_va_bits(int fd);
uint16_t xe_dev_id(int fd);
diff --git a/tests/intel/xe_evict_ccs.c b/tests/intel/xe_evict_ccs.c
index d7244f620..b04c20935 100644
--- a/tests/intel/xe_evict_ccs.c
+++ b/tests/intel/xe_evict_ccs.c
@@ -325,7 +325,7 @@ static void set_config(int fd, uint32_t flags, const struct param *param,
config->param = param;
config->flags = flags;
config->free_mb = xe_visible_vram_size(fd, 0) / SZ_1M;
- config->total_mb = xe_vram_available(fd, 0) / SZ_1M;
+ config->total_mb = xe_available_vram_size(fd, 0) / SZ_1M;
config->test_mb = min_t(int, config->free_mb * config->param->vram_percent / 100,
config->total_mb * config->param->vram_percent / 100);
--
2.31.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [igt-dev] [PATCH v4 i-g-t 2/2] tests/intel/xe_create: create-big-vram subtest
2023-11-23 15:08 [igt-dev] [PATCH v4 i-g-t 0/2] add create-big-vram subtest Marcin Bernatowicz
2023-11-23 15:08 ` [igt-dev] [PATCH v4 i-g-t 1/2] lib/xe/xe_query: xe_visible_available_vram_size helper Marcin Bernatowicz
@ 2023-11-23 15:08 ` Marcin Bernatowicz
2023-11-23 17:24 ` Kamil Konieczny
2023-11-23 16:57 ` [igt-dev] ✓ Fi.CI.BAT: success for add " Patchwork
` (2 subsequent siblings)
4 siblings, 1 reply; 12+ messages in thread
From: Marcin Bernatowicz @ 2023-11-23 15:08 UTC (permalink / raw)
To: igt-dev; +Cc: adam.miszczak, matthew.auld, jakub1.kolakowski
Validates the creation of significant Buffer Object (BO) within VRAM,
considering the entire available CPU-visible VRAM size.
The size of the created BO can be adjusted using command line
parameters, with '-S' representing BO size in MB,
and '-p' representing BO size as a percentage of the VRAM size.
v2: rebased, updated to uAPI changes (DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT),
after review corrections: 1024UL -> 1024ULL,
int -> unsigned int (Kamil)
v3: provided a flag to allocate the memory within the CPU-visible
portion of VRAM (Matt)
__create_bo replaced with xe_bo_create_flags (Lukasz)
removed the percent command line parameter (Lukasz)
renamed size_MB to size_mb (Lukasz)
added helper function to query available CPU-visible VRAM size,
renamed 'xe_vram_available' to 'xe_available_vram_size' for
consistency with other function names
v4: split lib and test changes into separate patches (Lukasz, Kamil)
added prefixes to titles (Kamil)
restored percent command line parameter (Kamil)
whitespace correction (Kamil)
Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
Cc: Laguna, Lukasz <lukasz.laguna@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
Signed-off-by: Marcin Bernatowicz <marcin.bernatowicz@intel.com>
---
tests/intel/xe_create.c | 84 ++++++++++++++++++++++++++++++++++++++++-
1 file changed, 83 insertions(+), 1 deletion(-)
diff --git a/tests/intel/xe_create.c b/tests/intel/xe_create.c
index f4633cfb3..194c677ee 100644
--- a/tests/intel/xe_create.c
+++ b/tests/intel/xe_create.c
@@ -18,6 +18,14 @@
#define PAGE_SIZE 0x1000
+static struct param {
+ unsigned int size_mb;
+ unsigned int vram_percent;
+} params = {
+ .size_mb = 0,
+ .vram_percent = 0,
+};
+
static int __create_bo(int fd, uint32_t vm, uint64_t size, uint32_t flags,
uint32_t *handlep)
{
@@ -214,7 +222,78 @@ static void create_massive_size(int fd)
}
}
-igt_main
+/**
+ * SUBTEST: create-big-vram
+ * Functionality: BO creation
+ * Test category: functionality test
+ * Description: Verifies the creation of substantial BO within VRAM,
+ * constituting all available CPU-visible VRAM.
+ */
+static void create_big_vram(int fd)
+{
+ uint64_t bo_size, size, visible_avail_size, alignment;
+ uint32_t bo_handle;
+ char *bo_ptr = NULL;
+ uint64_t vm = 0;
+ int gt;
+
+ igt_require(xe_has_vram(fd));
+ alignment = xe_get_default_alignment(fd);
+ vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT, 0);
+
+ xe_for_each_gt(fd, gt) {
+ visible_avail_size = xe_visible_available_vram_size(fd, gt);
+ bo_size = params.size_mb
+ ? params.size_mb * 1024ULL * 1024ULL
+ : params.vram_percent
+ ? ALIGN(visible_avail_size * params.vram_percent / 100, alignment)
+ : ALIGN_DOWN(visible_avail_size, alignment);
+ igt_info("gt%u bo_size=%lu visible_available_vram_size=%lu\n",
+ gt, bo_size, visible_avail_size);
+
+ bo_handle = xe_bo_create_flags(fd, vm, bo_size, visible_vram_memory(fd, gt));
+ bo_ptr = xe_bo_map(fd, bo_handle, bo_size);
+
+ size = bo_size - 1;
+ while (size > SZ_64K) {
+ igt_assert_eq(0, READ_ONCE(bo_ptr[size]));
+ WRITE_ONCE(bo_ptr[size], 'A');
+ igt_assert_eq('A', READ_ONCE(bo_ptr[size]));
+ size >>= 1;
+ }
+ igt_assert_eq(0, bo_ptr[0]);
+
+ munmap(bo_ptr, bo_size);
+ gem_close(fd, bo_handle);
+ }
+
+ xe_vm_destroy(fd, vm);
+}
+
+static int opt_handler(int opt, int opt_index, void *data)
+{
+ switch (opt) {
+ case 'S':
+ params.size_mb = atoi(optarg);
+ igt_debug("Size MB: %d\n", params.size_mb);
+ break;
+ case 'p':
+ params.vram_percent = atoi(optarg);
+ igt_debug("Percent of VRAM: %d\n", params.vram_percent);
+ break;
+ default:
+ return IGT_OPT_HANDLER_ERROR;
+ }
+
+ return IGT_OPT_HANDLER_SUCCESS;
+}
+
+const char *help_str =
+ " -S\tBO size in MB\n"
+ " -p\tPercent of VRAM for BO\n"
+ ;
+
+igt_main_args("S:p:", NULL, help_str, opt_handler, NULL)
{
int xe;
@@ -253,6 +332,9 @@ igt_main
igt_waitchildren();
}
+ igt_subtest("create-big-vram") {
+ create_big_vram(xe);
+ }
igt_fixture
drm_close_driver(xe);
--
2.31.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for add create-big-vram subtest
2023-11-23 15:08 [igt-dev] [PATCH v4 i-g-t 0/2] add create-big-vram subtest Marcin Bernatowicz
2023-11-23 15:08 ` [igt-dev] [PATCH v4 i-g-t 1/2] lib/xe/xe_query: xe_visible_available_vram_size helper Marcin Bernatowicz
2023-11-23 15:08 ` [igt-dev] [PATCH v4 i-g-t 2/2] tests/intel/xe_create: create-big-vram subtest Marcin Bernatowicz
@ 2023-11-23 16:57 ` Patchwork
2023-11-23 18:13 ` [igt-dev] ✓ CI.xeBAT: " Patchwork
2023-11-25 9:40 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
4 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2023-11-23 16:57 UTC (permalink / raw)
To: Marcin Bernatowicz; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 6198 bytes --]
== Series Details ==
Series: add create-big-vram subtest
URL : https://patchwork.freedesktop.org/series/126831/
State : success
== Summary ==
CI Bug Log - changes from IGT_7600 -> IGTPW_10256
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/index.html
Participating hosts (38 -> 35)
------------------------------
Additional (1): bat-dg1-5
Missing (4): bat-mtlp-8 fi-tgl-1115g4 fi-snb-2520m fi-bsw-n3050
Known issues
------------
Here are the changes found in IGTPW_10256 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_mmap@basic:
- bat-dg1-5: NOTRUN -> [SKIP][1] ([i915#4083])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/bat-dg1-5/igt@gem_mmap@basic.html
* igt@gem_tiled_fence_blits@basic:
- bat-dg1-5: NOTRUN -> [SKIP][2] ([i915#4077]) +2 other tests skip
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/bat-dg1-5/igt@gem_tiled_fence_blits@basic.html
* igt@gem_tiled_pread_basic:
- bat-dg1-5: NOTRUN -> [SKIP][3] ([i915#4079]) +1 other test skip
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/bat-dg1-5/igt@gem_tiled_pread_basic.html
* igt@i915_pm_rps@basic-api:
- bat-dg1-5: NOTRUN -> [SKIP][4] ([i915#6621])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/bat-dg1-5/igt@i915_pm_rps@basic-api.html
* igt@kms_addfb_basic@basic-x-tiled-legacy:
- bat-dg1-5: NOTRUN -> [SKIP][5] ([i915#4212]) +7 other tests skip
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/bat-dg1-5/igt@kms_addfb_basic@basic-x-tiled-legacy.html
* igt@kms_addfb_basic@basic-y-tiled-legacy:
- bat-dg1-5: NOTRUN -> [SKIP][6] ([i915#4215])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/bat-dg1-5/igt@kms_addfb_basic@basic-y-tiled-legacy.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-dg1-5: NOTRUN -> [SKIP][7] ([i915#4103] / [i915#4213]) +1 other test skip
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/bat-dg1-5/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_dsc@dsc-basic:
- bat-dg1-5: NOTRUN -> [SKIP][8] ([i915#3555] / [i915#3840])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/bat-dg1-5/igt@kms_dsc@dsc-basic.html
* igt@kms_force_connector_basic@force-load-detect:
- bat-dg1-5: NOTRUN -> [SKIP][9] ([fdo#109285])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/bat-dg1-5/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_hdmi_inject@inject-audio:
- bat-dg1-5: NOTRUN -> [SKIP][10] ([i915#433])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/bat-dg1-5/igt@kms_hdmi_inject@inject-audio.html
* igt@kms_setmode@basic-clone-single-crtc:
- bat-dg1-5: NOTRUN -> [SKIP][11] ([i915#3555])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/bat-dg1-5/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-fence-read:
- bat-dg1-5: NOTRUN -> [SKIP][12] ([i915#3708]) +3 other tests skip
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/bat-dg1-5/igt@prime_vgem@basic-fence-read.html
* igt@prime_vgem@basic-gtt:
- bat-dg1-5: NOTRUN -> [SKIP][13] ([i915#3708] / [i915#4077]) +1 other test skip
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/bat-dg1-5/igt@prime_vgem@basic-gtt.html
#### Possible fixes ####
* igt@kms_busy@basic@modeset:
- bat-adlp-11: [DMESG-FAIL][14] ([i915#6868]) -> [PASS][15]
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7600/bat-adlp-11/igt@kms_busy@basic@modeset.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/bat-adlp-11/igt@kms_busy@basic@modeset.html
* igt@kms_pipe_crc_basic@hang-read-crc@pipe-b-dp-5:
- bat-adlp-11: [DMESG-WARN][16] ([i915#4309]) -> [PASS][17]
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7600/bat-adlp-11/igt@kms_pipe_crc_basic@hang-read-crc@pipe-b-dp-5.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/bat-adlp-11/igt@kms_pipe_crc_basic@hang-read-crc@pipe-b-dp-5.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215
[i915#4309]: https://gitlab.freedesktop.org/drm/intel/issues/4309
[i915#433]: https://gitlab.freedesktop.org/drm/intel/issues/433
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6868]: https://gitlab.freedesktop.org/drm/intel/issues/6868
[i915#9673]: https://gitlab.freedesktop.org/drm/intel/issues/9673
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_7600 -> IGTPW_10256
CI-20190529: 20190529
CI_DRM_13915: c0af28b1cf46b747e6b741af1c9e7362e78805b6 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_10256: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/index.html
IGT_7600: b889fd01780dc79f6fcc8545346c81f5c79f5efb @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Testlist changes
----------------
+igt@xe_create@create-big-vram
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/index.html
[-- Attachment #2: Type: text/html, Size: 7248 bytes --]
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [igt-dev] [PATCH v4 i-g-t 2/2] tests/intel/xe_create: create-big-vram subtest
2023-11-23 15:08 ` [igt-dev] [PATCH v4 i-g-t 2/2] tests/intel/xe_create: create-big-vram subtest Marcin Bernatowicz
@ 2023-11-23 17:24 ` Kamil Konieczny
2023-11-23 18:50 ` Bernatowicz, Marcin
0 siblings, 1 reply; 12+ messages in thread
From: Kamil Konieczny @ 2023-11-23 17:24 UTC (permalink / raw)
To: igt-dev; +Cc: adam.miszczak, matthew.auld, Marcin Bernatowicz,
jakub1.kolakowski
Hi Marcin,
On 2023-11-23 at 16:08:23 +0100, Marcin Bernatowicz wrote:
> Validates the creation of significant Buffer Object (BO) within VRAM,
> considering the entire available CPU-visible VRAM size.
> The size of the created BO can be adjusted using command line
> parameters, with '-S' representing BO size in MB,
> and '-p' representing BO size as a percentage of the VRAM size.
>
> v2: rebased, updated to uAPI changes (DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT),
> after review corrections: 1024UL -> 1024ULL,
> int -> unsigned int (Kamil)
>
> v3: provided a flag to allocate the memory within the CPU-visible
> portion of VRAM (Matt)
> __create_bo replaced with xe_bo_create_flags (Lukasz)
> removed the percent command line parameter (Lukasz)
> renamed size_MB to size_mb (Lukasz)
> added helper function to query available CPU-visible VRAM size,
> renamed 'xe_vram_available' to 'xe_available_vram_size' for
> consistency with other function names
>
> v4: split lib and test changes into separate patches (Lukasz, Kamil)
> added prefixes to titles (Kamil)
> restored percent command line parameter (Kamil)
> whitespace correction (Kamil)
>
> Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
> Cc: Laguna, Lukasz <lukasz.laguna@intel.com>
> Cc: Matthew Auld <matthew.auld@intel.com>
> Signed-off-by: Marcin Bernatowicz <marcin.bernatowicz@intel.com>
> ---
> tests/intel/xe_create.c | 84 ++++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 83 insertions(+), 1 deletion(-)
>
> diff --git a/tests/intel/xe_create.c b/tests/intel/xe_create.c
> index f4633cfb3..194c677ee 100644
> --- a/tests/intel/xe_create.c
> +++ b/tests/intel/xe_create.c
> @@ -18,6 +18,14 @@
>
> #define PAGE_SIZE 0x1000
>
> +static struct param {
> + unsigned int size_mb;
> + unsigned int vram_percent;
> +} params = {
> + .size_mb = 0,
> + .vram_percent = 0,
> +};
> +
> static int __create_bo(int fd, uint32_t vm, uint64_t size, uint32_t flags,
> uint32_t *handlep)
> {
> @@ -214,7 +222,78 @@ static void create_massive_size(int fd)
> }
> }
>
> -igt_main
> +/**
> + * SUBTEST: create-big-vram
> + * Functionality: BO creation
> + * Test category: functionality test
> + * Description: Verifies the creation of substantial BO within VRAM,
> + * constituting all available CPU-visible VRAM.
> + */
> +static void create_big_vram(int fd)
> +{
> + uint64_t bo_size, size, visible_avail_size, alignment;
> + uint32_t bo_handle;
> + char *bo_ptr = NULL;
> + uint64_t vm = 0;
> + int gt;
> +
> + igt_require(xe_has_vram(fd));
> + alignment = xe_get_default_alignment(fd);
> + vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT, 0);
> +
> + xe_for_each_gt(fd, gt) {
> + visible_avail_size = xe_visible_available_vram_size(fd, gt);
Skip (continue) if == 0?
> + bo_size = params.size_mb
> + ? params.size_mb * 1024ULL * 1024ULL
> + : params.vram_percent
> + ? ALIGN(visible_avail_size * params.vram_percent / 100, alignment)
> + : ALIGN_DOWN(visible_avail_size, alignment);
> + igt_info("gt%u bo_size=%lu visible_available_vram_size=%lu\n",
> + gt, bo_size, visible_avail_size);
> +
Should it skip if calculated bo_size == 0?
In case of skips you can make it dynamic or count number
of performed tests (it should be > 0).
Regards,
Kamil
> + bo_handle = xe_bo_create_flags(fd, vm, bo_size, visible_vram_memory(fd, gt));
> + bo_ptr = xe_bo_map(fd, bo_handle, bo_size);
> +
> + size = bo_size - 1;
> + while (size > SZ_64K) {
> + igt_assert_eq(0, READ_ONCE(bo_ptr[size]));
> + WRITE_ONCE(bo_ptr[size], 'A');
> + igt_assert_eq('A', READ_ONCE(bo_ptr[size]));
> + size >>= 1;
> + }
> + igt_assert_eq(0, bo_ptr[0]);
> +
> + munmap(bo_ptr, bo_size);
> + gem_close(fd, bo_handle);
> + }
> +
> + xe_vm_destroy(fd, vm);
> +}
> +
> +static int opt_handler(int opt, int opt_index, void *data)
> +{
> + switch (opt) {
> + case 'S':
> + params.size_mb = atoi(optarg);
> + igt_debug("Size MB: %d\n", params.size_mb);
> + break;
> + case 'p':
> + params.vram_percent = atoi(optarg);
> + igt_debug("Percent of VRAM: %d\n", params.vram_percent);
> + break;
> + default:
> + return IGT_OPT_HANDLER_ERROR;
> + }
> +
> + return IGT_OPT_HANDLER_SUCCESS;
> +}
> +
> +const char *help_str =
> + " -S\tBO size in MB\n"
> + " -p\tPercent of VRAM for BO\n"
> + ;
> +
> +igt_main_args("S:p:", NULL, help_str, opt_handler, NULL)
> {
> int xe;
>
> @@ -253,6 +332,9 @@ igt_main
> igt_waitchildren();
> }
>
> + igt_subtest("create-big-vram") {
> + create_big_vram(xe);
> + }
>
> igt_fixture
> drm_close_driver(xe);
> --
> 2.31.1
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* [igt-dev] ✓ CI.xeBAT: success for add create-big-vram subtest
2023-11-23 15:08 [igt-dev] [PATCH v4 i-g-t 0/2] add create-big-vram subtest Marcin Bernatowicz
` (2 preceding siblings ...)
2023-11-23 16:57 ` [igt-dev] ✓ Fi.CI.BAT: success for add " Patchwork
@ 2023-11-23 18:13 ` Patchwork
2023-11-25 9:40 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
4 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2023-11-23 18:13 UTC (permalink / raw)
To: Marcin Bernatowicz; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 5464 bytes --]
== Series Details ==
Series: add create-big-vram subtest
URL : https://patchwork.freedesktop.org/series/126831/
State : success
== Summary ==
CI Bug Log - changes from XEIGT_7600_BAT -> XEIGTPW_10256_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in XEIGTPW_10256_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1:
- bat-adlp-7: [PASS][1] -> [FAIL][2] ([Intel XE#480])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7600/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10256/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html
* igt@kms_pipe_crc_basic@hang-read-crc:
- bat-dg2-oem2: [PASS][3] -> [INCOMPLETE][4] ([Intel XE#749])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7600/bat-dg2-oem2/igt@kms_pipe_crc_basic@hang-read-crc.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10256/bat-dg2-oem2/igt@kms_pipe_crc_basic@hang-read-crc.html
* igt@kms_pipe_crc_basic@hang-read-crc@pipe-a-dp-3:
- bat-dg2-oem2: [PASS][5] -> [INCOMPLETE][6] ([Intel XE#545])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7600/bat-dg2-oem2/igt@kms_pipe_crc_basic@hang-read-crc@pipe-a-dp-3.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10256/bat-dg2-oem2/igt@kms_pipe_crc_basic@hang-read-crc@pipe-a-dp-3.html
* igt@xe_exec_fault_mode@twice-userptr-invalidate-imm:
- bat-atsm-2: NOTRUN -> [SKIP][7] ([Intel XE#288]) +17 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10256/bat-atsm-2/igt@xe_exec_fault_mode@twice-userptr-invalidate-imm.html
#### Possible fixes ####
* igt@core_hotunplug@unbind-rebind:
- bat-atsm-2: [INCOMPLETE][8] ([Intel XE#764]) -> [PASS][9]
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7600/bat-atsm-2/igt@core_hotunplug@unbind-rebind.html
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10256/bat-atsm-2/igt@core_hotunplug@unbind-rebind.html
* igt@kms_flip@basic-flip-vs-wf_vblank@d-dp3:
- bat-dg2-oem2: [FAIL][10] ([Intel XE#480]) -> [PASS][11] +1 other test pass
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7600/bat-dg2-oem2/igt@kms_flip@basic-flip-vs-wf_vblank@d-dp3.html
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10256/bat-dg2-oem2/igt@kms_flip@basic-flip-vs-wf_vblank@d-dp3.html
#### Warnings ####
* igt@kms_frontbuffer_tracking@basic:
- bat-adlp-7: [DMESG-FAIL][12] ([Intel XE#282] / [i915#2017]) -> [FAIL][13] ([Intel XE#616] / [Intel XE#750])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7600/bat-adlp-7/igt@kms_frontbuffer_tracking@basic.html
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10256/bat-adlp-7/igt@kms_frontbuffer_tracking@basic.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12:
- bat-dg2-oem2: [FAIL][14] ([Intel XE#400] / [Intel XE#616]) -> [TIMEOUT][15] ([Intel XE#430] / [Intel XE#530])
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7600/bat-dg2-oem2/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12.html
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10256/bat-dg2-oem2/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-b-dp-3:
- bat-dg2-oem2: [FAIL][16] ([Intel XE#400] / [Intel XE#616]) -> [TIMEOUT][17] ([Intel XE#530])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7600/bat-dg2-oem2/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-b-dp-3.html
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10256/bat-dg2-oem2/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-b-dp-3.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#282]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/282
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#400]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/400
[Intel XE#430]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/430
[Intel XE#480]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/480
[Intel XE#530]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/530
[Intel XE#545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/545
[Intel XE#616]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/616
[Intel XE#749]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/749
[Intel XE#750]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/750
[Intel XE#764]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/764
[i915#2017]: https://gitlab.freedesktop.org/drm/intel/issues/2017
Build changes
-------------
* IGT: IGT_7600 -> IGTPW_10256
IGTPW_10256: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/index.html
IGT_7600: b889fd01780dc79f6fcc8545346c81f5c79f5efb @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-517-501feae7afed8e9b21700d1185532c18d62ca33a: 501feae7afed8e9b21700d1185532c18d62ca33a
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10256/index.html
[-- Attachment #2: Type: text/html, Size: 6574 bytes --]
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [igt-dev] [PATCH v4 i-g-t 2/2] tests/intel/xe_create: create-big-vram subtest
2023-11-23 17:24 ` Kamil Konieczny
@ 2023-11-23 18:50 ` Bernatowicz, Marcin
2023-11-29 17:56 ` Kamil Konieczny
0 siblings, 1 reply; 12+ messages in thread
From: Bernatowicz, Marcin @ 2023-11-23 18:50 UTC (permalink / raw)
To: Kamil Konieczny, igt-dev, Marcin Bernatowicz, matthew.auld,
francois.dugast, zbigniew.kempczynski, lukasz.laguna,
adam.miszczak, jakub1.kolakowski
Hi,
On 11/23/2023 6:24 PM, Kamil Konieczny wrote:
> Hi Marcin,
> On 2023-11-23 at 16:08:23 +0100, Marcin Bernatowicz wrote:
>> Validates the creation of significant Buffer Object (BO) within VRAM,
>> considering the entire available CPU-visible VRAM size.
>> The size of the created BO can be adjusted using command line
>> parameters, with '-S' representing BO size in MB,
>> and '-p' representing BO size as a percentage of the VRAM size.
>>
>> v2: rebased, updated to uAPI changes (DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT),
>> after review corrections: 1024UL -> 1024ULL,
>> int -> unsigned int (Kamil)
>>
>> v3: provided a flag to allocate the memory within the CPU-visible
>> portion of VRAM (Matt)
>> __create_bo replaced with xe_bo_create_flags (Lukasz)
>> removed the percent command line parameter (Lukasz)
>> renamed size_MB to size_mb (Lukasz)
>> added helper function to query available CPU-visible VRAM size,
>> renamed 'xe_vram_available' to 'xe_available_vram_size' for
>> consistency with other function names
>>
>> v4: split lib and test changes into separate patches (Lukasz, Kamil)
>> added prefixes to titles (Kamil)
>> restored percent command line parameter (Kamil)
>> whitespace correction (Kamil)
>>
>> Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
>> Cc: Laguna, Lukasz <lukasz.laguna@intel.com>
>> Cc: Matthew Auld <matthew.auld@intel.com>
>> Signed-off-by: Marcin Bernatowicz <marcin.bernatowicz@intel.com>
>> ---
>> tests/intel/xe_create.c | 84 ++++++++++++++++++++++++++++++++++++++++-
>> 1 file changed, 83 insertions(+), 1 deletion(-)
>>
>> diff --git a/tests/intel/xe_create.c b/tests/intel/xe_create.c
>> index f4633cfb3..194c677ee 100644
>> --- a/tests/intel/xe_create.c
>> +++ b/tests/intel/xe_create.c
>> @@ -18,6 +18,14 @@
>>
>> #define PAGE_SIZE 0x1000
>>
>> +static struct param {
>> + unsigned int size_mb;
>> + unsigned int vram_percent;
>> +} params = {
>> + .size_mb = 0,
>> + .vram_percent = 0,
>> +};
>> +
>> static int __create_bo(int fd, uint32_t vm, uint64_t size, uint32_t flags,
>> uint32_t *handlep)
>> {
>> @@ -214,7 +222,78 @@ static void create_massive_size(int fd)
>> }
>> }
>>
>> -igt_main
>> +/**
>> + * SUBTEST: create-big-vram
>> + * Functionality: BO creation
>> + * Test category: functionality test
>> + * Description: Verifies the creation of substantial BO within VRAM,
>> + * constituting all available CPU-visible VRAM.
>> + */
>> +static void create_big_vram(int fd)
>> +{
>> + uint64_t bo_size, size, visible_avail_size, alignment;
>> + uint32_t bo_handle;
>> + char *bo_ptr = NULL;
>> + uint64_t vm = 0;
>> + int gt;
>> +
>> + igt_require(xe_has_vram(fd));
>> + alignment = xe_get_default_alignment(fd);
>> + vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT, 0);
>> +
>> + xe_for_each_gt(fd, gt) {
>> + visible_avail_size = xe_visible_available_vram_size(fd, gt);
>
> Skip (continue) if == 0?
Do we expect it to be zero ?
>
>> + bo_size = params.size_mb
>> + ? params.size_mb * 1024ULL * 1024ULL
>> + : params.vram_percent
>> + ? ALIGN(visible_avail_size * params.vram_percent / 100, alignment)
>> + : ALIGN_DOWN(visible_avail_size, alignment);
>> + igt_info("gt%u bo_size=%lu visible_available_vram_size=%lu\n",
>> + gt, bo_size, visible_avail_size);
>> +
>
> Should it skip if calculated bo_size == 0?
> In case of skips you can make it dynamic or count number
> of performed tests (it should be > 0).
Is it expected to be zero ? I would just let it go (and fail).
--
marcin
>
> Regards,
> Kamil
>
>> + bo_handle = xe_bo_create_flags(fd, vm, bo_size, visible_vram_memory(fd, gt));
>> + bo_ptr = xe_bo_map(fd, bo_handle, bo_size);
>> +
>> + size = bo_size - 1;
>> + while (size > SZ_64K) {
>> + igt_assert_eq(0, READ_ONCE(bo_ptr[size]));
>> + WRITE_ONCE(bo_ptr[size], 'A');
>> + igt_assert_eq('A', READ_ONCE(bo_ptr[size]));
>> + size >>= 1;
>> + }
>> + igt_assert_eq(0, bo_ptr[0]);
>> +
>> + munmap(bo_ptr, bo_size);
>> + gem_close(fd, bo_handle);
>> + }
>> +
>> + xe_vm_destroy(fd, vm);
>> +}
>> +
>> +static int opt_handler(int opt, int opt_index, void *data)
>> +{
>> + switch (opt) {
>> + case 'S':
>> + params.size_mb = atoi(optarg);
>> + igt_debug("Size MB: %d\n", params.size_mb);
>> + break;
>> + case 'p':
>> + params.vram_percent = atoi(optarg);
>> + igt_debug("Percent of VRAM: %d\n", params.vram_percent);
>> + break;
>> + default:
>> + return IGT_OPT_HANDLER_ERROR;
>> + }
>> +
>> + return IGT_OPT_HANDLER_SUCCESS;
>> +}
>> +
>> +const char *help_str =
>> + " -S\tBO size in MB\n"
>> + " -p\tPercent of VRAM for BO\n"
>> + ;
>> +
>> +igt_main_args("S:p:", NULL, help_str, opt_handler, NULL)
>> {
>> int xe;
>>
>> @@ -253,6 +332,9 @@ igt_main
>> igt_waitchildren();
>> }
>>
>> + igt_subtest("create-big-vram") {
>> + create_big_vram(xe);
>> + }
>>
>> igt_fixture
>> drm_close_driver(xe);
>> --
>> 2.31.1
>>
^ permalink raw reply [flat|nested] 12+ messages in thread
* [igt-dev] ✓ Fi.CI.IGT: success for add create-big-vram subtest
2023-11-23 15:08 [igt-dev] [PATCH v4 i-g-t 0/2] add create-big-vram subtest Marcin Bernatowicz
` (3 preceding siblings ...)
2023-11-23 18:13 ` [igt-dev] ✓ CI.xeBAT: " Patchwork
@ 2023-11-25 9:40 ` Patchwork
4 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2023-11-25 9:40 UTC (permalink / raw)
To: Marcin Bernatowicz; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 55580 bytes --]
== Series Details ==
Series: add create-big-vram subtest
URL : https://patchwork.freedesktop.org/series/126831/
State : success
== Summary ==
CI Bug Log - changes from IGT_7600_full -> IGTPW_10256_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/index.html
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in IGTPW_10256_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@api_intel_bb@blit-reloc-keep-cache:
- shard-dg2: NOTRUN -> [SKIP][1] ([i915#8411]) +1 other test skip
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-7/igt@api_intel_bb@blit-reloc-keep-cache.html
* igt@api_intel_bb@object-reloc-purge-cache:
- shard-mtlp: NOTRUN -> [SKIP][2] ([i915#8411])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-8/igt@api_intel_bb@object-reloc-purge-cache.html
* igt@api_intel_bb@render-ccs:
- shard-dg2: NOTRUN -> [FAIL][3] ([i915#6122])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-7/igt@api_intel_bb@render-ccs.html
* igt@debugfs_test@basic-hwmon:
- shard-mtlp: NOTRUN -> [SKIP][4] ([i915#9318])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-6/igt@debugfs_test@basic-hwmon.html
* igt@drm_fdinfo@busy-idle-check-all@vcs0:
- shard-dg2: NOTRUN -> [SKIP][5] ([i915#8414]) +12 other tests skip
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-11/igt@drm_fdinfo@busy-idle-check-all@vcs0.html
* igt@gem_busy@semaphore:
- shard-dg2: NOTRUN -> [SKIP][6] ([i915#3936])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-5/igt@gem_busy@semaphore.html
* igt@gem_ccs@block-copy-compressed:
- shard-mtlp: NOTRUN -> [SKIP][7] ([i915#3555])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-5/igt@gem_ccs@block-copy-compressed.html
* igt@gem_ccs@suspend-resume@xmajor-compressed-compfmt0-lmem0-lmem0:
- shard-dg2: NOTRUN -> [INCOMPLETE][8] ([i915#7297])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-6/igt@gem_ccs@suspend-resume@xmajor-compressed-compfmt0-lmem0-lmem0.html
* igt@gem_close_race@multigpu-basic-threads:
- shard-tglu: NOTRUN -> [SKIP][9] ([i915#7697])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-tglu-6/igt@gem_close_race@multigpu-basic-threads.html
* igt@gem_ctx_isolation@preservation-s3@vcs1:
- shard-dg1: [PASS][10] -> [DMESG-WARN][11] ([i915#4391] / [i915#4423])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7600/shard-dg1-19/igt@gem_ctx_isolation@preservation-s3@vcs1.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg1-19/igt@gem_ctx_isolation@preservation-s3@vcs1.html
* igt@gem_ctx_persistence@engines-hang:
- shard-snb: NOTRUN -> [SKIP][12] ([fdo#109271] / [i915#1099])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-snb4/igt@gem_ctx_persistence@engines-hang.html
* igt@gem_ctx_persistence@legacy-engines-mixed-process@render:
- shard-mtlp: [PASS][13] -> [ABORT][14] ([i915#9414]) +1 other test abort
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7600/shard-mtlp-2/igt@gem_ctx_persistence@legacy-engines-mixed-process@render.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-8/igt@gem_ctx_persistence@legacy-engines-mixed-process@render.html
* igt@gem_ctx_sseu@engines:
- shard-dg2: NOTRUN -> [SKIP][15] ([i915#280])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-11/igt@gem_ctx_sseu@engines.html
* igt@gem_eio@reset-stress:
- shard-dg1: [PASS][16] -> [FAIL][17] ([i915#5784])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7600/shard-dg1-14/igt@gem_eio@reset-stress.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg1-19/igt@gem_eio@reset-stress.html
* igt@gem_exec_balancer@bonded-sync:
- shard-dg2: NOTRUN -> [SKIP][18] ([i915#4771]) +1 other test skip
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-5/igt@gem_exec_balancer@bonded-sync.html
- shard-mtlp: NOTRUN -> [SKIP][19] ([i915#4771])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-2/igt@gem_exec_balancer@bonded-sync.html
* igt@gem_exec_balancer@noheartbeat:
- shard-dg2: NOTRUN -> [SKIP][20] ([i915#8555]) +1 other test skip
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-2/igt@gem_exec_balancer@noheartbeat.html
* igt@gem_exec_balancer@sliced:
- shard-dg2: NOTRUN -> [SKIP][21] ([i915#4812]) +1 other test skip
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-11/igt@gem_exec_balancer@sliced.html
* igt@gem_exec_capture@capture-invisible@smem0:
- shard-glk: NOTRUN -> [SKIP][22] ([fdo#109271] / [i915#6334])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-glk2/igt@gem_exec_capture@capture-invisible@smem0.html
* igt@gem_exec_fair@basic-none-vip@rcs0:
- shard-tglu: NOTRUN -> [FAIL][23] ([i915#2842])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-tglu-7/igt@gem_exec_fair@basic-none-vip@rcs0.html
- shard-glk: NOTRUN -> [FAIL][24] ([i915#2842])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-glk8/igt@gem_exec_fair@basic-none-vip@rcs0.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-tglu: [PASS][25] -> [FAIL][26] ([i915#2842]) +1 other test fail
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7600/shard-tglu-7/igt@gem_exec_fair@basic-pace-share@rcs0.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-tglu-10/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_exec_fair@basic-throttle:
- shard-dg2: NOTRUN -> [SKIP][27] ([i915#3539]) +1 other test skip
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-2/igt@gem_exec_fair@basic-throttle.html
* igt@gem_exec_flush@basic-batch-kernel-default-cmd:
- shard-dg2: NOTRUN -> [SKIP][28] ([i915#3539] / [i915#4852]) +4 other tests skip
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-3/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html
- shard-dg1: NOTRUN -> [SKIP][29] ([i915#3539] / [i915#4852])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg1-17/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html
* igt@gem_exec_gttfill@multigpu-basic:
- shard-dg2: NOTRUN -> [SKIP][30] ([i915#7697])
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-5/igt@gem_exec_gttfill@multigpu-basic.html
* igt@gem_exec_params@secure-non-root:
- shard-dg1: NOTRUN -> [SKIP][31] ([fdo#112283])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg1-16/igt@gem_exec_params@secure-non-root.html
* igt@gem_exec_reloc@basic-gtt-wc-noreloc:
- shard-mtlp: NOTRUN -> [SKIP][32] ([i915#3281]) +1 other test skip
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-8/igt@gem_exec_reloc@basic-gtt-wc-noreloc.html
* igt@gem_exec_reloc@basic-softpin:
- shard-dg1: NOTRUN -> [SKIP][33] ([i915#3281])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg1-19/igt@gem_exec_reloc@basic-softpin.html
* igt@gem_exec_reloc@basic-wc:
- shard-dg2: NOTRUN -> [SKIP][34] ([i915#3281]) +5 other tests skip
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-5/igt@gem_exec_reloc@basic-wc.html
* igt@gem_exec_schedule@semaphore-power:
- shard-dg2: NOTRUN -> [SKIP][35] ([i915#4537] / [i915#4812])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-11/igt@gem_exec_schedule@semaphore-power.html
* igt@gem_exec_suspend@basic-s0@smem:
- shard-tglu: [PASS][36] -> [INCOMPLETE][37] ([i915#8797])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7600/shard-tglu-2/igt@gem_exec_suspend@basic-s0@smem.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-tglu-9/igt@gem_exec_suspend@basic-s0@smem.html
* igt@gem_fence_thrash@bo-write-verify-x:
- shard-dg2: NOTRUN -> [SKIP][38] ([i915#4860]) +3 other tests skip
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-2/igt@gem_fence_thrash@bo-write-verify-x.html
* igt@gem_fenced_exec_thrash@2-spare-fences:
- shard-dg1: NOTRUN -> [SKIP][39] ([i915#4860]) +1 other test skip
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg1-16/igt@gem_fenced_exec_thrash@2-spare-fences.html
* igt@gem_fenced_exec_thrash@too-many-fences:
- shard-mtlp: NOTRUN -> [SKIP][40] ([i915#4860])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-2/igt@gem_fenced_exec_thrash@too-many-fences.html
* igt@gem_lmem_swapping@heavy-multi:
- shard-glk: NOTRUN -> [SKIP][41] ([fdo#109271] / [i915#4613]) +1 other test skip
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-glk4/igt@gem_lmem_swapping@heavy-multi.html
- shard-tglu: NOTRUN -> [SKIP][42] ([i915#4613])
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-tglu-9/igt@gem_lmem_swapping@heavy-multi.html
* igt@gem_lmem_swapping@massive:
- shard-mtlp: NOTRUN -> [SKIP][43] ([i915#4613])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-1/igt@gem_lmem_swapping@massive.html
* igt@gem_lmem_swapping@smem-oom@lmem0:
- shard-dg1: [PASS][44] -> [TIMEOUT][45] ([i915#5493])
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7600/shard-dg1-18/igt@gem_lmem_swapping@smem-oom@lmem0.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg1-17/igt@gem_lmem_swapping@smem-oom@lmem0.html
* igt@gem_lmem_swapping@verify-random-ccs@lmem0:
- shard-dg1: NOTRUN -> [SKIP][46] ([i915#4565])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg1-12/igt@gem_lmem_swapping@verify-random-ccs@lmem0.html
* igt@gem_media_fill@media-fill:
- shard-dg2: NOTRUN -> [SKIP][47] ([i915#8289])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-10/igt@gem_media_fill@media-fill.html
* igt@gem_media_vme:
- shard-dg2: NOTRUN -> [SKIP][48] ([i915#284])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-5/igt@gem_media_vme.html
- shard-tglu: NOTRUN -> [SKIP][49] ([i915#284])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-tglu-3/igt@gem_media_vme.html
* igt@gem_mmap_gtt@basic-write-read-distinct:
- shard-mtlp: NOTRUN -> [SKIP][50] ([i915#4077]) +3 other tests skip
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-8/igt@gem_mmap_gtt@basic-write-read-distinct.html
* igt@gem_mmap_gtt@medium-copy-xy:
- shard-dg2: NOTRUN -> [SKIP][51] ([i915#4077]) +18 other tests skip
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-7/igt@gem_mmap_gtt@medium-copy-xy.html
* igt@gem_mmap_wc@close:
- shard-dg2: NOTRUN -> [SKIP][52] ([i915#4083]) +5 other tests skip
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-11/igt@gem_mmap_wc@close.html
* igt@gem_mmap_wc@write-wc-read-gtt:
- shard-mtlp: NOTRUN -> [SKIP][53] ([i915#4083])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-1/igt@gem_mmap_wc@write-wc-read-gtt.html
* igt@gem_partial_pwrite_pread@writes-after-reads:
- shard-dg1: NOTRUN -> [SKIP][54] ([i915#3282]) +1 other test skip
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg1-15/igt@gem_partial_pwrite_pread@writes-after-reads.html
* igt@gem_partial_pwrite_pread@writes-after-reads-snoop:
- shard-mtlp: NOTRUN -> [SKIP][55] ([i915#3282]) +1 other test skip
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-1/igt@gem_partial_pwrite_pread@writes-after-reads-snoop.html
* igt@gem_pread@display:
- shard-dg2: NOTRUN -> [SKIP][56] ([i915#3282]) +7 other tests skip
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-10/igt@gem_pread@display.html
* igt@gem_pxp@display-protected-crc:
- shard-dg2: NOTRUN -> [SKIP][57] ([i915#4270]) +2 other tests skip
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-5/igt@gem_pxp@display-protected-crc.html
* igt@gem_pxp@reject-modify-context-protection-on:
- shard-mtlp: NOTRUN -> [SKIP][58] ([i915#4270])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-1/igt@gem_pxp@reject-modify-context-protection-on.html
* igt@gem_pxp@verify-pxp-execution-after-suspend-resume:
- shard-dg1: NOTRUN -> [SKIP][59] ([i915#4270])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg1-19/igt@gem_pxp@verify-pxp-execution-after-suspend-resume.html
* igt@gem_softpin@evict-snoop:
- shard-mtlp: NOTRUN -> [SKIP][60] ([i915#4885])
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-6/igt@gem_softpin@evict-snoop.html
- shard-dg2: NOTRUN -> [SKIP][61] ([i915#4885])
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-11/igt@gem_softpin@evict-snoop.html
* igt@gem_tiled_pread_pwrite:
- shard-dg2: NOTRUN -> [SKIP][62] ([i915#4079]) +3 other tests skip
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-7/igt@gem_tiled_pread_pwrite.html
- shard-mtlp: NOTRUN -> [SKIP][63] ([i915#4079]) +1 other test skip
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-6/igt@gem_tiled_pread_pwrite.html
* igt@gem_userptr_blits@dmabuf-unsync:
- shard-dg2: NOTRUN -> [SKIP][64] ([i915#3297]) +1 other test skip
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-10/igt@gem_userptr_blits@dmabuf-unsync.html
* igt@gem_userptr_blits@map-fixed-invalidate-overlap:
- shard-dg2: NOTRUN -> [SKIP][65] ([i915#3297] / [i915#4880]) +1 other test skip
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-11/igt@gem_userptr_blits@map-fixed-invalidate-overlap.html
* igt@gen7_exec_parse@basic-allowed:
- shard-snb: NOTRUN -> [SKIP][66] ([fdo#109271]) +75 other tests skip
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-snb7/igt@gen7_exec_parse@basic-allowed.html
* igt@gen7_exec_parse@basic-offset:
- shard-dg2: NOTRUN -> [SKIP][67] ([fdo#109289]) +4 other tests skip
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-5/igt@gen7_exec_parse@basic-offset.html
* igt@gen7_exec_parse@oacontrol-tracking:
- shard-dg1: NOTRUN -> [SKIP][68] ([fdo#109289])
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg1-14/igt@gen7_exec_parse@oacontrol-tracking.html
* igt@gen9_exec_parse@allowed-all:
- shard-dg2: NOTRUN -> [SKIP][69] ([i915#2856]) +2 other tests skip
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-2/igt@gen9_exec_parse@allowed-all.html
* igt@gen9_exec_parse@secure-batches:
- shard-mtlp: NOTRUN -> [SKIP][70] ([i915#2856]) +1 other test skip
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-1/igt@gen9_exec_parse@secure-batches.html
* igt@i915_fb_tiling:
- shard-dg2: NOTRUN -> [SKIP][71] ([i915#4881])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-3/igt@i915_fb_tiling.html
* igt@i915_module_load@reload-with-fault-injection:
- shard-dg2: [PASS][72] -> [DMESG-WARN][73] ([i915#9559])
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7600/shard-dg2-11/igt@i915_module_load@reload-with-fault-injection.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-7/igt@i915_module_load@reload-with-fault-injection.html
* igt@i915_pm_freq_api@freq-basic-api:
- shard-tglu: NOTRUN -> [SKIP][74] ([i915#8399])
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-tglu-8/igt@i915_pm_freq_api@freq-basic-api.html
* igt@i915_pm_rps@basic-api:
- shard-mtlp: NOTRUN -> [SKIP][75] ([i915#6621])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-5/igt@i915_pm_rps@basic-api.html
- shard-dg2: NOTRUN -> [SKIP][76] ([i915#6621])
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-11/igt@i915_pm_rps@basic-api.html
* igt@kms_addfb_basic@addfb25-framebuffer-vs-set-tiling:
- shard-dg2: NOTRUN -> [SKIP][77] ([i915#4212])
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-11/igt@kms_addfb_basic@addfb25-framebuffer-vs-set-tiling.html
* igt@kms_addfb_basic@framebuffer-vs-set-tiling:
- shard-dg1: NOTRUN -> [SKIP][78] ([i915#4212])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg1-19/igt@kms_addfb_basic@framebuffer-vs-set-tiling.html
* igt@kms_async_flips@invalid-async-flip:
- shard-dg2: NOTRUN -> [SKIP][79] ([i915#6228])
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-3/igt@kms_async_flips@invalid-async-flip.html
* igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
- shard-glk: NOTRUN -> [SKIP][80] ([fdo#109271] / [i915#1769])
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-glk1/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
* igt@kms_big_fb@4-tiled-16bpp-rotate-90:
- shard-dg2: NOTRUN -> [SKIP][81] ([fdo#111614]) +1 other test skip
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-5/igt@kms_big_fb@4-tiled-16bpp-rotate-90.html
* igt@kms_big_fb@4-tiled-addfb-size-overflow:
- shard-dg1: NOTRUN -> [SKIP][82] ([i915#5286])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg1-16/igt@kms_big_fb@4-tiled-addfb-size-overflow.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
- shard-tglu: NOTRUN -> [SKIP][83] ([fdo#111615] / [i915#5286])
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-tglu-9/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0:
- shard-dg1: NOTRUN -> [SKIP][84] ([i915#4538] / [i915#5286]) +1 other test skip
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg1-19/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-mtlp: [PASS][85] -> [FAIL][86] ([i915#5138])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7600/shard-mtlp-7/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-5/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_big_fb@y-tiled-64bpp-rotate-270:
- shard-dg1: NOTRUN -> [SKIP][87] ([i915#3638])
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg1-17/igt@kms_big_fb@y-tiled-64bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-8bpp-rotate-180:
- shard-dg2: NOTRUN -> [SKIP][88] ([i915#5190]) +18 other tests skip
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-7/igt@kms_big_fb@y-tiled-8bpp-rotate-180.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
- shard-tglu: [PASS][89] -> [FAIL][90] ([i915#3743])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7600/shard-tglu-7/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-tglu-3/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
* igt@kms_big_fb@yf-tiled-16bpp-rotate-180:
- shard-dg1: NOTRUN -> [SKIP][91] ([i915#4538]) +1 other test skip
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg1-12/igt@kms_big_fb@yf-tiled-16bpp-rotate-180.html
* igt@kms_big_fb@yf-tiled-16bpp-rotate-90:
- shard-dg2: NOTRUN -> [SKIP][92] ([i915#4538] / [i915#5190]) +8 other tests skip
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-5/igt@kms_big_fb@yf-tiled-16bpp-rotate-90.html
- shard-tglu: NOTRUN -> [SKIP][93] ([fdo#111615])
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-tglu-3/igt@kms_big_fb@yf-tiled-16bpp-rotate-90.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
- shard-mtlp: NOTRUN -> [SKIP][94] ([fdo#111615]) +4 other tests skip
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-5/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
* igt@kms_big_joiner@invalid-modeset:
- shard-dg2: NOTRUN -> [SKIP][95] ([i915#2705])
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-11/igt@kms_big_joiner@invalid-modeset.html
- shard-dg1: NOTRUN -> [SKIP][96] ([i915#2705])
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg1-15/igt@kms_big_joiner@invalid-modeset.html
* igt@kms_cdclk@mode-transition-all-outputs:
- shard-dg2: NOTRUN -> [SKIP][97] ([i915#4087] / [i915#7213])
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-2/igt@kms_cdclk@mode-transition-all-outputs.html
* igt@kms_chamelium_color@ctm-0-75:
- shard-dg1: NOTRUN -> [SKIP][98] ([fdo#111827])
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg1-16/igt@kms_chamelium_color@ctm-0-75.html
* igt@kms_chamelium_color@ctm-limited-range:
- shard-mtlp: NOTRUN -> [SKIP][99] ([fdo#111827]) +1 other test skip
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-5/igt@kms_chamelium_color@ctm-limited-range.html
* igt@kms_chamelium_color@ctm-max:
- shard-dg2: NOTRUN -> [SKIP][100] ([fdo#111827]) +2 other tests skip
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-6/igt@kms_chamelium_color@ctm-max.html
* igt@kms_chamelium_frames@hdmi-crc-fast:
- shard-dg2: NOTRUN -> [SKIP][101] ([i915#7828]) +15 other tests skip
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-11/igt@kms_chamelium_frames@hdmi-crc-fast.html
- shard-tglu: NOTRUN -> [SKIP][102] ([i915#7828])
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-tglu-9/igt@kms_chamelium_frames@hdmi-crc-fast.html
* igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode:
- shard-dg1: NOTRUN -> [SKIP][103] ([i915#7828])
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg1-17/igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode.html
* igt@kms_chamelium_hpd@vga-hpd-enable-disable-mode:
- shard-mtlp: NOTRUN -> [SKIP][104] ([i915#7828])
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-6/igt@kms_chamelium_hpd@vga-hpd-enable-disable-mode.html
* igt@kms_content_protection@atomic:
- shard-tglu: NOTRUN -> [SKIP][105] ([i915#6944] / [i915#7116] / [i915#7118])
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-tglu-8/igt@kms_content_protection@atomic.html
* igt@kms_content_protection@type1:
- shard-dg2: NOTRUN -> [SKIP][106] ([i915#7118]) +1 other test skip
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-10/igt@kms_content_protection@type1.html
* igt@kms_content_protection@uevent@pipe-a-dp-4:
- shard-dg2: NOTRUN -> [FAIL][107] ([i915#1339])
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-11/igt@kms_content_protection@uevent@pipe-a-dp-4.html
* igt@kms_cursor_crc@cursor-offscreen-32x10:
- shard-dg2: NOTRUN -> [SKIP][108] ([i915#3555]) +9 other tests skip
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-2/igt@kms_cursor_crc@cursor-offscreen-32x10.html
- shard-mtlp: NOTRUN -> [SKIP][109] ([i915#3555] / [i915#8814])
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-5/igt@kms_cursor_crc@cursor-offscreen-32x10.html
* igt@kms_cursor_crc@cursor-onscreen-512x170:
- shard-dg2: NOTRUN -> [SKIP][110] ([i915#3359])
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-11/igt@kms_cursor_crc@cursor-onscreen-512x170.html
* igt@kms_cursor_crc@cursor-random-max-size:
- shard-glk: NOTRUN -> [SKIP][111] ([fdo#109271]) +95 other tests skip
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-glk3/igt@kms_cursor_crc@cursor-random-max-size.html
- shard-tglu: NOTRUN -> [SKIP][112] ([i915#3555])
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-tglu-9/igt@kms_cursor_crc@cursor-random-max-size.html
* igt@kms_cursor_crc@cursor-sliding-512x512:
- shard-dg1: NOTRUN -> [SKIP][113] ([i915#3359])
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg1-18/igt@kms_cursor_crc@cursor-sliding-512x512.html
* igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic:
- shard-snb: NOTRUN -> [SKIP][114] ([fdo#109271] / [fdo#111767]) +1 other test skip
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-snb5/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html
* igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
- shard-tglu: NOTRUN -> [SKIP][115] ([fdo#109274]) +1 other test skip
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-tglu-6/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- shard-dg2: NOTRUN -> [SKIP][116] ([i915#4103] / [i915#4213] / [i915#5608])
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-10/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic:
- shard-dg2: NOTRUN -> [SKIP][117] ([fdo#109274] / [i915#5354]) +7 other tests skip
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-10/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
- shard-dg2: NOTRUN -> [SKIP][118] ([i915#4103] / [i915#4213]) +2 other tests skip
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-6/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
- shard-dg1: NOTRUN -> [SKIP][119] ([i915#4103] / [i915#4213])
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg1-16/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html
* igt@kms_draw_crc@draw-method-mmap-wc:
- shard-dg2: NOTRUN -> [SKIP][120] ([i915#8812])
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-7/igt@kms_draw_crc@draw-method-mmap-wc.html
* igt@kms_dsc@dsc-fractional-bpp:
- shard-dg2: NOTRUN -> [SKIP][121] ([i915#3840] / [i915#9688])
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-2/igt@kms_dsc@dsc-fractional-bpp.html
* igt@kms_dsc@dsc-with-formats:
- shard-tglu: NOTRUN -> [SKIP][122] ([i915#3555] / [i915#3840])
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-tglu-10/igt@kms_dsc@dsc-with-formats.html
* igt@kms_flip@2x-flip-vs-fences:
- shard-dg2: NOTRUN -> [SKIP][123] ([i915#8381])
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-5/igt@kms_flip@2x-flip-vs-fences.html
* igt@kms_flip@2x-flip-vs-panning-vs-hang:
- shard-dg2: NOTRUN -> [SKIP][124] ([fdo#109274]) +6 other tests skip
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-3/igt@kms_flip@2x-flip-vs-panning-vs-hang.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling@pipe-a-valid-mode:
- shard-dg2: NOTRUN -> [SKIP][125] ([i915#2672]) +2 other tests skip
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-5/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling@pipe-a-default-mode:
- shard-mtlp: NOTRUN -> [SKIP][126] ([i915#3555] / [i915#8810])
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-7/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode:
- shard-dg2: NOTRUN -> [SKIP][127] ([i915#2672] / [i915#3555])
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-mmap-gtt:
- shard-dg1: NOTRUN -> [SKIP][128] ([i915#8708]) +1 other test skip
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg1-18/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-dg2: NOTRUN -> [SKIP][129] ([i915#8708]) +26 other tests skip
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-3/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt:
- shard-dg2: NOTRUN -> [FAIL][130] ([i915#6880])
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-11/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-render:
- shard-tglu: NOTRUN -> [SKIP][131] ([fdo#109280]) +6 other tests skip
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-tglu-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-pgflip-blt:
- shard-dg1: NOTRUN -> [SKIP][132] ([fdo#111825]) +4 other tests skip
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg1-12/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-move:
- shard-dg2: NOTRUN -> [SKIP][133] ([i915#5354]) +34 other tests skip
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-move.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-gtt:
- shard-tglu: NOTRUN -> [SKIP][134] ([fdo#110189]) +3 other tests skip
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-tglu-6/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move:
- shard-dg2: NOTRUN -> [SKIP][135] ([i915#3458]) +25 other tests skip
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt:
- shard-mtlp: NOTRUN -> [SKIP][136] ([i915#8708]) +2 other tests skip
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-5/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-blt:
- shard-dg1: NOTRUN -> [SKIP][137] ([i915#3458]) +3 other tests skip
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg1-14/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-mtlp: NOTRUN -> [SKIP][138] ([i915#1825]) +7 other tests skip
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-8/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_getfb@getfb-reject-ccs:
- shard-dg2: NOTRUN -> [SKIP][139] ([i915#6118])
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-7/igt@kms_getfb@getfb-reject-ccs.html
* igt@kms_hdr@static-swap:
- shard-dg2: NOTRUN -> [SKIP][140] ([i915#3555] / [i915#8228]) +1 other test skip
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-7/igt@kms_hdr@static-swap.html
* igt@kms_hdr@static-toggle:
- shard-mtlp: NOTRUN -> [SKIP][141] ([i915#3555] / [i915#8228])
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-1/igt@kms_hdr@static-toggle.html
* igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
- shard-dg2: NOTRUN -> [SKIP][142] ([i915#4816])
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-5/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
- shard-tglu: NOTRUN -> [SKIP][143] ([i915#1839])
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-tglu-3/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
* igt@kms_panel_fitting@atomic-fastset:
- shard-dg2: NOTRUN -> [SKIP][144] ([i915#6301])
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-7/igt@kms_panel_fitting@atomic-fastset.html
- shard-tglu: NOTRUN -> [SKIP][145] ([i915#6301])
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-tglu-6/igt@kms_panel_fitting@atomic-fastset.html
* igt@kms_plane_multiple@tiling-y:
- shard-dg2: NOTRUN -> [SKIP][146] ([i915#8806])
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-3/igt@kms_plane_multiple@tiling-y.html
* igt@kms_plane_scaling@intel-max-src-size:
- shard-dg2: NOTRUN -> [SKIP][147] ([i915#6953])
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-6/igt@kms_plane_scaling@intel-max-src-size.html
* igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-4:
- shard-dg1: NOTRUN -> [FAIL][148] ([i915#8292])
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg1-16/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-4.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-a-dp-4:
- shard-dg2: NOTRUN -> [SKIP][149] ([i915#5235]) +11 other tests skip
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-11/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-a-dp-4.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-b-edp-1:
- shard-mtlp: NOTRUN -> [SKIP][150] ([i915#5235]) +2 other tests skip
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-5/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-b-edp-1.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-d-edp-1:
- shard-mtlp: NOTRUN -> [SKIP][151] ([i915#3555] / [i915#5235])
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-5/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-d-edp-1.html
* igt@kms_prime@basic-crc-hybrid:
- shard-dg2: NOTRUN -> [SKIP][152] ([i915#6524] / [i915#6805])
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-7/igt@kms_prime@basic-crc-hybrid.html
* igt@kms_psr2_su@page_flip-nv12:
- shard-dg2: NOTRUN -> [SKIP][153] ([i915#9683]) +3 other tests skip
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-6/igt@kms_psr2_su@page_flip-nv12.html
- shard-mtlp: NOTRUN -> [SKIP][154] ([i915#4348])
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-8/igt@kms_psr2_su@page_flip-nv12.html
* igt@kms_psr@psr2_sprite_mmap_gtt:
- shard-dg2: NOTRUN -> [SKIP][155] ([i915#9681]) +4 other tests skip
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-5/igt@kms_psr@psr2_sprite_mmap_gtt.html
- shard-tglu: NOTRUN -> [SKIP][156] ([i915#9673]) +1 other test skip
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-tglu-3/igt@kms_psr@psr2_sprite_mmap_gtt.html
* igt@kms_psr@psr2_sprite_plane_onoff:
- shard-dg1: NOTRUN -> [SKIP][157] ([i915#9673])
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg1-15/igt@kms_psr@psr2_sprite_plane_onoff.html
* igt@kms_rotation_crc@primary-4-tiled-reflect-x-0:
- shard-tglu: NOTRUN -> [SKIP][158] ([i915#5289])
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-tglu-10/igt@kms_rotation_crc@primary-4-tiled-reflect-x-0.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
- shard-dg1: NOTRUN -> [SKIP][159] ([fdo#111615] / [i915#5289])
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg1-15/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html
* igt@kms_setmode@invalid-clone-single-crtc:
- shard-dg2: NOTRUN -> [SKIP][160] ([i915#3555] / [i915#4098]) +2 other tests skip
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-11/igt@kms_setmode@invalid-clone-single-crtc.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-dg2: NOTRUN -> [SKIP][161] ([i915#8623])
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-2/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
* igt@kms_universal_plane@cursor-fb-leak@pipe-a-edp-1:
- shard-mtlp: [PASS][162] -> [FAIL][163] ([i915#9196])
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7600/shard-mtlp-8/igt@kms_universal_plane@cursor-fb-leak@pipe-a-edp-1.html
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-2/igt@kms_universal_plane@cursor-fb-leak@pipe-a-edp-1.html
* igt@perf@global-sseu-config-invalid:
- shard-dg2: NOTRUN -> [SKIP][164] ([i915#7387]) +1 other test skip
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-5/igt@perf@global-sseu-config-invalid.html
* igt@perf@per-context-mode-unprivileged:
- shard-tglu: NOTRUN -> [SKIP][165] ([fdo#109289]) +1 other test skip
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-tglu-9/igt@perf@per-context-mode-unprivileged.html
* igt@perf@unprivileged-single-ctx-counters:
- shard-mtlp: NOTRUN -> [SKIP][166] ([fdo#109289])
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-6/igt@perf@unprivileged-single-ctx-counters.html
* igt@perf_pmu@event-wait@rcs0:
- shard-dg2: NOTRUN -> [SKIP][167] ([fdo#112283]) +1 other test skip
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-6/igt@perf_pmu@event-wait@rcs0.html
* igt@prime_udl:
- shard-dg2: NOTRUN -> [SKIP][168] ([fdo#109291])
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-5/igt@prime_udl.html
* igt@prime_vgem@basic-gtt:
- shard-dg2: NOTRUN -> [SKIP][169] ([i915#3708] / [i915#4077])
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-2/igt@prime_vgem@basic-gtt.html
* igt@prime_vgem@fence-flip-hang:
- shard-dg2: NOTRUN -> [SKIP][170] ([i915#3708])
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-6/igt@prime_vgem@fence-flip-hang.html
- shard-mtlp: NOTRUN -> [SKIP][171] ([i915#3708])
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-8/igt@prime_vgem@fence-flip-hang.html
* igt@v3d/v3d_mmap@mmap-bo:
- shard-mtlp: NOTRUN -> [SKIP][172] ([i915#2575]) +3 other tests skip
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-5/igt@v3d/v3d_mmap@mmap-bo.html
* igt@v3d/v3d_perfmon@get-values-invalid-pad:
- shard-dg1: NOTRUN -> [SKIP][173] ([i915#2575]) +3 other tests skip
[173]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg1-12/igt@v3d/v3d_perfmon@get-values-invalid-pad.html
* igt@v3d/v3d_submit_cl@simple-flush-cache:
- shard-dg2: NOTRUN -> [SKIP][174] ([i915#2575]) +18 other tests skip
[174]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-5/igt@v3d/v3d_submit_cl@simple-flush-cache.html
* igt@v3d/v3d_wait_bo@used-bo-0ns:
- shard-tglu: NOTRUN -> [SKIP][175] ([fdo#109315] / [i915#2575]) +1 other test skip
[175]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-tglu-8/igt@v3d/v3d_wait_bo@used-bo-0ns.html
* igt@vc4/vc4_lookup_fail@bad-color-write:
- shard-mtlp: NOTRUN -> [SKIP][176] ([i915#7711])
[176]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-7/igt@vc4/vc4_lookup_fail@bad-color-write.html
* igt@vc4/vc4_tiling@set-get:
- shard-dg2: NOTRUN -> [SKIP][177] ([i915#7711]) +7 other tests skip
[177]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-2/igt@vc4/vc4_tiling@set-get.html
#### Possible fixes ####
* igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-lmem0-lmem0:
- shard-dg2: [INCOMPLETE][178] ([i915#7297]) -> [PASS][179]
[178]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7600/shard-dg2-5/igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-lmem0-lmem0.html
[179]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-6/igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-lmem0-lmem0.html
* igt@gem_eio@wait-1us:
- shard-mtlp: [ABORT][180] ([i915#9414]) -> [PASS][181] +1 other test pass
[180]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7600/shard-mtlp-7/igt@gem_eio@wait-1us.html
[181]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-5/igt@gem_eio@wait-1us.html
* igt@gem_exec_endless@dispatch@bcs0:
- shard-dg1: [TIMEOUT][182] ([i915#3778]) -> [PASS][183]
[182]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7600/shard-dg1-14/igt@gem_exec_endless@dispatch@bcs0.html
[183]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg1-15/igt@gem_exec_endless@dispatch@bcs0.html
* igt@gem_lmem_swapping@smem-oom@lmem0:
- shard-dg2: [TIMEOUT][184] ([i915#5493]) -> [PASS][185]
[184]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7600/shard-dg2-6/igt@gem_lmem_swapping@smem-oom@lmem0.html
[185]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-10/igt@gem_lmem_swapping@smem-oom@lmem0.html
* igt@i915_selftest@live@gem_contexts:
- shard-mtlp: [DMESG-FAIL][186] ([i915#9579]) -> [PASS][187]
[186]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7600/shard-mtlp-6/igt@i915_selftest@live@gem_contexts.html
[187]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-8/igt@i915_selftest@live@gem_contexts.html
* igt@kms_big_fb@4-tiled-64bpp-rotate-180:
- shard-mtlp: [FAIL][188] ([i915#5138]) -> [PASS][189]
[188]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7600/shard-mtlp-4/igt@kms_big_fb@4-tiled-64bpp-rotate-180.html
[189]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-7/igt@kms_big_fb@4-tiled-64bpp-rotate-180.html
* igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
- shard-tglu: [FAIL][190] ([i915#3743]) -> [PASS][191] +3 other tests pass
[190]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7600/shard-tglu-7/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
[191]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-tglu-7/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
* igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite:
- shard-dg2: [FAIL][192] ([i915#6880]) -> [PASS][193] +1 other test pass
[192]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7600/shard-dg2-11/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite.html
[193]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-11/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite.html
* igt@kms_universal_plane@cursor-fb-leak@pipe-c-edp-1:
- shard-mtlp: [FAIL][194] ([i915#9196]) -> [PASS][195]
[194]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7600/shard-mtlp-8/igt@kms_universal_plane@cursor-fb-leak@pipe-c-edp-1.html
[195]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-2/igt@kms_universal_plane@cursor-fb-leak@pipe-c-edp-1.html
* igt@perf_pmu@multi-client@vcs0:
- shard-mtlp: [FAIL][196] ([i915#4349]) -> [PASS][197]
[196]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7600/shard-mtlp-1/igt@perf_pmu@multi-client@vcs0.html
[197]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-mtlp-6/igt@perf_pmu@multi-client@vcs0.html
#### Warnings ####
* igt@perf@non-zero-reason@0-rcs0:
- shard-dg2: [FAIL][198] ([i915#7484]) -> [ABORT][199] ([i915#7941])
[198]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7600/shard-dg2-7/igt@perf@non-zero-reason@0-rcs0.html
[199]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/shard-dg2-6/igt@perf@non-zero-reason@0-rcs0.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111767]: https://bugs.freedesktop.org/show_bug.cgi?id=111767
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
[i915#1099]: https://gitlab.freedesktop.org/drm/intel/issues/1099
[i915#1339]: https://gitlab.freedesktop.org/drm/intel/issues/1339
[i915#1769]: https://gitlab.freedesktop.org/drm/intel/issues/1769
[i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
[i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
[i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
[i915#284]: https://gitlab.freedesktop.org/drm/intel/issues/284
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3743]: https://gitlab.freedesktop.org/drm/intel/issues/3743
[i915#3778]: https://gitlab.freedesktop.org/drm/intel/issues/3778
[i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
[i915#3936]: https://gitlab.freedesktop.org/drm/intel/issues/3936
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4087]: https://gitlab.freedesktop.org/drm/intel/issues/4087
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4281]: https://gitlab.freedesktop.org/drm/intel/issues/4281
[i915#4348]: https://gitlab.freedesktop.org/drm/intel/issues/4348
[i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349
[i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391
[i915#4423]: https://gitlab.freedesktop.org/drm/intel/issues/4423
[i915#4537]: https://gitlab.freedesktop.org/drm/intel/issues/4537
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#4565]: https://gitlab.freedesktop.org/drm/intel/issues/4565
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771
[i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
[i915#4816]: https://gitlab.freedesktop.org/drm/intel/issues/4816
[i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
[i915#4854]: https://gitlab.freedesktop.org/drm/intel/issues/4854
[i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
[i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880
[i915#4881]: https://gitlab.freedesktop.org/drm/intel/issues/4881
[i915#4885]: https://gitlab.freedesktop.org/drm/intel/issues/4885
[i915#5030]: https://gitlab.freedesktop.org/drm/intel/issues/5030
[i915#5138]: https://gitlab.freedesktop.org/drm/intel/issues/5138
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#5493]: https://gitlab.freedesktop.org/drm/intel/issues/5493
[i915#5608]: https://gitlab.freedesktop.org/drm/intel/issues/5608
[i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6118]: https://gitlab.freedesktop.org/drm/intel/issues/6118
[i915#6122]: https://gitlab.freedesktop.org/drm/intel/issues/6122
[i915#6228]: https://gitlab.freedesktop.org/drm/intel/issues/6228
[i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
[i915#6334]: https://gitlab.freedesktop.org/drm/intel/issues/6334
[i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6805]: https://gitlab.freedesktop.org/drm/intel/issues/6805
[i915#6880]: https://gitlab.freedesktop.org/drm/intel/issues/6880
[i915#6944]: https://gitlab.freedesktop.org/drm/intel/issues/6944
[i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953
[i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
[i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
[i915#7213]: https://gitlab.freedesktop.org/drm/intel/issues/7213
[i915#7297]: https://gitlab.freedesktop.org/drm/intel/issues/7297
[i915#7387]: https://gitlab.freedesktop.org/drm/intel/issues/7387
[i915#7484]: https://gitlab.freedesktop.org/drm/intel/issues/7484
[i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697
[i915#7707]: https://gitlab.freedesktop.org/drm/intel/issues/7707
[i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#7941]: https://gitlab.freedesktop.org/drm/intel/issues/7941
[i915#8228]: https://gitlab.freedesktop.org/drm/intel/issues/8228
[i915#8289]: https://gitlab.freedesktop.org/drm/intel/issues/8289
[i915#8292]: https://gitlab.freedesktop.org/drm/intel/issues/8292
[i915#8381]: https://gitlab.freedesktop.org/drm/intel/issues/8381
[i915#8399]: https://gitlab.freedesktop.org/drm/intel/issues/8399
[i915#8411]: https://gitlab.freedesktop.org/drm/intel/issues/8411
[i915#8414]: https://gitlab.freedesktop.org/drm/intel/issues/8414
[i915#8555]: https://gitlab.freedesktop.org/drm/intel/issues/8555
[i915#8623]: https://gitlab.freedesktop.org/drm/intel/issues/8623
[i915#8708]: https://gitlab.freedesktop.org/drm/intel/issues/8708
[i915#8717]: https://gitlab.freedesktop.org/drm/intel/issues/8717
[i915#8797]: https://gitlab.freedesktop.org/drm/intel/issues/8797
[i915#8806]: https://gitlab.freedesktop.org/drm/intel/issues/8806
[i915#8810]: https://gitlab.freedesktop.org/drm/intel/issues/8810
[i915#8812]: https://gitlab.freedesktop.org/drm/intel/issues/8812
[i915#8814]: https://gitlab.freedesktop.org/drm/intel/issues/8814
[i915#9053]: https://gitlab.freedesktop.org/drm/intel/issues/9053
[i915#9196]: https://gitlab.freedesktop.org/drm/intel/issues/9196
[i915#9318]: https://gitlab.freedesktop.org/drm/intel/issues/9318
[i915#9337]: https://gitlab.freedesktop.org/drm/intel/issues/9337
[i915#9414]: https://gitlab.freedesktop.org/drm/intel/issues/9414
[i915#9423]: https://gitlab.freedesktop.org/drm/intel/issues/9423
[i915#9519]: https://gitlab.freedesktop.org/drm/intel/issues/9519
[i915#9559]: https://gitlab.freedesktop.org/drm/intel/issues/9559
[i915#9579]: https://gitlab.freedesktop.org/drm/intel/issues/9579
[i915#9653]: https://gitlab.freedesktop.org/drm/intel/issues/9653
[i915#9673]: https://gitlab.freedesktop.org/drm/intel/issues/9673
[i915#9681]: https://gitlab.freedesktop.org/drm/intel/issues/9681
[i915#9683]: https://gitlab.freedesktop.org/drm/intel/issues/9683
[i915#9688]: https://gitlab.freedesktop.org/drm/intel/issues/9688
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_7600 -> IGTPW_10256
CI-20190529: 20190529
CI_DRM_13915: c0af28b1cf46b747e6b741af1c9e7362e78805b6 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_10256: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/index.html
IGT_7600: b889fd01780dc79f6fcc8545346c81f5c79f5efb @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10256/index.html
[-- Attachment #2: Type: text/html, Size: 65989 bytes --]
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [igt-dev] [PATCH v4 i-g-t 1/2] lib/xe/xe_query: xe_visible_available_vram_size helper
2023-11-23 15:08 ` [igt-dev] [PATCH v4 i-g-t 1/2] lib/xe/xe_query: xe_visible_available_vram_size helper Marcin Bernatowicz
@ 2023-11-27 17:15 ` Kamil Konieczny
0 siblings, 0 replies; 12+ messages in thread
From: Kamil Konieczny @ 2023-11-27 17:15 UTC (permalink / raw)
To: igt-dev; +Cc: adam.miszczak, matthew.auld, Marcin Bernatowicz,
jakub1.kolakowski
Hi Marcin,
On 2023-11-23 at 16:08:22 +0100, Marcin Bernatowicz wrote:
> Added 'xe_visible_available_vram_size' helper function
> to query the available CPU-visible VRAM size.
>
> Also, renamed 'xe_vram_available' to 'xe_available_vram_size'
> for consistency with other function names.
>
> Cc: Francois Dugast <francois.dugast@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> Cc: Laguna, Lukasz <lukasz.laguna@intel.com>
----- ^ ----- ^
This should be in other order:
> Cc: Lukasz Laguna <lukasz.laguna@intel.com>
With that:
Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
> Signed-off-by: Marcin Bernatowicz <marcin.bernatowicz@intel.com>
> ---
> lib/xe/xe_query.c | 57 ++++++++++++++++++++++++++++----------
> lib/xe/xe_query.h | 3 +-
> tests/intel/xe_evict_ccs.c | 2 +-
> 3 files changed, 46 insertions(+), 16 deletions(-)
>
> diff --git a/lib/xe/xe_query.c b/lib/xe/xe_query.c
> index afd443be3..eb4759094 100644
> --- a/lib/xe/xe_query.c
> +++ b/lib/xe/xe_query.c
> @@ -629,20 +629,20 @@ uint64_t xe_visible_vram_size(int fd, int gt)
>
> return visible_size;
> }
> -/**
> - * xe_vram_available:
> - * @fd: xe device fd
> - * @gt: gt
> - *
> - * Returns available vram of xe device @fd and @gt.
> - */
> -uint64_t xe_vram_available(int fd, int gt)
> +
> +struct __available_vram {
> + uint64_t total_available;
> + uint64_t cpu_visible_available;
> +};
> +
> +static void __available_vram_size_snapshot(int fd, int gt, struct __available_vram *vram)
> {
> struct xe_device *xe_dev;
> int region_idx;
> struct drm_xe_query_mem_region *mem_region;
> struct drm_xe_query_mem_regions *mem_regions;
>
> + igt_assert(vram);
> xe_dev = find_in_cache(fd);
> igt_assert(xe_dev);
>
> @@ -650,19 +650,48 @@ uint64_t xe_vram_available(int fd, int gt)
> mem_region = &xe_dev->mem_regions->regions[region_idx];
>
> if (XE_IS_CLASS_VRAM(mem_region)) {
> - uint64_t available_vram;
> -
> mem_regions = xe_query_mem_regions_new(fd);
> pthread_mutex_lock(&cache.cache_mutex);
> mem_region->used = mem_regions->regions[region_idx].used;
> - available_vram = mem_region->total_size - mem_region->used;
> + mem_region->cpu_visible_used = mem_regions->regions[region_idx].cpu_visible_used;
> + vram->total_available = mem_region->total_size - mem_region->used;
> + vram->cpu_visible_available =
> + mem_region->cpu_visible_size - mem_region->cpu_visible_used;
> pthread_mutex_unlock(&cache.cache_mutex);
> free(mem_regions);
> -
> - return available_vram;
> }
> +}
>
> - return 0;
> +/**
> + * xe_available_vram_size:
> + * @fd: xe device fd
> + * @gt: gt
> + *
> + * Returns size of available vram of xe device @fd and @gt.
> + */
> +uint64_t xe_available_vram_size(int fd, int gt)
> +{
> + struct __available_vram vram = {};
> +
> + __available_vram_size_snapshot(fd, gt, &vram);
> +
> + return vram.total_available;
> +}
> +
> +/**
> + * xe_visible_available_vram_size:
> + * @fd: xe device fd
> + * @gt: gt
> + *
> + * Returns size of visible available vram of xe device @fd and @gt.
> + */
> +uint64_t xe_visible_available_vram_size(int fd, int gt)
> +{
> + struct __available_vram vram = {};
> +
> + __available_vram_size_snapshot(fd, gt, &vram);
> +
> + return vram.cpu_visible_available;
> }
>
> /**
> diff --git a/lib/xe/xe_query.h b/lib/xe/xe_query.h
> index 38e9aa440..503d60b44 100644
> --- a/lib/xe/xe_query.h
> +++ b/lib/xe/xe_query.h
> @@ -92,7 +92,8 @@ unsigned int xe_number_hw_engines(int fd);
> bool xe_has_vram(int fd);
> uint64_t xe_vram_size(int fd, int gt);
> uint64_t xe_visible_vram_size(int fd, int gt);
> -uint64_t xe_vram_available(int fd, int gt);
> +uint64_t xe_available_vram_size(int fd, int gt);
> +uint64_t xe_visible_available_vram_size(int fd, int gt);
> uint32_t xe_get_default_alignment(int fd);
> uint32_t xe_va_bits(int fd);
> uint16_t xe_dev_id(int fd);
> diff --git a/tests/intel/xe_evict_ccs.c b/tests/intel/xe_evict_ccs.c
> index d7244f620..b04c20935 100644
> --- a/tests/intel/xe_evict_ccs.c
> +++ b/tests/intel/xe_evict_ccs.c
> @@ -325,7 +325,7 @@ static void set_config(int fd, uint32_t flags, const struct param *param,
> config->param = param;
> config->flags = flags;
> config->free_mb = xe_visible_vram_size(fd, 0) / SZ_1M;
> - config->total_mb = xe_vram_available(fd, 0) / SZ_1M;
> + config->total_mb = xe_available_vram_size(fd, 0) / SZ_1M;
> config->test_mb = min_t(int, config->free_mb * config->param->vram_percent / 100,
> config->total_mb * config->param->vram_percent / 100);
>
> --
> 2.31.1
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [igt-dev] [PATCH v4 i-g-t 2/2] tests/intel/xe_create: create-big-vram subtest
2023-11-23 18:50 ` Bernatowicz, Marcin
@ 2023-11-29 17:56 ` Kamil Konieczny
2023-11-30 10:11 ` Bernatowicz, Marcin
0 siblings, 1 reply; 12+ messages in thread
From: Kamil Konieczny @ 2023-11-29 17:56 UTC (permalink / raw)
To: igt-dev; +Cc: adam.miszczak, matthew.auld, Marcin Bernatowicz,
jakub1.kolakowski
Hi Marcin,
On 2023-11-23 at 19:50:31 +0100, Bernatowicz, Marcin wrote:
> Hi,
>
> On 11/23/2023 6:24 PM, Kamil Konieczny wrote:
> > Hi Marcin,
> > On 2023-11-23 at 16:08:23 +0100, Marcin Bernatowicz wrote:
> > > Validates the creation of significant Buffer Object (BO) within VRAM,
> > > considering the entire available CPU-visible VRAM size.
> > > The size of the created BO can be adjusted using command line
> > > parameters, with '-S' representing BO size in MB,
> > > and '-p' representing BO size as a percentage of the VRAM size.
> > >
> > > v2: rebased, updated to uAPI changes (DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT),
> > > after review corrections: 1024UL -> 1024ULL,
> > > int -> unsigned int (Kamil)
> > >
> > > v3: provided a flag to allocate the memory within the CPU-visible
> > > portion of VRAM (Matt)
> > > __create_bo replaced with xe_bo_create_flags (Lukasz)
> > > removed the percent command line parameter (Lukasz)
> > > renamed size_MB to size_mb (Lukasz)
> > > added helper function to query available CPU-visible VRAM size,
> > > renamed 'xe_vram_available' to 'xe_available_vram_size' for
> > > consistency with other function names
> > >
> > > v4: split lib and test changes into separate patches (Lukasz, Kamil)
> > > added prefixes to titles (Kamil)
> > > restored percent command line parameter (Kamil)
> > > whitespace correction (Kamil)
> > >
> > > Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
> > > Cc: Laguna, Lukasz <lukasz.laguna@intel.com>
> > > Cc: Matthew Auld <matthew.auld@intel.com>
> > > Signed-off-by: Marcin Bernatowicz <marcin.bernatowicz@intel.com>
> > > ---
> > > tests/intel/xe_create.c | 84 ++++++++++++++++++++++++++++++++++++++++-
> > > 1 file changed, 83 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/tests/intel/xe_create.c b/tests/intel/xe_create.c
> > > index f4633cfb3..194c677ee 100644
> > > --- a/tests/intel/xe_create.c
> > > +++ b/tests/intel/xe_create.c
> > > @@ -18,6 +18,14 @@
> > > #define PAGE_SIZE 0x1000
> > > +static struct param {
> > > + unsigned int size_mb;
> > > + unsigned int vram_percent;
> > > +} params = {
> > > + .size_mb = 0,
> > > + .vram_percent = 0,
> > > +};
> > > +
> > > static int __create_bo(int fd, uint32_t vm, uint64_t size, uint32_t flags,
> > > uint32_t *handlep)
> > > {
> > > @@ -214,7 +222,78 @@ static void create_massive_size(int fd)
> > > }
> > > }
> > > -igt_main
> > > +/**
> > > + * SUBTEST: create-big-vram
> > > + * Functionality: BO creation
> > > + * Test category: functionality test
> > > + * Description: Verifies the creation of substantial BO within VRAM,
> > > + * constituting all available CPU-visible VRAM.
> > > + */
> > > +static void create_big_vram(int fd)
> > > +{
> > > + uint64_t bo_size, size, visible_avail_size, alignment;
> > > + uint32_t bo_handle;
> > > + char *bo_ptr = NULL;
> > > + uint64_t vm = 0;
> > > + int gt;
> > > +
> > > + igt_require(xe_has_vram(fd));
> > > + alignment = xe_get_default_alignment(fd);
> > > + vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT, 0);
> > > +
> > > + xe_for_each_gt(fd, gt) {
> > > + visible_avail_size = xe_visible_available_vram_size(fd, gt);
> >
> > Skip (continue) if == 0?
>
> Do we expect it to be zero ?
>
It do not to be here, it can be added below.
> >
> > > + bo_size = params.size_mb
> > > + ? params.size_mb * 1024ULL * 1024ULL
> > > + : params.vram_percent
> > > + ? ALIGN(visible_avail_size * params.vram_percent / 100, alignment)
> > > + : ALIGN_DOWN(visible_avail_size, alignment);
> > > + igt_info("gt%u bo_size=%lu visible_available_vram_size=%lu\n",
> > > + gt, bo_size, visible_avail_size);
> > > +
> >
> > Should it skip if calculated bo_size == 0?
> > In case of skips you can make it dynamic or count number
> > of performed tests (it should be > 0).
>
> Is it expected to be zero ? I would just let it go (and fail).
>
> --
> marcin
> >
> > Regards,
> > Kamil
> >
> > > + bo_handle = xe_bo_create_flags(fd, vm, bo_size, visible_vram_memory(fd, gt));
> > > + bo_ptr = xe_bo_map(fd, bo_handle, bo_size);
Please add assert here:
igt_assert(bo_ptr);
> > > +
> > > + size = bo_size - 1;
Here imho you should add
igt_assert_lt_u64(SZ_64K, size);
Point is you will not test anything if size is too small.
Regards,
Kamil
> > > + while (size > SZ_64K) {
> > > + igt_assert_eq(0, READ_ONCE(bo_ptr[size]));
> > > + WRITE_ONCE(bo_ptr[size], 'A');
> > > + igt_assert_eq('A', READ_ONCE(bo_ptr[size]));
> > > + size >>= 1;
> > > + }
> > > + igt_assert_eq(0, bo_ptr[0]);
> > > +
> > > + munmap(bo_ptr, bo_size);
> > > + gem_close(fd, bo_handle);
> > > + }
> > > +
> > > + xe_vm_destroy(fd, vm);
> > > +}
> > > +
> > > +static int opt_handler(int opt, int opt_index, void *data)
> > > +{
> > > + switch (opt) {
> > > + case 'S':
> > > + params.size_mb = atoi(optarg);
> > > + igt_debug("Size MB: %d\n", params.size_mb);
> > > + break;
> > > + case 'p':
> > > + params.vram_percent = atoi(optarg);
> > > + igt_debug("Percent of VRAM: %d\n", params.vram_percent);
> > > + break;
> > > + default:
> > > + return IGT_OPT_HANDLER_ERROR;
> > > + }
> > > +
> > > + return IGT_OPT_HANDLER_SUCCESS;
> > > +}
> > > +
> > > +const char *help_str =
> > > + " -S\tBO size in MB\n"
> > > + " -p\tPercent of VRAM for BO\n"
> > > + ;
> > > +
> > > +igt_main_args("S:p:", NULL, help_str, opt_handler, NULL)
> > > {
> > > int xe;
> > > @@ -253,6 +332,9 @@ igt_main
> > > igt_waitchildren();
> > > }
> > > + igt_subtest("create-big-vram") {
> > > + create_big_vram(xe);
> > > + }
> > > igt_fixture
> > > drm_close_driver(xe);
> > > --
> > > 2.31.1
> > >
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [igt-dev] [PATCH v4 i-g-t 2/2] tests/intel/xe_create: create-big-vram subtest
2023-11-29 17:56 ` Kamil Konieczny
@ 2023-11-30 10:11 ` Bernatowicz, Marcin
2023-11-30 12:49 ` Kamil Konieczny
0 siblings, 1 reply; 12+ messages in thread
From: Bernatowicz, Marcin @ 2023-11-30 10:11 UTC (permalink / raw)
To: Kamil Konieczny, igt-dev, Marcin Bernatowicz, matthew.auld,
francois.dugast, zbigniew.kempczynski, lukasz.laguna,
adam.miszczak, jakub1.kolakowski
Hi,
On 11/29/2023 6:56 PM, Kamil Konieczny wrote:
> Hi Marcin,
>
> On 2023-11-23 at 19:50:31 +0100, Bernatowicz, Marcin wrote:
>> Hi,
>>
>> On 11/23/2023 6:24 PM, Kamil Konieczny wrote:
>>> Hi Marcin,
>>> On 2023-11-23 at 16:08:23 +0100, Marcin Bernatowicz wrote:
>>>> Validates the creation of significant Buffer Object (BO) within VRAM,
>>>> considering the entire available CPU-visible VRAM size.
>>>> The size of the created BO can be adjusted using command line
>>>> parameters, with '-S' representing BO size in MB,
>>>> and '-p' representing BO size as a percentage of the VRAM size.
>>>>
>>>> v2: rebased, updated to uAPI changes (DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT),
>>>> after review corrections: 1024UL -> 1024ULL,
>>>> int -> unsigned int (Kamil)
>>>>
>>>> v3: provided a flag to allocate the memory within the CPU-visible
>>>> portion of VRAM (Matt)
>>>> __create_bo replaced with xe_bo_create_flags (Lukasz)
>>>> removed the percent command line parameter (Lukasz)
>>>> renamed size_MB to size_mb (Lukasz)
>>>> added helper function to query available CPU-visible VRAM size,
>>>> renamed 'xe_vram_available' to 'xe_available_vram_size' for
>>>> consistency with other function names
>>>>
>>>> v4: split lib and test changes into separate patches (Lukasz, Kamil)
>>>> added prefixes to titles (Kamil)
>>>> restored percent command line parameter (Kamil)
>>>> whitespace correction (Kamil)
>>>>
>>>> Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
>>>> Cc: Laguna, Lukasz <lukasz.laguna@intel.com>
>>>> Cc: Matthew Auld <matthew.auld@intel.com>
>>>> Signed-off-by: Marcin Bernatowicz <marcin.bernatowicz@intel.com>
>>>> ---
>>>> tests/intel/xe_create.c | 84 ++++++++++++++++++++++++++++++++++++++++-
>>>> 1 file changed, 83 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/tests/intel/xe_create.c b/tests/intel/xe_create.c
>>>> index f4633cfb3..194c677ee 100644
>>>> --- a/tests/intel/xe_create.c
>>>> +++ b/tests/intel/xe_create.c
>>>> @@ -18,6 +18,14 @@
>>>> #define PAGE_SIZE 0x1000
>>>> +static struct param {
>>>> + unsigned int size_mb;
>>>> + unsigned int vram_percent;
>>>> +} params = {
>>>> + .size_mb = 0,
>>>> + .vram_percent = 0,
>>>> +};
>>>> +
>>>> static int __create_bo(int fd, uint32_t vm, uint64_t size, uint32_t flags,
>>>> uint32_t *handlep)
>>>> {
>>>> @@ -214,7 +222,78 @@ static void create_massive_size(int fd)
>>>> }
>>>> }
>>>> -igt_main
>>>> +/**
>>>> + * SUBTEST: create-big-vram
>>>> + * Functionality: BO creation
>>>> + * Test category: functionality test
>>>> + * Description: Verifies the creation of substantial BO within VRAM,
>>>> + * constituting all available CPU-visible VRAM.
>>>> + */
>>>> +static void create_big_vram(int fd)
>>>> +{
>>>> + uint64_t bo_size, size, visible_avail_size, alignment;
>>>> + uint32_t bo_handle;
>>>> + char *bo_ptr = NULL;
>>>> + uint64_t vm = 0;
>>>> + int gt;
>>>> +
>>>> + igt_require(xe_has_vram(fd));
>>>> + alignment = xe_get_default_alignment(fd);
>>>> + vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT, 0);
>>>> +
>>>> + xe_for_each_gt(fd, gt) {
>>>> + visible_avail_size = xe_visible_available_vram_size(fd, gt);
>>>
>>> Skip (continue) if == 0?
>>
>> Do we expect it to be zero ?
>>
>
> It do not to be here, it can be added below.
>
>>>
>>>> + bo_size = params.size_mb
>>>> + ? params.size_mb * 1024ULL * 1024ULL
>>>> + : params.vram_percent
>>>> + ? ALIGN(visible_avail_size * params.vram_percent / 100, alignment)
>>>> + : ALIGN_DOWN(visible_avail_size, alignment);
I'll simplify the bo_size to:
bo_size = params.size_mb ? params.size_mb * 1024ULL * 1024ULL
: ALIGN_DOWN(visible_avail_size * params.vram_percent / 100,
alignment);
with vram_percent defaulting to 100.
>>>> + igt_info("gt%u bo_size=%lu visible_available_vram_size=%lu\n",
>>>> + gt, bo_size, visible_avail_size);
>>>> +
>>>
>>> Should it skip if calculated bo_size == 0?
>>> In case of skips you can make it dynamic or count number
>>> of performed tests (it should be > 0).
>>
>> Is it expected to be zero ? I would just let it go (and fail).
>>
>> --
>> marcin
>>>
>>> Regards,
>>> Kamil
>>>
>>>> + bo_handle = xe_bo_create_flags(fd, vm, bo_size, visible_vram_memory(fd, gt));
>>>> + bo_ptr = xe_bo_map(fd, bo_handle, bo_size);
>
> Please add assert here:
> igt_assert(bo_ptr);
xe_bo_map asserts if mmap fails
>
>>>> +
>>>> + size = bo_size - 1;
>
> Here imho you should add
> igt_assert_lt_u64(SZ_64K, size);
>
> Point is you will not test anything if size is too small.
There will be no write, but still we have a check for zero value read at
index 0 (the assert after while).
I think SZ_64K is the minimum page size for vram, so perhaps we would
fail earlier on xe_bo_create (due to visible_vram_memory returning 0?).
I'll split the check per gt with dynamic subtests in case any gt's
visible available vram returns 0. I'm contemplating using a skip instead
of an assert in such cases, as it might be more appropriate. What are
your thoughts on this approach?
--
marcin
>
> Regards,
> Kamil
>
>>>> + while (size > SZ_64K) {
>>>> + igt_assert_eq(0, READ_ONCE(bo_ptr[size]));
>>>> + WRITE_ONCE(bo_ptr[size], 'A');
>>>> + igt_assert_eq('A', READ_ONCE(bo_ptr[size]));
>>>> + size >>= 1;
>>>> + }
>>>> + igt_assert_eq(0, bo_ptr[0]);
>>>> +
>>>> + munmap(bo_ptr, bo_size);
>>>> + gem_close(fd, bo_handle);
>>>> + }
>>>> +
>>>> + xe_vm_destroy(fd, vm);
>>>> +}
>>>> +
>>>> +static int opt_handler(int opt, int opt_index, void *data)
>>>> +{
>>>> + switch (opt) {
>>>> + case 'S':
>>>> + params.size_mb = atoi(optarg);
>>>> + igt_debug("Size MB: %d\n", params.size_mb);
>>>> + break;
>>>> + case 'p':
>>>> + params.vram_percent = atoi(optarg);
>>>> + igt_debug("Percent of VRAM: %d\n", params.vram_percent);
>>>> + break;
>>>> + default:
>>>> + return IGT_OPT_HANDLER_ERROR;
>>>> + }
>>>> +
>>>> + return IGT_OPT_HANDLER_SUCCESS;
>>>> +}
>>>> +
>>>> +const char *help_str =
>>>> + " -S\tBO size in MB\n"
>>>> + " -p\tPercent of VRAM for BO\n"
>>>> + ;
>>>> +
>>>> +igt_main_args("S:p:", NULL, help_str, opt_handler, NULL)
>>>> {
>>>> int xe;
>>>> @@ -253,6 +332,9 @@ igt_main
>>>> igt_waitchildren();
>>>> }
>>>> + igt_subtest("create-big-vram") {
>>>> + create_big_vram(xe);
>>>> + }
>>>> igt_fixture
>>>> drm_close_driver(xe);
>>>> --
>>>> 2.31.1
>>>>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [igt-dev] [PATCH v4 i-g-t 2/2] tests/intel/xe_create: create-big-vram subtest
2023-11-30 10:11 ` Bernatowicz, Marcin
@ 2023-11-30 12:49 ` Kamil Konieczny
0 siblings, 0 replies; 12+ messages in thread
From: Kamil Konieczny @ 2023-11-30 12:49 UTC (permalink / raw)
To: igt-dev; +Cc: adam.miszczak, matthew.auld, Marcin Bernatowicz,
jakub1.kolakowski
Hi Marcin,
On 2023-11-30 at 11:11:21 +0100, Bernatowicz, Marcin wrote:
> Hi,
>
> On 11/29/2023 6:56 PM, Kamil Konieczny wrote:
> > Hi Marcin,
> >
> > On 2023-11-23 at 19:50:31 +0100, Bernatowicz, Marcin wrote:
> > > Hi,
> > >
> > > On 11/23/2023 6:24 PM, Kamil Konieczny wrote:
> > > > Hi Marcin,
> > > > On 2023-11-23 at 16:08:23 +0100, Marcin Bernatowicz wrote:
> > > > > Validates the creation of significant Buffer Object (BO) within VRAM,
> > > > > considering the entire available CPU-visible VRAM size.
> > > > > The size of the created BO can be adjusted using command line
> > > > > parameters, with '-S' representing BO size in MB,
> > > > > and '-p' representing BO size as a percentage of the VRAM size.
> > > > >
> > > > > v2: rebased, updated to uAPI changes (DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT),
> > > > > after review corrections: 1024UL -> 1024ULL,
> > > > > int -> unsigned int (Kamil)
> > > > >
> > > > > v3: provided a flag to allocate the memory within the CPU-visible
> > > > > portion of VRAM (Matt)
> > > > > __create_bo replaced with xe_bo_create_flags (Lukasz)
> > > > > removed the percent command line parameter (Lukasz)
> > > > > renamed size_MB to size_mb (Lukasz)
> > > > > added helper function to query available CPU-visible VRAM size,
> > > > > renamed 'xe_vram_available' to 'xe_available_vram_size' for
> > > > > consistency with other function names
> > > > >
> > > > > v4: split lib and test changes into separate patches (Lukasz, Kamil)
> > > > > added prefixes to titles (Kamil)
> > > > > restored percent command line parameter (Kamil)
> > > > > whitespace correction (Kamil)
> > > > >
> > > > > Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
> > > > > Cc: Laguna, Lukasz <lukasz.laguna@intel.com>
> > > > > Cc: Matthew Auld <matthew.auld@intel.com>
> > > > > Signed-off-by: Marcin Bernatowicz <marcin.bernatowicz@intel.com>
> > > > > ---
> > > > > tests/intel/xe_create.c | 84 ++++++++++++++++++++++++++++++++++++++++-
> > > > > 1 file changed, 83 insertions(+), 1 deletion(-)
> > > > >
> > > > > diff --git a/tests/intel/xe_create.c b/tests/intel/xe_create.c
> > > > > index f4633cfb3..194c677ee 100644
> > > > > --- a/tests/intel/xe_create.c
> > > > > +++ b/tests/intel/xe_create.c
> > > > > @@ -18,6 +18,14 @@
> > > > > #define PAGE_SIZE 0x1000
> > > > > +static struct param {
> > > > > + unsigned int size_mb;
> > > > > + unsigned int vram_percent;
> > > > > +} params = {
> > > > > + .size_mb = 0,
> > > > > + .vram_percent = 0,
> > > > > +};
> > > > > +
> > > > > static int __create_bo(int fd, uint32_t vm, uint64_t size, uint32_t flags,
> > > > > uint32_t *handlep)
> > > > > {
> > > > > @@ -214,7 +222,78 @@ static void create_massive_size(int fd)
> > > > > }
> > > > > }
> > > > > -igt_main
> > > > > +/**
> > > > > + * SUBTEST: create-big-vram
> > > > > + * Functionality: BO creation
> > > > > + * Test category: functionality test
> > > > > + * Description: Verifies the creation of substantial BO within VRAM,
> > > > > + * constituting all available CPU-visible VRAM.
> > > > > + */
> > > > > +static void create_big_vram(int fd)
> > > > > +{
> > > > > + uint64_t bo_size, size, visible_avail_size, alignment;
> > > > > + uint32_t bo_handle;
> > > > > + char *bo_ptr = NULL;
> > > > > + uint64_t vm = 0;
> > > > > + int gt;
> > > > > +
> > > > > + igt_require(xe_has_vram(fd));
> > > > > + alignment = xe_get_default_alignment(fd);
> > > > > + vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT, 0);
> > > > > +
> > > > > + xe_for_each_gt(fd, gt) {
> > > > > + visible_avail_size = xe_visible_available_vram_size(fd, gt);
> > > >
> > > > Skip (continue) if == 0?
> > >
> > > Do we expect it to be zero ?
> > >
> >
> > It do not to be here, it can be added below.
> >
> > > >
> > > > > + bo_size = params.size_mb
> > > > > + ? params.size_mb * 1024ULL * 1024ULL
> > > > > + : params.vram_percent
> > > > > + ? ALIGN(visible_avail_size * params.vram_percent / 100, alignment)
> > > > > + : ALIGN_DOWN(visible_avail_size, alignment);
>
> I'll simplify the bo_size to:
>
> bo_size = params.size_mb ? params.size_mb * 1024ULL * 1024ULL
> : ALIGN_DOWN(visible_avail_size * params.vram_percent / 100,
> alignment);
>
> with vram_percent defaulting to 100.
>
> > > > > + igt_info("gt%u bo_size=%lu visible_available_vram_size=%lu\n",
> > > > > + gt, bo_size, visible_avail_size);
> > > > > +
> > > >
> > > > Should it skip if calculated bo_size == 0?
> > > > In case of skips you can make it dynamic or count number
> > > > of performed tests (it should be > 0).
> > >
> > > Is it expected to be zero ? I would just let it go (and fail).
> > >
> > > --
> > > marcin
> > > >
> > > > Regards,
> > > > Kamil
> > > >
> > > > > + bo_handle = xe_bo_create_flags(fd, vm, bo_size, visible_vram_memory(fd, gt));
> > > > > + bo_ptr = xe_bo_map(fd, bo_handle, bo_size);
> >
> > Please add assert here:
> > igt_assert(bo_ptr);
>
> xe_bo_map asserts if mmap fails
>
> >
> > > > > +
> > > > > + size = bo_size - 1;
> >
> > Here imho you should add
> > igt_assert_lt_u64(SZ_64K, size);
> >
> > Point is you will not test anything if size is too small.
>
> There will be no write, but still we have a check for zero value read at
> index 0 (the assert after while).
> I think SZ_64K is the minimum page size for vram, so perhaps we would fail
> earlier on xe_bo_create (due to visible_vram_memory returning 0?).
>
> I'll split the check per gt with dynamic subtests in case any gt's visible
> available vram returns 0. I'm contemplating using a skip instead of an
> assert in such cases, as it might be more appropriate. What are your
> thoughts on this approach?
Seems good, imho skip is better.
Regards,
Kamil
>
> --
> marcin
> >
> > Regards,
> > Kamil
> >
> > > > > + while (size > SZ_64K) {
> > > > > + igt_assert_eq(0, READ_ONCE(bo_ptr[size]));
> > > > > + WRITE_ONCE(bo_ptr[size], 'A');
> > > > > + igt_assert_eq('A', READ_ONCE(bo_ptr[size]));
> > > > > + size >>= 1;
> > > > > + }
> > > > > + igt_assert_eq(0, bo_ptr[0]);
> > > > > +
> > > > > + munmap(bo_ptr, bo_size);
> > > > > + gem_close(fd, bo_handle);
> > > > > + }
> > > > > +
> > > > > + xe_vm_destroy(fd, vm);
> > > > > +}
> > > > > +
> > > > > +static int opt_handler(int opt, int opt_index, void *data)
> > > > > +{
> > > > > + switch (opt) {
> > > > > + case 'S':
> > > > > + params.size_mb = atoi(optarg);
> > > > > + igt_debug("Size MB: %d\n", params.size_mb);
> > > > > + break;
> > > > > + case 'p':
> > > > > + params.vram_percent = atoi(optarg);
> > > > > + igt_debug("Percent of VRAM: %d\n", params.vram_percent);
> > > > > + break;
> > > > > + default:
> > > > > + return IGT_OPT_HANDLER_ERROR;
> > > > > + }
> > > > > +
> > > > > + return IGT_OPT_HANDLER_SUCCESS;
> > > > > +}
> > > > > +
> > > > > +const char *help_str =
> > > > > + " -S\tBO size in MB\n"
> > > > > + " -p\tPercent of VRAM for BO\n"
> > > > > + ;
> > > > > +
> > > > > +igt_main_args("S:p:", NULL, help_str, opt_handler, NULL)
> > > > > {
> > > > > int xe;
> > > > > @@ -253,6 +332,9 @@ igt_main
> > > > > igt_waitchildren();
> > > > > }
> > > > > + igt_subtest("create-big-vram") {
> > > > > + create_big_vram(xe);
> > > > > + }
> > > > > igt_fixture
> > > > > drm_close_driver(xe);
> > > > > --
> > > > > 2.31.1
> > > > >
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2023-11-30 12:49 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-11-23 15:08 [igt-dev] [PATCH v4 i-g-t 0/2] add create-big-vram subtest Marcin Bernatowicz
2023-11-23 15:08 ` [igt-dev] [PATCH v4 i-g-t 1/2] lib/xe/xe_query: xe_visible_available_vram_size helper Marcin Bernatowicz
2023-11-27 17:15 ` Kamil Konieczny
2023-11-23 15:08 ` [igt-dev] [PATCH v4 i-g-t 2/2] tests/intel/xe_create: create-big-vram subtest Marcin Bernatowicz
2023-11-23 17:24 ` Kamil Konieczny
2023-11-23 18:50 ` Bernatowicz, Marcin
2023-11-29 17:56 ` Kamil Konieczny
2023-11-30 10:11 ` Bernatowicz, Marcin
2023-11-30 12:49 ` Kamil Konieczny
2023-11-23 16:57 ` [igt-dev] ✓ Fi.CI.BAT: success for add " Patchwork
2023-11-23 18:13 ` [igt-dev] ✓ CI.xeBAT: " Patchwork
2023-11-25 9:40 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
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