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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: igt-dev@lists.freedesktop.org
Subject: [PATCH i-g-t 01/12] lib/rendercopy: Add deltas to all surface relocs
Date: Wed, 20 Dec 2023 19:59:23 +0200	[thread overview]
Message-ID: <20231220175934.22849-2-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20231220175934.22849-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

In order to copy stuff not at offset 0 in the BO we need
to include the delta in the relocs/etc.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 lib/rendercopy_gen4.c |  9 +++++----
 lib/rendercopy_gen6.c |  9 +++++----
 lib/rendercopy_gen7.c |  9 +++++----
 lib/rendercopy_gen8.c |  9 +++++----
 lib/rendercopy_gen9.c | 13 +++++++------
 lib/rendercopy_i830.c | 10 +++++++---
 lib/rendercopy_i915.c |  6 ++++--
 7 files changed, 38 insertions(+), 27 deletions(-)

diff --git a/lib/rendercopy_gen4.c b/lib/rendercopy_gen4.c
index 8536d6b632c5..d10e5b7780c0 100644
--- a/lib/rendercopy_gen4.c
+++ b/lib/rendercopy_gen4.c
@@ -148,10 +148,11 @@ gen4_bind_buf(struct intel_bb *ibb, const struct intel_buf *buf, int is_dst)
 	ss->ss0.data_return_format = SURFACERETURNFORMAT_FLOAT32;
 	ss->ss0.color_blend = 1;
 
-	address = intel_bb_offset_reloc(ibb, buf->handle,
-					read_domain, write_domain,
-					intel_bb_offset(ibb) + 4,
-					buf->addr.offset);
+	address = intel_bb_offset_reloc_with_delta(ibb, buf->handle,
+						   read_domain, write_domain,
+						   buf->surface[0].offset,
+						   intel_bb_offset(ibb) + 4,
+						   buf->addr.offset);
 	ss->ss1.base_addr = (uint32_t) address;
 
 	ss->ss2.height = intel_buf_height(buf) - 1;
diff --git a/lib/rendercopy_gen6.c b/lib/rendercopy_gen6.c
index e941257eb606..ebd4c5cf241c 100644
--- a/lib/rendercopy_gen6.c
+++ b/lib/rendercopy_gen6.c
@@ -91,10 +91,11 @@ gen6_bind_buf(struct intel_bb *ibb, const struct intel_buf *buf, int is_dst)
 	ss->ss0.data_return_format = SURFACERETURNFORMAT_FLOAT32;
 	ss->ss0.color_blend = 1;
 
-	address = intel_bb_offset_reloc(ibb, buf->handle,
-					read_domain, write_domain,
-					intel_bb_offset(ibb) + 4,
-					buf->addr.offset);
+	address = intel_bb_offset_reloc_with_delta(ibb, buf->handle,
+						   read_domain, write_domain,
+						   buf->surface[0].offset,
+						   intel_bb_offset(ibb) + 4,
+						   buf->addr.offset);
 	ss->ss1.base_addr = (uint32_t) address;
 
 	ss->ss2.height = intel_buf_height(buf) - 1;
diff --git a/lib/rendercopy_gen7.c b/lib/rendercopy_gen7.c
index 267f6f8038ba..279eb45bdc36 100644
--- a/lib/rendercopy_gen7.c
+++ b/lib/rendercopy_gen7.c
@@ -86,10 +86,11 @@ gen7_bind_buf(struct intel_bb *ibb,
 		 gen7_tiling_bits(buf->tiling) |
 		format << GEN7_SURFACE_FORMAT_SHIFT);
 
-	address = intel_bb_offset_reloc(ibb, buf->handle,
-					read_domain, write_domain,
-					intel_bb_offset(ibb) + 4,
-					buf->addr.offset);
+	address = intel_bb_offset_reloc_with_delta(ibb, buf->handle,
+						   read_domain, write_domain,
+						   intel_bb_offset(ibb) + 4,
+						   buf->surface[0].offset,
+						   buf->addr.offset);
 	ss[1] = address;
 	ss[2] = ((intel_buf_width(buf) - 1)  << GEN7_SURFACE_WIDTH_SHIFT |
 		 (intel_buf_height(buf) - 1) << GEN7_SURFACE_HEIGHT_SHIFT);
diff --git a/lib/rendercopy_gen8.c b/lib/rendercopy_gen8.c
index ba7897fb475f..2039e5fc6b8e 100644
--- a/lib/rendercopy_gen8.c
+++ b/lib/rendercopy_gen8.c
@@ -109,10 +109,11 @@ gen8_bind_buf(struct intel_bb *ibb,
 		ss->ss1.memory_object_control = BDW_MOCS_PTE |
 			BDW_MOCS_TC_L3_PTE | BDW_MOCS_AGE(0);
 
-	address = intel_bb_offset_reloc(ibb, buf->handle,
-					read_domain, write_domain,
-					intel_bb_offset(ibb) + 4 * 8,
-					buf->addr.offset);
+	address = intel_bb_offset_reloc_with_delta(ibb, buf->handle,
+						   read_domain, write_domain,
+						   buf->surface[0].offset,
+						   intel_bb_offset(ibb) + 4 * 8,
+						   buf->addr.offset);
 	ss->ss8.base_addr = address;
 	ss->ss9.base_addr_hi = address >> 32;
 
diff --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c
index 363bc6c1b203..bfac62b0fc23 100644
--- a/lib/rendercopy_gen9.c
+++ b/lib/rendercopy_gen9.c
@@ -194,12 +194,13 @@ gen9_bind_buf(struct intel_bb *ibb, const struct intel_buf *buf, int is_dst,
 	else if (buf->tiling == I915_TILING_Ys)
 		ss->ss5.trmode = 2;
 
-	address = intel_bb_offset_reloc(ibb, buf->handle,
-					read_domain, write_domain,
-					intel_bb_offset(ibb) + 4 * 8,
-					buf->addr.offset);
-	ss->ss8.base_addr = address;
-	ss->ss9.base_addr_hi = address >> 32;
+	address = intel_bb_offset_reloc_with_delta(ibb, buf->handle,
+						   read_domain, write_domain,
+						   buf->surface[0].offset,
+						   intel_bb_offset(ibb) + 4 * 8,
+						   buf->addr.offset);
+	ss->ss8.base_addr = (address + buf->surface[0].offset);
+	ss->ss9.base_addr_hi = (address + buf->surface[0].offset) >> 32;
 
 	ss->ss2.height = intel_buf_height(buf) - 1;
 	ss->ss2.width  = intel_buf_width(buf) - 1;
diff --git a/lib/rendercopy_i830.c b/lib/rendercopy_i830.c
index 4c4271493b4b..4b0ea3b859e2 100644
--- a/lib/rendercopy_i830.c
+++ b/lib/rendercopy_i830.c
@@ -158,8 +158,10 @@ static void gen2_emit_target(struct intel_bb *ibb,
 	intel_bb_out(ibb, _3DSTATE_BUF_INFO_CMD);
 	intel_bb_out(ibb, BUF_3D_ID_COLOR_BACK | tiling |
 		     BUF_3D_PITCH(dst->surface[0].stride));
-	intel_bb_emit_reloc(ibb, dst->handle, I915_GEM_DOMAIN_RENDER,
-			    I915_GEM_DOMAIN_RENDER, 0, dst->addr.offset);
+	intel_bb_emit_reloc(ibb, dst->handle,
+			    I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
+			    dst->surface[0].offset,
+			    dst->addr.offset);
 
 	intel_bb_out(ibb, _3DSTATE_DST_BUF_VARS_CMD);
 	intel_bb_out(ibb, format |
@@ -199,7 +201,9 @@ static void gen2_emit_texture(struct intel_bb *ibb,
 		tiling |= TM0S1_TILE_WALK;
 
 	intel_bb_out(ibb, _3DSTATE_LOAD_STATE_IMMEDIATE_2 | LOAD_TEXTURE_MAP(unit) | 4);
-	intel_bb_emit_reloc(ibb, src->handle, I915_GEM_DOMAIN_SAMPLER, 0, 0,
+	intel_bb_emit_reloc(ibb, src->handle,
+			    I915_GEM_DOMAIN_SAMPLER, 0,
+			    src->surface[0].offset,
 			    src->addr.offset);
 	intel_bb_out(ibb, (intel_buf_height(src) - 1) << TM0S1_HEIGHT_SHIFT |
 		     (intel_buf_width(src) - 1) << TM0S1_WIDTH_SHIFT |
diff --git a/lib/rendercopy_i915.c b/lib/rendercopy_i915.c
index 3e421301e6a6..94cdfb99af9a 100644
--- a/lib/rendercopy_i915.c
+++ b/lib/rendercopy_i915.c
@@ -112,7 +112,8 @@ void gen3_render_copyfunc(struct intel_bb *ibb,
 		intel_bb_out(ibb, (1 << TEX_COUNT) - 1);
 		intel_bb_emit_reloc(ibb, src->handle,
 				    I915_GEM_DOMAIN_SAMPLER, 0,
-				    0, src->addr.offset);
+				    src->surface[0].offset,
+				    src->addr.offset);
 		intel_bb_out(ibb, format_bits | tiling_bits |
 			     (intel_buf_height(src) - 1) << MS3_HEIGHT_SHIFT |
 			     (intel_buf_width(src) - 1) << MS3_WIDTH_SHIFT);
@@ -155,7 +156,8 @@ void gen3_render_copyfunc(struct intel_bb *ibb,
 			     BUF_3D_PITCH(dst->surface[0].stride));
 		intel_bb_emit_reloc(ibb, dst->handle,
 				    I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
-				    0, dst->addr.offset);
+				    dst->surface[0].offset,
+				    dst->addr.offset);
 
 		intel_bb_out(ibb, _3DSTATE_DST_BUF_VARS_CMD);
 		intel_bb_out(ibb, format_bits |
-- 
2.41.0

  reply	other threads:[~2023-12-20 17:59 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-20 17:59 [PATCH i-g-t 00/12] tests/kms_big_fb: Test planar formats, and CCS Ville Syrjala
2023-12-20 17:59 ` Ville Syrjala [this message]
2023-12-22  5:03   ` [PATCH i-g-t v2 01/12] lib/rendercopy: Add deltas to all surface relocs Ville Syrjala
2023-12-22  5:37   ` [PATCH i-g-t " Zbigniew Kempczyński
2023-12-22  6:01     ` Ville Syrjälä
2023-12-22  6:06       ` Ville Syrjälä
2023-12-22  6:52         ` Ville Syrjälä
2023-12-22  7:26           ` Zbigniew Kempczyński
2023-12-22  8:33             ` Ville Syrjälä
2023-12-20 17:59 ` [PATCH i-g-t 02/12] tests/kms_big_fb: Use igt_fb_create_intel_buf() Ville Syrjala
2023-12-20 17:59 ` [PATCH i-g-t 03/12] lib/igt_fb: Expose igt_fb_is_ccs_modifier() Ville Syrjala
2023-12-20 17:59 ` [PATCH i-g-t 04/12] tests/kms_big_fb: Fix async Ville Syrjala
2023-12-20 17:59 ` [PATCH i-g-t 05/12] tests/kms_big_fb: Test async flips + linear on tgl+ Ville Syrjala
2023-12-20 17:59 ` [PATCH i-g-t 06/12] tests/kms_big_fb: Determine the max fb size the same way always Ville Syrjala
2023-12-20 17:59 ` [PATCH i-g-t 07/12] tests/kms_frontbuffer_tracking: Use igt_create_fb() Ville Syrjala
2023-12-20 17:59 ` [PATCH i-g-t 08/12] lib/igt_fb: Make igt_calc_fb_size() somewhat usable Ville Syrjala
2023-12-20 17:59 ` [PATCH i-g-t 09/12] tests/kms_big_fb: Nuke fliptab[] Ville Syrjala
2023-12-20 17:59 ` [PATCH i-g-t 10/12] tests/kms_big_fb: Replace 'bpp' with 'name' Ville Syrjala
2023-12-20 17:59 ` [PATCH i-g-t 11/12] tests/kms_big_fb: Test planar YCbCr formats Ville Syrjala
2023-12-20 17:59 ` [PATCH i-g-t 12/12] tests/kms_big_fb: Also test some CCS modifiers Ville Syrjala

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