[PATCH i-g-t 1/5] lib/xe/ioctl: introduce xe_bb_size() helper

[PATCH i-g-t 1/5] lib/xe/ioctl: introduce xe_bb_size() helper

[Matthew Auld]

We have a number of tests open coding this, plus some tests lacking any
handling for the prefetch size, leading to CAT errors due to overfetch
hitting an invalid page. End goal is to fix all the tests that are
missing the overfetch handling first, using the new helper, and then
convert all the places that were open coding this.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 lib/xe/xe_ioctl.c | 6 ++++++
 lib/xe/xe_ioctl.h | 1 +
 2 files changed, 7 insertions(+)

diff --git a/lib/xe/xe_ioctl.c b/lib/xe/xe_ioctl.c
index d3f9905ee..da2a7af51 100644
--- a/lib/xe/xe_ioctl.c
+++ b/lib/xe/xe_ioctl.c
@@ -51,6 +51,12 @@ uint32_t xe_cs_prefetch_size(int fd)
 	return 4096;
 }
 
+uint64_t xe_bb_size(int fd, uint64_t reqsize)
+{
+	return ALIGN(reqsize + xe_cs_prefetch_size(fd),
+	             xe_get_default_alignment(fd));
+}
+
 uint32_t xe_vm_create(int fd, uint32_t flags, uint64_t ext)
 {
 	struct drm_xe_vm_create create = {
diff --git a/lib/xe/xe_ioctl.h b/lib/xe/xe_ioctl.h
index 03932561d..2b30f1d98 100644
--- a/lib/xe/xe_ioctl.h
+++ b/lib/xe/xe_ioctl.h
@@ -18,6 +18,7 @@
 #define DRM_XE_UFENCE_WAIT_MASK_U64    0xffffffffffffffffu
 
 uint32_t xe_cs_prefetch_size(int fd);
+uint64_t xe_bb_size(int fd, uint64_t reqsize);
 uint32_t xe_vm_create(int fd, uint32_t flags, uint64_t ext);
 int  __xe_vm_bind(int fd, uint32_t vm, uint32_t exec_queue, uint32_t bo,
 		  uint64_t offset, uint64_t addr, uint64_t size, uint32_t op,
-- 
2.43.0

[PATCH i-g-t 2/5] tests/intel/xe: account for prefetch

[Matthew Auld]

Xe2 expects an extra page after the batch to avoid prefetch hitting an
invalid page. Not doing so can result in CAT errors. Do full audit of
all xe_* tests where anything creating a batch should use the new
bb helper.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 tests/intel/xe_ccs.c          | 6 +++---
 tests/intel/xe_copy_basic.c   | 4 ++--
 tests/intel/xe_create.c       | 2 +-
 tests/intel/xe_evict_ccs.c    | 2 +-
 tests/intel/xe_exec_reset.c   | 2 +-
 tests/intel/xe_exercise_blt.c | 4 ++--
 tests/intel/xe_pat.c          | 2 +-
 tests/intel/xe_peer2peer.c    | 4 ++--
 tests/intel/xe_pm_residency.c | 2 +-
 tests/intel/xe_vm.c           | 6 ++++--
 tests/intel/xe_waitfence.c    | 8 +++++---
 11 files changed, 23 insertions(+), 19 deletions(-)

diff --git a/tests/intel/xe_ccs.c b/tests/intel/xe_ccs.c
index 55ae0e46c..7d0e8ed7a 100644
--- a/tests/intel/xe_ccs.c
+++ b/tests/intel/xe_ccs.c
@@ -119,7 +119,7 @@ static void surf_copy(int xe,
 				 uc_mocs, comp_pat_index, BLT_INDIRECT_ACCESS);
 	blt_set_ctrl_surf_object(&surf.dst, ccs, sysmem, ccssize, uc_mocs,
 				 DEFAULT_PAT_INDEX, DIRECT_ACCESS);
-	bb_size = xe_get_default_alignment(xe);
+	bb_size = xe_bb_size(xe, SZ_4K);
 	bb1 = xe_bo_create(xe, 0, bb_size, sysmem, 0);
 	blt_set_batch(&surf.bb, bb1, bb_size, sysmem);
 	blt_ctrl_surf_copy(xe, ctx, NULL, ahnd, &surf);
@@ -295,7 +295,7 @@ static void block_copy(int xe,
 	struct blt_block_copy_data_ext ext = {}, *pext = &ext;
 	struct blt_copy_object *src, *mid, *dst;
 	const uint32_t bpp = 32;
-	uint64_t bb_size = xe_get_default_alignment(xe);
+	uint64_t bb_size = xe_bb_size(xe, SZ_4K);
 	uint64_t ahnd = intel_allocator_open(xe, ctx->vm, INTEL_ALLOCATOR_RELOC);
 	uint32_t run_id = mid_tiling;
 	uint32_t mid_region = (AT_LEAST_GEN(intel_get_drm_devid(xe), 20) &
@@ -423,7 +423,7 @@ static void block_multicopy(int xe,
 	struct blt_block_copy3_data_ext ext3 = {}, *pext3 = &ext3;
 	struct blt_copy_object *src, *mid, *dst, *final;
 	const uint32_t bpp = 32;
-	uint64_t bb_size = xe_get_default_alignment(xe);
+	uint64_t bb_size = xe_bb_size(xe, SZ_4K);
 	uint64_t ahnd = intel_allocator_open(xe, ctx->vm, INTEL_ALLOCATOR_RELOC);
 	uint32_t run_id = mid_tiling;
 	uint32_t mid_region = (AT_LEAST_GEN(intel_get_drm_devid(xe), 20) &
diff --git a/tests/intel/xe_copy_basic.c b/tests/intel/xe_copy_basic.c
index 1bde876cd..66c666eac 100644
--- a/tests/intel/xe_copy_basic.c
+++ b/tests/intel/xe_copy_basic.c
@@ -44,7 +44,7 @@ mem_copy(int fd, uint32_t src_handle, uint32_t dst_handle, const intel_ctx_t *ct
 	 uint32_t size, uint32_t width, uint32_t height, uint32_t region)
 {
 	struct blt_mem_data mem = {};
-	uint64_t bb_size = xe_get_default_alignment(fd);
+	uint64_t bb_size = xe_bb_size(fd, SZ_4K);
 	uint64_t ahnd = intel_allocator_open_full(fd, ctx->vm, 0, 0,
 						  INTEL_ALLOCATOR_SIMPLE,
 						  ALLOC_STRATEGY_LOW_TO_HIGH, 0);
@@ -97,7 +97,7 @@ mem_set(int fd, uint32_t dst_handle, const intel_ctx_t *ctx, uint32_t size,
 	uint32_t width, uint32_t height, uint8_t fill_data, uint32_t region)
 {
 	struct blt_mem_data mem = {};
-	uint64_t bb_size = xe_get_default_alignment(fd);
+	uint64_t bb_size = xe_bb_size(fd, SZ_4K);
 	uint64_t ahnd = intel_allocator_open_full(fd, ctx->vm, 0, 0,
 						  INTEL_ALLOCATOR_SIMPLE,
 						  ALLOC_STRATEGY_LOW_TO_HIGH, 0);
diff --git a/tests/intel/xe_create.c b/tests/intel/xe_create.c
index 6d0670849..1d3918663 100644
--- a/tests/intel/xe_create.c
+++ b/tests/intel/xe_create.c
@@ -325,7 +325,7 @@ static void create_big_vram(int fd, int gt)
 static void create_contexts(int fd)
 {
 	unsigned int i, n = params.quantity ? params.quantity : 4096;
-	uint64_t bo_size = xe_get_default_alignment(fd), bo_addr = 0x1a0000;
+	uint64_t bo_size = xe_bb_size(fd, SZ_4K), bo_addr = 0x1a0000;
 	uint32_t vm, bo, *batch, exec_queues[n];
 	struct drm_xe_sync sync = {
 		.type = DRM_XE_SYNC_TYPE_SYNCOBJ,
diff --git a/tests/intel/xe_evict_ccs.c b/tests/intel/xe_evict_ccs.c
index 5dd438cad..5d4720a71 100644
--- a/tests/intel/xe_evict_ccs.c
+++ b/tests/intel/xe_evict_ccs.c
@@ -75,7 +75,7 @@ static void copy_obj(struct blt_copy_data *blt,
 {
 	struct blt_block_copy_data_ext ext = {};
 	int fd = blt->fd;
-	uint64_t bb_size = xe_get_default_alignment(fd);
+	uint64_t bb_size = xe_bb_size(blt->fd, SZ_4K);
 	uint32_t bb;
 	uint32_t w, h;
 
diff --git a/tests/intel/xe_exec_reset.c b/tests/intel/xe_exec_reset.c
index 168523c64..978b4d279 100644
--- a/tests/intel/xe_exec_reset.c
+++ b/tests/intel/xe_exec_reset.c
@@ -675,7 +675,7 @@ static void submit_jobs(struct gt_thread_data *t)
 	int fd = t->fd;
 	uint32_t vm = xe_vm_create(fd, 0, 0);
 	uint64_t addr = 0x1a0000;
-	size_t bo_size = xe_get_default_alignment(fd);
+	size_t bo_size = xe_bb_size(fd, SZ_4K);
 	uint32_t bo;
 	uint32_t *data;
 
diff --git a/tests/intel/xe_exercise_blt.c b/tests/intel/xe_exercise_blt.c
index cc9060b1b..c908800cf 100644
--- a/tests/intel/xe_exercise_blt.c
+++ b/tests/intel/xe_exercise_blt.c
@@ -118,7 +118,7 @@ static void fast_copy_emit(int xe, const intel_ctx_t *ctx,
 	struct blt_fast_copy_data blt = {};
 	struct blt_copy_object *src, *mid, *dst;
 	const uint32_t bpp = 32;
-	uint64_t bb_size = xe_get_default_alignment(xe);
+	uint64_t bb_size = xe_bb_size(xe, SZ_4K);
 	uint64_t ahnd = intel_allocator_open_full(xe, ctx->vm, 0, 0,
 						  INTEL_ALLOCATOR_SIMPLE,
 						  ALLOC_STRATEGY_LOW_TO_HIGH, 0);
@@ -176,7 +176,7 @@ static void fast_copy(int xe, const intel_ctx_t *ctx,
 	struct blt_copy_data blt = {};
 	struct blt_copy_object *src, *mid, *dst;
 	const uint32_t bpp = 32;
-	uint64_t bb_size = xe_get_default_alignment(xe);
+	uint64_t bb_size = xe_bb_size(xe, SZ_4K);
 	uint64_t ahnd = intel_allocator_open_full(xe, ctx->vm, 0, 0,
 						  INTEL_ALLOCATOR_SIMPLE,
 						  ALLOC_STRATEGY_LOW_TO_HIGH, 0);
diff --git a/tests/intel/xe_pat.c b/tests/intel/xe_pat.c
index c5187bb94..40256bada 100644
--- a/tests/intel/xe_pat.c
+++ b/tests/intel/xe_pat.c
@@ -262,7 +262,7 @@ static void pat_index_blt(struct xe_pat_param *p)
 					 ALLOC_STRATEGY_LOW_TO_HIGH,
 					 p->size->alignment);
 
-	bb_size = xe_get_default_alignment(fd);
+	bb_size = xe_bb_size(fd, SZ_4K);
 	bb = xe_bo_create(fd, 0, bb_size, system_memory(fd), 0);
 
 	size = width * height * bpp / 8;
diff --git a/tests/intel/xe_peer2peer.c b/tests/intel/xe_peer2peer.c
index 44fea6eb1..c63f1e4c4 100644
--- a/tests/intel/xe_peer2peer.c
+++ b/tests/intel/xe_peer2peer.c
@@ -105,7 +105,7 @@ static void test_read(struct gpu_info *ex_gpu, struct gpu_info *im_gpu,
 	struct blt_copy_object *im_src;
 	struct blt_copy_object *src;
 	const uint32_t bpp = 32;
-	uint64_t im_bb_size = xe_get_default_alignment(im_gpu->fd);
+	uint64_t im_bb_size = xe_bb_size(im_gpu->fd, SZ_4K);
 	uint64_t ahnd;
 	uint32_t bb;
 	uint32_t width = 1024, height = 1024;
@@ -187,7 +187,7 @@ static void test_write(struct gpu_info *ex_gpu, struct gpu_info *im_gpu,
 	struct blt_copy_object *im_dst;
 	struct blt_copy_object *src;
 	const uint32_t bpp = 32;
-	uint64_t im_bb_size = xe_get_default_alignment(im_gpu->fd);
+	uint64_t im_bb_size = xe_bb_size(im_gpu->fd, SZ_4K);
 	uint64_t ahnd;
 	uint32_t bb;
 	uint32_t width = 1024, height = 1024;
diff --git a/tests/intel/xe_pm_residency.c b/tests/intel/xe_pm_residency.c
index 7db3cd162..3fa9abf25 100644
--- a/tests/intel/xe_pm_residency.c
+++ b/tests/intel/xe_pm_residency.c
@@ -98,7 +98,7 @@ static void exec_load(int fd, struct drm_xe_engine_class_instance *hwe, unsigned
 
 	vm = xe_vm_create(fd, 0, 0);
 	exec_queue = xe_exec_queue_create(fd, vm, hwe, 0);
-	bo_size = xe_get_default_alignment(fd);
+	bo_size = xe_bb_size(fd, SZ_4K);
 
 	bo = xe_bo_create(fd, vm, bo_size,
 			  vram_if_possible(fd, hwe->gt_id),
diff --git a/tests/intel/xe_vm.c b/tests/intel/xe_vm.c
index 2200040ac..ebc1ca68f 100644
--- a/tests/intel/xe_vm.c
+++ b/tests/intel/xe_vm.c
@@ -979,6 +979,8 @@ test_large_binds(int fd, struct drm_xe_engine_class_instance *eci,
 	igt_assert(n_exec_queues <= MAX_N_EXEC_QUEUES);
 	vm = xe_vm_create(fd, 0, 0);
 
+	bo_size = xe_bb_size(fd, bo_size);
+
 	if (flags & LARGE_BIND_FLAG_USERPTR) {
 		map = aligned_alloc(xe_get_default_alignment(fd), bo_size);
 		igt_assert(map);
@@ -1273,7 +1275,7 @@ test_munmap_style_unbind(int fd, struct drm_xe_engine_class_instance *eci,
 	}
 
 	vm = xe_vm_create(fd, 0, 0);
-	bo_size = page_size * bo_n_pages;
+	bo_size = xe_bb_size(fd, page_size * bo_n_pages);
 
 	if (flags & MAP_FLAG_USERPTR) {
 		map = mmap(from_user_pointer(addr), bo_size, PROT_READ |
@@ -1573,7 +1575,7 @@ test_mmap_style_bind(int fd, struct drm_xe_engine_class_instance *eci,
 	}
 
 	vm = xe_vm_create(fd, 0, 0);
-	bo_size = page_size * bo_n_pages;
+	bo_size = xe_bb_size(fd, page_size * bo_n_pages);
 
 	if (flags & MAP_FLAG_USERPTR) {
 		map0 = mmap(from_user_pointer(addr), bo_size, PROT_READ |
diff --git a/tests/intel/xe_waitfence.c b/tests/intel/xe_waitfence.c
index 5f7316f6e..f6f797d43 100644
--- a/tests/intel/xe_waitfence.c
+++ b/tests/intel/xe_waitfence.c
@@ -212,6 +212,7 @@ exec_queue_reset_wait(int fd)
 	uint64_t sdi_offset;
 	uint64_t sdi_addr;
 	uint64_t addr = 0x1a0000;
+	uint64_t bb_size;
 
 	struct {
 		uint32_t batch[16];
@@ -236,8 +237,9 @@ exec_queue_reset_wait(int fd)
 		.exec_queue_id = exec_queue,
 	};
 
-	bo = xe_bo_create(fd, vm, 0x40000, vram_if_possible(fd, 0), 0);
-	data = xe_bo_map(fd, bo, 0x40000);
+	bb_size = xe_bb_size(fd, 0x40000);
+	bo = xe_bo_create(fd, vm, bb_size, vram_if_possible(fd, 0), 0);
+	data = xe_bo_map(fd, bo, bb_size);
 
 	batch_offset = (char *)&data[0].batch - (char *)data;
 	batch_addr = addr + batch_offset;
@@ -267,7 +269,7 @@ exec_queue_reset_wait(int fd)
 	xe_exec_queue_destroy(fd, exec_queue);
 
 	if (bo) {
-		munmap(data, 0x40000);
+		munmap(data, bb_size);
 		gem_close(fd, bo);
 	}
 }
-- 
2.43.0

Re: [PATCH i-g-t 2/5] tests/intel/xe: account for prefetch

[Zbigniew Kempczyński]

On Wed, Jan 24, 2024 at 06:07:10PM +0000, Matthew Auld wrote:
> Xe2 expects an extra page after the batch to avoid prefetch hitting an
> invalid page. Not doing so can result in CAT errors. Do full audit of
> all xe_* tests where anything creating a batch should use the new
> bb helper.
> 
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
>  tests/intel/xe_ccs.c          | 6 +++---
>  tests/intel/xe_copy_basic.c   | 4 ++--
>  tests/intel/xe_create.c       | 2 +-
>  tests/intel/xe_evict_ccs.c    | 2 +-
>  tests/intel/xe_exec_reset.c   | 2 +-
>  tests/intel/xe_exercise_blt.c | 4 ++--
>  tests/intel/xe_pat.c          | 2 +-
>  tests/intel/xe_peer2peer.c    | 4 ++--
>  tests/intel/xe_pm_residency.c | 2 +-
>  tests/intel/xe_vm.c           | 6 ++++--
>  tests/intel/xe_waitfence.c    | 8 +++++---
>  11 files changed, 23 insertions(+), 19 deletions(-)
> 
> diff --git a/tests/intel/xe_ccs.c b/tests/intel/xe_ccs.c
> index 55ae0e46c..7d0e8ed7a 100644
> --- a/tests/intel/xe_ccs.c
> +++ b/tests/intel/xe_ccs.c
> @@ -119,7 +119,7 @@ static void surf_copy(int xe,
>  				 uc_mocs, comp_pat_index, BLT_INDIRECT_ACCESS);
>  	blt_set_ctrl_surf_object(&surf.dst, ccs, sysmem, ccssize, uc_mocs,
>  				 DEFAULT_PAT_INDEX, DIRECT_ACCESS);
> -	bb_size = xe_get_default_alignment(xe);
> +	bb_size = xe_bb_size(xe, SZ_4K);
>  	bb1 = xe_bo_create(xe, 0, bb_size, sysmem, 0);
>  	blt_set_batch(&surf.bb, bb1, bb_size, sysmem);
>  	blt_ctrl_surf_copy(xe, ctx, NULL, ahnd, &surf);
> @@ -295,7 +295,7 @@ static void block_copy(int xe,
>  	struct blt_block_copy_data_ext ext = {}, *pext = &ext;
>  	struct blt_copy_object *src, *mid, *dst;
>  	const uint32_t bpp = 32;
> -	uint64_t bb_size = xe_get_default_alignment(xe);
> +	uint64_t bb_size = xe_bb_size(xe, SZ_4K);
>  	uint64_t ahnd = intel_allocator_open(xe, ctx->vm, INTEL_ALLOCATOR_RELOC);
>  	uint32_t run_id = mid_tiling;
>  	uint32_t mid_region = (AT_LEAST_GEN(intel_get_drm_devid(xe), 20) &
> @@ -423,7 +423,7 @@ static void block_multicopy(int xe,
>  	struct blt_block_copy3_data_ext ext3 = {}, *pext3 = &ext3;
>  	struct blt_copy_object *src, *mid, *dst, *final;
>  	const uint32_t bpp = 32;
> -	uint64_t bb_size = xe_get_default_alignment(xe);
> +	uint64_t bb_size = xe_bb_size(xe, SZ_4K);
>  	uint64_t ahnd = intel_allocator_open(xe, ctx->vm, INTEL_ALLOCATOR_RELOC);
>  	uint32_t run_id = mid_tiling;
>  	uint32_t mid_region = (AT_LEAST_GEN(intel_get_drm_devid(xe), 20) &
> diff --git a/tests/intel/xe_copy_basic.c b/tests/intel/xe_copy_basic.c
> index 1bde876cd..66c666eac 100644
> --- a/tests/intel/xe_copy_basic.c
> +++ b/tests/intel/xe_copy_basic.c
> @@ -44,7 +44,7 @@ mem_copy(int fd, uint32_t src_handle, uint32_t dst_handle, const intel_ctx_t *ct
>  	 uint32_t size, uint32_t width, uint32_t height, uint32_t region)
>  {
>  	struct blt_mem_data mem = {};
> -	uint64_t bb_size = xe_get_default_alignment(fd);
> +	uint64_t bb_size = xe_bb_size(fd, SZ_4K);
>  	uint64_t ahnd = intel_allocator_open_full(fd, ctx->vm, 0, 0,
>  						  INTEL_ALLOCATOR_SIMPLE,
>  						  ALLOC_STRATEGY_LOW_TO_HIGH, 0);
> @@ -97,7 +97,7 @@ mem_set(int fd, uint32_t dst_handle, const intel_ctx_t *ctx, uint32_t size,
>  	uint32_t width, uint32_t height, uint8_t fill_data, uint32_t region)
>  {
>  	struct blt_mem_data mem = {};
> -	uint64_t bb_size = xe_get_default_alignment(fd);
> +	uint64_t bb_size = xe_bb_size(fd, SZ_4K);
>  	uint64_t ahnd = intel_allocator_open_full(fd, ctx->vm, 0, 0,
>  						  INTEL_ALLOCATOR_SIMPLE,
>  						  ALLOC_STRATEGY_LOW_TO_HIGH, 0);
> diff --git a/tests/intel/xe_create.c b/tests/intel/xe_create.c
> index 6d0670849..1d3918663 100644
> --- a/tests/intel/xe_create.c
> +++ b/tests/intel/xe_create.c
> @@ -325,7 +325,7 @@ static void create_big_vram(int fd, int gt)
>  static void create_contexts(int fd)
>  {
>  	unsigned int i, n = params.quantity ? params.quantity : 4096;
> -	uint64_t bo_size = xe_get_default_alignment(fd), bo_addr = 0x1a0000;
> +	uint64_t bo_size = xe_bb_size(fd, SZ_4K), bo_addr = 0x1a0000;
>  	uint32_t vm, bo, *batch, exec_queues[n];
>  	struct drm_xe_sync sync = {
>  		.type = DRM_XE_SYNC_TYPE_SYNCOBJ,
> diff --git a/tests/intel/xe_evict_ccs.c b/tests/intel/xe_evict_ccs.c
> index 5dd438cad..5d4720a71 100644
> --- a/tests/intel/xe_evict_ccs.c
> +++ b/tests/intel/xe_evict_ccs.c
> @@ -75,7 +75,7 @@ static void copy_obj(struct blt_copy_data *blt,
>  {
>  	struct blt_block_copy_data_ext ext = {};
>  	int fd = blt->fd;
> -	uint64_t bb_size = xe_get_default_alignment(fd);
> +	uint64_t bb_size = xe_bb_size(blt->fd, SZ_4K);
>  	uint32_t bb;
>  	uint32_t w, h;
>  
> diff --git a/tests/intel/xe_exec_reset.c b/tests/intel/xe_exec_reset.c
> index 168523c64..978b4d279 100644
> --- a/tests/intel/xe_exec_reset.c
> +++ b/tests/intel/xe_exec_reset.c
> @@ -675,7 +675,7 @@ static void submit_jobs(struct gt_thread_data *t)
>  	int fd = t->fd;
>  	uint32_t vm = xe_vm_create(fd, 0, 0);
>  	uint64_t addr = 0x1a0000;
> -	size_t bo_size = xe_get_default_alignment(fd);
> +	size_t bo_size = xe_bb_size(fd, SZ_4K);
>  	uint32_t bo;
>  	uint32_t *data;
>  
> diff --git a/tests/intel/xe_exercise_blt.c b/tests/intel/xe_exercise_blt.c
> index cc9060b1b..c908800cf 100644
> --- a/tests/intel/xe_exercise_blt.c
> +++ b/tests/intel/xe_exercise_blt.c
> @@ -118,7 +118,7 @@ static void fast_copy_emit(int xe, const intel_ctx_t *ctx,
>  	struct blt_fast_copy_data blt = {};
>  	struct blt_copy_object *src, *mid, *dst;
>  	const uint32_t bpp = 32;
> -	uint64_t bb_size = xe_get_default_alignment(xe);
> +	uint64_t bb_size = xe_bb_size(xe, SZ_4K);
>  	uint64_t ahnd = intel_allocator_open_full(xe, ctx->vm, 0, 0,
>  						  INTEL_ALLOCATOR_SIMPLE,
>  						  ALLOC_STRATEGY_LOW_TO_HIGH, 0);
> @@ -176,7 +176,7 @@ static void fast_copy(int xe, const intel_ctx_t *ctx,
>  	struct blt_copy_data blt = {};
>  	struct blt_copy_object *src, *mid, *dst;
>  	const uint32_t bpp = 32;
> -	uint64_t bb_size = xe_get_default_alignment(xe);
> +	uint64_t bb_size = xe_bb_size(xe, SZ_4K);
>  	uint64_t ahnd = intel_allocator_open_full(xe, ctx->vm, 0, 0,
>  						  INTEL_ALLOCATOR_SIMPLE,
>  						  ALLOC_STRATEGY_LOW_TO_HIGH, 0);
> diff --git a/tests/intel/xe_pat.c b/tests/intel/xe_pat.c
> index c5187bb94..40256bada 100644
> --- a/tests/intel/xe_pat.c
> +++ b/tests/intel/xe_pat.c
> @@ -262,7 +262,7 @@ static void pat_index_blt(struct xe_pat_param *p)
>  					 ALLOC_STRATEGY_LOW_TO_HIGH,
>  					 p->size->alignment);
>  
> -	bb_size = xe_get_default_alignment(fd);
> +	bb_size = xe_bb_size(fd, SZ_4K);
>  	bb = xe_bo_create(fd, 0, bb_size, system_memory(fd), 0);
>  
>  	size = width * height * bpp / 8;
> diff --git a/tests/intel/xe_peer2peer.c b/tests/intel/xe_peer2peer.c
> index 44fea6eb1..c63f1e4c4 100644
> --- a/tests/intel/xe_peer2peer.c
> +++ b/tests/intel/xe_peer2peer.c
> @@ -105,7 +105,7 @@ static void test_read(struct gpu_info *ex_gpu, struct gpu_info *im_gpu,
>  	struct blt_copy_object *im_src;
>  	struct blt_copy_object *src;
>  	const uint32_t bpp = 32;
> -	uint64_t im_bb_size = xe_get_default_alignment(im_gpu->fd);
> +	uint64_t im_bb_size = xe_bb_size(im_gpu->fd, SZ_4K);
>  	uint64_t ahnd;
>  	uint32_t bb;
>  	uint32_t width = 1024, height = 1024;
> @@ -187,7 +187,7 @@ static void test_write(struct gpu_info *ex_gpu, struct gpu_info *im_gpu,
>  	struct blt_copy_object *im_dst;
>  	struct blt_copy_object *src;
>  	const uint32_t bpp = 32;
> -	uint64_t im_bb_size = xe_get_default_alignment(im_gpu->fd);
> +	uint64_t im_bb_size = xe_bb_size(im_gpu->fd, SZ_4K);
>  	uint64_t ahnd;
>  	uint32_t bb;
>  	uint32_t width = 1024, height = 1024;
> diff --git a/tests/intel/xe_pm_residency.c b/tests/intel/xe_pm_residency.c
> index 7db3cd162..3fa9abf25 100644
> --- a/tests/intel/xe_pm_residency.c
> +++ b/tests/intel/xe_pm_residency.c
> @@ -98,7 +98,7 @@ static void exec_load(int fd, struct drm_xe_engine_class_instance *hwe, unsigned
>  
>  	vm = xe_vm_create(fd, 0, 0);
>  	exec_queue = xe_exec_queue_create(fd, vm, hwe, 0);
> -	bo_size = xe_get_default_alignment(fd);
> +	bo_size = xe_bb_size(fd, SZ_4K);
>  
>  	bo = xe_bo_create(fd, vm, bo_size,
>  			  vram_if_possible(fd, hwe->gt_id),
> diff --git a/tests/intel/xe_vm.c b/tests/intel/xe_vm.c
> index 2200040ac..ebc1ca68f 100644
> --- a/tests/intel/xe_vm.c
> +++ b/tests/intel/xe_vm.c
> @@ -979,6 +979,8 @@ test_large_binds(int fd, struct drm_xe_engine_class_instance *eci,
>  	igt_assert(n_exec_queues <= MAX_N_EXEC_QUEUES);
>  	vm = xe_vm_create(fd, 0, 0);
>  
> +	bo_size = xe_bb_size(fd, bo_size);

Ok, it comes from the caller and adjusted here.

> +
>  	if (flags & LARGE_BIND_FLAG_USERPTR) {
>  		map = aligned_alloc(xe_get_default_alignment(fd), bo_size);
>  		igt_assert(map);
> @@ -1273,7 +1275,7 @@ test_munmap_style_unbind(int fd, struct drm_xe_engine_class_instance *eci,
>  	}
>  
>  	vm = xe_vm_create(fd, 0, 0);
> -	bo_size = page_size * bo_n_pages;
> +	bo_size = xe_bb_size(fd, page_size * bo_n_pages);
>  
>  	if (flags & MAP_FLAG_USERPTR) {
>  		map = mmap(from_user_pointer(addr), bo_size, PROT_READ |
> @@ -1573,7 +1575,7 @@ test_mmap_style_bind(int fd, struct drm_xe_engine_class_instance *eci,
>  	}
>  
>  	vm = xe_vm_create(fd, 0, 0);
> -	bo_size = page_size * bo_n_pages;
> +	bo_size = xe_bb_size(fd, page_size * bo_n_pages);
>  
>  	if (flags & MAP_FLAG_USERPTR) {
>  		map0 = mmap(from_user_pointer(addr), bo_size, PROT_READ |
> diff --git a/tests/intel/xe_waitfence.c b/tests/intel/xe_waitfence.c
> index 5f7316f6e..f6f797d43 100644
> --- a/tests/intel/xe_waitfence.c
> +++ b/tests/intel/xe_waitfence.c
> @@ -212,6 +212,7 @@ exec_queue_reset_wait(int fd)
>  	uint64_t sdi_offset;
>  	uint64_t sdi_addr;
>  	uint64_t addr = 0x1a0000;
> +	uint64_t bb_size;
>  
>  	struct {
>  		uint32_t batch[16];
> @@ -236,8 +237,9 @@ exec_queue_reset_wait(int fd)
>  		.exec_queue_id = exec_queue,
>  	};
>  
> -	bo = xe_bo_create(fd, vm, 0x40000, vram_if_possible(fd, 0), 0);
> -	data = xe_bo_map(fd, bo, 0x40000);
> +	bb_size = xe_bb_size(fd, 0x40000);
> +	bo = xe_bo_create(fd, vm, bb_size, vram_if_possible(fd, 0), 0);
> +	data = xe_bo_map(fd, bo, bb_size);
>  
>  	batch_offset = (char *)&data[0].batch - (char *)data;
>  	batch_addr = addr + batch_offset;
> @@ -267,7 +269,7 @@ exec_queue_reset_wait(int fd)
>  	xe_exec_queue_destroy(fd, exec_queue);
>  
>  	if (bo) {
> -		munmap(data, 0x40000);
> +		munmap(data, bb_size);
>  		gem_close(fd, bo);
>  	}
>  }
> -- 
> 2.43.0
> 

Looks good,

Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>

--
Zbigniew

[PATCH i-g-t 3/5] benchmarks/gem_wsim: use xe_bb_size() helper

[Matthew Auld]

No need to open code this anymore.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 benchmarks/gem_wsim.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/benchmarks/gem_wsim.c b/benchmarks/gem_wsim.c
index 955b6799e..257134539 100644
--- a/benchmarks/gem_wsim.c
+++ b/benchmarks/gem_wsim.c
@@ -1743,8 +1743,8 @@ xe_alloc_step_batch(struct workload *wrk, struct w_step *w)
 	struct dep_entry *dep;
 	int i;
 
-	w->bb_size = ALIGN(PAGE_SIZE + xe_cs_prefetch_size(fd),
-			   xe_get_default_alignment(fd));
+	w->bb_size = xe_bb_size(fd, PAGE_SIZE);
+
 	w->bb_handle = xe_bo_create(fd, vm->id, w->bb_size,
 				    vram_if_possible(fd, eq->hwe_list[0].gt_id),
 				    DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
-- 
2.43.0

Re: [PATCH i-g-t 3/5] benchmarks/gem_wsim: use xe_bb_size() helper

[Zbigniew Kempczyński]

On Wed, Jan 24, 2024 at 06:07:11PM +0000, Matthew Auld wrote:
> No need to open code this anymore.
> 
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
>  benchmarks/gem_wsim.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/benchmarks/gem_wsim.c b/benchmarks/gem_wsim.c
> index 955b6799e..257134539 100644
> --- a/benchmarks/gem_wsim.c
> +++ b/benchmarks/gem_wsim.c
> @@ -1743,8 +1743,8 @@ xe_alloc_step_batch(struct workload *wrk, struct w_step *w)
>  	struct dep_entry *dep;
>  	int i;
>  
> -	w->bb_size = ALIGN(PAGE_SIZE + xe_cs_prefetch_size(fd),
> -			   xe_get_default_alignment(fd));
> +	w->bb_size = xe_bb_size(fd, PAGE_SIZE);
> +
>  	w->bb_handle = xe_bo_create(fd, vm->id, w->bb_size,
>  				    vram_if_possible(fd, eq->hwe_list[0].gt_id),
>  				    DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
> -- 
> 2.43.0
> 

Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>

--
Zbigniew

[PATCH i-g-t 4/5] lib/igt_fb: use xe_bb_size() helper

[Matthew Auld]

No need to open code this anymore.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 lib/igt_fb.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index 2cf94013e..71c220a08 100644
--- a/lib/igt_fb.c
+++ b/lib/igt_fb.c
@@ -2906,8 +2906,7 @@ static void blitcopy(const struct igt_fb *dst_fb,
 						 INTEL_ALLOCATOR_SIMPLE,
 						 ALLOC_STRATEGY_LOW_TO_HIGH, 0);
 
-		bb_size = ALIGN(bb_size + xe_cs_prefetch_size(dst_fb->fd),
-				xe_get_default_alignment(dst_fb->fd));
+		bb_size = xe_bb_size(dst_fb->fd, bb_size);
 		xe_bb = xe_bo_create(dst_fb->fd, 0, bb_size, mem_region, 0);
 	}
 
-- 
2.43.0

Re: [PATCH i-g-t 4/5] lib/igt_fb: use xe_bb_size() helper

[Zbigniew Kempczyński]

On Wed, Jan 24, 2024 at 06:07:12PM +0000, Matthew Auld wrote:
> No need to open code this anymore.
> 
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
>  lib/igt_fb.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/lib/igt_fb.c b/lib/igt_fb.c
> index 2cf94013e..71c220a08 100644
> --- a/lib/igt_fb.c
> +++ b/lib/igt_fb.c
> @@ -2906,8 +2906,7 @@ static void blitcopy(const struct igt_fb *dst_fb,
>  						 INTEL_ALLOCATOR_SIMPLE,
>  						 ALLOC_STRATEGY_LOW_TO_HIGH, 0);
>  
> -		bb_size = ALIGN(bb_size + xe_cs_prefetch_size(dst_fb->fd),
> -				xe_get_default_alignment(dst_fb->fd));
> +		bb_size = xe_bb_size(dst_fb->fd, bb_size);
>  		xe_bb = xe_bo_create(dst_fb->fd, 0, bb_size, mem_region, 0);
>  	}
>  
> -- 
> 2.43.0
>

Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>

--
Zbigniew

[PATCH i-g-t 5/5] tests/intel/xe: use xe_bb_size() helper

[Matthew Auld]

No need to open code this anymore.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 tests/intel/xe_dma_buf_sync.c      |  3 +--
 tests/intel/xe_drm_fdinfo.c        |  3 +--
 tests/intel/xe_exec_atomic.c       |  3 +--
 tests/intel/xe_exec_balancer.c     |  7 +++----
 tests/intel/xe_exec_basic.c        |  3 +--
 tests/intel/xe_exec_compute_mode.c |  5 ++---
 tests/intel/xe_exec_fault_mode.c   |  3 +--
 tests/intel/xe_exec_reset.c        | 12 ++++--------
 tests/intel/xe_exec_store.c        |  8 +++-----
 tests/intel/xe_exec_threads.c      |  9 +++------
 tests/intel/xe_pm.c                |  3 +--
 tests/intel/xe_spin_batch.c        |  5 ++---
 tests/intel/xe_vm.c                | 12 ++++--------
 13 files changed, 27 insertions(+), 49 deletions(-)

diff --git a/tests/intel/xe_dma_buf_sync.c b/tests/intel/xe_dma_buf_sync.c
index eca3a5e95..b69283093 100644
--- a/tests/intel/xe_dma_buf_sync.c
+++ b/tests/intel/xe_dma_buf_sync.c
@@ -116,8 +116,7 @@ test_export_dma_buf(struct drm_xe_engine_class_instance *hwe0,
 	}
 
 	bo_size = sizeof(*data[0]) * N_FD;
-	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd[0]),
-			xe_get_default_alignment(fd[0]));
+	bo_size = xe_bb_size(fd[0], bo_size);
 	for (i = 0; i < n_bo; ++i) {
 		bo[i] = xe_bo_create(fd[0], 0, bo_size,
 				     vram_if_possible(fd[0], hwe0->gt_id),
diff --git a/tests/intel/xe_drm_fdinfo.c b/tests/intel/xe_drm_fdinfo.c
index 36bb39a31..a582703c1 100644
--- a/tests/intel/xe_drm_fdinfo.c
+++ b/tests/intel/xe_drm_fdinfo.c
@@ -73,8 +73,7 @@ static void test_active(int fd, struct drm_xe_engine *engine)
 
 	vm = xe_vm_create(fd, 0, 0);
 	bo_size = sizeof(*data) * N_EXEC_QUEUES;
-	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
-			xe_get_default_alignment(fd));
+	bo_size = xe_bb_size(fd, bo_size);
 
 	xe_for_each_mem_region(fd, memreg, region) {
 		uint64_t pre_size;
diff --git a/tests/intel/xe_exec_atomic.c b/tests/intel/xe_exec_atomic.c
index fecd377ef..7ee80816c 100644
--- a/tests/intel/xe_exec_atomic.c
+++ b/tests/intel/xe_exec_atomic.c
@@ -78,8 +78,7 @@ static void basic_inst(int fd, int inst_type, struct drm_xe_engine_class_instanc
 
 	vm = xe_vm_create(fd, 0, 0);
 	bo_size = sizeof(*data);
-	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
-			xe_get_default_alignment(fd));
+	bo_size = xe_bb_size(fd, bo_size);
 
 	bo = xe_bo_create(fd, vm, bo_size, placement,
 			  I915_GEM_CREATE_EXT_FLAG_NEEDS_CPU_ACCESS);
diff --git a/tests/intel/xe_exec_balancer.c b/tests/intel/xe_exec_balancer.c
index 664e6da59..02edd389d 100644
--- a/tests/intel/xe_exec_balancer.c
+++ b/tests/intel/xe_exec_balancer.c
@@ -68,7 +68,7 @@ static void test_all_active(int fd, int gt, int class)
 
 	vm = xe_vm_create(fd, 0, 0);
 	bo_size = sizeof(*data) * num_placements;
-	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd), xe_get_default_alignment(fd));
+	bo_size = xe_bb_size(fd, bo_size);
 
 	bo = xe_bo_create(fd, vm, bo_size, vram_if_possible(fd, gt),
 			  DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
@@ -210,7 +210,7 @@ test_exec(int fd, int gt, int class, int n_exec_queues, int n_execs,
 
 	vm = xe_vm_create(fd, 0, 0);
 	bo_size = sizeof(*data) * n_execs;
-	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd), xe_get_default_alignment(fd));
+	bo_size = xe_bb_size(fd, bo_size);
 
 	if (flags & USERPTR) {
 #define	MAP_ADDRESS	0x00007fadeadbe000
@@ -437,8 +437,7 @@ test_cm(int fd, int gt, int class, int n_exec_queues, int n_execs,
 
 	vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_LR_MODE, 0);
 	bo_size = sizeof(*data) * n_execs;
-	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
-			xe_get_default_alignment(fd));
+	bo_size = xe_bb_size(fd, bo_size);
 
 	if (flags & USERPTR) {
 #define	MAP_ADDRESS	0x00007fadeadbe000
diff --git a/tests/intel/xe_exec_basic.c b/tests/intel/xe_exec_basic.c
index 8994859fa..e6f8db5b0 100644
--- a/tests/intel/xe_exec_basic.c
+++ b/tests/intel/xe_exec_basic.c
@@ -111,8 +111,7 @@ test_exec(int fd, struct drm_xe_engine_class_instance *eci,
 	for (i = 0; i < n_vm; ++i)
 		vm[i] = xe_vm_create(fd, 0, 0);
 	bo_size = sizeof(*data) * n_execs;
-	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
-			xe_get_default_alignment(fd));
+	bo_size = xe_bb_size(fd, bo_size);
 
 	addr[0] = 0x1a0000;
 	sparse_addr[0] = 0x301a0000;
diff --git a/tests/intel/xe_exec_compute_mode.c b/tests/intel/xe_exec_compute_mode.c
index 473b11ae9..7dad71509 100644
--- a/tests/intel/xe_exec_compute_mode.c
+++ b/tests/intel/xe_exec_compute_mode.c
@@ -118,8 +118,7 @@ test_exec(int fd, struct drm_xe_engine_class_instance *eci,
 
 	vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_LR_MODE, 0);
 	bo_size = sizeof(*data) * n_execs;
-	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
-			xe_get_default_alignment(fd));
+	bo_size = xe_bb_size(fd, bo_size);
 
 	for (i = 0; (flags & EXEC_QUEUE_EARLY) && i < n_exec_queues; i++) {
 		exec_queues[i] = xe_exec_queue_create(fd, vm, eci, 0);
@@ -336,7 +335,7 @@ static void non_block(int fd, int expect)
 
 	vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_LR_MODE, 0);
 	bo_size = sizeof(*data) * DATA_COUNT;
-	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd), xe_get_default_alignment(fd));
+	bo_size = xe_bb_size(fd, bo_size);
 
 	engine = xe_engine(fd, 1);
 	bo = xe_bo_create(fd, vm, bo_size, vram_if_possible(fd, engine->instance.gt_id), 0);
diff --git a/tests/intel/xe_exec_fault_mode.c b/tests/intel/xe_exec_fault_mode.c
index f19e939e3..dae0e8ac3 100644
--- a/tests/intel/xe_exec_fault_mode.c
+++ b/tests/intel/xe_exec_fault_mode.c
@@ -134,8 +134,7 @@ test_exec(int fd, struct drm_xe_engine_class_instance *eci,
 	vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_LR_MODE |
 			  DRM_XE_VM_CREATE_FLAG_FAULT_MODE, 0);
 	bo_size = sizeof(*data) * n_execs;
-	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
-			xe_get_default_alignment(fd));
+	bo_size = xe_bb_size(fd, bo_size);
 
 	if (flags & USERPTR) {
 #define	MAP_ADDRESS	0x00007fadeadbe000
diff --git a/tests/intel/xe_exec_reset.c b/tests/intel/xe_exec_reset.c
index 978b4d279..a9206d7d2 100644
--- a/tests/intel/xe_exec_reset.c
+++ b/tests/intel/xe_exec_reset.c
@@ -47,8 +47,7 @@ static void test_spin(int fd, struct drm_xe_engine_class_instance *eci)
 
 	vm = xe_vm_create(fd, 0, 0);
 	bo_size = sizeof(*spin);
-	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
-			xe_get_default_alignment(fd));
+	bo_size = xe_bb_size(fd, bo_size);
 
 	bo = xe_bo_create(fd, vm, bo_size,
 			  vram_if_possible(fd, eci->gt_id),
@@ -179,8 +178,7 @@ test_balancer(int fd, int gt, int class, int n_exec_queues, int n_execs,
 
 	vm = xe_vm_create(fd, 0, 0);
 	bo_size = sizeof(*data) * n_execs;
-	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
-			xe_get_default_alignment(fd));
+	bo_size = xe_bb_size(fd, bo_size);
 
 	bo = xe_bo_create(fd, vm, bo_size, vram_if_possible(fd, gt),
 			  DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
@@ -368,8 +366,7 @@ test_legacy_mode(int fd, struct drm_xe_engine_class_instance *eci,
 
 	vm = xe_vm_create(fd, 0, 0);
 	bo_size = sizeof(*data) * n_execs;
-	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
-			xe_get_default_alignment(fd));
+	bo_size = xe_bb_size(fd, bo_size);
 
 	bo = xe_bo_create(fd, vm, bo_size,
 			  vram_if_possible(fd, eci->gt_id),
@@ -537,8 +534,7 @@ test_compute_mode(int fd, struct drm_xe_engine_class_instance *eci,
 
 	vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_LR_MODE, 0);
 	bo_size = sizeof(*data) * n_execs;
-	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
-			xe_get_default_alignment(fd));
+	bo_size = xe_bb_size(fd, bo_size);
 
 	bo = xe_bo_create(fd, vm, bo_size,
 			  vram_if_possible(fd, eci->gt_id),
diff --git a/tests/intel/xe_exec_store.c b/tests/intel/xe_exec_store.c
index bed118688..55354e688 100644
--- a/tests/intel/xe_exec_store.c
+++ b/tests/intel/xe_exec_store.c
@@ -126,8 +126,7 @@ static void basic_inst(int fd, int inst_type, struct drm_xe_engine_class_instanc
 
 	vm = xe_vm_create(fd, 0, 0);
 	bo_size = sizeof(*data);
-	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
-			xe_get_default_alignment(fd));
+	bo_size = xe_bb_size(fd, bo_size);
 
 	bo = xe_bo_create(fd, vm, bo_size,
 			  vram_if_possible(fd, eci->gt_id),
@@ -201,7 +200,7 @@ static void store_cachelines(int fd, struct drm_xe_engine_class_instance *eci,
 	uint32_t *batch_map;
 	size_t bo_size = 4096;
 
-	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd), xe_get_default_alignment(fd));
+	bo_size = xe_bb_size(fd, bo_size);
 	vm = xe_vm_create(fd, 0, 0);
 	ahnd = intel_allocator_open(fd, 0, INTEL_ALLOCATOR_SIMPLE);
 	exec_queues = xe_exec_queue_create(fd, vm, eci, 0);
@@ -291,8 +290,7 @@ static void persistent(int fd)
 	sync.handle = syncobj;
 
 	vm = xe_vm_create(fd, 0, 0);
-	batch_size = ALIGN(batch_size + xe_cs_prefetch_size(fd),
-					xe_get_default_alignment(fd));
+	batch_size = xe_bb_size(fd, batch_size);
 
 	engine = xe_engine(fd, 1);
 	sd_batch = xe_bo_create(fd, vm, batch_size,
diff --git a/tests/intel/xe_exec_threads.c b/tests/intel/xe_exec_threads.c
index 17ee57a49..1b2623045 100644
--- a/tests/intel/xe_exec_threads.c
+++ b/tests/intel/xe_exec_threads.c
@@ -90,8 +90,7 @@ test_balancer(int fd, int gt, uint32_t vm, uint64_t addr, uint64_t userptr,
 	igt_assert(num_placements > 1);
 
 	bo_size = sizeof(*data) * n_execs;
-	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
-			xe_get_default_alignment(fd));
+	bo_size = xe_bb_size(fd, bo_size);
 
 	if (flags & USERPTR) {
 		if (flags & INVALIDATE) {
@@ -291,8 +290,7 @@ test_compute_mode(int fd, uint32_t vm, uint64_t addr, uint64_t userptr,
 	}
 
 	bo_size = sizeof(*data) * n_execs;
-	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
-			xe_get_default_alignment(fd));
+	bo_size = xe_bb_size(fd, bo_size);
 
 	if (flags & USERPTR) {
 		if (flags & INVALIDATE) {
@@ -496,8 +494,7 @@ test_legacy_mode(int fd, uint32_t vm, uint64_t addr, uint64_t userptr,
 	}
 
 	bo_size = sizeof(*data) * n_execs;
-	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
-			xe_get_default_alignment(fd));
+	bo_size = xe_bb_size(fd, bo_size);
 
 	if (flags & USERPTR) {
 		if (flags & INVALIDATE) {
diff --git a/tests/intel/xe_pm.c b/tests/intel/xe_pm.c
index 4afe37d93..fac19f2ec 100644
--- a/tests/intel/xe_pm.c
+++ b/tests/intel/xe_pm.c
@@ -294,8 +294,7 @@ test_exec(device_t device, struct drm_xe_engine_class_instance *eci,
 		igt_assert(out_of_d3(device, d_state));
 
 	bo_size = sizeof(*data) * n_execs;
-	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(device.fd_xe),
-			xe_get_default_alignment(device.fd_xe));
+	bo_size = xe_bb_size(device.fd_xe, bo_size);
 
 	if (check_rpm && runtime_usage_available(device.pci_xe))
 		rpm_usage = igt_pm_get_runtime_usage(device.pci_xe);
diff --git a/tests/intel/xe_spin_batch.c b/tests/intel/xe_spin_batch.c
index 3f3283829..c18306350 100644
--- a/tests/intel/xe_spin_batch.c
+++ b/tests/intel/xe_spin_batch.c
@@ -192,8 +192,7 @@ static void preempter(int fd, struct drm_xe_engine_class_instance *hwe)
 
 	vm = xe_vm_create(fd, 0, 0);
 	bo_size = sizeof(*data);
-	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
-			xe_get_default_alignment(fd));
+	bo_size = xe_bb_size(fd, bo_size);
 
 	bo = xe_bo_create(fd, vm, bo_size,
 			  vram_if_possible(fd, hwe->gt_id),
@@ -278,7 +277,7 @@ static void xe_spin_fixed_duration(int fd, int gt, int class, int flags)
 	vm = xe_vm_create(fd, 0, 0);
 	exec_queue = xe_exec_queue_create(fd, vm, hwe, ext);
 	ahnd = intel_allocator_open(fd, 0, INTEL_ALLOCATOR_RELOC);
-	bo_size = ALIGN(sizeof(*spin) + xe_cs_prefetch_size(fd), xe_get_default_alignment(fd));
+	bo_size = xe_bb_size(fd, sizeof(*spin));
 	bo = xe_bo_create(fd, vm, bo_size, vram_if_possible(fd, 0), 0);
 	spin = xe_bo_map(fd, bo, bo_size);
 	spin_addr = intel_allocator_alloc_with_strategy(ahnd, bo, bo_size, 0,
diff --git a/tests/intel/xe_vm.c b/tests/intel/xe_vm.c
index ebc1ca68f..67276b220 100644
--- a/tests/intel/xe_vm.c
+++ b/tests/intel/xe_vm.c
@@ -50,8 +50,7 @@ write_dwords(int fd, uint32_t vm, int n_dwords, uint64_t *addrs)
 	int i, b = 0;
 
 	batch_size = (n_dwords * 4 + 1) * sizeof(uint32_t);
-	batch_size = ALIGN(batch_size + xe_cs_prefetch_size(fd),
-			   xe_get_default_alignment(fd));
+	batch_size = xe_bb_size(fd, batch_size);
 	batch_bo = xe_bo_create(fd, vm, batch_size,
 				vram_if_possible(fd, 0),
 				DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
@@ -418,8 +417,7 @@ shared_pte_page(int fd, struct drm_xe_engine_class_instance *eci, int n_bo,
 
 	vm = xe_vm_create(fd, 0, 0);
 	bo_size = sizeof(struct shared_pte_page_data);
-	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
-			xe_get_default_alignment(fd));
+	bo_size = xe_bb_size(fd, bo_size);
 
 	if (addr_stride <= bo_size)
 		addr_stride = addr_stride + bo_size;
@@ -603,8 +601,7 @@ test_bind_execqueues_independent(int fd, struct drm_xe_engine_class_instance *ec
 
 	vm = xe_vm_create(fd, 0, 0);
 	bo_size = sizeof(*data) * N_EXEC_QUEUES;
-	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
-			xe_get_default_alignment(fd));
+	bo_size = xe_bb_size(fd, bo_size);
 	bo = xe_bo_create(fd, vm, bo_size,
 			  vram_if_possible(fd, eci->gt_id),
 			  DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
@@ -784,8 +781,7 @@ test_bind_array(int fd, struct drm_xe_engine_class_instance *eci, int n_execs,
 
 	vm = xe_vm_create(fd, 0, 0);
 	bo_size = sizeof(*data) * n_execs;
-	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
-			xe_get_default_alignment(fd));
+	bo_size = xe_bb_size(fd, bo_size);
 
 	bo = xe_bo_create(fd, vm, bo_size,
 			  vram_if_possible(fd, eci->gt_id),
-- 
2.43.0

Re: [PATCH i-g-t 5/5] tests/intel/xe: use xe_bb_size() helper

[Zbigniew Kempczyński]

On Wed, Jan 24, 2024 at 06:07:13PM +0000, Matthew Auld wrote:
> No need to open code this anymore.
> 
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
>  tests/intel/xe_dma_buf_sync.c      |  3 +--
>  tests/intel/xe_drm_fdinfo.c        |  3 +--
>  tests/intel/xe_exec_atomic.c       |  3 +--
>  tests/intel/xe_exec_balancer.c     |  7 +++----
>  tests/intel/xe_exec_basic.c        |  3 +--
>  tests/intel/xe_exec_compute_mode.c |  5 ++---
>  tests/intel/xe_exec_fault_mode.c   |  3 +--
>  tests/intel/xe_exec_reset.c        | 12 ++++--------
>  tests/intel/xe_exec_store.c        |  8 +++-----
>  tests/intel/xe_exec_threads.c      |  9 +++------
>  tests/intel/xe_pm.c                |  3 +--
>  tests/intel/xe_spin_batch.c        |  5 ++---
>  tests/intel/xe_vm.c                | 12 ++++--------
>  13 files changed, 27 insertions(+), 49 deletions(-)
> 
> diff --git a/tests/intel/xe_dma_buf_sync.c b/tests/intel/xe_dma_buf_sync.c
> index eca3a5e95..b69283093 100644
> --- a/tests/intel/xe_dma_buf_sync.c
> +++ b/tests/intel/xe_dma_buf_sync.c
> @@ -116,8 +116,7 @@ test_export_dma_buf(struct drm_xe_engine_class_instance *hwe0,
>  	}
>  
>  	bo_size = sizeof(*data[0]) * N_FD;
> -	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd[0]),
> -			xe_get_default_alignment(fd[0]));
> +	bo_size = xe_bb_size(fd[0], bo_size);
>  	for (i = 0; i < n_bo; ++i) {
>  		bo[i] = xe_bo_create(fd[0], 0, bo_size,
>  				     vram_if_possible(fd[0], hwe0->gt_id),
> diff --git a/tests/intel/xe_drm_fdinfo.c b/tests/intel/xe_drm_fdinfo.c
> index 36bb39a31..a582703c1 100644
> --- a/tests/intel/xe_drm_fdinfo.c
> +++ b/tests/intel/xe_drm_fdinfo.c
> @@ -73,8 +73,7 @@ static void test_active(int fd, struct drm_xe_engine *engine)
>  
>  	vm = xe_vm_create(fd, 0, 0);
>  	bo_size = sizeof(*data) * N_EXEC_QUEUES;
> -	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
> -			xe_get_default_alignment(fd));
> +	bo_size = xe_bb_size(fd, bo_size);
>  
>  	xe_for_each_mem_region(fd, memreg, region) {
>  		uint64_t pre_size;
> diff --git a/tests/intel/xe_exec_atomic.c b/tests/intel/xe_exec_atomic.c
> index fecd377ef..7ee80816c 100644
> --- a/tests/intel/xe_exec_atomic.c
> +++ b/tests/intel/xe_exec_atomic.c
> @@ -78,8 +78,7 @@ static void basic_inst(int fd, int inst_type, struct drm_xe_engine_class_instanc
>  
>  	vm = xe_vm_create(fd, 0, 0);
>  	bo_size = sizeof(*data);
> -	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
> -			xe_get_default_alignment(fd));
> +	bo_size = xe_bb_size(fd, bo_size);
>  
>  	bo = xe_bo_create(fd, vm, bo_size, placement,
>  			  I915_GEM_CREATE_EXT_FLAG_NEEDS_CPU_ACCESS);
> diff --git a/tests/intel/xe_exec_balancer.c b/tests/intel/xe_exec_balancer.c
> index 664e6da59..02edd389d 100644
> --- a/tests/intel/xe_exec_balancer.c
> +++ b/tests/intel/xe_exec_balancer.c
> @@ -68,7 +68,7 @@ static void test_all_active(int fd, int gt, int class)
>  
>  	vm = xe_vm_create(fd, 0, 0);
>  	bo_size = sizeof(*data) * num_placements;
> -	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd), xe_get_default_alignment(fd));
> +	bo_size = xe_bb_size(fd, bo_size);
>  
>  	bo = xe_bo_create(fd, vm, bo_size, vram_if_possible(fd, gt),
>  			  DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
> @@ -210,7 +210,7 @@ test_exec(int fd, int gt, int class, int n_exec_queues, int n_execs,
>  
>  	vm = xe_vm_create(fd, 0, 0);
>  	bo_size = sizeof(*data) * n_execs;
> -	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd), xe_get_default_alignment(fd));
> +	bo_size = xe_bb_size(fd, bo_size);
>  
>  	if (flags & USERPTR) {
>  #define	MAP_ADDRESS	0x00007fadeadbe000
> @@ -437,8 +437,7 @@ test_cm(int fd, int gt, int class, int n_exec_queues, int n_execs,
>  
>  	vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_LR_MODE, 0);
>  	bo_size = sizeof(*data) * n_execs;
> -	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
> -			xe_get_default_alignment(fd));
> +	bo_size = xe_bb_size(fd, bo_size);
>  
>  	if (flags & USERPTR) {
>  #define	MAP_ADDRESS	0x00007fadeadbe000
> diff --git a/tests/intel/xe_exec_basic.c b/tests/intel/xe_exec_basic.c
> index 8994859fa..e6f8db5b0 100644
> --- a/tests/intel/xe_exec_basic.c
> +++ b/tests/intel/xe_exec_basic.c
> @@ -111,8 +111,7 @@ test_exec(int fd, struct drm_xe_engine_class_instance *eci,
>  	for (i = 0; i < n_vm; ++i)
>  		vm[i] = xe_vm_create(fd, 0, 0);
>  	bo_size = sizeof(*data) * n_execs;
> -	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
> -			xe_get_default_alignment(fd));
> +	bo_size = xe_bb_size(fd, bo_size);
>  
>  	addr[0] = 0x1a0000;
>  	sparse_addr[0] = 0x301a0000;
> diff --git a/tests/intel/xe_exec_compute_mode.c b/tests/intel/xe_exec_compute_mode.c
> index 473b11ae9..7dad71509 100644
> --- a/tests/intel/xe_exec_compute_mode.c
> +++ b/tests/intel/xe_exec_compute_mode.c
> @@ -118,8 +118,7 @@ test_exec(int fd, struct drm_xe_engine_class_instance *eci,
>  
>  	vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_LR_MODE, 0);
>  	bo_size = sizeof(*data) * n_execs;
> -	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
> -			xe_get_default_alignment(fd));
> +	bo_size = xe_bb_size(fd, bo_size);
>  
>  	for (i = 0; (flags & EXEC_QUEUE_EARLY) && i < n_exec_queues; i++) {
>  		exec_queues[i] = xe_exec_queue_create(fd, vm, eci, 0);
> @@ -336,7 +335,7 @@ static void non_block(int fd, int expect)
>  
>  	vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_LR_MODE, 0);
>  	bo_size = sizeof(*data) * DATA_COUNT;
> -	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd), xe_get_default_alignment(fd));
> +	bo_size = xe_bb_size(fd, bo_size);
>  
>  	engine = xe_engine(fd, 1);
>  	bo = xe_bo_create(fd, vm, bo_size, vram_if_possible(fd, engine->instance.gt_id), 0);
> diff --git a/tests/intel/xe_exec_fault_mode.c b/tests/intel/xe_exec_fault_mode.c
> index f19e939e3..dae0e8ac3 100644
> --- a/tests/intel/xe_exec_fault_mode.c
> +++ b/tests/intel/xe_exec_fault_mode.c
> @@ -134,8 +134,7 @@ test_exec(int fd, struct drm_xe_engine_class_instance *eci,
>  	vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_LR_MODE |
>  			  DRM_XE_VM_CREATE_FLAG_FAULT_MODE, 0);
>  	bo_size = sizeof(*data) * n_execs;
> -	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
> -			xe_get_default_alignment(fd));
> +	bo_size = xe_bb_size(fd, bo_size);
>  
>  	if (flags & USERPTR) {
>  #define	MAP_ADDRESS	0x00007fadeadbe000
> diff --git a/tests/intel/xe_exec_reset.c b/tests/intel/xe_exec_reset.c
> index 978b4d279..a9206d7d2 100644
> --- a/tests/intel/xe_exec_reset.c
> +++ b/tests/intel/xe_exec_reset.c
> @@ -47,8 +47,7 @@ static void test_spin(int fd, struct drm_xe_engine_class_instance *eci)
>  
>  	vm = xe_vm_create(fd, 0, 0);
>  	bo_size = sizeof(*spin);
> -	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
> -			xe_get_default_alignment(fd));
> +	bo_size = xe_bb_size(fd, bo_size);
>  
>  	bo = xe_bo_create(fd, vm, bo_size,
>  			  vram_if_possible(fd, eci->gt_id),
> @@ -179,8 +178,7 @@ test_balancer(int fd, int gt, int class, int n_exec_queues, int n_execs,
>  
>  	vm = xe_vm_create(fd, 0, 0);
>  	bo_size = sizeof(*data) * n_execs;
> -	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
> -			xe_get_default_alignment(fd));
> +	bo_size = xe_bb_size(fd, bo_size);
>  
>  	bo = xe_bo_create(fd, vm, bo_size, vram_if_possible(fd, gt),
>  			  DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
> @@ -368,8 +366,7 @@ test_legacy_mode(int fd, struct drm_xe_engine_class_instance *eci,
>  
>  	vm = xe_vm_create(fd, 0, 0);
>  	bo_size = sizeof(*data) * n_execs;
> -	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
> -			xe_get_default_alignment(fd));
> +	bo_size = xe_bb_size(fd, bo_size);
>  
>  	bo = xe_bo_create(fd, vm, bo_size,
>  			  vram_if_possible(fd, eci->gt_id),
> @@ -537,8 +534,7 @@ test_compute_mode(int fd, struct drm_xe_engine_class_instance *eci,
>  
>  	vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_LR_MODE, 0);
>  	bo_size = sizeof(*data) * n_execs;
> -	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
> -			xe_get_default_alignment(fd));
> +	bo_size = xe_bb_size(fd, bo_size);
>  
>  	bo = xe_bo_create(fd, vm, bo_size,
>  			  vram_if_possible(fd, eci->gt_id),
> diff --git a/tests/intel/xe_exec_store.c b/tests/intel/xe_exec_store.c
> index bed118688..55354e688 100644
> --- a/tests/intel/xe_exec_store.c
> +++ b/tests/intel/xe_exec_store.c
> @@ -126,8 +126,7 @@ static void basic_inst(int fd, int inst_type, struct drm_xe_engine_class_instanc
>  
>  	vm = xe_vm_create(fd, 0, 0);
>  	bo_size = sizeof(*data);
> -	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
> -			xe_get_default_alignment(fd));
> +	bo_size = xe_bb_size(fd, bo_size);
>  
>  	bo = xe_bo_create(fd, vm, bo_size,
>  			  vram_if_possible(fd, eci->gt_id),
> @@ -201,7 +200,7 @@ static void store_cachelines(int fd, struct drm_xe_engine_class_instance *eci,
>  	uint32_t *batch_map;
>  	size_t bo_size = 4096;
>  
> -	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd), xe_get_default_alignment(fd));
> +	bo_size = xe_bb_size(fd, bo_size);
>  	vm = xe_vm_create(fd, 0, 0);
>  	ahnd = intel_allocator_open(fd, 0, INTEL_ALLOCATOR_SIMPLE);
>  	exec_queues = xe_exec_queue_create(fd, vm, eci, 0);
> @@ -291,8 +290,7 @@ static void persistent(int fd)
>  	sync.handle = syncobj;
>  
>  	vm = xe_vm_create(fd, 0, 0);
> -	batch_size = ALIGN(batch_size + xe_cs_prefetch_size(fd),
> -					xe_get_default_alignment(fd));
> +	batch_size = xe_bb_size(fd, batch_size);
>  
>  	engine = xe_engine(fd, 1);
>  	sd_batch = xe_bo_create(fd, vm, batch_size,
> diff --git a/tests/intel/xe_exec_threads.c b/tests/intel/xe_exec_threads.c
> index 17ee57a49..1b2623045 100644
> --- a/tests/intel/xe_exec_threads.c
> +++ b/tests/intel/xe_exec_threads.c
> @@ -90,8 +90,7 @@ test_balancer(int fd, int gt, uint32_t vm, uint64_t addr, uint64_t userptr,
>  	igt_assert(num_placements > 1);
>  
>  	bo_size = sizeof(*data) * n_execs;
> -	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
> -			xe_get_default_alignment(fd));
> +	bo_size = xe_bb_size(fd, bo_size);
>  
>  	if (flags & USERPTR) {
>  		if (flags & INVALIDATE) {
> @@ -291,8 +290,7 @@ test_compute_mode(int fd, uint32_t vm, uint64_t addr, uint64_t userptr,
>  	}
>  
>  	bo_size = sizeof(*data) * n_execs;
> -	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
> -			xe_get_default_alignment(fd));
> +	bo_size = xe_bb_size(fd, bo_size);
>  
>  	if (flags & USERPTR) {
>  		if (flags & INVALIDATE) {
> @@ -496,8 +494,7 @@ test_legacy_mode(int fd, uint32_t vm, uint64_t addr, uint64_t userptr,
>  	}
>  
>  	bo_size = sizeof(*data) * n_execs;
> -	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
> -			xe_get_default_alignment(fd));
> +	bo_size = xe_bb_size(fd, bo_size);
>  
>  	if (flags & USERPTR) {
>  		if (flags & INVALIDATE) {
> diff --git a/tests/intel/xe_pm.c b/tests/intel/xe_pm.c
> index 4afe37d93..fac19f2ec 100644
> --- a/tests/intel/xe_pm.c
> +++ b/tests/intel/xe_pm.c
> @@ -294,8 +294,7 @@ test_exec(device_t device, struct drm_xe_engine_class_instance *eci,
>  		igt_assert(out_of_d3(device, d_state));
>  
>  	bo_size = sizeof(*data) * n_execs;
> -	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(device.fd_xe),
> -			xe_get_default_alignment(device.fd_xe));
> +	bo_size = xe_bb_size(device.fd_xe, bo_size);
>  
>  	if (check_rpm && runtime_usage_available(device.pci_xe))
>  		rpm_usage = igt_pm_get_runtime_usage(device.pci_xe);
> diff --git a/tests/intel/xe_spin_batch.c b/tests/intel/xe_spin_batch.c
> index 3f3283829..c18306350 100644
> --- a/tests/intel/xe_spin_batch.c
> +++ b/tests/intel/xe_spin_batch.c
> @@ -192,8 +192,7 @@ static void preempter(int fd, struct drm_xe_engine_class_instance *hwe)
>  
>  	vm = xe_vm_create(fd, 0, 0);
>  	bo_size = sizeof(*data);
> -	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
> -			xe_get_default_alignment(fd));
> +	bo_size = xe_bb_size(fd, bo_size);
>  
>  	bo = xe_bo_create(fd, vm, bo_size,
>  			  vram_if_possible(fd, hwe->gt_id),
> @@ -278,7 +277,7 @@ static void xe_spin_fixed_duration(int fd, int gt, int class, int flags)
>  	vm = xe_vm_create(fd, 0, 0);
>  	exec_queue = xe_exec_queue_create(fd, vm, hwe, ext);
>  	ahnd = intel_allocator_open(fd, 0, INTEL_ALLOCATOR_RELOC);
> -	bo_size = ALIGN(sizeof(*spin) + xe_cs_prefetch_size(fd), xe_get_default_alignment(fd));
> +	bo_size = xe_bb_size(fd, sizeof(*spin));
>  	bo = xe_bo_create(fd, vm, bo_size, vram_if_possible(fd, 0), 0);
>  	spin = xe_bo_map(fd, bo, bo_size);
>  	spin_addr = intel_allocator_alloc_with_strategy(ahnd, bo, bo_size, 0,
> diff --git a/tests/intel/xe_vm.c b/tests/intel/xe_vm.c
> index ebc1ca68f..67276b220 100644
> --- a/tests/intel/xe_vm.c
> +++ b/tests/intel/xe_vm.c
> @@ -50,8 +50,7 @@ write_dwords(int fd, uint32_t vm, int n_dwords, uint64_t *addrs)
>  	int i, b = 0;
>  
>  	batch_size = (n_dwords * 4 + 1) * sizeof(uint32_t);
> -	batch_size = ALIGN(batch_size + xe_cs_prefetch_size(fd),
> -			   xe_get_default_alignment(fd));
> +	batch_size = xe_bb_size(fd, batch_size);
>  	batch_bo = xe_bo_create(fd, vm, batch_size,
>  				vram_if_possible(fd, 0),
>  				DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
> @@ -418,8 +417,7 @@ shared_pte_page(int fd, struct drm_xe_engine_class_instance *eci, int n_bo,
>  
>  	vm = xe_vm_create(fd, 0, 0);
>  	bo_size = sizeof(struct shared_pte_page_data);
> -	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
> -			xe_get_default_alignment(fd));
> +	bo_size = xe_bb_size(fd, bo_size);
>  
>  	if (addr_stride <= bo_size)
>  		addr_stride = addr_stride + bo_size;
> @@ -603,8 +601,7 @@ test_bind_execqueues_independent(int fd, struct drm_xe_engine_class_instance *ec
>  
>  	vm = xe_vm_create(fd, 0, 0);
>  	bo_size = sizeof(*data) * N_EXEC_QUEUES;
> -	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
> -			xe_get_default_alignment(fd));
> +	bo_size = xe_bb_size(fd, bo_size);
>  	bo = xe_bo_create(fd, vm, bo_size,
>  			  vram_if_possible(fd, eci->gt_id),
>  			  DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
> @@ -784,8 +781,7 @@ test_bind_array(int fd, struct drm_xe_engine_class_instance *eci, int n_execs,
>  
>  	vm = xe_vm_create(fd, 0, 0);
>  	bo_size = sizeof(*data) * n_execs;
> -	bo_size = ALIGN(bo_size + xe_cs_prefetch_size(fd),
> -			xe_get_default_alignment(fd));
> +	bo_size = xe_bb_size(fd, bo_size);
>  
>  	bo = xe_bo_create(fd, vm, bo_size,
>  			  vram_if_possible(fd, eci->gt_id),
> -- 
> 2.43.0
> 

Nice, this is much readable now:

Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>

--
Zbigniew

✗ Fi.CI.BAT: failure for series starting with [i-g-t,1/5] lib/xe/ioctl: introduce xe_bb_size() helper

[Patchwork]

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== Series Details ==

Series: series starting with [i-g-t,1/5] lib/xe/ioctl: introduce xe_bb_size() helper
URL   : https://patchwork.freedesktop.org/series/129140/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_14169 -> IGTPW_10584
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_10584 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_10584, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10584/index.html

Participating hosts (37 -> 31)
------------------------------

  Missing    (6): bat-kbl-2 fi-snb-2520m fi-kbl-x1275 fi-pnv-d510 bat-rpls-2 bat-mtlp-8 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_10584:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_selftest@live@workarounds:
    - bat-dg2-11:         [PASS][1] -> [DMESG-WARN][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14169/bat-dg2-11/igt@i915_selftest@live@workarounds.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10584/bat-dg2-11/igt@i915_selftest@live@workarounds.html

  
Known issues
------------

  Here are the changes found in IGTPW_10584 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_lmem_swapping@parallel-random-engines:
    - bat-adlm-1:         NOTRUN -> [SKIP][3] ([i915#4613]) +3 other tests skip
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10584/bat-adlm-1/igt@gem_lmem_swapping@parallel-random-engines.html

  * igt@i915_pm_rps@basic-api:
    - bat-adlm-1:         NOTRUN -> [SKIP][4] ([i915#6621])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10584/bat-adlm-1/igt@i915_pm_rps@basic-api.html

  * igt@kms_force_connector_basic@force-load-detect:
    - bat-adlm-1:         NOTRUN -> [SKIP][5] ([fdo#109285])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10584/bat-adlm-1/igt@kms_force_connector_basic@force-load-detect.html

  * igt@kms_frontbuffer_tracking@basic:
    - bat-adlm-1:         NOTRUN -> [SKIP][6] ([i915#1849] / [i915#4342])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10584/bat-adlm-1/igt@kms_frontbuffer_tracking@basic.html

  * igt@kms_pipe_crc_basic@hang-read-crc:
    - bat-adlm-1:         NOTRUN -> [SKIP][7] ([i915#9875] / [i915#9900]) +6 other tests skip
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10584/bat-adlm-1/igt@kms_pipe_crc_basic@hang-read-crc.html

  * igt@kms_pm_backlight@basic-brightness:
    - bat-adlm-1:         NOTRUN -> [SKIP][8] ([i915#5354])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10584/bat-adlm-1/igt@kms_pm_backlight@basic-brightness.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - bat-adlm-1:         NOTRUN -> [SKIP][9] ([i915#3555])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10584/bat-adlm-1/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@prime_vgem@basic-fence-flip:
    - bat-adlm-1:         NOTRUN -> [SKIP][10] ([i915#3708] / [i915#9900])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10584/bat-adlm-1/igt@prime_vgem@basic-fence-flip.html

  * igt@prime_vgem@basic-write:
    - bat-adlm-1:         NOTRUN -> [SKIP][11] ([i915#3708]) +2 other tests skip
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10584/bat-adlm-1/igt@prime_vgem@basic-write.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#4342]: https://gitlab.freedesktop.org/drm/intel/issues/4342
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
  [i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
  [i915#9673]: https://gitlab.freedesktop.org/drm/intel/issues/9673
  [i915#9732]: https://gitlab.freedesktop.org/drm/intel/issues/9732
  [i915#9875]: https://gitlab.freedesktop.org/drm/intel/issues/9875
  [i915#9900]: https://gitlab.freedesktop.org/drm/intel/issues/9900


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_7691 -> IGTPW_10584

  CI-20190529: 20190529
  CI_DRM_14169: 96b582d5ddfc0770491b81522c6c9bba7d0aef86 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_10584: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10584/index.html
  IGT_7691: 7691


Testlist changes
----------------

-igt@xe_coredump@all-simultaneously
-igt@xe_coredump@basic
-igt@xe_coredump@empty-vm

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10584/index.html

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✓ CI.xeBAT: success for series starting with [i-g-t,1/5] lib/xe/ioctl: introduce xe_bb_size() helper

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 2113 bytes --]

== Series Details ==

Series: series starting with [i-g-t,1/5] lib/xe/ioctl: introduce xe_bb_size() helper
URL   : https://patchwork.freedesktop.org/series/129140/
State : success

== Summary ==

CI Bug Log - changes from XEIGT_7691_BAT -> XEIGTPW_10584_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (4 -> 4)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in XEIGTPW_10584_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_frontbuffer_tracking@basic:
    - bat-adlp-7:         [PASS][1] -> [DMESG-WARN][2] ([Intel XE#1033])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7691/bat-adlp-7/igt@kms_frontbuffer_tracking@basic.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10584/bat-adlp-7/igt@kms_frontbuffer_tracking@basic.html

  
#### Warnings ####

  * igt@xe_exec_fault_mode@twice-basic:
    - bat-atsm-2:         [SKIP][3] ([Intel XE#288]) -> [SKIP][4] ([Intel XE#1130])
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7691/bat-atsm-2/igt@xe_exec_fault_mode@twice-basic.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10584/bat-atsm-2/igt@xe_exec_fault_mode@twice-basic.html

  
  [Intel XE#1033]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1033
  [Intel XE#1130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1130
  [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288


Build changes
-------------

  * IGT: IGT_7691 -> IGTPW_10584
  * Linux: xe-674-0496fe20d8ed5e73ed186d293ef67e7bae4658eb -> xe-675-96b582d5ddfc0770491b81522c6c9bba7d0aef86

  IGTPW_10584: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_10584/index.html
  IGT_7691: 7691
  xe-674-0496fe20d8ed5e73ed186d293ef67e7bae4658eb: 0496fe20d8ed5e73ed186d293ef67e7bae4658eb
  xe-675-96b582d5ddfc0770491b81522c6c9bba7d0aef86: 96b582d5ddfc0770491b81522c6c9bba7d0aef86

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_10584/index.html

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Re: [PATCH i-g-t 1/5] lib/xe/ioctl: introduce xe_bb_size() helper

[Zbigniew Kempczyński]

On Wed, Jan 24, 2024 at 06:07:09PM +0000, Matthew Auld wrote:
> We have a number of tests open coding this, plus some tests lacking any
> handling for the prefetch size, leading to CAT errors due to overfetch
> hitting an invalid page. End goal is to fix all the tests that are
> missing the overfetch handling first, using the new helper, and then
> convert all the places that were open coding this.
> 
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
>  lib/xe/xe_ioctl.c | 6 ++++++
>  lib/xe/xe_ioctl.h | 1 +
>  2 files changed, 7 insertions(+)
> 
> diff --git a/lib/xe/xe_ioctl.c b/lib/xe/xe_ioctl.c
> index d3f9905ee..da2a7af51 100644
> --- a/lib/xe/xe_ioctl.c
> +++ b/lib/xe/xe_ioctl.c
> @@ -51,6 +51,12 @@ uint32_t xe_cs_prefetch_size(int fd)
>  	return 4096;
>  }
>  
> +uint64_t xe_bb_size(int fd, uint64_t reqsize)
> +{
> +	return ALIGN(reqsize + xe_cs_prefetch_size(fd),
> +	             xe_get_default_alignment(fd));
> +}
> +
>  uint32_t xe_vm_create(int fd, uint32_t flags, uint64_t ext)
>  {
>  	struct drm_xe_vm_create create = {
> diff --git a/lib/xe/xe_ioctl.h b/lib/xe/xe_ioctl.h
> index 03932561d..2b30f1d98 100644
> --- a/lib/xe/xe_ioctl.h
> +++ b/lib/xe/xe_ioctl.h
> @@ -18,6 +18,7 @@
>  #define DRM_XE_UFENCE_WAIT_MASK_U64    0xffffffffffffffffu
>  
>  uint32_t xe_cs_prefetch_size(int fd);
> +uint64_t xe_bb_size(int fd, uint64_t reqsize);
>  uint32_t xe_vm_create(int fd, uint32_t flags, uint64_t ext);
>  int  __xe_vm_bind(int fd, uint32_t vm, uint32_t exec_queue, uint32_t bo,
>  		  uint64_t offset, uint64_t addr, uint64_t size, uint32_t op,
> -- 
> 2.43.0
> 

LGTM:

Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>

--
Zbigniew