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* [PATCH i-g-t] tests/kms_vrr: Reset to High refresh rate before begin drrs test
@ 2024-01-23  4:14 Vidya Srinivas
  2024-01-25  5:58 ` Vidya Srinivas
  0 siblings, 1 reply; 5+ messages in thread
From: Vidya Srinivas @ 2024-01-23  4:14 UTC (permalink / raw)
  To: igt-dev

Patch ensures a prepare state of moving panel to high RR
by waiting on FLIP event with high RR. This is more of a
prepare condition for drrs test.

Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>
---
 tests/kms_vrr.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/tests/kms_vrr.c b/tests/kms_vrr.c
index 44bc3480d..07b50cb4c 100644
--- a/tests/kms_vrr.c
+++ b/tests/kms_vrr.c
@@ -522,6 +522,10 @@ test_seamless_rr_basic(data_t *data, enum pipe pipe, igt_output_t *output, uint3
 
 	if (vrr)
 		set_vrr_on_pipe(data, pipe, false, true);
+	else {
+		igt_output_override_mode(output, &data->switch_modes[HIGH_RR_MODE]);
+		igt_assert(igt_display_try_commit_atomic(&data->display, DRM_MODE_PAGE_FLIP_EVENT, NULL) == 0);
+	}
 
 	rate = vtest_ns.max;
 	result = flip_and_measure(data, output, pipe, rate, TEST_DURATION_NS);
-- 
2.33.0


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [PATCH i-g-t] tests/kms_vrr: Reset to High refresh rate before begin drrs test
  2024-01-23  4:14 Vidya Srinivas
@ 2024-01-25  5:58 ` Vidya Srinivas
  0 siblings, 0 replies; 5+ messages in thread
From: Vidya Srinivas @ 2024-01-25  5:58 UTC (permalink / raw)
  To: igt-dev

Sink with DRRS and VRR can be in downclock mode,
so switch to High clock mode as test preparation.

Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>
---
 tests/kms_vrr.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/tests/kms_vrr.c b/tests/kms_vrr.c
index 44bc3480d..07b50cb4c 100644
--- a/tests/kms_vrr.c
+++ b/tests/kms_vrr.c
@@ -522,6 +522,10 @@ test_seamless_rr_basic(data_t *data, enum pipe pipe, igt_output_t *output, uint3
 
 	if (vrr)
 		set_vrr_on_pipe(data, pipe, false, true);
+	else {
+		igt_output_override_mode(output, &data->switch_modes[HIGH_RR_MODE]);
+		igt_assert(igt_display_try_commit_atomic(&data->display, DRM_MODE_PAGE_FLIP_EVENT, NULL) == 0);
+	}
 
 	rate = vtest_ns.max;
 	result = flip_and_measure(data, output, pipe, rate, TEST_DURATION_NS);
-- 
2.33.0


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [PATCH i-g-t] tests/kms_vrr: Reset to High refresh rate before begin drrs test
       [not found] <0240125055825.8915-1-vidya.srinivas@intel.com>
@ 2024-01-25  9:29 ` Vidya Srinivas
  2024-01-25  9:56   ` Modem, Bhanuprakash
  0 siblings, 1 reply; 5+ messages in thread
From: Vidya Srinivas @ 2024-01-25  9:29 UTC (permalink / raw)
  To: igt-dev

Sink with DRRS and VRR can be in downclock mode,
so switch to High clock mode as test preparation.

Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>
---
 tests/kms_vrr.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/tests/kms_vrr.c b/tests/kms_vrr.c
index 44bc3480d..697697b4e 100644
--- a/tests/kms_vrr.c
+++ b/tests/kms_vrr.c
@@ -522,6 +522,14 @@ test_seamless_rr_basic(data_t *data, enum pipe pipe, igt_output_t *output, uint3
 
 	if (vrr)
 		set_vrr_on_pipe(data, pipe, false, true);
+	else {
+		/*
+		 Sink with DRRS and VRR can be in downclock mode.
+		 so switch to High clock mode as test preparation
+		*/
+		igt_output_override_mode(output, &data->switch_modes[HIGH_RR_MODE]);
+		igt_assert(igt_display_try_commit_atomic(&data->display, DRM_MODE_PAGE_FLIP_EVENT, NULL) == 0);
+	}
 
 	rate = vtest_ns.max;
 	result = flip_and_measure(data, output, pipe, rate, TEST_DURATION_NS);
-- 
2.33.0


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [PATCH i-g-t] tests/kms_vrr: Reset to High refresh rate before begin drrs test
  2024-01-25  9:29 ` [PATCH i-g-t] tests/kms_vrr: Reset to High refresh rate before begin drrs test Vidya Srinivas
@ 2024-01-25  9:56   ` Modem, Bhanuprakash
  2024-01-25  9:58     ` Srinivas, Vidya
  0 siblings, 1 reply; 5+ messages in thread
From: Modem, Bhanuprakash @ 2024-01-25  9:56 UTC (permalink / raw)
  To: Vidya Srinivas, igt-dev

Hi Vidya,

On 25-01-2024 02:59 pm, Vidya Srinivas wrote:
> Sink with DRRS and VRR can be in downclock mode,
> so switch to High clock mode as test preparation.
> 
> Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>
> ---
>   tests/kms_vrr.c | 8 ++++++++
>   1 file changed, 8 insertions(+)
> 
> diff --git a/tests/kms_vrr.c b/tests/kms_vrr.c
> index 44bc3480d..697697b4e 100644
> --- a/tests/kms_vrr.c
> +++ b/tests/kms_vrr.c
> @@ -522,6 +522,14 @@ test_seamless_rr_basic(data_t *data, enum pipe pipe, igt_output_t *output, uint3
>   
>   	if (vrr)
>   		set_vrr_on_pipe(data, pipe, false, true);
> +	else {
> +		/*
> +		 Sink with DRRS and VRR can be in downclock mode.
> +		 so switch to High clock mode as test preparation

Please use proper commenting style:

Example:
/* This is single line comment. */

/*
  * This is multiline
  * comment.
  */

No need to float the new rev, please fix this while merging the patch.

Reviewed-by: Bhanuprakash Modem <bhanuprakash.modem@intel.com>

- Bhanu

> +		*/
> +		igt_output_override_mode(output, &data->switch_modes[HIGH_RR_MODE]);
> +		igt_assert(igt_display_try_commit_atomic(&data->display, DRM_MODE_PAGE_FLIP_EVENT, NULL) == 0);
> +	}
>   
>   	rate = vtest_ns.max;
>   	result = flip_and_measure(data, output, pipe, rate, TEST_DURATION_NS);

^ permalink raw reply	[flat|nested] 5+ messages in thread

* RE: [PATCH i-g-t] tests/kms_vrr: Reset to High refresh rate before begin drrs test
  2024-01-25  9:56   ` Modem, Bhanuprakash
@ 2024-01-25  9:58     ` Srinivas, Vidya
  0 siblings, 0 replies; 5+ messages in thread
From: Srinivas, Vidya @ 2024-01-25  9:58 UTC (permalink / raw)
  To: Modem, Bhanuprakash, igt-dev@lists.freedesktop.org



> -----Original Message-----
> From: Modem, Bhanuprakash <bhanuprakash.modem@intel.com>
> Sent: Thursday, January 25, 2024 3:27 PM
> To: Srinivas, Vidya <vidya.srinivas@intel.com>; igt-dev@lists.freedesktop.org
> Subject: Re: [PATCH i-g-t] tests/kms_vrr: Reset to High refresh rate before
> begin drrs test
> 
> Hi Vidya,
> 
> On 25-01-2024 02:59 pm, Vidya Srinivas wrote:
> > Sink with DRRS and VRR can be in downclock mode, so switch to High
> > clock mode as test preparation.
> >
> > Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>
> > ---
> >   tests/kms_vrr.c | 8 ++++++++
> >   1 file changed, 8 insertions(+)
> >
> > diff --git a/tests/kms_vrr.c b/tests/kms_vrr.c index
> > 44bc3480d..697697b4e 100644
> > --- a/tests/kms_vrr.c
> > +++ b/tests/kms_vrr.c
> > @@ -522,6 +522,14 @@ test_seamless_rr_basic(data_t *data, enum pipe
> > pipe, igt_output_t *output, uint3
> >
> >   	if (vrr)
> >   		set_vrr_on_pipe(data, pipe, false, true);
> > +	else {
> > +		/*
> > +		 Sink with DRRS and VRR can be in downclock mode.
> > +		 so switch to High clock mode as test preparation
> 
> Please use proper commenting style:
> 
> Example:
> /* This is single line comment. */
> 
> /*
>   * This is multiline
>   * comment.
>   */
> 
> No need to float the new rev, please fix this while merging the patch.
> 
Hello Bhanu, apologies for not noticing that. Thank you.

Regards
Vidya
> Reviewed-by: Bhanuprakash Modem <bhanuprakash.modem@intel.com>
> 
> - Bhanu
> 
> > +		*/
> > +		igt_output_override_mode(output, &data-
> >switch_modes[HIGH_RR_MODE]);
> > +		igt_assert(igt_display_try_commit_atomic(&data->display,
> DRM_MODE_PAGE_FLIP_EVENT, NULL) == 0);
> > +	}
> >
> >   	rate = vtest_ns.max;
> >   	result = flip_and_measure(data, output, pipe, rate,
> > TEST_DURATION_NS);

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2024-01-25  9:58 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
     [not found] <0240125055825.8915-1-vidya.srinivas@intel.com>
2024-01-25  9:29 ` [PATCH i-g-t] tests/kms_vrr: Reset to High refresh rate before begin drrs test Vidya Srinivas
2024-01-25  9:56   ` Modem, Bhanuprakash
2024-01-25  9:58     ` Srinivas, Vidya
2024-01-23  4:14 Vidya Srinivas
2024-01-25  5:58 ` Vidya Srinivas

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