From: sai.gowtham.ch@intel.com
To: igt-dev@lists.freedesktop.org, sai.gowtham.ch@intel.com,
rodrigo.vivi@intel.com
Subject: [PATCH i-g-t 2/3] tests/intel/xe_pm: Validate vm-bind prefetch flag with suspend and resume
Date: Tue, 26 Mar 2024 01:40:44 +0530 [thread overview]
Message-ID: <20240325201045.25805-3-sai.gowtham.ch@intel.com> (raw)
In-Reply-To: <20240325201045.25805-1-sai.gowtham.ch@intel.com>
From: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
Test functionality of vm_bind prefetch with S&R
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
---
tests/intel/xe_pm.c | 20 +++++++++++++++++---
1 file changed, 17 insertions(+), 3 deletions(-)
diff --git a/tests/intel/xe_pm.c b/tests/intel/xe_pm.c
index 8659e87cc..e016f2bca 100644
--- a/tests/intel/xe_pm.c
+++ b/tests/intel/xe_pm.c
@@ -34,6 +34,7 @@
#define MAGIC_2 0xdeadbeef
#define USERPTR (0x1 << 0)
+#define PREFETCH (0x1 << 5)
typedef struct {
int fd_xe;
@@ -289,6 +290,7 @@ static void close_fw_handle(int sig)
* arg[2]:
*
* @usrptr: usrptr
+ * @prefetch: prefetch
*/
static void
test_exec(device_t device, struct drm_xe_engine_class_instance *eci,
@@ -340,9 +342,16 @@ test_exec(device_t device, struct drm_xe_engine_class_instance *eci,
if (flags & USERPTR) {
data = aligned_alloc(xe_get_default_alignment(device.fd_xe), bo_size);
} else {
- bo = xe_bo_create(device.fd_xe, vm, bo_size,
- vram_if_possible(device.fd_xe, eci->gt_id),
- DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
+
+ if (flags & PREFETCH)
+ bo = xe_bo_create(device.fd_xe, 0, bo_size,
+ all_memory_regions(device.fd_xe) |
+ vram_if_possible(device.fd_xe, 0),
+ DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
+ else
+ bo = xe_bo_create(device.fd_xe, vm, bo_size,
+ vram_if_possible(device.fd_xe, eci->gt_id),
+ DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
data = xe_bo_map(device.fd_xe, bo, bo_size);
}
memset(data, 0, bo_size);
@@ -362,6 +371,10 @@ test_exec(device_t device, struct drm_xe_engine_class_instance *eci,
xe_vm_bind_userptr_async(device.fd_xe, vm, bind_exec_queues[0],
to_user_pointer(data), addr, bo_size, sync, 1);
+ if (flags & PREFETCH)
+ xe_vm_prefetch_async(device.fd_xe, vm, bind_exec_queues[0], 0, addr,
+ bo_size, sync, 1, 0);
+
if (check_rpm && runtime_usage_available(device.pci_xe))
igt_assert(igt_pm_get_runtime_usage(device.pci_xe) > rpm_usage);
@@ -615,6 +628,7 @@ igt_main
unsigned int flags;
} vm_op[] = {
{ "usrptr", USERPTR },
+ { "prefetch", PREFETCH },
{ NULL },
};
--
2.39.1
next prev parent reply other threads:[~2024-03-25 20:11 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-25 20:10 [PATCH i-g-t 0/3] tests/intel/xe_pm: Tests to validate vm-bind sai.gowtham.ch
2024-03-25 20:10 ` [PATCH i-g-t 1/3] tests/intel/xe_pm: Test validates vm-bind userptr flag with suspend and resume sai.gowtham.ch
2024-03-28 18:00 ` Rodrigo Vivi
2024-03-25 20:10 ` sai.gowtham.ch [this message]
2024-03-28 18:05 ` [PATCH i-g-t 2/3] tests/intel/xe_pm: Validate vm-bind prefetch " Rodrigo Vivi
2024-03-25 20:10 ` [PATCH i-g-t 3/3] tests/intel/xe_pm: Tests vm-unbind all flag functionality with s&R sai.gowtham.ch
2024-03-28 18:16 ` Rodrigo Vivi
2024-03-25 22:00 ` ✓ CI.xeBAT: success for tests/intel/xe_pm: Tests to validate vm-bind (rev2) Patchwork
2024-03-25 22:08 ` ✓ Fi.CI.BAT: " Patchwork
2024-03-26 4:39 ` ✗ Fi.CI.IGT: failure " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2024-04-01 18:46 [PATCH i-g-t 0/3] tests/intel/xe_pm: Tests to validate vm-bind with S&R sai.gowtham.ch
2024-04-01 18:46 ` [PATCH i-g-t 2/3] tests/intel/xe_pm: Validate vm-bind prefetch flag with suspend and resume sai.gowtham.ch
2024-04-03 20:27 ` Rodrigo Vivi
2024-04-15 8:40 [PATCH i-g-t 0/3] tests/intel/xe_pm: Tests to validate vm-bind with S&R sai.gowtham.ch
2024-04-15 8:40 ` [PATCH i-g-t 2/3] tests/intel/xe_pm: Validate vm-bind prefetch flag with suspend and resume sai.gowtham.ch
2024-04-16 1:29 ` Rodrigo Vivi
2024-04-16 20:58 ` Rodrigo Vivi
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