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From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: <sai.gowtham.ch@intel.com>
Cc: <igt-dev@lists.freedesktop.org>
Subject: Re: [PATCH i-g-t 2/3] tests/intel/xe_pm: Validate vm-bind prefetch flag with suspend and resume
Date: Mon, 15 Apr 2024 21:29:56 -0400	[thread overview]
Message-ID: <Zh3UlC5aunACNHKm@intel.com> (raw)
In-Reply-To: <20240415084035.2603-3-sai.gowtham.ch@intel.com>

On Mon, Apr 15, 2024 at 02:10:34PM +0530, sai.gowtham.ch@intel.com wrote:
> From: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
> 
> Test functionality of vm_bind prefetch with S&R.
> 
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
> ---
>  tests/intel/xe_pm.c | 19 ++++++++++++++++---
>  1 file changed, 16 insertions(+), 3 deletions(-)
> 
> diff --git a/tests/intel/xe_pm.c b/tests/intel/xe_pm.c
> index fafd7a52e..8857265a9 100644
> --- a/tests/intel/xe_pm.c
> +++ b/tests/intel/xe_pm.c
> @@ -34,6 +34,7 @@
>  #define MAGIC_2 0xdeadbeef
>  
>  #define USERPTR (0x1 << 0)
> +#define PREFETCH (0x1 << 2)

what happen to the bit 1?

>  
>  typedef struct {
>  	int fd_xe;
> @@ -289,6 +290,7 @@ static void close_fw_handle(int sig)
>   * arg[2]:
>   *
>   * @usrptr:	usrptr
> + * @prefetch:	prefetch
>   */
>  static void
>  test_exec(device_t device, struct drm_xe_engine_class_instance *eci,
> @@ -341,9 +343,15 @@ test_exec(device_t device, struct drm_xe_engine_class_instance *eci,
>  		data = aligned_alloc(xe_get_default_alignment(device.fd_xe), bo_size);
>  		memset(data, 0, bo_size);
>  	} else {
> -		bo = xe_bo_create(device.fd_xe, vm, bo_size,
> -				  vram_if_possible(device.fd_xe, eci->gt_id),
> -				  DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
> +		if (flags & PREFETCH)
> +			bo = xe_bo_create(device.fd_xe, 0, bo_size,
> +					  all_memory_regions(device.fd_xe) |
> +					  vram_if_possible(device.fd_xe, 0),
> +					  DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
> +		else
> +			bo = xe_bo_create(device.fd_xe, vm, bo_size,
> +					  vram_if_possible(device.fd_xe, eci->gt_id),
> +					  DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
>  		data = xe_bo_map(device.fd_xe, bo, bo_size);
>  	}
>  
> @@ -362,6 +370,10 @@ test_exec(device_t device, struct drm_xe_engine_class_instance *eci,
>  		xe_vm_bind_userptr_async(device.fd_xe, vm, bind_exec_queues[0],
>  					 to_user_pointer(data), addr, bo_size, sync, 1);
>  
> +	if (flags & PREFETCH)
> +		xe_vm_prefetch_async(device.fd_xe, vm, bind_exec_queues[0], 0, addr,
> +				     bo_size, sync, 1, 0);

anything else missing here?
apparently the patch still failed badly and I lost my machine now...
will check again tomorrow with some debugs.

> +
>  	if (check_rpm && runtime_usage_available(device.pci_xe))
>  		igt_assert(igt_pm_get_runtime_usage(device.pci_xe) > rpm_usage);
>  
> @@ -617,6 +629,7 @@ igt_main
>  		unsigned int flags;
>  	} vm_op[] = {
>  		{ "usrptr", USERPTR },
> +		{ "prefetch", PREFETCH },
>  		{ NULL },
>  	};
>  
> -- 
> 2.39.1
> 

  reply	other threads:[~2024-04-16  1:30 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-15  8:40 [PATCH i-g-t 0/3] tests/intel/xe_pm: Tests to validate vm-bind with S&R sai.gowtham.ch
2024-04-15  8:40 ` [PATCH i-g-t 1/3] tests/intel/xe_pm: Test validates vm-bind userptr flag with suspend and resume sai.gowtham.ch
2024-04-16  1:22   ` Rodrigo Vivi
2024-04-15  8:40 ` [PATCH i-g-t 2/3] tests/intel/xe_pm: Validate vm-bind prefetch " sai.gowtham.ch
2024-04-16  1:29   ` Rodrigo Vivi [this message]
2024-04-16 20:58     ` Rodrigo Vivi
2024-04-15  8:40 ` [PATCH i-g-t 3/3] tests/intel/xe_pm: Tests vm-unbind all flag functionality with S&R sai.gowtham.ch
2024-04-16 20:58   ` Rodrigo Vivi
2024-04-16  6:37 ` ✓ CI.xeBAT: success for tests/intel/xe_pm: Tests to validate vm-bind with S&R (rev2) Patchwork
2024-04-16  6:46 ` ✗ Fi.CI.BAT: failure " Patchwork
2024-04-19 14:20   ` Kamil Konieczny
2024-04-17  1:24 ` ✗ CI.xeFULL: " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2024-04-01 18:46 [PATCH i-g-t 0/3] tests/intel/xe_pm: Tests to validate vm-bind with S&R sai.gowtham.ch
2024-04-01 18:46 ` [PATCH i-g-t 2/3] tests/intel/xe_pm: Validate vm-bind prefetch flag with suspend and resume sai.gowtham.ch
2024-04-03 20:27   ` Rodrigo Vivi
2024-03-25 20:10 [PATCH i-g-t 0/3] tests/intel/xe_pm: Tests to validate vm-bind sai.gowtham.ch
2024-03-25 20:10 ` [PATCH i-g-t 2/3] tests/intel/xe_pm: Validate vm-bind prefetch flag with suspend and resume sai.gowtham.ch
2024-03-28 18:05   ` Rodrigo Vivi

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