[PATCH i-g-t 2/4] lib/i915/fbc: add fbc frame size check helper

[Vinod Govindapillai <vinod.govindapillai@intel.com>]

Add a helper function to check maximum plane size fbc can be
supported in a display version.

Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
---
 lib/i915/intel_fbc.c | 36 ++++++++++++++++++++++++++++++++++++
 lib/i915/intel_fbc.h |  1 +
 2 files changed, 37 insertions(+)

diff --git a/lib/i915/intel_fbc.c b/lib/i915/intel_fbc.c
index 07ed7f469..992e9c4de 100644
--- a/lib/i915/intel_fbc.c
+++ b/lib/i915/intel_fbc.c
@@ -99,3 +99,39 @@ bool intel_fbc_wait_until_enabled(int device, enum pipe pipe)
 
 	return enabled;
 }
+
+/**
+ * intel_fbc_plane_size_supported
+ *
+ * @fd: fd of the device
+ * @width: width of the plane
+ * @height: height of the plane
+ *
+ * Checks if the plane size supported for FBC
+ *
+ * Returns:
+ * true if plane size is within the range as per the FBC supported size restrictions per platform
+ */
+bool intel_fbc_plane_size_supported(int fd, uint32_t width, uint32_t height)
+{
+	const uint32_t dev_id = intel_get_drm_devid(fd);
+	const struct intel_device_info *info = intel_get_device_info(dev_id);
+	int ver = info->graphics_ver;
+	unsigned int max_w, max_h;
+
+	if (ver >= 10) {
+		max_w = 5120;
+		max_h = 4096;
+	} else if (ver >= 8 || IS_HASWELL(fd)) {
+		max_w = 4096;
+		max_h = 4096;
+	} else if (IS_G4X(fd) || ver >= 5) {
+		max_w = 4096;
+		max_h = 2048;
+	} else {
+		max_w = 2048;
+		max_h = 1536;
+	}
+
+	return width <= max_w && height <= max_h;
+}
diff --git a/lib/i915/intel_fbc.h b/lib/i915/intel_fbc.h
index 995dc7f1e..f05b351f6 100644
--- a/lib/i915/intel_fbc.h
+++ b/lib/i915/intel_fbc.h
@@ -14,5 +14,6 @@
 bool intel_fbc_supported_on_chipset(int device, enum pipe pipe);
 bool intel_fbc_wait_until_enabled(int device, enum pipe pipe);
 bool intel_fbc_is_enabled(int device, enum pipe pipe, int log_level);
+bool intel_fbc_plane_size_supported(int device, uint32_t width, uint32_t height);
 
 #endif
-- 
2.34.1