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From: Jan Sokolowski <jan.sokolowski@intel.com>
To: igt-dev@lists.freedesktop.org
Cc: Jan Sokolowski <jan.sokolowski@intel.com>,
	Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Subject: [PATCH i-g-t v1] tests/xe_eudebug: use proper address when waiting for fence
Date: Tue, 24 Sep 2024 08:49:37 +0000	[thread overview]
Message-ID: <20240924084937.95759-1-jan.sokolowski@intel.com> (raw)

An incorrect address was used as an argument passed to xe_wait_ufence,
which caused pagefaults as they referenced unmapped addresses.

Use proper address in xe_wait_ufence.

Signed-off-by: Jan Sokolowski <jan.sokolowski@intel.com>
Co-developed-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
---
 tests/intel/xe_eudebug.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/tests/intel/xe_eudebug.c b/tests/intel/xe_eudebug.c
index 40e07ddf6..e28c9ab67 100644
--- a/tests/intel/xe_eudebug.c
+++ b/tests/intel/xe_eudebug.c
@@ -2121,7 +2121,6 @@ static void *vm_bind_clear_thread(void *data)
 	fence_data = aligned_alloc(xe_get_default_alignment(fd), sizeof(*fence_data));
 	igt_assert(fence_data);
 	uf_sync.timeline_value = 1337;
-	uf_sync.addr = to_user_pointer(fence_data);
 
 	igt_debug("Run on: %s%u\n", xe_engine_class_string(priv->hwe->engine_class),
 		  priv->hwe->engine_instance);
@@ -2157,6 +2156,7 @@ static void *vm_bind_clear_thread(void *data)
 
 		delta = (random() % bo_size) & -4;
 
+		uf_sync.addr = to_user_pointer(fence_data);
 		/* prepare clean bo */
 		clean_bo = xe_bo_create(fd, vm, bo_size, priv->region,
 					DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
@@ -2197,9 +2197,9 @@ static void *vm_bind_clear_thread(void *data)
 		eq_create.extensions = to_user_pointer(&eq_ext);
 		exec_queue = xe_eudebug_client_exec_queue_create(priv->c, fd, &eq_create);
 
-		memset(fence_data, 0, sizeof(*fence_data));
+		uf_sync.addr = (cs - map) * 4 + batch_offset;
 		xe_exec_sync(fd, exec_queue, batch_offset, &uf_sync, 1);
-		xe_wait_ufence(fd, fence_data, uf_sync.timeline_value, 0,
+		xe_wait_ufence(fd, (uint64_t *)cs, uf_sync.timeline_value, exec_queue,
 			       XE_EUDEBUG_DEFAULT_TIMEOUT_SEC * NSEC_PER_SEC);
 
 		igt_assert_eq(*map, 0);
-- 
2.34.1


             reply	other threads:[~2024-09-24  8:49 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-09-24  8:49 Jan Sokolowski [this message]
2024-09-24 14:31 ` [PATCH i-g-t v1] tests/xe_eudebug: use proper address when waiting for fence Manszewski, Christoph
2024-09-26  1:57 ` ✓ Fi.CI.BAT: success for " Patchwork
2024-09-26  1:59 ` ✓ CI.xeBAT: " Patchwork
2024-09-26  8:58 ` ✗ CI.xeFULL: failure " Patchwork
2024-09-26  9:45 ` ✗ Fi.CI.IGT: " Patchwork

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