[i-g-t, v5, 0/2] tests/xe: Add tests to validate GT coarse power gating status and toggle coarse power gating states

[i-g-t, v5, 0/2] tests/xe: Add tests to validate GT coarse power gating status and toggle coarse power gating states

[sk.anirban]

From: Sk Anirban <sk.anirban@intel.com>

Implement test cpg-basic to validate coarse power gating status
after S3 cycle.
Add test cpg-gt-toggle to check if GT coarse power gating is up when
forcewake is acquired and down when released.

v2: Address cosmetic review comments (Riana)
    Fix suspend state (Riana)
    Add exit handler for test cpg-gt-toggle (Riana)

v3: Address cosmetic review comments (Riana)
    Fix commit message & test name (Konieczny)

v4: Address cosmetic review comments (Riana)

v5: Remove unnecessary openings and assertions of gt directories (Riana)

Sk Anirban (2):
  tests/intel/xe_pm_residency: Add GT coarse power gating validation
  HAX: Add Coarse power gating tests to fast feedback list

 tests/intel-ci/xe-fast-feedback.testlist |  2 +
 tests/intel/xe_pm_residency.c            | 80 ++++++++++++++++++++++++
 2 files changed, 82 insertions(+)

-- 
2.34.1

[i-g-t, v5, 1/2] tests/intel/xe_pm_residency: Add GT coarse power gating validation

[sk.anirban]

From: Sk Anirban <sk.anirban@intel.com>

Implement test cpg-basic to validate coarse power gating status
after S3 cycle.
Add test cpg-gt-toggle to check if GT coarse power gating is up when
forcewake is acquired and down when released.

v2: Address cosmetic review comments (Riana)
    Fix suspend state (Riana)
    Add exit handler for test cpg-gt-toggle (Riana)

v3: Address cosmetic review comments (Riana)
    Fix commit message & test name (Konieczny)

v4: Address cosmetic review comments (Riana)

v5: Remove unnecessary openings and assertions of gt directories (Riana)

Signed-off-by: Sk Anirban <sk.anirban@intel.com>
---
 tests/intel/xe_pm_residency.c | 80 +++++++++++++++++++++++++++++++++++
 1 file changed, 80 insertions(+)

diff --git a/tests/intel/xe_pm_residency.c b/tests/intel/xe_pm_residency.c
index 772fe9b57..d4b26b231 100644
--- a/tests/intel/xe_pm_residency.c
+++ b/tests/intel/xe_pm_residency.c
@@ -63,6 +63,12 @@ enum test_type {
  * SUBTEST: toggle-gt-c6
  * Description: toggles GT C states by acquiring/releasing forcewake,
  *		also validates power consumed by GPU in GT C6 is lesser than that of GT C0.
+ *
+ * SUBTEST: cpg-basic
+ * Description: Validate GT coarse power gating status with S3 cycle.
+ *
+ * SUBTEST: cpg-gt-toggle
+ * Description: Toggle GT coarse power gating states by acquiring/releasing forcewake.
  */
 IGT_TEST_DESCRIPTION("Tests for gtidle properties");
 
@@ -317,6 +323,69 @@ static void toggle_gt_c6(int fd, int n)
 			     "Power consumed in GT C6 should be lower than GT C0\n");
 }
 
+static void cpg_enabled(int fd, int gt)
+{
+	const char *render_power_gating = "Render Power Gating Enabled: ";
+	const char *media_power_gating = "Media Power Gating Enabled: ";
+	char str[512], path[PATH_MAX], *render_substr, *media_substr;
+
+	snprintf(path, sizeof(path), "gt%d/powergate_info", gt);
+	igt_debugfs_read(fd, path, str);
+
+	render_substr = strstr(str, render_power_gating);
+	if (render_substr)
+		igt_assert_f(strncmp(render_substr + strlen(render_power_gating), "yes", 3) == 0,
+			     "Render Power Gating should be enabled");
+
+	media_substr = strstr(str, media_power_gating);
+	if (media_substr)
+		igt_assert_f(strncmp(media_substr + strlen(media_power_gating), "yes", 3) == 0,
+			     "Media Power Gating should be enabled");
+}
+
+static void powergate_status(int fd, int gt, const char *expected_status)
+{
+	const char *power_gate_status = "Power Gate Status: ";
+	char str[512], path[PATH_MAX], *status_substr;
+
+	snprintf(path, sizeof(path), "gt%d/powergate_info", gt);
+	igt_debugfs_read(fd, path, str);
+
+	status_substr = strstr(str, power_gate_status);
+	while (status_substr) {
+		igt_assert_f((strncmp(status_substr + strlen(power_gate_status), expected_status,
+				      strlen(expected_status)) == 0),
+			      "Power Gate Status Should be %s\n %s\n", expected_status, str);
+		status_substr = strstr(status_substr + strlen(power_gate_status),
+				       power_gate_status);
+	}
+}
+
+static void cpg_basic(int fd, int gt)
+{
+	cpg_enabled(fd, gt);
+	igt_system_suspend_autoresume(SUSPEND_STATE_S3, SUSPEND_TEST_NONE);
+	cpg_enabled(fd, gt);
+}
+
+static void cpg_gt_toggle(int fd)
+{
+	int gt;
+
+	fw_handle = igt_debugfs_open(fd, "forcewake_all", O_RDONLY);
+	igt_assert_lte(0, fw_handle);
+
+	xe_for_each_gt(fd, gt) {
+		cpg_enabled(fd, gt);
+		powergate_status(fd, gt, "up");
+	}
+
+	close(fw_handle);
+	sleep(1);
+	xe_for_each_gt(fd, gt)
+		powergate_status(fd, gt, "down");
+}
+
 igt_main
 {
 	uint32_t d3cold_allowed;
@@ -380,6 +449,17 @@ igt_main
 		toggle_gt_c6(fd, NUM_REPS);
 	}
 
+	igt_describe("Validate Coarse power gating status with S3 cycle");
+	igt_subtest("cpg-basic")
+		xe_for_each_gt(fd, gt)
+			cpg_basic(fd, gt);
+
+	igt_describe("Toggle GT coarse power gating states by managing forcewake");
+	igt_subtest("cpg-gt-toggle") {
+		igt_install_exit_handler(close_fw_handle);
+		cpg_gt_toggle(fd);
+	}
+
 	igt_fixture {
 		close(fd);
 	}
-- 
2.34.1

[i-g-t, v5, 0/2] tests/xe: Add tests to validate GT coarse power gating status and toggle coarse power gating states

[sk.anirban]

From: Sk Anirban <sk.anirban@intel.com>

Implement test cpg-basic to validate coarse power gating status
after S3 cycle.
Add test cpg-gt-toggle to check if GT coarse power gating is up when
forcewake is acquired and down when released.

v2: Address cosmetic review comments (Riana)
    Fix suspend state (Riana)
    Add exit handler for test cpg-gt-toggle (Riana)

v3: Address cosmetic review comments (Riana)
    Fix commit message & test name (Konieczny)

v4: Address cosmetic review comments (Riana)

v5: Remove unnecessary openings and assertions of gt directories (Riana)

Sk Anirban (2):
  tests/intel/xe_pm_residency: Add GT coarse power gating validation
  HAX: Add Coarse power gating tests to fast feedback list

 tests/intel-ci/xe-fast-feedback.testlist |  2 +
 tests/intel/xe_pm_residency.c            | 80 ++++++++++++++++++++++++
 2 files changed, 82 insertions(+)

-- 
2.34.1

[i-g-t, v5, 1/2] tests/intel/xe_pm_residency: Add GT coarse power gating validation

[sk.anirban]

From: Sk Anirban <sk.anirban@intel.com>

Implement test cpg-basic to validate coarse power gating status
after S3 cycle.
Add test cpg-gt-toggle to check if GT coarse power gating is up when
forcewake is acquired and down when released.

v2: Address cosmetic review comments (Riana)
    Fix suspend state (Riana)
    Add exit handler for test cpg-gt-toggle (Riana)

v3: Address cosmetic review comments (Riana)
    Fix commit message & test name (Konieczny)

v4: Address cosmetic review comments (Riana)

v5: Remove unnecessary openings and assertions of gt directories (Riana)

Signed-off-by: Sk Anirban <sk.anirban@intel.com>
---
 tests/intel/xe_pm_residency.c | 80 +++++++++++++++++++++++++++++++++++
 1 file changed, 80 insertions(+)

diff --git a/tests/intel/xe_pm_residency.c b/tests/intel/xe_pm_residency.c
index 772fe9b57..d4b26b231 100644
--- a/tests/intel/xe_pm_residency.c
+++ b/tests/intel/xe_pm_residency.c
@@ -63,6 +63,12 @@ enum test_type {
  * SUBTEST: toggle-gt-c6
  * Description: toggles GT C states by acquiring/releasing forcewake,
  *		also validates power consumed by GPU in GT C6 is lesser than that of GT C0.
+ *
+ * SUBTEST: cpg-basic
+ * Description: Validate GT coarse power gating status with S3 cycle.
+ *
+ * SUBTEST: cpg-gt-toggle
+ * Description: Toggle GT coarse power gating states by acquiring/releasing forcewake.
  */
 IGT_TEST_DESCRIPTION("Tests for gtidle properties");
 
@@ -317,6 +323,69 @@ static void toggle_gt_c6(int fd, int n)
 			     "Power consumed in GT C6 should be lower than GT C0\n");
 }
 
+static void cpg_enabled(int fd, int gt)
+{
+	const char *render_power_gating = "Render Power Gating Enabled: ";
+	const char *media_power_gating = "Media Power Gating Enabled: ";
+	char str[512], path[PATH_MAX], *render_substr, *media_substr;
+
+	snprintf(path, sizeof(path), "gt%d/powergate_info", gt);
+	igt_debugfs_read(fd, path, str);
+
+	render_substr = strstr(str, render_power_gating);
+	if (render_substr)
+		igt_assert_f(strncmp(render_substr + strlen(render_power_gating), "yes", 3) == 0,
+			     "Render Power Gating should be enabled");
+
+	media_substr = strstr(str, media_power_gating);
+	if (media_substr)
+		igt_assert_f(strncmp(media_substr + strlen(media_power_gating), "yes", 3) == 0,
+			     "Media Power Gating should be enabled");
+}
+
+static void powergate_status(int fd, int gt, const char *expected_status)
+{
+	const char *power_gate_status = "Power Gate Status: ";
+	char str[512], path[PATH_MAX], *status_substr;
+
+	snprintf(path, sizeof(path), "gt%d/powergate_info", gt);
+	igt_debugfs_read(fd, path, str);
+
+	status_substr = strstr(str, power_gate_status);
+	while (status_substr) {
+		igt_assert_f((strncmp(status_substr + strlen(power_gate_status), expected_status,
+				      strlen(expected_status)) == 0),
+			      "Power Gate Status Should be %s\n %s\n", expected_status, str);
+		status_substr = strstr(status_substr + strlen(power_gate_status),
+				       power_gate_status);
+	}
+}
+
+static void cpg_basic(int fd, int gt)
+{
+	cpg_enabled(fd, gt);
+	igt_system_suspend_autoresume(SUSPEND_STATE_S3, SUSPEND_TEST_NONE);
+	cpg_enabled(fd, gt);
+}
+
+static void cpg_gt_toggle(int fd)
+{
+	int gt;
+
+	fw_handle = igt_debugfs_open(fd, "forcewake_all", O_RDONLY);
+	igt_assert_lte(0, fw_handle);
+
+	xe_for_each_gt(fd, gt) {
+		cpg_enabled(fd, gt);
+		powergate_status(fd, gt, "up");
+	}
+
+	close(fw_handle);
+	sleep(1);
+	xe_for_each_gt(fd, gt)
+		powergate_status(fd, gt, "down");
+}
+
 igt_main
 {
 	uint32_t d3cold_allowed;
@@ -380,6 +449,17 @@ igt_main
 		toggle_gt_c6(fd, NUM_REPS);
 	}
 
+	igt_describe("Validate Coarse power gating status with S3 cycle");
+	igt_subtest("cpg-basic")
+		xe_for_each_gt(fd, gt)
+			cpg_basic(fd, gt);
+
+	igt_describe("Toggle GT coarse power gating states by managing forcewake");
+	igt_subtest("cpg-gt-toggle") {
+		igt_install_exit_handler(close_fw_handle);
+		cpg_gt_toggle(fd);
+	}
+
 	igt_fixture {
 		close(fd);
 	}
-- 
2.34.1

RE: [i-g-t,v5,1/2] tests/intel/xe_pm_residency: Add GT coarse power gating validation

[Gupta, Anshuman]

> -----Original Message-----
> From: Anirban, Sk <sk.anirban@intel.com>
> Sent: Wednesday, October 23, 2024 4:16 PM
> To: igt-dev@lists.freedesktop.org
> Cc: GSSE Core KMD Power Telemetry India
> <gsse.core.kmd.power.telemetry.india@intel.com>; Anirban, Sk
> <sk.anirban@intel.com>
> Subject: [i-g-t,v5,1/2] tests/intel/xe_pm_residency: Add GT coarse power gating
> validation
> 
> From: Sk Anirban <sk.anirban@intel.com>
> 
> Implement test cpg-basic to validate coarse power gating status after S3 cycle.
 why only S3 cycle , why don't we have s2idle cycle test ?
Thanks,
Anshuman
> Add test cpg-gt-toggle to check if GT coarse power gating is up when forcewake is
> acquired and down when released.
> 
> v2: Address cosmetic review comments (Riana)
>     Fix suspend state (Riana)
>     Add exit handler for test cpg-gt-toggle (Riana)
> 
> v3: Address cosmetic review comments (Riana)
>     Fix commit message & test name (Konieczny)
> 
> v4: Address cosmetic review comments (Riana)
> 
> v5: Remove unnecessary openings and assertions of gt directories (Riana)
> 
> Signed-off-by: Sk Anirban <sk.anirban@intel.com>
> ---
>  tests/intel/xe_pm_residency.c | 80 +++++++++++++++++++++++++++++++++++
>  1 file changed, 80 insertions(+)
> 
> diff --git a/tests/intel/xe_pm_residency.c b/tests/intel/xe_pm_residency.c index
> 772fe9b57..d4b26b231 100644
> --- a/tests/intel/xe_pm_residency.c
> +++ b/tests/intel/xe_pm_residency.c
> @@ -63,6 +63,12 @@ enum test_type {
>   * SUBTEST: toggle-gt-c6
>   * Description: toggles GT C states by acquiring/releasing forcewake,
>   *		also validates power consumed by GPU in GT C6 is lesser than
> that of GT C0.
> + *
> + * SUBTEST: cpg-basic
> + * Description: Validate GT coarse power gating status with S3 cycle.
> + *
> + * SUBTEST: cpg-gt-toggle
> + * Description: Toggle GT coarse power gating states by acquiring/releasing
> forcewake.
>   */
>  IGT_TEST_DESCRIPTION("Tests for gtidle properties");
> 
> @@ -317,6 +323,69 @@ static void toggle_gt_c6(int fd, int n)
>  			     "Power consumed in GT C6 should be lower than GT
> C0\n");  }
> 
> +static void cpg_enabled(int fd, int gt) {
> +	const char *render_power_gating = "Render Power Gating Enabled: ";
> +	const char *media_power_gating = "Media Power Gating Enabled: ";
> +	char str[512], path[PATH_MAX], *render_substr, *media_substr;
> +
> +	snprintf(path, sizeof(path), "gt%d/powergate_info", gt);
> +	igt_debugfs_read(fd, path, str);
> +
> +	render_substr = strstr(str, render_power_gating);
> +	if (render_substr)
> +		igt_assert_f(strncmp(render_substr +
> strlen(render_power_gating), "yes", 3) == 0,
> +			     "Render Power Gating should be enabled");
> +
> +	media_substr = strstr(str, media_power_gating);
> +	if (media_substr)
> +		igt_assert_f(strncmp(media_substr +
> strlen(media_power_gating), "yes", 3) == 0,
> +			     "Media Power Gating should be enabled"); }
> +
> +static void powergate_status(int fd, int gt, const char
> +*expected_status) {
> +	const char *power_gate_status = "Power Gate Status: ";
> +	char str[512], path[PATH_MAX], *status_substr;
> +
> +	snprintf(path, sizeof(path), "gt%d/powergate_info", gt);
> +	igt_debugfs_read(fd, path, str);
> +
> +	status_substr = strstr(str, power_gate_status);
> +	while (status_substr) {
> +		igt_assert_f((strncmp(status_substr + strlen(power_gate_status),
> expected_status,
> +				      strlen(expected_status)) == 0),
> +			      "Power Gate Status Should be %s\n %s\n",
> expected_status, str);
> +		status_substr = strstr(status_substr + strlen(power_gate_status),
> +				       power_gate_status);
> +	}
> +}
> +
> +static void cpg_basic(int fd, int gt)
> +{
> +	cpg_enabled(fd, gt);
> +	igt_system_suspend_autoresume(SUSPEND_STATE_S3,
> SUSPEND_TEST_NONE);
> +	cpg_enabled(fd, gt);
> +}
> +
> +static void cpg_gt_toggle(int fd)
> +{
> +	int gt;
> +
> +	fw_handle = igt_debugfs_open(fd, "forcewake_all", O_RDONLY);
> +	igt_assert_lte(0, fw_handle);
> +
> +	xe_for_each_gt(fd, gt) {
> +		cpg_enabled(fd, gt);
> +		powergate_status(fd, gt, "up");
> +	}
> +
> +	close(fw_handle);
> +	sleep(1);
> +	xe_for_each_gt(fd, gt)
> +		powergate_status(fd, gt, "down");
> +}
> +
>  igt_main
>  {
>  	uint32_t d3cold_allowed;
> @@ -380,6 +449,17 @@ igt_main
>  		toggle_gt_c6(fd, NUM_REPS);
>  	}
> 
> +	igt_describe("Validate Coarse power gating status with S3 cycle");
> +	igt_subtest("cpg-basic")
> +		xe_for_each_gt(fd, gt)
> +			cpg_basic(fd, gt);
> +
> +	igt_describe("Toggle GT coarse power gating states by managing
> forcewake");
> +	igt_subtest("cpg-gt-toggle") {
> +		igt_install_exit_handler(close_fw_handle);
> +		cpg_gt_toggle(fd);
> +	}
> +
>  	igt_fixture {
>  		close(fd);
>  	}
> --
> 2.34.1

Re: [i-g-t,v5,1/2] tests/intel/xe_pm_residency: Add GT coarse power gating validation

[Riana Tauro]

Hi Anshuman

On 10/23/2024 4:32 PM, Gupta, Anshuman wrote:
> 
> 
>> -----Original Message-----
>> From: Anirban, Sk <sk.anirban@intel.com>
>> Sent: Wednesday, October 23, 2024 4:16 PM
>> To: igt-dev@lists.freedesktop.org
>> Cc: GSSE Core KMD Power Telemetry India
>> <gsse.core.kmd.power.telemetry.india@intel.com>; Anirban, Sk
>> <sk.anirban@intel.com>
>> Subject: [i-g-t,v5,1/2] tests/intel/xe_pm_residency: Add GT coarse power gating
>> validation
>>
>> From: Sk Anirban <sk.anirban@intel.com>
>>
>> Implement test cpg-basic to validate coarse power gating status after S3 cycle.
>   why only S3 cycle , why don't we have s2idle cycle test ?
> Thanks,
> Anshuman

S3 and D3cold caused the registers to be reset when suspended. 
Restoration was added on resume.

That is the reason S3 was preferred over s2idle.

Thanks
Riana Tauro
>> Add test cpg-gt-toggle to check if GT coarse power gating is up when forcewake is
>> acquired and down when released.
>>
>> v2: Address cosmetic review comments (Riana)
>>      Fix suspend state (Riana)
>>      Add exit handler for test cpg-gt-toggle (Riana)
>>
>> v3: Address cosmetic review comments (Riana)
>>      Fix commit message & test name (Konieczny)
>>
>> v4: Address cosmetic review comments (Riana)
>>
>> v5: Remove unnecessary openings and assertions of gt directories (Riana)
>>
>> Signed-off-by: Sk Anirban <sk.anirban@intel.com>
>> ---
>>   tests/intel/xe_pm_residency.c | 80 +++++++++++++++++++++++++++++++++++
>>   1 file changed, 80 insertions(+)
>>
>> diff --git a/tests/intel/xe_pm_residency.c b/tests/intel/xe_pm_residency.c index
>> 772fe9b57..d4b26b231 100644
>> --- a/tests/intel/xe_pm_residency.c
>> +++ b/tests/intel/xe_pm_residency.c
>> @@ -63,6 +63,12 @@ enum test_type {
>>    * SUBTEST: toggle-gt-c6
>>    * Description: toggles GT C states by acquiring/releasing forcewake,
>>    *		also validates power consumed by GPU in GT C6 is lesser than
>> that of GT C0.
>> + *
>> + * SUBTEST: cpg-basic
>> + * Description: Validate GT coarse power gating status with S3 cycle.
>> + *
>> + * SUBTEST: cpg-gt-toggle
>> + * Description: Toggle GT coarse power gating states by acquiring/releasing
>> forcewake.
>>    */
>>   IGT_TEST_DESCRIPTION("Tests for gtidle properties");
>>
>> @@ -317,6 +323,69 @@ static void toggle_gt_c6(int fd, int n)
>>   			     "Power consumed in GT C6 should be lower than GT
>> C0\n");  }
>>
>> +static void cpg_enabled(int fd, int gt) {
>> +	const char *render_power_gating = "Render Power Gating Enabled: ";
>> +	const char *media_power_gating = "Media Power Gating Enabled: ";
>> +	char str[512], path[PATH_MAX], *render_substr, *media_substr;
>> +
>> +	snprintf(path, sizeof(path), "gt%d/powergate_info", gt);
>> +	igt_debugfs_read(fd, path, str);
>> +
>> +	render_substr = strstr(str, render_power_gating);
>> +	if (render_substr)
>> +		igt_assert_f(strncmp(render_substr +
>> strlen(render_power_gating), "yes", 3) == 0,
>> +			     "Render Power Gating should be enabled");
>> +
>> +	media_substr = strstr(str, media_power_gating);
>> +	if (media_substr)
>> +		igt_assert_f(strncmp(media_substr +
>> strlen(media_power_gating), "yes", 3) == 0,
>> +			     "Media Power Gating should be enabled"); }
>> +
>> +static void powergate_status(int fd, int gt, const char
>> +*expected_status) {
>> +	const char *power_gate_status = "Power Gate Status: ";
>> +	char str[512], path[PATH_MAX], *status_substr;
>> +
>> +	snprintf(path, sizeof(path), "gt%d/powergate_info", gt);
>> +	igt_debugfs_read(fd, path, str);
>> +
>> +	status_substr = strstr(str, power_gate_status);
>> +	while (status_substr) {
>> +		igt_assert_f((strncmp(status_substr + strlen(power_gate_status),
>> expected_status,
>> +				      strlen(expected_status)) == 0),
>> +			      "Power Gate Status Should be %s\n %s\n",
>> expected_status, str);
>> +		status_substr = strstr(status_substr + strlen(power_gate_status),
>> +				       power_gate_status);
>> +	}
>> +}
>> +
>> +static void cpg_basic(int fd, int gt)
>> +{
>> +	cpg_enabled(fd, gt);
>> +	igt_system_suspend_autoresume(SUSPEND_STATE_S3,
>> SUSPEND_TEST_NONE);
>> +	cpg_enabled(fd, gt);
>> +}
>> +
>> +static void cpg_gt_toggle(int fd)
>> +{
>> +	int gt;
>> +
>> +	fw_handle = igt_debugfs_open(fd, "forcewake_all", O_RDONLY);
>> +	igt_assert_lte(0, fw_handle);
>> +
>> +	xe_for_each_gt(fd, gt) {
>> +		cpg_enabled(fd, gt);
>> +		powergate_status(fd, gt, "up");
>> +	}
>> +
>> +	close(fw_handle);
>> +	sleep(1);
>> +	xe_for_each_gt(fd, gt)
>> +		powergate_status(fd, gt, "down");
>> +}
>> +
>>   igt_main
>>   {
>>   	uint32_t d3cold_allowed;
>> @@ -380,6 +449,17 @@ igt_main
>>   		toggle_gt_c6(fd, NUM_REPS);
>>   	}
>>
>> +	igt_describe("Validate Coarse power gating status with S3 cycle");
>> +	igt_subtest("cpg-basic")
>> +		xe_for_each_gt(fd, gt)
>> +			cpg_basic(fd, gt);
>> +
>> +	igt_describe("Toggle GT coarse power gating states by managing
>> forcewake");
>> +	igt_subtest("cpg-gt-toggle") {
>> +		igt_install_exit_handler(close_fw_handle);
>> +		cpg_gt_toggle(fd);
>> +	}
>> +
>>   	igt_fixture {
>>   		close(fd);
>>   	}
>> --
>> 2.34.1
> 

Re: [i-g-t,v5,1/2] tests/intel/xe_pm_residency: Add GT coarse power gating validation

[Riana Tauro]

On 10/23/2024 5:01 PM, Riana Tauro wrote:
> Hi Anshuman
> 
> On 10/23/2024 4:32 PM, Gupta, Anshuman wrote:
>>
>>
>>> -----Original Message-----
>>> From: Anirban, Sk <sk.anirban@intel.com>
>>> Sent: Wednesday, October 23, 2024 4:16 PM
>>> To: igt-dev@lists.freedesktop.org
>>> Cc: GSSE Core KMD Power Telemetry India
>>> <gsse.core.kmd.power.telemetry.india@intel.com>; Anirban, Sk
>>> <sk.anirban@intel.com>
>>> Subject: [i-g-t,v5,1/2] tests/intel/xe_pm_residency: Add GT coarse 
>>> power gating
>>> validation
>>>
>>> From: Sk Anirban <sk.anirban@intel.com>
>>>
>>> Implement test cpg-basic to validate coarse power gating status after 
>>> S3 cycle.
>>   why only S3 cycle , why don't we have s2idle cycle test ?
>> Thanks,
>> Anshuman
> 
> S3 and D3cold caused the registers to be reset when suspended. 
> Restoration was added on resume.
> 
> That is the reason S3 was preferred over s2idle.
> 
> Thanks
> Riana Tauro
>>> Add test cpg-gt-toggle to check if GT coarse power gating is up when 
>>> forcewake is
>>> acquired and down when released.
>>>
>>> v2: Address cosmetic review comments (Riana)
>>>      Fix suspend state (Riana)
>>>      Add exit handler for test cpg-gt-toggle (Riana)
>>>
>>> v3: Address cosmetic review comments (Riana)
>>>      Fix commit message & test name (Konieczny)
>>>
>>> v4: Address cosmetic review comments (Riana)
>>>
>>> v5: Remove unnecessary openings and assertions of gt directories (Riana)
>>>
>>> Signed-off-by: Sk Anirban <sk.anirban@intel.com>
Looks good to me
Reviewed-by: Riana Tauro <riana.tauro@intel.com>
>>> ---
>>>   tests/intel/xe_pm_residency.c | 80 +++++++++++++++++++++++++++++++++++
>>>   1 file changed, 80 insertions(+)
>>>
>>> diff --git a/tests/intel/xe_pm_residency.c b/tests/intel/ 
>>> xe_pm_residency.c index
>>> 772fe9b57..d4b26b231 100644
>>> --- a/tests/intel/xe_pm_residency.c
>>> +++ b/tests/intel/xe_pm_residency.c
>>> @@ -63,6 +63,12 @@ enum test_type {
>>>    * SUBTEST: toggle-gt-c6
>>>    * Description: toggles GT C states by acquiring/releasing forcewake,
>>>    *        also validates power consumed by GPU in GT C6 is lesser than
>>> that of GT C0.
>>> + *
>>> + * SUBTEST: cpg-basic
>>> + * Description: Validate GT coarse power gating status with S3 cycle.
>>> + *
>>> + * SUBTEST: cpg-gt-toggle
>>> + * Description: Toggle GT coarse power gating states by acquiring/ 
>>> releasing
>>> forcewake.
>>>    */
>>>   IGT_TEST_DESCRIPTION("Tests for gtidle properties");
>>>
>>> @@ -317,6 +323,69 @@ static void toggle_gt_c6(int fd, int n)
>>>                    "Power consumed in GT C6 should be lower than GT
>>> C0\n");  }
>>>
>>> +static void cpg_enabled(int fd, int gt) {
>>> +    const char *render_power_gating = "Render Power Gating Enabled: ";
>>> +    const char *media_power_gating = "Media Power Gating Enabled: ";
>>> +    char str[512], path[PATH_MAX], *render_substr, *media_substr;
>>> +
>>> +    snprintf(path, sizeof(path), "gt%d/powergate_info", gt);
>>> +    igt_debugfs_read(fd, path, str);
>>> +
>>> +    render_substr = strstr(str, render_power_gating);
>>> +    if (render_substr)
>>> +        igt_assert_f(strncmp(render_substr +
>>> strlen(render_power_gating), "yes", 3) == 0,
>>> +                 "Render Power Gating should be enabled");
>>> +
>>> +    media_substr = strstr(str, media_power_gating);
>>> +    if (media_substr)
>>> +        igt_assert_f(strncmp(media_substr +
>>> strlen(media_power_gating), "yes", 3) == 0,
>>> +                 "Media Power Gating should be enabled"); }
>>> +
>>> +static void powergate_status(int fd, int gt, const char
>>> +*expected_status) {
>>> +    const char *power_gate_status = "Power Gate Status: ";
>>> +    char str[512], path[PATH_MAX], *status_substr;
>>> +
>>> +    snprintf(path, sizeof(path), "gt%d/powergate_info", gt);
>>> +    igt_debugfs_read(fd, path, str);
>>> +
>>> +    status_substr = strstr(str, power_gate_status);
>>> +    while (status_substr) {
>>> +        igt_assert_f((strncmp(status_substr + 
>>> strlen(power_gate_status),
>>> expected_status,
>>> +                      strlen(expected_status)) == 0),
>>> +                  "Power Gate Status Should be %s\n %s\n",
>>> expected_status, str);
>>> +        status_substr = strstr(status_substr + 
>>> strlen(power_gate_status),
>>> +                       power_gate_status);
>>> +    }
>>> +}
>>> +
>>> +static void cpg_basic(int fd, int gt)
>>> +{
>>> +    cpg_enabled(fd, gt);
>>> +    igt_system_suspend_autoresume(SUSPEND_STATE_S3,
>>> SUSPEND_TEST_NONE);
>>> +    cpg_enabled(fd, gt);
>>> +}
>>> +
>>> +static void cpg_gt_toggle(int fd)
>>> +{
>>> +    int gt;
>>> +
>>> +    fw_handle = igt_debugfs_open(fd, "forcewake_all", O_RDONLY);
>>> +    igt_assert_lte(0, fw_handle);
>>> +
>>> +    xe_for_each_gt(fd, gt) {
>>> +        cpg_enabled(fd, gt);
>>> +        powergate_status(fd, gt, "up");
>>> +    }
>>> +
>>> +    close(fw_handle);
>>> +    sleep(1);
>>> +    xe_for_each_gt(fd, gt)
>>> +        powergate_status(fd, gt, "down");
>>> +}
>>> +
>>>   igt_main
>>>   {
>>>       uint32_t d3cold_allowed;
>>> @@ -380,6 +449,17 @@ igt_main
>>>           toggle_gt_c6(fd, NUM_REPS);
>>>       }
>>>
>>> +    igt_describe("Validate Coarse power gating status with S3 cycle");
>>> +    igt_subtest("cpg-basic")
>>> +        xe_for_each_gt(fd, gt)
>>> +            cpg_basic(fd, gt);
>>> +
>>> +    igt_describe("Toggle GT coarse power gating states by managing
>>> forcewake");
>>> +    igt_subtest("cpg-gt-toggle") {
>>> +        igt_install_exit_handler(close_fw_handle);
>>> +        cpg_gt_toggle(fd);
>>> +    }
>>> +
>>>       igt_fixture {
>>>           close(fd);
>>>       }
>>> -- 
>>> 2.34.1
>>
>