* [PATCH 0/2] lib/gpgpu_shader: simplify load/store shaders
@ 2024-11-14 10:31 Andrzej Hajda
2024-11-14 10:31 ` [PATCH 1/2] scripts/generate_iga64_codes: add iga64_macros.h to checksum calculation Andrzej Hajda
` (6 more replies)
0 siblings, 7 replies; 14+ messages in thread
From: Andrzej Hajda @ 2024-11-14 10:31 UTC (permalink / raw)
To: igt-dev
Cc: Dominik Grzegorzek, Zbigniew Kempczyński, Gwan-gyeong Mun,
Kamil Konieczny, Andrzej Hajda
Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com>
---
Andrzej Hajda (2):
scripts/generate_iga64_codes: add iga64_macros.h to checksum calculation
lib/gpgpu_shader: simplify load/store shaders
lib/gpgpu_shader.c | 160 +++-----------------
lib/iga64_generated_codes.c | 338 +++++++++++++++++++++----------------------
lib/iga64_macros.h | 43 ++++++
lib/meson.build | 1 +
scripts/generate_iga64_codes | 2 +-
5 files changed, 232 insertions(+), 312 deletions(-)
---
base-commit: 190dec96be5487f86c45b7e6cf11b8174ebabf31
change-id: 20241106-gpgpu_send_rework-817a3e4f464e
Best regards,
--
Andrzej Hajda <andrzej.hajda@intel.com>
^ permalink raw reply [flat|nested] 14+ messages in thread* [PATCH 1/2] scripts/generate_iga64_codes: add iga64_macros.h to checksum calculation 2024-11-14 10:31 [PATCH 0/2] lib/gpgpu_shader: simplify load/store shaders Andrzej Hajda @ 2024-11-14 10:31 ` Andrzej Hajda 2024-11-14 10:59 ` Zbigniew Kempczyński 2024-11-14 10:31 ` [PATCH 2/2] lib/gpgpu_shader: simplify load/store shaders Andrzej Hajda ` (5 subsequent siblings) 6 siblings, 1 reply; 14+ messages in thread From: Andrzej Hajda @ 2024-11-14 10:31 UTC (permalink / raw) To: igt-dev Cc: Dominik Grzegorzek, Zbigniew Kempczyński, Gwan-gyeong Mun, Kamil Konieczny, Andrzej Hajda Since generated code depends on iga64_macros.h assemblies should be recompiled on it's change as well. Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com> --- lib/iga64_generated_codes.c | 2 +- lib/meson.build | 1 + scripts/generate_iga64_codes | 2 +- 3 files changed, 3 insertions(+), 2 deletions(-) diff --git a/lib/iga64_generated_codes.c b/lib/iga64_generated_codes.c index 6638be07b356..0bd92b8c4dc9 100644 --- a/lib/iga64_generated_codes.c +++ b/lib/iga64_generated_codes.c @@ -3,7 +3,7 @@ #include "gpgpu_shader.h" -#define MD5_SUM_IGA64_ASMS ec9d477415eebb7d6983395f1bcde78f +#define MD5_SUM_IGA64_ASMS e2d97ef45d5f322200793a0aa76872d7 struct iga64_template const iga64_code_gpgpu_fill[] = { { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { diff --git a/lib/meson.build b/lib/meson.build index c3556a921adf..cec148388b77 100644 --- a/lib/meson.build +++ b/lib/meson.build @@ -248,6 +248,7 @@ iga64_generated_codes = custom_target( 'iga64_generated_codes.c', input : [ 'iga64_generated_codes.c' ] + iga64_assembly_libs, output : 'iga64_generated_codes.c', + depend_files : 'iga64_macros.h', command : [ generate_iga64_codes, '-o', '@OUTPUT@', '-i', '@INPUT@' ] ) diff --git a/scripts/generate_iga64_codes b/scripts/generate_iga64_codes index bbf1f7008242..652bf01a080c 100755 --- a/scripts/generate_iga64_codes +++ b/scripts/generate_iga64_codes @@ -40,7 +40,7 @@ while read -d $'\0' asm; do done < <(for f in $LIBS; do objcopy --dump-section .iga64_assembly=/dev/stdout $f.p/*.o /dev/null; done) # check if we need to recompile - checksum difference and compiler present -MD5_ASMS="$(md5sum <<< "${ASMS[@]}" | cut -b1-32)" +MD5_ASMS="$(md5sum <<< "$(< ../lib/iga64_macros.h) ${ASMS[@]}" | cut -b1-32)" MD5_PRE="$(grep -Po '(?<=^#define MD5_SUM_IGA64_ASMS )\S{32,32}' $INPUT 2>/dev/null)" if [ "$MD5_ASMS" = "$MD5_PRE" ]; then -- 2.34.1 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH 1/2] scripts/generate_iga64_codes: add iga64_macros.h to checksum calculation 2024-11-14 10:31 ` [PATCH 1/2] scripts/generate_iga64_codes: add iga64_macros.h to checksum calculation Andrzej Hajda @ 2024-11-14 10:59 ` Zbigniew Kempczyński 0 siblings, 0 replies; 14+ messages in thread From: Zbigniew Kempczyński @ 2024-11-14 10:59 UTC (permalink / raw) To: Andrzej Hajda Cc: igt-dev, Dominik Grzegorzek, Gwan-gyeong Mun, Kamil Konieczny On Thu, Nov 14, 2024 at 11:31:38AM +0100, Andrzej Hajda wrote: > Since generated code depends on iga64_macros.h assemblies should be > recompiled on it's change as well. > > Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com> > --- > lib/iga64_generated_codes.c | 2 +- > lib/meson.build | 1 + > scripts/generate_iga64_codes | 2 +- > 3 files changed, 3 insertions(+), 2 deletions(-) > > diff --git a/lib/iga64_generated_codes.c b/lib/iga64_generated_codes.c > index 6638be07b356..0bd92b8c4dc9 100644 > --- a/lib/iga64_generated_codes.c > +++ b/lib/iga64_generated_codes.c > @@ -3,7 +3,7 @@ > > #include "gpgpu_shader.h" > > -#define MD5_SUM_IGA64_ASMS ec9d477415eebb7d6983395f1bcde78f > +#define MD5_SUM_IGA64_ASMS e2d97ef45d5f322200793a0aa76872d7 > > struct iga64_template const iga64_code_gpgpu_fill[] = { > { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { > diff --git a/lib/meson.build b/lib/meson.build > index c3556a921adf..cec148388b77 100644 > --- a/lib/meson.build > +++ b/lib/meson.build > @@ -248,6 +248,7 @@ iga64_generated_codes = custom_target( > 'iga64_generated_codes.c', > input : [ 'iga64_generated_codes.c' ] + iga64_assembly_libs, > output : 'iga64_generated_codes.c', > + depend_files : 'iga64_macros.h', > command : [ generate_iga64_codes, '-o', '@OUTPUT@', '-i', '@INPUT@' ] > ) > > diff --git a/scripts/generate_iga64_codes b/scripts/generate_iga64_codes > index bbf1f7008242..652bf01a080c 100755 > --- a/scripts/generate_iga64_codes > +++ b/scripts/generate_iga64_codes > @@ -40,7 +40,7 @@ while read -d $'\0' asm; do > done < <(for f in $LIBS; do objcopy --dump-section .iga64_assembly=/dev/stdout $f.p/*.o /dev/null; done) > > # check if we need to recompile - checksum difference and compiler present > -MD5_ASMS="$(md5sum <<< "${ASMS[@]}" | cut -b1-32)" > +MD5_ASMS="$(md5sum <<< "$(< ../lib/iga64_macros.h) ${ASMS[@]}" | cut -b1-32)" > MD5_PRE="$(grep -Po '(?<=^#define MD5_SUM_IGA64_ASMS )\S{32,32}' $INPUT 2>/dev/null)" > > if [ "$MD5_ASMS" = "$MD5_PRE" ]; then > > -- > 2.34.1 > LGTM but I've some nit - please add some comment to igt64_macros.h in which you inform the person who's changing the header that after rebuilding lib/iga64_generated_codes.c must be added to commit to avoid MD5 sum mismatch. Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> -- Zbigniew ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 2/2] lib/gpgpu_shader: simplify load/store shaders 2024-11-14 10:31 [PATCH 0/2] lib/gpgpu_shader: simplify load/store shaders Andrzej Hajda 2024-11-14 10:31 ` [PATCH 1/2] scripts/generate_iga64_codes: add iga64_macros.h to checksum calculation Andrzej Hajda @ 2024-11-14 10:31 ` Andrzej Hajda 2024-11-14 11:28 ` Zbigniew Kempczyński 2024-11-14 14:05 ` Grzegorzek, Dominik 2024-11-14 12:18 ` ✗ GitLab.Pipeline: warning for " Patchwork ` (4 subsequent siblings) 6 siblings, 2 replies; 14+ messages in thread From: Andrzej Hajda @ 2024-11-14 10:31 UTC (permalink / raw) To: igt-dev Cc: Dominik Grzegorzek, Zbigniew Kempczyński, Gwan-gyeong Mun, Kamil Konieczny, Andrzej Hajda There is lot of redundancy in shaders code regarding load/store messages. It makes the code barely readable. Simplify it by using macros in iga64 assembler. Every load/store operation is split into two phases: 1. Load address/descriptor (from) where data should be stored/loaded. 2. Issue load/store instruction. Shader threads needs two types of memory access: 3. Private area per thread. 4. Area shared per all threads. Different platforms access surface in different ways: 5. Using media block messages. 6. Using untyped 2d block messages. 7. Future platforms will use different messages. All this is simplified to two macros per message in shader: load_(shared|thread)_space_addr(dst,y,width) (load|store)_space_dw(dst, src) Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com> --- lib/gpgpu_shader.c | 160 +++------------------ lib/iga64_generated_codes.c | 338 ++++++++++++++++++++++---------------------- lib/iga64_macros.h | 43 ++++++ 3 files changed, 230 insertions(+), 311 deletions(-) diff --git a/lib/gpgpu_shader.c b/lib/gpgpu_shader.c index 4e1b8d5e9009..7728f96bf305 100644 --- a/lib/gpgpu_shader.c +++ b/lib/gpgpu_shader.c @@ -431,22 +431,8 @@ void gpgpu_shader__jump_neq(struct gpgpu_shader *shdr, int label_id, size = emit_iga64_code(shdr, jump_dw_neq, " \n\ L0: \n\ -(W) mov (16|M0) r30.0<1>:ud 0x0:ud \n\ -#if GEN_VER < 2000 // Media Block Write \n\ - // Y offset of the block in rows := thread group id Y \n\ -(W) mov (1|M0) r30.1<1>:ud ARG(0):ud \n\ - // block width [0,63] representing 1 to 64 bytes, we want dword \n\ -(W) mov (1|M0) r30.2<1>:ud 0x3:ud \n\ - // FFTID := FFTID from R0 header \n\ -(W) mov (1|M0) r30.4<1>:ud r0.5<0;1,0>:ud \n\ -(W) send.dc1 (16|M0) r31 r30 null 0x0 0x2190000 \n\ -#else // Typed 2D Block Store \n\ - // Store X and Y block start (160:191 and 192:223) \n\ -(W) mov (1|M0) r30.6<1>:ud ARG(0):ud \n\ - // Store X and Y block size (224:231 and 232:239) \n\ -(W) mov (1|M0) r30.7<1>:ud 0x3:ud \n\ -(W) send.tgm (16|M0) r31 r30 null:0 0x0 0x62100003 \n\ -#endif \n\ + load_shared_space_addr(r30, ARG(0):ud, 4) \n\ +(W) load_space_dw(r31, r30) \n\ // clear the flag register \n\ (W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ (W) cmp (1|M0) (ne)f0.0 null<1>:ud r31.0<0;1,0>:ud ARG(1):ud \n\ @@ -511,28 +497,13 @@ void gpgpu_shader__common_target_write(struct gpgpu_shader *shdr, uint32_t y_offset, const uint32_t value[4]) { emit_iga64_code(shdr, common_target_write, " \n\ -(W) mov (16|M0) r30.0<1>:ud 0x0:ud \n\ (W) mov (16|M0) r31.0<1>:ud 0x0:ud \n\ (W) mov (1|M0) r31.0<1>:ud ARG(1):ud \n\ (W) mov (1|M0) r31.1<1>:ud ARG(2):ud \n\ (W) mov (1|M0) r31.2<1>:ud ARG(3):ud \n\ (W) mov (1|M0) r31.3<1>:ud ARG(4):ud \n\ -#if GEN_VER < 2000 // Media Block Write \n\ - // Y offset of the block in rows \n\ -(W) mov (1|M0) r30.1<1>:ud ARG(0):ud \n\ - // block width [0,63] representing 1 to 64 bytes \n\ -(W) mov (1|M0) r30.2<1>:ud 0xf:ud \n\ - // FFTID := FFTID from R0 header \n\ -(W) mov (1|M0) r30.4<1>:ud r0.5<0;1,0>:ud \n\ - // written value \n\ -(W) send.dc1 (16|M0) null r30 src1_null 0x0 0x40A8000 \n\ -#else // Typed 2D Block Store \n\ - // Store X and Y block start (160:191 and 192:223) \n\ -(W) mov (1|M0) r30.6<1>:ud ARG(0):ud \n\ - // Store X and Y block size (224:231 and 232:239) \n\ -(W) mov (1|M0) r30.7<1>:ud 0xf:ud \n\ -(W) send.tgm (16|M0) null r30 null:0 0x0 0x64000007 \n\ -#endif \n\ + load_shared_space_addr(r30, ARG(0):ud, 16) \n\ +(W) store_space_dw(r30, r31) \n\ ", y_offset, value[0], value[1], value[2], value[3]); } @@ -565,31 +536,8 @@ void gpgpu_shader__write_aip(struct gpgpu_shader *shdr, uint32_t y_offset) emit_iga64_code(shdr, media_block_write_aip, " \n\ // Payload \n\ (W) mov (1|M0) r5.0<1>:ud cr0.2:ud \n\ -#if GEN_VER < 2000 // Media Block Write \n\ - // X offset of the block in bytes := (thread group id X << ARG(0)) \n\ -(W) shl (1|M0) r4.0<1>:ud r0.1<0;1,0>:ud 0x2:ud \n\ - // Y offset of the block in rows := thread group id Y \n\ -(W) mov (1|M0) r4.1<1>:ud r0.6<0;1,0>:ud \n\ -(W) add (1|M0) r4.1<1>:ud r4.1<0;1,0>:ud ARG(0):ud \n\ - // block width [0,63] representing 1 to 64 bytes \n\ -(W) mov (1|M0) r4.2<1>:ud 0x3:ud \n\ - // FFTID := FFTID from R0 header \n\ -(W) mov (1|M0) r4.4<1>:ud r0.5<0;1,0>:ud \n\ -(W) send.dc1 (16|M0) null r4 src1_null 0 0x40A8000 \n\ -#else // Typed 2D Block Store \n\ - // Load r2.0-3 with tg id X << ARG(0) \n\ -(W) shl (1|M0) r2.0<1>:ud r0.1<0;1,0>:ud 0x2:ud \n\ - // Load r2.4-7 with tg id Y + ARG(1):ud \n\ -(W) mov (1|M0) r2.1<1>:ud r0.6<0;1,0>:ud \n\ -(W) add (1|M0) r2.1<1>:ud r2.1<0;1,0>:ud ARG(0):ud \n\ - // payload setup \n\ -(W) mov (16|M0) r4.0<1>:ud 0x0:ud \n\ - // Store X and Y block start (160:191 and 192:223) \n\ -(W) mov (2|M0) r4.5<1>:ud r2.0<2;2,1>:ud \n\ - // Store X and Y block max_size (224:231 and 232:239) \n\ -(W) mov (1|M0) r4.7<1>:ud 0x3:ud \n\ -(W) send.tgm (16|M0) null r4 null:0 0 0x64000007 \n\ -#endif \n\ + load_thread_space_addr(r4, 0, ARG(0):ud, 4) \n\ +(W) store_space_dw(r4, r5) \n\ ", y_offset); } @@ -618,38 +566,11 @@ void gpgpu_shader__increase_aip(struct gpgpu_shader *shdr, uint32_t value) void gpgpu_shader__write_dword(struct gpgpu_shader *shdr, uint32_t value, uint32_t y_offset) { - emit_iga64_code(shdr, media_block_write, " \n\ - // Clear message header \n\ -(W) mov (16|M0) r4.0<1>:ud 0x0:ud \n\ - // Payload \n\ -(W) mov (1|M0) r5.0<1>:ud ARG(3):ud \n\ -(W) mov (1|M0) r5.1<1>:ud ARG(4):ud \n\ -(W) mov (1|M0) r5.2<1>:ud ARG(5):ud \n\ -(W) mov (1|M0) r5.3<1>:ud ARG(6):ud \n\ -#if GEN_VER < 2000 // Media Block Write \n\ - // X offset of the block in bytes := (thread group id X << ARG(0)) \n\ -(W) shl (1|M0) r4.0<1>:ud r0.1<0;1,0>:ud ARG(0):ud \n\ - // Y offset of the block in rows := thread group id Y \n\ -(W) mov (1|M0) r4.1<1>:ud r0.6<0;1,0>:ud \n\ -(W) add (1|M0) r4.1<1>:ud r4.1<0;1,0>:ud ARG(1):ud \n\ - // block width [0,63] representing 1 to 64 bytes \n\ -(W) mov (1|M0) r4.2<1>:ud ARG(2):ud \n\ - // FFTID := FFTID from R0 header \n\ -(W) mov (1|M0) r4.4<1>:ud r0.5<0;1,0>:ud \n\ -(W) send.dc1 (16|M0) null r4 src1_null 0 0x40A8000 \n\ -#else // Typed 2D Block Store \n\ - // Load r2.0-3 with tg id X << ARG(0) \n\ -(W) shl (1|M0) r2.0<1>:ud r0.1<0;1,0>:ud ARG(0):ud \n\ - // Load r2.4-7 with tg id Y + ARG(1):ud \n\ -(W) mov (1|M0) r2.1<1>:ud r0.6<0;1,0>:ud \n\ -(W) add (1|M0) r2.1<1>:ud r2.1<0;1,0>:ud ARG(1):ud \n\ - // Store X and Y block start (160:191 and 192:223) \n\ -(W) mov (2|M0) r4.5<1>:ud r2.0<2;2,1>:ud \n\ - // Store X and Y block max_size (224:231 and 232:239) \n\ -(W) mov (1|M0) r4.7<1>:ud ARG(2):ud \n\ -(W) send.tgm (16|M0) null r4 null:0 0 0x64000007 \n\ -#endif \n\ - ", 2, y_offset, 3, value, value, value, value); + emit_iga64_code(shdr, media_block_write, " \n\ +(W) mov (1) r5.0<1>:ud ARG(1):ud \n\ + load_thread_space_addr(r4, 0, ARG(0):ud, 4) \n\ +(W) store_space_dw(r4, r5) \n\ + ", y_offset, value); } /** @@ -697,41 +618,14 @@ void gpgpu_shader__write_on_exception(struct gpgpu_shader *shdr, uint32_t value, uint32_t y_offset, uint32_t mask, uint32_t expected) { emit_iga64_code(shdr, write_on_exception, " \n\ - // Clear message header \n\ -(W) mov (16|M0) r4.0<1>:ud 0x0:ud \n\ - // Payload \n\ -(W) mov (1|M0) r5.0<1>:ud ARG(4):ud \n\ -#if GEN_VER < 2000 // prepare Media Block Write \n\ - // X offset of the block in bytes := (thread group id X << ARG(0)) \n\ -(W) add (1|M0) r4.0<1>:ud r0.1<0;1,0>:ud ARG(1):ud \n\ -(W) shl (1|M0) r4.0<1>:ud r4.0<0;1,0>:ud ARG(0):ud \n\ - // Y offset of the block in rows := thread group id Y \n\ -(W) add (1|M0) r4.1<1>:ud r0.6<0;1,0>:ud ARG(2):ud \n\ - // block width [0,63] representing 1 to 64 bytes \n\ -(W) mov (1|M0) r4.2<1>:ud ARG(3):ud \n\ - // FFTID := FFTID from R0 header \n\ -(W) mov (1|M0) r4.4<1>:ud r0.5<0;1,0>:ud \n\ -#else // prepare Typed 2D Block Store \n\ - // Load r2.0 with tg id (X + ARG(1)) << ARG(0) \n\ -(W) add (1|M0) r2.0<1>:ud r0.1<0;1,0>:ud ARG(1):ud \n\ -(W) shl (1|M0) r2.0<1>:ud r2.0<0;1,0>:ud ARG(0):ud \n\ - // Load r2.4-7 with tg id Y + ARG(2):ud \n\ -(W) add (1|M0) r2.1<1>:ud r0.6<0;1,0>:ud ARG(2):ud \n\ - // Store X and Y block start (160:191 and 192:223) \n\ -(W) mov (2|M0) r4.5<1>:ud r2.0<2;2,1>:ud \n\ - // Store X and Y block max_size (224:231 and 232:239) \n\ -(W) mov (1|M0) r4.7<1>:ud ARG(3):ud \n\ -#endif \n\ +(W) mov (1|M0) r5.0<1>:ud ARG(2):ud \n\ + load_thread_space_addr(r4, ARG(0), ARG(1):ud, 4) \n\ // Check if masked exception is equal to provided value and write conditionally \n\ -(W) and (1|M0) r3.0<1>:ud cr0.1<0;1,0>:ud ARG(5):ud \n\ -(W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ -(W) cmp (1|M0) (eq)f0.0 null:ud r3.0<0;1,0>:ud ARG(6):ud \n\ -#if GEN_VER < 2000 // Media Block Write \n\ -(W&f0.0) send.dc1 (16|M0) null r4 src1_null 0 0x40A8000 \n\ -#else // Typed 2D Block Store \n\ -(W&f0.0) send.tgm (16|M0) null r4 null:0 0 0x64000007 \n\ -#endif \n\ - ", 2, x_offset, y_offset, 3, value, mask, expected); +(W) and (1|M0) r3.0<1>:ud cr0.1<0;1,0>:ud ARG(3):ud \n\ +(W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ +(W) cmp (1|M0) (eq)f0.0 null:ud r3.0<0;1,0>:ud ARG(4):ud \n\ +(W&f0.0) store_space_dw(r4, r5) \n\ + ", 4 * x_offset, y_offset, value, mask, expected); } /** @@ -778,22 +672,8 @@ void gpgpu_shader__end_system_routine_step_if_eq(struct gpgpu_shader *shdr, emit_iga64_code(shdr, end_system_routine_step_if_eq, " \n\ (W) or (1|M0) cr0.0<1>:ud cr0.0<0;1,0>:ud 0x8000:ud \n\ (W) and (1|M0) cr0.1<1>:ud cr0.1<0;1,0>:ud ARG(0):ud \n\ -(W) mov (16|M0) r30.0<1>:ud 0x0:ud \n\ -#if GEN_VER < 2000 // Media Block Write \n\ - // Y offset of the block in rows := thread group id Y \n\ -(W) mov (1|M0) r30.1<1>:ud ARG(1):ud \n\ - // block width [0,63] representing 1 to 64 bytes, we want dword \n\ -(W) mov (1|M0) r30.2<1>:ud 0x3:ud \n\ - // FFTID := FFTID from R0 header \n\ -(W) mov (1|M0) r30.4<1>:ud r0.5<0;1,0>:ud \n\ -(W) send.dc1 (16|M0) r31 r30 null 0x0 0x2190000 \n\ -#else // Typed 2D Block Store \n\ - // Store X and Y block start (160:191 and 192:223) \n\ -(W) mov (1|M0) r30.6<1>:ud ARG(1):ud \n\ - // Store X and Y block size (224:231 and 232:239) \n\ -(W) mov (1|M0) r30.7<1>:ud 0x3:ud \n\ -(W) send.tgm (16|M0) r31 r30 null:0 0x0 0x62100003 \n\ -#endif \n\ + load_thread_space_addr(r30, 0, ARG(0):ud, 4) \n\ +(W) load_space_dw(r31, r30) \n\ // clear the flag register \n\ (W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ (W) cmp (1|M0) (ne)f0.0 null<1>:ud r31.0<0;1,0>:ud ARG(2):ud \n\ diff --git a/lib/iga64_generated_codes.c b/lib/iga64_generated_codes.c index 0bd92b8c4dc9..017adefce400 100644 --- a/lib/iga64_generated_codes.c +++ b/lib/iga64_generated_codes.c @@ -3,7 +3,7 @@ #include "gpgpu_shader.h" -#define MD5_SUM_IGA64_ASMS e2d97ef45d5f322200793a0aa76872d7 +#define MD5_SUM_IGA64_ASMS fa1b0aa75c3ee1cd13300ad1324737b4 struct iga64_template const iga64_code_gpgpu_fill[] = { { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { @@ -80,71 +80,81 @@ struct iga64_template const iga64_code_gpgpu_fill[] = { }; struct iga64_template const iga64_code_end_system_routine_step_if_eq[] = { - { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { + { .gen_ver = 2000, .size = 52, .code = (const uint32_t []) { 0x80000966, 0x80018220, 0x02008000, 0x00008000, 0x80000965, 0x80118220, 0x02008010, 0xc0ded000, - 0x80100961, 0x1e054220, 0x00000000, 0x00000000, - 0x80000061, 0x1e654220, 0x00000000, 0xc0ded001, + 0x800c0961, 0x1e054220, 0x00000000, 0x00000000, + 0x80000069, 0x1e558220, 0x02000014, 0x00000002, + 0x80001940, 0x1e558220, 0x02001e54, 0x00000000, + 0x80000040, 0x1e658220, 0x02000064, 0xc0ded000, 0x80000061, 0x1e754220, 0x00000000, 0x00000003, - 0x80132031, 0x1f0c0000, 0xd0061e8c, 0x04000000, + 0x80032031, 0x1f0c0000, 0xd0061e8c, 0x04000000, 0x80000061, 0x30014220, 0x00000000, 0x00000000, 0x80008070, 0x00018220, 0x22001f04, 0xc0ded002, 0x84000965, 0x80118220, 0x02008010, 0xc0ded003, 0x80000965, 0x80018220, 0x02008000, 0x7ffffffd, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, - { .gen_ver = 1270, .size = 52, .code = (const uint32_t []) { + { .gen_ver = 1270, .size = 60, .code = (const uint32_t []) { 0x80000966, 0x80018220, 0x02008000, 0x00008000, 0x80000965, 0x80218220, 0x02008020, 0xc0ded000, - 0x80040961, 0x1e054220, 0x00000000, 0x00000000, - 0x80000061, 0x1e254220, 0x00000000, 0xc0ded001, + 0x80030961, 0x1e054220, 0x00000000, 0x00000000, + 0x80000069, 0x1e058220, 0x02000024, 0x00000002, + 0x80001940, 0x1e058220, 0x02001e04, 0x00000000, + 0x80000040, 0x1e258220, 0x020000c4, 0xc0ded000, 0x80000061, 0x1e454220, 0x00000000, 0x00000003, 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, 0x80001901, 0x00010000, 0x00000000, 0x00000000, - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, 0x80000061, 0x30014220, 0x00000000, 0x00000000, 0x80002070, 0x00018220, 0x22001f04, 0xc0ded002, 0x81000965, 0x80218220, 0x02008020, 0xc0ded003, 0x80000965, 0x80018220, 0x02008000, 0x7ffffffd, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, - { .gen_ver = 1260, .size = 48, .code = (const uint32_t []) { + { .gen_ver = 1260, .size = 56, .code = (const uint32_t []) { 0x80000966, 0x80018220, 0x02008000, 0x00008000, 0x80000965, 0x80118220, 0x02008010, 0xc0ded000, - 0x80100961, 0x1e054220, 0x00000000, 0x00000000, - 0x80000061, 0x1e154220, 0x00000000, 0xc0ded001, + 0x800c0961, 0x1e054220, 0x00000000, 0x00000000, + 0x80000069, 0x1e058220, 0x02000014, 0x00000002, + 0x80001940, 0x1e058220, 0x02001e04, 0x00000000, + 0x80000040, 0x1e158220, 0x02000064, 0xc0ded000, 0x80000061, 0x1e254220, 0x00000000, 0x00000003, 0x80000061, 0x1e450220, 0x00000054, 0x00000000, - 0x80132031, 0x1f0c0000, 0xc0001e0c, 0x02400000, + 0x80032031, 0x1f0c0000, 0xc0001e0c, 0x02400000, 0x80000061, 0x30014220, 0x00000000, 0x00000000, 0x80008070, 0x00018220, 0x22001f04, 0xc0ded002, 0x84000965, 0x80118220, 0x02008010, 0xc0ded003, 0x80000965, 0x80018220, 0x02008000, 0x7ffffffd, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, - { .gen_ver = 1250, .size = 52, .code = (const uint32_t []) { + { .gen_ver = 1250, .size = 60, .code = (const uint32_t []) { 0x80000966, 0x80018220, 0x02008000, 0x00008000, 0x80000965, 0x80218220, 0x02008020, 0xc0ded000, - 0x80040961, 0x1e054220, 0x00000000, 0x00000000, - 0x80000061, 0x1e254220, 0x00000000, 0xc0ded001, + 0x80030961, 0x1e054220, 0x00000000, 0x00000000, + 0x80000069, 0x1e058220, 0x02000024, 0x00000002, + 0x80001940, 0x1e058220, 0x02001e04, 0x00000000, + 0x80000040, 0x1e258220, 0x020000c4, 0xc0ded000, 0x80000061, 0x1e454220, 0x00000000, 0x00000003, 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, 0x80001901, 0x00010000, 0x00000000, 0x00000000, - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, 0x80000061, 0x30014220, 0x00000000, 0x00000000, 0x80002070, 0x00018220, 0x22001f04, 0xc0ded002, 0x81000965, 0x80218220, 0x02008020, 0xc0ded003, 0x80000965, 0x80018220, 0x02008000, 0x7ffffffd, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, - { .gen_ver = 0, .size = 48, .code = (const uint32_t []) { + { .gen_ver = 0, .size = 56, .code = (const uint32_t []) { 0x80000166, 0x80018220, 0x02008000, 0x00008000, 0x80000165, 0x80218220, 0x02008020, 0xc0ded000, - 0x80040161, 0x1e054220, 0x00000000, 0x00000000, - 0x80000061, 0x1e254220, 0x00000000, 0xc0ded001, + 0x80030161, 0x1e054220, 0x00000000, 0x00000000, + 0x80000069, 0x1e058220, 0x02000024, 0x00000002, + 0x80000140, 0x1e058220, 0x02001e04, 0x00000000, + 0x80000040, 0x1e258220, 0x020000c4, 0xc0ded000, 0x80000061, 0x1e454220, 0x00000000, 0x00000003, 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, - 0x80049031, 0x1f0c0000, 0xc0001e0c, 0x02400000, + 0x80009031, 0x1f0c0000, 0xc0001e0c, 0x02400000, 0x80000061, 0x30014220, 0x00000000, 0x00000000, 0x80002070, 0x00018220, 0x22001f04, 0xc0ded002, 0x81000165, 0x80218220, 0x02008020, 0xc0ded003, @@ -193,84 +203,83 @@ struct iga64_template const iga64_code_breakpoint_suppress[] = { }; struct iga64_template const iga64_code_write_on_exception[] = { - { .gen_ver = 2000, .size = 56, .code = (const uint32_t []) { - 0x80100061, 0x04054220, 0x00000000, 0x00000000, - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, - 0x80000040, 0x02058220, 0x02000014, 0xc0ded001, - 0x80001969, 0x02058220, 0x02000204, 0xc0ded000, - 0x80000040, 0x02158220, 0x02000064, 0xc0ded002, - 0x80041961, 0x04550220, 0x00220205, 0x00000000, - 0x80000061, 0x04754220, 0x00000000, 0xc0ded003, - 0x80000965, 0x03058220, 0x02008010, 0xc0ded005, + { .gen_ver = 2000, .size = 52, .code = (const uint32_t []) { + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, + 0x80000069, 0x04558220, 0x02000014, 0x00000002, + 0x80001940, 0x04558220, 0x02000454, 0xc0ded000, + 0x80000040, 0x04658220, 0x02000064, 0xc0ded001, + 0x80000061, 0x04754220, 0x00000000, 0x00000003, + 0x80000965, 0x03058220, 0x02008010, 0xc0ded003, 0x80000961, 0x30014220, 0x00000000, 0x00000000, - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, - 0x84132031, 0x00000000, 0xd00e0494, 0x04000000, + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, + 0x84032031, 0x00000000, 0xd00e0494, 0x04000000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, { .gen_ver = 1270, .size = 60, .code = (const uint32_t []) { - 0x80040061, 0x04054220, 0x00000000, 0x00000000, - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, - 0x80000040, 0x04058220, 0x02000024, 0xc0ded001, - 0x80001969, 0x04058220, 0x02000404, 0xc0ded000, - 0x80000040, 0x04258220, 0x020000c4, 0xc0ded002, - 0x80000061, 0x04454220, 0x00000000, 0xc0ded003, + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, + 0x80030061, 0x04054220, 0x00000000, 0x00000000, + 0x80000069, 0x04058220, 0x02000024, 0x00000002, + 0x80001940, 0x04058220, 0x02000404, 0xc0ded000, + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded001, + 0x80000061, 0x04454220, 0x00000000, 0x00000003, 0x80000061, 0x04850220, 0x000000a4, 0x00000000, - 0x80000965, 0x03058220, 0x02008020, 0xc0ded005, + 0x80000965, 0x03058220, 0x02008020, 0xc0ded003, 0x80000961, 0x30014220, 0x00000000, 0x00000000, - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, 0x80001901, 0x00010000, 0x00000000, 0x00000000, - 0x81044031, 0x00000000, 0xc0000414, 0x02a00000, + 0x81004031, 0x00000000, 0xc0000414, 0x02a00000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, { .gen_ver = 1260, .size = 56, .code = (const uint32_t []) { - 0x80100061, 0x04054220, 0x00000000, 0x00000000, - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, - 0x80000040, 0x04058220, 0x02000014, 0xc0ded001, - 0x80001969, 0x04058220, 0x02000404, 0xc0ded000, - 0x80000040, 0x04158220, 0x02000064, 0xc0ded002, - 0x80000061, 0x04254220, 0x00000000, 0xc0ded003, + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, + 0x80000069, 0x04058220, 0x02000014, 0x00000002, + 0x80001940, 0x04058220, 0x02000404, 0xc0ded000, + 0x80000040, 0x04158220, 0x02000064, 0xc0ded001, + 0x80000061, 0x04254220, 0x00000000, 0x00000003, 0x80000061, 0x04450220, 0x00000054, 0x00000000, - 0x80000965, 0x03058220, 0x02008010, 0xc0ded005, + 0x80000965, 0x03058220, 0x02008010, 0xc0ded003, 0x80000961, 0x30014220, 0x00000000, 0x00000000, - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, - 0x84132031, 0x00000000, 0xc0000414, 0x02a00000, + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, + 0x84032031, 0x00000000, 0xc0000414, 0x02a00000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, { .gen_ver = 1250, .size = 60, .code = (const uint32_t []) { - 0x80040061, 0x04054220, 0x00000000, 0x00000000, - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, - 0x80000040, 0x04058220, 0x02000024, 0xc0ded001, - 0x80001969, 0x04058220, 0x02000404, 0xc0ded000, - 0x80000040, 0x04258220, 0x020000c4, 0xc0ded002, - 0x80000061, 0x04454220, 0x00000000, 0xc0ded003, + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, + 0x80030061, 0x04054220, 0x00000000, 0x00000000, + 0x80000069, 0x04058220, 0x02000024, 0x00000002, + 0x80001940, 0x04058220, 0x02000404, 0xc0ded000, + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded001, + 0x80000061, 0x04454220, 0x00000000, 0x00000003, 0x80000061, 0x04850220, 0x000000a4, 0x00000000, - 0x80000965, 0x03058220, 0x02008020, 0xc0ded005, + 0x80000965, 0x03058220, 0x02008020, 0xc0ded003, 0x80000961, 0x30014220, 0x00000000, 0x00000000, - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, 0x80001901, 0x00010000, 0x00000000, 0x00000000, - 0x81044031, 0x00000000, 0xc0000414, 0x02a00000, + 0x81004031, 0x00000000, 0xc0000414, 0x02a00000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, { .gen_ver = 0, .size = 56, .code = (const uint32_t []) { - 0x80040061, 0x04054220, 0x00000000, 0x00000000, - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, - 0x80000040, 0x04058220, 0x02000024, 0xc0ded001, - 0x80000169, 0x04058220, 0x02000404, 0xc0ded000, - 0x80000040, 0x04258220, 0x020000c4, 0xc0ded002, - 0x80000061, 0x04454220, 0x00000000, 0xc0ded003, + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, + 0x80030061, 0x04054220, 0x00000000, 0x00000000, + 0x80000069, 0x04058220, 0x02000024, 0x00000002, + 0x80000140, 0x04058220, 0x02000404, 0xc0ded000, + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded001, + 0x80000061, 0x04454220, 0x00000000, 0x00000003, 0x80000061, 0x04850220, 0x000000a4, 0x00000000, - 0x80000165, 0x03058220, 0x02008020, 0xc0ded005, + 0x80000165, 0x03058220, 0x02008020, 0xc0ded003, 0x80000161, 0x30014220, 0x00000000, 0x00000000, - 0x80000270, 0x00018220, 0x12000304, 0xc0ded006, - 0x81049031, 0x00000000, 0xc0000414, 0x02a00000, + 0x80000270, 0x00018220, 0x12000304, 0xc0ded004, + 0x81009031, 0x00000000, 0xc0000414, 0x02a00000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000101, 0x00010000, 0x00000000, 0x00000000, @@ -324,84 +333,68 @@ struct iga64_template const iga64_code_clear_exception[] = { }; struct iga64_template const iga64_code_media_block_write[] = { - { .gen_ver = 2000, .size = 56, .code = (const uint32_t []) { - 0x80100061, 0x04054220, 0x00000000, 0x00000000, - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, - 0x80000061, 0x05154220, 0x00000000, 0xc0ded004, - 0x80000061, 0x05254220, 0x00000000, 0xc0ded005, - 0x80000061, 0x05354220, 0x00000000, 0xc0ded006, - 0x80000069, 0x02058220, 0x02000014, 0xc0ded000, - 0x80000061, 0x02150220, 0x00000064, 0x00000000, - 0x80001940, 0x02158220, 0x02000214, 0xc0ded001, - 0x80041961, 0x04550220, 0x00220205, 0x00000000, - 0x80000061, 0x04754220, 0x00000000, 0xc0ded002, - 0x80132031, 0x00000000, 0xd00e0494, 0x04000000, + { .gen_ver = 2000, .size = 40, .code = (const uint32_t []) { + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, + 0x80000069, 0x04558220, 0x02000014, 0x00000002, + 0x80001940, 0x04558220, 0x02000454, 0x00000000, + 0x80000040, 0x04658220, 0x02000064, 0xc0ded000, + 0x80000061, 0x04754220, 0x00000000, 0x00000003, + 0x80032031, 0x00000000, 0xd00e0494, 0x04000000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, - { .gen_ver = 1270, .size = 60, .code = (const uint32_t []) { - 0x80040061, 0x04054220, 0x00000000, 0x00000000, - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, - 0x80000061, 0x05254220, 0x00000000, 0xc0ded004, - 0x80000061, 0x05454220, 0x00000000, 0xc0ded005, - 0x80000061, 0x05654220, 0x00000000, 0xc0ded006, - 0x80000069, 0x04058220, 0x02000024, 0xc0ded000, - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, - 0x80001940, 0x04258220, 0x02000424, 0xc0ded001, - 0x80000061, 0x04454220, 0x00000000, 0xc0ded002, + { .gen_ver = 1270, .size = 48, .code = (const uint32_t []) { + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, + 0x80030061, 0x04054220, 0x00000000, 0x00000000, + 0x80000069, 0x04058220, 0x02000024, 0x00000002, + 0x80001940, 0x04058220, 0x02000404, 0x00000000, + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, + 0x80000061, 0x04454220, 0x00000000, 0x00000003, 0x80000061, 0x04850220, 0x000000a4, 0x00000000, 0x80001901, 0x00010000, 0x00000000, 0x00000000, - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, - { .gen_ver = 1260, .size = 56, .code = (const uint32_t []) { - 0x80100061, 0x04054220, 0x00000000, 0x00000000, - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, - 0x80000061, 0x05154220, 0x00000000, 0xc0ded004, - 0x80000061, 0x05254220, 0x00000000, 0xc0ded005, - 0x80000061, 0x05354220, 0x00000000, 0xc0ded006, - 0x80000069, 0x04058220, 0x02000014, 0xc0ded000, - 0x80000061, 0x04150220, 0x00000064, 0x00000000, - 0x80001940, 0x04158220, 0x02000414, 0xc0ded001, - 0x80000061, 0x04254220, 0x00000000, 0xc0ded002, + { .gen_ver = 1260, .size = 44, .code = (const uint32_t []) { + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, + 0x80000069, 0x04058220, 0x02000014, 0x00000002, + 0x80001940, 0x04058220, 0x02000404, 0x00000000, + 0x80000040, 0x04158220, 0x02000064, 0xc0ded000, + 0x80000061, 0x04254220, 0x00000000, 0x00000003, 0x80000061, 0x04450220, 0x00000054, 0x00000000, - 0x80132031, 0x00000000, 0xc0000414, 0x02a00000, + 0x80032031, 0x00000000, 0xc0000414, 0x02a00000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, - { .gen_ver = 1250, .size = 60, .code = (const uint32_t []) { - 0x80040061, 0x04054220, 0x00000000, 0x00000000, - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, - 0x80000061, 0x05254220, 0x00000000, 0xc0ded004, - 0x80000061, 0x05454220, 0x00000000, 0xc0ded005, - 0x80000061, 0x05654220, 0x00000000, 0xc0ded006, - 0x80000069, 0x04058220, 0x02000024, 0xc0ded000, - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, - 0x80001940, 0x04258220, 0x02000424, 0xc0ded001, - 0x80000061, 0x04454220, 0x00000000, 0xc0ded002, + { .gen_ver = 1250, .size = 48, .code = (const uint32_t []) { + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, + 0x80030061, 0x04054220, 0x00000000, 0x00000000, + 0x80000069, 0x04058220, 0x02000024, 0x00000002, + 0x80001940, 0x04058220, 0x02000404, 0x00000000, + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, + 0x80000061, 0x04454220, 0x00000000, 0x00000003, 0x80000061, 0x04850220, 0x000000a4, 0x00000000, 0x80001901, 0x00010000, 0x00000000, 0x00000000, - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, - { .gen_ver = 0, .size = 56, .code = (const uint32_t []) { - 0x80040061, 0x04054220, 0x00000000, 0x00000000, - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, - 0x80000061, 0x05254220, 0x00000000, 0xc0ded004, - 0x80000061, 0x05454220, 0x00000000, 0xc0ded005, - 0x80000061, 0x05654220, 0x00000000, 0xc0ded006, - 0x80000069, 0x04058220, 0x02000024, 0xc0ded000, - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, - 0x80000140, 0x04258220, 0x02000424, 0xc0ded001, - 0x80000061, 0x04454220, 0x00000000, 0xc0ded002, + { .gen_ver = 0, .size = 44, .code = (const uint32_t []) { + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, + 0x80030061, 0x04054220, 0x00000000, 0x00000000, + 0x80000069, 0x04058220, 0x02000024, 0x00000002, + 0x80000140, 0x04058220, 0x02000404, 0x00000000, + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, + 0x80000061, 0x04454220, 0x00000000, 0x00000003, 0x80000061, 0x04850220, 0x000000a4, 0x00000000, - 0x80049031, 0x00000000, 0xc0000414, 0x02a00000, + 0x80009031, 0x00000000, 0xc0000414, 0x02a00000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000101, 0x00010000, 0x00000000, 0x00000000, @@ -432,65 +425,68 @@ struct iga64_template const iga64_code_write_aip[] = { }; struct iga64_template const iga64_code_media_block_write_aip[] = { - { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { + { .gen_ver = 2000, .size = 40, .code = (const uint32_t []) { 0x80000961, 0x05050220, 0x00008020, 0x00000000, - 0x80000969, 0x02058220, 0x02000014, 0x00000002, - 0x80000061, 0x02150220, 0x00000064, 0x00000000, - 0x80001940, 0x02158220, 0x02000214, 0xc0ded000, - 0x80100061, 0x04054220, 0x00000000, 0x00000000, - 0x80041a61, 0x04550220, 0x00220205, 0x00000000, + 0x800c0961, 0x04054220, 0x00000000, 0x00000000, + 0x80000069, 0x04558220, 0x02000014, 0x00000002, + 0x80001940, 0x04558220, 0x02000454, 0x00000000, + 0x80000040, 0x04658220, 0x02000064, 0xc0ded000, 0x80000061, 0x04754220, 0x00000000, 0x00000003, - 0x80132031, 0x00000000, 0xd00e0494, 0x04000000, + 0x80032031, 0x00000000, 0xd00e0494, 0x04000000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, - { .gen_ver = 1270, .size = 44, .code = (const uint32_t []) { + { .gen_ver = 1270, .size = 48, .code = (const uint32_t []) { 0x80000961, 0x05050220, 0x00008040, 0x00000000, - 0x80000969, 0x04058220, 0x02000024, 0x00000002, - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, - 0x80001940, 0x04258220, 0x02000424, 0xc0ded000, + 0x80030961, 0x04054220, 0x00000000, 0x00000000, + 0x80000069, 0x04058220, 0x02000024, 0x00000002, + 0x80001940, 0x04058220, 0x02000404, 0x00000000, + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, 0x80000061, 0x04454220, 0x00000000, 0x00000003, 0x80000061, 0x04850220, 0x000000a4, 0x00000000, 0x80001901, 0x00010000, 0x00000000, 0x00000000, - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, - { .gen_ver = 1260, .size = 40, .code = (const uint32_t []) { + { .gen_ver = 1260, .size = 44, .code = (const uint32_t []) { 0x80000961, 0x05050220, 0x00008020, 0x00000000, - 0x80000969, 0x04058220, 0x02000014, 0x00000002, - 0x80000061, 0x04150220, 0x00000064, 0x00000000, - 0x80001940, 0x04158220, 0x02000414, 0xc0ded000, + 0x800c0961, 0x04054220, 0x00000000, 0x00000000, + 0x80000069, 0x04058220, 0x02000014, 0x00000002, + 0x80001940, 0x04058220, 0x02000404, 0x00000000, + 0x80000040, 0x04158220, 0x02000064, 0xc0ded000, 0x80000061, 0x04254220, 0x00000000, 0x00000003, 0x80000061, 0x04450220, 0x00000054, 0x00000000, - 0x80132031, 0x00000000, 0xc0000414, 0x02a00000, + 0x80032031, 0x00000000, 0xc0000414, 0x02a00000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, - { .gen_ver = 1250, .size = 44, .code = (const uint32_t []) { + { .gen_ver = 1250, .size = 48, .code = (const uint32_t []) { 0x80000961, 0x05050220, 0x00008040, 0x00000000, - 0x80000969, 0x04058220, 0x02000024, 0x00000002, - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, - 0x80001940, 0x04258220, 0x02000424, 0xc0ded000, + 0x80030961, 0x04054220, 0x00000000, 0x00000000, + 0x80000069, 0x04058220, 0x02000024, 0x00000002, + 0x80001940, 0x04058220, 0x02000404, 0x00000000, + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, 0x80000061, 0x04454220, 0x00000000, 0x00000003, 0x80000061, 0x04850220, 0x000000a4, 0x00000000, 0x80001901, 0x00010000, 0x00000000, 0x00000000, - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, - { .gen_ver = 0, .size = 40, .code = (const uint32_t []) { + { .gen_ver = 0, .size = 44, .code = (const uint32_t []) { 0x80000161, 0x05050220, 0x00008040, 0x00000000, - 0x80000169, 0x04058220, 0x02000024, 0x00000002, - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, - 0x80000140, 0x04258220, 0x02000424, 0xc0ded000, + 0x80030161, 0x04054220, 0x00000000, 0x00000000, + 0x80000069, 0x04058220, 0x02000024, 0x00000002, + 0x80000140, 0x04058220, 0x02000404, 0x00000000, + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, 0x80000061, 0x04454220, 0x00000000, 0x00000003, 0x80000061, 0x04850220, 0x000000a4, 0x00000000, - 0x80049031, 0x00000000, 0xc0000414, 0x02a00000, + 0x80009031, 0x00000000, 0xc0000414, 0x02a00000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000101, 0x00010000, 0x00000000, 0x00000000, @@ -499,77 +495,77 @@ struct iga64_template const iga64_code_media_block_write_aip[] = { struct iga64_template const iga64_code_common_target_write[] = { { .gen_ver = 2000, .size = 48, .code = (const uint32_t []) { - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, 0x80100061, 0x1f054220, 0x00000000, 0x00000000, 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, 0x80000061, 0x1f154220, 0x00000000, 0xc0ded002, 0x80000061, 0x1f254220, 0x00000000, 0xc0ded003, 0x80000061, 0x1f354220, 0x00000000, 0xc0ded004, + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, 0x80000061, 0x1e654220, 0x00000000, 0xc0ded000, 0x80000061, 0x1e754220, 0x00000000, 0x0000000f, - 0x80132031, 0x00000000, 0xd00e1e94, 0x04000000, + 0x80032031, 0x00000000, 0xd00e1e94, 0x04000000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, { .gen_ver = 1270, .size = 56, .code = (const uint32_t []) { - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, 0x80040061, 0x1f054220, 0x00000000, 0x00000000, 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, 0x80000061, 0x1f254220, 0x00000000, 0xc0ded002, 0x80000061, 0x1f454220, 0x00000000, 0xc0ded003, 0x80000061, 0x1f654220, 0x00000000, 0xc0ded004, + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, 0x80000061, 0x1e454220, 0x00000000, 0x0000000f, 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, 0x80001901, 0x00010000, 0x00000000, 0x00000000, - 0x80044031, 0x00000000, 0xc0001e14, 0x02a00000, + 0x80004031, 0x00000000, 0xc0001e14, 0x02a00000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, { .gen_ver = 1260, .size = 52, .code = (const uint32_t []) { - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, 0x80100061, 0x1f054220, 0x00000000, 0x00000000, 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, 0x80000061, 0x1f154220, 0x00000000, 0xc0ded002, 0x80000061, 0x1f254220, 0x00000000, 0xc0ded003, 0x80000061, 0x1f354220, 0x00000000, 0xc0ded004, + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, 0x80000061, 0x1e154220, 0x00000000, 0xc0ded000, 0x80000061, 0x1e254220, 0x00000000, 0x0000000f, 0x80000061, 0x1e450220, 0x00000054, 0x00000000, - 0x80132031, 0x00000000, 0xc0001e14, 0x02a00000, + 0x80032031, 0x00000000, 0xc0001e14, 0x02a00000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, { .gen_ver = 1250, .size = 56, .code = (const uint32_t []) { - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, 0x80040061, 0x1f054220, 0x00000000, 0x00000000, 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, 0x80000061, 0x1f254220, 0x00000000, 0xc0ded002, 0x80000061, 0x1f454220, 0x00000000, 0xc0ded003, 0x80000061, 0x1f654220, 0x00000000, 0xc0ded004, + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, 0x80000061, 0x1e454220, 0x00000000, 0x0000000f, 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, 0x80001901, 0x00010000, 0x00000000, 0x00000000, - 0x80044031, 0x00000000, 0xc0001e14, 0x02a00000, + 0x80004031, 0x00000000, 0xc0001e14, 0x02a00000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, { .gen_ver = 0, .size = 52, .code = (const uint32_t []) { - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, 0x80040061, 0x1f054220, 0x00000000, 0x00000000, 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, 0x80000061, 0x1f254220, 0x00000000, 0xc0ded002, 0x80000061, 0x1f454220, 0x00000000, 0xc0ded003, 0x80000061, 0x1f654220, 0x00000000, 0xc0ded004, + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, 0x80000061, 0x1e454220, 0x00000000, 0x0000000f, 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, - 0x80049031, 0x00000000, 0xc0001e14, 0x02a00000, + 0x80009031, 0x00000000, 0xc0001e14, 0x02a00000, 0x80000001, 0x00010000, 0x20000000, 0x00000000, 0x80000001, 0x00010000, 0x30000000, 0x00000000, 0x80000101, 0x00010000, 0x00000000, 0x00000000, @@ -627,56 +623,56 @@ struct iga64_template const iga64_code_clear_r40[] = { struct iga64_template const iga64_code_jump_dw_neq[] = { { .gen_ver = 2000, .size = 32, .code = (const uint32_t []) { - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, 0x80000061, 0x1e654220, 0x00000000, 0xc0ded000, 0x80000061, 0x1e754220, 0x00000000, 0x00000003, - 0x80132031, 0x1f0c0000, 0xd0061e8c, 0x04000000, + 0x80032031, 0x1f0c0000, 0xd0061e8c, 0x04000000, 0x80000061, 0x30014220, 0x00000000, 0x00000000, 0x80008070, 0x00018220, 0x22001f04, 0xc0ded001, 0x84000020, 0x00004000, 0x00000000, 0xffffffa0, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, { .gen_ver = 1270, .size = 40, .code = (const uint32_t []) { - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, 0x80000061, 0x1e454220, 0x00000000, 0x00000003, 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, 0x80001901, 0x00010000, 0x00000000, 0x00000000, - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, 0x80000061, 0x30014220, 0x00000000, 0x00000000, 0x80002070, 0x00018220, 0x22001f04, 0xc0ded001, 0x81000020, 0x00004000, 0x00000000, 0xffffff80, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, { .gen_ver = 1260, .size = 36, .code = (const uint32_t []) { - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, 0x80000061, 0x1e154220, 0x00000000, 0xc0ded000, 0x80000061, 0x1e254220, 0x00000000, 0x00000003, 0x80000061, 0x1e450220, 0x00000054, 0x00000000, - 0x80132031, 0x1f0c0000, 0xc0001e0c, 0x02400000, + 0x80032031, 0x1f0c0000, 0xc0001e0c, 0x02400000, 0x80000061, 0x30014220, 0x00000000, 0x00000000, 0x80008070, 0x00018220, 0x22001f04, 0xc0ded001, 0x84000020, 0x00004000, 0x00000000, 0xffffff90, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, { .gen_ver = 1250, .size = 40, .code = (const uint32_t []) { - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, 0x80000061, 0x1e454220, 0x00000000, 0x00000003, 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, 0x80001901, 0x00010000, 0x00000000, 0x00000000, - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, 0x80000061, 0x30014220, 0x00000000, 0x00000000, 0x80002070, 0x00018220, 0x22001f04, 0xc0ded001, 0x81000020, 0x00004000, 0x00000000, 0xffffff80, 0x80000901, 0x00010000, 0x00000000, 0x00000000, }}, { .gen_ver = 0, .size = 36, .code = (const uint32_t []) { - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, 0x80000061, 0x1e454220, 0x00000000, 0x00000003, 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, - 0x80049031, 0x1f0c0000, 0xc0001e0c, 0x02400000, + 0x80009031, 0x1f0c0000, 0xc0001e0c, 0x02400000, 0x80000061, 0x30014220, 0x00000000, 0x00000000, 0x80002070, 0x00018220, 0x22001f04, 0xc0ded001, 0x81000120, 0x00004000, 0x00000000, 0xffffff90, diff --git a/lib/iga64_macros.h b/lib/iga64_macros.h index 03cc726d48c2..0fd5e268d957 100644 --- a/lib/iga64_macros.h +++ b/lib/iga64_macros.h @@ -13,4 +13,47 @@ #define src1_null null:0 #endif +/* GPGPU_R0Payload fields, Bspec: 55396, 56587 */ +#define r0_tgidx r0.1<0;1,0>:ud +#define r0_tgidy r0.6<0;1,0>:ud +#define r0_fftid r0.5<0;1,0>:ud + +#define load_shared_media_block_msg_hdr(dst, y, width) \ +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ +(W) mov (1) dst.1<1>:ud y ;\ +(W) mov (1) dst.2<1>:ud (width - 1):ud ;\ +(W) mov (1) dst.4<1>:ud r0_fftid + +#define load_thread_media_block_msg_hdr(dst, x, y, width) \ +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ +(W) shl (1) dst.0<1>:ud r0_tgidx 0x2:ud ;\ +(W) add (1) dst.0<1>:ud dst.0<0;1,0>:ud x:ud ;\ +(W) add (1) dst.1<1>:ud r0_tgidy y ;\ +(W) mov (1) dst.2<1>:ud (width - 1):ud ;\ +(W) mov (1) dst.4<1>:ud r0_fftid + +#define load_shared_a2dblock_payload(dst, y, width) \ +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ +(W) mov (1) dst.6<1>:ud y ;\ +(W) mov (1) dst.7<1>:ud (width - 1):ud + +#define load_thread_a2dblock_payload(dst, x, y, width) \ +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ +(W) shl (1) dst.5<1>:ud r0_tgidx 0x2:ud ;\ +(W) add (1) dst.5<1>:ud dst.5<0;1,0>:ud x:ud ;\ +(W) add (1) dst.6<1>:ud r0_tgidy y ;\ +(W) mov (1) dst.7<1>:ud (width - 1):ud ;\ + +#if GEN_VER < 2000 +#define load_shared_space_addr(dst, y, width) load_shared_media_block_msg_hdr(dst, y, width) +#define load_thread_space_addr(dst, x, y, width) load_thread_media_block_msg_hdr(dst, x, y, width) +#define load_space_dw(dst, src) send.dc1 (1) dst src src1_null 0x0 0x2190000 +#define store_space_dw(dst, src) send.dc1 (1) null dst null 0x0 0x40A8000 +#else +#define load_shared_space_addr(dst, y, width) load_shared_a2dblock_payload(dst, y, width) +#define load_thread_space_addr(dst, x, y, width) load_thread_a2dblock_payload(dst, x, y, width) +#define load_space_dw(dst, src) send.tgm (1) dst src null:0 0x0 0x62100003 +#define store_space_dw(dst, src) send.tgm (1) null dst null:0 0x0 0x64000007 +#endif + #endif -- 2.34.1 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH 2/2] lib/gpgpu_shader: simplify load/store shaders 2024-11-14 10:31 ` [PATCH 2/2] lib/gpgpu_shader: simplify load/store shaders Andrzej Hajda @ 2024-11-14 11:28 ` Zbigniew Kempczyński 2024-11-14 16:11 ` Hajda, Andrzej 2024-11-14 14:05 ` Grzegorzek, Dominik 1 sibling, 1 reply; 14+ messages in thread From: Zbigniew Kempczyński @ 2024-11-14 11:28 UTC (permalink / raw) To: Andrzej Hajda Cc: igt-dev, Dominik Grzegorzek, Gwan-gyeong Mun, Kamil Konieczny On Thu, Nov 14, 2024 at 11:31:39AM +0100, Andrzej Hajda wrote: > There is lot of redundancy in shaders code regarding load/store messages. > It makes the code barely readable. Simplify it by using macros in iga64 > assembler. > Every load/store operation is split into two phases: > 1. Load address/descriptor (from) where data should be stored/loaded. > 2. Issue load/store instruction. > Shader threads needs two types of memory access: > 3. Private area per thread. > 4. Area shared per all threads. > Different platforms access surface in different ways: > 5. Using media block messages. > 6. Using untyped 2d block messages. > 7. Future platforms will use different messages. > > All this is simplified to two macros per message in shader: > load_(shared|thread)_space_addr(dst,y,width) > (load|store)_space_dw(dst, src) > > Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com> > --- > lib/gpgpu_shader.c | 160 +++------------------ > lib/iga64_generated_codes.c | 338 ++++++++++++++++++++++---------------------- > lib/iga64_macros.h | 43 ++++++ > 3 files changed, 230 insertions(+), 311 deletions(-) > > diff --git a/lib/gpgpu_shader.c b/lib/gpgpu_shader.c > index 4e1b8d5e9009..7728f96bf305 100644 > --- a/lib/gpgpu_shader.c > +++ b/lib/gpgpu_shader.c > @@ -431,22 +431,8 @@ void gpgpu_shader__jump_neq(struct gpgpu_shader *shdr, int label_id, > > size = emit_iga64_code(shdr, jump_dw_neq, " \n\ > L0: \n\ > -(W) mov (16|M0) r30.0<1>:ud 0x0:ud \n\ > -#if GEN_VER < 2000 // Media Block Write \n\ This comment seems is incorrect, > - // Y offset of the block in rows := thread group id Y \n\ > -(W) mov (1|M0) r30.1<1>:ud ARG(0):ud \n\ > - // block width [0,63] representing 1 to 64 bytes, we want dword \n\ > -(W) mov (1|M0) r30.2<1>:ud 0x3:ud \n\ > - // FFTID := FFTID from R0 header \n\ > -(W) mov (1|M0) r30.4<1>:ud r0.5<0;1,0>:ud \n\ > -(W) send.dc1 (16|M0) r31 r30 null 0x0 0x2190000 \n\ > -#else // Typed 2D Block Store \n\ this as well... > - // Store X and Y block start (160:191 and 192:223) \n\ > -(W) mov (1|M0) r30.6<1>:ud ARG(0):ud \n\ > - // Store X and Y block size (224:231 and 232:239) \n\ > -(W) mov (1|M0) r30.7<1>:ud 0x3:ud \n\ > -(W) send.tgm (16|M0) r31 r30 null:0 0x0 0x62100003 \n\ > -#endif \n\ > + load_shared_space_addr(r30, ARG(0):ud, 4) \n\ Shouldn't above be named set_shared_space_addr()? Load is ambiguous for me in this context. > +(W) load_space_dw(r31, r30) \n\ Ok, we're loading dw, not store (wrong comment was removed, great). > // clear the flag register \n\ > (W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ > (W) cmp (1|M0) (ne)f0.0 null<1>:ud r31.0<0;1,0>:ud ARG(1):ud \n\ > @@ -511,28 +497,13 @@ void gpgpu_shader__common_target_write(struct gpgpu_shader *shdr, > uint32_t y_offset, const uint32_t value[4]) > { > emit_iga64_code(shdr, common_target_write, " \n\ > -(W) mov (16|M0) r30.0<1>:ud 0x0:ud \n\ > (W) mov (16|M0) r31.0<1>:ud 0x0:ud \n\ > (W) mov (1|M0) r31.0<1>:ud ARG(1):ud \n\ > (W) mov (1|M0) r31.1<1>:ud ARG(2):ud \n\ > (W) mov (1|M0) r31.2<1>:ud ARG(3):ud \n\ > (W) mov (1|M0) r31.3<1>:ud ARG(4):ud \n\ > -#if GEN_VER < 2000 // Media Block Write \n\ > - // Y offset of the block in rows \n\ > -(W) mov (1|M0) r30.1<1>:ud ARG(0):ud \n\ > - // block width [0,63] representing 1 to 64 bytes \n\ > -(W) mov (1|M0) r30.2<1>:ud 0xf:ud \n\ > - // FFTID := FFTID from R0 header \n\ > -(W) mov (1|M0) r30.4<1>:ud r0.5<0;1,0>:ud \n\ > - // written value \n\ > -(W) send.dc1 (16|M0) null r30 src1_null 0x0 0x40A8000 \n\ > -#else // Typed 2D Block Store \n\ > - // Store X and Y block start (160:191 and 192:223) \n\ > -(W) mov (1|M0) r30.6<1>:ud ARG(0):ud \n\ > - // Store X and Y block size (224:231 and 232:239) \n\ > -(W) mov (1|M0) r30.7<1>:ud 0xf:ud \n\ > -(W) send.tgm (16|M0) null r30 null:0 0x0 0x64000007 \n\ > -#endif \n\ > + load_shared_space_addr(r30, ARG(0):ud, 16) \n\ > +(W) store_space_dw(r30, r31) \n\ > ", y_offset, value[0], value[1], value[2], value[3]); > } > > @@ -565,31 +536,8 @@ void gpgpu_shader__write_aip(struct gpgpu_shader *shdr, uint32_t y_offset) > emit_iga64_code(shdr, media_block_write_aip, " \n\ > // Payload \n\ > (W) mov (1|M0) r5.0<1>:ud cr0.2:ud \n\ > -#if GEN_VER < 2000 // Media Block Write \n\ > - // X offset of the block in bytes := (thread group id X << ARG(0)) \n\ > -(W) shl (1|M0) r4.0<1>:ud r0.1<0;1,0>:ud 0x2:ud \n\ > - // Y offset of the block in rows := thread group id Y \n\ > -(W) mov (1|M0) r4.1<1>:ud r0.6<0;1,0>:ud \n\ > -(W) add (1|M0) r4.1<1>:ud r4.1<0;1,0>:ud ARG(0):ud \n\ > - // block width [0,63] representing 1 to 64 bytes \n\ > -(W) mov (1|M0) r4.2<1>:ud 0x3:ud \n\ > - // FFTID := FFTID from R0 header \n\ > -(W) mov (1|M0) r4.4<1>:ud r0.5<0;1,0>:ud \n\ > -(W) send.dc1 (16|M0) null r4 src1_null 0 0x40A8000 \n\ > -#else // Typed 2D Block Store \n\ > - // Load r2.0-3 with tg id X << ARG(0) \n\ > -(W) shl (1|M0) r2.0<1>:ud r0.1<0;1,0>:ud 0x2:ud \n\ > - // Load r2.4-7 with tg id Y + ARG(1):ud \n\ > -(W) mov (1|M0) r2.1<1>:ud r0.6<0;1,0>:ud \n\ > -(W) add (1|M0) r2.1<1>:ud r2.1<0;1,0>:ud ARG(0):ud \n\ > - // payload setup \n\ > -(W) mov (16|M0) r4.0<1>:ud 0x0:ud \n\ > - // Store X and Y block start (160:191 and 192:223) \n\ > -(W) mov (2|M0) r4.5<1>:ud r2.0<2;2,1>:ud \n\ > - // Store X and Y block max_size (224:231 and 232:239) \n\ > -(W) mov (1|M0) r4.7<1>:ud 0x3:ud \n\ > -(W) send.tgm (16|M0) null r4 null:0 0 0x64000007 \n\ > -#endif \n\ > + load_thread_space_addr(r4, 0, ARG(0):ud, 4) \n\ > +(W) store_space_dw(r4, r5) \n\ > ", y_offset); > } > > @@ -618,38 +566,11 @@ void gpgpu_shader__increase_aip(struct gpgpu_shader *shdr, uint32_t value) > void gpgpu_shader__write_dword(struct gpgpu_shader *shdr, uint32_t value, > uint32_t y_offset) > { > - emit_iga64_code(shdr, media_block_write, " \n\ > - // Clear message header \n\ > -(W) mov (16|M0) r4.0<1>:ud 0x0:ud \n\ > - // Payload \n\ > -(W) mov (1|M0) r5.0<1>:ud ARG(3):ud \n\ > -(W) mov (1|M0) r5.1<1>:ud ARG(4):ud \n\ > -(W) mov (1|M0) r5.2<1>:ud ARG(5):ud \n\ > -(W) mov (1|M0) r5.3<1>:ud ARG(6):ud \n\ > -#if GEN_VER < 2000 // Media Block Write \n\ > - // X offset of the block in bytes := (thread group id X << ARG(0)) \n\ > -(W) shl (1|M0) r4.0<1>:ud r0.1<0;1,0>:ud ARG(0):ud \n\ > - // Y offset of the block in rows := thread group id Y \n\ > -(W) mov (1|M0) r4.1<1>:ud r0.6<0;1,0>:ud \n\ > -(W) add (1|M0) r4.1<1>:ud r4.1<0;1,0>:ud ARG(1):ud \n\ > - // block width [0,63] representing 1 to 64 bytes \n\ > -(W) mov (1|M0) r4.2<1>:ud ARG(2):ud \n\ > - // FFTID := FFTID from R0 header \n\ > -(W) mov (1|M0) r4.4<1>:ud r0.5<0;1,0>:ud \n\ > -(W) send.dc1 (16|M0) null r4 src1_null 0 0x40A8000 \n\ > -#else // Typed 2D Block Store \n\ > - // Load r2.0-3 with tg id X << ARG(0) \n\ > -(W) shl (1|M0) r2.0<1>:ud r0.1<0;1,0>:ud ARG(0):ud \n\ > - // Load r2.4-7 with tg id Y + ARG(1):ud \n\ > -(W) mov (1|M0) r2.1<1>:ud r0.6<0;1,0>:ud \n\ > -(W) add (1|M0) r2.1<1>:ud r2.1<0;1,0>:ud ARG(1):ud \n\ > - // Store X and Y block start (160:191 and 192:223) \n\ > -(W) mov (2|M0) r4.5<1>:ud r2.0<2;2,1>:ud \n\ > - // Store X and Y block max_size (224:231 and 232:239) \n\ > -(W) mov (1|M0) r4.7<1>:ud ARG(2):ud \n\ > -(W) send.tgm (16|M0) null r4 null:0 0 0x64000007 \n\ > -#endif \n\ > - ", 2, y_offset, 3, value, value, value, value); > + emit_iga64_code(shdr, media_block_write, " \n\ > +(W) mov (1) r5.0<1>:ud ARG(1):ud \n\ > + load_thread_space_addr(r4, 0, ARG(0):ud, 4) \n\ > +(W) store_space_dw(r4, r5) \n\ > + ", y_offset, value); > } > > /** > @@ -697,41 +618,14 @@ void gpgpu_shader__write_on_exception(struct gpgpu_shader *shdr, uint32_t value, > uint32_t y_offset, uint32_t mask, uint32_t expected) > { > emit_iga64_code(shdr, write_on_exception, " \n\ > - // Clear message header \n\ > -(W) mov (16|M0) r4.0<1>:ud 0x0:ud \n\ > - // Payload \n\ > -(W) mov (1|M0) r5.0<1>:ud ARG(4):ud \n\ > -#if GEN_VER < 2000 // prepare Media Block Write \n\ > - // X offset of the block in bytes := (thread group id X << ARG(0)) \n\ > -(W) add (1|M0) r4.0<1>:ud r0.1<0;1,0>:ud ARG(1):ud \n\ > -(W) shl (1|M0) r4.0<1>:ud r4.0<0;1,0>:ud ARG(0):ud \n\ > - // Y offset of the block in rows := thread group id Y \n\ > -(W) add (1|M0) r4.1<1>:ud r0.6<0;1,0>:ud ARG(2):ud \n\ > - // block width [0,63] representing 1 to 64 bytes \n\ > -(W) mov (1|M0) r4.2<1>:ud ARG(3):ud \n\ > - // FFTID := FFTID from R0 header \n\ > -(W) mov (1|M0) r4.4<1>:ud r0.5<0;1,0>:ud \n\ > -#else // prepare Typed 2D Block Store \n\ > - // Load r2.0 with tg id (X + ARG(1)) << ARG(0) \n\ > -(W) add (1|M0) r2.0<1>:ud r0.1<0;1,0>:ud ARG(1):ud \n\ > -(W) shl (1|M0) r2.0<1>:ud r2.0<0;1,0>:ud ARG(0):ud \n\ > - // Load r2.4-7 with tg id Y + ARG(2):ud \n\ > -(W) add (1|M0) r2.1<1>:ud r0.6<0;1,0>:ud ARG(2):ud \n\ > - // Store X and Y block start (160:191 and 192:223) \n\ > -(W) mov (2|M0) r4.5<1>:ud r2.0<2;2,1>:ud \n\ > - // Store X and Y block max_size (224:231 and 232:239) \n\ > -(W) mov (1|M0) r4.7<1>:ud ARG(3):ud \n\ > -#endif \n\ > +(W) mov (1|M0) r5.0<1>:ud ARG(2):ud \n\ > + load_thread_space_addr(r4, ARG(0), ARG(1):ud, 4) \n\ > // Check if masked exception is equal to provided value and write conditionally \n\ > -(W) and (1|M0) r3.0<1>:ud cr0.1<0;1,0>:ud ARG(5):ud \n\ > -(W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ > -(W) cmp (1|M0) (eq)f0.0 null:ud r3.0<0;1,0>:ud ARG(6):ud \n\ > -#if GEN_VER < 2000 // Media Block Write \n\ > -(W&f0.0) send.dc1 (16|M0) null r4 src1_null 0 0x40A8000 \n\ > -#else // Typed 2D Block Store \n\ > -(W&f0.0) send.tgm (16|M0) null r4 null:0 0 0x64000007 \n\ > -#endif \n\ > - ", 2, x_offset, y_offset, 3, value, mask, expected); > +(W) and (1|M0) r3.0<1>:ud cr0.1<0;1,0>:ud ARG(3):ud \n\ > +(W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ > +(W) cmp (1|M0) (eq)f0.0 null:ud r3.0<0;1,0>:ud ARG(4):ud \n\ > +(W&f0.0) store_space_dw(r4, r5) \n\ > + ", 4 * x_offset, y_offset, value, mask, expected); > } > > /** > @@ -778,22 +672,8 @@ void gpgpu_shader__end_system_routine_step_if_eq(struct gpgpu_shader *shdr, > emit_iga64_code(shdr, end_system_routine_step_if_eq, " \n\ > (W) or (1|M0) cr0.0<1>:ud cr0.0<0;1,0>:ud 0x8000:ud \n\ > (W) and (1|M0) cr0.1<1>:ud cr0.1<0;1,0>:ud ARG(0):ud \n\ > -(W) mov (16|M0) r30.0<1>:ud 0x0:ud \n\ > -#if GEN_VER < 2000 // Media Block Write \n\ > - // Y offset of the block in rows := thread group id Y \n\ > -(W) mov (1|M0) r30.1<1>:ud ARG(1):ud \n\ > - // block width [0,63] representing 1 to 64 bytes, we want dword \n\ > -(W) mov (1|M0) r30.2<1>:ud 0x3:ud \n\ > - // FFTID := FFTID from R0 header \n\ > -(W) mov (1|M0) r30.4<1>:ud r0.5<0;1,0>:ud \n\ > -(W) send.dc1 (16|M0) r31 r30 null 0x0 0x2190000 \n\ > -#else // Typed 2D Block Store \n\ > - // Store X and Y block start (160:191 and 192:223) \n\ > -(W) mov (1|M0) r30.6<1>:ud ARG(1):ud \n\ > - // Store X and Y block size (224:231 and 232:239) \n\ > -(W) mov (1|M0) r30.7<1>:ud 0x3:ud \n\ > -(W) send.tgm (16|M0) r31 r30 null:0 0x0 0x62100003 \n\ > -#endif \n\ > + load_thread_space_addr(r30, 0, ARG(0):ud, 4) \n\ Shouldn't this be load_shared_space_addr()? -- Zbigniew > +(W) load_space_dw(r31, r30) \n\ > // clear the flag register \n\ > (W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ > (W) cmp (1|M0) (ne)f0.0 null<1>:ud r31.0<0;1,0>:ud ARG(2):ud \n\ > diff --git a/lib/iga64_generated_codes.c b/lib/iga64_generated_codes.c > index 0bd92b8c4dc9..017adefce400 100644 > --- a/lib/iga64_generated_codes.c > +++ b/lib/iga64_generated_codes.c > @@ -3,7 +3,7 @@ > > #include "gpgpu_shader.h" > > -#define MD5_SUM_IGA64_ASMS e2d97ef45d5f322200793a0aa76872d7 > +#define MD5_SUM_IGA64_ASMS fa1b0aa75c3ee1cd13300ad1324737b4 > > struct iga64_template const iga64_code_gpgpu_fill[] = { > { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { > @@ -80,71 +80,81 @@ struct iga64_template const iga64_code_gpgpu_fill[] = { > }; > > struct iga64_template const iga64_code_end_system_routine_step_if_eq[] = { > - { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { > + { .gen_ver = 2000, .size = 52, .code = (const uint32_t []) { > 0x80000966, 0x80018220, 0x02008000, 0x00008000, > 0x80000965, 0x80118220, 0x02008010, 0xc0ded000, > - 0x80100961, 0x1e054220, 0x00000000, 0x00000000, > - 0x80000061, 0x1e654220, 0x00000000, 0xc0ded001, > + 0x800c0961, 0x1e054220, 0x00000000, 0x00000000, > + 0x80000069, 0x1e558220, 0x02000014, 0x00000002, > + 0x80001940, 0x1e558220, 0x02001e54, 0x00000000, > + 0x80000040, 0x1e658220, 0x02000064, 0xc0ded000, > 0x80000061, 0x1e754220, 0x00000000, 0x00000003, > - 0x80132031, 0x1f0c0000, 0xd0061e8c, 0x04000000, > + 0x80032031, 0x1f0c0000, 0xd0061e8c, 0x04000000, > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > 0x80008070, 0x00018220, 0x22001f04, 0xc0ded002, > 0x84000965, 0x80118220, 0x02008010, 0xc0ded003, > 0x80000965, 0x80018220, 0x02008000, 0x7ffffffd, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > - { .gen_ver = 1270, .size = 52, .code = (const uint32_t []) { > + { .gen_ver = 1270, .size = 60, .code = (const uint32_t []) { > 0x80000966, 0x80018220, 0x02008000, 0x00008000, > 0x80000965, 0x80218220, 0x02008020, 0xc0ded000, > - 0x80040961, 0x1e054220, 0x00000000, 0x00000000, > - 0x80000061, 0x1e254220, 0x00000000, 0xc0ded001, > + 0x80030961, 0x1e054220, 0x00000000, 0x00000000, > + 0x80000069, 0x1e058220, 0x02000024, 0x00000002, > + 0x80001940, 0x1e058220, 0x02001e04, 0x00000000, > + 0x80000040, 0x1e258220, 0x020000c4, 0xc0ded000, > 0x80000061, 0x1e454220, 0x00000000, 0x00000003, > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > 0x80002070, 0x00018220, 0x22001f04, 0xc0ded002, > 0x81000965, 0x80218220, 0x02008020, 0xc0ded003, > 0x80000965, 0x80018220, 0x02008000, 0x7ffffffd, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > - { .gen_ver = 1260, .size = 48, .code = (const uint32_t []) { > + { .gen_ver = 1260, .size = 56, .code = (const uint32_t []) { > 0x80000966, 0x80018220, 0x02008000, 0x00008000, > 0x80000965, 0x80118220, 0x02008010, 0xc0ded000, > - 0x80100961, 0x1e054220, 0x00000000, 0x00000000, > - 0x80000061, 0x1e154220, 0x00000000, 0xc0ded001, > + 0x800c0961, 0x1e054220, 0x00000000, 0x00000000, > + 0x80000069, 0x1e058220, 0x02000014, 0x00000002, > + 0x80001940, 0x1e058220, 0x02001e04, 0x00000000, > + 0x80000040, 0x1e158220, 0x02000064, 0xc0ded000, > 0x80000061, 0x1e254220, 0x00000000, 0x00000003, > 0x80000061, 0x1e450220, 0x00000054, 0x00000000, > - 0x80132031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > + 0x80032031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > 0x80008070, 0x00018220, 0x22001f04, 0xc0ded002, > 0x84000965, 0x80118220, 0x02008010, 0xc0ded003, > 0x80000965, 0x80018220, 0x02008000, 0x7ffffffd, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > - { .gen_ver = 1250, .size = 52, .code = (const uint32_t []) { > + { .gen_ver = 1250, .size = 60, .code = (const uint32_t []) { > 0x80000966, 0x80018220, 0x02008000, 0x00008000, > 0x80000965, 0x80218220, 0x02008020, 0xc0ded000, > - 0x80040961, 0x1e054220, 0x00000000, 0x00000000, > - 0x80000061, 0x1e254220, 0x00000000, 0xc0ded001, > + 0x80030961, 0x1e054220, 0x00000000, 0x00000000, > + 0x80000069, 0x1e058220, 0x02000024, 0x00000002, > + 0x80001940, 0x1e058220, 0x02001e04, 0x00000000, > + 0x80000040, 0x1e258220, 0x020000c4, 0xc0ded000, > 0x80000061, 0x1e454220, 0x00000000, 0x00000003, > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > 0x80002070, 0x00018220, 0x22001f04, 0xc0ded002, > 0x81000965, 0x80218220, 0x02008020, 0xc0ded003, > 0x80000965, 0x80018220, 0x02008000, 0x7ffffffd, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > - { .gen_ver = 0, .size = 48, .code = (const uint32_t []) { > + { .gen_ver = 0, .size = 56, .code = (const uint32_t []) { > 0x80000166, 0x80018220, 0x02008000, 0x00008000, > 0x80000165, 0x80218220, 0x02008020, 0xc0ded000, > - 0x80040161, 0x1e054220, 0x00000000, 0x00000000, > - 0x80000061, 0x1e254220, 0x00000000, 0xc0ded001, > + 0x80030161, 0x1e054220, 0x00000000, 0x00000000, > + 0x80000069, 0x1e058220, 0x02000024, 0x00000002, > + 0x80000140, 0x1e058220, 0x02001e04, 0x00000000, > + 0x80000040, 0x1e258220, 0x020000c4, 0xc0ded000, > 0x80000061, 0x1e454220, 0x00000000, 0x00000003, > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > - 0x80049031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > + 0x80009031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > 0x80002070, 0x00018220, 0x22001f04, 0xc0ded002, > 0x81000165, 0x80218220, 0x02008020, 0xc0ded003, > @@ -193,84 +203,83 @@ struct iga64_template const iga64_code_breakpoint_suppress[] = { > }; > > struct iga64_template const iga64_code_write_on_exception[] = { > - { .gen_ver = 2000, .size = 56, .code = (const uint32_t []) { > - 0x80100061, 0x04054220, 0x00000000, 0x00000000, > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, > - 0x80000040, 0x02058220, 0x02000014, 0xc0ded001, > - 0x80001969, 0x02058220, 0x02000204, 0xc0ded000, > - 0x80000040, 0x02158220, 0x02000064, 0xc0ded002, > - 0x80041961, 0x04550220, 0x00220205, 0x00000000, > - 0x80000061, 0x04754220, 0x00000000, 0xc0ded003, > - 0x80000965, 0x03058220, 0x02008010, 0xc0ded005, > + { .gen_ver = 2000, .size = 52, .code = (const uint32_t []) { > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, > + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04558220, 0x02000014, 0x00000002, > + 0x80001940, 0x04558220, 0x02000454, 0xc0ded000, > + 0x80000040, 0x04658220, 0x02000064, 0xc0ded001, > + 0x80000061, 0x04754220, 0x00000000, 0x00000003, > + 0x80000965, 0x03058220, 0x02008010, 0xc0ded003, > 0x80000961, 0x30014220, 0x00000000, 0x00000000, > - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, > - 0x84132031, 0x00000000, 0xd00e0494, 0x04000000, > + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, > + 0x84032031, 0x00000000, 0xd00e0494, 0x04000000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 1270, .size = 60, .code = (const uint32_t []) { > - 0x80040061, 0x04054220, 0x00000000, 0x00000000, > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, > - 0x80000040, 0x04058220, 0x02000024, 0xc0ded001, > - 0x80001969, 0x04058220, 0x02000404, 0xc0ded000, > - 0x80000040, 0x04258220, 0x020000c4, 0xc0ded002, > - 0x80000061, 0x04454220, 0x00000000, 0xc0ded003, > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, > + 0x80030061, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > + 0x80001940, 0x04058220, 0x02000404, 0xc0ded000, > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded001, > + 0x80000061, 0x04454220, 0x00000000, 0x00000003, > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > - 0x80000965, 0x03058220, 0x02008020, 0xc0ded005, > + 0x80000965, 0x03058220, 0x02008020, 0xc0ded003, > 0x80000961, 0x30014220, 0x00000000, 0x00000000, > - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, > + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x81044031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x81004031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 1260, .size = 56, .code = (const uint32_t []) { > - 0x80100061, 0x04054220, 0x00000000, 0x00000000, > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, > - 0x80000040, 0x04058220, 0x02000014, 0xc0ded001, > - 0x80001969, 0x04058220, 0x02000404, 0xc0ded000, > - 0x80000040, 0x04158220, 0x02000064, 0xc0ded002, > - 0x80000061, 0x04254220, 0x00000000, 0xc0ded003, > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, > + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000014, 0x00000002, > + 0x80001940, 0x04058220, 0x02000404, 0xc0ded000, > + 0x80000040, 0x04158220, 0x02000064, 0xc0ded001, > + 0x80000061, 0x04254220, 0x00000000, 0x00000003, > 0x80000061, 0x04450220, 0x00000054, 0x00000000, > - 0x80000965, 0x03058220, 0x02008010, 0xc0ded005, > + 0x80000965, 0x03058220, 0x02008010, 0xc0ded003, > 0x80000961, 0x30014220, 0x00000000, 0x00000000, > - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, > - 0x84132031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, > + 0x84032031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 1250, .size = 60, .code = (const uint32_t []) { > - 0x80040061, 0x04054220, 0x00000000, 0x00000000, > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, > - 0x80000040, 0x04058220, 0x02000024, 0xc0ded001, > - 0x80001969, 0x04058220, 0x02000404, 0xc0ded000, > - 0x80000040, 0x04258220, 0x020000c4, 0xc0ded002, > - 0x80000061, 0x04454220, 0x00000000, 0xc0ded003, > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, > + 0x80030061, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > + 0x80001940, 0x04058220, 0x02000404, 0xc0ded000, > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded001, > + 0x80000061, 0x04454220, 0x00000000, 0x00000003, > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > - 0x80000965, 0x03058220, 0x02008020, 0xc0ded005, > + 0x80000965, 0x03058220, 0x02008020, 0xc0ded003, > 0x80000961, 0x30014220, 0x00000000, 0x00000000, > - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, > + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x81044031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x81004031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 0, .size = 56, .code = (const uint32_t []) { > - 0x80040061, 0x04054220, 0x00000000, 0x00000000, > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, > - 0x80000040, 0x04058220, 0x02000024, 0xc0ded001, > - 0x80000169, 0x04058220, 0x02000404, 0xc0ded000, > - 0x80000040, 0x04258220, 0x020000c4, 0xc0ded002, > - 0x80000061, 0x04454220, 0x00000000, 0xc0ded003, > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, > + 0x80030061, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > + 0x80000140, 0x04058220, 0x02000404, 0xc0ded000, > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded001, > + 0x80000061, 0x04454220, 0x00000000, 0x00000003, > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > - 0x80000165, 0x03058220, 0x02008020, 0xc0ded005, > + 0x80000165, 0x03058220, 0x02008020, 0xc0ded003, > 0x80000161, 0x30014220, 0x00000000, 0x00000000, > - 0x80000270, 0x00018220, 0x12000304, 0xc0ded006, > - 0x81049031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x80000270, 0x00018220, 0x12000304, 0xc0ded004, > + 0x81009031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000101, 0x00010000, 0x00000000, 0x00000000, > @@ -324,84 +333,68 @@ struct iga64_template const iga64_code_clear_exception[] = { > }; > > struct iga64_template const iga64_code_media_block_write[] = { > - { .gen_ver = 2000, .size = 56, .code = (const uint32_t []) { > - 0x80100061, 0x04054220, 0x00000000, 0x00000000, > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, > - 0x80000061, 0x05154220, 0x00000000, 0xc0ded004, > - 0x80000061, 0x05254220, 0x00000000, 0xc0ded005, > - 0x80000061, 0x05354220, 0x00000000, 0xc0ded006, > - 0x80000069, 0x02058220, 0x02000014, 0xc0ded000, > - 0x80000061, 0x02150220, 0x00000064, 0x00000000, > - 0x80001940, 0x02158220, 0x02000214, 0xc0ded001, > - 0x80041961, 0x04550220, 0x00220205, 0x00000000, > - 0x80000061, 0x04754220, 0x00000000, 0xc0ded002, > - 0x80132031, 0x00000000, 0xd00e0494, 0x04000000, > + { .gen_ver = 2000, .size = 40, .code = (const uint32_t []) { > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, > + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04558220, 0x02000014, 0x00000002, > + 0x80001940, 0x04558220, 0x02000454, 0x00000000, > + 0x80000040, 0x04658220, 0x02000064, 0xc0ded000, > + 0x80000061, 0x04754220, 0x00000000, 0x00000003, > + 0x80032031, 0x00000000, 0xd00e0494, 0x04000000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > - { .gen_ver = 1270, .size = 60, .code = (const uint32_t []) { > - 0x80040061, 0x04054220, 0x00000000, 0x00000000, > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, > - 0x80000061, 0x05254220, 0x00000000, 0xc0ded004, > - 0x80000061, 0x05454220, 0x00000000, 0xc0ded005, > - 0x80000061, 0x05654220, 0x00000000, 0xc0ded006, > - 0x80000069, 0x04058220, 0x02000024, 0xc0ded000, > - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, > - 0x80001940, 0x04258220, 0x02000424, 0xc0ded001, > - 0x80000061, 0x04454220, 0x00000000, 0xc0ded002, > + { .gen_ver = 1270, .size = 48, .code = (const uint32_t []) { > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, > + 0x80030061, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > + 0x80001940, 0x04058220, 0x02000404, 0x00000000, > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, > + 0x80000061, 0x04454220, 0x00000000, 0x00000003, > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > - { .gen_ver = 1260, .size = 56, .code = (const uint32_t []) { > - 0x80100061, 0x04054220, 0x00000000, 0x00000000, > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, > - 0x80000061, 0x05154220, 0x00000000, 0xc0ded004, > - 0x80000061, 0x05254220, 0x00000000, 0xc0ded005, > - 0x80000061, 0x05354220, 0x00000000, 0xc0ded006, > - 0x80000069, 0x04058220, 0x02000014, 0xc0ded000, > - 0x80000061, 0x04150220, 0x00000064, 0x00000000, > - 0x80001940, 0x04158220, 0x02000414, 0xc0ded001, > - 0x80000061, 0x04254220, 0x00000000, 0xc0ded002, > + { .gen_ver = 1260, .size = 44, .code = (const uint32_t []) { > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, > + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000014, 0x00000002, > + 0x80001940, 0x04058220, 0x02000404, 0x00000000, > + 0x80000040, 0x04158220, 0x02000064, 0xc0ded000, > + 0x80000061, 0x04254220, 0x00000000, 0x00000003, > 0x80000061, 0x04450220, 0x00000054, 0x00000000, > - 0x80132031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x80032031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > - { .gen_ver = 1250, .size = 60, .code = (const uint32_t []) { > - 0x80040061, 0x04054220, 0x00000000, 0x00000000, > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, > - 0x80000061, 0x05254220, 0x00000000, 0xc0ded004, > - 0x80000061, 0x05454220, 0x00000000, 0xc0ded005, > - 0x80000061, 0x05654220, 0x00000000, 0xc0ded006, > - 0x80000069, 0x04058220, 0x02000024, 0xc0ded000, > - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, > - 0x80001940, 0x04258220, 0x02000424, 0xc0ded001, > - 0x80000061, 0x04454220, 0x00000000, 0xc0ded002, > + { .gen_ver = 1250, .size = 48, .code = (const uint32_t []) { > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, > + 0x80030061, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > + 0x80001940, 0x04058220, 0x02000404, 0x00000000, > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, > + 0x80000061, 0x04454220, 0x00000000, 0x00000003, > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > - { .gen_ver = 0, .size = 56, .code = (const uint32_t []) { > - 0x80040061, 0x04054220, 0x00000000, 0x00000000, > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, > - 0x80000061, 0x05254220, 0x00000000, 0xc0ded004, > - 0x80000061, 0x05454220, 0x00000000, 0xc0ded005, > - 0x80000061, 0x05654220, 0x00000000, 0xc0ded006, > - 0x80000069, 0x04058220, 0x02000024, 0xc0ded000, > - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, > - 0x80000140, 0x04258220, 0x02000424, 0xc0ded001, > - 0x80000061, 0x04454220, 0x00000000, 0xc0ded002, > + { .gen_ver = 0, .size = 44, .code = (const uint32_t []) { > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, > + 0x80030061, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > + 0x80000140, 0x04058220, 0x02000404, 0x00000000, > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, > + 0x80000061, 0x04454220, 0x00000000, 0x00000003, > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > - 0x80049031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x80009031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000101, 0x00010000, 0x00000000, 0x00000000, > @@ -432,65 +425,68 @@ struct iga64_template const iga64_code_write_aip[] = { > }; > > struct iga64_template const iga64_code_media_block_write_aip[] = { > - { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { > + { .gen_ver = 2000, .size = 40, .code = (const uint32_t []) { > 0x80000961, 0x05050220, 0x00008020, 0x00000000, > - 0x80000969, 0x02058220, 0x02000014, 0x00000002, > - 0x80000061, 0x02150220, 0x00000064, 0x00000000, > - 0x80001940, 0x02158220, 0x02000214, 0xc0ded000, > - 0x80100061, 0x04054220, 0x00000000, 0x00000000, > - 0x80041a61, 0x04550220, 0x00220205, 0x00000000, > + 0x800c0961, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04558220, 0x02000014, 0x00000002, > + 0x80001940, 0x04558220, 0x02000454, 0x00000000, > + 0x80000040, 0x04658220, 0x02000064, 0xc0ded000, > 0x80000061, 0x04754220, 0x00000000, 0x00000003, > - 0x80132031, 0x00000000, 0xd00e0494, 0x04000000, > + 0x80032031, 0x00000000, 0xd00e0494, 0x04000000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > - { .gen_ver = 1270, .size = 44, .code = (const uint32_t []) { > + { .gen_ver = 1270, .size = 48, .code = (const uint32_t []) { > 0x80000961, 0x05050220, 0x00008040, 0x00000000, > - 0x80000969, 0x04058220, 0x02000024, 0x00000002, > - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, > - 0x80001940, 0x04258220, 0x02000424, 0xc0ded000, > + 0x80030961, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > + 0x80001940, 0x04058220, 0x02000404, 0x00000000, > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, > 0x80000061, 0x04454220, 0x00000000, 0x00000003, > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > - { .gen_ver = 1260, .size = 40, .code = (const uint32_t []) { > + { .gen_ver = 1260, .size = 44, .code = (const uint32_t []) { > 0x80000961, 0x05050220, 0x00008020, 0x00000000, > - 0x80000969, 0x04058220, 0x02000014, 0x00000002, > - 0x80000061, 0x04150220, 0x00000064, 0x00000000, > - 0x80001940, 0x04158220, 0x02000414, 0xc0ded000, > + 0x800c0961, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000014, 0x00000002, > + 0x80001940, 0x04058220, 0x02000404, 0x00000000, > + 0x80000040, 0x04158220, 0x02000064, 0xc0ded000, > 0x80000061, 0x04254220, 0x00000000, 0x00000003, > 0x80000061, 0x04450220, 0x00000054, 0x00000000, > - 0x80132031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x80032031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > - { .gen_ver = 1250, .size = 44, .code = (const uint32_t []) { > + { .gen_ver = 1250, .size = 48, .code = (const uint32_t []) { > 0x80000961, 0x05050220, 0x00008040, 0x00000000, > - 0x80000969, 0x04058220, 0x02000024, 0x00000002, > - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, > - 0x80001940, 0x04258220, 0x02000424, 0xc0ded000, > + 0x80030961, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > + 0x80001940, 0x04058220, 0x02000404, 0x00000000, > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, > 0x80000061, 0x04454220, 0x00000000, 0x00000003, > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > - { .gen_ver = 0, .size = 40, .code = (const uint32_t []) { > + { .gen_ver = 0, .size = 44, .code = (const uint32_t []) { > 0x80000161, 0x05050220, 0x00008040, 0x00000000, > - 0x80000169, 0x04058220, 0x02000024, 0x00000002, > - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, > - 0x80000140, 0x04258220, 0x02000424, 0xc0ded000, > + 0x80030161, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > + 0x80000140, 0x04058220, 0x02000404, 0x00000000, > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, > 0x80000061, 0x04454220, 0x00000000, 0x00000003, > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > - 0x80049031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x80009031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000101, 0x00010000, 0x00000000, 0x00000000, > @@ -499,77 +495,77 @@ struct iga64_template const iga64_code_media_block_write_aip[] = { > > struct iga64_template const iga64_code_common_target_write[] = { > { .gen_ver = 2000, .size = 48, .code = (const uint32_t []) { > - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, > 0x80100061, 0x1f054220, 0x00000000, 0x00000000, > 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, > 0x80000061, 0x1f154220, 0x00000000, 0xc0ded002, > 0x80000061, 0x1f254220, 0x00000000, 0xc0ded003, > 0x80000061, 0x1f354220, 0x00000000, 0xc0ded004, > + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, > 0x80000061, 0x1e654220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e754220, 0x00000000, 0x0000000f, > - 0x80132031, 0x00000000, 0xd00e1e94, 0x04000000, > + 0x80032031, 0x00000000, 0xd00e1e94, 0x04000000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 1270, .size = 56, .code = (const uint32_t []) { > - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, > 0x80040061, 0x1f054220, 0x00000000, 0x00000000, > 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, > 0x80000061, 0x1f254220, 0x00000000, 0xc0ded002, > 0x80000061, 0x1f454220, 0x00000000, 0xc0ded003, > 0x80000061, 0x1f654220, 0x00000000, 0xc0ded004, > + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, > 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e454220, 0x00000000, 0x0000000f, > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x80044031, 0x00000000, 0xc0001e14, 0x02a00000, > + 0x80004031, 0x00000000, 0xc0001e14, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 1260, .size = 52, .code = (const uint32_t []) { > - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, > 0x80100061, 0x1f054220, 0x00000000, 0x00000000, > 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, > 0x80000061, 0x1f154220, 0x00000000, 0xc0ded002, > 0x80000061, 0x1f254220, 0x00000000, 0xc0ded003, > 0x80000061, 0x1f354220, 0x00000000, 0xc0ded004, > + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, > 0x80000061, 0x1e154220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e254220, 0x00000000, 0x0000000f, > 0x80000061, 0x1e450220, 0x00000054, 0x00000000, > - 0x80132031, 0x00000000, 0xc0001e14, 0x02a00000, > + 0x80032031, 0x00000000, 0xc0001e14, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 1250, .size = 56, .code = (const uint32_t []) { > - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, > 0x80040061, 0x1f054220, 0x00000000, 0x00000000, > 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, > 0x80000061, 0x1f254220, 0x00000000, 0xc0ded002, > 0x80000061, 0x1f454220, 0x00000000, 0xc0ded003, > 0x80000061, 0x1f654220, 0x00000000, 0xc0ded004, > + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, > 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e454220, 0x00000000, 0x0000000f, > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x80044031, 0x00000000, 0xc0001e14, 0x02a00000, > + 0x80004031, 0x00000000, 0xc0001e14, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 0, .size = 52, .code = (const uint32_t []) { > - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, > 0x80040061, 0x1f054220, 0x00000000, 0x00000000, > 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, > 0x80000061, 0x1f254220, 0x00000000, 0xc0ded002, > 0x80000061, 0x1f454220, 0x00000000, 0xc0ded003, > 0x80000061, 0x1f654220, 0x00000000, 0xc0ded004, > + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, > 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e454220, 0x00000000, 0x0000000f, > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > - 0x80049031, 0x00000000, 0xc0001e14, 0x02a00000, > + 0x80009031, 0x00000000, 0xc0001e14, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000101, 0x00010000, 0x00000000, 0x00000000, > @@ -627,56 +623,56 @@ struct iga64_template const iga64_code_clear_r40[] = { > > struct iga64_template const iga64_code_jump_dw_neq[] = { > { .gen_ver = 2000, .size = 32, .code = (const uint32_t []) { > - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, > + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, > 0x80000061, 0x1e654220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e754220, 0x00000000, 0x00000003, > - 0x80132031, 0x1f0c0000, 0xd0061e8c, 0x04000000, > + 0x80032031, 0x1f0c0000, 0xd0061e8c, 0x04000000, > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > 0x80008070, 0x00018220, 0x22001f04, 0xc0ded001, > 0x84000020, 0x00004000, 0x00000000, 0xffffffa0, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 1270, .size = 40, .code = (const uint32_t []) { > - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, > + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, > 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e454220, 0x00000000, 0x00000003, > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > 0x80002070, 0x00018220, 0x22001f04, 0xc0ded001, > 0x81000020, 0x00004000, 0x00000000, 0xffffff80, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 1260, .size = 36, .code = (const uint32_t []) { > - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, > + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, > 0x80000061, 0x1e154220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e254220, 0x00000000, 0x00000003, > 0x80000061, 0x1e450220, 0x00000054, 0x00000000, > - 0x80132031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > + 0x80032031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > 0x80008070, 0x00018220, 0x22001f04, 0xc0ded001, > 0x84000020, 0x00004000, 0x00000000, 0xffffff90, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 1250, .size = 40, .code = (const uint32_t []) { > - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, > + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, > 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e454220, 0x00000000, 0x00000003, > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > 0x80002070, 0x00018220, 0x22001f04, 0xc0ded001, > 0x81000020, 0x00004000, 0x00000000, 0xffffff80, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 0, .size = 36, .code = (const uint32_t []) { > - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, > + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, > 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e454220, 0x00000000, 0x00000003, > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > - 0x80049031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > + 0x80009031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > 0x80002070, 0x00018220, 0x22001f04, 0xc0ded001, > 0x81000120, 0x00004000, 0x00000000, 0xffffff90, > diff --git a/lib/iga64_macros.h b/lib/iga64_macros.h > index 03cc726d48c2..0fd5e268d957 100644 > --- a/lib/iga64_macros.h > +++ b/lib/iga64_macros.h > @@ -13,4 +13,47 @@ > #define src1_null null:0 > #endif > > +/* GPGPU_R0Payload fields, Bspec: 55396, 56587 */ > +#define r0_tgidx r0.1<0;1,0>:ud > +#define r0_tgidy r0.6<0;1,0>:ud > +#define r0_fftid r0.5<0;1,0>:ud > + > +#define load_shared_media_block_msg_hdr(dst, y, width) \ > +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ > +(W) mov (1) dst.1<1>:ud y ;\ > +(W) mov (1) dst.2<1>:ud (width - 1):ud ;\ > +(W) mov (1) dst.4<1>:ud r0_fftid > + > +#define load_thread_media_block_msg_hdr(dst, x, y, width) \ > +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ > +(W) shl (1) dst.0<1>:ud r0_tgidx 0x2:ud ;\ > +(W) add (1) dst.0<1>:ud dst.0<0;1,0>:ud x:ud ;\ > +(W) add (1) dst.1<1>:ud r0_tgidy y ;\ > +(W) mov (1) dst.2<1>:ud (width - 1):ud ;\ > +(W) mov (1) dst.4<1>:ud r0_fftid > + > +#define load_shared_a2dblock_payload(dst, y, width) \ > +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ > +(W) mov (1) dst.6<1>:ud y ;\ > +(W) mov (1) dst.7<1>:ud (width - 1):ud > + > +#define load_thread_a2dblock_payload(dst, x, y, width) \ > +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ > +(W) shl (1) dst.5<1>:ud r0_tgidx 0x2:ud ;\ > +(W) add (1) dst.5<1>:ud dst.5<0;1,0>:ud x:ud ;\ > +(W) add (1) dst.6<1>:ud r0_tgidy y ;\ > +(W) mov (1) dst.7<1>:ud (width - 1):ud ;\ > + > +#if GEN_VER < 2000 > +#define load_shared_space_addr(dst, y, width) load_shared_media_block_msg_hdr(dst, y, width) > +#define load_thread_space_addr(dst, x, y, width) load_thread_media_block_msg_hdr(dst, x, y, width) > +#define load_space_dw(dst, src) send.dc1 (1) dst src src1_null 0x0 0x2190000 > +#define store_space_dw(dst, src) send.dc1 (1) null dst null 0x0 0x40A8000 > +#else > +#define load_shared_space_addr(dst, y, width) load_shared_a2dblock_payload(dst, y, width) > +#define load_thread_space_addr(dst, x, y, width) load_thread_a2dblock_payload(dst, x, y, width) > +#define load_space_dw(dst, src) send.tgm (1) dst src null:0 0x0 0x62100003 > +#define store_space_dw(dst, src) send.tgm (1) null dst null:0 0x0 0x64000007 > +#endif > + > #endif > > -- > 2.34.1 > ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/2] lib/gpgpu_shader: simplify load/store shaders 2024-11-14 11:28 ` Zbigniew Kempczyński @ 2024-11-14 16:11 ` Hajda, Andrzej 0 siblings, 0 replies; 14+ messages in thread From: Hajda, Andrzej @ 2024-11-14 16:11 UTC (permalink / raw) To: Zbigniew Kempczyński Cc: igt-dev, Dominik Grzegorzek, Gwan-gyeong Mun, Kamil Konieczny W dniu 14.11.2024 o 12:28, Zbigniew Kempczyński pisze: > On Thu, Nov 14, 2024 at 11:31:39AM +0100, Andrzej Hajda wrote: >> There is lot of redundancy in shaders code regarding load/store messages. >> It makes the code barely readable. Simplify it by using macros in iga64 >> assembler. >> Every load/store operation is split into two phases: >> 1. Load address/descriptor (from) where data should be stored/loaded. >> 2. Issue load/store instruction. >> Shader threads needs two types of memory access: >> 3. Private area per thread. >> 4. Area shared per all threads. >> Different platforms access surface in different ways: >> 5. Using media block messages. >> 6. Using untyped 2d block messages. >> 7. Future platforms will use different messages. >> >> All this is simplified to two macros per message in shader: >> load_(shared|thread)_space_addr(dst,y,width) >> (load|store)_space_dw(dst, src) >> >> Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com> >> --- >> lib/gpgpu_shader.c | 160 +++------------------ >> lib/iga64_generated_codes.c | 338 ++++++++++++++++++++++---------------------- >> lib/iga64_macros.h | 43 ++++++ >> 3 files changed, 230 insertions(+), 311 deletions(-) >> >> diff --git a/lib/gpgpu_shader.c b/lib/gpgpu_shader.c >> index 4e1b8d5e9009..7728f96bf305 100644 >> --- a/lib/gpgpu_shader.c >> +++ b/lib/gpgpu_shader.c >> @@ -431,22 +431,8 @@ void gpgpu_shader__jump_neq(struct gpgpu_shader *shdr, int label_id, >> >> size = emit_iga64_code(shdr, jump_dw_neq, " \n\ >> L0: \n\ >> -(W) mov (16|M0) r30.0<1>:ud 0x0:ud \n\ >> -#if GEN_VER < 2000 // Media Block Write \n\ > This comment seems is incorrect, > >> - // Y offset of the block in rows := thread group id Y \n\ >> -(W) mov (1|M0) r30.1<1>:ud ARG(0):ud \n\ >> - // block width [0,63] representing 1 to 64 bytes, we want dword \n\ >> -(W) mov (1|M0) r30.2<1>:ud 0x3:ud \n\ >> - // FFTID := FFTID from R0 header \n\ >> -(W) mov (1|M0) r30.4<1>:ud r0.5<0;1,0>:ud \n\ >> -(W) send.dc1 (16|M0) r31 r30 null 0x0 0x2190000 \n\ >> -#else // Typed 2D Block Store \n\ > this as well... > >> - // Store X and Y block start (160:191 and 192:223) \n\ >> -(W) mov (1|M0) r30.6<1>:ud ARG(0):ud \n\ >> - // Store X and Y block size (224:231 and 232:239) \n\ >> -(W) mov (1|M0) r30.7<1>:ud 0x3:ud \n\ >> -(W) send.tgm (16|M0) r31 r30 null:0 0x0 0x62100003 \n\ >> -#endif \n\ >> + load_shared_space_addr(r30, ARG(0):ud, 4) \n\ > Shouldn't above be named set_shared_space_addr()? Load is ambiguous for > me in this context. I have just tried to follow iga64 convention, but set_shared_space_addr looks better for me, I will change it then. > >> +(W) load_space_dw(r31, r30) \n\ > Ok, we're loading dw, not store (wrong comment was removed, great). > >> // clear the flag register \n\ >> (W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ >> (W) cmp (1|M0) (ne)f0.0 null<1>:ud r31.0<0;1,0>:ud ARG(1):ud \n\ >> @@ -511,28 +497,13 @@ void gpgpu_shader__common_target_write(struct gpgpu_shader *shdr, >> uint32_t y_offset, const uint32_t value[4]) >> { >> emit_iga64_code(shdr, common_target_write, " \n\ >> -(W) mov (16|M0) r30.0<1>:ud 0x0:ud \n\ >> (W) mov (16|M0) r31.0<1>:ud 0x0:ud \n\ >> (W) mov (1|M0) r31.0<1>:ud ARG(1):ud \n\ >> (W) mov (1|M0) r31.1<1>:ud ARG(2):ud \n\ >> (W) mov (1|M0) r31.2<1>:ud ARG(3):ud \n\ >> (W) mov (1|M0) r31.3<1>:ud ARG(4):ud \n\ >> -#if GEN_VER < 2000 // Media Block Write \n\ >> - // Y offset of the block in rows \n\ >> -(W) mov (1|M0) r30.1<1>:ud ARG(0):ud \n\ >> - // block width [0,63] representing 1 to 64 bytes \n\ >> -(W) mov (1|M0) r30.2<1>:ud 0xf:ud \n\ >> - // FFTID := FFTID from R0 header \n\ >> -(W) mov (1|M0) r30.4<1>:ud r0.5<0;1,0>:ud \n\ >> - // written value \n\ >> -(W) send.dc1 (16|M0) null r30 src1_null 0x0 0x40A8000 \n\ >> -#else // Typed 2D Block Store \n\ >> - // Store X and Y block start (160:191 and 192:223) \n\ >> -(W) mov (1|M0) r30.6<1>:ud ARG(0):ud \n\ >> - // Store X and Y block size (224:231 and 232:239) \n\ >> -(W) mov (1|M0) r30.7<1>:ud 0xf:ud \n\ >> -(W) send.tgm (16|M0) null r30 null:0 0x0 0x64000007 \n\ >> -#endif \n\ >> + load_shared_space_addr(r30, ARG(0):ud, 16) \n\ >> +(W) store_space_dw(r30, r31) \n\ >> ", y_offset, value[0], value[1], value[2], value[3]); >> } >> >> @@ -565,31 +536,8 @@ void gpgpu_shader__write_aip(struct gpgpu_shader *shdr, uint32_t y_offset) >> emit_iga64_code(shdr, media_block_write_aip, " \n\ >> // Payload \n\ >> (W) mov (1|M0) r5.0<1>:ud cr0.2:ud \n\ >> -#if GEN_VER < 2000 // Media Block Write \n\ >> - // X offset of the block in bytes := (thread group id X << ARG(0)) \n\ >> -(W) shl (1|M0) r4.0<1>:ud r0.1<0;1,0>:ud 0x2:ud \n\ >> - // Y offset of the block in rows := thread group id Y \n\ >> -(W) mov (1|M0) r4.1<1>:ud r0.6<0;1,0>:ud \n\ >> -(W) add (1|M0) r4.1<1>:ud r4.1<0;1,0>:ud ARG(0):ud \n\ >> - // block width [0,63] representing 1 to 64 bytes \n\ >> -(W) mov (1|M0) r4.2<1>:ud 0x3:ud \n\ >> - // FFTID := FFTID from R0 header \n\ >> -(W) mov (1|M0) r4.4<1>:ud r0.5<0;1,0>:ud \n\ >> -(W) send.dc1 (16|M0) null r4 src1_null 0 0x40A8000 \n\ >> -#else // Typed 2D Block Store \n\ >> - // Load r2.0-3 with tg id X << ARG(0) \n\ >> -(W) shl (1|M0) r2.0<1>:ud r0.1<0;1,0>:ud 0x2:ud \n\ >> - // Load r2.4-7 with tg id Y + ARG(1):ud \n\ >> -(W) mov (1|M0) r2.1<1>:ud r0.6<0;1,0>:ud \n\ >> -(W) add (1|M0) r2.1<1>:ud r2.1<0;1,0>:ud ARG(0):ud \n\ >> - // payload setup \n\ >> -(W) mov (16|M0) r4.0<1>:ud 0x0:ud \n\ >> - // Store X and Y block start (160:191 and 192:223) \n\ >> -(W) mov (2|M0) r4.5<1>:ud r2.0<2;2,1>:ud \n\ >> - // Store X and Y block max_size (224:231 and 232:239) \n\ >> -(W) mov (1|M0) r4.7<1>:ud 0x3:ud \n\ >> -(W) send.tgm (16|M0) null r4 null:0 0 0x64000007 \n\ >> -#endif \n\ >> + load_thread_space_addr(r4, 0, ARG(0):ud, 4) \n\ >> +(W) store_space_dw(r4, r5) \n\ >> ", y_offset); >> } >> >> @@ -618,38 +566,11 @@ void gpgpu_shader__increase_aip(struct gpgpu_shader *shdr, uint32_t value) >> void gpgpu_shader__write_dword(struct gpgpu_shader *shdr, uint32_t value, >> uint32_t y_offset) >> { >> - emit_iga64_code(shdr, media_block_write, " \n\ >> - // Clear message header \n\ >> -(W) mov (16|M0) r4.0<1>:ud 0x0:ud \n\ >> - // Payload \n\ >> -(W) mov (1|M0) r5.0<1>:ud ARG(3):ud \n\ >> -(W) mov (1|M0) r5.1<1>:ud ARG(4):ud \n\ >> -(W) mov (1|M0) r5.2<1>:ud ARG(5):ud \n\ >> -(W) mov (1|M0) r5.3<1>:ud ARG(6):ud \n\ >> -#if GEN_VER < 2000 // Media Block Write \n\ >> - // X offset of the block in bytes := (thread group id X << ARG(0)) \n\ >> -(W) shl (1|M0) r4.0<1>:ud r0.1<0;1,0>:ud ARG(0):ud \n\ >> - // Y offset of the block in rows := thread group id Y \n\ >> -(W) mov (1|M0) r4.1<1>:ud r0.6<0;1,0>:ud \n\ >> -(W) add (1|M0) r4.1<1>:ud r4.1<0;1,0>:ud ARG(1):ud \n\ >> - // block width [0,63] representing 1 to 64 bytes \n\ >> -(W) mov (1|M0) r4.2<1>:ud ARG(2):ud \n\ >> - // FFTID := FFTID from R0 header \n\ >> -(W) mov (1|M0) r4.4<1>:ud r0.5<0;1,0>:ud \n\ >> -(W) send.dc1 (16|M0) null r4 src1_null 0 0x40A8000 \n\ >> -#else // Typed 2D Block Store \n\ >> - // Load r2.0-3 with tg id X << ARG(0) \n\ >> -(W) shl (1|M0) r2.0<1>:ud r0.1<0;1,0>:ud ARG(0):ud \n\ >> - // Load r2.4-7 with tg id Y + ARG(1):ud \n\ >> -(W) mov (1|M0) r2.1<1>:ud r0.6<0;1,0>:ud \n\ >> -(W) add (1|M0) r2.1<1>:ud r2.1<0;1,0>:ud ARG(1):ud \n\ >> - // Store X and Y block start (160:191 and 192:223) \n\ >> -(W) mov (2|M0) r4.5<1>:ud r2.0<2;2,1>:ud \n\ >> - // Store X and Y block max_size (224:231 and 232:239) \n\ >> -(W) mov (1|M0) r4.7<1>:ud ARG(2):ud \n\ >> -(W) send.tgm (16|M0) null r4 null:0 0 0x64000007 \n\ >> -#endif \n\ >> - ", 2, y_offset, 3, value, value, value, value); >> + emit_iga64_code(shdr, media_block_write, " \n\ >> +(W) mov (1) r5.0<1>:ud ARG(1):ud \n\ >> + load_thread_space_addr(r4, 0, ARG(0):ud, 4) \n\ >> +(W) store_space_dw(r4, r5) \n\ >> + ", y_offset, value); >> } >> >> /** >> @@ -697,41 +618,14 @@ void gpgpu_shader__write_on_exception(struct gpgpu_shader *shdr, uint32_t value, >> uint32_t y_offset, uint32_t mask, uint32_t expected) >> { >> emit_iga64_code(shdr, write_on_exception, " \n\ >> - // Clear message header \n\ >> -(W) mov (16|M0) r4.0<1>:ud 0x0:ud \n\ >> - // Payload \n\ >> -(W) mov (1|M0) r5.0<1>:ud ARG(4):ud \n\ >> -#if GEN_VER < 2000 // prepare Media Block Write \n\ >> - // X offset of the block in bytes := (thread group id X << ARG(0)) \n\ >> -(W) add (1|M0) r4.0<1>:ud r0.1<0;1,0>:ud ARG(1):ud \n\ >> -(W) shl (1|M0) r4.0<1>:ud r4.0<0;1,0>:ud ARG(0):ud \n\ >> - // Y offset of the block in rows := thread group id Y \n\ >> -(W) add (1|M0) r4.1<1>:ud r0.6<0;1,0>:ud ARG(2):ud \n\ >> - // block width [0,63] representing 1 to 64 bytes \n\ >> -(W) mov (1|M0) r4.2<1>:ud ARG(3):ud \n\ >> - // FFTID := FFTID from R0 header \n\ >> -(W) mov (1|M0) r4.4<1>:ud r0.5<0;1,0>:ud \n\ >> -#else // prepare Typed 2D Block Store \n\ >> - // Load r2.0 with tg id (X + ARG(1)) << ARG(0) \n\ >> -(W) add (1|M0) r2.0<1>:ud r0.1<0;1,0>:ud ARG(1):ud \n\ >> -(W) shl (1|M0) r2.0<1>:ud r2.0<0;1,0>:ud ARG(0):ud \n\ >> - // Load r2.4-7 with tg id Y + ARG(2):ud \n\ >> -(W) add (1|M0) r2.1<1>:ud r0.6<0;1,0>:ud ARG(2):ud \n\ >> - // Store X and Y block start (160:191 and 192:223) \n\ >> -(W) mov (2|M0) r4.5<1>:ud r2.0<2;2,1>:ud \n\ >> - // Store X and Y block max_size (224:231 and 232:239) \n\ >> -(W) mov (1|M0) r4.7<1>:ud ARG(3):ud \n\ >> -#endif \n\ >> +(W) mov (1|M0) r5.0<1>:ud ARG(2):ud \n\ >> + load_thread_space_addr(r4, ARG(0), ARG(1):ud, 4) \n\ >> // Check if masked exception is equal to provided value and write conditionally \n\ >> -(W) and (1|M0) r3.0<1>:ud cr0.1<0;1,0>:ud ARG(5):ud \n\ >> -(W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ >> -(W) cmp (1|M0) (eq)f0.0 null:ud r3.0<0;1,0>:ud ARG(6):ud \n\ >> -#if GEN_VER < 2000 // Media Block Write \n\ >> -(W&f0.0) send.dc1 (16|M0) null r4 src1_null 0 0x40A8000 \n\ >> -#else // Typed 2D Block Store \n\ >> -(W&f0.0) send.tgm (16|M0) null r4 null:0 0 0x64000007 \n\ >> -#endif \n\ >> - ", 2, x_offset, y_offset, 3, value, mask, expected); >> +(W) and (1|M0) r3.0<1>:ud cr0.1<0;1,0>:ud ARG(3):ud \n\ >> +(W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ >> +(W) cmp (1|M0) (eq)f0.0 null:ud r3.0<0;1,0>:ud ARG(4):ud \n\ >> +(W&f0.0) store_space_dw(r4, r5) \n\ >> + ", 4 * x_offset, y_offset, value, mask, expected); >> } >> >> /** >> @@ -778,22 +672,8 @@ void gpgpu_shader__end_system_routine_step_if_eq(struct gpgpu_shader *shdr, >> emit_iga64_code(shdr, end_system_routine_step_if_eq, " \n\ >> (W) or (1|M0) cr0.0<1>:ud cr0.0<0;1,0>:ud 0x8000:ud \n\ >> (W) and (1|M0) cr0.1<1>:ud cr0.1<0;1,0>:ud ARG(0):ud \n\ >> -(W) mov (16|M0) r30.0<1>:ud 0x0:ud \n\ >> -#if GEN_VER < 2000 // Media Block Write \n\ >> - // Y offset of the block in rows := thread group id Y \n\ >> -(W) mov (1|M0) r30.1<1>:ud ARG(1):ud \n\ >> - // block width [0,63] representing 1 to 64 bytes, we want dword \n\ >> -(W) mov (1|M0) r30.2<1>:ud 0x3:ud \n\ >> - // FFTID := FFTID from R0 header \n\ >> -(W) mov (1|M0) r30.4<1>:ud r0.5<0;1,0>:ud \n\ >> -(W) send.dc1 (16|M0) r31 r30 null 0x0 0x2190000 \n\ >> -#else // Typed 2D Block Store \n\ >> - // Store X and Y block start (160:191 and 192:223) \n\ >> -(W) mov (1|M0) r30.6<1>:ud ARG(1):ud \n\ >> - // Store X and Y block size (224:231 and 232:239) \n\ >> -(W) mov (1|M0) r30.7<1>:ud 0x3:ud \n\ >> -(W) send.tgm (16|M0) r31 r30 null:0 0x0 0x62100003 \n\ >> -#endif \n\ >> + load_thread_space_addr(r30, 0, ARG(0):ud, 4) \n\ > Shouldn't this be load_shared_space_addr()? Yes, it should. Apparently my local tests missed this case. Thanks for catching it. Regards Andrzej > > -- > Zbigniew > >> +(W) load_space_dw(r31, r30) \n\ >> // clear the flag register \n\ >> (W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ >> (W) cmp (1|M0) (ne)f0.0 null<1>:ud r31.0<0;1,0>:ud ARG(2):ud \n\ >> diff --git a/lib/iga64_generated_codes.c b/lib/iga64_generated_codes.c >> index 0bd92b8c4dc9..017adefce400 100644 >> --- a/lib/iga64_generated_codes.c >> +++ b/lib/iga64_generated_codes.c >> @@ -3,7 +3,7 @@ >> >> #include "gpgpu_shader.h" >> >> -#define MD5_SUM_IGA64_ASMS e2d97ef45d5f322200793a0aa76872d7 >> +#define MD5_SUM_IGA64_ASMS fa1b0aa75c3ee1cd13300ad1324737b4 >> >> struct iga64_template const iga64_code_gpgpu_fill[] = { >> { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { >> @@ -80,71 +80,81 @@ struct iga64_template const iga64_code_gpgpu_fill[] = { >> }; >> >> struct iga64_template const iga64_code_end_system_routine_step_if_eq[] = { >> - { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { >> + { .gen_ver = 2000, .size = 52, .code = (const uint32_t []) { >> 0x80000966, 0x80018220, 0x02008000, 0x00008000, >> 0x80000965, 0x80118220, 0x02008010, 0xc0ded000, >> - 0x80100961, 0x1e054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x1e654220, 0x00000000, 0xc0ded001, >> + 0x800c0961, 0x1e054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x1e558220, 0x02000014, 0x00000002, >> + 0x80001940, 0x1e558220, 0x02001e54, 0x00000000, >> + 0x80000040, 0x1e658220, 0x02000064, 0xc0ded000, >> 0x80000061, 0x1e754220, 0x00000000, 0x00000003, >> - 0x80132031, 0x1f0c0000, 0xd0061e8c, 0x04000000, >> + 0x80032031, 0x1f0c0000, 0xd0061e8c, 0x04000000, >> 0x80000061, 0x30014220, 0x00000000, 0x00000000, >> 0x80008070, 0x00018220, 0x22001f04, 0xc0ded002, >> 0x84000965, 0x80118220, 0x02008010, 0xc0ded003, >> 0x80000965, 0x80018220, 0x02008000, 0x7ffffffd, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> - { .gen_ver = 1270, .size = 52, .code = (const uint32_t []) { >> + { .gen_ver = 1270, .size = 60, .code = (const uint32_t []) { >> 0x80000966, 0x80018220, 0x02008000, 0x00008000, >> 0x80000965, 0x80218220, 0x02008020, 0xc0ded000, >> - 0x80040961, 0x1e054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x1e254220, 0x00000000, 0xc0ded001, >> + 0x80030961, 0x1e054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x1e058220, 0x02000024, 0x00000002, >> + 0x80001940, 0x1e058220, 0x02001e04, 0x00000000, >> + 0x80000040, 0x1e258220, 0x020000c4, 0xc0ded000, >> 0x80000061, 0x1e454220, 0x00000000, 0x00000003, >> 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> 0x80000061, 0x30014220, 0x00000000, 0x00000000, >> 0x80002070, 0x00018220, 0x22001f04, 0xc0ded002, >> 0x81000965, 0x80218220, 0x02008020, 0xc0ded003, >> 0x80000965, 0x80018220, 0x02008000, 0x7ffffffd, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> - { .gen_ver = 1260, .size = 48, .code = (const uint32_t []) { >> + { .gen_ver = 1260, .size = 56, .code = (const uint32_t []) { >> 0x80000966, 0x80018220, 0x02008000, 0x00008000, >> 0x80000965, 0x80118220, 0x02008010, 0xc0ded000, >> - 0x80100961, 0x1e054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x1e154220, 0x00000000, 0xc0ded001, >> + 0x800c0961, 0x1e054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x1e058220, 0x02000014, 0x00000002, >> + 0x80001940, 0x1e058220, 0x02001e04, 0x00000000, >> + 0x80000040, 0x1e158220, 0x02000064, 0xc0ded000, >> 0x80000061, 0x1e254220, 0x00000000, 0x00000003, >> 0x80000061, 0x1e450220, 0x00000054, 0x00000000, >> - 0x80132031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> + 0x80032031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> 0x80000061, 0x30014220, 0x00000000, 0x00000000, >> 0x80008070, 0x00018220, 0x22001f04, 0xc0ded002, >> 0x84000965, 0x80118220, 0x02008010, 0xc0ded003, >> 0x80000965, 0x80018220, 0x02008000, 0x7ffffffd, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> - { .gen_ver = 1250, .size = 52, .code = (const uint32_t []) { >> + { .gen_ver = 1250, .size = 60, .code = (const uint32_t []) { >> 0x80000966, 0x80018220, 0x02008000, 0x00008000, >> 0x80000965, 0x80218220, 0x02008020, 0xc0ded000, >> - 0x80040961, 0x1e054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x1e254220, 0x00000000, 0xc0ded001, >> + 0x80030961, 0x1e054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x1e058220, 0x02000024, 0x00000002, >> + 0x80001940, 0x1e058220, 0x02001e04, 0x00000000, >> + 0x80000040, 0x1e258220, 0x020000c4, 0xc0ded000, >> 0x80000061, 0x1e454220, 0x00000000, 0x00000003, >> 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> 0x80000061, 0x30014220, 0x00000000, 0x00000000, >> 0x80002070, 0x00018220, 0x22001f04, 0xc0ded002, >> 0x81000965, 0x80218220, 0x02008020, 0xc0ded003, >> 0x80000965, 0x80018220, 0x02008000, 0x7ffffffd, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> - { .gen_ver = 0, .size = 48, .code = (const uint32_t []) { >> + { .gen_ver = 0, .size = 56, .code = (const uint32_t []) { >> 0x80000166, 0x80018220, 0x02008000, 0x00008000, >> 0x80000165, 0x80218220, 0x02008020, 0xc0ded000, >> - 0x80040161, 0x1e054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x1e254220, 0x00000000, 0xc0ded001, >> + 0x80030161, 0x1e054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x1e058220, 0x02000024, 0x00000002, >> + 0x80000140, 0x1e058220, 0x02001e04, 0x00000000, >> + 0x80000040, 0x1e258220, 0x020000c4, 0xc0ded000, >> 0x80000061, 0x1e454220, 0x00000000, 0x00000003, >> 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, >> - 0x80049031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> + 0x80009031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> 0x80000061, 0x30014220, 0x00000000, 0x00000000, >> 0x80002070, 0x00018220, 0x22001f04, 0xc0ded002, >> 0x81000165, 0x80218220, 0x02008020, 0xc0ded003, >> @@ -193,84 +203,83 @@ struct iga64_template const iga64_code_breakpoint_suppress[] = { >> }; >> >> struct iga64_template const iga64_code_write_on_exception[] = { >> - { .gen_ver = 2000, .size = 56, .code = (const uint32_t []) { >> - 0x80100061, 0x04054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, >> - 0x80000040, 0x02058220, 0x02000014, 0xc0ded001, >> - 0x80001969, 0x02058220, 0x02000204, 0xc0ded000, >> - 0x80000040, 0x02158220, 0x02000064, 0xc0ded002, >> - 0x80041961, 0x04550220, 0x00220205, 0x00000000, >> - 0x80000061, 0x04754220, 0x00000000, 0xc0ded003, >> - 0x80000965, 0x03058220, 0x02008010, 0xc0ded005, >> + { .gen_ver = 2000, .size = 52, .code = (const uint32_t []) { >> + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, >> + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04558220, 0x02000014, 0x00000002, >> + 0x80001940, 0x04558220, 0x02000454, 0xc0ded000, >> + 0x80000040, 0x04658220, 0x02000064, 0xc0ded001, >> + 0x80000061, 0x04754220, 0x00000000, 0x00000003, >> + 0x80000965, 0x03058220, 0x02008010, 0xc0ded003, >> 0x80000961, 0x30014220, 0x00000000, 0x00000000, >> - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, >> - 0x84132031, 0x00000000, 0xd00e0494, 0x04000000, >> + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, >> + 0x84032031, 0x00000000, 0xd00e0494, 0x04000000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 1270, .size = 60, .code = (const uint32_t []) { >> - 0x80040061, 0x04054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, >> - 0x80000040, 0x04058220, 0x02000024, 0xc0ded001, >> - 0x80001969, 0x04058220, 0x02000404, 0xc0ded000, >> - 0x80000040, 0x04258220, 0x020000c4, 0xc0ded002, >> - 0x80000061, 0x04454220, 0x00000000, 0xc0ded003, >> + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, >> + 0x80030061, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000024, 0x00000002, >> + 0x80001940, 0x04058220, 0x02000404, 0xc0ded000, >> + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded001, >> + 0x80000061, 0x04454220, 0x00000000, 0x00000003, >> 0x80000061, 0x04850220, 0x000000a4, 0x00000000, >> - 0x80000965, 0x03058220, 0x02008020, 0xc0ded005, >> + 0x80000965, 0x03058220, 0x02008020, 0xc0ded003, >> 0x80000961, 0x30014220, 0x00000000, 0x00000000, >> - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, >> + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x81044031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x81004031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 1260, .size = 56, .code = (const uint32_t []) { >> - 0x80100061, 0x04054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, >> - 0x80000040, 0x04058220, 0x02000014, 0xc0ded001, >> - 0x80001969, 0x04058220, 0x02000404, 0xc0ded000, >> - 0x80000040, 0x04158220, 0x02000064, 0xc0ded002, >> - 0x80000061, 0x04254220, 0x00000000, 0xc0ded003, >> + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, >> + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000014, 0x00000002, >> + 0x80001940, 0x04058220, 0x02000404, 0xc0ded000, >> + 0x80000040, 0x04158220, 0x02000064, 0xc0ded001, >> + 0x80000061, 0x04254220, 0x00000000, 0x00000003, >> 0x80000061, 0x04450220, 0x00000054, 0x00000000, >> - 0x80000965, 0x03058220, 0x02008010, 0xc0ded005, >> + 0x80000965, 0x03058220, 0x02008010, 0xc0ded003, >> 0x80000961, 0x30014220, 0x00000000, 0x00000000, >> - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, >> - 0x84132031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, >> + 0x84032031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 1250, .size = 60, .code = (const uint32_t []) { >> - 0x80040061, 0x04054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, >> - 0x80000040, 0x04058220, 0x02000024, 0xc0ded001, >> - 0x80001969, 0x04058220, 0x02000404, 0xc0ded000, >> - 0x80000040, 0x04258220, 0x020000c4, 0xc0ded002, >> - 0x80000061, 0x04454220, 0x00000000, 0xc0ded003, >> + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, >> + 0x80030061, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000024, 0x00000002, >> + 0x80001940, 0x04058220, 0x02000404, 0xc0ded000, >> + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded001, >> + 0x80000061, 0x04454220, 0x00000000, 0x00000003, >> 0x80000061, 0x04850220, 0x000000a4, 0x00000000, >> - 0x80000965, 0x03058220, 0x02008020, 0xc0ded005, >> + 0x80000965, 0x03058220, 0x02008020, 0xc0ded003, >> 0x80000961, 0x30014220, 0x00000000, 0x00000000, >> - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, >> + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x81044031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x81004031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 0, .size = 56, .code = (const uint32_t []) { >> - 0x80040061, 0x04054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, >> - 0x80000040, 0x04058220, 0x02000024, 0xc0ded001, >> - 0x80000169, 0x04058220, 0x02000404, 0xc0ded000, >> - 0x80000040, 0x04258220, 0x020000c4, 0xc0ded002, >> - 0x80000061, 0x04454220, 0x00000000, 0xc0ded003, >> + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, >> + 0x80030061, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000024, 0x00000002, >> + 0x80000140, 0x04058220, 0x02000404, 0xc0ded000, >> + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded001, >> + 0x80000061, 0x04454220, 0x00000000, 0x00000003, >> 0x80000061, 0x04850220, 0x000000a4, 0x00000000, >> - 0x80000165, 0x03058220, 0x02008020, 0xc0ded005, >> + 0x80000165, 0x03058220, 0x02008020, 0xc0ded003, >> 0x80000161, 0x30014220, 0x00000000, 0x00000000, >> - 0x80000270, 0x00018220, 0x12000304, 0xc0ded006, >> - 0x81049031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x80000270, 0x00018220, 0x12000304, 0xc0ded004, >> + 0x81009031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000101, 0x00010000, 0x00000000, 0x00000000, >> @@ -324,84 +333,68 @@ struct iga64_template const iga64_code_clear_exception[] = { >> }; >> >> struct iga64_template const iga64_code_media_block_write[] = { >> - { .gen_ver = 2000, .size = 56, .code = (const uint32_t []) { >> - 0x80100061, 0x04054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, >> - 0x80000061, 0x05154220, 0x00000000, 0xc0ded004, >> - 0x80000061, 0x05254220, 0x00000000, 0xc0ded005, >> - 0x80000061, 0x05354220, 0x00000000, 0xc0ded006, >> - 0x80000069, 0x02058220, 0x02000014, 0xc0ded000, >> - 0x80000061, 0x02150220, 0x00000064, 0x00000000, >> - 0x80001940, 0x02158220, 0x02000214, 0xc0ded001, >> - 0x80041961, 0x04550220, 0x00220205, 0x00000000, >> - 0x80000061, 0x04754220, 0x00000000, 0xc0ded002, >> - 0x80132031, 0x00000000, 0xd00e0494, 0x04000000, >> + { .gen_ver = 2000, .size = 40, .code = (const uint32_t []) { >> + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, >> + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04558220, 0x02000014, 0x00000002, >> + 0x80001940, 0x04558220, 0x02000454, 0x00000000, >> + 0x80000040, 0x04658220, 0x02000064, 0xc0ded000, >> + 0x80000061, 0x04754220, 0x00000000, 0x00000003, >> + 0x80032031, 0x00000000, 0xd00e0494, 0x04000000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> - { .gen_ver = 1270, .size = 60, .code = (const uint32_t []) { >> - 0x80040061, 0x04054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, >> - 0x80000061, 0x05254220, 0x00000000, 0xc0ded004, >> - 0x80000061, 0x05454220, 0x00000000, 0xc0ded005, >> - 0x80000061, 0x05654220, 0x00000000, 0xc0ded006, >> - 0x80000069, 0x04058220, 0x02000024, 0xc0ded000, >> - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, >> - 0x80001940, 0x04258220, 0x02000424, 0xc0ded001, >> - 0x80000061, 0x04454220, 0x00000000, 0xc0ded002, >> + { .gen_ver = 1270, .size = 48, .code = (const uint32_t []) { >> + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, >> + 0x80030061, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000024, 0x00000002, >> + 0x80001940, 0x04058220, 0x02000404, 0x00000000, >> + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, >> + 0x80000061, 0x04454220, 0x00000000, 0x00000003, >> 0x80000061, 0x04850220, 0x000000a4, 0x00000000, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> - { .gen_ver = 1260, .size = 56, .code = (const uint32_t []) { >> - 0x80100061, 0x04054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, >> - 0x80000061, 0x05154220, 0x00000000, 0xc0ded004, >> - 0x80000061, 0x05254220, 0x00000000, 0xc0ded005, >> - 0x80000061, 0x05354220, 0x00000000, 0xc0ded006, >> - 0x80000069, 0x04058220, 0x02000014, 0xc0ded000, >> - 0x80000061, 0x04150220, 0x00000064, 0x00000000, >> - 0x80001940, 0x04158220, 0x02000414, 0xc0ded001, >> - 0x80000061, 0x04254220, 0x00000000, 0xc0ded002, >> + { .gen_ver = 1260, .size = 44, .code = (const uint32_t []) { >> + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, >> + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000014, 0x00000002, >> + 0x80001940, 0x04058220, 0x02000404, 0x00000000, >> + 0x80000040, 0x04158220, 0x02000064, 0xc0ded000, >> + 0x80000061, 0x04254220, 0x00000000, 0x00000003, >> 0x80000061, 0x04450220, 0x00000054, 0x00000000, >> - 0x80132031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x80032031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> - { .gen_ver = 1250, .size = 60, .code = (const uint32_t []) { >> - 0x80040061, 0x04054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, >> - 0x80000061, 0x05254220, 0x00000000, 0xc0ded004, >> - 0x80000061, 0x05454220, 0x00000000, 0xc0ded005, >> - 0x80000061, 0x05654220, 0x00000000, 0xc0ded006, >> - 0x80000069, 0x04058220, 0x02000024, 0xc0ded000, >> - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, >> - 0x80001940, 0x04258220, 0x02000424, 0xc0ded001, >> - 0x80000061, 0x04454220, 0x00000000, 0xc0ded002, >> + { .gen_ver = 1250, .size = 48, .code = (const uint32_t []) { >> + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, >> + 0x80030061, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000024, 0x00000002, >> + 0x80001940, 0x04058220, 0x02000404, 0x00000000, >> + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, >> + 0x80000061, 0x04454220, 0x00000000, 0x00000003, >> 0x80000061, 0x04850220, 0x000000a4, 0x00000000, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> - { .gen_ver = 0, .size = 56, .code = (const uint32_t []) { >> - 0x80040061, 0x04054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, >> - 0x80000061, 0x05254220, 0x00000000, 0xc0ded004, >> - 0x80000061, 0x05454220, 0x00000000, 0xc0ded005, >> - 0x80000061, 0x05654220, 0x00000000, 0xc0ded006, >> - 0x80000069, 0x04058220, 0x02000024, 0xc0ded000, >> - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, >> - 0x80000140, 0x04258220, 0x02000424, 0xc0ded001, >> - 0x80000061, 0x04454220, 0x00000000, 0xc0ded002, >> + { .gen_ver = 0, .size = 44, .code = (const uint32_t []) { >> + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, >> + 0x80030061, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000024, 0x00000002, >> + 0x80000140, 0x04058220, 0x02000404, 0x00000000, >> + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, >> + 0x80000061, 0x04454220, 0x00000000, 0x00000003, >> 0x80000061, 0x04850220, 0x000000a4, 0x00000000, >> - 0x80049031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x80009031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000101, 0x00010000, 0x00000000, 0x00000000, >> @@ -432,65 +425,68 @@ struct iga64_template const iga64_code_write_aip[] = { >> }; >> >> struct iga64_template const iga64_code_media_block_write_aip[] = { >> - { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { >> + { .gen_ver = 2000, .size = 40, .code = (const uint32_t []) { >> 0x80000961, 0x05050220, 0x00008020, 0x00000000, >> - 0x80000969, 0x02058220, 0x02000014, 0x00000002, >> - 0x80000061, 0x02150220, 0x00000064, 0x00000000, >> - 0x80001940, 0x02158220, 0x02000214, 0xc0ded000, >> - 0x80100061, 0x04054220, 0x00000000, 0x00000000, >> - 0x80041a61, 0x04550220, 0x00220205, 0x00000000, >> + 0x800c0961, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04558220, 0x02000014, 0x00000002, >> + 0x80001940, 0x04558220, 0x02000454, 0x00000000, >> + 0x80000040, 0x04658220, 0x02000064, 0xc0ded000, >> 0x80000061, 0x04754220, 0x00000000, 0x00000003, >> - 0x80132031, 0x00000000, 0xd00e0494, 0x04000000, >> + 0x80032031, 0x00000000, 0xd00e0494, 0x04000000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> - { .gen_ver = 1270, .size = 44, .code = (const uint32_t []) { >> + { .gen_ver = 1270, .size = 48, .code = (const uint32_t []) { >> 0x80000961, 0x05050220, 0x00008040, 0x00000000, >> - 0x80000969, 0x04058220, 0x02000024, 0x00000002, >> - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, >> - 0x80001940, 0x04258220, 0x02000424, 0xc0ded000, >> + 0x80030961, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000024, 0x00000002, >> + 0x80001940, 0x04058220, 0x02000404, 0x00000000, >> + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, >> 0x80000061, 0x04454220, 0x00000000, 0x00000003, >> 0x80000061, 0x04850220, 0x000000a4, 0x00000000, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> - { .gen_ver = 1260, .size = 40, .code = (const uint32_t []) { >> + { .gen_ver = 1260, .size = 44, .code = (const uint32_t []) { >> 0x80000961, 0x05050220, 0x00008020, 0x00000000, >> - 0x80000969, 0x04058220, 0x02000014, 0x00000002, >> - 0x80000061, 0x04150220, 0x00000064, 0x00000000, >> - 0x80001940, 0x04158220, 0x02000414, 0xc0ded000, >> + 0x800c0961, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000014, 0x00000002, >> + 0x80001940, 0x04058220, 0x02000404, 0x00000000, >> + 0x80000040, 0x04158220, 0x02000064, 0xc0ded000, >> 0x80000061, 0x04254220, 0x00000000, 0x00000003, >> 0x80000061, 0x04450220, 0x00000054, 0x00000000, >> - 0x80132031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x80032031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> - { .gen_ver = 1250, .size = 44, .code = (const uint32_t []) { >> + { .gen_ver = 1250, .size = 48, .code = (const uint32_t []) { >> 0x80000961, 0x05050220, 0x00008040, 0x00000000, >> - 0x80000969, 0x04058220, 0x02000024, 0x00000002, >> - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, >> - 0x80001940, 0x04258220, 0x02000424, 0xc0ded000, >> + 0x80030961, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000024, 0x00000002, >> + 0x80001940, 0x04058220, 0x02000404, 0x00000000, >> + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, >> 0x80000061, 0x04454220, 0x00000000, 0x00000003, >> 0x80000061, 0x04850220, 0x000000a4, 0x00000000, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> - { .gen_ver = 0, .size = 40, .code = (const uint32_t []) { >> + { .gen_ver = 0, .size = 44, .code = (const uint32_t []) { >> 0x80000161, 0x05050220, 0x00008040, 0x00000000, >> - 0x80000169, 0x04058220, 0x02000024, 0x00000002, >> - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, >> - 0x80000140, 0x04258220, 0x02000424, 0xc0ded000, >> + 0x80030161, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000024, 0x00000002, >> + 0x80000140, 0x04058220, 0x02000404, 0x00000000, >> + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, >> 0x80000061, 0x04454220, 0x00000000, 0x00000003, >> 0x80000061, 0x04850220, 0x000000a4, 0x00000000, >> - 0x80049031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x80009031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000101, 0x00010000, 0x00000000, 0x00000000, >> @@ -499,77 +495,77 @@ struct iga64_template const iga64_code_media_block_write_aip[] = { >> >> struct iga64_template const iga64_code_common_target_write[] = { >> { .gen_ver = 2000, .size = 48, .code = (const uint32_t []) { >> - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80100061, 0x1f054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, >> 0x80000061, 0x1f154220, 0x00000000, 0xc0ded002, >> 0x80000061, 0x1f254220, 0x00000000, 0xc0ded003, >> 0x80000061, 0x1f354220, 0x00000000, 0xc0ded004, >> + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1e654220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e754220, 0x00000000, 0x0000000f, >> - 0x80132031, 0x00000000, 0xd00e1e94, 0x04000000, >> + 0x80032031, 0x00000000, 0xd00e1e94, 0x04000000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 1270, .size = 56, .code = (const uint32_t []) { >> - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80040061, 0x1f054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, >> 0x80000061, 0x1f254220, 0x00000000, 0xc0ded002, >> 0x80000061, 0x1f454220, 0x00000000, 0xc0ded003, >> 0x80000061, 0x1f654220, 0x00000000, 0xc0ded004, >> + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e454220, 0x00000000, 0x0000000f, >> 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x80044031, 0x00000000, 0xc0001e14, 0x02a00000, >> + 0x80004031, 0x00000000, 0xc0001e14, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 1260, .size = 52, .code = (const uint32_t []) { >> - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80100061, 0x1f054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, >> 0x80000061, 0x1f154220, 0x00000000, 0xc0ded002, >> 0x80000061, 0x1f254220, 0x00000000, 0xc0ded003, >> 0x80000061, 0x1f354220, 0x00000000, 0xc0ded004, >> + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1e154220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e254220, 0x00000000, 0x0000000f, >> 0x80000061, 0x1e450220, 0x00000054, 0x00000000, >> - 0x80132031, 0x00000000, 0xc0001e14, 0x02a00000, >> + 0x80032031, 0x00000000, 0xc0001e14, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 1250, .size = 56, .code = (const uint32_t []) { >> - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80040061, 0x1f054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, >> 0x80000061, 0x1f254220, 0x00000000, 0xc0ded002, >> 0x80000061, 0x1f454220, 0x00000000, 0xc0ded003, >> 0x80000061, 0x1f654220, 0x00000000, 0xc0ded004, >> + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e454220, 0x00000000, 0x0000000f, >> 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x80044031, 0x00000000, 0xc0001e14, 0x02a00000, >> + 0x80004031, 0x00000000, 0xc0001e14, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 0, .size = 52, .code = (const uint32_t []) { >> - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80040061, 0x1f054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, >> 0x80000061, 0x1f254220, 0x00000000, 0xc0ded002, >> 0x80000061, 0x1f454220, 0x00000000, 0xc0ded003, >> 0x80000061, 0x1f654220, 0x00000000, 0xc0ded004, >> + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e454220, 0x00000000, 0x0000000f, >> 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, >> - 0x80049031, 0x00000000, 0xc0001e14, 0x02a00000, >> + 0x80009031, 0x00000000, 0xc0001e14, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000101, 0x00010000, 0x00000000, 0x00000000, >> @@ -627,56 +623,56 @@ struct iga64_template const iga64_code_clear_r40[] = { >> >> struct iga64_template const iga64_code_jump_dw_neq[] = { >> { .gen_ver = 2000, .size = 32, .code = (const uint32_t []) { >> - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, >> + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1e654220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e754220, 0x00000000, 0x00000003, >> - 0x80132031, 0x1f0c0000, 0xd0061e8c, 0x04000000, >> + 0x80032031, 0x1f0c0000, 0xd0061e8c, 0x04000000, >> 0x80000061, 0x30014220, 0x00000000, 0x00000000, >> 0x80008070, 0x00018220, 0x22001f04, 0xc0ded001, >> 0x84000020, 0x00004000, 0x00000000, 0xffffffa0, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 1270, .size = 40, .code = (const uint32_t []) { >> - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, >> + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e454220, 0x00000000, 0x00000003, >> 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> 0x80000061, 0x30014220, 0x00000000, 0x00000000, >> 0x80002070, 0x00018220, 0x22001f04, 0xc0ded001, >> 0x81000020, 0x00004000, 0x00000000, 0xffffff80, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 1260, .size = 36, .code = (const uint32_t []) { >> - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, >> + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1e154220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e254220, 0x00000000, 0x00000003, >> 0x80000061, 0x1e450220, 0x00000054, 0x00000000, >> - 0x80132031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> + 0x80032031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> 0x80000061, 0x30014220, 0x00000000, 0x00000000, >> 0x80008070, 0x00018220, 0x22001f04, 0xc0ded001, >> 0x84000020, 0x00004000, 0x00000000, 0xffffff90, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 1250, .size = 40, .code = (const uint32_t []) { >> - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, >> + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e454220, 0x00000000, 0x00000003, >> 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> 0x80000061, 0x30014220, 0x00000000, 0x00000000, >> 0x80002070, 0x00018220, 0x22001f04, 0xc0ded001, >> 0x81000020, 0x00004000, 0x00000000, 0xffffff80, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 0, .size = 36, .code = (const uint32_t []) { >> - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, >> + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e454220, 0x00000000, 0x00000003, >> 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, >> - 0x80049031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> + 0x80009031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> 0x80000061, 0x30014220, 0x00000000, 0x00000000, >> 0x80002070, 0x00018220, 0x22001f04, 0xc0ded001, >> 0x81000120, 0x00004000, 0x00000000, 0xffffff90, >> diff --git a/lib/iga64_macros.h b/lib/iga64_macros.h >> index 03cc726d48c2..0fd5e268d957 100644 >> --- a/lib/iga64_macros.h >> +++ b/lib/iga64_macros.h >> @@ -13,4 +13,47 @@ >> #define src1_null null:0 >> #endif >> >> +/* GPGPU_R0Payload fields, Bspec: 55396, 56587 */ >> +#define r0_tgidx r0.1<0;1,0>:ud >> +#define r0_tgidy r0.6<0;1,0>:ud >> +#define r0_fftid r0.5<0;1,0>:ud >> + >> +#define load_shared_media_block_msg_hdr(dst, y, width) \ >> +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ >> +(W) mov (1) dst.1<1>:ud y ;\ >> +(W) mov (1) dst.2<1>:ud (width - 1):ud ;\ >> +(W) mov (1) dst.4<1>:ud r0_fftid >> + >> +#define load_thread_media_block_msg_hdr(dst, x, y, width) \ >> +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ >> +(W) shl (1) dst.0<1>:ud r0_tgidx 0x2:ud ;\ >> +(W) add (1) dst.0<1>:ud dst.0<0;1,0>:ud x:ud ;\ >> +(W) add (1) dst.1<1>:ud r0_tgidy y ;\ >> +(W) mov (1) dst.2<1>:ud (width - 1):ud ;\ >> +(W) mov (1) dst.4<1>:ud r0_fftid >> + >> +#define load_shared_a2dblock_payload(dst, y, width) \ >> +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ >> +(W) mov (1) dst.6<1>:ud y ;\ >> +(W) mov (1) dst.7<1>:ud (width - 1):ud >> + >> +#define load_thread_a2dblock_payload(dst, x, y, width) \ >> +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ >> +(W) shl (1) dst.5<1>:ud r0_tgidx 0x2:ud ;\ >> +(W) add (1) dst.5<1>:ud dst.5<0;1,0>:ud x:ud ;\ >> +(W) add (1) dst.6<1>:ud r0_tgidy y ;\ >> +(W) mov (1) dst.7<1>:ud (width - 1):ud ;\ >> + >> +#if GEN_VER < 2000 >> +#define load_shared_space_addr(dst, y, width) load_shared_media_block_msg_hdr(dst, y, width) >> +#define load_thread_space_addr(dst, x, y, width) load_thread_media_block_msg_hdr(dst, x, y, width) >> +#define load_space_dw(dst, src) send.dc1 (1) dst src src1_null 0x0 0x2190000 >> +#define store_space_dw(dst, src) send.dc1 (1) null dst null 0x0 0x40A8000 >> +#else >> +#define load_shared_space_addr(dst, y, width) load_shared_a2dblock_payload(dst, y, width) >> +#define load_thread_space_addr(dst, x, y, width) load_thread_a2dblock_payload(dst, x, y, width) >> +#define load_space_dw(dst, src) send.tgm (1) dst src null:0 0x0 0x62100003 >> +#define store_space_dw(dst, src) send.tgm (1) null dst null:0 0x0 0x64000007 >> +#endif >> + >> #endif >> >> -- >> 2.34.1 >> ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/2] lib/gpgpu_shader: simplify load/store shaders 2024-11-14 10:31 ` [PATCH 2/2] lib/gpgpu_shader: simplify load/store shaders Andrzej Hajda 2024-11-14 11:28 ` Zbigniew Kempczyński @ 2024-11-14 14:05 ` Grzegorzek, Dominik 2024-11-14 16:24 ` Hajda, Andrzej 1 sibling, 1 reply; 14+ messages in thread From: Grzegorzek, Dominik @ 2024-11-14 14:05 UTC (permalink / raw) To: igt-dev@lists.freedesktop.org, Hajda, Andrzej Cc: Kempczynski, Zbigniew, Mun, Gwan-gyeong, kamil.konieczny@linux.intel.com On Thu, 2024-11-14 at 11:31 +0100, Andrzej Hajda wrote: > There is lot of redundancy in shaders code regarding load/store messages. > It makes the code barely readable. Simplify it by using macros in iga64 > assembler. > Every load/store operation is split into two phases: > 1. Load address/descriptor (from) where data should be stored/loaded. > 2. Issue load/store instruction. > Shader threads needs two types of memory access: > 3. Private area per thread. > 4. Area shared per all threads. > Different platforms access surface in different ways: > 5. Using media block messages. > 6. Using untyped 2d block messages. > 7. Future platforms will use different messages. > > All this is simplified to two macros per message in shader: > load_(shared|thread)_space_addr(dst,y,width) > (load|store)_space_dw(dst, src) > > Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com> > --- > lib/gpgpu_shader.c | 160 +++------------------ > lib/iga64_generated_codes.c | 338 ++++++++++++++++++++++---------------------- > lib/iga64_macros.h | 43 ++++++ > 3 files changed, 230 insertions(+), 311 deletions(-) > > diff --git a/lib/gpgpu_shader.c b/lib/gpgpu_shader.c > index 4e1b8d5e9009..7728f96bf305 100644 > --- a/lib/gpgpu_shader.c > +++ b/lib/gpgpu_shader.c > @@ -431,22 +431,8 @@ void gpgpu_shader__jump_neq(struct gpgpu_shader *shdr, int label_id, > > size = emit_iga64_code(shdr, jump_dw_neq, " \n\ > L0: \n\ > -(W) mov (16|M0) r30.0<1>:ud 0x0:ud \n\ > -#if GEN_VER < 2000 // Media Block Write \n\ > - // Y offset of the block in rows := thread group id Y \n\ > -(W) mov (1|M0) r30.1<1>:ud ARG(0):ud \n\ > - // block width [0,63] representing 1 to 64 bytes, we want dword \n\ > -(W) mov (1|M0) r30.2<1>:ud 0x3:ud \n\ > - // FFTID := FFTID from R0 header \n\ > -(W) mov (1|M0) r30.4<1>:ud r0.5<0;1,0>:ud \n\ > -(W) send.dc1 (16|M0) r31 r30 null 0x0 0x2190000 \n\ > -#else // Typed 2D Block Store \n\ > - // Store X and Y block start (160:191 and 192:223) \n\ > -(W) mov (1|M0) r30.6<1>:ud ARG(0):ud \n\ > - // Store X and Y block size (224:231 and 232:239) \n\ > -(W) mov (1|M0) r30.7<1>:ud 0x3:ud \n\ > -(W) send.tgm (16|M0) r31 r30 null:0 0x0 0x62100003 \n\ > -#endif \n\ > + load_shared_space_addr(r30, ARG(0):ud, 4) \n\ > +(W) load_space_dw(r31, r30) \n\ > // clear the flag register \n\ > (W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ > (W) cmp (1|M0) (ne)f0.0 null<1>:ud r31.0<0;1,0>:ud ARG(1):ud \n\ > @@ -511,28 +497,13 @@ void gpgpu_shader__common_target_write(struct gpgpu_shader *shdr, > uint32_t y_offset, const uint32_t value[4]) > { > emit_iga64_code(shdr, common_target_write, " \n\ > -(W) mov (16|M0) r30.0<1>:ud 0x0:ud \n\ > (W) mov (16|M0) r31.0<1>:ud 0x0:ud \n\ > (W) mov (1|M0) r31.0<1>:ud ARG(1):ud \n\ > (W) mov (1|M0) r31.1<1>:ud ARG(2):ud \n\ > (W) mov (1|M0) r31.2<1>:ud ARG(3):ud \n\ > (W) mov (1|M0) r31.3<1>:ud ARG(4):ud \n\ > -#if GEN_VER < 2000 // Media Block Write \n\ > - // Y offset of the block in rows \n\ > -(W) mov (1|M0) r30.1<1>:ud ARG(0):ud \n\ > - // block width [0,63] representing 1 to 64 bytes \n\ > -(W) mov (1|M0) r30.2<1>:ud 0xf:ud \n\ > - // FFTID := FFTID from R0 header \n\ > -(W) mov (1|M0) r30.4<1>:ud r0.5<0;1,0>:ud \n\ > - // written value \n\ > -(W) send.dc1 (16|M0) null r30 src1_null 0x0 0x40A8000 \n\ > -#else // Typed 2D Block Store \n\ > - // Store X and Y block start (160:191 and 192:223) \n\ > -(W) mov (1|M0) r30.6<1>:ud ARG(0):ud \n\ > - // Store X and Y block size (224:231 and 232:239) \n\ > -(W) mov (1|M0) r30.7<1>:ud 0xf:ud \n\ > -(W) send.tgm (16|M0) null r30 null:0 0x0 0x64000007 \n\ > -#endif \n\ > + load_shared_space_addr(r30, ARG(0):ud, 16) \n\ > +(W) store_space_dw(r30, r31) \n\ > ", y_offset, value[0], value[1], value[2], value[3]); > } > > @@ -565,31 +536,8 @@ void gpgpu_shader__write_aip(struct gpgpu_shader *shdr, uint32_t y_offset) > emit_iga64_code(shdr, media_block_write_aip, " \n\ > // Payload \n\ > (W) mov (1|M0) r5.0<1>:ud cr0.2:ud \n\ > -#if GEN_VER < 2000 // Media Block Write \n\ > - // X offset of the block in bytes := (thread group id X << ARG(0)) \n\ > -(W) shl (1|M0) r4.0<1>:ud r0.1<0;1,0>:ud 0x2:ud \n\ > - // Y offset of the block in rows := thread group id Y \n\ > -(W) mov (1|M0) r4.1<1>:ud r0.6<0;1,0>:ud \n\ > -(W) add (1|M0) r4.1<1>:ud r4.1<0;1,0>:ud ARG(0):ud \n\ > - // block width [0,63] representing 1 to 64 bytes \n\ > -(W) mov (1|M0) r4.2<1>:ud 0x3:ud \n\ > - // FFTID := FFTID from R0 header \n\ > -(W) mov (1|M0) r4.4<1>:ud r0.5<0;1,0>:ud \n\ > -(W) send.dc1 (16|M0) null r4 src1_null 0 0x40A8000 \n\ > -#else // Typed 2D Block Store \n\ > - // Load r2.0-3 with tg id X << ARG(0) \n\ > -(W) shl (1|M0) r2.0<1>:ud r0.1<0;1,0>:ud 0x2:ud \n\ > - // Load r2.4-7 with tg id Y + ARG(1):ud \n\ > -(W) mov (1|M0) r2.1<1>:ud r0.6<0;1,0>:ud \n\ > -(W) add (1|M0) r2.1<1>:ud r2.1<0;1,0>:ud ARG(0):ud \n\ > - // payload setup \n\ > -(W) mov (16|M0) r4.0<1>:ud 0x0:ud \n\ > - // Store X and Y block start (160:191 and 192:223) \n\ > -(W) mov (2|M0) r4.5<1>:ud r2.0<2;2,1>:ud \n\ > - // Store X and Y block max_size (224:231 and 232:239) \n\ > -(W) mov (1|M0) r4.7<1>:ud 0x3:ud \n\ > -(W) send.tgm (16|M0) null r4 null:0 0 0x64000007 \n\ > -#endif \n\ > + load_thread_space_addr(r4, 0, ARG(0):ud, 4) \n\ > +(W) store_space_dw(r4, r5) \n\ > ", y_offset); > } > > @@ -618,38 +566,11 @@ void gpgpu_shader__increase_aip(struct gpgpu_shader *shdr, uint32_t value) > void gpgpu_shader__write_dword(struct gpgpu_shader *shdr, uint32_t value, > uint32_t y_offset) > { > - emit_iga64_code(shdr, media_block_write, " \n\ > - // Clear message header \n\ > -(W) mov (16|M0) r4.0<1>:ud 0x0:ud \n\ > - // Payload \n\ > -(W) mov (1|M0) r5.0<1>:ud ARG(3):ud \n\ > -(W) mov (1|M0) r5.1<1>:ud ARG(4):ud \n\ > -(W) mov (1|M0) r5.2<1>:ud ARG(5):ud \n\ > -(W) mov (1|M0) r5.3<1>:ud ARG(6):ud \n\ > -#if GEN_VER < 2000 // Media Block Write \n\ > - // X offset of the block in bytes := (thread group id X << ARG(0)) \n\ > -(W) shl (1|M0) r4.0<1>:ud r0.1<0;1,0>:ud ARG(0):ud \n\ > - // Y offset of the block in rows := thread group id Y \n\ > -(W) mov (1|M0) r4.1<1>:ud r0.6<0;1,0>:ud \n\ > -(W) add (1|M0) r4.1<1>:ud r4.1<0;1,0>:ud ARG(1):ud \n\ > - // block width [0,63] representing 1 to 64 bytes \n\ > -(W) mov (1|M0) r4.2<1>:ud ARG(2):ud \n\ > - // FFTID := FFTID from R0 header \n\ > -(W) mov (1|M0) r4.4<1>:ud r0.5<0;1,0>:ud \n\ > -(W) send.dc1 (16|M0) null r4 src1_null 0 0x40A8000 \n\ > -#else // Typed 2D Block Store \n\ > - // Load r2.0-3 with tg id X << ARG(0) \n\ > -(W) shl (1|M0) r2.0<1>:ud r0.1<0;1,0>:ud ARG(0):ud \n\ > - // Load r2.4-7 with tg id Y + ARG(1):ud \n\ > -(W) mov (1|M0) r2.1<1>:ud r0.6<0;1,0>:ud \n\ > -(W) add (1|M0) r2.1<1>:ud r2.1<0;1,0>:ud ARG(1):ud \n\ > - // Store X and Y block start (160:191 and 192:223) \n\ > -(W) mov (2|M0) r4.5<1>:ud r2.0<2;2,1>:ud \n\ > - // Store X and Y block max_size (224:231 and 232:239) \n\ > -(W) mov (1|M0) r4.7<1>:ud ARG(2):ud \n\ > -(W) send.tgm (16|M0) null r4 null:0 0 0x64000007 \n\ > -#endif \n\ > - ", 2, y_offset, 3, value, value, value, value); > + emit_iga64_code(shdr, media_block_write, " \n\ > +(W) mov (1) r5.0<1>:ud ARG(1):ud \n\ > + load_thread_space_addr(r4, 0, ARG(0):ud, 4) \n\ > +(W) store_space_dw(r4, r5) \n\ > + ", y_offset, value); > } > > /** > @@ -697,41 +618,14 @@ void gpgpu_shader__write_on_exception(struct gpgpu_shader *shdr, uint32_t value, > uint32_t y_offset, uint32_t mask, uint32_t expected) > { > emit_iga64_code(shdr, write_on_exception, " \n\ > - // Clear message header \n\ > -(W) mov (16|M0) r4.0<1>:ud 0x0:ud \n\ > - // Payload \n\ > -(W) mov (1|M0) r5.0<1>:ud ARG(4):ud \n\ > -#if GEN_VER < 2000 // prepare Media Block Write \n\ > - // X offset of the block in bytes := (thread group id X << ARG(0)) \n\ > -(W) add (1|M0) r4.0<1>:ud r0.1<0;1,0>:ud ARG(1):ud \n\ > -(W) shl (1|M0) r4.0<1>:ud r4.0<0;1,0>:ud ARG(0):ud \n\ > - // Y offset of the block in rows := thread group id Y \n\ > -(W) add (1|M0) r4.1<1>:ud r0.6<0;1,0>:ud ARG(2):ud \n\ > - // block width [0,63] representing 1 to 64 bytes \n\ > -(W) mov (1|M0) r4.2<1>:ud ARG(3):ud \n\ > - // FFTID := FFTID from R0 header \n\ > -(W) mov (1|M0) r4.4<1>:ud r0.5<0;1,0>:ud \n\ > -#else // prepare Typed 2D Block Store \n\ > - // Load r2.0 with tg id (X + ARG(1)) << ARG(0) \n\ > -(W) add (1|M0) r2.0<1>:ud r0.1<0;1,0>:ud ARG(1):ud \n\ > -(W) shl (1|M0) r2.0<1>:ud r2.0<0;1,0>:ud ARG(0):ud \n\ > - // Load r2.4-7 with tg id Y + ARG(2):ud \n\ > -(W) add (1|M0) r2.1<1>:ud r0.6<0;1,0>:ud ARG(2):ud \n\ > - // Store X and Y block start (160:191 and 192:223) \n\ > -(W) mov (2|M0) r4.5<1>:ud r2.0<2;2,1>:ud \n\ > - // Store X and Y block max_size (224:231 and 232:239) \n\ > -(W) mov (1|M0) r4.7<1>:ud ARG(3):ud \n\ > -#endif \n\ > +(W) mov (1|M0) r5.0<1>:ud ARG(2):ud \n\ > + load_thread_space_addr(r4, ARG(0), ARG(1):ud, 4) \n\ > // Check if masked exception is equal to provided value and write conditionally \n\ > -(W) and (1|M0) r3.0<1>:ud cr0.1<0;1,0>:ud ARG(5):ud \n\ > -(W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ > -(W) cmp (1|M0) (eq)f0.0 null:ud r3.0<0;1,0>:ud ARG(6):ud \n\ > -#if GEN_VER < 2000 // Media Block Write \n\ > -(W&f0.0) send.dc1 (16|M0) null r4 src1_null 0 0x40A8000 \n\ > -#else // Typed 2D Block Store \n\ > -(W&f0.0) send.tgm (16|M0) null r4 null:0 0 0x64000007 \n\ > -#endif \n\ > - ", 2, x_offset, y_offset, 3, value, mask, expected); > +(W) and (1|M0) r3.0<1>:ud cr0.1<0;1,0>:ud ARG(3):ud \n\ > +(W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ > +(W) cmp (1|M0) (eq)f0.0 null:ud r3.0<0;1,0>:ud ARG(4):ud \n\ > +(W&f0.0) store_space_dw(r4, r5) \n\ > + ", 4 * x_offset, y_offset, value, mask, expected); > } > > /** > @@ -778,22 +672,8 @@ void gpgpu_shader__end_system_routine_step_if_eq(struct gpgpu_shader *shdr, > emit_iga64_code(shdr, end_system_routine_step_if_eq, " \n\ > (W) or (1|M0) cr0.0<1>:ud cr0.0<0;1,0>:ud 0x8000:ud \n\ > (W) and (1|M0) cr0.1<1>:ud cr0.1<0;1,0>:ud ARG(0):ud \n\ > -(W) mov (16|M0) r30.0<1>:ud 0x0:ud \n\ > -#if GEN_VER < 2000 // Media Block Write \n\ > - // Y offset of the block in rows := thread group id Y \n\ > -(W) mov (1|M0) r30.1<1>:ud ARG(1):ud \n\ > - // block width [0,63] representing 1 to 64 bytes, we want dword \n\ > -(W) mov (1|M0) r30.2<1>:ud 0x3:ud \n\ > - // FFTID := FFTID from R0 header \n\ > -(W) mov (1|M0) r30.4<1>:ud r0.5<0;1,0>:ud \n\ > -(W) send.dc1 (16|M0) r31 r30 null 0x0 0x2190000 \n\ > -#else // Typed 2D Block Store \n\ > - // Store X and Y block start (160:191 and 192:223) \n\ > -(W) mov (1|M0) r30.6<1>:ud ARG(1):ud \n\ > - // Store X and Y block size (224:231 and 232:239) \n\ > -(W) mov (1|M0) r30.7<1>:ud 0x3:ud \n\ > -(W) send.tgm (16|M0) r31 r30 null:0 0x0 0x62100003 \n\ > -#endif \n\ > + load_thread_space_addr(r30, 0, ARG(0):ud, 4) \n\ > +(W) load_space_dw(r31, r30) \n\ > // clear the flag register \n\ > (W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ > (W) cmp (1|M0) (ne)f0.0 null<1>:ud r31.0<0;1,0>:ud ARG(2):ud \n\ > diff --git a/lib/iga64_generated_codes.c b/lib/iga64_generated_codes.c > index 0bd92b8c4dc9..017adefce400 100644 > --- a/lib/iga64_generated_codes.c > +++ b/lib/iga64_generated_codes.c > @@ -3,7 +3,7 @@ > > #include "gpgpu_shader.h" > > -#define MD5_SUM_IGA64_ASMS e2d97ef45d5f322200793a0aa76872d7 > +#define MD5_SUM_IGA64_ASMS fa1b0aa75c3ee1cd13300ad1324737b4 > > struct iga64_template const iga64_code_gpgpu_fill[] = { > { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { > @@ -80,71 +80,81 @@ struct iga64_template const iga64_code_gpgpu_fill[] = { > }; > > struct iga64_template const iga64_code_end_system_routine_step_if_eq[] = { > - { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { > + { .gen_ver = 2000, .size = 52, .code = (const uint32_t []) { > 0x80000966, 0x80018220, 0x02008000, 0x00008000, > 0x80000965, 0x80118220, 0x02008010, 0xc0ded000, > - 0x80100961, 0x1e054220, 0x00000000, 0x00000000, > - 0x80000061, 0x1e654220, 0x00000000, 0xc0ded001, > + 0x800c0961, 0x1e054220, 0x00000000, 0x00000000, > + 0x80000069, 0x1e558220, 0x02000014, 0x00000002, > + 0x80001940, 0x1e558220, 0x02001e54, 0x00000000, > + 0x80000040, 0x1e658220, 0x02000064, 0xc0ded000, > 0x80000061, 0x1e754220, 0x00000000, 0x00000003, > - 0x80132031, 0x1f0c0000, 0xd0061e8c, 0x04000000, > + 0x80032031, 0x1f0c0000, 0xd0061e8c, 0x04000000, > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > 0x80008070, 0x00018220, 0x22001f04, 0xc0ded002, > 0x84000965, 0x80118220, 0x02008010, 0xc0ded003, > 0x80000965, 0x80018220, 0x02008000, 0x7ffffffd, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > - { .gen_ver = 1270, .size = 52, .code = (const uint32_t []) { > + { .gen_ver = 1270, .size = 60, .code = (const uint32_t []) { > 0x80000966, 0x80018220, 0x02008000, 0x00008000, > 0x80000965, 0x80218220, 0x02008020, 0xc0ded000, > - 0x80040961, 0x1e054220, 0x00000000, 0x00000000, > - 0x80000061, 0x1e254220, 0x00000000, 0xc0ded001, > + 0x80030961, 0x1e054220, 0x00000000, 0x00000000, > + 0x80000069, 0x1e058220, 0x02000024, 0x00000002, > + 0x80001940, 0x1e058220, 0x02001e04, 0x00000000, > + 0x80000040, 0x1e258220, 0x020000c4, 0xc0ded000, > 0x80000061, 0x1e454220, 0x00000000, 0x00000003, > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > 0x80002070, 0x00018220, 0x22001f04, 0xc0ded002, > 0x81000965, 0x80218220, 0x02008020, 0xc0ded003, > 0x80000965, 0x80018220, 0x02008000, 0x7ffffffd, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > - { .gen_ver = 1260, .size = 48, .code = (const uint32_t []) { > + { .gen_ver = 1260, .size = 56, .code = (const uint32_t []) { > 0x80000966, 0x80018220, 0x02008000, 0x00008000, > 0x80000965, 0x80118220, 0x02008010, 0xc0ded000, > - 0x80100961, 0x1e054220, 0x00000000, 0x00000000, > - 0x80000061, 0x1e154220, 0x00000000, 0xc0ded001, > + 0x800c0961, 0x1e054220, 0x00000000, 0x00000000, > + 0x80000069, 0x1e058220, 0x02000014, 0x00000002, > + 0x80001940, 0x1e058220, 0x02001e04, 0x00000000, > + 0x80000040, 0x1e158220, 0x02000064, 0xc0ded000, > 0x80000061, 0x1e254220, 0x00000000, 0x00000003, > 0x80000061, 0x1e450220, 0x00000054, 0x00000000, > - 0x80132031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > + 0x80032031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > 0x80008070, 0x00018220, 0x22001f04, 0xc0ded002, > 0x84000965, 0x80118220, 0x02008010, 0xc0ded003, > 0x80000965, 0x80018220, 0x02008000, 0x7ffffffd, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > - { .gen_ver = 1250, .size = 52, .code = (const uint32_t []) { > + { .gen_ver = 1250, .size = 60, .code = (const uint32_t []) { > 0x80000966, 0x80018220, 0x02008000, 0x00008000, > 0x80000965, 0x80218220, 0x02008020, 0xc0ded000, > - 0x80040961, 0x1e054220, 0x00000000, 0x00000000, > - 0x80000061, 0x1e254220, 0x00000000, 0xc0ded001, > + 0x80030961, 0x1e054220, 0x00000000, 0x00000000, > + 0x80000069, 0x1e058220, 0x02000024, 0x00000002, > + 0x80001940, 0x1e058220, 0x02001e04, 0x00000000, > + 0x80000040, 0x1e258220, 0x020000c4, 0xc0ded000, > 0x80000061, 0x1e454220, 0x00000000, 0x00000003, > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > 0x80002070, 0x00018220, 0x22001f04, 0xc0ded002, > 0x81000965, 0x80218220, 0x02008020, 0xc0ded003, > 0x80000965, 0x80018220, 0x02008000, 0x7ffffffd, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > - { .gen_ver = 0, .size = 48, .code = (const uint32_t []) { > + { .gen_ver = 0, .size = 56, .code = (const uint32_t []) { > 0x80000166, 0x80018220, 0x02008000, 0x00008000, > 0x80000165, 0x80218220, 0x02008020, 0xc0ded000, > - 0x80040161, 0x1e054220, 0x00000000, 0x00000000, > - 0x80000061, 0x1e254220, 0x00000000, 0xc0ded001, > + 0x80030161, 0x1e054220, 0x00000000, 0x00000000, > + 0x80000069, 0x1e058220, 0x02000024, 0x00000002, > + 0x80000140, 0x1e058220, 0x02001e04, 0x00000000, > + 0x80000040, 0x1e258220, 0x020000c4, 0xc0ded000, > 0x80000061, 0x1e454220, 0x00000000, 0x00000003, > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > - 0x80049031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > + 0x80009031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > 0x80002070, 0x00018220, 0x22001f04, 0xc0ded002, > 0x81000165, 0x80218220, 0x02008020, 0xc0ded003, > @@ -193,84 +203,83 @@ struct iga64_template const iga64_code_breakpoint_suppress[] = { > }; > > struct iga64_template const iga64_code_write_on_exception[] = { > - { .gen_ver = 2000, .size = 56, .code = (const uint32_t []) { > - 0x80100061, 0x04054220, 0x00000000, 0x00000000, > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, > - 0x80000040, 0x02058220, 0x02000014, 0xc0ded001, > - 0x80001969, 0x02058220, 0x02000204, 0xc0ded000, > - 0x80000040, 0x02158220, 0x02000064, 0xc0ded002, > - 0x80041961, 0x04550220, 0x00220205, 0x00000000, > - 0x80000061, 0x04754220, 0x00000000, 0xc0ded003, > - 0x80000965, 0x03058220, 0x02008010, 0xc0ded005, > + { .gen_ver = 2000, .size = 52, .code = (const uint32_t []) { > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, > + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04558220, 0x02000014, 0x00000002, > + 0x80001940, 0x04558220, 0x02000454, 0xc0ded000, > + 0x80000040, 0x04658220, 0x02000064, 0xc0ded001, > + 0x80000061, 0x04754220, 0x00000000, 0x00000003, > + 0x80000965, 0x03058220, 0x02008010, 0xc0ded003, > 0x80000961, 0x30014220, 0x00000000, 0x00000000, > - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, > - 0x84132031, 0x00000000, 0xd00e0494, 0x04000000, > + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, > + 0x84032031, 0x00000000, 0xd00e0494, 0x04000000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 1270, .size = 60, .code = (const uint32_t []) { > - 0x80040061, 0x04054220, 0x00000000, 0x00000000, > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, > - 0x80000040, 0x04058220, 0x02000024, 0xc0ded001, > - 0x80001969, 0x04058220, 0x02000404, 0xc0ded000, > - 0x80000040, 0x04258220, 0x020000c4, 0xc0ded002, > - 0x80000061, 0x04454220, 0x00000000, 0xc0ded003, > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, > + 0x80030061, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > + 0x80001940, 0x04058220, 0x02000404, 0xc0ded000, > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded001, > + 0x80000061, 0x04454220, 0x00000000, 0x00000003, > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > - 0x80000965, 0x03058220, 0x02008020, 0xc0ded005, > + 0x80000965, 0x03058220, 0x02008020, 0xc0ded003, > 0x80000961, 0x30014220, 0x00000000, 0x00000000, > - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, > + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x81044031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x81004031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 1260, .size = 56, .code = (const uint32_t []) { > - 0x80100061, 0x04054220, 0x00000000, 0x00000000, > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, > - 0x80000040, 0x04058220, 0x02000014, 0xc0ded001, > - 0x80001969, 0x04058220, 0x02000404, 0xc0ded000, > - 0x80000040, 0x04158220, 0x02000064, 0xc0ded002, > - 0x80000061, 0x04254220, 0x00000000, 0xc0ded003, > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, > + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000014, 0x00000002, > + 0x80001940, 0x04058220, 0x02000404, 0xc0ded000, > + 0x80000040, 0x04158220, 0x02000064, 0xc0ded001, > + 0x80000061, 0x04254220, 0x00000000, 0x00000003, > 0x80000061, 0x04450220, 0x00000054, 0x00000000, > - 0x80000965, 0x03058220, 0x02008010, 0xc0ded005, > + 0x80000965, 0x03058220, 0x02008010, 0xc0ded003, > 0x80000961, 0x30014220, 0x00000000, 0x00000000, > - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, > - 0x84132031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, > + 0x84032031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 1250, .size = 60, .code = (const uint32_t []) { > - 0x80040061, 0x04054220, 0x00000000, 0x00000000, > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, > - 0x80000040, 0x04058220, 0x02000024, 0xc0ded001, > - 0x80001969, 0x04058220, 0x02000404, 0xc0ded000, > - 0x80000040, 0x04258220, 0x020000c4, 0xc0ded002, > - 0x80000061, 0x04454220, 0x00000000, 0xc0ded003, > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, > + 0x80030061, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > + 0x80001940, 0x04058220, 0x02000404, 0xc0ded000, > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded001, > + 0x80000061, 0x04454220, 0x00000000, 0x00000003, > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > - 0x80000965, 0x03058220, 0x02008020, 0xc0ded005, > + 0x80000965, 0x03058220, 0x02008020, 0xc0ded003, > 0x80000961, 0x30014220, 0x00000000, 0x00000000, > - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, > + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x81044031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x81004031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 0, .size = 56, .code = (const uint32_t []) { > - 0x80040061, 0x04054220, 0x00000000, 0x00000000, > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, > - 0x80000040, 0x04058220, 0x02000024, 0xc0ded001, > - 0x80000169, 0x04058220, 0x02000404, 0xc0ded000, > - 0x80000040, 0x04258220, 0x020000c4, 0xc0ded002, > - 0x80000061, 0x04454220, 0x00000000, 0xc0ded003, > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, > + 0x80030061, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > + 0x80000140, 0x04058220, 0x02000404, 0xc0ded000, > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded001, > + 0x80000061, 0x04454220, 0x00000000, 0x00000003, > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > - 0x80000165, 0x03058220, 0x02008020, 0xc0ded005, > + 0x80000165, 0x03058220, 0x02008020, 0xc0ded003, > 0x80000161, 0x30014220, 0x00000000, 0x00000000, > - 0x80000270, 0x00018220, 0x12000304, 0xc0ded006, > - 0x81049031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x80000270, 0x00018220, 0x12000304, 0xc0ded004, > + 0x81009031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000101, 0x00010000, 0x00000000, 0x00000000, > @@ -324,84 +333,68 @@ struct iga64_template const iga64_code_clear_exception[] = { > }; > > struct iga64_template const iga64_code_media_block_write[] = { > - { .gen_ver = 2000, .size = 56, .code = (const uint32_t []) { > - 0x80100061, 0x04054220, 0x00000000, 0x00000000, > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, > - 0x80000061, 0x05154220, 0x00000000, 0xc0ded004, > - 0x80000061, 0x05254220, 0x00000000, 0xc0ded005, > - 0x80000061, 0x05354220, 0x00000000, 0xc0ded006, > - 0x80000069, 0x02058220, 0x02000014, 0xc0ded000, > - 0x80000061, 0x02150220, 0x00000064, 0x00000000, > - 0x80001940, 0x02158220, 0x02000214, 0xc0ded001, > - 0x80041961, 0x04550220, 0x00220205, 0x00000000, > - 0x80000061, 0x04754220, 0x00000000, 0xc0ded002, > - 0x80132031, 0x00000000, 0xd00e0494, 0x04000000, > + { .gen_ver = 2000, .size = 40, .code = (const uint32_t []) { > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, > + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04558220, 0x02000014, 0x00000002, > + 0x80001940, 0x04558220, 0x02000454, 0x00000000, > + 0x80000040, 0x04658220, 0x02000064, 0xc0ded000, > + 0x80000061, 0x04754220, 0x00000000, 0x00000003, > + 0x80032031, 0x00000000, 0xd00e0494, 0x04000000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > - { .gen_ver = 1270, .size = 60, .code = (const uint32_t []) { > - 0x80040061, 0x04054220, 0x00000000, 0x00000000, > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, > - 0x80000061, 0x05254220, 0x00000000, 0xc0ded004, > - 0x80000061, 0x05454220, 0x00000000, 0xc0ded005, > - 0x80000061, 0x05654220, 0x00000000, 0xc0ded006, > - 0x80000069, 0x04058220, 0x02000024, 0xc0ded000, > - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, > - 0x80001940, 0x04258220, 0x02000424, 0xc0ded001, > - 0x80000061, 0x04454220, 0x00000000, 0xc0ded002, > + { .gen_ver = 1270, .size = 48, .code = (const uint32_t []) { > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, > + 0x80030061, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > + 0x80001940, 0x04058220, 0x02000404, 0x00000000, > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, > + 0x80000061, 0x04454220, 0x00000000, 0x00000003, > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > - { .gen_ver = 1260, .size = 56, .code = (const uint32_t []) { > - 0x80100061, 0x04054220, 0x00000000, 0x00000000, > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, > - 0x80000061, 0x05154220, 0x00000000, 0xc0ded004, > - 0x80000061, 0x05254220, 0x00000000, 0xc0ded005, > - 0x80000061, 0x05354220, 0x00000000, 0xc0ded006, > - 0x80000069, 0x04058220, 0x02000014, 0xc0ded000, > - 0x80000061, 0x04150220, 0x00000064, 0x00000000, > - 0x80001940, 0x04158220, 0x02000414, 0xc0ded001, > - 0x80000061, 0x04254220, 0x00000000, 0xc0ded002, > + { .gen_ver = 1260, .size = 44, .code = (const uint32_t []) { > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, > + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000014, 0x00000002, > + 0x80001940, 0x04058220, 0x02000404, 0x00000000, > + 0x80000040, 0x04158220, 0x02000064, 0xc0ded000, > + 0x80000061, 0x04254220, 0x00000000, 0x00000003, > 0x80000061, 0x04450220, 0x00000054, 0x00000000, > - 0x80132031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x80032031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > - { .gen_ver = 1250, .size = 60, .code = (const uint32_t []) { > - 0x80040061, 0x04054220, 0x00000000, 0x00000000, > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, > - 0x80000061, 0x05254220, 0x00000000, 0xc0ded004, > - 0x80000061, 0x05454220, 0x00000000, 0xc0ded005, > - 0x80000061, 0x05654220, 0x00000000, 0xc0ded006, > - 0x80000069, 0x04058220, 0x02000024, 0xc0ded000, > - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, > - 0x80001940, 0x04258220, 0x02000424, 0xc0ded001, > - 0x80000061, 0x04454220, 0x00000000, 0xc0ded002, > + { .gen_ver = 1250, .size = 48, .code = (const uint32_t []) { > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, > + 0x80030061, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > + 0x80001940, 0x04058220, 0x02000404, 0x00000000, > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, > + 0x80000061, 0x04454220, 0x00000000, 0x00000003, > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > - { .gen_ver = 0, .size = 56, .code = (const uint32_t []) { > - 0x80040061, 0x04054220, 0x00000000, 0x00000000, > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, > - 0x80000061, 0x05254220, 0x00000000, 0xc0ded004, > - 0x80000061, 0x05454220, 0x00000000, 0xc0ded005, > - 0x80000061, 0x05654220, 0x00000000, 0xc0ded006, > - 0x80000069, 0x04058220, 0x02000024, 0xc0ded000, > - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, > - 0x80000140, 0x04258220, 0x02000424, 0xc0ded001, > - 0x80000061, 0x04454220, 0x00000000, 0xc0ded002, > + { .gen_ver = 0, .size = 44, .code = (const uint32_t []) { > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, > + 0x80030061, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > + 0x80000140, 0x04058220, 0x02000404, 0x00000000, > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, > + 0x80000061, 0x04454220, 0x00000000, 0x00000003, > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > - 0x80049031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x80009031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000101, 0x00010000, 0x00000000, 0x00000000, > @@ -432,65 +425,68 @@ struct iga64_template const iga64_code_write_aip[] = { > }; > > struct iga64_template const iga64_code_media_block_write_aip[] = { > - { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { > + { .gen_ver = 2000, .size = 40, .code = (const uint32_t []) { > 0x80000961, 0x05050220, 0x00008020, 0x00000000, > - 0x80000969, 0x02058220, 0x02000014, 0x00000002, > - 0x80000061, 0x02150220, 0x00000064, 0x00000000, > - 0x80001940, 0x02158220, 0x02000214, 0xc0ded000, > - 0x80100061, 0x04054220, 0x00000000, 0x00000000, > - 0x80041a61, 0x04550220, 0x00220205, 0x00000000, > + 0x800c0961, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04558220, 0x02000014, 0x00000002, > + 0x80001940, 0x04558220, 0x02000454, 0x00000000, > + 0x80000040, 0x04658220, 0x02000064, 0xc0ded000, > 0x80000061, 0x04754220, 0x00000000, 0x00000003, > - 0x80132031, 0x00000000, 0xd00e0494, 0x04000000, > + 0x80032031, 0x00000000, 0xd00e0494, 0x04000000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > - { .gen_ver = 1270, .size = 44, .code = (const uint32_t []) { > + { .gen_ver = 1270, .size = 48, .code = (const uint32_t []) { > 0x80000961, 0x05050220, 0x00008040, 0x00000000, > - 0x80000969, 0x04058220, 0x02000024, 0x00000002, > - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, > - 0x80001940, 0x04258220, 0x02000424, 0xc0ded000, > + 0x80030961, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > + 0x80001940, 0x04058220, 0x02000404, 0x00000000, > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, > 0x80000061, 0x04454220, 0x00000000, 0x00000003, > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > - { .gen_ver = 1260, .size = 40, .code = (const uint32_t []) { > + { .gen_ver = 1260, .size = 44, .code = (const uint32_t []) { > 0x80000961, 0x05050220, 0x00008020, 0x00000000, > - 0x80000969, 0x04058220, 0x02000014, 0x00000002, > - 0x80000061, 0x04150220, 0x00000064, 0x00000000, > - 0x80001940, 0x04158220, 0x02000414, 0xc0ded000, > + 0x800c0961, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000014, 0x00000002, > + 0x80001940, 0x04058220, 0x02000404, 0x00000000, > + 0x80000040, 0x04158220, 0x02000064, 0xc0ded000, > 0x80000061, 0x04254220, 0x00000000, 0x00000003, > 0x80000061, 0x04450220, 0x00000054, 0x00000000, > - 0x80132031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x80032031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > - { .gen_ver = 1250, .size = 44, .code = (const uint32_t []) { > + { .gen_ver = 1250, .size = 48, .code = (const uint32_t []) { > 0x80000961, 0x05050220, 0x00008040, 0x00000000, > - 0x80000969, 0x04058220, 0x02000024, 0x00000002, > - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, > - 0x80001940, 0x04258220, 0x02000424, 0xc0ded000, > + 0x80030961, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > + 0x80001940, 0x04058220, 0x02000404, 0x00000000, > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, > 0x80000061, 0x04454220, 0x00000000, 0x00000003, > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > - { .gen_ver = 0, .size = 40, .code = (const uint32_t []) { > + { .gen_ver = 0, .size = 44, .code = (const uint32_t []) { > 0x80000161, 0x05050220, 0x00008040, 0x00000000, > - 0x80000169, 0x04058220, 0x02000024, 0x00000002, > - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, > - 0x80000140, 0x04258220, 0x02000424, 0xc0ded000, > + 0x80030161, 0x04054220, 0x00000000, 0x00000000, > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > + 0x80000140, 0x04058220, 0x02000404, 0x00000000, > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, > 0x80000061, 0x04454220, 0x00000000, 0x00000003, > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > - 0x80049031, 0x00000000, 0xc0000414, 0x02a00000, > + 0x80009031, 0x00000000, 0xc0000414, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000101, 0x00010000, 0x00000000, 0x00000000, > @@ -499,77 +495,77 @@ struct iga64_template const iga64_code_media_block_write_aip[] = { > > struct iga64_template const iga64_code_common_target_write[] = { > { .gen_ver = 2000, .size = 48, .code = (const uint32_t []) { > - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, > 0x80100061, 0x1f054220, 0x00000000, 0x00000000, > 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, > 0x80000061, 0x1f154220, 0x00000000, 0xc0ded002, > 0x80000061, 0x1f254220, 0x00000000, 0xc0ded003, > 0x80000061, 0x1f354220, 0x00000000, 0xc0ded004, > + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, > 0x80000061, 0x1e654220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e754220, 0x00000000, 0x0000000f, > - 0x80132031, 0x00000000, 0xd00e1e94, 0x04000000, > + 0x80032031, 0x00000000, 0xd00e1e94, 0x04000000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 1270, .size = 56, .code = (const uint32_t []) { > - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, > 0x80040061, 0x1f054220, 0x00000000, 0x00000000, > 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, > 0x80000061, 0x1f254220, 0x00000000, 0xc0ded002, > 0x80000061, 0x1f454220, 0x00000000, 0xc0ded003, > 0x80000061, 0x1f654220, 0x00000000, 0xc0ded004, > + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, > 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e454220, 0x00000000, 0x0000000f, > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x80044031, 0x00000000, 0xc0001e14, 0x02a00000, > + 0x80004031, 0x00000000, 0xc0001e14, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 1260, .size = 52, .code = (const uint32_t []) { > - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, > 0x80100061, 0x1f054220, 0x00000000, 0x00000000, > 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, > 0x80000061, 0x1f154220, 0x00000000, 0xc0ded002, > 0x80000061, 0x1f254220, 0x00000000, 0xc0ded003, > 0x80000061, 0x1f354220, 0x00000000, 0xc0ded004, > + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, > 0x80000061, 0x1e154220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e254220, 0x00000000, 0x0000000f, > 0x80000061, 0x1e450220, 0x00000054, 0x00000000, > - 0x80132031, 0x00000000, 0xc0001e14, 0x02a00000, > + 0x80032031, 0x00000000, 0xc0001e14, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 1250, .size = 56, .code = (const uint32_t []) { > - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, > 0x80040061, 0x1f054220, 0x00000000, 0x00000000, > 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, > 0x80000061, 0x1f254220, 0x00000000, 0xc0ded002, > 0x80000061, 0x1f454220, 0x00000000, 0xc0ded003, > 0x80000061, 0x1f654220, 0x00000000, 0xc0ded004, > + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, > 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e454220, 0x00000000, 0x0000000f, > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x80044031, 0x00000000, 0xc0001e14, 0x02a00000, > + 0x80004031, 0x00000000, 0xc0001e14, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 0, .size = 52, .code = (const uint32_t []) { > - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, > 0x80040061, 0x1f054220, 0x00000000, 0x00000000, > 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, > 0x80000061, 0x1f254220, 0x00000000, 0xc0ded002, > 0x80000061, 0x1f454220, 0x00000000, 0xc0ded003, > 0x80000061, 0x1f654220, 0x00000000, 0xc0ded004, > + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, > 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e454220, 0x00000000, 0x0000000f, > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > - 0x80049031, 0x00000000, 0xc0001e14, 0x02a00000, > + 0x80009031, 0x00000000, 0xc0001e14, 0x02a00000, > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > 0x80000101, 0x00010000, 0x00000000, 0x00000000, > @@ -627,56 +623,56 @@ struct iga64_template const iga64_code_clear_r40[] = { > > struct iga64_template const iga64_code_jump_dw_neq[] = { > { .gen_ver = 2000, .size = 32, .code = (const uint32_t []) { > - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, > + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, > 0x80000061, 0x1e654220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e754220, 0x00000000, 0x00000003, > - 0x80132031, 0x1f0c0000, 0xd0061e8c, 0x04000000, > + 0x80032031, 0x1f0c0000, 0xd0061e8c, 0x04000000, > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > 0x80008070, 0x00018220, 0x22001f04, 0xc0ded001, > 0x84000020, 0x00004000, 0x00000000, 0xffffffa0, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 1270, .size = 40, .code = (const uint32_t []) { > - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, > + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, > 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e454220, 0x00000000, 0x00000003, > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > 0x80002070, 0x00018220, 0x22001f04, 0xc0ded001, > 0x81000020, 0x00004000, 0x00000000, 0xffffff80, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 1260, .size = 36, .code = (const uint32_t []) { > - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, > + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, > 0x80000061, 0x1e154220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e254220, 0x00000000, 0x00000003, > 0x80000061, 0x1e450220, 0x00000054, 0x00000000, > - 0x80132031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > + 0x80032031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > 0x80008070, 0x00018220, 0x22001f04, 0xc0ded001, > 0x84000020, 0x00004000, 0x00000000, 0xffffff90, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 1250, .size = 40, .code = (const uint32_t []) { > - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, > + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, > 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e454220, 0x00000000, 0x00000003, > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > 0x80002070, 0x00018220, 0x22001f04, 0xc0ded001, > 0x81000020, 0x00004000, 0x00000000, 0xffffff80, > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > }}, > { .gen_ver = 0, .size = 36, .code = (const uint32_t []) { > - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, > + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, > 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > 0x80000061, 0x1e454220, 0x00000000, 0x00000003, > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > - 0x80049031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > + 0x80009031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > 0x80002070, 0x00018220, 0x22001f04, 0xc0ded001, > 0x81000120, 0x00004000, 0x00000000, 0xffffff90, > diff --git a/lib/iga64_macros.h b/lib/iga64_macros.h > index 03cc726d48c2..0fd5e268d957 100644 > --- a/lib/iga64_macros.h > +++ b/lib/iga64_macros.h > @@ -13,4 +13,47 @@ > #define src1_null null:0 > #endif > > +/* GPGPU_R0Payload fields, Bspec: 55396, 56587 */ > +#define r0_tgidx r0.1<0;1,0>:ud > +#define r0_tgidy r0.6<0;1,0>:ud > +#define r0_fftid r0.5<0;1,0>:ud > + > +#define load_shared_media_block_msg_hdr(dst, y, width) \ > +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ > +(W) mov (1) dst.1<1>:ud y ;\ > +(W) mov (1) dst.2<1>:ud (width - 1):ud ;\ > +(W) mov (1) dst.4<1>:ud r0_fftid > + > +#define load_thread_media_block_msg_hdr(dst, x, y, width) \ > +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ > +(W) shl (1) dst.0<1>:ud r0_tgidx 0x2:ud ;\ > +(W) add (1) dst.0<1>:ud dst.0<0;1,0>:ud x:ud ;\ > +(W) add (1) dst.1<1>:ud r0_tgidy y ;\ > +(W) mov (1) dst.2<1>:ud (width - 1):ud ;\ > +(W) mov (1) dst.4<1>:ud r0_fftid > + > +#define load_shared_a2dblock_payload(dst, y, width) \ > +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ > +(W) mov (1) dst.6<1>:ud y ;\ > +(W) mov (1) dst.7<1>:ud (width - 1):ud > + > +#define load_thread_a2dblock_payload(dst, x, y, width) \ > +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ > +(W) shl (1) dst.5<1>:ud r0_tgidx 0x2:ud ;\ > +(W) add (1) dst.5<1>:ud dst.5<0;1,0>:ud x:ud ;\ > +(W) add (1) dst.6<1>:ud r0_tgidy y ;\ > +(W) mov (1) dst.7<1>:ud (width - 1):ud ;\ > + > +#if GEN_VER < 2000 > +#define load_shared_space_addr(dst, y, width) load_shared_media_block_msg_hdr(dst, y, width) > +#define load_thread_space_addr(dst, x, y, width) load_thread_media_block_msg_hdr(dst, x, y, width) > +#define load_space_dw(dst, src) send.dc1 (1) dst src src1_null 0x0 0x2190000 > +#define store_space_dw(dst, src) send.dc1 (1) null dst null 0x0 0x40A8000 > +#else > +#define load_shared_space_addr(dst, y, width) load_shared_a2dblock_payload(dst, y, width) > +#define load_thread_space_addr(dst, x, y, width) load_thread_a2dblock_payload(dst, x, y, width) Only width of those spaces? Possibly we could have height of the block parametrized too, right? That could be added when use case arises of course. Mine concern about those macros commes from the fact that future reader may think that this is part of iga assembly. Could we by any chance change the name so it emphasis that it is our own making? Or somhow point reader to the implementation of those. There are obviously some constrains, i.e. wrt to the 'width' params, which user can only deduce by reading the implementation. Regards, Dominik > +#define load_space_dw(dst, src) send.tgm (1) dst src null:0 0x0 0x62100003 > +#define store_space_dw(dst, src) send.tgm (1) null dst null:0 0x0 0x64000007 > +#endif > + > #endif > ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/2] lib/gpgpu_shader: simplify load/store shaders 2024-11-14 14:05 ` Grzegorzek, Dominik @ 2024-11-14 16:24 ` Hajda, Andrzej 2024-11-15 9:05 ` Grzegorzek, Dominik 0 siblings, 1 reply; 14+ messages in thread From: Hajda, Andrzej @ 2024-11-14 16:24 UTC (permalink / raw) To: Grzegorzek, Dominik, igt-dev@lists.freedesktop.org Cc: Kempczynski, Zbigniew, Mun, Gwan-gyeong, kamil.konieczny@linux.intel.com W dniu 14.11.2024 o 15:05, Grzegorzek, Dominik pisze: > On Thu, 2024-11-14 at 11:31 +0100, Andrzej Hajda wrote: >> There is lot of redundancy in shaders code regarding load/store messages. >> It makes the code barely readable. Simplify it by using macros in iga64 >> assembler. >> Every load/store operation is split into two phases: >> 1. Load address/descriptor (from) where data should be stored/loaded. >> 2. Issue load/store instruction. >> Shader threads needs two types of memory access: >> 3. Private area per thread. >> 4. Area shared per all threads. >> Different platforms access surface in different ways: >> 5. Using media block messages. >> 6. Using untyped 2d block messages. >> 7. Future platforms will use different messages. >> >> All this is simplified to two macros per message in shader: >> load_(shared|thread)_space_addr(dst,y,width) >> (load|store)_space_dw(dst, src) >> >> Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com> >> --- >> lib/gpgpu_shader.c | 160 +++------------------ >> lib/iga64_generated_codes.c | 338 ++++++++++++++++++++++---------------------- >> lib/iga64_macros.h | 43 ++++++ >> 3 files changed, 230 insertions(+), 311 deletions(-) >> >> diff --git a/lib/gpgpu_shader.c b/lib/gpgpu_shader.c >> index 4e1b8d5e9009..7728f96bf305 100644 >> --- a/lib/gpgpu_shader.c >> +++ b/lib/gpgpu_shader.c >> @@ -431,22 +431,8 @@ void gpgpu_shader__jump_neq(struct gpgpu_shader *shdr, int label_id, >> >> size = emit_iga64_code(shdr, jump_dw_neq, " \n\ >> L0: \n\ >> -(W) mov (16|M0) r30.0<1>:ud 0x0:ud \n\ >> -#if GEN_VER < 2000 // Media Block Write \n\ >> - // Y offset of the block in rows := thread group id Y \n\ >> -(W) mov (1|M0) r30.1<1>:ud ARG(0):ud \n\ >> - // block width [0,63] representing 1 to 64 bytes, we want dword \n\ >> -(W) mov (1|M0) r30.2<1>:ud 0x3:ud \n\ >> - // FFTID := FFTID from R0 header \n\ >> -(W) mov (1|M0) r30.4<1>:ud r0.5<0;1,0>:ud \n\ >> -(W) send.dc1 (16|M0) r31 r30 null 0x0 0x2190000 \n\ >> -#else // Typed 2D Block Store \n\ >> - // Store X and Y block start (160:191 and 192:223) \n\ >> -(W) mov (1|M0) r30.6<1>:ud ARG(0):ud \n\ >> - // Store X and Y block size (224:231 and 232:239) \n\ >> -(W) mov (1|M0) r30.7<1>:ud 0x3:ud \n\ >> -(W) send.tgm (16|M0) r31 r30 null:0 0x0 0x62100003 \n\ >> -#endif \n\ >> + load_shared_space_addr(r30, ARG(0):ud, 4) \n\ >> +(W) load_space_dw(r31, r30) \n\ >> // clear the flag register \n\ >> (W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ >> (W) cmp (1|M0) (ne)f0.0 null<1>:ud r31.0<0;1,0>:ud ARG(1):ud \n\ >> @@ -511,28 +497,13 @@ void gpgpu_shader__common_target_write(struct gpgpu_shader *shdr, >> uint32_t y_offset, const uint32_t value[4]) >> { >> emit_iga64_code(shdr, common_target_write, " \n\ >> -(W) mov (16|M0) r30.0<1>:ud 0x0:ud \n\ >> (W) mov (16|M0) r31.0<1>:ud 0x0:ud \n\ >> (W) mov (1|M0) r31.0<1>:ud ARG(1):ud \n\ >> (W) mov (1|M0) r31.1<1>:ud ARG(2):ud \n\ >> (W) mov (1|M0) r31.2<1>:ud ARG(3):ud \n\ >> (W) mov (1|M0) r31.3<1>:ud ARG(4):ud \n\ >> -#if GEN_VER < 2000 // Media Block Write \n\ >> - // Y offset of the block in rows \n\ >> -(W) mov (1|M0) r30.1<1>:ud ARG(0):ud \n\ >> - // block width [0,63] representing 1 to 64 bytes \n\ >> -(W) mov (1|M0) r30.2<1>:ud 0xf:ud \n\ >> - // FFTID := FFTID from R0 header \n\ >> -(W) mov (1|M0) r30.4<1>:ud r0.5<0;1,0>:ud \n\ >> - // written value \n\ >> -(W) send.dc1 (16|M0) null r30 src1_null 0x0 0x40A8000 \n\ >> -#else // Typed 2D Block Store \n\ >> - // Store X and Y block start (160:191 and 192:223) \n\ >> -(W) mov (1|M0) r30.6<1>:ud ARG(0):ud \n\ >> - // Store X and Y block size (224:231 and 232:239) \n\ >> -(W) mov (1|M0) r30.7<1>:ud 0xf:ud \n\ >> -(W) send.tgm (16|M0) null r30 null:0 0x0 0x64000007 \n\ >> -#endif \n\ >> + load_shared_space_addr(r30, ARG(0):ud, 16) \n\ >> +(W) store_space_dw(r30, r31) \n\ >> ", y_offset, value[0], value[1], value[2], value[3]); >> } >> >> @@ -565,31 +536,8 @@ void gpgpu_shader__write_aip(struct gpgpu_shader *shdr, uint32_t y_offset) >> emit_iga64_code(shdr, media_block_write_aip, " \n\ >> // Payload \n\ >> (W) mov (1|M0) r5.0<1>:ud cr0.2:ud \n\ >> -#if GEN_VER < 2000 // Media Block Write \n\ >> - // X offset of the block in bytes := (thread group id X << ARG(0)) \n\ >> -(W) shl (1|M0) r4.0<1>:ud r0.1<0;1,0>:ud 0x2:ud \n\ >> - // Y offset of the block in rows := thread group id Y \n\ >> -(W) mov (1|M0) r4.1<1>:ud r0.6<0;1,0>:ud \n\ >> -(W) add (1|M0) r4.1<1>:ud r4.1<0;1,0>:ud ARG(0):ud \n\ >> - // block width [0,63] representing 1 to 64 bytes \n\ >> -(W) mov (1|M0) r4.2<1>:ud 0x3:ud \n\ >> - // FFTID := FFTID from R0 header \n\ >> -(W) mov (1|M0) r4.4<1>:ud r0.5<0;1,0>:ud \n\ >> -(W) send.dc1 (16|M0) null r4 src1_null 0 0x40A8000 \n\ >> -#else // Typed 2D Block Store \n\ >> - // Load r2.0-3 with tg id X << ARG(0) \n\ >> -(W) shl (1|M0) r2.0<1>:ud r0.1<0;1,0>:ud 0x2:ud \n\ >> - // Load r2.4-7 with tg id Y + ARG(1):ud \n\ >> -(W) mov (1|M0) r2.1<1>:ud r0.6<0;1,0>:ud \n\ >> -(W) add (1|M0) r2.1<1>:ud r2.1<0;1,0>:ud ARG(0):ud \n\ >> - // payload setup \n\ >> -(W) mov (16|M0) r4.0<1>:ud 0x0:ud \n\ >> - // Store X and Y block start (160:191 and 192:223) \n\ >> -(W) mov (2|M0) r4.5<1>:ud r2.0<2;2,1>:ud \n\ >> - // Store X and Y block max_size (224:231 and 232:239) \n\ >> -(W) mov (1|M0) r4.7<1>:ud 0x3:ud \n\ >> -(W) send.tgm (16|M0) null r4 null:0 0 0x64000007 \n\ >> -#endif \n\ >> + load_thread_space_addr(r4, 0, ARG(0):ud, 4) \n\ >> +(W) store_space_dw(r4, r5) \n\ >> ", y_offset); >> } >> >> @@ -618,38 +566,11 @@ void gpgpu_shader__increase_aip(struct gpgpu_shader *shdr, uint32_t value) >> void gpgpu_shader__write_dword(struct gpgpu_shader *shdr, uint32_t value, >> uint32_t y_offset) >> { >> - emit_iga64_code(shdr, media_block_write, " \n\ >> - // Clear message header \n\ >> -(W) mov (16|M0) r4.0<1>:ud 0x0:ud \n\ >> - // Payload \n\ >> -(W) mov (1|M0) r5.0<1>:ud ARG(3):ud \n\ >> -(W) mov (1|M0) r5.1<1>:ud ARG(4):ud \n\ >> -(W) mov (1|M0) r5.2<1>:ud ARG(5):ud \n\ >> -(W) mov (1|M0) r5.3<1>:ud ARG(6):ud \n\ >> -#if GEN_VER < 2000 // Media Block Write \n\ >> - // X offset of the block in bytes := (thread group id X << ARG(0)) \n\ >> -(W) shl (1|M0) r4.0<1>:ud r0.1<0;1,0>:ud ARG(0):ud \n\ >> - // Y offset of the block in rows := thread group id Y \n\ >> -(W) mov (1|M0) r4.1<1>:ud r0.6<0;1,0>:ud \n\ >> -(W) add (1|M0) r4.1<1>:ud r4.1<0;1,0>:ud ARG(1):ud \n\ >> - // block width [0,63] representing 1 to 64 bytes \n\ >> -(W) mov (1|M0) r4.2<1>:ud ARG(2):ud \n\ >> - // FFTID := FFTID from R0 header \n\ >> -(W) mov (1|M0) r4.4<1>:ud r0.5<0;1,0>:ud \n\ >> -(W) send.dc1 (16|M0) null r4 src1_null 0 0x40A8000 \n\ >> -#else // Typed 2D Block Store \n\ >> - // Load r2.0-3 with tg id X << ARG(0) \n\ >> -(W) shl (1|M0) r2.0<1>:ud r0.1<0;1,0>:ud ARG(0):ud \n\ >> - // Load r2.4-7 with tg id Y + ARG(1):ud \n\ >> -(W) mov (1|M0) r2.1<1>:ud r0.6<0;1,0>:ud \n\ >> -(W) add (1|M0) r2.1<1>:ud r2.1<0;1,0>:ud ARG(1):ud \n\ >> - // Store X and Y block start (160:191 and 192:223) \n\ >> -(W) mov (2|M0) r4.5<1>:ud r2.0<2;2,1>:ud \n\ >> - // Store X and Y block max_size (224:231 and 232:239) \n\ >> -(W) mov (1|M0) r4.7<1>:ud ARG(2):ud \n\ >> -(W) send.tgm (16|M0) null r4 null:0 0 0x64000007 \n\ >> -#endif \n\ >> - ", 2, y_offset, 3, value, value, value, value); >> + emit_iga64_code(shdr, media_block_write, " \n\ >> +(W) mov (1) r5.0<1>:ud ARG(1):ud \n\ >> + load_thread_space_addr(r4, 0, ARG(0):ud, 4) \n\ >> +(W) store_space_dw(r4, r5) \n\ >> + ", y_offset, value); >> } >> >> /** >> @@ -697,41 +618,14 @@ void gpgpu_shader__write_on_exception(struct gpgpu_shader *shdr, uint32_t value, >> uint32_t y_offset, uint32_t mask, uint32_t expected) >> { >> emit_iga64_code(shdr, write_on_exception, " \n\ >> - // Clear message header \n\ >> -(W) mov (16|M0) r4.0<1>:ud 0x0:ud \n\ >> - // Payload \n\ >> -(W) mov (1|M0) r5.0<1>:ud ARG(4):ud \n\ >> -#if GEN_VER < 2000 // prepare Media Block Write \n\ >> - // X offset of the block in bytes := (thread group id X << ARG(0)) \n\ >> -(W) add (1|M0) r4.0<1>:ud r0.1<0;1,0>:ud ARG(1):ud \n\ >> -(W) shl (1|M0) r4.0<1>:ud r4.0<0;1,0>:ud ARG(0):ud \n\ >> - // Y offset of the block in rows := thread group id Y \n\ >> -(W) add (1|M0) r4.1<1>:ud r0.6<0;1,0>:ud ARG(2):ud \n\ >> - // block width [0,63] representing 1 to 64 bytes \n\ >> -(W) mov (1|M0) r4.2<1>:ud ARG(3):ud \n\ >> - // FFTID := FFTID from R0 header \n\ >> -(W) mov (1|M0) r4.4<1>:ud r0.5<0;1,0>:ud \n\ >> -#else // prepare Typed 2D Block Store \n\ >> - // Load r2.0 with tg id (X + ARG(1)) << ARG(0) \n\ >> -(W) add (1|M0) r2.0<1>:ud r0.1<0;1,0>:ud ARG(1):ud \n\ >> -(W) shl (1|M0) r2.0<1>:ud r2.0<0;1,0>:ud ARG(0):ud \n\ >> - // Load r2.4-7 with tg id Y + ARG(2):ud \n\ >> -(W) add (1|M0) r2.1<1>:ud r0.6<0;1,0>:ud ARG(2):ud \n\ >> - // Store X and Y block start (160:191 and 192:223) \n\ >> -(W) mov (2|M0) r4.5<1>:ud r2.0<2;2,1>:ud \n\ >> - // Store X and Y block max_size (224:231 and 232:239) \n\ >> -(W) mov (1|M0) r4.7<1>:ud ARG(3):ud \n\ >> -#endif \n\ >> +(W) mov (1|M0) r5.0<1>:ud ARG(2):ud \n\ >> + load_thread_space_addr(r4, ARG(0), ARG(1):ud, 4) \n\ >> // Check if masked exception is equal to provided value and write conditionally \n\ >> -(W) and (1|M0) r3.0<1>:ud cr0.1<0;1,0>:ud ARG(5):ud \n\ >> -(W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ >> -(W) cmp (1|M0) (eq)f0.0 null:ud r3.0<0;1,0>:ud ARG(6):ud \n\ >> -#if GEN_VER < 2000 // Media Block Write \n\ >> -(W&f0.0) send.dc1 (16|M0) null r4 src1_null 0 0x40A8000 \n\ >> -#else // Typed 2D Block Store \n\ >> -(W&f0.0) send.tgm (16|M0) null r4 null:0 0 0x64000007 \n\ >> -#endif \n\ >> - ", 2, x_offset, y_offset, 3, value, mask, expected); >> +(W) and (1|M0) r3.0<1>:ud cr0.1<0;1,0>:ud ARG(3):ud \n\ >> +(W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ >> +(W) cmp (1|M0) (eq)f0.0 null:ud r3.0<0;1,0>:ud ARG(4):ud \n\ >> +(W&f0.0) store_space_dw(r4, r5) \n\ >> + ", 4 * x_offset, y_offset, value, mask, expected); >> } >> >> /** >> @@ -778,22 +672,8 @@ void gpgpu_shader__end_system_routine_step_if_eq(struct gpgpu_shader *shdr, >> emit_iga64_code(shdr, end_system_routine_step_if_eq, " \n\ >> (W) or (1|M0) cr0.0<1>:ud cr0.0<0;1,0>:ud 0x8000:ud \n\ >> (W) and (1|M0) cr0.1<1>:ud cr0.1<0;1,0>:ud ARG(0):ud \n\ >> -(W) mov (16|M0) r30.0<1>:ud 0x0:ud \n\ >> -#if GEN_VER < 2000 // Media Block Write \n\ >> - // Y offset of the block in rows := thread group id Y \n\ >> -(W) mov (1|M0) r30.1<1>:ud ARG(1):ud \n\ >> - // block width [0,63] representing 1 to 64 bytes, we want dword \n\ >> -(W) mov (1|M0) r30.2<1>:ud 0x3:ud \n\ >> - // FFTID := FFTID from R0 header \n\ >> -(W) mov (1|M0) r30.4<1>:ud r0.5<0;1,0>:ud \n\ >> -(W) send.dc1 (16|M0) r31 r30 null 0x0 0x2190000 \n\ >> -#else // Typed 2D Block Store \n\ >> - // Store X and Y block start (160:191 and 192:223) \n\ >> -(W) mov (1|M0) r30.6<1>:ud ARG(1):ud \n\ >> - // Store X and Y block size (224:231 and 232:239) \n\ >> -(W) mov (1|M0) r30.7<1>:ud 0x3:ud \n\ >> -(W) send.tgm (16|M0) r31 r30 null:0 0x0 0x62100003 \n\ >> -#endif \n\ >> + load_thread_space_addr(r30, 0, ARG(0):ud, 4) \n\ >> +(W) load_space_dw(r31, r30) \n\ >> // clear the flag register \n\ >> (W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ >> (W) cmp (1|M0) (ne)f0.0 null<1>:ud r31.0<0;1,0>:ud ARG(2):ud \n\ >> diff --git a/lib/iga64_generated_codes.c b/lib/iga64_generated_codes.c >> index 0bd92b8c4dc9..017adefce400 100644 >> --- a/lib/iga64_generated_codes.c >> +++ b/lib/iga64_generated_codes.c >> @@ -3,7 +3,7 @@ >> >> #include "gpgpu_shader.h" >> >> -#define MD5_SUM_IGA64_ASMS e2d97ef45d5f322200793a0aa76872d7 >> +#define MD5_SUM_IGA64_ASMS fa1b0aa75c3ee1cd13300ad1324737b4 >> >> struct iga64_template const iga64_code_gpgpu_fill[] = { >> { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { >> @@ -80,71 +80,81 @@ struct iga64_template const iga64_code_gpgpu_fill[] = { >> }; >> >> struct iga64_template const iga64_code_end_system_routine_step_if_eq[] = { >> - { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { >> + { .gen_ver = 2000, .size = 52, .code = (const uint32_t []) { >> 0x80000966, 0x80018220, 0x02008000, 0x00008000, >> 0x80000965, 0x80118220, 0x02008010, 0xc0ded000, >> - 0x80100961, 0x1e054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x1e654220, 0x00000000, 0xc0ded001, >> + 0x800c0961, 0x1e054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x1e558220, 0x02000014, 0x00000002, >> + 0x80001940, 0x1e558220, 0x02001e54, 0x00000000, >> + 0x80000040, 0x1e658220, 0x02000064, 0xc0ded000, >> 0x80000061, 0x1e754220, 0x00000000, 0x00000003, >> - 0x80132031, 0x1f0c0000, 0xd0061e8c, 0x04000000, >> + 0x80032031, 0x1f0c0000, 0xd0061e8c, 0x04000000, >> 0x80000061, 0x30014220, 0x00000000, 0x00000000, >> 0x80008070, 0x00018220, 0x22001f04, 0xc0ded002, >> 0x84000965, 0x80118220, 0x02008010, 0xc0ded003, >> 0x80000965, 0x80018220, 0x02008000, 0x7ffffffd, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> - { .gen_ver = 1270, .size = 52, .code = (const uint32_t []) { >> + { .gen_ver = 1270, .size = 60, .code = (const uint32_t []) { >> 0x80000966, 0x80018220, 0x02008000, 0x00008000, >> 0x80000965, 0x80218220, 0x02008020, 0xc0ded000, >> - 0x80040961, 0x1e054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x1e254220, 0x00000000, 0xc0ded001, >> + 0x80030961, 0x1e054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x1e058220, 0x02000024, 0x00000002, >> + 0x80001940, 0x1e058220, 0x02001e04, 0x00000000, >> + 0x80000040, 0x1e258220, 0x020000c4, 0xc0ded000, >> 0x80000061, 0x1e454220, 0x00000000, 0x00000003, >> 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> 0x80000061, 0x30014220, 0x00000000, 0x00000000, >> 0x80002070, 0x00018220, 0x22001f04, 0xc0ded002, >> 0x81000965, 0x80218220, 0x02008020, 0xc0ded003, >> 0x80000965, 0x80018220, 0x02008000, 0x7ffffffd, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> - { .gen_ver = 1260, .size = 48, .code = (const uint32_t []) { >> + { .gen_ver = 1260, .size = 56, .code = (const uint32_t []) { >> 0x80000966, 0x80018220, 0x02008000, 0x00008000, >> 0x80000965, 0x80118220, 0x02008010, 0xc0ded000, >> - 0x80100961, 0x1e054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x1e154220, 0x00000000, 0xc0ded001, >> + 0x800c0961, 0x1e054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x1e058220, 0x02000014, 0x00000002, >> + 0x80001940, 0x1e058220, 0x02001e04, 0x00000000, >> + 0x80000040, 0x1e158220, 0x02000064, 0xc0ded000, >> 0x80000061, 0x1e254220, 0x00000000, 0x00000003, >> 0x80000061, 0x1e450220, 0x00000054, 0x00000000, >> - 0x80132031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> + 0x80032031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> 0x80000061, 0x30014220, 0x00000000, 0x00000000, >> 0x80008070, 0x00018220, 0x22001f04, 0xc0ded002, >> 0x84000965, 0x80118220, 0x02008010, 0xc0ded003, >> 0x80000965, 0x80018220, 0x02008000, 0x7ffffffd, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> - { .gen_ver = 1250, .size = 52, .code = (const uint32_t []) { >> + { .gen_ver = 1250, .size = 60, .code = (const uint32_t []) { >> 0x80000966, 0x80018220, 0x02008000, 0x00008000, >> 0x80000965, 0x80218220, 0x02008020, 0xc0ded000, >> - 0x80040961, 0x1e054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x1e254220, 0x00000000, 0xc0ded001, >> + 0x80030961, 0x1e054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x1e058220, 0x02000024, 0x00000002, >> + 0x80001940, 0x1e058220, 0x02001e04, 0x00000000, >> + 0x80000040, 0x1e258220, 0x020000c4, 0xc0ded000, >> 0x80000061, 0x1e454220, 0x00000000, 0x00000003, >> 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> 0x80000061, 0x30014220, 0x00000000, 0x00000000, >> 0x80002070, 0x00018220, 0x22001f04, 0xc0ded002, >> 0x81000965, 0x80218220, 0x02008020, 0xc0ded003, >> 0x80000965, 0x80018220, 0x02008000, 0x7ffffffd, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> - { .gen_ver = 0, .size = 48, .code = (const uint32_t []) { >> + { .gen_ver = 0, .size = 56, .code = (const uint32_t []) { >> 0x80000166, 0x80018220, 0x02008000, 0x00008000, >> 0x80000165, 0x80218220, 0x02008020, 0xc0ded000, >> - 0x80040161, 0x1e054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x1e254220, 0x00000000, 0xc0ded001, >> + 0x80030161, 0x1e054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x1e058220, 0x02000024, 0x00000002, >> + 0x80000140, 0x1e058220, 0x02001e04, 0x00000000, >> + 0x80000040, 0x1e258220, 0x020000c4, 0xc0ded000, >> 0x80000061, 0x1e454220, 0x00000000, 0x00000003, >> 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, >> - 0x80049031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> + 0x80009031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> 0x80000061, 0x30014220, 0x00000000, 0x00000000, >> 0x80002070, 0x00018220, 0x22001f04, 0xc0ded002, >> 0x81000165, 0x80218220, 0x02008020, 0xc0ded003, >> @@ -193,84 +203,83 @@ struct iga64_template const iga64_code_breakpoint_suppress[] = { >> }; >> >> struct iga64_template const iga64_code_write_on_exception[] = { >> - { .gen_ver = 2000, .size = 56, .code = (const uint32_t []) { >> - 0x80100061, 0x04054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, >> - 0x80000040, 0x02058220, 0x02000014, 0xc0ded001, >> - 0x80001969, 0x02058220, 0x02000204, 0xc0ded000, >> - 0x80000040, 0x02158220, 0x02000064, 0xc0ded002, >> - 0x80041961, 0x04550220, 0x00220205, 0x00000000, >> - 0x80000061, 0x04754220, 0x00000000, 0xc0ded003, >> - 0x80000965, 0x03058220, 0x02008010, 0xc0ded005, >> + { .gen_ver = 2000, .size = 52, .code = (const uint32_t []) { >> + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, >> + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04558220, 0x02000014, 0x00000002, >> + 0x80001940, 0x04558220, 0x02000454, 0xc0ded000, >> + 0x80000040, 0x04658220, 0x02000064, 0xc0ded001, >> + 0x80000061, 0x04754220, 0x00000000, 0x00000003, >> + 0x80000965, 0x03058220, 0x02008010, 0xc0ded003, >> 0x80000961, 0x30014220, 0x00000000, 0x00000000, >> - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, >> - 0x84132031, 0x00000000, 0xd00e0494, 0x04000000, >> + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, >> + 0x84032031, 0x00000000, 0xd00e0494, 0x04000000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 1270, .size = 60, .code = (const uint32_t []) { >> - 0x80040061, 0x04054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, >> - 0x80000040, 0x04058220, 0x02000024, 0xc0ded001, >> - 0x80001969, 0x04058220, 0x02000404, 0xc0ded000, >> - 0x80000040, 0x04258220, 0x020000c4, 0xc0ded002, >> - 0x80000061, 0x04454220, 0x00000000, 0xc0ded003, >> + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, >> + 0x80030061, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000024, 0x00000002, >> + 0x80001940, 0x04058220, 0x02000404, 0xc0ded000, >> + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded001, >> + 0x80000061, 0x04454220, 0x00000000, 0x00000003, >> 0x80000061, 0x04850220, 0x000000a4, 0x00000000, >> - 0x80000965, 0x03058220, 0x02008020, 0xc0ded005, >> + 0x80000965, 0x03058220, 0x02008020, 0xc0ded003, >> 0x80000961, 0x30014220, 0x00000000, 0x00000000, >> - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, >> + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x81044031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x81004031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 1260, .size = 56, .code = (const uint32_t []) { >> - 0x80100061, 0x04054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, >> - 0x80000040, 0x04058220, 0x02000014, 0xc0ded001, >> - 0x80001969, 0x04058220, 0x02000404, 0xc0ded000, >> - 0x80000040, 0x04158220, 0x02000064, 0xc0ded002, >> - 0x80000061, 0x04254220, 0x00000000, 0xc0ded003, >> + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, >> + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000014, 0x00000002, >> + 0x80001940, 0x04058220, 0x02000404, 0xc0ded000, >> + 0x80000040, 0x04158220, 0x02000064, 0xc0ded001, >> + 0x80000061, 0x04254220, 0x00000000, 0x00000003, >> 0x80000061, 0x04450220, 0x00000054, 0x00000000, >> - 0x80000965, 0x03058220, 0x02008010, 0xc0ded005, >> + 0x80000965, 0x03058220, 0x02008010, 0xc0ded003, >> 0x80000961, 0x30014220, 0x00000000, 0x00000000, >> - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, >> - 0x84132031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, >> + 0x84032031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 1250, .size = 60, .code = (const uint32_t []) { >> - 0x80040061, 0x04054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, >> - 0x80000040, 0x04058220, 0x02000024, 0xc0ded001, >> - 0x80001969, 0x04058220, 0x02000404, 0xc0ded000, >> - 0x80000040, 0x04258220, 0x020000c4, 0xc0ded002, >> - 0x80000061, 0x04454220, 0x00000000, 0xc0ded003, >> + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, >> + 0x80030061, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000024, 0x00000002, >> + 0x80001940, 0x04058220, 0x02000404, 0xc0ded000, >> + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded001, >> + 0x80000061, 0x04454220, 0x00000000, 0x00000003, >> 0x80000061, 0x04850220, 0x000000a4, 0x00000000, >> - 0x80000965, 0x03058220, 0x02008020, 0xc0ded005, >> + 0x80000965, 0x03058220, 0x02008020, 0xc0ded003, >> 0x80000961, 0x30014220, 0x00000000, 0x00000000, >> - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, >> + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x81044031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x81004031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 0, .size = 56, .code = (const uint32_t []) { >> - 0x80040061, 0x04054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, >> - 0x80000040, 0x04058220, 0x02000024, 0xc0ded001, >> - 0x80000169, 0x04058220, 0x02000404, 0xc0ded000, >> - 0x80000040, 0x04258220, 0x020000c4, 0xc0ded002, >> - 0x80000061, 0x04454220, 0x00000000, 0xc0ded003, >> + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, >> + 0x80030061, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000024, 0x00000002, >> + 0x80000140, 0x04058220, 0x02000404, 0xc0ded000, >> + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded001, >> + 0x80000061, 0x04454220, 0x00000000, 0x00000003, >> 0x80000061, 0x04850220, 0x000000a4, 0x00000000, >> - 0x80000165, 0x03058220, 0x02008020, 0xc0ded005, >> + 0x80000165, 0x03058220, 0x02008020, 0xc0ded003, >> 0x80000161, 0x30014220, 0x00000000, 0x00000000, >> - 0x80000270, 0x00018220, 0x12000304, 0xc0ded006, >> - 0x81049031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x80000270, 0x00018220, 0x12000304, 0xc0ded004, >> + 0x81009031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000101, 0x00010000, 0x00000000, 0x00000000, >> @@ -324,84 +333,68 @@ struct iga64_template const iga64_code_clear_exception[] = { >> }; >> >> struct iga64_template const iga64_code_media_block_write[] = { >> - { .gen_ver = 2000, .size = 56, .code = (const uint32_t []) { >> - 0x80100061, 0x04054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, >> - 0x80000061, 0x05154220, 0x00000000, 0xc0ded004, >> - 0x80000061, 0x05254220, 0x00000000, 0xc0ded005, >> - 0x80000061, 0x05354220, 0x00000000, 0xc0ded006, >> - 0x80000069, 0x02058220, 0x02000014, 0xc0ded000, >> - 0x80000061, 0x02150220, 0x00000064, 0x00000000, >> - 0x80001940, 0x02158220, 0x02000214, 0xc0ded001, >> - 0x80041961, 0x04550220, 0x00220205, 0x00000000, >> - 0x80000061, 0x04754220, 0x00000000, 0xc0ded002, >> - 0x80132031, 0x00000000, 0xd00e0494, 0x04000000, >> + { .gen_ver = 2000, .size = 40, .code = (const uint32_t []) { >> + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, >> + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04558220, 0x02000014, 0x00000002, >> + 0x80001940, 0x04558220, 0x02000454, 0x00000000, >> + 0x80000040, 0x04658220, 0x02000064, 0xc0ded000, >> + 0x80000061, 0x04754220, 0x00000000, 0x00000003, >> + 0x80032031, 0x00000000, 0xd00e0494, 0x04000000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> - { .gen_ver = 1270, .size = 60, .code = (const uint32_t []) { >> - 0x80040061, 0x04054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, >> - 0x80000061, 0x05254220, 0x00000000, 0xc0ded004, >> - 0x80000061, 0x05454220, 0x00000000, 0xc0ded005, >> - 0x80000061, 0x05654220, 0x00000000, 0xc0ded006, >> - 0x80000069, 0x04058220, 0x02000024, 0xc0ded000, >> - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, >> - 0x80001940, 0x04258220, 0x02000424, 0xc0ded001, >> - 0x80000061, 0x04454220, 0x00000000, 0xc0ded002, >> + { .gen_ver = 1270, .size = 48, .code = (const uint32_t []) { >> + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, >> + 0x80030061, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000024, 0x00000002, >> + 0x80001940, 0x04058220, 0x02000404, 0x00000000, >> + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, >> + 0x80000061, 0x04454220, 0x00000000, 0x00000003, >> 0x80000061, 0x04850220, 0x000000a4, 0x00000000, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> - { .gen_ver = 1260, .size = 56, .code = (const uint32_t []) { >> - 0x80100061, 0x04054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, >> - 0x80000061, 0x05154220, 0x00000000, 0xc0ded004, >> - 0x80000061, 0x05254220, 0x00000000, 0xc0ded005, >> - 0x80000061, 0x05354220, 0x00000000, 0xc0ded006, >> - 0x80000069, 0x04058220, 0x02000014, 0xc0ded000, >> - 0x80000061, 0x04150220, 0x00000064, 0x00000000, >> - 0x80001940, 0x04158220, 0x02000414, 0xc0ded001, >> - 0x80000061, 0x04254220, 0x00000000, 0xc0ded002, >> + { .gen_ver = 1260, .size = 44, .code = (const uint32_t []) { >> + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, >> + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000014, 0x00000002, >> + 0x80001940, 0x04058220, 0x02000404, 0x00000000, >> + 0x80000040, 0x04158220, 0x02000064, 0xc0ded000, >> + 0x80000061, 0x04254220, 0x00000000, 0x00000003, >> 0x80000061, 0x04450220, 0x00000054, 0x00000000, >> - 0x80132031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x80032031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> - { .gen_ver = 1250, .size = 60, .code = (const uint32_t []) { >> - 0x80040061, 0x04054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, >> - 0x80000061, 0x05254220, 0x00000000, 0xc0ded004, >> - 0x80000061, 0x05454220, 0x00000000, 0xc0ded005, >> - 0x80000061, 0x05654220, 0x00000000, 0xc0ded006, >> - 0x80000069, 0x04058220, 0x02000024, 0xc0ded000, >> - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, >> - 0x80001940, 0x04258220, 0x02000424, 0xc0ded001, >> - 0x80000061, 0x04454220, 0x00000000, 0xc0ded002, >> + { .gen_ver = 1250, .size = 48, .code = (const uint32_t []) { >> + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, >> + 0x80030061, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000024, 0x00000002, >> + 0x80001940, 0x04058220, 0x02000404, 0x00000000, >> + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, >> + 0x80000061, 0x04454220, 0x00000000, 0x00000003, >> 0x80000061, 0x04850220, 0x000000a4, 0x00000000, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> - { .gen_ver = 0, .size = 56, .code = (const uint32_t []) { >> - 0x80040061, 0x04054220, 0x00000000, 0x00000000, >> - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, >> - 0x80000061, 0x05254220, 0x00000000, 0xc0ded004, >> - 0x80000061, 0x05454220, 0x00000000, 0xc0ded005, >> - 0x80000061, 0x05654220, 0x00000000, 0xc0ded006, >> - 0x80000069, 0x04058220, 0x02000024, 0xc0ded000, >> - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, >> - 0x80000140, 0x04258220, 0x02000424, 0xc0ded001, >> - 0x80000061, 0x04454220, 0x00000000, 0xc0ded002, >> + { .gen_ver = 0, .size = 44, .code = (const uint32_t []) { >> + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, >> + 0x80030061, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000024, 0x00000002, >> + 0x80000140, 0x04058220, 0x02000404, 0x00000000, >> + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, >> + 0x80000061, 0x04454220, 0x00000000, 0x00000003, >> 0x80000061, 0x04850220, 0x000000a4, 0x00000000, >> - 0x80049031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x80009031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000101, 0x00010000, 0x00000000, 0x00000000, >> @@ -432,65 +425,68 @@ struct iga64_template const iga64_code_write_aip[] = { >> }; >> >> struct iga64_template const iga64_code_media_block_write_aip[] = { >> - { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { >> + { .gen_ver = 2000, .size = 40, .code = (const uint32_t []) { >> 0x80000961, 0x05050220, 0x00008020, 0x00000000, >> - 0x80000969, 0x02058220, 0x02000014, 0x00000002, >> - 0x80000061, 0x02150220, 0x00000064, 0x00000000, >> - 0x80001940, 0x02158220, 0x02000214, 0xc0ded000, >> - 0x80100061, 0x04054220, 0x00000000, 0x00000000, >> - 0x80041a61, 0x04550220, 0x00220205, 0x00000000, >> + 0x800c0961, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04558220, 0x02000014, 0x00000002, >> + 0x80001940, 0x04558220, 0x02000454, 0x00000000, >> + 0x80000040, 0x04658220, 0x02000064, 0xc0ded000, >> 0x80000061, 0x04754220, 0x00000000, 0x00000003, >> - 0x80132031, 0x00000000, 0xd00e0494, 0x04000000, >> + 0x80032031, 0x00000000, 0xd00e0494, 0x04000000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> - { .gen_ver = 1270, .size = 44, .code = (const uint32_t []) { >> + { .gen_ver = 1270, .size = 48, .code = (const uint32_t []) { >> 0x80000961, 0x05050220, 0x00008040, 0x00000000, >> - 0x80000969, 0x04058220, 0x02000024, 0x00000002, >> - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, >> - 0x80001940, 0x04258220, 0x02000424, 0xc0ded000, >> + 0x80030961, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000024, 0x00000002, >> + 0x80001940, 0x04058220, 0x02000404, 0x00000000, >> + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, >> 0x80000061, 0x04454220, 0x00000000, 0x00000003, >> 0x80000061, 0x04850220, 0x000000a4, 0x00000000, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> - { .gen_ver = 1260, .size = 40, .code = (const uint32_t []) { >> + { .gen_ver = 1260, .size = 44, .code = (const uint32_t []) { >> 0x80000961, 0x05050220, 0x00008020, 0x00000000, >> - 0x80000969, 0x04058220, 0x02000014, 0x00000002, >> - 0x80000061, 0x04150220, 0x00000064, 0x00000000, >> - 0x80001940, 0x04158220, 0x02000414, 0xc0ded000, >> + 0x800c0961, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000014, 0x00000002, >> + 0x80001940, 0x04058220, 0x02000404, 0x00000000, >> + 0x80000040, 0x04158220, 0x02000064, 0xc0ded000, >> 0x80000061, 0x04254220, 0x00000000, 0x00000003, >> 0x80000061, 0x04450220, 0x00000054, 0x00000000, >> - 0x80132031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x80032031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> - { .gen_ver = 1250, .size = 44, .code = (const uint32_t []) { >> + { .gen_ver = 1250, .size = 48, .code = (const uint32_t []) { >> 0x80000961, 0x05050220, 0x00008040, 0x00000000, >> - 0x80000969, 0x04058220, 0x02000024, 0x00000002, >> - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, >> - 0x80001940, 0x04258220, 0x02000424, 0xc0ded000, >> + 0x80030961, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000024, 0x00000002, >> + 0x80001940, 0x04058220, 0x02000404, 0x00000000, >> + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, >> 0x80000061, 0x04454220, 0x00000000, 0x00000003, >> 0x80000061, 0x04850220, 0x000000a4, 0x00000000, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> - { .gen_ver = 0, .size = 40, .code = (const uint32_t []) { >> + { .gen_ver = 0, .size = 44, .code = (const uint32_t []) { >> 0x80000161, 0x05050220, 0x00008040, 0x00000000, >> - 0x80000169, 0x04058220, 0x02000024, 0x00000002, >> - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, >> - 0x80000140, 0x04258220, 0x02000424, 0xc0ded000, >> + 0x80030161, 0x04054220, 0x00000000, 0x00000000, >> + 0x80000069, 0x04058220, 0x02000024, 0x00000002, >> + 0x80000140, 0x04058220, 0x02000404, 0x00000000, >> + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, >> 0x80000061, 0x04454220, 0x00000000, 0x00000003, >> 0x80000061, 0x04850220, 0x000000a4, 0x00000000, >> - 0x80049031, 0x00000000, 0xc0000414, 0x02a00000, >> + 0x80009031, 0x00000000, 0xc0000414, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000101, 0x00010000, 0x00000000, 0x00000000, >> @@ -499,77 +495,77 @@ struct iga64_template const iga64_code_media_block_write_aip[] = { >> >> struct iga64_template const iga64_code_common_target_write[] = { >> { .gen_ver = 2000, .size = 48, .code = (const uint32_t []) { >> - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80100061, 0x1f054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, >> 0x80000061, 0x1f154220, 0x00000000, 0xc0ded002, >> 0x80000061, 0x1f254220, 0x00000000, 0xc0ded003, >> 0x80000061, 0x1f354220, 0x00000000, 0xc0ded004, >> + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1e654220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e754220, 0x00000000, 0x0000000f, >> - 0x80132031, 0x00000000, 0xd00e1e94, 0x04000000, >> + 0x80032031, 0x00000000, 0xd00e1e94, 0x04000000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 1270, .size = 56, .code = (const uint32_t []) { >> - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80040061, 0x1f054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, >> 0x80000061, 0x1f254220, 0x00000000, 0xc0ded002, >> 0x80000061, 0x1f454220, 0x00000000, 0xc0ded003, >> 0x80000061, 0x1f654220, 0x00000000, 0xc0ded004, >> + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e454220, 0x00000000, 0x0000000f, >> 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x80044031, 0x00000000, 0xc0001e14, 0x02a00000, >> + 0x80004031, 0x00000000, 0xc0001e14, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 1260, .size = 52, .code = (const uint32_t []) { >> - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80100061, 0x1f054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, >> 0x80000061, 0x1f154220, 0x00000000, 0xc0ded002, >> 0x80000061, 0x1f254220, 0x00000000, 0xc0ded003, >> 0x80000061, 0x1f354220, 0x00000000, 0xc0ded004, >> + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1e154220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e254220, 0x00000000, 0x0000000f, >> 0x80000061, 0x1e450220, 0x00000054, 0x00000000, >> - 0x80132031, 0x00000000, 0xc0001e14, 0x02a00000, >> + 0x80032031, 0x00000000, 0xc0001e14, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 1250, .size = 56, .code = (const uint32_t []) { >> - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80040061, 0x1f054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, >> 0x80000061, 0x1f254220, 0x00000000, 0xc0ded002, >> 0x80000061, 0x1f454220, 0x00000000, 0xc0ded003, >> 0x80000061, 0x1f654220, 0x00000000, 0xc0ded004, >> + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e454220, 0x00000000, 0x0000000f, >> 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x80044031, 0x00000000, 0xc0001e14, 0x02a00000, >> + 0x80004031, 0x00000000, 0xc0001e14, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 0, .size = 52, .code = (const uint32_t []) { >> - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80040061, 0x1f054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, >> 0x80000061, 0x1f254220, 0x00000000, 0xc0ded002, >> 0x80000061, 0x1f454220, 0x00000000, 0xc0ded003, >> 0x80000061, 0x1f654220, 0x00000000, 0xc0ded004, >> + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e454220, 0x00000000, 0x0000000f, >> 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, >> - 0x80049031, 0x00000000, 0xc0001e14, 0x02a00000, >> + 0x80009031, 0x00000000, 0xc0001e14, 0x02a00000, >> 0x80000001, 0x00010000, 0x20000000, 0x00000000, >> 0x80000001, 0x00010000, 0x30000000, 0x00000000, >> 0x80000101, 0x00010000, 0x00000000, 0x00000000, >> @@ -627,56 +623,56 @@ struct iga64_template const iga64_code_clear_r40[] = { >> >> struct iga64_template const iga64_code_jump_dw_neq[] = { >> { .gen_ver = 2000, .size = 32, .code = (const uint32_t []) { >> - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, >> + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1e654220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e754220, 0x00000000, 0x00000003, >> - 0x80132031, 0x1f0c0000, 0xd0061e8c, 0x04000000, >> + 0x80032031, 0x1f0c0000, 0xd0061e8c, 0x04000000, >> 0x80000061, 0x30014220, 0x00000000, 0x00000000, >> 0x80008070, 0x00018220, 0x22001f04, 0xc0ded001, >> 0x84000020, 0x00004000, 0x00000000, 0xffffffa0, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 1270, .size = 40, .code = (const uint32_t []) { >> - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, >> + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e454220, 0x00000000, 0x00000003, >> 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> 0x80000061, 0x30014220, 0x00000000, 0x00000000, >> 0x80002070, 0x00018220, 0x22001f04, 0xc0ded001, >> 0x81000020, 0x00004000, 0x00000000, 0xffffff80, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 1260, .size = 36, .code = (const uint32_t []) { >> - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, >> + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1e154220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e254220, 0x00000000, 0x00000003, >> 0x80000061, 0x1e450220, 0x00000054, 0x00000000, >> - 0x80132031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> + 0x80032031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> 0x80000061, 0x30014220, 0x00000000, 0x00000000, >> 0x80008070, 0x00018220, 0x22001f04, 0xc0ded001, >> 0x84000020, 0x00004000, 0x00000000, 0xffffff90, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 1250, .size = 40, .code = (const uint32_t []) { >> - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, >> + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e454220, 0x00000000, 0x00000003, >> 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, >> 0x80001901, 0x00010000, 0x00000000, 0x00000000, >> - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> 0x80000061, 0x30014220, 0x00000000, 0x00000000, >> 0x80002070, 0x00018220, 0x22001f04, 0xc0ded001, >> 0x81000020, 0x00004000, 0x00000000, 0xffffff80, >> 0x80000901, 0x00010000, 0x00000000, 0x00000000, >> }}, >> { .gen_ver = 0, .size = 36, .code = (const uint32_t []) { >> - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, >> + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, >> 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, >> 0x80000061, 0x1e454220, 0x00000000, 0x00000003, >> 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, >> - 0x80049031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> + 0x80009031, 0x1f0c0000, 0xc0001e0c, 0x02400000, >> 0x80000061, 0x30014220, 0x00000000, 0x00000000, >> 0x80002070, 0x00018220, 0x22001f04, 0xc0ded001, >> 0x81000120, 0x00004000, 0x00000000, 0xffffff90, >> diff --git a/lib/iga64_macros.h b/lib/iga64_macros.h >> index 03cc726d48c2..0fd5e268d957 100644 >> --- a/lib/iga64_macros.h >> +++ b/lib/iga64_macros.h >> @@ -13,4 +13,47 @@ >> #define src1_null null:0 >> #endif >> >> +/* GPGPU_R0Payload fields, Bspec: 55396, 56587 */ >> +#define r0_tgidx r0.1<0;1,0>:ud >> +#define r0_tgidy r0.6<0;1,0>:ud >> +#define r0_fftid r0.5<0;1,0>:ud >> + >> +#define load_shared_media_block_msg_hdr(dst, y, width) \ >> +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ >> +(W) mov (1) dst.1<1>:ud y ;\ >> +(W) mov (1) dst.2<1>:ud (width - 1):ud ;\ >> +(W) mov (1) dst.4<1>:ud r0_fftid >> + >> +#define load_thread_media_block_msg_hdr(dst, x, y, width) \ >> +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ >> +(W) shl (1) dst.0<1>:ud r0_tgidx 0x2:ud ;\ >> +(W) add (1) dst.0<1>:ud dst.0<0;1,0>:ud x:ud ;\ >> +(W) add (1) dst.1<1>:ud r0_tgidy y ;\ >> +(W) mov (1) dst.2<1>:ud (width - 1):ud ;\ >> +(W) mov (1) dst.4<1>:ud r0_fftid >> + >> +#define load_shared_a2dblock_payload(dst, y, width) \ >> +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ >> +(W) mov (1) dst.6<1>:ud y ;\ >> +(W) mov (1) dst.7<1>:ud (width - 1):ud >> + >> +#define load_thread_a2dblock_payload(dst, x, y, width) \ >> +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ >> +(W) shl (1) dst.5<1>:ud r0_tgidx 0x2:ud ;\ >> +(W) add (1) dst.5<1>:ud dst.5<0;1,0>:ud x:ud ;\ >> +(W) add (1) dst.6<1>:ud r0_tgidy y ;\ >> +(W) mov (1) dst.7<1>:ud (width - 1):ud ;\ >> + >> +#if GEN_VER < 2000 >> +#define load_shared_space_addr(dst, y, width) load_shared_media_block_msg_hdr(dst, y, width) >> +#define load_thread_space_addr(dst, x, y, width) load_thread_media_block_msg_hdr(dst, x, y, width) >> +#define load_space_dw(dst, src) send.dc1 (1) dst src src1_null 0x0 0x2190000 >> +#define store_space_dw(dst, src) send.dc1 (1) null dst null 0x0 0x40A8000 >> +#else >> +#define load_shared_space_addr(dst, y, width) load_shared_a2dblock_payload(dst, y, width) >> +#define load_thread_space_addr(dst, x, y, width) load_thread_a2dblock_payload(dst, x, y, width) > Only width of those spaces? Possibly we could have height of the block parametrized too, right? That > could be added when use case arises of course. > > Mine concern about those macros commes from the fact that future reader may think that this is part > of iga assembly. Could we by any chance change the name so it emphasis that it is our own making? Capitalize? IMHO syntax "f(x, y...)" already suggests it is not iga64, but capitalization is even stronger signal :) > Or > somhow point reader to the implementation of those. There are obviously some constrains, i.e. wrt to > the 'width' params, which user can only deduce by reading the implementation. Hmm, comment on the top of file? Adding "#include <...>"to each shader looks overkill for me for now (but is the most explicit way). In the latter case we would need to move macros to another include file, then add sth like "#include <space_helpers.h>" to shaders. But as I said before, it would be nice if our macro library grows, for now it seems overkill, but I am open to suggestions :) Regards Andrzej > > Regards, Dominik > >> +#define load_space_dw(dst, src) send.tgm (1) dst src null:0 0x0 0x62100003 >> +#define store_space_dw(dst, src) send.tgm (1) null dst null:0 0x0 0x64000007 >> +#endif >> + >> #endif >> ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/2] lib/gpgpu_shader: simplify load/store shaders 2024-11-14 16:24 ` Hajda, Andrzej @ 2024-11-15 9:05 ` Grzegorzek, Dominik 0 siblings, 0 replies; 14+ messages in thread From: Grzegorzek, Dominik @ 2024-11-15 9:05 UTC (permalink / raw) To: igt-dev@lists.freedesktop.org, Hajda, Andrzej Cc: Kempczynski, Zbigniew, Mun, Gwan-gyeong, kamil.konieczny@linux.intel.com On Thu, 2024-11-14 at 17:24 +0100, Hajda, Andrzej wrote: > W dniu 14.11.2024 o 15:05, Grzegorzek, Dominik pisze: > > On Thu, 2024-11-14 at 11:31 +0100, Andrzej Hajda wrote: > > > There is lot of redundancy in shaders code regarding load/store messages. > > > It makes the code barely readable. Simplify it by using macros in iga64 > > > assembler. > > > Every load/store operation is split into two phases: > > > 1. Load address/descriptor (from) where data should be stored/loaded. > > > 2. Issue load/store instruction. > > > Shader threads needs two types of memory access: > > > 3. Private area per thread. > > > 4. Area shared per all threads. > > > Different platforms access surface in different ways: > > > 5. Using media block messages. > > > 6. Using untyped 2d block messages. > > > 7. Future platforms will use different messages. > > > > > > All this is simplified to two macros per message in shader: > > > load_(shared|thread)_space_addr(dst,y,width) > > > (load|store)_space_dw(dst, src) > > > > > > Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com> > > > --- > > > lib/gpgpu_shader.c | 160 +++------------------ > > > lib/iga64_generated_codes.c | 338 ++++++++++++++++++++++---------------------- > > > lib/iga64_macros.h | 43 ++++++ > > > 3 files changed, 230 insertions(+), 311 deletions(-) > > > > > > diff --git a/lib/gpgpu_shader.c b/lib/gpgpu_shader.c > > > index 4e1b8d5e9009..7728f96bf305 100644 > > > --- a/lib/gpgpu_shader.c > > > +++ b/lib/gpgpu_shader.c > > > @@ -431,22 +431,8 @@ void gpgpu_shader__jump_neq(struct gpgpu_shader *shdr, int label_id, > > > > > > size = emit_iga64_code(shdr, jump_dw_neq, " \n\ > > > L0: \n\ > > > -(W) mov (16|M0) r30.0<1>:ud 0x0:ud \n\ > > > -#if GEN_VER < 2000 // Media Block Write \n\ > > > - // Y offset of the block in rows := thread group id Y \n\ > > > -(W) mov (1|M0) r30.1<1>:ud ARG(0):ud \n\ > > > - // block width [0,63] representing 1 to 64 bytes, we want dword \n\ > > > -(W) mov (1|M0) r30.2<1>:ud 0x3:ud \n\ > > > - // FFTID := FFTID from R0 header \n\ > > > -(W) mov (1|M0) r30.4<1>:ud r0.5<0;1,0>:ud \n\ > > > -(W) send.dc1 (16|M0) r31 r30 null 0x0 0x2190000 \n\ > > > -#else // Typed 2D Block Store \n\ > > > - // Store X and Y block start (160:191 and 192:223) \n\ > > > -(W) mov (1|M0) r30.6<1>:ud ARG(0):ud \n\ > > > - // Store X and Y block size (224:231 and 232:239) \n\ > > > -(W) mov (1|M0) r30.7<1>:ud 0x3:ud \n\ > > > -(W) send.tgm (16|M0) r31 r30 null:0 0x0 0x62100003 \n\ > > > -#endif \n\ > > > + load_shared_space_addr(r30, ARG(0):ud, 4) \n\ > > > +(W) load_space_dw(r31, r30) \n\ > > > // clear the flag register \n\ > > > (W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ > > > (W) cmp (1|M0) (ne)f0.0 null<1>:ud r31.0<0;1,0>:ud ARG(1):ud \n\ > > > @@ -511,28 +497,13 @@ void gpgpu_shader__common_target_write(struct gpgpu_shader *shdr, > > > uint32_t y_offset, const uint32_t value[4]) > > > { > > > emit_iga64_code(shdr, common_target_write, " \n\ > > > -(W) mov (16|M0) r30.0<1>:ud 0x0:ud \n\ > > > (W) mov (16|M0) r31.0<1>:ud 0x0:ud \n\ > > > (W) mov (1|M0) r31.0<1>:ud ARG(1):ud \n\ > > > (W) mov (1|M0) r31.1<1>:ud ARG(2):ud \n\ > > > (W) mov (1|M0) r31.2<1>:ud ARG(3):ud \n\ > > > (W) mov (1|M0) r31.3<1>:ud ARG(4):ud \n\ > > > -#if GEN_VER < 2000 // Media Block Write \n\ > > > - // Y offset of the block in rows \n\ > > > -(W) mov (1|M0) r30.1<1>:ud ARG(0):ud \n\ > > > - // block width [0,63] representing 1 to 64 bytes \n\ > > > -(W) mov (1|M0) r30.2<1>:ud 0xf:ud \n\ > > > - // FFTID := FFTID from R0 header \n\ > > > -(W) mov (1|M0) r30.4<1>:ud r0.5<0;1,0>:ud \n\ > > > - // written value \n\ > > > -(W) send.dc1 (16|M0) null r30 src1_null 0x0 0x40A8000 \n\ > > > -#else // Typed 2D Block Store \n\ > > > - // Store X and Y block start (160:191 and 192:223) \n\ > > > -(W) mov (1|M0) r30.6<1>:ud ARG(0):ud \n\ > > > - // Store X and Y block size (224:231 and 232:239) \n\ > > > -(W) mov (1|M0) r30.7<1>:ud 0xf:ud \n\ > > > -(W) send.tgm (16|M0) null r30 null:0 0x0 0x64000007 \n\ > > > -#endif \n\ > > > + load_shared_space_addr(r30, ARG(0):ud, 16) \n\ > > > +(W) store_space_dw(r30, r31) \n\ > > > ", y_offset, value[0], value[1], value[2], value[3]); > > > } > > > > > > @@ -565,31 +536,8 @@ void gpgpu_shader__write_aip(struct gpgpu_shader *shdr, uint32_t y_offset) > > > emit_iga64_code(shdr, media_block_write_aip, " \n\ > > > // Payload \n\ > > > (W) mov (1|M0) r5.0<1>:ud cr0.2:ud \n\ > > > -#if GEN_VER < 2000 // Media Block Write \n\ > > > - // X offset of the block in bytes := (thread group id X << ARG(0)) \n\ > > > -(W) shl (1|M0) r4.0<1>:ud r0.1<0;1,0>:ud 0x2:ud \n\ > > > - // Y offset of the block in rows := thread group id Y \n\ > > > -(W) mov (1|M0) r4.1<1>:ud r0.6<0;1,0>:ud \n\ > > > -(W) add (1|M0) r4.1<1>:ud r4.1<0;1,0>:ud ARG(0):ud \n\ > > > - // block width [0,63] representing 1 to 64 bytes \n\ > > > -(W) mov (1|M0) r4.2<1>:ud 0x3:ud \n\ > > > - // FFTID := FFTID from R0 header \n\ > > > -(W) mov (1|M0) r4.4<1>:ud r0.5<0;1,0>:ud \n\ > > > -(W) send.dc1 (16|M0) null r4 src1_null 0 0x40A8000 \n\ > > > -#else // Typed 2D Block Store \n\ > > > - // Load r2.0-3 with tg id X << ARG(0) \n\ > > > -(W) shl (1|M0) r2.0<1>:ud r0.1<0;1,0>:ud 0x2:ud \n\ > > > - // Load r2.4-7 with tg id Y + ARG(1):ud \n\ > > > -(W) mov (1|M0) r2.1<1>:ud r0.6<0;1,0>:ud \n\ > > > -(W) add (1|M0) r2.1<1>:ud r2.1<0;1,0>:ud ARG(0):ud \n\ > > > - // payload setup \n\ > > > -(W) mov (16|M0) r4.0<1>:ud 0x0:ud \n\ > > > - // Store X and Y block start (160:191 and 192:223) \n\ > > > -(W) mov (2|M0) r4.5<1>:ud r2.0<2;2,1>:ud \n\ > > > - // Store X and Y block max_size (224:231 and 232:239) \n\ > > > -(W) mov (1|M0) r4.7<1>:ud 0x3:ud \n\ > > > -(W) send.tgm (16|M0) null r4 null:0 0 0x64000007 \n\ > > > -#endif \n\ > > > + load_thread_space_addr(r4, 0, ARG(0):ud, 4) \n\ > > > +(W) store_space_dw(r4, r5) \n\ > > > ", y_offset); > > > } > > > > > > @@ -618,38 +566,11 @@ void gpgpu_shader__increase_aip(struct gpgpu_shader *shdr, uint32_t value) > > > void gpgpu_shader__write_dword(struct gpgpu_shader *shdr, uint32_t value, > > > uint32_t y_offset) > > > { > > > - emit_iga64_code(shdr, media_block_write, " \n\ > > > - // Clear message header \n\ > > > -(W) mov (16|M0) r4.0<1>:ud 0x0:ud \n\ > > > - // Payload \n\ > > > -(W) mov (1|M0) r5.0<1>:ud ARG(3):ud \n\ > > > -(W) mov (1|M0) r5.1<1>:ud ARG(4):ud \n\ > > > -(W) mov (1|M0) r5.2<1>:ud ARG(5):ud \n\ > > > -(W) mov (1|M0) r5.3<1>:ud ARG(6):ud \n\ > > > -#if GEN_VER < 2000 // Media Block Write \n\ > > > - // X offset of the block in bytes := (thread group id X << ARG(0)) \n\ > > > -(W) shl (1|M0) r4.0<1>:ud r0.1<0;1,0>:ud ARG(0):ud \n\ > > > - // Y offset of the block in rows := thread group id Y \n\ > > > -(W) mov (1|M0) r4.1<1>:ud r0.6<0;1,0>:ud \n\ > > > -(W) add (1|M0) r4.1<1>:ud r4.1<0;1,0>:ud ARG(1):ud \n\ > > > - // block width [0,63] representing 1 to 64 bytes \n\ > > > -(W) mov (1|M0) r4.2<1>:ud ARG(2):ud \n\ > > > - // FFTID := FFTID from R0 header \n\ > > > -(W) mov (1|M0) r4.4<1>:ud r0.5<0;1,0>:ud \n\ > > > -(W) send.dc1 (16|M0) null r4 src1_null 0 0x40A8000 \n\ > > > -#else // Typed 2D Block Store \n\ > > > - // Load r2.0-3 with tg id X << ARG(0) \n\ > > > -(W) shl (1|M0) r2.0<1>:ud r0.1<0;1,0>:ud ARG(0):ud \n\ > > > - // Load r2.4-7 with tg id Y + ARG(1):ud \n\ > > > -(W) mov (1|M0) r2.1<1>:ud r0.6<0;1,0>:ud \n\ > > > -(W) add (1|M0) r2.1<1>:ud r2.1<0;1,0>:ud ARG(1):ud \n\ > > > - // Store X and Y block start (160:191 and 192:223) \n\ > > > -(W) mov (2|M0) r4.5<1>:ud r2.0<2;2,1>:ud \n\ > > > - // Store X and Y block max_size (224:231 and 232:239) \n\ > > > -(W) mov (1|M0) r4.7<1>:ud ARG(2):ud \n\ > > > -(W) send.tgm (16|M0) null r4 null:0 0 0x64000007 \n\ > > > -#endif \n\ > > > - ", 2, y_offset, 3, value, value, value, value); > > > + emit_iga64_code(shdr, media_block_write, " \n\ > > > +(W) mov (1) r5.0<1>:ud ARG(1):ud \n\ > > > + load_thread_space_addr(r4, 0, ARG(0):ud, 4) \n\ > > > +(W) store_space_dw(r4, r5) \n\ > > > + ", y_offset, value); > > > } > > > > > > /** > > > @@ -697,41 +618,14 @@ void gpgpu_shader__write_on_exception(struct gpgpu_shader *shdr, uint32_t value, > > > uint32_t y_offset, uint32_t mask, uint32_t expected) > > > { > > > emit_iga64_code(shdr, write_on_exception, " \n\ > > > - // Clear message header \n\ > > > -(W) mov (16|M0) r4.0<1>:ud 0x0:ud \n\ > > > - // Payload \n\ > > > -(W) mov (1|M0) r5.0<1>:ud ARG(4):ud \n\ > > > -#if GEN_VER < 2000 // prepare Media Block Write \n\ > > > - // X offset of the block in bytes := (thread group id X << ARG(0)) \n\ > > > -(W) add (1|M0) r4.0<1>:ud r0.1<0;1,0>:ud ARG(1):ud \n\ > > > -(W) shl (1|M0) r4.0<1>:ud r4.0<0;1,0>:ud ARG(0):ud \n\ > > > - // Y offset of the block in rows := thread group id Y \n\ > > > -(W) add (1|M0) r4.1<1>:ud r0.6<0;1,0>:ud ARG(2):ud \n\ > > > - // block width [0,63] representing 1 to 64 bytes \n\ > > > -(W) mov (1|M0) r4.2<1>:ud ARG(3):ud \n\ > > > - // FFTID := FFTID from R0 header \n\ > > > -(W) mov (1|M0) r4.4<1>:ud r0.5<0;1,0>:ud \n\ > > > -#else // prepare Typed 2D Block Store \n\ > > > - // Load r2.0 with tg id (X + ARG(1)) << ARG(0) \n\ > > > -(W) add (1|M0) r2.0<1>:ud r0.1<0;1,0>:ud ARG(1):ud \n\ > > > -(W) shl (1|M0) r2.0<1>:ud r2.0<0;1,0>:ud ARG(0):ud \n\ > > > - // Load r2.4-7 with tg id Y + ARG(2):ud \n\ > > > -(W) add (1|M0) r2.1<1>:ud r0.6<0;1,0>:ud ARG(2):ud \n\ > > > - // Store X and Y block start (160:191 and 192:223) \n\ > > > -(W) mov (2|M0) r4.5<1>:ud r2.0<2;2,1>:ud \n\ > > > - // Store X and Y block max_size (224:231 and 232:239) \n\ > > > -(W) mov (1|M0) r4.7<1>:ud ARG(3):ud \n\ > > > -#endif \n\ > > > +(W) mov (1|M0) r5.0<1>:ud ARG(2):ud \n\ > > > + load_thread_space_addr(r4, ARG(0), ARG(1):ud, 4) \n\ > > > // Check if masked exception is equal to provided value and write conditionally \n\ > > > -(W) and (1|M0) r3.0<1>:ud cr0.1<0;1,0>:ud ARG(5):ud \n\ > > > -(W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ > > > -(W) cmp (1|M0) (eq)f0.0 null:ud r3.0<0;1,0>:ud ARG(6):ud \n\ > > > -#if GEN_VER < 2000 // Media Block Write \n\ > > > -(W&f0.0) send.dc1 (16|M0) null r4 src1_null 0 0x40A8000 \n\ > > > -#else // Typed 2D Block Store \n\ > > > -(W&f0.0) send.tgm (16|M0) null r4 null:0 0 0x64000007 \n\ > > > -#endif \n\ > > > - ", 2, x_offset, y_offset, 3, value, mask, expected); > > > +(W) and (1|M0) r3.0<1>:ud cr0.1<0;1,0>:ud ARG(3):ud \n\ > > > +(W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ > > > +(W) cmp (1|M0) (eq)f0.0 null:ud r3.0<0;1,0>:ud ARG(4):ud \n\ > > > +(W&f0.0) store_space_dw(r4, r5) \n\ > > > + ", 4 * x_offset, y_offset, value, mask, expected); > > > } > > > > > > /** > > > @@ -778,22 +672,8 @@ void gpgpu_shader__end_system_routine_step_if_eq(struct gpgpu_shader *shdr, > > > emit_iga64_code(shdr, end_system_routine_step_if_eq, " \n\ > > > (W) or (1|M0) cr0.0<1>:ud cr0.0<0;1,0>:ud 0x8000:ud \n\ > > > (W) and (1|M0) cr0.1<1>:ud cr0.1<0;1,0>:ud ARG(0):ud \n\ > > > -(W) mov (16|M0) r30.0<1>:ud 0x0:ud \n\ > > > -#if GEN_VER < 2000 // Media Block Write \n\ > > > - // Y offset of the block in rows := thread group id Y \n\ > > > -(W) mov (1|M0) r30.1<1>:ud ARG(1):ud \n\ > > > - // block width [0,63] representing 1 to 64 bytes, we want dword \n\ > > > -(W) mov (1|M0) r30.2<1>:ud 0x3:ud \n\ > > > - // FFTID := FFTID from R0 header \n\ > > > -(W) mov (1|M0) r30.4<1>:ud r0.5<0;1,0>:ud \n\ > > > -(W) send.dc1 (16|M0) r31 r30 null 0x0 0x2190000 \n\ > > > -#else // Typed 2D Block Store \n\ > > > - // Store X and Y block start (160:191 and 192:223) \n\ > > > -(W) mov (1|M0) r30.6<1>:ud ARG(1):ud \n\ > > > - // Store X and Y block size (224:231 and 232:239) \n\ > > > -(W) mov (1|M0) r30.7<1>:ud 0x3:ud \n\ > > > -(W) send.tgm (16|M0) r31 r30 null:0 0x0 0x62100003 \n\ > > > -#endif \n\ > > > + load_thread_space_addr(r30, 0, ARG(0):ud, 4) \n\ > > > +(W) load_space_dw(r31, r30) \n\ > > > // clear the flag register \n\ > > > (W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\ > > > (W) cmp (1|M0) (ne)f0.0 null<1>:ud r31.0<0;1,0>:ud ARG(2):ud \n\ > > > diff --git a/lib/iga64_generated_codes.c b/lib/iga64_generated_codes.c > > > index 0bd92b8c4dc9..017adefce400 100644 > > > --- a/lib/iga64_generated_codes.c > > > +++ b/lib/iga64_generated_codes.c > > > @@ -3,7 +3,7 @@ > > > > > > #include "gpgpu_shader.h" > > > > > > -#define MD5_SUM_IGA64_ASMS e2d97ef45d5f322200793a0aa76872d7 > > > +#define MD5_SUM_IGA64_ASMS fa1b0aa75c3ee1cd13300ad1324737b4 > > > > > > struct iga64_template const iga64_code_gpgpu_fill[] = { > > > { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { > > > @@ -80,71 +80,81 @@ struct iga64_template const iga64_code_gpgpu_fill[] = { > > > }; > > > > > > struct iga64_template const iga64_code_end_system_routine_step_if_eq[] = { > > > - { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { > > > + { .gen_ver = 2000, .size = 52, .code = (const uint32_t []) { > > > 0x80000966, 0x80018220, 0x02008000, 0x00008000, > > > 0x80000965, 0x80118220, 0x02008010, 0xc0ded000, > > > - 0x80100961, 0x1e054220, 0x00000000, 0x00000000, > > > - 0x80000061, 0x1e654220, 0x00000000, 0xc0ded001, > > > + 0x800c0961, 0x1e054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x1e558220, 0x02000014, 0x00000002, > > > + 0x80001940, 0x1e558220, 0x02001e54, 0x00000000, > > > + 0x80000040, 0x1e658220, 0x02000064, 0xc0ded000, > > > 0x80000061, 0x1e754220, 0x00000000, 0x00000003, > > > - 0x80132031, 0x1f0c0000, 0xd0061e8c, 0x04000000, > > > + 0x80032031, 0x1f0c0000, 0xd0061e8c, 0x04000000, > > > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > > > 0x80008070, 0x00018220, 0x22001f04, 0xc0ded002, > > > 0x84000965, 0x80118220, 0x02008010, 0xc0ded003, > > > 0x80000965, 0x80018220, 0x02008000, 0x7ffffffd, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > - { .gen_ver = 1270, .size = 52, .code = (const uint32_t []) { > > > + { .gen_ver = 1270, .size = 60, .code = (const uint32_t []) { > > > 0x80000966, 0x80018220, 0x02008000, 0x00008000, > > > 0x80000965, 0x80218220, 0x02008020, 0xc0ded000, > > > - 0x80040961, 0x1e054220, 0x00000000, 0x00000000, > > > - 0x80000061, 0x1e254220, 0x00000000, 0xc0ded001, > > > + 0x80030961, 0x1e054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x1e058220, 0x02000024, 0x00000002, > > > + 0x80001940, 0x1e058220, 0x02001e04, 0x00000000, > > > + 0x80000040, 0x1e258220, 0x020000c4, 0xc0ded000, > > > 0x80000061, 0x1e454220, 0x00000000, 0x00000003, > > > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > > > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > > > - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > > > + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > > > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > > > 0x80002070, 0x00018220, 0x22001f04, 0xc0ded002, > > > 0x81000965, 0x80218220, 0x02008020, 0xc0ded003, > > > 0x80000965, 0x80018220, 0x02008000, 0x7ffffffd, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > - { .gen_ver = 1260, .size = 48, .code = (const uint32_t []) { > > > + { .gen_ver = 1260, .size = 56, .code = (const uint32_t []) { > > > 0x80000966, 0x80018220, 0x02008000, 0x00008000, > > > 0x80000965, 0x80118220, 0x02008010, 0xc0ded000, > > > - 0x80100961, 0x1e054220, 0x00000000, 0x00000000, > > > - 0x80000061, 0x1e154220, 0x00000000, 0xc0ded001, > > > + 0x800c0961, 0x1e054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x1e058220, 0x02000014, 0x00000002, > > > + 0x80001940, 0x1e058220, 0x02001e04, 0x00000000, > > > + 0x80000040, 0x1e158220, 0x02000064, 0xc0ded000, > > > 0x80000061, 0x1e254220, 0x00000000, 0x00000003, > > > 0x80000061, 0x1e450220, 0x00000054, 0x00000000, > > > - 0x80132031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > > > + 0x80032031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > > > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > > > 0x80008070, 0x00018220, 0x22001f04, 0xc0ded002, > > > 0x84000965, 0x80118220, 0x02008010, 0xc0ded003, > > > 0x80000965, 0x80018220, 0x02008000, 0x7ffffffd, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > - { .gen_ver = 1250, .size = 52, .code = (const uint32_t []) { > > > + { .gen_ver = 1250, .size = 60, .code = (const uint32_t []) { > > > 0x80000966, 0x80018220, 0x02008000, 0x00008000, > > > 0x80000965, 0x80218220, 0x02008020, 0xc0ded000, > > > - 0x80040961, 0x1e054220, 0x00000000, 0x00000000, > > > - 0x80000061, 0x1e254220, 0x00000000, 0xc0ded001, > > > + 0x80030961, 0x1e054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x1e058220, 0x02000024, 0x00000002, > > > + 0x80001940, 0x1e058220, 0x02001e04, 0x00000000, > > > + 0x80000040, 0x1e258220, 0x020000c4, 0xc0ded000, > > > 0x80000061, 0x1e454220, 0x00000000, 0x00000003, > > > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > > > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > > > - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > > > + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > > > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > > > 0x80002070, 0x00018220, 0x22001f04, 0xc0ded002, > > > 0x81000965, 0x80218220, 0x02008020, 0xc0ded003, > > > 0x80000965, 0x80018220, 0x02008000, 0x7ffffffd, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > - { .gen_ver = 0, .size = 48, .code = (const uint32_t []) { > > > + { .gen_ver = 0, .size = 56, .code = (const uint32_t []) { > > > 0x80000166, 0x80018220, 0x02008000, 0x00008000, > > > 0x80000165, 0x80218220, 0x02008020, 0xc0ded000, > > > - 0x80040161, 0x1e054220, 0x00000000, 0x00000000, > > > - 0x80000061, 0x1e254220, 0x00000000, 0xc0ded001, > > > + 0x80030161, 0x1e054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x1e058220, 0x02000024, 0x00000002, > > > + 0x80000140, 0x1e058220, 0x02001e04, 0x00000000, > > > + 0x80000040, 0x1e258220, 0x020000c4, 0xc0ded000, > > > 0x80000061, 0x1e454220, 0x00000000, 0x00000003, > > > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > > > - 0x80049031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > > > + 0x80009031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > > > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > > > 0x80002070, 0x00018220, 0x22001f04, 0xc0ded002, > > > 0x81000165, 0x80218220, 0x02008020, 0xc0ded003, > > > @@ -193,84 +203,83 @@ struct iga64_template const iga64_code_breakpoint_suppress[] = { > > > }; > > > > > > struct iga64_template const iga64_code_write_on_exception[] = { > > > - { .gen_ver = 2000, .size = 56, .code = (const uint32_t []) { > > > - 0x80100061, 0x04054220, 0x00000000, 0x00000000, > > > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, > > > - 0x80000040, 0x02058220, 0x02000014, 0xc0ded001, > > > - 0x80001969, 0x02058220, 0x02000204, 0xc0ded000, > > > - 0x80000040, 0x02158220, 0x02000064, 0xc0ded002, > > > - 0x80041961, 0x04550220, 0x00220205, 0x00000000, > > > - 0x80000061, 0x04754220, 0x00000000, 0xc0ded003, > > > - 0x80000965, 0x03058220, 0x02008010, 0xc0ded005, > > > + { .gen_ver = 2000, .size = 52, .code = (const uint32_t []) { > > > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, > > > + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x04558220, 0x02000014, 0x00000002, > > > + 0x80001940, 0x04558220, 0x02000454, 0xc0ded000, > > > + 0x80000040, 0x04658220, 0x02000064, 0xc0ded001, > > > + 0x80000061, 0x04754220, 0x00000000, 0x00000003, > > > + 0x80000965, 0x03058220, 0x02008010, 0xc0ded003, > > > 0x80000961, 0x30014220, 0x00000000, 0x00000000, > > > - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, > > > - 0x84132031, 0x00000000, 0xd00e0494, 0x04000000, > > > + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, > > > + 0x84032031, 0x00000000, 0xd00e0494, 0x04000000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > { .gen_ver = 1270, .size = 60, .code = (const uint32_t []) { > > > - 0x80040061, 0x04054220, 0x00000000, 0x00000000, > > > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, > > > - 0x80000040, 0x04058220, 0x02000024, 0xc0ded001, > > > - 0x80001969, 0x04058220, 0x02000404, 0xc0ded000, > > > - 0x80000040, 0x04258220, 0x020000c4, 0xc0ded002, > > > - 0x80000061, 0x04454220, 0x00000000, 0xc0ded003, > > > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, > > > + 0x80030061, 0x04054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > > > + 0x80001940, 0x04058220, 0x02000404, 0xc0ded000, > > > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded001, > > > + 0x80000061, 0x04454220, 0x00000000, 0x00000003, > > > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > > > - 0x80000965, 0x03058220, 0x02008020, 0xc0ded005, > > > + 0x80000965, 0x03058220, 0x02008020, 0xc0ded003, > > > 0x80000961, 0x30014220, 0x00000000, 0x00000000, > > > - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, > > > + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, > > > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > > > - 0x81044031, 0x00000000, 0xc0000414, 0x02a00000, > > > + 0x81004031, 0x00000000, 0xc0000414, 0x02a00000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > { .gen_ver = 1260, .size = 56, .code = (const uint32_t []) { > > > - 0x80100061, 0x04054220, 0x00000000, 0x00000000, > > > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, > > > - 0x80000040, 0x04058220, 0x02000014, 0xc0ded001, > > > - 0x80001969, 0x04058220, 0x02000404, 0xc0ded000, > > > - 0x80000040, 0x04158220, 0x02000064, 0xc0ded002, > > > - 0x80000061, 0x04254220, 0x00000000, 0xc0ded003, > > > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, > > > + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x04058220, 0x02000014, 0x00000002, > > > + 0x80001940, 0x04058220, 0x02000404, 0xc0ded000, > > > + 0x80000040, 0x04158220, 0x02000064, 0xc0ded001, > > > + 0x80000061, 0x04254220, 0x00000000, 0x00000003, > > > 0x80000061, 0x04450220, 0x00000054, 0x00000000, > > > - 0x80000965, 0x03058220, 0x02008010, 0xc0ded005, > > > + 0x80000965, 0x03058220, 0x02008010, 0xc0ded003, > > > 0x80000961, 0x30014220, 0x00000000, 0x00000000, > > > - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, > > > - 0x84132031, 0x00000000, 0xc0000414, 0x02a00000, > > > + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, > > > + 0x84032031, 0x00000000, 0xc0000414, 0x02a00000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > { .gen_ver = 1250, .size = 60, .code = (const uint32_t []) { > > > - 0x80040061, 0x04054220, 0x00000000, 0x00000000, > > > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, > > > - 0x80000040, 0x04058220, 0x02000024, 0xc0ded001, > > > - 0x80001969, 0x04058220, 0x02000404, 0xc0ded000, > > > - 0x80000040, 0x04258220, 0x020000c4, 0xc0ded002, > > > - 0x80000061, 0x04454220, 0x00000000, 0xc0ded003, > > > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, > > > + 0x80030061, 0x04054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > > > + 0x80001940, 0x04058220, 0x02000404, 0xc0ded000, > > > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded001, > > > + 0x80000061, 0x04454220, 0x00000000, 0x00000003, > > > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > > > - 0x80000965, 0x03058220, 0x02008020, 0xc0ded005, > > > + 0x80000965, 0x03058220, 0x02008020, 0xc0ded003, > > > 0x80000961, 0x30014220, 0x00000000, 0x00000000, > > > - 0x80001a70, 0x00018220, 0x12000304, 0xc0ded006, > > > + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded004, > > > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > > > - 0x81044031, 0x00000000, 0xc0000414, 0x02a00000, > > > + 0x81004031, 0x00000000, 0xc0000414, 0x02a00000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > { .gen_ver = 0, .size = 56, .code = (const uint32_t []) { > > > - 0x80040061, 0x04054220, 0x00000000, 0x00000000, > > > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded004, > > > - 0x80000040, 0x04058220, 0x02000024, 0xc0ded001, > > > - 0x80000169, 0x04058220, 0x02000404, 0xc0ded000, > > > - 0x80000040, 0x04258220, 0x020000c4, 0xc0ded002, > > > - 0x80000061, 0x04454220, 0x00000000, 0xc0ded003, > > > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded002, > > > + 0x80030061, 0x04054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > > > + 0x80000140, 0x04058220, 0x02000404, 0xc0ded000, > > > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded001, > > > + 0x80000061, 0x04454220, 0x00000000, 0x00000003, > > > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > > > - 0x80000165, 0x03058220, 0x02008020, 0xc0ded005, > > > + 0x80000165, 0x03058220, 0x02008020, 0xc0ded003, > > > 0x80000161, 0x30014220, 0x00000000, 0x00000000, > > > - 0x80000270, 0x00018220, 0x12000304, 0xc0ded006, > > > - 0x81049031, 0x00000000, 0xc0000414, 0x02a00000, > > > + 0x80000270, 0x00018220, 0x12000304, 0xc0ded004, > > > + 0x81009031, 0x00000000, 0xc0000414, 0x02a00000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000101, 0x00010000, 0x00000000, 0x00000000, > > > @@ -324,84 +333,68 @@ struct iga64_template const iga64_code_clear_exception[] = { > > > }; > > > > > > struct iga64_template const iga64_code_media_block_write[] = { > > > - { .gen_ver = 2000, .size = 56, .code = (const uint32_t []) { > > > - 0x80100061, 0x04054220, 0x00000000, 0x00000000, > > > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, > > > - 0x80000061, 0x05154220, 0x00000000, 0xc0ded004, > > > - 0x80000061, 0x05254220, 0x00000000, 0xc0ded005, > > > - 0x80000061, 0x05354220, 0x00000000, 0xc0ded006, > > > - 0x80000069, 0x02058220, 0x02000014, 0xc0ded000, > > > - 0x80000061, 0x02150220, 0x00000064, 0x00000000, > > > - 0x80001940, 0x02158220, 0x02000214, 0xc0ded001, > > > - 0x80041961, 0x04550220, 0x00220205, 0x00000000, > > > - 0x80000061, 0x04754220, 0x00000000, 0xc0ded002, > > > - 0x80132031, 0x00000000, 0xd00e0494, 0x04000000, > > > + { .gen_ver = 2000, .size = 40, .code = (const uint32_t []) { > > > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, > > > + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x04558220, 0x02000014, 0x00000002, > > > + 0x80001940, 0x04558220, 0x02000454, 0x00000000, > > > + 0x80000040, 0x04658220, 0x02000064, 0xc0ded000, > > > + 0x80000061, 0x04754220, 0x00000000, 0x00000003, > > > + 0x80032031, 0x00000000, 0xd00e0494, 0x04000000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > - { .gen_ver = 1270, .size = 60, .code = (const uint32_t []) { > > > - 0x80040061, 0x04054220, 0x00000000, 0x00000000, > > > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, > > > - 0x80000061, 0x05254220, 0x00000000, 0xc0ded004, > > > - 0x80000061, 0x05454220, 0x00000000, 0xc0ded005, > > > - 0x80000061, 0x05654220, 0x00000000, 0xc0ded006, > > > - 0x80000069, 0x04058220, 0x02000024, 0xc0ded000, > > > - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, > > > - 0x80001940, 0x04258220, 0x02000424, 0xc0ded001, > > > - 0x80000061, 0x04454220, 0x00000000, 0xc0ded002, > > > + { .gen_ver = 1270, .size = 48, .code = (const uint32_t []) { > > > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, > > > + 0x80030061, 0x04054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > > > + 0x80001940, 0x04058220, 0x02000404, 0x00000000, > > > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, > > > + 0x80000061, 0x04454220, 0x00000000, 0x00000003, > > > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > > > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > > > - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, > > > + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > - { .gen_ver = 1260, .size = 56, .code = (const uint32_t []) { > > > - 0x80100061, 0x04054220, 0x00000000, 0x00000000, > > > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, > > > - 0x80000061, 0x05154220, 0x00000000, 0xc0ded004, > > > - 0x80000061, 0x05254220, 0x00000000, 0xc0ded005, > > > - 0x80000061, 0x05354220, 0x00000000, 0xc0ded006, > > > - 0x80000069, 0x04058220, 0x02000014, 0xc0ded000, > > > - 0x80000061, 0x04150220, 0x00000064, 0x00000000, > > > - 0x80001940, 0x04158220, 0x02000414, 0xc0ded001, > > > - 0x80000061, 0x04254220, 0x00000000, 0xc0ded002, > > > + { .gen_ver = 1260, .size = 44, .code = (const uint32_t []) { > > > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, > > > + 0x800c0061, 0x04054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x04058220, 0x02000014, 0x00000002, > > > + 0x80001940, 0x04058220, 0x02000404, 0x00000000, > > > + 0x80000040, 0x04158220, 0x02000064, 0xc0ded000, > > > + 0x80000061, 0x04254220, 0x00000000, 0x00000003, > > > 0x80000061, 0x04450220, 0x00000054, 0x00000000, > > > - 0x80132031, 0x00000000, 0xc0000414, 0x02a00000, > > > + 0x80032031, 0x00000000, 0xc0000414, 0x02a00000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > - { .gen_ver = 1250, .size = 60, .code = (const uint32_t []) { > > > - 0x80040061, 0x04054220, 0x00000000, 0x00000000, > > > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, > > > - 0x80000061, 0x05254220, 0x00000000, 0xc0ded004, > > > - 0x80000061, 0x05454220, 0x00000000, 0xc0ded005, > > > - 0x80000061, 0x05654220, 0x00000000, 0xc0ded006, > > > - 0x80000069, 0x04058220, 0x02000024, 0xc0ded000, > > > - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, > > > - 0x80001940, 0x04258220, 0x02000424, 0xc0ded001, > > > - 0x80000061, 0x04454220, 0x00000000, 0xc0ded002, > > > + { .gen_ver = 1250, .size = 48, .code = (const uint32_t []) { > > > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, > > > + 0x80030061, 0x04054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > > > + 0x80001940, 0x04058220, 0x02000404, 0x00000000, > > > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, > > > + 0x80000061, 0x04454220, 0x00000000, 0x00000003, > > > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > > > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > > > - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, > > > + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > - { .gen_ver = 0, .size = 56, .code = (const uint32_t []) { > > > - 0x80040061, 0x04054220, 0x00000000, 0x00000000, > > > - 0x80000061, 0x05054220, 0x00000000, 0xc0ded003, > > > - 0x80000061, 0x05254220, 0x00000000, 0xc0ded004, > > > - 0x80000061, 0x05454220, 0x00000000, 0xc0ded005, > > > - 0x80000061, 0x05654220, 0x00000000, 0xc0ded006, > > > - 0x80000069, 0x04058220, 0x02000024, 0xc0ded000, > > > - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, > > > - 0x80000140, 0x04258220, 0x02000424, 0xc0ded001, > > > - 0x80000061, 0x04454220, 0x00000000, 0xc0ded002, > > > + { .gen_ver = 0, .size = 44, .code = (const uint32_t []) { > > > + 0x80000061, 0x05054220, 0x00000000, 0xc0ded001, > > > + 0x80030061, 0x04054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > > > + 0x80000140, 0x04058220, 0x02000404, 0x00000000, > > > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, > > > + 0x80000061, 0x04454220, 0x00000000, 0x00000003, > > > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > > > - 0x80049031, 0x00000000, 0xc0000414, 0x02a00000, > > > + 0x80009031, 0x00000000, 0xc0000414, 0x02a00000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000101, 0x00010000, 0x00000000, 0x00000000, > > > @@ -432,65 +425,68 @@ struct iga64_template const iga64_code_write_aip[] = { > > > }; > > > > > > struct iga64_template const iga64_code_media_block_write_aip[] = { > > > - { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) { > > > + { .gen_ver = 2000, .size = 40, .code = (const uint32_t []) { > > > 0x80000961, 0x05050220, 0x00008020, 0x00000000, > > > - 0x80000969, 0x02058220, 0x02000014, 0x00000002, > > > - 0x80000061, 0x02150220, 0x00000064, 0x00000000, > > > - 0x80001940, 0x02158220, 0x02000214, 0xc0ded000, > > > - 0x80100061, 0x04054220, 0x00000000, 0x00000000, > > > - 0x80041a61, 0x04550220, 0x00220205, 0x00000000, > > > + 0x800c0961, 0x04054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x04558220, 0x02000014, 0x00000002, > > > + 0x80001940, 0x04558220, 0x02000454, 0x00000000, > > > + 0x80000040, 0x04658220, 0x02000064, 0xc0ded000, > > > 0x80000061, 0x04754220, 0x00000000, 0x00000003, > > > - 0x80132031, 0x00000000, 0xd00e0494, 0x04000000, > > > + 0x80032031, 0x00000000, 0xd00e0494, 0x04000000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > - { .gen_ver = 1270, .size = 44, .code = (const uint32_t []) { > > > + { .gen_ver = 1270, .size = 48, .code = (const uint32_t []) { > > > 0x80000961, 0x05050220, 0x00008040, 0x00000000, > > > - 0x80000969, 0x04058220, 0x02000024, 0x00000002, > > > - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, > > > - 0x80001940, 0x04258220, 0x02000424, 0xc0ded000, > > > + 0x80030961, 0x04054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > > > + 0x80001940, 0x04058220, 0x02000404, 0x00000000, > > > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, > > > 0x80000061, 0x04454220, 0x00000000, 0x00000003, > > > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > > > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > > > - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, > > > + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > - { .gen_ver = 1260, .size = 40, .code = (const uint32_t []) { > > > + { .gen_ver = 1260, .size = 44, .code = (const uint32_t []) { > > > 0x80000961, 0x05050220, 0x00008020, 0x00000000, > > > - 0x80000969, 0x04058220, 0x02000014, 0x00000002, > > > - 0x80000061, 0x04150220, 0x00000064, 0x00000000, > > > - 0x80001940, 0x04158220, 0x02000414, 0xc0ded000, > > > + 0x800c0961, 0x04054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x04058220, 0x02000014, 0x00000002, > > > + 0x80001940, 0x04058220, 0x02000404, 0x00000000, > > > + 0x80000040, 0x04158220, 0x02000064, 0xc0ded000, > > > 0x80000061, 0x04254220, 0x00000000, 0x00000003, > > > 0x80000061, 0x04450220, 0x00000054, 0x00000000, > > > - 0x80132031, 0x00000000, 0xc0000414, 0x02a00000, > > > + 0x80032031, 0x00000000, 0xc0000414, 0x02a00000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > - { .gen_ver = 1250, .size = 44, .code = (const uint32_t []) { > > > + { .gen_ver = 1250, .size = 48, .code = (const uint32_t []) { > > > 0x80000961, 0x05050220, 0x00008040, 0x00000000, > > > - 0x80000969, 0x04058220, 0x02000024, 0x00000002, > > > - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, > > > - 0x80001940, 0x04258220, 0x02000424, 0xc0ded000, > > > + 0x80030961, 0x04054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > > > + 0x80001940, 0x04058220, 0x02000404, 0x00000000, > > > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, > > > 0x80000061, 0x04454220, 0x00000000, 0x00000003, > > > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > > > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > > > - 0x80044031, 0x00000000, 0xc0000414, 0x02a00000, > > > + 0x80004031, 0x00000000, 0xc0000414, 0x02a00000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > - { .gen_ver = 0, .size = 40, .code = (const uint32_t []) { > > > + { .gen_ver = 0, .size = 44, .code = (const uint32_t []) { > > > 0x80000161, 0x05050220, 0x00008040, 0x00000000, > > > - 0x80000169, 0x04058220, 0x02000024, 0x00000002, > > > - 0x80000061, 0x04250220, 0x000000c4, 0x00000000, > > > - 0x80000140, 0x04258220, 0x02000424, 0xc0ded000, > > > + 0x80030161, 0x04054220, 0x00000000, 0x00000000, > > > + 0x80000069, 0x04058220, 0x02000024, 0x00000002, > > > + 0x80000140, 0x04058220, 0x02000404, 0x00000000, > > > + 0x80000040, 0x04258220, 0x020000c4, 0xc0ded000, > > > 0x80000061, 0x04454220, 0x00000000, 0x00000003, > > > 0x80000061, 0x04850220, 0x000000a4, 0x00000000, > > > - 0x80049031, 0x00000000, 0xc0000414, 0x02a00000, > > > + 0x80009031, 0x00000000, 0xc0000414, 0x02a00000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000101, 0x00010000, 0x00000000, 0x00000000, > > > @@ -499,77 +495,77 @@ struct iga64_template const iga64_code_media_block_write_aip[] = { > > > > > > struct iga64_template const iga64_code_common_target_write[] = { > > > { .gen_ver = 2000, .size = 48, .code = (const uint32_t []) { > > > - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, > > > 0x80100061, 0x1f054220, 0x00000000, 0x00000000, > > > 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, > > > 0x80000061, 0x1f154220, 0x00000000, 0xc0ded002, > > > 0x80000061, 0x1f254220, 0x00000000, 0xc0ded003, > > > 0x80000061, 0x1f354220, 0x00000000, 0xc0ded004, > > > + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, > > > 0x80000061, 0x1e654220, 0x00000000, 0xc0ded000, > > > 0x80000061, 0x1e754220, 0x00000000, 0x0000000f, > > > - 0x80132031, 0x00000000, 0xd00e1e94, 0x04000000, > > > + 0x80032031, 0x00000000, 0xd00e1e94, 0x04000000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > { .gen_ver = 1270, .size = 56, .code = (const uint32_t []) { > > > - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, > > > 0x80040061, 0x1f054220, 0x00000000, 0x00000000, > > > 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, > > > 0x80000061, 0x1f254220, 0x00000000, 0xc0ded002, > > > 0x80000061, 0x1f454220, 0x00000000, 0xc0ded003, > > > 0x80000061, 0x1f654220, 0x00000000, 0xc0ded004, > > > + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, > > > 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > > > 0x80000061, 0x1e454220, 0x00000000, 0x0000000f, > > > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > > > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > > > - 0x80044031, 0x00000000, 0xc0001e14, 0x02a00000, > > > + 0x80004031, 0x00000000, 0xc0001e14, 0x02a00000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > { .gen_ver = 1260, .size = 52, .code = (const uint32_t []) { > > > - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, > > > 0x80100061, 0x1f054220, 0x00000000, 0x00000000, > > > 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, > > > 0x80000061, 0x1f154220, 0x00000000, 0xc0ded002, > > > 0x80000061, 0x1f254220, 0x00000000, 0xc0ded003, > > > 0x80000061, 0x1f354220, 0x00000000, 0xc0ded004, > > > + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, > > > 0x80000061, 0x1e154220, 0x00000000, 0xc0ded000, > > > 0x80000061, 0x1e254220, 0x00000000, 0x0000000f, > > > 0x80000061, 0x1e450220, 0x00000054, 0x00000000, > > > - 0x80132031, 0x00000000, 0xc0001e14, 0x02a00000, > > > + 0x80032031, 0x00000000, 0xc0001e14, 0x02a00000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > { .gen_ver = 1250, .size = 56, .code = (const uint32_t []) { > > > - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, > > > 0x80040061, 0x1f054220, 0x00000000, 0x00000000, > > > 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, > > > 0x80000061, 0x1f254220, 0x00000000, 0xc0ded002, > > > 0x80000061, 0x1f454220, 0x00000000, 0xc0ded003, > > > 0x80000061, 0x1f654220, 0x00000000, 0xc0ded004, > > > + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, > > > 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > > > 0x80000061, 0x1e454220, 0x00000000, 0x0000000f, > > > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > > > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > > > - 0x80044031, 0x00000000, 0xc0001e14, 0x02a00000, > > > + 0x80004031, 0x00000000, 0xc0001e14, 0x02a00000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > { .gen_ver = 0, .size = 52, .code = (const uint32_t []) { > > > - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, > > > 0x80040061, 0x1f054220, 0x00000000, 0x00000000, > > > 0x80000061, 0x1f054220, 0x00000000, 0xc0ded001, > > > 0x80000061, 0x1f254220, 0x00000000, 0xc0ded002, > > > 0x80000061, 0x1f454220, 0x00000000, 0xc0ded003, > > > 0x80000061, 0x1f654220, 0x00000000, 0xc0ded004, > > > + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, > > > 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > > > 0x80000061, 0x1e454220, 0x00000000, 0x0000000f, > > > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > > > - 0x80049031, 0x00000000, 0xc0001e14, 0x02a00000, > > > + 0x80009031, 0x00000000, 0xc0001e14, 0x02a00000, > > > 0x80000001, 0x00010000, 0x20000000, 0x00000000, > > > 0x80000001, 0x00010000, 0x30000000, 0x00000000, > > > 0x80000101, 0x00010000, 0x00000000, 0x00000000, > > > @@ -627,56 +623,56 @@ struct iga64_template const iga64_code_clear_r40[] = { > > > > > > struct iga64_template const iga64_code_jump_dw_neq[] = { > > > { .gen_ver = 2000, .size = 32, .code = (const uint32_t []) { > > > - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, > > > + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, > > > 0x80000061, 0x1e654220, 0x00000000, 0xc0ded000, > > > 0x80000061, 0x1e754220, 0x00000000, 0x00000003, > > > - 0x80132031, 0x1f0c0000, 0xd0061e8c, 0x04000000, > > > + 0x80032031, 0x1f0c0000, 0xd0061e8c, 0x04000000, > > > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > > > 0x80008070, 0x00018220, 0x22001f04, 0xc0ded001, > > > 0x84000020, 0x00004000, 0x00000000, 0xffffffa0, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > { .gen_ver = 1270, .size = 40, .code = (const uint32_t []) { > > > - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, > > > + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, > > > 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > > > 0x80000061, 0x1e454220, 0x00000000, 0x00000003, > > > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > > > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > > > - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > > > + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > > > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > > > 0x80002070, 0x00018220, 0x22001f04, 0xc0ded001, > > > 0x81000020, 0x00004000, 0x00000000, 0xffffff80, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > { .gen_ver = 1260, .size = 36, .code = (const uint32_t []) { > > > - 0x80100061, 0x1e054220, 0x00000000, 0x00000000, > > > + 0x800c0061, 0x1e054220, 0x00000000, 0x00000000, > > > 0x80000061, 0x1e154220, 0x00000000, 0xc0ded000, > > > 0x80000061, 0x1e254220, 0x00000000, 0x00000003, > > > 0x80000061, 0x1e450220, 0x00000054, 0x00000000, > > > - 0x80132031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > > > + 0x80032031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > > > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > > > 0x80008070, 0x00018220, 0x22001f04, 0xc0ded001, > > > 0x84000020, 0x00004000, 0x00000000, 0xffffff90, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > { .gen_ver = 1250, .size = 40, .code = (const uint32_t []) { > > > - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, > > > + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, > > > 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > > > 0x80000061, 0x1e454220, 0x00000000, 0x00000003, > > > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > > > 0x80001901, 0x00010000, 0x00000000, 0x00000000, > > > - 0x80044031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > > > + 0x80004031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > > > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > > > 0x80002070, 0x00018220, 0x22001f04, 0xc0ded001, > > > 0x81000020, 0x00004000, 0x00000000, 0xffffff80, > > > 0x80000901, 0x00010000, 0x00000000, 0x00000000, > > > }}, > > > { .gen_ver = 0, .size = 36, .code = (const uint32_t []) { > > > - 0x80040061, 0x1e054220, 0x00000000, 0x00000000, > > > + 0x80030061, 0x1e054220, 0x00000000, 0x00000000, > > > 0x80000061, 0x1e254220, 0x00000000, 0xc0ded000, > > > 0x80000061, 0x1e454220, 0x00000000, 0x00000003, > > > 0x80000061, 0x1e850220, 0x000000a4, 0x00000000, > > > - 0x80049031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > > > + 0x80009031, 0x1f0c0000, 0xc0001e0c, 0x02400000, > > > 0x80000061, 0x30014220, 0x00000000, 0x00000000, > > > 0x80002070, 0x00018220, 0x22001f04, 0xc0ded001, > > > 0x81000120, 0x00004000, 0x00000000, 0xffffff90, > > > diff --git a/lib/iga64_macros.h b/lib/iga64_macros.h > > > index 03cc726d48c2..0fd5e268d957 100644 > > > --- a/lib/iga64_macros.h > > > +++ b/lib/iga64_macros.h > > > @@ -13,4 +13,47 @@ > > > #define src1_null null:0 > > > #endif > > > > > > +/* GPGPU_R0Payload fields, Bspec: 55396, 56587 */ > > > +#define r0_tgidx r0.1<0;1,0>:ud > > > +#define r0_tgidy r0.6<0;1,0>:ud > > > +#define r0_fftid r0.5<0;1,0>:ud > > > + > > > +#define load_shared_media_block_msg_hdr(dst, y, width) \ > > > +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ > > > +(W) mov (1) dst.1<1>:ud y ;\ > > > +(W) mov (1) dst.2<1>:ud (width - 1):ud ;\ > > > +(W) mov (1) dst.4<1>:ud r0_fftid > > > + > > > +#define load_thread_media_block_msg_hdr(dst, x, y, width) \ > > > +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ > > > +(W) shl (1) dst.0<1>:ud r0_tgidx 0x2:ud ;\ > > > +(W) add (1) dst.0<1>:ud dst.0<0;1,0>:ud x:ud ;\ > > > +(W) add (1) dst.1<1>:ud r0_tgidy y ;\ > > > +(W) mov (1) dst.2<1>:ud (width - 1):ud ;\ > > > +(W) mov (1) dst.4<1>:ud r0_fftid > > > + > > > +#define load_shared_a2dblock_payload(dst, y, width) \ > > > +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ > > > +(W) mov (1) dst.6<1>:ud y ;\ > > > +(W) mov (1) dst.7<1>:ud (width - 1):ud > > > + > > > +#define load_thread_a2dblock_payload(dst, x, y, width) \ > > > +(W) mov (8) dst.0<1>:ud 0x0:ud ;\ > > > +(W) shl (1) dst.5<1>:ud r0_tgidx 0x2:ud ;\ > > > +(W) add (1) dst.5<1>:ud dst.5<0;1,0>:ud x:ud ;\ > > > +(W) add (1) dst.6<1>:ud r0_tgidy y ;\ > > > +(W) mov (1) dst.7<1>:ud (width - 1):ud ;\ > > > + > > > +#if GEN_VER < 2000 > > > +#define load_shared_space_addr(dst, y, width) load_shared_media_block_msg_hdr(dst, y, width) > > > +#define load_thread_space_addr(dst, x, y, width) load_thread_media_block_msg_hdr(dst, x, y, width) > > > +#define load_space_dw(dst, src) send.dc1 (1) dst src src1_null 0x0 0x2190000 > > > +#define store_space_dw(dst, src) send.dc1 (1) null dst null 0x0 0x40A8000 > > > +#else > > > +#define load_shared_space_addr(dst, y, width) load_shared_a2dblock_payload(dst, y, width) > > > +#define load_thread_space_addr(dst, x, y, width) load_thread_a2dblock_payload(dst, x, y, width) > > Only width of those spaces? Possibly we could have height of the block parametrized too, right? That > > could be added when use case arises of course. > > > > Mine concern about those macros commes from the fact that future reader may think that this is part > > of iga assembly. Could we by any chance change the name so it emphasis that it is our own making? > > > Capitalize? > > IMHO syntax "f(x, y...)" already suggests it is not iga64, but > capitalization is even stronger signal :) Capitalization is fine, alternatively I thought about some prefix, but couldn't find good one. ;p Regards, Dominik > > > > Or > > somhow point reader to the implementation of those. There are obviously some constrains, i.e. wrt to > > the 'width' params, which user can only deduce by reading the implementation. > > Hmm, comment on the top of file? Adding "#include <...>"to each shader > looks overkill for me for now (but is the most explicit way). > > In the latter case we would need to move macros to another include file, > then add sth like "#include <space_helpers.h>" to shaders. > > But as I said before, it would be nice if our macro library grows, for > now it seems overkill, but I am open to suggestions :) > > > Regards > > Andrzej > > > > > > Regards, Dominik > > > > > +#define load_space_dw(dst, src) send.tgm (1) dst src null:0 0x0 0x62100003 > > > +#define store_space_dw(dst, src) send.tgm (1) null dst null:0 0x0 0x64000007 > > > +#endif > > > + > > > #endif > > > ^ permalink raw reply [flat|nested] 14+ messages in thread
* ✗ GitLab.Pipeline: warning for lib/gpgpu_shader: simplify load/store shaders 2024-11-14 10:31 [PATCH 0/2] lib/gpgpu_shader: simplify load/store shaders Andrzej Hajda 2024-11-14 10:31 ` [PATCH 1/2] scripts/generate_iga64_codes: add iga64_macros.h to checksum calculation Andrzej Hajda 2024-11-14 10:31 ` [PATCH 2/2] lib/gpgpu_shader: simplify load/store shaders Andrzej Hajda @ 2024-11-14 12:18 ` Patchwork 2024-11-14 12:40 ` ✓ Fi.CI.BAT: success " Patchwork ` (3 subsequent siblings) 6 siblings, 0 replies; 14+ messages in thread From: Patchwork @ 2024-11-14 12:18 UTC (permalink / raw) To: Andrzej Hajda; +Cc: igt-dev == Series Details == Series: lib/gpgpu_shader: simplify load/store shaders URL : https://patchwork.freedesktop.org/series/141348/ State : warning == Summary == Pipeline status: FAILED. see https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/pipelines/1310268 for the overview. build-containers:build-debian has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/66596464): Thank you for contributing to freedesktop.org Fetching changes... Reinitialized existing Git repository in /builds/gfx-ci/igt-ci-tags/.git/ Checking out c4e1e4cb as detached HEAD (ref is intel/IGTPW_12103)... Removing build/ Removing installdir/ Skipping Git submodules setup section_end:1731586385:get_sources section_start:1731586385:step_script Executing "step_script" stage of the job script Using docker image sha256:594aa868d31ee3304dee8cae8a3433c89a6fcfcf6c7d420c04cce22f60147176 for registry.freedesktop.org/wayland/ci-templates/buildah:2019-08-13.0 with digest registry.freedesktop.org/wayland/ci-templates/buildah@sha256:7dbcf22cd2c1c7d49db0dc7b4ab207c3d6a4a09bd81cc3b71a688d3727d8749f ... $ /host/bin/curl -s -L --cacert /host/ca-certificates.crt --retry 4 -f --retry-delay 60 https://gitlab.freedesktop.org/freedesktop/helm-gitlab-infra/-/raw/main/runner-gating/runner-gating.sh | sh Checking if the user of the pipeline is allowed... section_end:1731586406:step_script section_start:1731586406:cleanup_file_variables Cleaning up project directory and file based variables section_end:1731586407:cleanup_file_variables ERROR: Job failed: exit code 137 == Logs == For more details see: https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/pipelines/1310268 ^ permalink raw reply [flat|nested] 14+ messages in thread
* ✓ Fi.CI.BAT: success for lib/gpgpu_shader: simplify load/store shaders 2024-11-14 10:31 [PATCH 0/2] lib/gpgpu_shader: simplify load/store shaders Andrzej Hajda ` (2 preceding siblings ...) 2024-11-14 12:18 ` ✗ GitLab.Pipeline: warning for " Patchwork @ 2024-11-14 12:40 ` Patchwork 2024-11-14 12:48 ` ✓ CI.xeBAT: " Patchwork ` (2 subsequent siblings) 6 siblings, 0 replies; 14+ messages in thread From: Patchwork @ 2024-11-14 12:40 UTC (permalink / raw) To: Andrzej Hajda; +Cc: igt-dev [-- Attachment #1: Type: text/plain, Size: 3317 bytes --] == Series Details == Series: lib/gpgpu_shader: simplify load/store shaders URL : https://patchwork.freedesktop.org/series/141348/ State : success == Summary == CI Bug Log - changes from IGT_8110 -> IGTPW_12103 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/index.html Participating hosts (45 -> 44) ------------------------------ Missing (1): fi-snb-2520m Known issues ------------ Here are the changes found in IGTPW_12103 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@i915_selftest@live: - bat-mtlp-8: [PASS][1] -> [ABORT][2] ([i915#12061]) +1 other test abort [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8110/bat-mtlp-8/igt@i915_selftest@live.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/bat-mtlp-8/igt@i915_selftest@live.html #### Possible fixes #### * igt@i915_selftest@live: - bat-arlh-3: [ABORT][3] ([i915#10341] / [i915#12061]) -> [PASS][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8110/bat-arlh-3/igt@i915_selftest@live.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/bat-arlh-3/igt@i915_selftest@live.html - bat-arlh-2: [ABORT][5] ([i915#10341]) -> [PASS][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8110/bat-arlh-2/igt@i915_selftest@live.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/bat-arlh-2/igt@i915_selftest@live.html * igt@i915_selftest@live@workarounds: - bat-arlh-3: [ABORT][7] ([i915#12061]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8110/bat-arlh-3/igt@i915_selftest@live@workarounds.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/bat-arlh-3/igt@i915_selftest@live@workarounds.html - bat-arlh-2: [ABORT][9] ([i915#12061]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8110/bat-arlh-2/igt@i915_selftest@live@workarounds.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/bat-arlh-2/igt@i915_selftest@live@workarounds.html - bat-mtlp-6: [ABORT][11] ([i915#12061]) -> [PASS][12] +1 other test pass [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8110/bat-mtlp-6/igt@i915_selftest@live@workarounds.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/bat-mtlp-6/igt@i915_selftest@live@workarounds.html [i915#10341]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10341 [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061 Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_8110 -> IGTPW_12103 * Linux: CI_DRM_15694 -> CI_DRM_15695 CI-20190529: 20190529 CI_DRM_15694: a03ca0a62967eea85aedea158db9dc5078496d4d @ git://anongit.freedesktop.org/gfx-ci/linux CI_DRM_15695: 1e3f4084e4e1fba8d172be0c2b964ab5c816394d @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_12103: c4e1e4cb531f2f2541043c19d3493adc24bab0d4 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git IGT_8110: 868b25a05a9492a99228d798c6f71bea5ceaa6e1 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/index.html [-- Attachment #2: Type: text/html, Size: 4371 bytes --] ^ permalink raw reply [flat|nested] 14+ messages in thread
* ✓ CI.xeBAT: success for lib/gpgpu_shader: simplify load/store shaders 2024-11-14 10:31 [PATCH 0/2] lib/gpgpu_shader: simplify load/store shaders Andrzej Hajda ` (3 preceding siblings ...) 2024-11-14 12:40 ` ✓ Fi.CI.BAT: success " Patchwork @ 2024-11-14 12:48 ` Patchwork 2024-11-14 17:45 ` ✗ Fi.CI.IGT: failure " Patchwork 2024-11-14 23:31 ` ✗ CI.xeFULL: " Patchwork 6 siblings, 0 replies; 14+ messages in thread From: Patchwork @ 2024-11-14 12:48 UTC (permalink / raw) To: Andrzej Hajda; +Cc: igt-dev [-- Attachment #1: Type: text/plain, Size: 2254 bytes --] == Series Details == Series: lib/gpgpu_shader: simplify load/store shaders URL : https://patchwork.freedesktop.org/series/141348/ State : success == Summary == CI Bug Log - changes from XEIGT_8110_BAT -> XEIGTPW_12103_BAT ==================================================== Summary ------- **SUCCESS** No regressions found. Participating hosts (9 -> 9) ------------------------------ No changes in participating hosts Known issues ------------ Here are the changes found in XEIGTPW_12103_BAT that come from known issues: ### IGT changes ### #### Issues hit #### * igt@xe_live_ktest@xe_bo@xe_bo_shrink_kunit: - bat-bmg-1: [PASS][1] -> [INCOMPLETE][2] ([Intel XE#2874] / [Intel XE#2998]) +1 other test incomplete [1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/bat-bmg-1/igt@xe_live_ktest@xe_bo@xe_bo_shrink_kunit.html [2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/bat-bmg-1/igt@xe_live_ktest@xe_bo@xe_bo_shrink_kunit.html #### Possible fixes #### * igt@xe_live_ktest@xe_bo@xe_bo_shrink_kunit: - bat-bmg-2: [INCOMPLETE][3] ([Intel XE#2874] / [Intel XE#2998]) -> [PASS][4] +1 other test pass [3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/bat-bmg-2/igt@xe_live_ktest@xe_bo@xe_bo_shrink_kunit.html [4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/bat-bmg-2/igt@xe_live_ktest@xe_bo@xe_bo_shrink_kunit.html [Intel XE#2874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2874 [Intel XE#2998]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2998 Build changes ------------- * IGT: IGT_8110 -> IGTPW_12103 * Linux: xe-2226-a03ca0a62967eea85aedea158db9dc5078496d4d -> xe-2227-1e3f4084e4e1fba8d172be0c2b964ab5c816394d IGTPW_12103: c4e1e4cb531f2f2541043c19d3493adc24bab0d4 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git IGT_8110: 868b25a05a9492a99228d798c6f71bea5ceaa6e1 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git xe-2226-a03ca0a62967eea85aedea158db9dc5078496d4d: a03ca0a62967eea85aedea158db9dc5078496d4d xe-2227-1e3f4084e4e1fba8d172be0c2b964ab5c816394d: 1e3f4084e4e1fba8d172be0c2b964ab5c816394d == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/index.html [-- Attachment #2: Type: text/html, Size: 2990 bytes --] ^ permalink raw reply [flat|nested] 14+ messages in thread
* ✗ Fi.CI.IGT: failure for lib/gpgpu_shader: simplify load/store shaders 2024-11-14 10:31 [PATCH 0/2] lib/gpgpu_shader: simplify load/store shaders Andrzej Hajda ` (4 preceding siblings ...) 2024-11-14 12:48 ` ✓ CI.xeBAT: " Patchwork @ 2024-11-14 17:45 ` Patchwork 2024-11-14 23:31 ` ✗ CI.xeFULL: " Patchwork 6 siblings, 0 replies; 14+ messages in thread From: Patchwork @ 2024-11-14 17:45 UTC (permalink / raw) To: Hajda, Andrzej; +Cc: igt-dev [-- Attachment #1: Type: text/plain, Size: 100265 bytes --] == Series Details == Series: lib/gpgpu_shader: simplify load/store shaders URL : https://patchwork.freedesktop.org/series/141348/ State : failure == Summary == CI Bug Log - changes from CI_DRM_15695_full -> IGTPW_12103_full ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with IGTPW_12103_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in IGTPW_12103_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/index.html Participating hosts (10 -> 9) ------------------------------ Missing (1): shard-glk Possible new issues ------------------- Here are the unknown changes that may have been introduced in IGTPW_12103_full: ### IGT changes ### #### Possible regressions #### * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc: - shard-dg2: [PASS][1] -> [INCOMPLETE][2] +2 other tests incomplete [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-dg2-3/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-3/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc.html * igt@kms_cursor_crc@cursor-random-256x85: - shard-dg2: NOTRUN -> [INCOMPLETE][3] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-1/igt@kms_cursor_crc@cursor-random-256x85.html * igt@kms_flip_tiling@flip-change-tiling: - shard-dg1: [PASS][4] -> [INCOMPLETE][5] +1 other test incomplete [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-dg1-13/igt@kms_flip_tiling@flip-change-tiling.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-17/igt@kms_flip_tiling@flip-change-tiling.html * igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-4-x-to-y-rc-ccs-cc: - shard-dg1: NOTRUN -> [INCOMPLETE][6] [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-17/igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-4-x-to-y-rc-ccs-cc.html #### Suppressed #### The following results come from untrusted machines, tests, or statuses. They do not affect the overall result. * igt@kms_cursor_crc@cursor-suspend@pipe-d-dp-4: - {shard-dg2-9}: NOTRUN -> [INCOMPLETE][7] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-9/igt@kms_cursor_crc@cursor-suspend@pipe-d-dp-4.html Known issues ------------ Here are the changes found in IGTPW_12103_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@debugfs_test@basic-hwmon: - shard-rkl: NOTRUN -> [SKIP][8] ([i915#9318]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-7/igt@debugfs_test@basic-hwmon.html * igt@device_reset@unbind-cold-reset-rebind: - shard-tglu: NOTRUN -> [SKIP][9] ([i915#11078]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-6/igt@device_reset@unbind-cold-reset-rebind.html * igt@drm_fdinfo@busy-hang@bcs0: - shard-dg2: NOTRUN -> [SKIP][10] ([i915#8414]) +17 other tests skip [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-10/igt@drm_fdinfo@busy-hang@bcs0.html * igt@drm_fdinfo@virtual-busy: - shard-mtlp: NOTRUN -> [SKIP][11] ([i915#8414]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-5/igt@drm_fdinfo@virtual-busy.html - shard-dg1: NOTRUN -> [SKIP][12] ([i915#8414]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-17/igt@drm_fdinfo@virtual-busy.html * igt@gem_bad_reloc@negative-reloc-lut: - shard-rkl: NOTRUN -> [SKIP][13] ([i915#3281]) +1 other test skip [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-6/igt@gem_bad_reloc@negative-reloc-lut.html * igt@gem_basic@multigpu-create-close: - shard-rkl: NOTRUN -> [SKIP][14] ([i915#7697]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-2/igt@gem_basic@multigpu-create-close.html - shard-tglu: NOTRUN -> [SKIP][15] ([i915#7697]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-6/igt@gem_basic@multigpu-create-close.html * igt@gem_busy@close-race: - shard-dg2: NOTRUN -> [FAIL][16] ([i915#12296] / [i915#12577]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-6/igt@gem_busy@close-race.html - shard-tglu-1: NOTRUN -> [FAIL][17] ([i915#12296] / [i915#12577]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-1/igt@gem_busy@close-race.html * igt@gem_caching@reads: - shard-mtlp: NOTRUN -> [SKIP][18] ([i915#4873]) +1 other test skip [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-3/igt@gem_caching@reads.html * igt@gem_ccs@block-copy-compressed: - shard-tglu: NOTRUN -> [SKIP][19] ([i915#3555] / [i915#9323]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-7/igt@gem_ccs@block-copy-compressed.html * igt@gem_ccs@block-multicopy-compressed: - shard-tglu-1: NOTRUN -> [SKIP][20] ([i915#9323]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-1/igt@gem_ccs@block-multicopy-compressed.html * igt@gem_ctx_engines@invalid-engines: - shard-tglu: [PASS][21] -> [FAIL][22] ([i915#12031]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-tglu-2/igt@gem_ctx_engines@invalid-engines.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-2/igt@gem_ctx_engines@invalid-engines.html - shard-mtlp: [PASS][23] -> [FAIL][24] ([i915#12031]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-mtlp-2/igt@gem_ctx_engines@invalid-engines.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-2/igt@gem_ctx_engines@invalid-engines.html * igt@gem_ctx_persistence@file: - shard-snb: NOTRUN -> [SKIP][25] ([i915#1099]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-snb4/igt@gem_ctx_persistence@file.html * igt@gem_ctx_persistence@heartbeat-many: - shard-dg2: NOTRUN -> [SKIP][26] ([i915#8555]) [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-2/igt@gem_ctx_persistence@heartbeat-many.html * igt@gem_ctx_persistence@saturated-hostile-nopreempt: - shard-dg2: NOTRUN -> [SKIP][27] ([i915#5882]) +7 other tests skip [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-5/igt@gem_ctx_persistence@saturated-hostile-nopreempt.html * igt@gem_ctx_sseu@invalid-args: - shard-tglu: NOTRUN -> [SKIP][28] ([i915#280]) [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-9/igt@gem_ctx_sseu@invalid-args.html * igt@gem_ctx_sseu@invalid-sseu: - shard-dg2: NOTRUN -> [SKIP][29] ([i915#280]) [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-6/igt@gem_ctx_sseu@invalid-sseu.html * igt@gem_eio@hibernate: - shard-dg2: NOTRUN -> [ABORT][30] ([i915#10030] / [i915#7975] / [i915#8213]) [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-5/igt@gem_eio@hibernate.html * igt@gem_exec_balancer@bonded-pair: - shard-dg2: NOTRUN -> [SKIP][31] ([i915#4771]) [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-10/igt@gem_exec_balancer@bonded-pair.html * igt@gem_exec_balancer@parallel-contexts: - shard-rkl: NOTRUN -> [SKIP][32] ([i915#4525]) +1 other test skip [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-4/igt@gem_exec_balancer@parallel-contexts.html * igt@gem_exec_big@single: - shard-tglu: [PASS][33] -> [ABORT][34] ([i915#11713]) [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-tglu-9/igt@gem_exec_big@single.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-4/igt@gem_exec_big@single.html * igt@gem_exec_capture@capture-recoverable: - shard-tglu-1: NOTRUN -> [SKIP][35] ([i915#6344]) [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-1/igt@gem_exec_capture@capture-recoverable.html * igt@gem_exec_fair@basic-deadline: - shard-rkl: [PASS][36] -> [FAIL][37] ([i915#2846]) [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-rkl-1/igt@gem_exec_fair@basic-deadline.html [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-4/igt@gem_exec_fair@basic-deadline.html - shard-tglu: NOTRUN -> [FAIL][38] ([i915#2846]) [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-7/igt@gem_exec_fair@basic-deadline.html * igt@gem_exec_fair@basic-none: - shard-tglu: NOTRUN -> [FAIL][39] ([i915#2842]) +7 other tests fail [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-3/igt@gem_exec_fair@basic-none.html * igt@gem_exec_fair@basic-none-share: - shard-tglu-1: NOTRUN -> [FAIL][40] ([i915#2842]) +1 other test fail [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-1/igt@gem_exec_fair@basic-none-share.html * igt@gem_exec_fair@basic-pace@bcs0: - shard-rkl: [PASS][41] -> [FAIL][42] ([i915#2842]) [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-rkl-4/igt@gem_exec_fair@basic-pace@bcs0.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-2/igt@gem_exec_fair@basic-pace@bcs0.html * igt@gem_exec_fair@basic-sync: - shard-dg2: NOTRUN -> [SKIP][43] ([i915#3539]) [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-5/igt@gem_exec_fair@basic-sync.html * igt@gem_exec_flush@basic-wb-prw-default: - shard-dg2: NOTRUN -> [SKIP][44] ([i915#3539] / [i915#4852]) +2 other tests skip [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-1/igt@gem_exec_flush@basic-wb-prw-default.html * igt@gem_exec_reloc@basic-softpin: - shard-dg2: NOTRUN -> [SKIP][45] ([i915#3281]) +13 other tests skip [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-8/igt@gem_exec_reloc@basic-softpin.html * igt@gem_exec_reloc@basic-wc-cpu-noreloc: - shard-mtlp: NOTRUN -> [SKIP][46] ([i915#3281]) [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-8/igt@gem_exec_reloc@basic-wc-cpu-noreloc.html * igt@gem_exec_reloc@basic-wc-gtt-active: - shard-dg1: NOTRUN -> [SKIP][47] ([i915#3281]) [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-19/igt@gem_exec_reloc@basic-wc-gtt-active.html * igt@gem_exec_schedule@reorder-wide: - shard-dg2: NOTRUN -> [SKIP][48] ([i915#4537] / [i915#4812]) [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-11/igt@gem_exec_schedule@reorder-wide.html - shard-dg1: NOTRUN -> [SKIP][49] ([i915#4812]) [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-12/igt@gem_exec_schedule@reorder-wide.html * igt@gem_exec_suspend@basic-s4-devices: - shard-dg1: [PASS][50] -> [ABORT][51] ([i915#7975] / [i915#8213]) +1 other test abort [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-dg1-18/igt@gem_exec_suspend@basic-s4-devices.html [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-14/igt@gem_exec_suspend@basic-s4-devices.html * igt@gem_fenced_exec_thrash@no-spare-fences: - shard-dg1: NOTRUN -> [SKIP][52] ([i915#4860]) +2 other tests skip [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-15/igt@gem_fenced_exec_thrash@no-spare-fences.html * igt@gem_fenced_exec_thrash@no-spare-fences-busy: - shard-dg2: NOTRUN -> [SKIP][53] ([i915#4860]) +1 other test skip [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-6/igt@gem_fenced_exec_thrash@no-spare-fences-busy.html * igt@gem_huc_copy@huc-copy: - shard-tglu-1: NOTRUN -> [SKIP][54] ([i915#2190]) [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-1/igt@gem_huc_copy@huc-copy.html * igt@gem_lmem_evict@dontneed-evict-race: - shard-tglu: NOTRUN -> [SKIP][55] ([i915#4613] / [i915#7582]) [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-6/igt@gem_lmem_evict@dontneed-evict-race.html * igt@gem_lmem_swapping@heavy-random: - shard-mtlp: NOTRUN -> [SKIP][56] ([i915#4613]) +1 other test skip [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-2/igt@gem_lmem_swapping@heavy-random.html * igt@gem_lmem_swapping@heavy-verify-random: - shard-rkl: NOTRUN -> [SKIP][57] ([i915#4613]) +2 other tests skip [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-2/igt@gem_lmem_swapping@heavy-verify-random.html * igt@gem_lmem_swapping@heavy-verify-random-ccs: - shard-dg1: NOTRUN -> [SKIP][58] ([i915#12193]) [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-16/igt@gem_lmem_swapping@heavy-verify-random-ccs.html * igt@gem_lmem_swapping@heavy-verify-random-ccs@lmem0: - shard-dg1: NOTRUN -> [SKIP][59] ([i915#4565]) [59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-16/igt@gem_lmem_swapping@heavy-verify-random-ccs@lmem0.html * igt@gem_lmem_swapping@massive: - shard-tglu-1: NOTRUN -> [SKIP][60] ([i915#4613]) [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-1/igt@gem_lmem_swapping@massive.html * igt@gem_lmem_swapping@random-engines: - shard-tglu: NOTRUN -> [SKIP][61] ([i915#4613]) +1 other test skip [61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-2/igt@gem_lmem_swapping@random-engines.html * igt@gem_madvise@dontneed-before-exec: - shard-mtlp: NOTRUN -> [SKIP][62] ([i915#3282]) +1 other test skip [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-2/igt@gem_madvise@dontneed-before-exec.html - shard-dg1: NOTRUN -> [SKIP][63] ([i915#3282]) [63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-14/igt@gem_madvise@dontneed-before-exec.html * igt@gem_media_vme: - shard-dg2: NOTRUN -> [SKIP][64] ([i915#284]) [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-4/igt@gem_media_vme.html * igt@gem_mmap@bad-object: - shard-dg1: NOTRUN -> [SKIP][65] ([i915#4083]) +3 other tests skip [65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-13/igt@gem_mmap@bad-object.html - shard-mtlp: NOTRUN -> [SKIP][66] ([i915#4083]) +3 other tests skip [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-4/igt@gem_mmap@bad-object.html * igt@gem_mmap_gtt@basic-read-write-distinct: - shard-dg2: NOTRUN -> [SKIP][67] ([i915#4077]) +12 other tests skip [67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-6/igt@gem_mmap_gtt@basic-read-write-distinct.html * igt@gem_mmap_gtt@fault-concurrent: - shard-dg1: NOTRUN -> [SKIP][68] ([i915#4077]) +5 other tests skip [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-16/igt@gem_mmap_gtt@fault-concurrent.html - shard-mtlp: NOTRUN -> [SKIP][69] ([i915#4077]) +4 other tests skip [69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-6/igt@gem_mmap_gtt@fault-concurrent.html * igt@gem_mmap_wc@copy: - shard-dg2: NOTRUN -> [SKIP][70] ([i915#4083]) +5 other tests skip [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-4/igt@gem_mmap_wc@copy.html * igt@gem_partial_pwrite_pread@write-display: - shard-rkl: NOTRUN -> [SKIP][71] ([i915#3282]) +2 other tests skip [71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-1/igt@gem_partial_pwrite_pread@write-display.html * igt@gem_pread@display: - shard-dg2: NOTRUN -> [SKIP][72] ([i915#3282]) +6 other tests skip [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-10/igt@gem_pread@display.html * igt@gem_pxp@create-protected-buffer: - shard-dg1: NOTRUN -> [SKIP][73] ([i915#4270]) [73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-16/igt@gem_pxp@create-protected-buffer.html * igt@gem_pxp@create-regular-context-1: - shard-tglu-1: NOTRUN -> [SKIP][74] ([i915#4270]) +1 other test skip [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-1/igt@gem_pxp@create-regular-context-1.html * igt@gem_pxp@display-protected-crc: - shard-dg2: NOTRUN -> [SKIP][75] ([i915#4270]) +3 other tests skip [75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-4/igt@gem_pxp@display-protected-crc.html * igt@gem_pxp@reject-modify-context-protection-off-3: - shard-rkl: NOTRUN -> [SKIP][76] ([i915#4270]) [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-5/igt@gem_pxp@reject-modify-context-protection-off-3.html - shard-tglu: NOTRUN -> [SKIP][77] ([i915#4270]) +3 other tests skip [77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-4/igt@gem_pxp@reject-modify-context-protection-off-3.html * igt@gem_render_copy@mixed-tiled-to-yf-tiled-ccs: - shard-dg2: NOTRUN -> [SKIP][78] ([i915#5190] / [i915#8428]) +6 other tests skip [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-10/igt@gem_render_copy@mixed-tiled-to-yf-tiled-ccs.html * igt@gem_render_copy@y-tiled-mc-ccs-to-vebox-yf-tiled: - shard-mtlp: NOTRUN -> [SKIP][79] ([i915#8428]) +2 other tests skip [79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-5/igt@gem_render_copy@y-tiled-mc-ccs-to-vebox-yf-tiled.html * igt@gem_tiled_pread_pwrite: - shard-dg2: NOTRUN -> [SKIP][80] ([i915#4079]) +1 other test skip [80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-10/igt@gem_tiled_pread_pwrite.html - shard-dg1: NOTRUN -> [SKIP][81] ([i915#4079]) [81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-13/igt@gem_tiled_pread_pwrite.html - shard-mtlp: NOTRUN -> [SKIP][82] ([i915#4079]) [82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-4/igt@gem_tiled_pread_pwrite.html * igt@gem_userptr_blits@create-destroy-unsync: - shard-tglu: NOTRUN -> [SKIP][83] ([i915#3297]) +2 other tests skip [83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-2/igt@gem_userptr_blits@create-destroy-unsync.html * igt@gem_userptr_blits@forbidden-operations: - shard-dg2: NOTRUN -> [SKIP][84] ([i915#3282] / [i915#3297]) [84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-8/igt@gem_userptr_blits@forbidden-operations.html * igt@gem_userptr_blits@invalid-mmap-offset-unsync: - shard-rkl: NOTRUN -> [SKIP][85] ([i915#3297]) [85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-7/igt@gem_userptr_blits@invalid-mmap-offset-unsync.html - shard-dg1: NOTRUN -> [SKIP][86] ([i915#3297]) [86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-17/igt@gem_userptr_blits@invalid-mmap-offset-unsync.html * igt@gem_userptr_blits@map-fixed-invalidate-overlap: - shard-dg2: NOTRUN -> [SKIP][87] ([i915#3297] / [i915#4880]) [87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-2/igt@gem_userptr_blits@map-fixed-invalidate-overlap.html - shard-dg1: NOTRUN -> [SKIP][88] ([i915#3297] / [i915#4880]) [88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-13/igt@gem_userptr_blits@map-fixed-invalidate-overlap.html - shard-mtlp: NOTRUN -> [SKIP][89] ([i915#3297]) [89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-1/igt@gem_userptr_blits@map-fixed-invalidate-overlap.html * igt@gem_userptr_blits@relocations: - shard-dg2: NOTRUN -> [SKIP][90] ([i915#3281] / [i915#3297]) [90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-4/igt@gem_userptr_blits@relocations.html - shard-rkl: NOTRUN -> [SKIP][91] ([i915#3281] / [i915#3297]) [91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-1/igt@gem_userptr_blits@relocations.html * igt@gem_userptr_blits@unsync-overlap: - shard-dg2: NOTRUN -> [SKIP][92] ([i915#3297]) +1 other test skip [92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-3/igt@gem_userptr_blits@unsync-overlap.html * igt@gen9_exec_parse@allowed-all: - shard-mtlp: NOTRUN -> [SKIP][93] ([i915#2856]) [93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-1/igt@gen9_exec_parse@allowed-all.html * igt@gen9_exec_parse@bb-start-cmd: - shard-tglu-1: NOTRUN -> [SKIP][94] ([i915#2527] / [i915#2856]) +2 other tests skip [94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-1/igt@gen9_exec_parse@bb-start-cmd.html * igt@gen9_exec_parse@bb-start-param: - shard-dg1: NOTRUN -> [SKIP][95] ([i915#2527]) +2 other tests skip [95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-14/igt@gen9_exec_parse@bb-start-param.html * igt@gen9_exec_parse@cmd-crossing-page: - shard-tglu: NOTRUN -> [SKIP][96] ([i915#2527] / [i915#2856]) +3 other tests skip [96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-9/igt@gen9_exec_parse@cmd-crossing-page.html * igt@gen9_exec_parse@shadow-peek: - shard-dg2: NOTRUN -> [SKIP][97] ([i915#2856]) +3 other tests skip [97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-2/igt@gen9_exec_parse@shadow-peek.html - shard-rkl: NOTRUN -> [SKIP][98] ([i915#2527]) +2 other tests skip [98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-4/igt@gen9_exec_parse@shadow-peek.html * igt@i915_module_load@load: - shard-tglu: NOTRUN -> [SKIP][99] ([i915#6227]) [99]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-7/igt@i915_module_load@load.html * igt@i915_module_load@reload-with-fault-injection: - shard-snb: [PASS][100] -> [ABORT][101] ([i915#11703]) [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-snb5/igt@i915_module_load@reload-with-fault-injection.html [101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-snb2/igt@i915_module_load@reload-with-fault-injection.html - shard-tglu-1: NOTRUN -> [ABORT][102] ([i915#9820]) [102]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-1/igt@i915_module_load@reload-with-fault-injection.html * igt@i915_pipe_stress@stress-xrgb8888-ytiled: - shard-mtlp: NOTRUN -> [SKIP][103] ([i915#8436]) [103]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-5/igt@i915_pipe_stress@stress-xrgb8888-ytiled.html * igt@i915_pm_freq_api@freq-suspend: - shard-rkl: NOTRUN -> [SKIP][104] ([i915#8399]) [104]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-1/igt@i915_pm_freq_api@freq-suspend.html * igt@i915_pm_rc6_residency@rc6-fence: - shard-tglu: NOTRUN -> [WARN][105] ([i915#2681]) +1 other test warn [105]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-8/igt@i915_pm_rc6_residency@rc6-fence.html * igt@i915_pm_rc6_residency@rc6-idle@gt0-vcs0: - shard-dg1: [PASS][106] -> [FAIL][107] ([i915#12548] / [i915#3591]) [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-dg1-14/igt@i915_pm_rc6_residency@rc6-idle@gt0-vcs0.html [107]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-15/igt@i915_pm_rc6_residency@rc6-idle@gt0-vcs0.html * igt@i915_pm_rps@thresholds-park: - shard-dg1: NOTRUN -> [SKIP][108] ([i915#11681]) [108]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-12/igt@i915_pm_rps@thresholds-park.html * igt@i915_power@sanity: - shard-mtlp: [PASS][109] -> [SKIP][110] ([i915#7984]) [109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-mtlp-1/igt@i915_power@sanity.html [110]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-1/igt@i915_power@sanity.html - shard-rkl: NOTRUN -> [SKIP][111] ([i915#7984]) [111]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-4/igt@i915_power@sanity.html * igt@intel_hwmon@hwmon-read: - shard-rkl: NOTRUN -> [SKIP][112] ([i915#7707]) [112]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-4/igt@intel_hwmon@hwmon-read.html * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-c-dp-4-4-mc-ccs: - shard-dg2: NOTRUN -> [SKIP][113] ([i915#8709]) +11 other tests skip [113]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-10/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-c-dp-4-4-mc-ccs.html * igt@kms_atomic@plane-primary-overlay-mutable-zpos: - shard-mtlp: NOTRUN -> [SKIP][114] ([i915#3555]) [114]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-1/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html - shard-dg1: NOTRUN -> [SKIP][115] ([i915#9531]) [115]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-18/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html - shard-tglu: NOTRUN -> [SKIP][116] ([i915#9531]) [116]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-3/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html * igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels: - shard-dg1: NOTRUN -> [SKIP][117] ([i915#1769] / [i915#3555]) [117]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-12/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html * igt@kms_big_fb@4-tiled-32bpp-rotate-0: - shard-tglu-1: NOTRUN -> [SKIP][118] ([i915#5286]) +4 other tests skip [118]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-1/igt@kms_big_fb@4-tiled-32bpp-rotate-0.html * igt@kms_big_fb@4-tiled-64bpp-rotate-90: - shard-dg1: NOTRUN -> [SKIP][119] ([i915#4538] / [i915#5286]) +1 other test skip [119]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-15/igt@kms_big_fb@4-tiled-64bpp-rotate-90.html * igt@kms_big_fb@4-tiled-8bpp-rotate-90: - shard-rkl: NOTRUN -> [SKIP][120] ([i915#5286]) +1 other test skip [120]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-7/igt@kms_big_fb@4-tiled-8bpp-rotate-90.html * igt@kms_big_fb@4-tiled-addfb-size-offset-overflow: - shard-tglu: NOTRUN -> [SKIP][121] ([i915#5286]) +3 other tests skip [121]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-2/igt@kms_big_fb@4-tiled-addfb-size-offset-overflow.html - shard-dg1: NOTRUN -> [SKIP][122] ([i915#5286]) [122]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-14/igt@kms_big_fb@4-tiled-addfb-size-offset-overflow.html * igt@kms_big_fb@linear-8bpp-rotate-0: - shard-mtlp: [PASS][123] -> [FAIL][124] ([i915#5138]) [123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-mtlp-4/igt@kms_big_fb@linear-8bpp-rotate-0.html [124]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-4/igt@kms_big_fb@linear-8bpp-rotate-0.html * igt@kms_big_fb@x-tiled-16bpp-rotate-90: - shard-rkl: NOTRUN -> [SKIP][125] ([i915#3638]) +1 other test skip [125]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-3/igt@kms_big_fb@x-tiled-16bpp-rotate-90.html * igt@kms_big_fb@x-tiled-32bpp-rotate-270: - shard-dg2: NOTRUN -> [SKIP][126] +16 other tests skip [126]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-2/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html - shard-dg1: NOTRUN -> [SKIP][127] ([i915#3638]) [127]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-16/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html * igt@kms_big_fb@y-tiled-8bpp-rotate-180: - shard-dg2: NOTRUN -> [SKIP][128] ([i915#4538] / [i915#5190]) +13 other tests skip [128]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-6/igt@kms_big_fb@y-tiled-8bpp-rotate-180.html * igt@kms_big_fb@y-tiled-addfb-size-offset-overflow: - shard-mtlp: NOTRUN -> [SKIP][129] ([i915#6187]) [129]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-4/igt@kms_big_fb@y-tiled-addfb-size-offset-overflow.html * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip: - shard-mtlp: NOTRUN -> [SKIP][130] +8 other tests skip [130]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-8/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip.html * igt@kms_big_fb@yf-tiled-32bpp-rotate-180: - shard-dg1: NOTRUN -> [SKIP][131] ([i915#4538]) +1 other test skip [131]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-17/igt@kms_big_fb@yf-tiled-32bpp-rotate-180.html * igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs@pipe-c-edp-1: - shard-mtlp: NOTRUN -> [SKIP][132] ([i915#6095]) +4 other tests skip [132]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-7/igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs@pipe-c-edp-1.html * igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs: - shard-rkl: NOTRUN -> [SKIP][133] ([i915#12313]) [133]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-3/igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs.html * igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-4: - shard-dg1: NOTRUN -> [SKIP][134] ([i915#4423] / [i915#6095]) [134]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-18/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-4.html * igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-4: - shard-dg1: NOTRUN -> [SKIP][135] ([i915#6095]) +120 other tests skip [135]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-18/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-4.html * igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs: - shard-dg2: NOTRUN -> [SKIP][136] ([i915#12313]) [136]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-6/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs.html * igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2: - shard-rkl: NOTRUN -> [SKIP][137] ([i915#6095]) +106 other tests skip [137]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-5/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs: - shard-dg2: NOTRUN -> [SKIP][138] ([i915#12805]) [138]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-7/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs: - shard-tglu: NOTRUN -> [SKIP][139] ([i915#12805]) [139]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-3/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc@pipe-d-hdmi-a-1: - shard-dg2: NOTRUN -> [SKIP][140] ([i915#6095]) +13 other tests skip [140]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-8/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc@pipe-d-hdmi-a-1.html * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs: - shard-tglu-1: NOTRUN -> [SKIP][141] ([i915#12313]) [141]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-1/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-3: - shard-dg2: NOTRUN -> [SKIP][142] ([i915#10307] / [i915#6095]) +206 other tests skip [142]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-2/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-3.html * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs-cc@pipe-d-hdmi-a-1: - shard-dg2: NOTRUN -> [SKIP][143] ([i915#10307] / [i915#10434] / [i915#6095]) +4 other tests skip [143]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-4/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs-cc@pipe-d-hdmi-a-1.html * igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-1: - shard-tglu-1: NOTRUN -> [SKIP][144] ([i915#6095]) +44 other tests skip [144]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-1/igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-1.html * igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs: - shard-tglu: NOTRUN -> [SKIP][145] ([i915#12313]) +1 other test skip [145]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-5/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs.html * igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs-cc: - shard-tglu: NOTRUN -> [SKIP][146] ([i915#6095]) +74 other tests skip [146]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-3/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs-cc.html * igt@kms_chamelium_audio@hdmi-audio-edid: - shard-dg1: NOTRUN -> [SKIP][147] ([i915#7828]) +2 other tests skip [147]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-18/igt@kms_chamelium_audio@hdmi-audio-edid.html - shard-tglu: NOTRUN -> [SKIP][148] ([i915#7828]) +13 other tests skip [148]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-10/igt@kms_chamelium_audio@hdmi-audio-edid.html * igt@kms_chamelium_frames@dp-frame-dump: - shard-dg2: NOTRUN -> [SKIP][149] ([i915#7828]) +7 other tests skip [149]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-3/igt@kms_chamelium_frames@dp-frame-dump.html * igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats: - shard-rkl: NOTRUN -> [SKIP][150] ([i915#7828]) +6 other tests skip [150]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-4/igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats.html * igt@kms_chamelium_frames@hdmi-frame-dump: - shard-tglu-1: NOTRUN -> [SKIP][151] ([i915#7828]) +1 other test skip [151]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-1/igt@kms_chamelium_frames@hdmi-frame-dump.html * igt@kms_chamelium_hpd@hdmi-hpd-fast: - shard-mtlp: NOTRUN -> [SKIP][152] ([i915#7828]) [152]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-8/igt@kms_chamelium_hpd@hdmi-hpd-fast.html * igt@kms_content_protection@atomic@pipe-a-dp-4: - shard-dg2: NOTRUN -> [TIMEOUT][153] ([i915#7173]) +1 other test timeout [153]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-10/igt@kms_content_protection@atomic@pipe-a-dp-4.html * igt@kms_content_protection@dp-mst-type-1: - shard-tglu-1: NOTRUN -> [SKIP][154] ([i915#3116] / [i915#3299]) [154]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-1/igt@kms_content_protection@dp-mst-type-1.html * igt@kms_content_protection@lic-type-0: - shard-tglu-1: NOTRUN -> [SKIP][155] ([i915#6944] / [i915#9424]) [155]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-1/igt@kms_content_protection@lic-type-0.html * igt@kms_content_protection@lic-type-1: - shard-rkl: NOTRUN -> [SKIP][156] ([i915#9424]) [156]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-6/igt@kms_content_protection@lic-type-1.html - shard-tglu: NOTRUN -> [SKIP][157] ([i915#6944] / [i915#9424]) [157]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-2/igt@kms_content_protection@lic-type-1.html * igt@kms_content_protection@type1: - shard-tglu: NOTRUN -> [SKIP][158] ([i915#6944] / [i915#7116] / [i915#7118] / [i915#9424]) +2 other tests skip [158]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-9/igt@kms_content_protection@type1.html * igt@kms_cursor_crc@cursor-offscreen-32x10: - shard-tglu: NOTRUN -> [SKIP][159] ([i915#3555]) +2 other tests skip [159]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-7/igt@kms_cursor_crc@cursor-offscreen-32x10.html * igt@kms_cursor_crc@cursor-offscreen-64x21: - shard-mtlp: NOTRUN -> [SKIP][160] ([i915#8814]) +1 other test skip [160]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-5/igt@kms_cursor_crc@cursor-offscreen-64x21.html * igt@kms_cursor_crc@cursor-onscreen-512x170: - shard-tglu-1: NOTRUN -> [SKIP][161] ([i915#11453] / [i915#3359]) +1 other test skip [161]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-1/igt@kms_cursor_crc@cursor-onscreen-512x170.html * igt@kms_cursor_crc@cursor-onscreen-512x512: - shard-tglu: NOTRUN -> [SKIP][162] ([i915#11453] / [i915#3359]) +1 other test skip [162]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-3/igt@kms_cursor_crc@cursor-onscreen-512x512.html * igt@kms_cursor_crc@cursor-random-512x170: - shard-mtlp: NOTRUN -> [SKIP][163] ([i915#11453] / [i915#3359]) [163]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-2/igt@kms_cursor_crc@cursor-random-512x170.html * igt@kms_cursor_crc@cursor-random-512x512: - shard-dg2: NOTRUN -> [SKIP][164] ([i915#11453] / [i915#3359]) +3 other tests skip [164]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-5/igt@kms_cursor_crc@cursor-random-512x512.html * igt@kms_cursor_crc@cursor-rapid-movement-max-size: - shard-dg1: NOTRUN -> [SKIP][165] ([i915#3555]) +1 other test skip [165]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-13/igt@kms_cursor_crc@cursor-rapid-movement-max-size.html * igt@kms_cursor_crc@cursor-sliding-32x10: - shard-dg2: NOTRUN -> [SKIP][166] ([i915#3555]) +2 other tests skip [166]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-4/igt@kms_cursor_crc@cursor-sliding-32x10.html - shard-tglu-1: NOTRUN -> [SKIP][167] ([i915#3555]) +4 other tests skip [167]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-1/igt@kms_cursor_crc@cursor-sliding-32x10.html * igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy: - shard-rkl: NOTRUN -> [SKIP][168] +16 other tests skip [168]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-7/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size: - shard-dg1: NOTRUN -> [SKIP][169] +13 other tests skip [169]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-18/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size: - shard-snb: [PASS][170] -> [FAIL][171] ([i915#2346]) [170]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-snb4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html [171]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-snb1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions: - shard-tglu: NOTRUN -> [SKIP][172] ([i915#4103]) [172]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-2/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html * igt@kms_dirtyfb@psr-dirtyfb-ioctl: - shard-dg2: NOTRUN -> [SKIP][173] ([i915#9833]) [173]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-2/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html * igt@kms_display_modes@extended-mode-basic: - shard-mtlp: NOTRUN -> [SKIP][174] ([i915#3555] / [i915#8827]) [174]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-1/igt@kms_display_modes@extended-mode-basic.html * igt@kms_display_modes@mst-extended-mode-negative: - shard-dg2: NOTRUN -> [SKIP][175] ([i915#8588]) [175]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-2/igt@kms_display_modes@mst-extended-mode-negative.html - shard-dg1: NOTRUN -> [SKIP][176] ([i915#8588]) [176]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-14/igt@kms_display_modes@mst-extended-mode-negative.html - shard-tglu: NOTRUN -> [SKIP][177] ([i915#8588]) [177]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-3/igt@kms_display_modes@mst-extended-mode-negative.html * igt@kms_dp_aux_dev: - shard-tglu-1: NOTRUN -> [SKIP][178] ([i915#1257]) [178]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-1/igt@kms_dp_aux_dev.html * igt@kms_dp_linktrain_fallback@dp-fallback: - shard-dg2: [PASS][179] -> [SKIP][180] ([i915#12402]) [179]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-dg2-10/igt@kms_dp_linktrain_fallback@dp-fallback.html [180]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-1/igt@kms_dp_linktrain_fallback@dp-fallback.html * igt@kms_dsc@dsc-fractional-bpp: - shard-tglu: NOTRUN -> [SKIP][181] ([i915#3840]) +1 other test skip [181]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-6/igt@kms_dsc@dsc-fractional-bpp.html * igt@kms_dsc@dsc-fractional-bpp-with-bpc: - shard-mtlp: NOTRUN -> [SKIP][182] ([i915#3840]) [182]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-8/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html * igt@kms_dsc@dsc-with-bpc: - shard-dg2: NOTRUN -> [SKIP][183] ([i915#3555] / [i915#3840]) [183]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-8/igt@kms_dsc@dsc-with-bpc.html * igt@kms_dsc@dsc-with-formats: - shard-tglu: NOTRUN -> [SKIP][184] ([i915#3555] / [i915#3840]) +2 other tests skip [184]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-9/igt@kms_dsc@dsc-with-formats.html - shard-rkl: NOTRUN -> [SKIP][185] ([i915#3555] / [i915#3840]) [185]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-5/igt@kms_dsc@dsc-with-formats.html * igt@kms_fbcon_fbt@psr: - shard-dg2: NOTRUN -> [SKIP][186] ([i915#3469]) +1 other test skip [186]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-6/igt@kms_fbcon_fbt@psr.html * igt@kms_fbcon_fbt@psr-suspend: - shard-tglu: NOTRUN -> [SKIP][187] ([i915#3469]) [187]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-8/igt@kms_fbcon_fbt@psr-suspend.html * igt@kms_feature_discovery@chamelium: - shard-dg2: NOTRUN -> [SKIP][188] ([i915#4854]) [188]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-11/igt@kms_feature_discovery@chamelium.html * igt@kms_feature_discovery@display-3x: - shard-tglu: NOTRUN -> [SKIP][189] ([i915#1839]) [189]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-6/igt@kms_feature_discovery@display-3x.html * igt@kms_flip@2x-blocking-absolute-wf_vblank: - shard-tglu: NOTRUN -> [SKIP][190] ([i915#3637]) +9 other tests skip [190]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-3/igt@kms_flip@2x-blocking-absolute-wf_vblank.html * igt@kms_flip@2x-flip-vs-fences-interruptible: - shard-dg2: NOTRUN -> [SKIP][191] ([i915#8381]) [191]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-3/igt@kms_flip@2x-flip-vs-fences-interruptible.html * igt@kms_flip@2x-flip-vs-panning: - shard-tglu-1: NOTRUN -> [SKIP][192] ([i915#3637]) [192]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-1/igt@kms_flip@2x-flip-vs-panning.html * igt@kms_flip@2x-modeset-vs-vblank-race: - shard-rkl: NOTRUN -> [SKIP][193] ([i915#9934]) [193]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-6/igt@kms_flip@2x-modeset-vs-vblank-race.html * igt@kms_flip@2x-nonexisting-fb: - shard-mtlp: NOTRUN -> [SKIP][194] ([i915#3637]) +1 other test skip [194]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-5/igt@kms_flip@2x-nonexisting-fb.html - shard-dg1: NOTRUN -> [SKIP][195] ([i915#9934]) [195]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-17/igt@kms_flip@2x-nonexisting-fb.html * igt@kms_flip@2x-plain-flip-fb-recreate-interruptible: - shard-snb: [PASS][196] -> [FAIL][197] ([i915#2122]) +3 other tests fail [196]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-snb4/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html [197]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-snb6/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html * igt@kms_flip@dpms-vs-vblank-race-interruptible: - shard-rkl: [PASS][198] -> [FAIL][199] ([i915#10826]) +1 other test fail [198]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-rkl-1/igt@kms_flip@dpms-vs-vblank-race-interruptible.html [199]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-5/igt@kms_flip@dpms-vs-vblank-race-interruptible.html * igt@kms_flip@plain-flip-fb-recreate-interruptible: - shard-tglu: [PASS][200] -> [FAIL][201] ([i915#2122]) +3 other tests fail [200]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-tglu-5/igt@kms_flip@plain-flip-fb-recreate-interruptible.html [201]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-7/igt@kms_flip@plain-flip-fb-recreate-interruptible.html - shard-rkl: [PASS][202] -> [FAIL][203] ([i915#2122]) [202]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-rkl-6/igt@kms_flip@plain-flip-fb-recreate-interruptible.html [203]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-4/igt@kms_flip@plain-flip-fb-recreate-interruptible.html * igt@kms_flip@plain-flip-fb-recreate-interruptible@a-hdmi-a1: - shard-rkl: NOTRUN -> [FAIL][204] ([i915#2122]) [204]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-4/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-hdmi-a1.html * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-upscaling: - shard-tglu-1: NOTRUN -> [SKIP][205] ([i915#2672] / [i915#3555]) +2 other tests skip [205]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-1/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-upscaling.html * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling@pipe-a-valid-mode: - shard-tglu-1: NOTRUN -> [SKIP][206] ([i915#2587] / [i915#2672]) +2 other tests skip [206]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-1/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling@pipe-a-valid-mode.html * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling: - shard-dg2: NOTRUN -> [SKIP][207] ([i915#2672] / [i915#3555]) [207]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-7/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling.html * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling: - shard-tglu: NOTRUN -> [SKIP][208] ([i915#2587] / [i915#2672] / [i915#3555]) +1 other test skip [208]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-10/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling.html * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling@pipe-a-valid-mode: - shard-tglu: NOTRUN -> [SKIP][209] ([i915#2587] / [i915#2672]) +5 other tests skip [209]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-10/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling@pipe-a-valid-mode.html * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling: - shard-dg1: NOTRUN -> [SKIP][210] ([i915#2587] / [i915#2672] / [i915#3555]) [210]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-16/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling@pipe-a-valid-mode: - shard-dg1: NOTRUN -> [SKIP][211] ([i915#2587] / [i915#2672]) [211]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-16/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling@pipe-a-valid-mode.html * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling: - shard-tglu: NOTRUN -> [SKIP][212] ([i915#2672] / [i915#3555]) +3 other tests skip [212]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-7/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling.html * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling: - shard-rkl: NOTRUN -> [SKIP][213] ([i915#2672] / [i915#3555]) +3 other tests skip [213]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-2/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode: - shard-rkl: NOTRUN -> [SKIP][214] ([i915#2672]) +3 other tests skip [214]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-2/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode.html * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling: - shard-dg2: NOTRUN -> [SKIP][215] ([i915#2672] / [i915#3555] / [i915#5190]) +2 other tests skip [215]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-7/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling.html * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling@pipe-a-valid-mode: - shard-dg2: NOTRUN -> [SKIP][216] ([i915#2672]) +3 other tests skip [216]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-7/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling@pipe-a-valid-mode.html * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling: - shard-mtlp: NOTRUN -> [SKIP][217] ([i915#2672] / [i915#3555] / [i915#8813]) +1 other test skip [217]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-5/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling.html * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-blt: - shard-dg1: [PASS][218] -> [DMESG-WARN][219] ([i915#4423]) +9 other tests dmesg-warn [218]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-dg1-15/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-blt.html [219]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-18/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt: - shard-dg2: NOTRUN -> [FAIL][220] ([i915#6880]) [220]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-11/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt: - shard-dg2: NOTRUN -> [SKIP][221] ([i915#5354]) +45 other tests skip [221]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-pgflip-blt: - shard-tglu-1: NOTRUN -> [SKIP][222] +49 other tests skip [222]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-pgflip-blt.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-blt: - shard-mtlp: NOTRUN -> [SKIP][223] ([i915#1825]) +9 other tests skip [223]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen: - shard-snb: [PASS][224] -> [SKIP][225] +4 other tests skip [224]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-snb1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen.html [225]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-snb1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-mmap-gtt: - shard-rkl: NOTRUN -> [SKIP][226] ([i915#1825]) +24 other tests skip [226]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-mmap-gtt.html * igt@kms_frontbuffer_tracking@fbc-tiling-y: - shard-dg2: NOTRUN -> [SKIP][227] ([i915#10055]) [227]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-4/igt@kms_frontbuffer_tracking@fbc-tiling-y.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite: - shard-dg1: NOTRUN -> [SKIP][228] ([i915#3458]) +4 other tests skip [228]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-19/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-gtt: - shard-dg2: NOTRUN -> [SKIP][229] ([i915#8708]) +17 other tests skip [229]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-gtt.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-pwrite: - shard-dg1: NOTRUN -> [SKIP][230] ([i915#4423]) [230]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-18/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-pwrite.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-fullscreen: - shard-tglu: NOTRUN -> [SKIP][231] +93 other tests skip [231]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-fullscreen.html * igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-gtt: - shard-rkl: NOTRUN -> [SKIP][232] ([i915#3023]) +13 other tests skip [232]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-7/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-gtt.html - shard-snb: NOTRUN -> [SKIP][233] +23 other tests skip [233]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-snb1/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-gtt.html - shard-mtlp: NOTRUN -> [SKIP][234] ([i915#8708]) +2 other tests skip [234]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-4/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-gtt.html * igt@kms_frontbuffer_tracking@pipe-fbc-rte: - shard-tglu: NOTRUN -> [SKIP][235] ([i915#9766]) [235]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-2/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html - shard-dg2: NOTRUN -> [SKIP][236] ([i915#9766]) [236]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-8/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc: - shard-dg1: NOTRUN -> [SKIP][237] ([i915#8708]) +8 other tests skip [237]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-14/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@psr-1p-rte: - shard-dg2: NOTRUN -> [SKIP][238] ([i915#3458]) +18 other tests skip [238]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-5/igt@kms_frontbuffer_tracking@psr-1p-rte.html * igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary: - shard-dg2: NOTRUN -> [SKIP][239] ([i915#10433] / [i915#3458]) +1 other test skip [239]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-4/igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary.html * igt@kms_hdmi_inject@inject-audio: - shard-tglu: [PASS][240] -> [SKIP][241] ([i915#433]) [240]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-tglu-2/igt@kms_hdmi_inject@inject-audio.html [241]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-2/igt@kms_hdmi_inject@inject-audio.html * igt@kms_hdr@invalid-metadata-sizes: - shard-rkl: NOTRUN -> [SKIP][242] ([i915#3555] / [i915#8228]) +1 other test skip [242]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-3/igt@kms_hdr@invalid-metadata-sizes.html * igt@kms_hdr@static-toggle-suspend: - shard-dg2: NOTRUN -> [SKIP][243] ([i915#3555] / [i915#8228]) +2 other tests skip [243]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-8/igt@kms_hdr@static-toggle-suspend.html - shard-tglu-1: NOTRUN -> [SKIP][244] ([i915#3555] / [i915#8228]) +1 other test skip [244]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-1/igt@kms_hdr@static-toggle-suspend.html * igt@kms_joiner@basic-force-big-joiner: - shard-tglu: NOTRUN -> [SKIP][245] ([i915#12388]) +1 other test skip [245]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-6/igt@kms_joiner@basic-force-big-joiner.html - shard-dg2: NOTRUN -> [SKIP][246] ([i915#12388]) [246]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-4/igt@kms_joiner@basic-force-big-joiner.html * igt@kms_joiner@basic-ultra-joiner: - shard-dg2: NOTRUN -> [SKIP][247] ([i915#12339]) +1 other test skip [247]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-1/igt@kms_joiner@basic-ultra-joiner.html - shard-dg1: NOTRUN -> [SKIP][248] ([i915#12339]) [248]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-17/igt@kms_joiner@basic-ultra-joiner.html - shard-tglu: NOTRUN -> [SKIP][249] ([i915#12339]) [249]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-10/igt@kms_joiner@basic-ultra-joiner.html - shard-mtlp: NOTRUN -> [SKIP][250] ([i915#12339]) [250]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-4/igt@kms_joiner@basic-ultra-joiner.html * igt@kms_joiner@invalid-modeset-force-big-joiner: - shard-rkl: NOTRUN -> [SKIP][251] ([i915#12388]) [251]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-3/igt@kms_joiner@invalid-modeset-force-big-joiner.html - shard-dg1: NOTRUN -> [SKIP][252] ([i915#12388]) [252]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-18/igt@kms_joiner@invalid-modeset-force-big-joiner.html * igt@kms_plane_multiple@tiling-y: - shard-dg2: NOTRUN -> [SKIP][253] ([i915#8806]) [253]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-6/igt@kms_plane_multiple@tiling-y.html * igt@kms_plane_multiple@tiling-yf: - shard-dg2: NOTRUN -> [SKIP][254] ([i915#3555] / [i915#8806]) [254]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-1/igt@kms_plane_multiple@tiling-yf.html * igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format: - shard-tglu-1: NOTRUN -> [SKIP][255] ([i915#12247]) +9 other tests skip [255]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-1/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format.html - shard-dg1: NOTRUN -> [SKIP][256] ([i915#12247] / [i915#12504]) +3 other tests skip [256]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-19/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format.html * igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-b: - shard-rkl: NOTRUN -> [SKIP][257] ([i915#12247]) +2 other tests skip [257]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-7/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-b.html * igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-c: - shard-tglu: NOTRUN -> [SKIP][258] ([i915#12247]) +9 other tests skip [258]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-6/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-c.html * igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-d: - shard-dg1: NOTRUN -> [SKIP][259] ([i915#12247]) +5 other tests skip [259]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-15/igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-d.html * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20: - shard-dg2: NOTRUN -> [SKIP][260] ([i915#12247] / [i915#9423]) [260]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-5/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20.html * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25: - shard-mtlp: NOTRUN -> [SKIP][261] ([i915#12247] / [i915#6953]) [261]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-6/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25.html * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-b: - shard-mtlp: NOTRUN -> [SKIP][262] ([i915#12247]) +3 other tests skip [262]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-6/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-b.html * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25: - shard-dg2: NOTRUN -> [SKIP][263] ([i915#12247] / [i915#3555] / [i915#9423]) [263]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-3/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25.html * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-c: - shard-dg2: NOTRUN -> [SKIP][264] ([i915#12247]) +7 other tests skip [264]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-3/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-c.html * igt@kms_pm_backlight@bad-brightness: - shard-tglu-1: NOTRUN -> [SKIP][265] ([i915#9812]) [265]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-1/igt@kms_pm_backlight@bad-brightness.html * igt@kms_pm_backlight@basic-brightness: - shard-dg1: NOTRUN -> [SKIP][266] ([i915#5354]) [266]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-12/igt@kms_pm_backlight@basic-brightness.html * igt@kms_pm_backlight@fade-with-dpms: - shard-rkl: NOTRUN -> [SKIP][267] ([i915#5354]) +2 other tests skip [267]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-7/igt@kms_pm_backlight@fade-with-dpms.html - shard-tglu: NOTRUN -> [SKIP][268] ([i915#9812]) [268]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-7/igt@kms_pm_backlight@fade-with-dpms.html * igt@kms_pm_dc@dc5-psr: - shard-dg2: NOTRUN -> [SKIP][269] ([i915#9685]) [269]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-2/igt@kms_pm_dc@dc5-psr.html * igt@kms_pm_dc@dc6-psr: - shard-tglu-1: NOTRUN -> [SKIP][270] ([i915#9685]) [270]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-1/igt@kms_pm_dc@dc6-psr.html * igt@kms_pm_lpsp@screens-disabled: - shard-dg2: NOTRUN -> [SKIP][271] ([i915#8430]) [271]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-5/igt@kms_pm_lpsp@screens-disabled.html - shard-tglu: NOTRUN -> [SKIP][272] ([i915#8430]) [272]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-9/igt@kms_pm_lpsp@screens-disabled.html * igt@kms_pm_rpm@dpms-mode-unset-lpsp: - shard-rkl: [PASS][273] -> [SKIP][274] ([i915#9519]) [273]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-rkl-7/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html [274]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-3/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html * igt@kms_pm_rpm@i2c: - shard-dg2: [PASS][275] -> [FAIL][276] ([i915#8717]) [275]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-dg2-7/igt@kms_pm_rpm@i2c.html [276]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-2/igt@kms_pm_rpm@i2c.html * igt@kms_pm_rpm@modeset-lpsp-stress: - shard-dg2: NOTRUN -> [SKIP][277] ([i915#9519]) +1 other test skip [277]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-2/igt@kms_pm_rpm@modeset-lpsp-stress.html * igt@kms_pm_rpm@modeset-lpsp-stress-no-wait: - shard-dg1: NOTRUN -> [SKIP][278] ([i915#9519]) [278]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-15/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html * igt@kms_pm_rpm@modeset-non-lpsp: - shard-tglu: NOTRUN -> [SKIP][279] ([i915#9519]) [279]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-2/igt@kms_pm_rpm@modeset-non-lpsp.html * igt@kms_pm_rpm@modeset-non-lpsp-stress: - shard-dg2: [PASS][280] -> [SKIP][281] ([i915#9519]) [280]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-dg2-3/igt@kms_pm_rpm@modeset-non-lpsp-stress.html [281]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-4/igt@kms_pm_rpm@modeset-non-lpsp-stress.html - shard-tglu-1: NOTRUN -> [SKIP][282] ([i915#9519]) [282]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-1/igt@kms_pm_rpm@modeset-non-lpsp-stress.html * igt@kms_prime@basic-crc-hybrid: - shard-dg2: NOTRUN -> [SKIP][283] ([i915#6524] / [i915#6805]) +1 other test skip [283]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-5/igt@kms_prime@basic-crc-hybrid.html * igt@kms_prime@basic-modeset-hybrid: - shard-tglu: NOTRUN -> [SKIP][284] ([i915#6524]) [284]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-2/igt@kms_prime@basic-modeset-hybrid.html * igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-sf: - shard-dg1: NOTRUN -> [SKIP][285] ([i915#11520]) +1 other test skip [285]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-12/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-sf.html * igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf: - shard-mtlp: NOTRUN -> [SKIP][286] ([i915#12316]) [286]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-2/igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf.html * igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf: - shard-tglu: NOTRUN -> [SKIP][287] ([i915#11520]) +8 other tests skip [287]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-7/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf.html * igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-sf: - shard-rkl: NOTRUN -> [SKIP][288] ([i915#11520]) +2 other tests skip [288]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-7/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-sf.html - shard-tglu-1: NOTRUN -> [SKIP][289] ([i915#11520]) +5 other tests skip [289]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-1/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-sf.html * igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area: - shard-dg2: NOTRUN -> [SKIP][290] ([i915#11520]) +6 other tests skip [290]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-5/igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area.html * igt@kms_psr2_su@frontbuffer-xrgb8888: - shard-tglu-1: NOTRUN -> [SKIP][291] ([i915#9683]) [291]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-1/igt@kms_psr2_su@frontbuffer-xrgb8888.html * igt@kms_psr2_su@page_flip-p010: - shard-dg2: NOTRUN -> [SKIP][292] ([i915#9683]) [292]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-8/igt@kms_psr2_su@page_flip-p010.html - shard-tglu: NOTRUN -> [SKIP][293] ([i915#9683]) [293]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-2/igt@kms_psr2_su@page_flip-p010.html * igt@kms_psr@fbc-psr2-cursor-plane-onoff: - shard-mtlp: NOTRUN -> [SKIP][294] ([i915#9688]) +6 other tests skip [294]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-1/igt@kms_psr@fbc-psr2-cursor-plane-onoff.html * igt@kms_psr@pr-sprite-plane-onoff: - shard-tglu-1: NOTRUN -> [SKIP][295] ([i915#9732]) +14 other tests skip [295]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-1/igt@kms_psr@pr-sprite-plane-onoff.html * igt@kms_psr@psr-cursor-plane-move: - shard-rkl: NOTRUN -> [SKIP][296] ([i915#1072] / [i915#9732]) +14 other tests skip [296]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-3/igt@kms_psr@psr-cursor-plane-move.html * igt@kms_psr@psr-cursor-render: - shard-dg2: NOTRUN -> [SKIP][297] ([i915#1072] / [i915#9732]) +28 other tests skip [297]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-10/igt@kms_psr@psr-cursor-render.html * igt@kms_psr@psr-sprite-plane-move: - shard-dg1: NOTRUN -> [SKIP][298] ([i915#1072] / [i915#9732]) +12 other tests skip [298]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-18/igt@kms_psr@psr-sprite-plane-move.html * igt@kms_psr@psr2-cursor-plane-onoff: - shard-tglu: NOTRUN -> [SKIP][299] ([i915#9732]) +31 other tests skip [299]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-10/igt@kms_psr@psr2-cursor-plane-onoff.html * igt@kms_rmfb@close-fd: - shard-dg1: NOTRUN -> [DMESG-WARN][300] ([i915#4423]) [300]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-18/igt@kms_rmfb@close-fd.html * igt@kms_rotation_crc@bad-tiling: - shard-dg2: NOTRUN -> [SKIP][301] ([i915#12755]) [301]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-11/igt@kms_rotation_crc@bad-tiling.html * igt@kms_rotation_crc@primary-4-tiled-reflect-x-0: - shard-dg1: NOTRUN -> [SKIP][302] ([i915#5289]) [302]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-14/igt@kms_rotation_crc@primary-4-tiled-reflect-x-0.html * igt@kms_rotation_crc@primary-y-tiled-reflect-x-90: - shard-mtlp: NOTRUN -> [SKIP][303] ([i915#12755]) [303]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-5/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180: - shard-dg2: NOTRUN -> [SKIP][304] ([i915#5190]) [304]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-5/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270: - shard-tglu-1: NOTRUN -> [SKIP][305] ([i915#5289]) +1 other test skip [305]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-1/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90: - shard-tglu: NOTRUN -> [SKIP][306] ([i915#5289]) [306]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-8/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html * igt@kms_selftest@drm_framebuffer: - shard-dg1: NOTRUN -> [ABORT][307] ([i915#12231]) +1 other test abort [307]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-18/igt@kms_selftest@drm_framebuffer.html - shard-snb: NOTRUN -> [ABORT][308] ([i915#12231]) +1 other test abort [308]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-snb7/igt@kms_selftest@drm_framebuffer.html - shard-mtlp: NOTRUN -> [ABORT][309] ([i915#12231]) +1 other test abort [309]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-1/igt@kms_selftest@drm_framebuffer.html * igt@kms_setmode@clone-exclusive-crtc: - shard-rkl: NOTRUN -> [SKIP][310] ([i915#3555]) +2 other tests skip [310]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-7/igt@kms_setmode@clone-exclusive-crtc.html * igt@kms_sysfs_edid_timing: - shard-dg2: [PASS][311] -> [FAIL][312] ([IGT#2]) [311]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-dg2-3/igt@kms_sysfs_edid_timing.html [312]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-6/igt@kms_sysfs_edid_timing.html - shard-dg1: [PASS][313] -> [FAIL][314] ([IGT#2] / [i915#6493]) [313]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-dg1-14/igt@kms_sysfs_edid_timing.html [314]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-18/igt@kms_sysfs_edid_timing.html * igt@kms_tiled_display@basic-test-pattern: - shard-dg2: NOTRUN -> [SKIP][315] ([i915#8623]) +1 other test skip [315]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-5/igt@kms_tiled_display@basic-test-pattern.html * igt@kms_tiled_display@basic-test-pattern-with-chamelium: - shard-tglu: NOTRUN -> [SKIP][316] ([i915#8623]) [316]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-10/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html * igt@kms_vrr@lobf: - shard-dg2: NOTRUN -> [SKIP][317] ([i915#11920]) [317]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-6/igt@kms_vrr@lobf.html * igt@kms_vrr@max-min: - shard-tglu: NOTRUN -> [SKIP][318] ([i915#9906]) [318]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-10/igt@kms_vrr@max-min.html * igt@kms_vrr@negative-basic: - shard-tglu: NOTRUN -> [SKIP][319] ([i915#3555] / [i915#9906]) [319]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-8/igt@kms_vrr@negative-basic.html * igt@kms_vrr@seamless-rr-switch-vrr: - shard-dg2: NOTRUN -> [SKIP][320] ([i915#9906]) [320]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-3/igt@kms_vrr@seamless-rr-switch-vrr.html - shard-rkl: NOTRUN -> [SKIP][321] ([i915#9906]) [321]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-5/igt@kms_vrr@seamless-rr-switch-vrr.html * igt@kms_writeback@writeback-check-output: - shard-dg1: NOTRUN -> [SKIP][322] ([i915#2437]) [322]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-13/igt@kms_writeback@writeback-check-output.html - shard-mtlp: NOTRUN -> [SKIP][323] ([i915#2437]) [323]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-4/igt@kms_writeback@writeback-check-output.html * igt@kms_writeback@writeback-fb-id: - shard-dg2: NOTRUN -> [SKIP][324] ([i915#2437]) +1 other test skip [324]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-8/igt@kms_writeback@writeback-fb-id.html * igt@kms_writeback@writeback-fb-id-xrgb2101010: - shard-tglu: NOTRUN -> [SKIP][325] ([i915#2437] / [i915#9412]) [325]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-9/igt@kms_writeback@writeback-fb-id-xrgb2101010.html * igt@perf@per-context-mode-unprivileged: - shard-dg1: NOTRUN -> [SKIP][326] ([i915#2433]) [326]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-19/igt@perf@per-context-mode-unprivileged.html * igt@perf_pmu@busy-accuracy-50@bcs0: - shard-rkl: [PASS][327] -> [FAIL][328] ([i915#4349]) +2 other tests fail [327]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-rkl-3/igt@perf_pmu@busy-accuracy-50@bcs0.html [328]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-7/igt@perf_pmu@busy-accuracy-50@bcs0.html * igt@perf_pmu@rc6@other-idle-gt0: - shard-dg2: NOTRUN -> [SKIP][329] ([i915#8516]) [329]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-2/igt@perf_pmu@rc6@other-idle-gt0.html - shard-dg1: NOTRUN -> [SKIP][330] ([i915#8516]) [330]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-16/igt@perf_pmu@rc6@other-idle-gt0.html - shard-tglu: NOTRUN -> [SKIP][331] ([i915#8516]) [331]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-9/igt@perf_pmu@rc6@other-idle-gt0.html * igt@prime_vgem@basic-fence-flip: - shard-dg1: NOTRUN -> [SKIP][332] ([i915#3708]) [332]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-15/igt@prime_vgem@basic-fence-flip.html - shard-dg2: NOTRUN -> [SKIP][333] ([i915#3708]) [333]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-7/igt@prime_vgem@basic-fence-flip.html * igt@prime_vgem@basic-fence-mmap: - shard-dg2: NOTRUN -> [SKIP][334] ([i915#3708] / [i915#4077]) [334]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-6/igt@prime_vgem@basic-fence-mmap.html * igt@sriov_basic@enable-vfs-bind-unbind-each: - shard-tglu: NOTRUN -> [SKIP][335] ([i915#9917]) [335]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-2/igt@sriov_basic@enable-vfs-bind-unbind-each.html * igt@syncobj_wait@invalid-wait-zero-handles: - shard-mtlp: NOTRUN -> [FAIL][336] ([i915#12564] / [i915#9781]) [336]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-1/igt@syncobj_wait@invalid-wait-zero-handles.html - shard-dg2: NOTRUN -> [FAIL][337] ([i915#12564] / [i915#9781]) [337]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-4/igt@syncobj_wait@invalid-wait-zero-handles.html - shard-rkl: NOTRUN -> [FAIL][338] ([i915#12564] / [i915#9781]) [338]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-7/igt@syncobj_wait@invalid-wait-zero-handles.html - shard-tglu-1: NOTRUN -> [FAIL][339] ([i915#12564] / [i915#9781]) [339]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-1/igt@syncobj_wait@invalid-wait-zero-handles.html #### Possible fixes #### * igt@gem_ctx_persistence@hostile: - shard-tglu: [FAIL][340] ([i915#11980] / [i915#12580]) -> [PASS][341] [340]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-tglu-8/igt@gem_ctx_persistence@hostile.html [341]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-7/igt@gem_ctx_persistence@hostile.html * igt@gem_eio@kms: - shard-dg2: [FAIL][342] ([i915#5784]) -> [PASS][343] [342]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-dg2-4/igt@gem_eio@kms.html [343]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-8/igt@gem_eio@kms.html * igt@gem_eio@unwedge-stress: - shard-dg1: [FAIL][344] ([i915#12714] / [i915#5784]) -> [PASS][345] [344]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-dg1-13/igt@gem_eio@unwedge-stress.html [345]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-16/igt@gem_eio@unwedge-stress.html * igt@gem_exec_suspend@basic-s4-devices: - shard-tglu: [ABORT][346] ([i915#7975] / [i915#8213]) -> [PASS][347] +1 other test pass [346]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-tglu-10/igt@gem_exec_suspend@basic-s4-devices.html [347]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-2/igt@gem_exec_suspend@basic-s4-devices.html * igt@i915_module_load@reload-with-fault-injection: - shard-dg2: [ABORT][348] ([i915#9820]) -> [PASS][349] [348]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-dg2-2/igt@i915_module_load@reload-with-fault-injection.html [349]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-8/igt@i915_module_load@reload-with-fault-injection.html * igt@kms_cursor_crc@cursor-suspend: - shard-tglu: [ABORT][350] ([i915#10159]) -> [PASS][351] +1 other test pass [350]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-tglu-3/igt@kms_cursor_crc@cursor-suspend.html [351]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-10/igt@kms_cursor_crc@cursor-suspend.html * igt@kms_flip@2x-plain-flip-fb-recreate@ab-vga1-hdmi-a1: - shard-snb: [FAIL][352] ([i915#2122]) -> [PASS][353] +7 other tests pass [352]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-snb1/igt@kms_flip@2x-plain-flip-fb-recreate@ab-vga1-hdmi-a1.html [353]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-snb1/igt@kms_flip@2x-plain-flip-fb-recreate@ab-vga1-hdmi-a1.html * igt@kms_flip@wf_vblank-ts-check-interruptible: - shard-dg2: [FAIL][354] ([i915#2122]) -> [PASS][355] +1 other test pass [354]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-dg2-5/igt@kms_flip@wf_vblank-ts-check-interruptible.html [355]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-6/igt@kms_flip@wf_vblank-ts-check-interruptible.html * igt@kms_flip@wf_vblank-ts-check-interruptible@a-edp1: - shard-mtlp: [FAIL][356] ([i915#2122]) -> [PASS][357] +1 other test pass [356]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-mtlp-4/igt@kms_flip@wf_vblank-ts-check-interruptible@a-edp1.html [357]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-4/igt@kms_flip@wf_vblank-ts-check-interruptible@a-edp1.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt: - shard-dg2: [FAIL][358] ([i915#6880]) -> [PASS][359] [358]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-dg2-7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt.html [359]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-gtt: - shard-snb: [SKIP][360] -> [PASS][361] [360]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-snb2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-gtt.html [361]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-snb6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-gtt.html * igt@kms_plane_cursor@overlay: - shard-mtlp: [DMESG-WARN][362] ([i915#1982]) -> [PASS][363] +1 other test pass [362]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-mtlp-6/igt@kms_plane_cursor@overlay.html [363]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-7/igt@kms_plane_cursor@overlay.html * igt@kms_pm_rpm@dpms-lpsp: - shard-dg2: [SKIP][364] ([i915#9519]) -> [PASS][365] [364]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-dg2-3/igt@kms_pm_rpm@dpms-lpsp.html [365]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-8/igt@kms_pm_rpm@dpms-lpsp.html - shard-rkl: [SKIP][366] ([i915#9519]) -> [PASS][367] +1 other test pass [366]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-rkl-1/igt@kms_pm_rpm@dpms-lpsp.html [367]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-4/igt@kms_pm_rpm@dpms-lpsp.html * igt@kms_sysfs_edid_timing: - shard-snb: [FAIL][368] ([IGT#2] / [i915#6493]) -> [PASS][369] [368]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-snb1/igt@kms_sysfs_edid_timing.html [369]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-snb4/igt@kms_sysfs_edid_timing.html * igt@perf_pmu@all-busy-idle-check-all: - shard-dg1: [FAIL][370] ([i915#11943]) -> [PASS][371] +2 other tests pass [370]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-dg1-18/igt@perf_pmu@all-busy-idle-check-all.html [371]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-12/igt@perf_pmu@all-busy-idle-check-all.html * igt@perf_pmu@busy-hang: - shard-dg1: [INCOMPLETE][372] -> [PASS][373] +1 other test pass [372]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-dg1-18/igt@perf_pmu@busy-hang.html [373]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-15/igt@perf_pmu@busy-hang.html * igt@perf_pmu@busy-idle: - shard-mtlp: [FAIL][374] ([i915#12792] / [i915#4349]) -> [PASS][375] +2 other tests pass [374]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-mtlp-4/igt@perf_pmu@busy-idle.html [375]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-4/igt@perf_pmu@busy-idle.html * igt@perf_pmu@busy-idle@vcs0: - shard-dg2: [FAIL][376] ([i915#12792] / [i915#4349]) -> [PASS][377] +2 other tests pass [376]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-dg2-2/igt@perf_pmu@busy-idle@vcs0.html [377]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-1/igt@perf_pmu@busy-idle@vcs0.html - shard-dg1: [FAIL][378] ([i915#12792] / [i915#4349]) -> [PASS][379] +2 other tests pass [378]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-dg1-13/igt@perf_pmu@busy-idle@vcs0.html [379]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-17/igt@perf_pmu@busy-idle@vcs0.html * igt@perf_pmu@busy-idle@vcs1: - shard-dg1: [FAIL][380] ([i915#4349]) -> [PASS][381] [380]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-dg1-13/igt@perf_pmu@busy-idle@vcs1.html [381]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-17/igt@perf_pmu@busy-idle@vcs1.html - shard-mtlp: [FAIL][382] ([i915#4349]) -> [PASS][383] +1 other test pass [382]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-mtlp-4/igt@perf_pmu@busy-idle@vcs1.html [383]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-4/igt@perf_pmu@busy-idle@vcs1.html * igt@perf_pmu@busy-idle@vecs1: - shard-dg2: [FAIL][384] ([i915#4349]) -> [PASS][385] +2 other tests pass [384]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-dg2-2/igt@perf_pmu@busy-idle@vecs1.html [385]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-1/igt@perf_pmu@busy-idle@vecs1.html * igt@perf_pmu@most-busy-idle-check-all: - shard-dg2: [FAIL][386] ([i915#11943] / [i915#12515]) -> [PASS][387] +1 other test pass [386]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-dg2-10/igt@perf_pmu@most-busy-idle-check-all.html [387]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-2/igt@perf_pmu@most-busy-idle-check-all.html - shard-mtlp: [FAIL][388] ([i915#11943] / [i915#12515]) -> [PASS][389] +1 other test pass [388]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-mtlp-5/igt@perf_pmu@most-busy-idle-check-all.html [389]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-1/igt@perf_pmu@most-busy-idle-check-all.html * igt@perf_pmu@rc6: - shard-mtlp: [INCOMPLETE][390] -> [PASS][391] +3 other tests pass [390]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-mtlp-4/igt@perf_pmu@rc6.html [391]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-mtlp-8/igt@perf_pmu@rc6.html #### Warnings #### * igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc: - shard-dg1: [SKIP][392] ([i915#6095]) -> [SKIP][393] ([i915#4423] / [i915#6095]) [392]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-dg1-12/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc.html [393]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-18/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc.html * igt@kms_content_protection@mei-interface: - shard-snb: [INCOMPLETE][394] ([i915#9878]) -> [SKIP][395] [394]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-snb1/igt@kms_content_protection@mei-interface.html [395]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-snb1/igt@kms_content_protection@mei-interface.html * igt@kms_content_protection@srm: - shard-dg2: [TIMEOUT][396] ([i915#7173]) -> [SKIP][397] ([i915#7118]) [396]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-dg2-10/igt@kms_content_protection@srm.html [397]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-2/igt@kms_content_protection@srm.html * igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size: - shard-dg1: [SKIP][398] -> [SKIP][399] ([i915#4423]) [398]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-dg1-13/igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size.html [399]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-19/igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-move: - shard-dg2: [SKIP][400] ([i915#10433] / [i915#3458]) -> [SKIP][401] ([i915#3458]) +1 other test skip [400]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-move.html [401]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-move.html * igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render: - shard-dg2: [SKIP][402] ([i915#3458]) -> [SKIP][403] ([i915#10433] / [i915#3458]) [402]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-dg2-8/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render.html [403]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render.html * igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-gtt: - shard-dg1: [SKIP][404] ([i915#8708]) -> [SKIP][405] ([i915#4423] / [i915#8708]) +1 other test skip [404]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-dg1-16/igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-gtt.html [405]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-18/igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-gtt.html * igt@kms_hdr@brightness-with-hdr: - shard-tglu: [SKIP][406] ([i915#12713]) -> [SKIP][407] ([i915#1187] / [i915#12713]) [406]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-tglu-4/igt@kms_hdr@brightness-with-hdr.html [407]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-tglu-2/igt@kms_hdr@brightness-with-hdr.html * igt@kms_pm_lpsp@kms-lpsp: - shard-rkl: [SKIP][408] ([i915#9340]) -> [SKIP][409] ([i915#3828]) [408]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-rkl-3/igt@kms_pm_lpsp@kms-lpsp.html [409]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-rkl-2/igt@kms_pm_lpsp@kms-lpsp.html * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf: - shard-dg1: [SKIP][410] ([i915#11520]) -> [SKIP][411] ([i915#11520] / [i915#4423]) [410]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-dg1-15/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf.html [411]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-18/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf.html * igt@kms_psr@fbc-psr-dpms: - shard-dg1: [SKIP][412] ([i915#1072] / [i915#9732]) -> [SKIP][413] ([i915#1072] / [i915#4423] / [i915#9732]) [412]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-dg1-13/igt@kms_psr@fbc-psr-dpms.html [413]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg1-18/igt@kms_psr@fbc-psr-dpms.html * igt@perf@non-zero-reason@0-rcs0: - shard-dg2: [FAIL][414] ([i915#7484]) -> [FAIL][415] ([i915#9100]) +1 other test fail [414]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15695/shard-dg2-8/igt@perf@non-zero-reason@0-rcs0.html [415]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/shard-dg2-11/igt@perf@non-zero-reason@0-rcs0.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [IGT#2]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/2 [i915#10030]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10030 [i915#10055]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10055 [i915#10159]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10159 [i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307 [i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433 [i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434 [i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072 [i915#10826]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10826 [i915#1099]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1099 [i915#11078]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11078 [i915#11453]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11453 [i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520 [i915#11681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11681 [i915#11703]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11703 [i915#11713]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11713 [i915#1187]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1187 [i915#11920]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11920 [i915#11943]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11943 [i915#11980]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11980 [i915#12031]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12031 [i915#12193]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12193 [i915#12231]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12231 [i915#12247]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12247 [i915#12296]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12296 [i915#12313]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12313 [i915#12316]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12316 [i915#12339]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12339 [i915#12358]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12358 [i915#12388]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12388 [i915#12402]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12402 [i915#12504]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12504 [i915#12515]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12515 [i915#12548]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12548 [i915#12564]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12564 [i915#1257]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1257 [i915#12577]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12577 [i915#12580]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12580 [i915#12713]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12713 [i915#12714]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12714 [i915#12755]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12755 [i915#12792]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12792 [i915#12805]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12805 [i915#1769]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1769 [i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825 [i915#1839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1839 [i915#1982]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1982 [i915#2122]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2122 [i915#2190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2190 [i915#2346]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2346 [i915#2433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2433 [i915#2437]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2437 [i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527 [i915#2587]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2587 [i915#2672]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2672 [i915#2681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2681 [i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280 [i915#284]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/284 [i915#2842]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2842 [i915#2846]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2846 [i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856 [i915#3023]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3023 [i915#3116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3116 [i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281 [i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282 [i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297 [i915#3299]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3299 [i915#3359]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3359 [i915#3458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3458 [i915#3469]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3469 [i915#3539]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3539 [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555 [i915#3591]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3591 [i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637 [i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638 [i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708 [i915#3828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3828 [i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840 [i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077 [i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079 [i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083 [i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103 [i915#4213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4213 [i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270 [i915#433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/433 [i915#4349]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4349 [i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423 [i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525 [i915#4537]: https://gitlab.freedes == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12103/index.html [-- Attachment #2: Type: text/html, Size: 121287 bytes --] ^ permalink raw reply [flat|nested] 14+ messages in thread
* ✗ CI.xeFULL: failure for lib/gpgpu_shader: simplify load/store shaders 2024-11-14 10:31 [PATCH 0/2] lib/gpgpu_shader: simplify load/store shaders Andrzej Hajda ` (5 preceding siblings ...) 2024-11-14 17:45 ` ✗ Fi.CI.IGT: failure " Patchwork @ 2024-11-14 23:31 ` Patchwork 6 siblings, 0 replies; 14+ messages in thread From: Patchwork @ 2024-11-14 23:31 UTC (permalink / raw) To: Hajda, Andrzej; +Cc: igt-dev [-- Attachment #1: Type: text/plain, Size: 45093 bytes --] == Series Details == Series: lib/gpgpu_shader: simplify load/store shaders URL : https://patchwork.freedesktop.org/series/141348/ State : failure == Summary == CI Bug Log - changes from XEIGT_8110_full -> XEIGTPW_12103_full ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with XEIGTPW_12103_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in XEIGTPW_12103_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (4 -> 4) ------------------------------ No changes in participating hosts Possible new issues ------------------- Here are the unknown changes that may have been introduced in XEIGTPW_12103_full: ### IGT changes ### #### Possible regressions #### * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-dp2-hdmi-a3: - shard-bmg: [PASS][1] -> [FAIL][2] +1 other test fail [1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-bmg-3/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-dp2-hdmi-a3.html [2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-3/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-dp2-hdmi-a3.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a6: - shard-dg2-set2: [PASS][3] -> [FAIL][4] [3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-dg2-434/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a6.html [4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-434/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a6.html * igt@kms_plane@plane-position-hole: - shard-bmg: [PASS][5] -> [INCOMPLETE][6] [5]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-bmg-5/igt@kms_plane@plane-position-hole.html [6]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-4/igt@kms_plane@plane-position-hole.html * igt@kms_psr@fbc-psr2-cursor-render@edp-1: - shard-lnl: [PASS][7] -> [FAIL][8] +3 other tests fail [7]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-lnl-6/igt@kms_psr@fbc-psr2-cursor-render@edp-1.html [8]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-3/igt@kms_psr@fbc-psr2-cursor-render@edp-1.html * igt@xe_exec_threads@threads-cm-shared-vm-userptr-invalidate: - shard-bmg: NOTRUN -> [DMESG-WARN][9] [9]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-3/igt@xe_exec_threads@threads-cm-shared-vm-userptr-invalidate.html * igt@xe_gt_freq@freq_reset: - shard-lnl: [PASS][10] -> [DMESG-WARN][11] [10]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-lnl-1/igt@xe_gt_freq@freq_reset.html [11]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-6/igt@xe_gt_freq@freq_reset.html #### Suppressed #### The following results come from untrusted machines, tests, or statuses. They do not affect the overall result. * {igt@xe_fault_injection@vm-create-fail-xe_vm_create_scratch}: - shard-lnl: [FAIL][12] -> [ABORT][13] [12]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-lnl-2/igt@xe_fault_injection@vm-create-fail-xe_vm_create_scratch.html [13]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-2/igt@xe_fault_injection@vm-create-fail-xe_vm_create_scratch.html Known issues ------------ Here are the changes found in XEIGTPW_12103_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-c-dp-4-4-rc-ccs: - shard-dg2-set2: NOTRUN -> [SKIP][14] ([Intel XE#2550]) +11 other tests skip [14]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-435/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-c-dp-4-4-rc-ccs.html * igt@kms_atomic_transition@plane-all-modeset-transition-fencing: - shard-lnl: NOTRUN -> [SKIP][15] ([Intel XE#3279]) [15]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-7/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html * igt@kms_big_fb@linear-64bpp-rotate-0: - shard-dg2-set2: [PASS][16] -> [DMESG-WARN][17] ([Intel XE#877]) [16]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-dg2-466/igt@kms_big_fb@linear-64bpp-rotate-0.html [17]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-463/igt@kms_big_fb@linear-64bpp-rotate-0.html * igt@kms_big_fb@x-tiled-64bpp-rotate-270: - shard-bmg: NOTRUN -> [SKIP][18] ([Intel XE#2327]) +2 other tests skip [18]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-4/igt@kms_big_fb@x-tiled-64bpp-rotate-270.html * igt@kms_big_fb@x-tiled-8bpp-rotate-270: - shard-dg2-set2: NOTRUN -> [SKIP][19] ([Intel XE#316]) +1 other test skip [19]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-434/igt@kms_big_fb@x-tiled-8bpp-rotate-270.html * igt@kms_big_fb@y-tiled-32bpp-rotate-90: - shard-bmg: NOTRUN -> [SKIP][20] ([Intel XE#1124]) [20]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-8/igt@kms_big_fb@y-tiled-32bpp-rotate-90.html - shard-dg2-set2: NOTRUN -> [SKIP][21] ([Intel XE#1124]) [21]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-433/igt@kms_big_fb@y-tiled-32bpp-rotate-90.html * igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p: - shard-lnl: NOTRUN -> [SKIP][22] ([Intel XE#2191]) [22]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-5/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html * igt@kms_bw@linear-tiling-1-displays-2560x1440p: - shard-dg2-set2: NOTRUN -> [SKIP][23] ([Intel XE#367]) +1 other test skip [23]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-433/igt@kms_bw@linear-tiling-1-displays-2560x1440p.html * igt@kms_bw@linear-tiling-2-displays-2160x1440p: - shard-bmg: NOTRUN -> [SKIP][24] ([Intel XE#367]) [24]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-8/igt@kms_bw@linear-tiling-2-displays-2160x1440p.html * igt@kms_ccs@bad-pixel-format-y-tiled-ccs@pipe-d-dp-5: - shard-dg2-set2: NOTRUN -> [SKIP][25] ([Intel XE#455] / [Intel XE#787]) +20 other tests skip [25]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-466/igt@kms_ccs@bad-pixel-format-y-tiled-ccs@pipe-d-dp-5.html * igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs@pipe-a-edp-1: - shard-lnl: NOTRUN -> [SKIP][26] ([Intel XE#2669]) +3 other tests skip [26]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-4/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs@pipe-a-edp-1.html * igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs: - shard-bmg: NOTRUN -> [SKIP][27] ([Intel XE#2887]) +2 other tests skip [27]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-2/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs.html * igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs@pipe-a-dp-4: - shard-dg2-set2: NOTRUN -> [SKIP][28] ([Intel XE#787]) +66 other tests skip [28]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-463/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs@pipe-a-dp-4.html * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc: - shard-dg2-set2: [PASS][29] -> [INCOMPLETE][30] ([Intel XE#1195] / [Intel XE#1727]) +1 other test incomplete [29]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html [30]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-c-dp-4: - shard-dg2-set2: [PASS][31] -> [INCOMPLETE][32] ([Intel XE#1195] / [Intel XE#3113]) +1 other test incomplete [31]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-c-dp-4.html [32]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-c-dp-4.html * igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs: - shard-lnl: NOTRUN -> [SKIP][33] ([Intel XE#2887]) [33]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-1/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs.html * igt@kms_chamelium_hpd@common-hpd-after-suspend: - shard-lnl: NOTRUN -> [SKIP][34] ([Intel XE#373]) [34]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-6/igt@kms_chamelium_hpd@common-hpd-after-suspend.html * igt@kms_chamelium_hpd@dp-hpd-storm-disable: - shard-bmg: NOTRUN -> [SKIP][35] ([Intel XE#2252]) [35]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-2/igt@kms_chamelium_hpd@dp-hpd-storm-disable.html * igt@kms_color@ctm-0-50: - shard-dg2-set2: [PASS][36] -> [INCOMPLETE][37] ([Intel XE#1195] / [Intel XE#2594]) [36]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-dg2-434/igt@kms_color@ctm-0-50.html [37]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-434/igt@kms_color@ctm-0-50.html * igt@kms_content_protection@atomic@pipe-a-dp-5: - shard-dg2-set2: NOTRUN -> [FAIL][38] ([Intel XE#3407]) [38]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-466/igt@kms_content_protection@atomic@pipe-a-dp-5.html * igt@kms_content_protection@uevent@pipe-a-dp-5: - shard-dg2-set2: NOTRUN -> [FAIL][39] ([Intel XE#1188]) [39]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-466/igt@kms_content_protection@uevent@pipe-a-dp-5.html * igt@kms_cursor_crc@cursor-offscreen-512x170: - shard-lnl: NOTRUN -> [SKIP][40] ([Intel XE#2321]) [40]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-4/igt@kms_cursor_crc@cursor-offscreen-512x170.html * igt@kms_cursor_crc@cursor-random-max-size: - shard-dg2-set2: NOTRUN -> [SKIP][41] ([Intel XE#455]) +5 other tests skip [41]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-435/igt@kms_cursor_crc@cursor-random-max-size.html * igt@kms_cursor_crc@cursor-rapid-movement-32x32: - shard-bmg: NOTRUN -> [SKIP][42] ([Intel XE#2320]) +1 other test skip [42]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-8/igt@kms_cursor_crc@cursor-rapid-movement-32x32.html * igt@kms_cursor_crc@cursor-sliding-32x32: - shard-lnl: NOTRUN -> [SKIP][43] ([Intel XE#1424]) [43]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-4/igt@kms_cursor_crc@cursor-sliding-32x32.html * igt@kms_cursor_legacy@torture-move@pipe-d: - shard-dg2-set2: [PASS][44] -> [DMESG-WARN][45] ([Intel XE#2932]) +1 other test dmesg-warn [44]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-dg2-463/igt@kms_cursor_legacy@torture-move@pipe-d.html [45]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-463/igt@kms_cursor_legacy@torture-move@pipe-d.html * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-dp2-hdmi-a3: - shard-bmg: [PASS][46] -> [FAIL][47] ([Intel XE#2882]) [46]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-bmg-3/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-dp2-hdmi-a3.html [47]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-3/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-dp2-hdmi-a3.html * igt@kms_flip@flip-vs-blocking-wf-vblank@c-edp1: - shard-lnl: [PASS][48] -> [FAIL][49] ([Intel XE#886]) +2 other tests fail [48]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-lnl-4/igt@kms_flip@flip-vs-blocking-wf-vblank@c-edp1.html [49]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-8/igt@kms_flip@flip-vs-blocking-wf-vblank@c-edp1.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp4: - shard-dg2-set2: [PASS][50] -> [FAIL][51] ([Intel XE#301]) +8 other tests fail [50]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-dg2-434/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp4.html [51]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-434/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp4.html * igt@kms_flip@flip-vs-expired-vblank@b-dp5: - shard-dg2-set2: NOTRUN -> [FAIL][52] ([Intel XE#301]) +2 other tests fail [52]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-466/igt@kms_flip@flip-vs-expired-vblank@b-dp5.html * igt@kms_flip@flip-vs-expired-vblank@d-dp5: - shard-dg2-set2: NOTRUN -> [FAIL][53] ([Intel XE#3403]) [53]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-466/igt@kms_flip@flip-vs-expired-vblank@d-dp5.html * igt@kms_flip@flip-vs-suspend-interruptible@d-dp4: - shard-dg2-set2: NOTRUN -> [INCOMPLETE][54] ([Intel XE#1195] / [Intel XE#2049]) [54]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-434/igt@kms_flip@flip-vs-suspend-interruptible@d-dp4.html * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling: - shard-bmg: NOTRUN -> [SKIP][55] ([Intel XE#2293] / [Intel XE#2380]) +1 other test skip [55]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-7/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling.html * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling@pipe-a-valid-mode: - shard-bmg: NOTRUN -> [SKIP][56] ([Intel XE#2293]) +1 other test skip [56]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-7/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling@pipe-a-valid-mode.html * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-fullscreen: - shard-lnl: NOTRUN -> [SKIP][57] ([Intel XE#651]) +2 other tests skip [57]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-7/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-fullscreen.html * igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw: - shard-bmg: NOTRUN -> [SKIP][58] ([Intel XE#2311]) +9 other tests skip [58]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw.html * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-render: - shard-dg2-set2: NOTRUN -> [SKIP][59] ([Intel XE#651]) +7 other tests skip [59]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-435/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-render.html * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-wc: - shard-bmg: NOTRUN -> [FAIL][60] ([Intel XE#2333]) +5 other tests fail [60]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@fbc-tiling-y: - shard-dg2-set2: NOTRUN -> [SKIP][61] ([Intel XE#658]) [61]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-464/igt@kms_frontbuffer_tracking@fbc-tiling-y.html - shard-bmg: NOTRUN -> [SKIP][62] ([Intel XE#2352]) [62]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-tiling-y.html * igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt: - shard-bmg: NOTRUN -> [SKIP][63] ([Intel XE#2313]) +7 other tests skip [63]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html * igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-pgflip-blt: - shard-dg2-set2: NOTRUN -> [SKIP][64] ([Intel XE#653]) +8 other tests skip [64]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-436/igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-pgflip-blt.html * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-onoff: - shard-lnl: NOTRUN -> [SKIP][65] ([Intel XE#656]) +1 other test skip [65]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-7/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-onoff.html * igt@kms_multipipe_modeset@basic-max-pipe-crc-check: - shard-bmg: NOTRUN -> [SKIP][66] ([Intel XE#2501]) [66]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-6/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html * igt@kms_plane_scaling@2x-scaler-multi-pipe: - shard-lnl: NOTRUN -> [SKIP][67] ([Intel XE#309]) +2 other tests skip [67]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-7/igt@kms_plane_scaling@2x-scaler-multi-pipe.html * igt@kms_plane_scaling@intel-max-src-size@pipe-a-dp-5: - shard-dg2-set2: NOTRUN -> [FAIL][68] ([Intel XE#3413]) [68]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-466/igt@kms_plane_scaling@intel-max-src-size@pipe-a-dp-5.html * igt@kms_pm_dc@dc5-dpms-negative: - shard-lnl: NOTRUN -> [SKIP][69] ([Intel XE#1131]) [69]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-5/igt@kms_pm_dc@dc5-dpms-negative.html * igt@kms_pm_dc@dc5-psr: - shard-bmg: NOTRUN -> [SKIP][70] ([Intel XE#2392]) [70]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-5/igt@kms_pm_dc@dc5-psr.html * igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf: - shard-dg2-set2: NOTRUN -> [SKIP][71] ([Intel XE#1489]) [71]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-466/igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf.html - shard-bmg: NOTRUN -> [SKIP][72] ([Intel XE#1489]) [72]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-8/igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf.html * igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-sf: - shard-lnl: NOTRUN -> [SKIP][73] ([Intel XE#2893]) [73]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-1/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-sf.html * igt@kms_psr@fbc-pr-sprite-plane-onoff: - shard-bmg: NOTRUN -> [SKIP][74] ([Intel XE#2234] / [Intel XE#2850]) +2 other tests skip [74]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-1/igt@kms_psr@fbc-pr-sprite-plane-onoff.html * igt@kms_psr@fbc-pr-suspend: - shard-lnl: NOTRUN -> [SKIP][75] ([Intel XE#1406]) [75]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-6/igt@kms_psr@fbc-pr-suspend.html * igt@kms_psr@fbc-psr2-primary-render: - shard-dg2-set2: NOTRUN -> [SKIP][76] ([Intel XE#2850] / [Intel XE#929]) +3 other tests skip [76]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-434/igt@kms_psr@fbc-psr2-primary-render.html * igt@kms_rotation_crc@bad-pixel-format: - shard-bmg: NOTRUN -> [SKIP][77] ([Intel XE#3414]) [77]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-1/igt@kms_rotation_crc@bad-pixel-format.html - shard-dg2-set2: NOTRUN -> [SKIP][78] ([Intel XE#3414]) [78]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-463/igt@kms_rotation_crc@bad-pixel-format.html * igt@kms_rotation_crc@sprite-rotation-180: - shard-lnl: [PASS][79] -> [DMESG-WARN][80] ([Intel XE#2055]) [79]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-lnl-4/igt@kms_rotation_crc@sprite-rotation-180.html [80]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-6/igt@kms_rotation_crc@sprite-rotation-180.html * igt@xe_drm_fdinfo@utilization-single-full-load-destroy-queue: - shard-lnl: [PASS][81] -> [FAIL][82] ([Intel XE#2667]) [81]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-lnl-8/igt@xe_drm_fdinfo@utilization-single-full-load-destroy-queue.html [82]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-6/igt@xe_drm_fdinfo@utilization-single-full-load-destroy-queue.html * igt@xe_eudebug@basic-close: - shard-dg2-set2: NOTRUN -> [SKIP][83] ([Intel XE#2905]) [83]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-433/igt@xe_eudebug@basic-close.html - shard-bmg: NOTRUN -> [SKIP][84] ([Intel XE#2905]) [84]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-8/igt@xe_eudebug@basic-close.html * igt@xe_evict@evict-beng-large-multi-vm-cm: - shard-dg2-set2: [PASS][85] -> [FAIL][86] ([Intel XE#1600]) [85]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-dg2-435/igt@xe_evict@evict-beng-large-multi-vm-cm.html [86]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-433/igt@xe_evict@evict-beng-large-multi-vm-cm.html * igt@xe_evict@evict-beng-mixed-many-threads-small: - shard-bmg: [PASS][87] -> [TIMEOUT][88] ([Intel XE#1473]) [87]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-bmg-8/igt@xe_evict@evict-beng-mixed-many-threads-small.html [88]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-4/igt@xe_evict@evict-beng-mixed-many-threads-small.html * igt@xe_evict@evict-beng-threads-small: - shard-lnl: NOTRUN -> [SKIP][89] ([Intel XE#688]) +2 other tests skip [89]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-2/igt@xe_evict@evict-beng-threads-small.html * igt@xe_evict@evict-mixed-many-threads-small: - shard-dg2-set2: [PASS][90] -> [TIMEOUT][91] ([Intel XE#1473]) [90]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-dg2-436/igt@xe_evict@evict-mixed-many-threads-small.html [91]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-464/igt@xe_evict@evict-mixed-many-threads-small.html * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic-defer-mmap: - shard-bmg: NOTRUN -> [SKIP][92] ([Intel XE#2322]) +3 other tests skip [92]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-1/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic-defer-mmap.html * igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-rebind: - shard-lnl: NOTRUN -> [SKIP][93] ([Intel XE#1392]) [93]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-1/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-rebind.html * igt@xe_exec_fault_mode@once-userptr-invalidate-race: - shard-dg2-set2: NOTRUN -> [SKIP][94] ([Intel XE#288]) +4 other tests skip [94]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-464/igt@xe_exec_fault_mode@once-userptr-invalidate-race.html * igt@xe_exec_reset@parallel-close-execqueues-close-fd: - shard-bmg: [PASS][95] -> [FAIL][96] ([Intel XE#1081]) [95]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-bmg-2/igt@xe_exec_reset@parallel-close-execqueues-close-fd.html [96]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-7/igt@xe_exec_reset@parallel-close-execqueues-close-fd.html - shard-dg2-set2: [PASS][97] -> [FAIL][98] ([Intel XE#1081]) [97]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-dg2-434/igt@xe_exec_reset@parallel-close-execqueues-close-fd.html [98]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-466/igt@xe_exec_reset@parallel-close-execqueues-close-fd.html * igt@xe_live_ktest@xe_bo: - shard-lnl: [PASS][99] -> [SKIP][100] ([Intel XE#1192]) [99]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-lnl-5/igt@xe_live_ktest@xe_bo.html [100]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-3/igt@xe_live_ktest@xe_bo.html * igt@xe_live_ktest@xe_bo@xe_bo_shrink_kunit: - shard-bmg: [PASS][101] -> [INCOMPLETE][102] ([Intel XE#2998]) +1 other test incomplete [101]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-bmg-7/igt@xe_live_ktest@xe_bo@xe_bo_shrink_kunit.html [102]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-4/igt@xe_live_ktest@xe_bo@xe_bo_shrink_kunit.html * igt@xe_oa@syncs-syncobj-cfg: - shard-dg2-set2: NOTRUN -> [SKIP][103] ([Intel XE#2541]) +1 other test skip [103]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-463/igt@xe_oa@syncs-syncobj-cfg.html * igt@xe_pm@s2idle-d3cold-basic-exec: - shard-bmg: NOTRUN -> [SKIP][104] ([Intel XE#2284]) [104]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-6/igt@xe_pm@s2idle-d3cold-basic-exec.html - shard-dg2-set2: NOTRUN -> [SKIP][105] ([Intel XE#2284] / [Intel XE#366]) [105]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-435/igt@xe_pm@s2idle-d3cold-basic-exec.html * igt@xe_pm@s4-exec-after: - shard-lnl: [PASS][106] -> [ABORT][107] ([Intel XE#1358] / [Intel XE#1607]) [106]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-lnl-6/igt@xe_pm@s4-exec-after.html [107]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-2/igt@xe_pm@s4-exec-after.html * igt@xe_pm_residency@idle-residency-on-exec: - shard-lnl: [PASS][108] -> [FAIL][109] ([Intel XE#2564]) +1 other test fail [108]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-lnl-8/igt@xe_pm_residency@idle-residency-on-exec.html [109]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-1/igt@xe_pm_residency@idle-residency-on-exec.html * igt@xe_query@multigpu-query-topology: - shard-dg2-set2: NOTRUN -> [SKIP][110] ([Intel XE#944]) [110]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-466/igt@xe_query@multigpu-query-topology.html #### Possible fixes #### * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-edp-1-linear: - shard-lnl: [FAIL][111] ([Intel XE#911]) -> [PASS][112] +3 other tests pass [111]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-lnl-2/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-edp-1-linear.html [112]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-1/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-edp-1-linear.html * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-b-dp-4-x: - shard-dg2-set2: [INCOMPLETE][113] ([Intel XE#1195]) -> [PASS][114] +2 other tests pass [113]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-dg2-435/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-b-dp-4-x.html [114]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-435/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-b-dp-4-x.html * igt@kms_atomic_transition@modeset-transition-nonblocking-fencing: - shard-lnl: [FAIL][115] ([Intel XE#1701]) -> [PASS][116] +3 other tests pass [115]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-lnl-4/igt@kms_atomic_transition@modeset-transition-nonblocking-fencing.html [116]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-7/igt@kms_atomic_transition@modeset-transition-nonblocking-fencing.html * igt@kms_atomic_transition@plane-all-modeset-transition-fencing@pipe-a-hdmi-a-6: - shard-dg2-set2: [FAIL][117] ([Intel XE#1426]) -> [PASS][118] +1 other test pass [117]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-dg2-464/igt@kms_atomic_transition@plane-all-modeset-transition-fencing@pipe-a-hdmi-a-6.html [118]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-463/igt@kms_atomic_transition@plane-all-modeset-transition-fencing@pipe-a-hdmi-a-6.html * igt@kms_big_fb@4-tiled-16bpp-rotate-180: - shard-lnl: [FAIL][119] ([Intel XE#1454]) -> [PASS][120] [119]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-lnl-3/igt@kms_big_fb@4-tiled-16bpp-rotate-180.html [120]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-4/igt@kms_big_fb@4-tiled-16bpp-rotate-180.html * igt@kms_big_fb@4-tiled-64bpp-rotate-180: - shard-bmg: [INCOMPLETE][121] ([Intel XE#3225]) -> [PASS][122] [121]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-bmg-7/igt@kms_big_fb@4-tiled-64bpp-rotate-180.html [122]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-6/igt@kms_big_fb@4-tiled-64bpp-rotate-180.html * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size: - shard-bmg: [DMESG-WARN][123] ([Intel XE#877]) -> [PASS][124] [123]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html [124]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-3/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-hdmi-a6-dp4: - shard-dg2-set2: [FAIL][125] ([Intel XE#301]) -> [PASS][126] +2 other tests pass [125]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-dg2-436/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-hdmi-a6-dp4.html [126]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-435/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-hdmi-a6-dp4.html * igt@kms_flip@blocking-wf_vblank: - shard-lnl: [FAIL][127] ([Intel XE#886]) -> [PASS][128] +4 other tests pass [127]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-lnl-3/igt@kms_flip@blocking-wf_vblank.html [128]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-4/igt@kms_flip@blocking-wf_vblank.html * igt@kms_hdr@invalid-hdr: - shard-dg2-set2: [SKIP][129] ([Intel XE#455]) -> [PASS][130] [129]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-dg2-434/igt@kms_hdr@invalid-hdr.html [130]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-466/igt@kms_hdr@invalid-hdr.html - shard-bmg: [SKIP][131] ([Intel XE#1503]) -> [PASS][132] [131]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-bmg-1/igt@kms_hdr@invalid-hdr.html [132]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-8/igt@kms_hdr@invalid-hdr.html * igt@kms_plane_cursor@viewport: - shard-dg2-set2: [FAIL][133] ([Intel XE#616]) -> [PASS][134] +1 other test pass [133]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-dg2-435/igt@kms_plane_cursor@viewport.html [134]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-464/igt@kms_plane_cursor@viewport.html * igt@kms_pm_dc@deep-pkgc: - shard-lnl: [FAIL][135] ([Intel XE#2029]) -> [PASS][136] [135]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-lnl-7/igt@kms_pm_dc@deep-pkgc.html [136]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-3/igt@kms_pm_dc@deep-pkgc.html * igt@kms_pm_rpm@legacy-planes-dpms: - shard-lnl: [DMESG-WARN][137] ([Intel XE#2932] / [Intel XE#3184]) -> [PASS][138] [137]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-lnl-4/igt@kms_pm_rpm@legacy-planes-dpms.html [138]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-2/igt@kms_pm_rpm@legacy-planes-dpms.html * igt@kms_pm_rpm@legacy-planes-dpms@plane-59: - shard-lnl: [DMESG-WARN][139] ([Intel XE#3184]) -> [PASS][140] +1 other test pass [139]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-lnl-4/igt@kms_pm_rpm@legacy-planes-dpms@plane-59.html [140]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-2/igt@kms_pm_rpm@legacy-planes-dpms@plane-59.html * igt@kms_vblank@accuracy-idle: - shard-lnl: [FAIL][141] ([Intel XE#1523]) -> [PASS][142] +1 other test pass [141]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-lnl-1/igt@kms_vblank@accuracy-idle.html [142]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-6/igt@kms_vblank@accuracy-idle.html * igt@xe_evict@evict-mixed-threads-large: - shard-bmg: [TIMEOUT][143] ([Intel XE#1473] / [Intel XE#2472]) -> [PASS][144] [143]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-bmg-4/igt@xe_evict@evict-mixed-threads-large.html [144]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-1/igt@xe_evict@evict-mixed-threads-large.html * igt@xe_exec_threads@threads-bal-mixed-shared-vm-userptr-invalidate: - shard-lnl: [DMESG-WARN][145] -> [PASS][146] [145]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-lnl-1/igt@xe_exec_threads@threads-bal-mixed-shared-vm-userptr-invalidate.html [146]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-8/igt@xe_exec_threads@threads-bal-mixed-shared-vm-userptr-invalidate.html * igt@xe_exec_threads@threads-mixed-shared-vm-userptr-invalidate: - shard-dg2-set2: [DMESG-FAIL][147] -> [PASS][148] [147]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-dg2-464/igt@xe_exec_threads@threads-mixed-shared-vm-userptr-invalidate.html [148]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-464/igt@xe_exec_threads@threads-mixed-shared-vm-userptr-invalidate.html * {igt@xe_fault_injection@vm-create-fail-xe_exec_queue_create_bind}: - shard-dg2-set2: [FAIL][149] -> [PASS][150] +10 other tests pass [149]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-dg2-463/igt@xe_fault_injection@vm-create-fail-xe_exec_queue_create_bind.html [150]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-433/igt@xe_fault_injection@vm-create-fail-xe_exec_queue_create_bind.html - shard-lnl: [FAIL][151] -> [PASS][152] +1 other test pass [151]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-lnl-4/igt@xe_fault_injection@vm-create-fail-xe_exec_queue_create_bind.html [152]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-6/igt@xe_fault_injection@vm-create-fail-xe_exec_queue_create_bind.html * {igt@xe_fault_injection@vm-create-fail-xe_vm_create_scratch}: - shard-bmg: [FAIL][153] -> [PASS][154] +3 other tests pass [153]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-bmg-4/igt@xe_fault_injection@vm-create-fail-xe_vm_create_scratch.html [154]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-1/igt@xe_fault_injection@vm-create-fail-xe_vm_create_scratch.html * igt@xe_oa@oa-regs-whitelisted: - shard-bmg: [FAIL][155] ([Intel XE#2514]) -> [PASS][156] [155]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-bmg-1/igt@xe_oa@oa-regs-whitelisted.html [156]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-3/igt@xe_oa@oa-regs-whitelisted.html * igt@xe_oa@oa-regs-whitelisted@rcs-0: - shard-lnl: [FAIL][157] ([Intel XE#2514]) -> [PASS][158] +1 other test pass [157]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-lnl-4/igt@xe_oa@oa-regs-whitelisted@rcs-0.html [158]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-7/igt@xe_oa@oa-regs-whitelisted@rcs-0.html * igt@xe_pm@s4-basic: - shard-lnl: [ABORT][159] ([Intel XE#1358] / [Intel XE#1607]) -> [PASS][160] [159]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-lnl-2/igt@xe_pm@s4-basic.html [160]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-lnl-4/igt@xe_pm@s4-basic.html #### Warnings #### * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-move: - shard-bmg: [INCOMPLETE][161] ([Intel XE#2050]) -> [FAIL][162] ([Intel XE#2333]) [161]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-move.html [162]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-move.html * igt@kms_tiled_display@basic-test-pattern: - shard-bmg: [SKIP][163] ([Intel XE#2426]) -> [FAIL][164] ([Intel XE#1729]) [163]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-bmg-7/igt@kms_tiled_display@basic-test-pattern.html [164]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern.html - shard-dg2-set2: [SKIP][165] ([Intel XE#362]) -> [FAIL][166] ([Intel XE#1729]) [165]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-dg2-466/igt@kms_tiled_display@basic-test-pattern.html [166]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-464/igt@kms_tiled_display@basic-test-pattern.html * igt@xe_evict@evict-mixed-many-threads-large: - shard-dg2-set2: [INCOMPLETE][167] ([Intel XE#1195] / [Intel XE#1473]) -> [TIMEOUT][168] ([Intel XE#1473]) [167]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-dg2-464/igt@xe_evict@evict-mixed-many-threads-large.html [168]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-433/igt@xe_evict@evict-mixed-many-threads-large.html * igt@xe_live_ktest@xe_bo: - shard-dg2-set2: [TIMEOUT][169] ([Intel XE#3191]) -> [TIMEOUT][170] ([Intel XE#2961] / [Intel XE#3191]) +1 other test timeout [169]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8110/shard-dg2-466/igt@xe_live_ktest@xe_bo.html [170]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/shard-dg2-466/igt@xe_live_ktest@xe_bo.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [Intel XE#1081]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1081 [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124 [Intel XE#1131]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1131 [Intel XE#1188]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1188 [Intel XE#1192]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1192 [Intel XE#1195]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1195 [Intel XE#1358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1358 [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392 [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406 [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424 [Intel XE#1426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1426 [Intel XE#1454]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1454 [Intel XE#1473]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1473 [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489 [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503 [Intel XE#1523]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1523 [Intel XE#1600]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1600 [Intel XE#1607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1607 [Intel XE#1701]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1701 [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727 [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729 [Intel XE#2029]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2029 [Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049 [Intel XE#2050]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2050 [Intel XE#2055]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2055 [Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191 [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234 [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252 [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284 [Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293 [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311 [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313 [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320 [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321 [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322 [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327 [Intel XE#2333]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2333 [Intel XE#2352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2352 [Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380 [Intel XE#2392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2392 [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426 [Intel XE#2472]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2472 [Intel XE#2501]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2501 [Intel XE#2514]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2514 [Intel XE#2541]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2541 [Intel XE#2550]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2550 [Intel XE#2564]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2564 [Intel XE#2594]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2594 [Intel XE#2667]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2667 [Intel XE#2669]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2669 [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850 [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288 [Intel XE#2882]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2882 [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887 [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893 [Intel XE#2905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2905 [Intel XE#2932]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2932 [Intel XE#2961]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2961 [Intel XE#2998]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2998 [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301 [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309 [Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113 [Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316 [Intel XE#3184]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3184 [Intel XE#3191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3191 [Intel XE#3225]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3225 [Intel XE#3279]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3279 [Intel XE#3403]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3403 [Intel XE#3407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3407 [Intel XE#3413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3413 [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414 [Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362 [Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366 [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367 [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373 [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455 [Intel XE#616]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/616 [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651 [Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653 [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656 [Intel XE#658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/658 [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688 [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787 [Intel XE#877]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/877 [Intel XE#886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/886 [Intel XE#911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/911 [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929 [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944 Build changes ------------- * IGT: IGT_8110 -> IGTPW_12103 * Linux: xe-2226-a03ca0a62967eea85aedea158db9dc5078496d4d -> xe-2227-1e3f4084e4e1fba8d172be0c2b964ab5c816394d IGTPW_12103: c4e1e4cb531f2f2541043c19d3493adc24bab0d4 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git IGT_8110: 868b25a05a9492a99228d798c6f71bea5ceaa6e1 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git xe-2226-a03ca0a62967eea85aedea158db9dc5078496d4d: a03ca0a62967eea85aedea158db9dc5078496d4d xe-2227-1e3f4084e4e1fba8d172be0c2b964ab5c816394d: 1e3f4084e4e1fba8d172be0c2b964ab5c816394d == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12103/index.html [-- Attachment #2: Type: text/html, Size: 50427 bytes --] ^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2024-11-15 9:05 UTC | newest] Thread overview: 14+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2024-11-14 10:31 [PATCH 0/2] lib/gpgpu_shader: simplify load/store shaders Andrzej Hajda 2024-11-14 10:31 ` [PATCH 1/2] scripts/generate_iga64_codes: add iga64_macros.h to checksum calculation Andrzej Hajda 2024-11-14 10:59 ` Zbigniew Kempczyński 2024-11-14 10:31 ` [PATCH 2/2] lib/gpgpu_shader: simplify load/store shaders Andrzej Hajda 2024-11-14 11:28 ` Zbigniew Kempczyński 2024-11-14 16:11 ` Hajda, Andrzej 2024-11-14 14:05 ` Grzegorzek, Dominik 2024-11-14 16:24 ` Hajda, Andrzej 2024-11-15 9:05 ` Grzegorzek, Dominik 2024-11-14 12:18 ` ✗ GitLab.Pipeline: warning for " Patchwork 2024-11-14 12:40 ` ✓ Fi.CI.BAT: success " Patchwork 2024-11-14 12:48 ` ✓ CI.xeBAT: " Patchwork 2024-11-14 17:45 ` ✗ Fi.CI.IGT: failure " Patchwork 2024-11-14 23:31 ` ✗ CI.xeFULL: " Patchwork
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