* [PATCH v5 0/2] tests/xe_spin_batch: Add spin-timestamp-check
@ 2024-12-06 11:10 Pravalika Gurram
2024-12-06 11:10 ` [PATCH v5 1/2] lib/xe/xe_spin: move the spinner related functions to lib Pravalika Gurram
` (4 more replies)
0 siblings, 5 replies; 8+ messages in thread
From: Pravalika Gurram @ 2024-12-06 11:10 UTC (permalink / raw)
To: igt-dev; +Cc: zbigniew.kempczynski, Pravalika Gurram
Move the spinner related functions to lib.
check the ctx_timestamp register post gt reset for each engine.
Pravalika Gurram (2):
lib/xe/xe_spin: move the spinner related functions to lib
tests/xe_spin_batch: Add spin-timestamp-check
lib/xe/xe_spin.c | 160 +++++++++++++++++++----------
lib/xe/xe_spin.h | 56 ++++++----
tests/intel/xe_drm_fdinfo.c | 200 +++++++-----------------------------
tests/intel/xe_spin_batch.c | 121 ++++++++++++++++++++++
tests/intel/xe_vm.c | 17 +--
5 files changed, 309 insertions(+), 245 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH v5 1/2] lib/xe/xe_spin: move the spinner related functions to lib 2024-12-06 11:10 [PATCH v5 0/2] tests/xe_spin_batch: Add spin-timestamp-check Pravalika Gurram @ 2024-12-06 11:10 ` Pravalika Gurram 2024-12-10 8:10 ` Zbigniew Kempczyński 2024-12-10 11:12 ` Kamil Konieczny 2024-12-06 11:10 ` [PATCH v5 2/2] tests/xe_spin_batch: Add spin-timestamp-check Pravalika Gurram ` (3 subsequent siblings) 4 siblings, 2 replies; 8+ messages in thread From: Pravalika Gurram @ 2024-12-06 11:10 UTC (permalink / raw) To: igt-dev; +Cc: zbigniew.kempczynski, Pravalika Gurram move spin_ctx_init,spin_ctx_start,spin_ctx_end,spin_ctx_destroy to xe spin lib to avoid code redundancy. removed xe_cork* functions to avoid duplicate spinner code. Signed-off-by: Pravalika Gurram <pravalika.gurram@intel.com> --- lib/xe/xe_spin.c | 160 +++++++++++++++++++---------- lib/xe/xe_spin.h | 56 ++++++---- tests/intel/xe_drm_fdinfo.c | 200 +++++++----------------------------- tests/intel/xe_vm.c | 17 +-- 4 files changed, 188 insertions(+), 245 deletions(-) diff --git a/lib/xe/xe_spin.c b/lib/xe/xe_spin.c index 3adacc3a8..f9b18dfc0 100644 --- a/lib/xe/xe_spin.c +++ b/lib/xe/xe_spin.c @@ -292,77 +292,125 @@ void xe_spin_free(int fd, struct igt_spin *spin) free(spin); } -void xe_cork_init(int fd, struct drm_xe_engine_class_instance *hwe, - struct xe_cork *cork) +struct xe_cork * +xe_cork_create(int fd, struct drm_xe_engine_class_instance *hwe, + uint32_t vm, uint16_t width, uint16_t num_placements, + struct xe_cork_opts *opts) { - uint64_t addr = xe_get_default_alignment(fd); - size_t bo_size = xe_bb_size(fd, SZ_4K); - uint32_t vm, bo, exec_queue, syncobj; - struct xe_spin *spin; - struct drm_xe_sync sync = { - .type = DRM_XE_SYNC_TYPE_SYNCOBJ, .flags = DRM_XE_SYNC_FLAG_SIGNAL, - }; - struct drm_xe_exec exec = { - .num_batch_buffer = 1, - .num_syncs = 1, - .syncs = to_user_pointer(&sync), - }; - - vm = xe_vm_create(fd, 0, 0); - - bo = xe_bo_create(fd, vm, bo_size, vram_if_possible(fd, hwe->gt_id), - DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM); - spin = xe_bo_map(fd, bo, 0x1000); + struct xe_cork *ctx = calloc(1, sizeof(*ctx)); + + igt_assert(width && num_placements && + (width == 1 || num_placements == 1)); + igt_assert_lt(width, XE_MAX_ENGINE_INSTANCE); + + ctx->class = hwe->engine_class; + ctx->width = width; + ctx->num_placements = num_placements; + ctx->vm = vm; + ctx->ahnd = opts->ahnd; + + ctx->exec.num_batch_buffer = width; + ctx->exec.num_syncs = 2; + ctx->exec.syncs = to_user_pointer(ctx->sync); + + ctx->sync[0].type = DRM_XE_SYNC_TYPE_SYNCOBJ; + ctx->sync[0].flags = DRM_XE_SYNC_FLAG_SIGNAL; + ctx->sync[0].handle = syncobj_create(fd, 0); + + ctx->sync[1].type = DRM_XE_SYNC_TYPE_SYNCOBJ; + ctx->sync[1].flags = DRM_XE_SYNC_FLAG_SIGNAL; + ctx->sync[1].handle = syncobj_create(fd, 0); + + ctx->bo_size = sizeof(struct xe_spin); + ctx->bo_size = xe_bb_size(fd, ctx->bo_size); + ctx->bo = xe_bo_create(fd, ctx->vm, ctx->bo_size, + vram_if_possible(fd, hwe->gt_id), + DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM); + if (opts->ahnd) { + for (unsigned int i = 0; i < width; i++) + ctx->addr[i] = intel_allocator_alloc_with_strategy(opts->ahnd, + ctx->bo, ctx->bo_size, 0, + ALLOC_STRATEGY_LOW_TO_HIGH); + } else { + for (unsigned int i = 0; i < width; i++) + ctx->addr[i] = 0x100000 + 0x100000 * hwe->engine_class; + } - xe_vm_bind_sync(fd, vm, bo, 0, addr, bo_size); + ctx->spin = xe_bo_map(fd, ctx->bo, ctx->bo_size); - exec_queue = xe_exec_queue_create(fd, vm, hwe, 0); - syncobj = syncobj_create(fd, 0); + igt_assert_eq(__xe_exec_queue_create(fd, ctx->vm, width, num_placements, + hwe, 0, &ctx->exec_queue), 0); - xe_spin_init_opts(spin, .addr = addr, .preempt = true); - exec.exec_queue_id = exec_queue; - exec.address = addr; - sync.handle = syncobj; - igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_EXEC, &exec), 0); + xe_vm_bind_async(fd, ctx->vm, 0, ctx->bo, 0, ctx->addr[0], ctx->bo_size, + ctx->sync, 1); - cork->spin = spin; - cork->fd = fd; - cork->vm = vm; - cork->bo = bo; - cork->exec_queue = exec_queue; - cork->syncobj = syncobj; + return ctx; } -bool xe_cork_started(struct xe_cork *cork) +void xe_cork_sync_start(int fd, struct xe_cork *ctx, struct xe_cork_opts *opts) { - return xe_spin_started(cork->spin); -} + if (!ctx) + return; -void xe_cork_wait_started(struct xe_cork *cork) -{ - xe_spin_wait_started(cork->spin); -} + ctx->spin_opts.addr = ctx->addr[0]; + ctx->spin_opts.write_timestamp = true; + ctx->spin_opts.preempt = true; + xe_spin_init(ctx->spin, &ctx->spin_opts); -void xe_cork_end(struct xe_cork *cork) -{ - xe_spin_end(cork->spin); -} + /* re-use sync[0] for exec */ + ctx->sync[0].flags &= ~DRM_XE_SYNC_FLAG_SIGNAL; -void xe_cork_wait_done(struct xe_cork *cork) -{ - igt_assert(syncobj_wait(cork->fd, &cork->syncobj, 1, INT64_MAX, 0, - NULL)); + ctx->exec.exec_queue_id = ctx->exec_queue; + + if (ctx->width > 1) + ctx->exec.address = to_user_pointer(ctx->addr); + else + ctx->exec.address = ctx->addr[0]; + + xe_exec(fd, &ctx->exec); + + xe_spin_wait_started(ctx->spin); + igt_assert(!syncobj_wait(fd, &ctx->sync[1].handle, 1, 1, 0, NULL)); + + if (opts->debug) + igt_info("%d: spinner started\n", ctx->class); } -void xe_cork_fini(struct xe_cork *cork) +void xe_cork_sync_end(int fd, struct xe_cork *ctx, struct xe_cork_opts *opts) { - syncobj_destroy(cork->fd, cork->syncobj); - xe_exec_queue_destroy(cork->fd, cork->exec_queue); - xe_vm_destroy(cork->fd, cork->vm); - gem_close(cork->fd, cork->bo); + if (!ctx || ctx->ended) + return; + + xe_spin_end(ctx->spin); + + igt_assert(syncobj_wait(fd, &ctx->sync[1].handle, 1, INT64_MAX, 0, NULL)); + igt_assert(syncobj_wait(fd, &ctx->sync[0].handle, 1, INT64_MAX, 0, NULL)); + + ctx->sync[0].flags |= DRM_XE_SYNC_FLAG_SIGNAL; + xe_vm_unbind_async(fd, ctx->vm, 0, 0, ctx->addr[0], ctx->bo_size, ctx->sync, 1); + igt_assert(syncobj_wait(fd, &ctx->sync[0].handle, 1, INT64_MAX, 0, NULL)); + + if (opts->ahnd) + put_ahnd(ctx->ahnd); + + ctx->ended = true; + + if (opts->debug) + igt_info("%d: spinner ended (timestamp=%u)\n", ctx->class, + ctx->spin->timestamp); } -uint32_t xe_cork_sync_handle(struct xe_cork *cork) +void xe_cork_destroy(int fd, struct xe_cork *ctx) { - return cork->syncobj; + if (!ctx) + return; + + syncobj_destroy(fd, ctx->sync[0].handle); + syncobj_destroy(fd, ctx->sync[1].handle); + xe_exec_queue_destroy(fd, ctx->exec_queue); + + munmap(ctx->spin, ctx->bo_size); + gem_close(fd, ctx->bo); + + free(ctx); } diff --git a/lib/xe/xe_spin.h b/lib/xe/xe_spin.h index d65adb05c..4e159c973 100644 --- a/lib/xe/xe_spin.h +++ b/lib/xe/xe_spin.h @@ -32,6 +32,11 @@ struct xe_spin_opts { bool write_timestamp; }; +struct xe_cork_opts { + uint64_t ahnd; + bool debug; +}; + /* Mapped GPU object */ struct xe_spin { uint32_t batch[128]; @@ -43,9 +48,36 @@ struct xe_spin { uint32_t timestamp; }; +struct xe_cork { + struct xe_spin *spin; + int fd; + uint32_t vm; + uint32_t bo; + uint32_t exec_queue; + uint32_t syncobj; + uint64_t addr[XE_MAX_ENGINE_INSTANCE]; + struct drm_xe_sync sync[2]; + struct drm_xe_exec exec; + size_t bo_size; + struct xe_spin_opts spin_opts; + bool ended; + uint16_t class; + uint16_t width; + uint16_t num_placements; + uint64_t ahnd; +}; + igt_spin_t *xe_spin_create(int fd, const struct igt_spin_factory *opt); uint32_t duration_to_ctx_ticks(int fd, int gt_id, uint64_t ns); void xe_spin_init(struct xe_spin *spin, struct xe_spin_opts *opts); +struct xe_cork * +xe_cork_create(int fd, struct drm_xe_engine_class_instance *hwe, uint32_t vm, + uint16_t width, uint16_t num_placements, struct xe_cork_opts *opts); +void xe_cork_destroy(int fd, struct xe_cork *ctx); + +#define xe_cork_create_opts(fd, hwe, vm, width, num_placements, ...) \ + xe_cork_create(fd, hwe, vm, width, num_placements, \ + &((struct xe_cork_opts){__VA_ARGS__})) #define xe_spin_init_opts(fd, ...) \ xe_spin_init(fd, &((struct xe_spin_opts){__VA_ARGS__})) @@ -55,23 +87,11 @@ void xe_spin_sync_wait(int fd, struct igt_spin *spin); void xe_spin_wait_started(struct xe_spin *spin); void xe_spin_end(struct xe_spin *spin); void xe_spin_free(int fd, struct igt_spin *spin); - -struct xe_cork { - struct xe_spin *spin; - int fd; - uint32_t vm; - uint32_t bo; - uint32_t exec_queue; - uint32_t syncobj; -}; - -void xe_cork_init(int fd, struct drm_xe_engine_class_instance *hwe, - struct xe_cork *cork); -bool xe_cork_started(struct xe_cork *cork); -void xe_cork_wait_started(struct xe_cork *cork); -void xe_cork_end(struct xe_cork *cork); -void xe_cork_wait_done(struct xe_cork *cork); -void xe_cork_fini(struct xe_cork *cork); -uint32_t xe_cork_sync_handle(struct xe_cork *cork); +void xe_cork_sync_start(int fd, struct xe_cork *ctx, struct xe_cork_opts *opts); +void xe_cork_sync_end(int fd, struct xe_cork *ctx, struct xe_cork_opts *opts); +#define xe_cork_sync_start_opts(fd, ctx, ...) \ + xe_cork_sync_start(fd, ctx, &((struct xe_cork_opts){__VA_ARGS__})) +#define xe_cork_sync_end_opts(fd, ctx, ...) \ + xe_cork_sync_end(fd, ctx, &((struct xe_cork_opts){__VA_ARGS__})) #endif /* XE_SPIN_H */ diff --git a/tests/intel/xe_drm_fdinfo.c b/tests/intel/xe_drm_fdinfo.c index ef9273e2a..3111d1f6f 100644 --- a/tests/intel/xe_drm_fdinfo.c +++ b/tests/intel/xe_drm_fdinfo.c @@ -367,133 +367,6 @@ static void basic_engine_utilization(int xe) igt_require(info.num_engines); } -struct spin_ctx { - uint32_t vm; - uint64_t addr[XE_MAX_ENGINE_INSTANCE]; - struct drm_xe_sync sync[2]; - struct drm_xe_exec exec; - uint32_t exec_queue; - size_t bo_size; - uint32_t bo; - struct xe_spin *spin; - struct xe_spin_opts spin_opts; - bool ended; - uint16_t class; - uint16_t width; - uint16_t num_placements; -}; - -static struct spin_ctx * -spin_ctx_init(int fd, struct drm_xe_engine_class_instance *hwe, uint32_t vm, - uint16_t width, uint16_t num_placements) -{ - struct spin_ctx *ctx = calloc(1, sizeof(*ctx)); - - igt_assert(width && num_placements && - (width == 1 || num_placements == 1)); - igt_assert_lt(width, XE_MAX_ENGINE_INSTANCE); - - ctx->class = hwe->engine_class; - ctx->width = width; - ctx->num_placements = num_placements; - ctx->vm = vm; - - for (unsigned int i = 0; i < width; i++) - ctx->addr[i] = 0x100000 + 0x100000 * hwe->engine_class; - - ctx->exec.num_batch_buffer = width; - ctx->exec.num_syncs = 2; - ctx->exec.syncs = to_user_pointer(ctx->sync); - - ctx->sync[0].type = DRM_XE_SYNC_TYPE_SYNCOBJ; - ctx->sync[0].flags = DRM_XE_SYNC_FLAG_SIGNAL; - ctx->sync[0].handle = syncobj_create(fd, 0); - - ctx->sync[1].type = DRM_XE_SYNC_TYPE_SYNCOBJ; - ctx->sync[1].flags = DRM_XE_SYNC_FLAG_SIGNAL; - ctx->sync[1].handle = syncobj_create(fd, 0); - - ctx->bo_size = sizeof(struct xe_spin); - ctx->bo_size = xe_bb_size(fd, ctx->bo_size); - ctx->bo = xe_bo_create(fd, ctx->vm, ctx->bo_size, - vram_if_possible(fd, hwe->gt_id), - DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM); - ctx->spin = xe_bo_map(fd, ctx->bo, ctx->bo_size); - - igt_assert_eq(__xe_exec_queue_create(fd, ctx->vm, width, num_placements, - hwe, 0, &ctx->exec_queue), 0); - - xe_vm_bind_async(fd, ctx->vm, 0, ctx->bo, 0, ctx->addr[0], ctx->bo_size, - ctx->sync, 1); - - return ctx; -} - -static void -spin_sync_start(int fd, struct spin_ctx *ctx) -{ - if (!ctx) - return; - - ctx->spin_opts.addr = ctx->addr[0]; - ctx->spin_opts.write_timestamp = true; - ctx->spin_opts.preempt = true; - xe_spin_init(ctx->spin, &ctx->spin_opts); - - /* re-use sync[0] for exec */ - ctx->sync[0].flags &= ~DRM_XE_SYNC_FLAG_SIGNAL; - - ctx->exec.exec_queue_id = ctx->exec_queue; - - if (ctx->width > 1) - ctx->exec.address = to_user_pointer(ctx->addr); - else - ctx->exec.address = ctx->addr[0]; - - xe_exec(fd, &ctx->exec); - - xe_spin_wait_started(ctx->spin); - igt_assert(!syncobj_wait(fd, &ctx->sync[1].handle, 1, 1, 0, NULL)); - - igt_debug("%s: spinner started\n", engine_map[ctx->class]); -} - -static void -spin_sync_end(int fd, struct spin_ctx *ctx) -{ - if (!ctx || ctx->ended) - return; - - xe_spin_end(ctx->spin); - - igt_assert(syncobj_wait(fd, &ctx->sync[1].handle, 1, INT64_MAX, 0, NULL)); - igt_assert(syncobj_wait(fd, &ctx->sync[0].handle, 1, INT64_MAX, 0, NULL)); - - ctx->sync[0].flags |= DRM_XE_SYNC_FLAG_SIGNAL; - xe_vm_unbind_async(fd, ctx->vm, 0, 0, ctx->addr[0], ctx->bo_size, ctx->sync, 1); - igt_assert(syncobj_wait(fd, &ctx->sync[0].handle, 1, INT64_MAX, 0, NULL)); - - ctx->ended = true; - igt_debug("%s: spinner ended (timestamp=%u)\n", engine_map[ctx->class], - ctx->spin->timestamp); -} - -static void -spin_ctx_destroy(int fd, struct spin_ctx *ctx) -{ - if (!ctx) - return; - - syncobj_destroy(fd, ctx->sync[0].handle); - syncobj_destroy(fd, ctx->sync[1].handle); - xe_exec_queue_destroy(fd, ctx->exec_queue); - - munmap(ctx->spin, ctx->bo_size); - gem_close(fd, ctx->bo); - - free(ctx); -} - static void check_results(struct pceu_cycles *s1, struct pceu_cycles *s2, int class, int width, enum expected_load expected_load) @@ -535,7 +408,7 @@ utilization_single(int fd, struct drm_xe_engine_class_instance *hwe, unsigned in { struct pceu_cycles pceu1[2][DRM_XE_ENGINE_CLASS_COMPUTE + 1]; struct pceu_cycles pceu2[2][DRM_XE_ENGINE_CLASS_COMPUTE + 1]; - struct spin_ctx *ctx = NULL; + struct xe_cork *ctx = NULL; enum expected_load expected_load; uint32_t vm; int new_fd; @@ -545,8 +418,8 @@ utilization_single(int fd, struct drm_xe_engine_class_instance *hwe, unsigned in vm = xe_vm_create(fd, 0, 0); if (flags & TEST_BUSY) { - ctx = spin_ctx_init(fd, hwe, vm, 1, 1); - spin_sync_start(fd, ctx); + ctx = xe_cork_create_opts(fd, hwe, vm, 1, 1); + xe_cork_sync_start_opts(fd, ctx); } read_engine_cycles(fd, pceu1[0]); @@ -555,7 +428,7 @@ utilization_single(int fd, struct drm_xe_engine_class_instance *hwe, unsigned in usleep(batch_duration_usec); if (flags & TEST_TRAILING_IDLE) - spin_sync_end(fd, ctx); + xe_cork_sync_end_opts(fd, ctx); read_engine_cycles(fd, pceu2[0]); if (flags & TEST_ISOLATION) @@ -574,8 +447,8 @@ utilization_single(int fd, struct drm_xe_engine_class_instance *hwe, unsigned in close(new_fd); } - spin_sync_end(fd, ctx); - spin_ctx_destroy(fd, ctx); + xe_cork_sync_end_opts(fd, ctx); + xe_cork_destroy(fd, ctx); xe_vm_destroy(fd, vm); } @@ -584,19 +457,19 @@ utilization_single_destroy_queue(int fd, struct drm_xe_engine_class_instance *hw { struct pceu_cycles pceu1[DRM_XE_ENGINE_CLASS_COMPUTE + 1]; struct pceu_cycles pceu2[DRM_XE_ENGINE_CLASS_COMPUTE + 1]; - struct spin_ctx *ctx = NULL; + struct xe_cork *ctx = NULL; uint32_t vm; vm = xe_vm_create(fd, 0, 0); - ctx = spin_ctx_init(fd, hwe, vm, 1, 1); - spin_sync_start(fd, ctx); + ctx = xe_cork_create_opts(fd, hwe, vm, 1, 1); + xe_cork_sync_start_opts(fd, ctx); read_engine_cycles(fd, pceu1); usleep(batch_duration_usec); /* destroy queue before sampling again */ - spin_sync_end(fd, ctx); - spin_ctx_destroy(fd, ctx); + xe_cork_sync_end_opts(fd, ctx); + xe_cork_destroy(fd, ctx); read_engine_cycles(fd, pceu2); @@ -610,18 +483,17 @@ utilization_others_idle(int fd, struct drm_xe_engine_class_instance *hwe) { struct pceu_cycles pceu1[DRM_XE_ENGINE_CLASS_COMPUTE + 1]; struct pceu_cycles pceu2[DRM_XE_ENGINE_CLASS_COMPUTE + 1]; - struct spin_ctx *ctx = NULL; + struct xe_cork *ctx = NULL; uint32_t vm; int class; vm = xe_vm_create(fd, 0, 0); - - ctx = spin_ctx_init(fd, hwe, vm, 1, 1); - spin_sync_start(fd, ctx); + ctx = xe_cork_create_opts(fd, hwe, vm, 1, 1); + xe_cork_sync_start_opts(fd, ctx); read_engine_cycles(fd, pceu1); usleep(batch_duration_usec); - spin_sync_end(fd, ctx); + xe_cork_sync_end_opts(fd, ctx); read_engine_cycles(fd, pceu2); xe_for_each_engine_class(class) { @@ -631,8 +503,8 @@ utilization_others_idle(int fd, struct drm_xe_engine_class_instance *hwe) check_results(pceu1, pceu2, class, 1, expected_load); } - spin_sync_end(fd, ctx); - spin_ctx_destroy(fd, ctx); + xe_cork_sync_end_opts(fd, ctx); + xe_cork_destroy(fd, ctx); xe_vm_destroy(fd, vm); } @@ -641,7 +513,7 @@ utilization_others_full_load(int fd, struct drm_xe_engine_class_instance *hwe) { struct pceu_cycles pceu1[DRM_XE_ENGINE_CLASS_COMPUTE + 1]; struct pceu_cycles pceu2[DRM_XE_ENGINE_CLASS_COMPUTE + 1]; - struct spin_ctx *ctx[DRM_XE_ENGINE_CLASS_COMPUTE + 1] = {}; + struct xe_cork *ctx[DRM_XE_ENGINE_CLASS_COMPUTE + 1] = {}; struct drm_xe_engine_class_instance *_hwe; uint32_t vm; int class; @@ -654,15 +526,14 @@ utilization_others_full_load(int fd, struct drm_xe_engine_class_instance *hwe) if (_class == hwe->engine_class || ctx[_class]) continue; - - ctx[_class] = spin_ctx_init(fd, _hwe, vm, 1, 1); - spin_sync_start(fd, ctx[_class]); + ctx[_class] = xe_cork_create_opts(fd, _hwe, vm, 1, 1); + xe_cork_sync_start_opts(fd, ctx[_class]); } read_engine_cycles(fd, pceu1); usleep(batch_duration_usec); xe_for_each_engine_class(class) - spin_sync_end(fd, ctx[class]); + xe_cork_sync_end_opts(fd, ctx[class]); read_engine_cycles(fd, pceu2); xe_for_each_engine_class(class) { @@ -673,8 +544,8 @@ utilization_others_full_load(int fd, struct drm_xe_engine_class_instance *hwe) continue; check_results(pceu1, pceu2, class, 1, expected_load); - spin_sync_end(fd, ctx[class]); - spin_ctx_destroy(fd, ctx[class]); + xe_cork_sync_end_opts(fd, ctx[class]); + xe_cork_destroy(fd, ctx[class]); } xe_vm_destroy(fd, vm); @@ -685,7 +556,7 @@ utilization_all_full_load(int fd) { struct pceu_cycles pceu1[DRM_XE_ENGINE_CLASS_COMPUTE + 1]; struct pceu_cycles pceu2[DRM_XE_ENGINE_CLASS_COMPUTE + 1]; - struct spin_ctx *ctx[DRM_XE_ENGINE_CLASS_COMPUTE + 1] = {}; + struct xe_cork *ctx[DRM_XE_ENGINE_CLASS_COMPUTE + 1] = {}; struct drm_xe_engine_class_instance *hwe; uint32_t vm; int class; @@ -697,15 +568,14 @@ utilization_all_full_load(int fd) class = hwe->engine_class; if (ctx[class]) continue; - - ctx[class] = spin_ctx_init(fd, hwe, vm, 1, 1); - spin_sync_start(fd, ctx[class]); + ctx[class] = xe_cork_create_opts(fd, hwe, vm, 1, 1); + xe_cork_sync_start_opts(fd, ctx[class]); } read_engine_cycles(fd, pceu1); usleep(batch_duration_usec); xe_for_each_engine_class(class) - spin_sync_end(fd, ctx[class]); + xe_cork_sync_end_opts(fd, ctx[class]); read_engine_cycles(fd, pceu2); xe_for_each_engine_class(class) { @@ -713,8 +583,8 @@ utilization_all_full_load(int fd) continue; check_results(pceu1, pceu2, class, 1, EXPECTED_LOAD_FULL); - spin_sync_end(fd, ctx[class]); - spin_ctx_destroy(fd, ctx[class]); + xe_cork_sync_end_opts(fd, ctx[class]); + xe_cork_destroy(fd, ctx[class]); } xe_vm_destroy(fd, vm); @@ -741,7 +611,7 @@ utilization_multi(int fd, int gt, int class, unsigned int flags) struct pceu_cycles pceu[2][DRM_XE_ENGINE_CLASS_COMPUTE + 1]; struct pceu_cycles pceu_spill[2][DRM_XE_ENGINE_CLASS_COMPUTE + 1]; struct drm_xe_engine_class_instance eci[XE_MAX_ENGINE_INSTANCE]; - struct spin_ctx *ctx = NULL; + struct xe_cork *ctx = NULL; enum expected_load expected_load; int fd_spill, num_placements; uint32_t vm; @@ -767,8 +637,8 @@ utilization_multi(int fd, int gt, int class, unsigned int flags) vm = xe_vm_create(fd, 0, 0); if (flags & TEST_BUSY) { - ctx = spin_ctx_init(fd, eci, vm, width, num_placements); - spin_sync_start(fd, ctx); + ctx = xe_cork_create_opts(fd, eci, vm, width, num_placements); + xe_cork_sync_start_opts(fd, ctx); } read_engine_cycles(fd, pceu[0]); @@ -777,7 +647,7 @@ utilization_multi(int fd, int gt, int class, unsigned int flags) usleep(batch_duration_usec); if (flags & TEST_TRAILING_IDLE) - spin_sync_end(fd, ctx); + xe_cork_sync_end_opts(fd, ctx); read_engine_cycles(fd, pceu[1]); if (flags & TEST_ISOLATION) @@ -797,8 +667,8 @@ utilization_multi(int fd, int gt, int class, unsigned int flags) close(fd_spill); } - spin_sync_end(fd, ctx); - spin_ctx_destroy(fd, ctx); + xe_cork_sync_end_opts(fd, ctx); + xe_cork_destroy(fd, ctx); xe_vm_destroy(fd, vm); } diff --git a/tests/intel/xe_vm.c b/tests/intel/xe_vm.c index e78ddd0e5..77c02c488 100644 --- a/tests/intel/xe_vm.c +++ b/tests/intel/xe_vm.c @@ -945,18 +945,23 @@ test_bind_array(int fd, struct drm_xe_engine_class_instance *eci, int n_execs, sync[0].handle = syncobj_create(fd, 0); if (flags & BIND_ARRAY_ENOBUFS_FLAG) { - struct xe_cork cork; + struct xe_cork *ctx = NULL; + uint32_t vm_cork; - xe_cork_init(fd, eci, &cork); + vm_cork = xe_vm_create(fd, 0, 0); + ctx = xe_cork_create_opts(fd, eci, vm_cork, 1, 1); + xe_cork_sync_start_opts(fd, ctx, .debug = true); - sync[1].handle = xe_cork_sync_handle(&cork); + sync[1].handle = ctx->sync[1].handle; sync[1].flags &= ~DRM_XE_SYNC_FLAG_SIGNAL; xe_vm_bind_array_err(fd, vm, bind_exec_queue, bind_ops, n_execs, sync, 2, ENOBUFS); - xe_cork_end(&cork); - xe_cork_wait_done(&cork); - xe_cork_fini(&cork); + /* destroy queue before sampling again */ + xe_cork_sync_end_opts(fd, ctx, .debug = true); + xe_cork_destroy(fd, ctx); + xe_vm_destroy(fd, vm_cork); + n_execs = n_execs / 4; } -- 2.34.1 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH v5 1/2] lib/xe/xe_spin: move the spinner related functions to lib 2024-12-06 11:10 ` [PATCH v5 1/2] lib/xe/xe_spin: move the spinner related functions to lib Pravalika Gurram @ 2024-12-10 8:10 ` Zbigniew Kempczyński 2024-12-10 11:12 ` Kamil Konieczny 1 sibling, 0 replies; 8+ messages in thread From: Zbigniew Kempczyński @ 2024-12-10 8:10 UTC (permalink / raw) To: Pravalika Gurram; +Cc: igt-dev On Fri, Dec 06, 2024 at 04:40:31PM +0530, Pravalika Gurram wrote: > move spin_ctx_init,spin_ctx_start,spin_ctx_end,spin_ctx_destroy > to xe spin lib to avoid code redundancy. > removed xe_cork* functions to avoid duplicate spinner code. > > Signed-off-by: Pravalika Gurram <pravalika.gurram@intel.com> > --- > lib/xe/xe_spin.c | 160 +++++++++++++++++++---------- > lib/xe/xe_spin.h | 56 ++++++---- > tests/intel/xe_drm_fdinfo.c | 200 +++++++----------------------------- > tests/intel/xe_vm.c | 17 +-- > 4 files changed, 188 insertions(+), 245 deletions(-) > > diff --git a/lib/xe/xe_spin.c b/lib/xe/xe_spin.c > index 3adacc3a8..f9b18dfc0 100644 > --- a/lib/xe/xe_spin.c > +++ b/lib/xe/xe_spin.c > @@ -292,77 +292,125 @@ void xe_spin_free(int fd, struct igt_spin *spin) > free(spin); > } > > -void xe_cork_init(int fd, struct drm_xe_engine_class_instance *hwe, > - struct xe_cork *cork) > +struct xe_cork * > +xe_cork_create(int fd, struct drm_xe_engine_class_instance *hwe, > + uint32_t vm, uint16_t width, uint16_t num_placements, > + struct xe_cork_opts *opts) > { > - uint64_t addr = xe_get_default_alignment(fd); > - size_t bo_size = xe_bb_size(fd, SZ_4K); > - uint32_t vm, bo, exec_queue, syncobj; > - struct xe_spin *spin; > - struct drm_xe_sync sync = { > - .type = DRM_XE_SYNC_TYPE_SYNCOBJ, .flags = DRM_XE_SYNC_FLAG_SIGNAL, > - }; > - struct drm_xe_exec exec = { > - .num_batch_buffer = 1, > - .num_syncs = 1, > - .syncs = to_user_pointer(&sync), > - }; > - > - vm = xe_vm_create(fd, 0, 0); > - > - bo = xe_bo_create(fd, vm, bo_size, vram_if_possible(fd, hwe->gt_id), > - DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM); > - spin = xe_bo_map(fd, bo, 0x1000); > + struct xe_cork *ctx = calloc(1, sizeof(*ctx)); Assert if ctx allocation fails. I would also check assert if opts is NULL as there's dereference to it and it's not optional. > + > + igt_assert(width && num_placements && > + (width == 1 || num_placements == 1)); > + igt_assert_lt(width, XE_MAX_ENGINE_INSTANCE); > + > + ctx->class = hwe->engine_class; > + ctx->width = width; > + ctx->num_placements = num_placements; > + ctx->vm = vm; > + ctx->ahnd = opts->ahnd; Copy debug from opts to cork, then you won't need to pass opts to start/stop. > + > + ctx->exec.num_batch_buffer = width; > + ctx->exec.num_syncs = 2; > + ctx->exec.syncs = to_user_pointer(ctx->sync); > + > + ctx->sync[0].type = DRM_XE_SYNC_TYPE_SYNCOBJ; > + ctx->sync[0].flags = DRM_XE_SYNC_FLAG_SIGNAL; > + ctx->sync[0].handle = syncobj_create(fd, 0); > + > + ctx->sync[1].type = DRM_XE_SYNC_TYPE_SYNCOBJ; > + ctx->sync[1].flags = DRM_XE_SYNC_FLAG_SIGNAL; > + ctx->sync[1].handle = syncobj_create(fd, 0); > + > + ctx->bo_size = sizeof(struct xe_spin); > + ctx->bo_size = xe_bb_size(fd, ctx->bo_size); > + ctx->bo = xe_bo_create(fd, ctx->vm, ctx->bo_size, > + vram_if_possible(fd, hwe->gt_id), > + DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM); > + if (opts->ahnd) { > + for (unsigned int i = 0; i < width; i++) > + ctx->addr[i] = intel_allocator_alloc_with_strategy(opts->ahnd, > + ctx->bo, ctx->bo_size, 0, > + ALLOC_STRATEGY_LOW_TO_HIGH); > + } else { > + for (unsigned int i = 0; i < width; i++) > + ctx->addr[i] = 0x100000 + 0x100000 * hwe->engine_class; > + } > > - xe_vm_bind_sync(fd, vm, bo, 0, addr, bo_size); > + ctx->spin = xe_bo_map(fd, ctx->bo, ctx->bo_size); > > - exec_queue = xe_exec_queue_create(fd, vm, hwe, 0); > - syncobj = syncobj_create(fd, 0); > + igt_assert_eq(__xe_exec_queue_create(fd, ctx->vm, width, num_placements, > + hwe, 0, &ctx->exec_queue), 0); > > - xe_spin_init_opts(spin, .addr = addr, .preempt = true); > - exec.exec_queue_id = exec_queue; > - exec.address = addr; > - sync.handle = syncobj; > - igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_EXEC, &exec), 0); > + xe_vm_bind_async(fd, ctx->vm, 0, ctx->bo, 0, ctx->addr[0], ctx->bo_size, > + ctx->sync, 1); > > - cork->spin = spin; > - cork->fd = fd; > - cork->vm = vm; > - cork->bo = bo; > - cork->exec_queue = exec_queue; > - cork->syncobj = syncobj; > + return ctx; > } > > -bool xe_cork_started(struct xe_cork *cork) > +void xe_cork_sync_start(int fd, struct xe_cork *ctx, struct xe_cork_opts *opts) As I noticed on the above comment, you can remove opts here if you'll copy all the fields to ctx. > { > - return xe_spin_started(cork->spin); > -} > + if (!ctx) > + return; This should assert if NULL is passed. And in all public cork functions as well. I see no reason why someone would pass NULL here. > > -void xe_cork_wait_started(struct xe_cork *cork) > -{ > - xe_spin_wait_started(cork->spin); > -} > + ctx->spin_opts.addr = ctx->addr[0]; > + ctx->spin_opts.write_timestamp = true; > + ctx->spin_opts.preempt = true; > + xe_spin_init(ctx->spin, &ctx->spin_opts); > > -void xe_cork_end(struct xe_cork *cork) > -{ > - xe_spin_end(cork->spin); > -} > + /* re-use sync[0] for exec */ I would alter it a little bit to 'reuse sync[0] as in-fence for exec'. > + ctx->sync[0].flags &= ~DRM_XE_SYNC_FLAG_SIGNAL; > > -void xe_cork_wait_done(struct xe_cork *cork) > -{ > - igt_assert(syncobj_wait(cork->fd, &cork->syncobj, 1, INT64_MAX, 0, > - NULL)); > + ctx->exec.exec_queue_id = ctx->exec_queue; > + > + if (ctx->width > 1) > + ctx->exec.address = to_user_pointer(ctx->addr); > + else > + ctx->exec.address = ctx->addr[0]; > + > + xe_exec(fd, &ctx->exec); > + > + xe_spin_wait_started(ctx->spin); > + igt_assert(!syncobj_wait(fd, &ctx->sync[1].handle, 1, 1, 0, NULL)); > + > + if (opts->debug) This should be copied to ctx. > + igt_info("%d: spinner started\n", ctx->class); > } > > -void xe_cork_fini(struct xe_cork *cork) > +void xe_cork_sync_end(int fd, struct xe_cork *ctx, struct xe_cork_opts *opts) > { > - syncobj_destroy(cork->fd, cork->syncobj); > - xe_exec_queue_destroy(cork->fd, cork->exec_queue); > - xe_vm_destroy(cork->fd, cork->vm); > - gem_close(cork->fd, cork->bo); > + if (!ctx || ctx->ended) > + return; What's for is ended? If user is calling destroy path twice it should fail instead of silently hiding multiple calls. > + > + xe_spin_end(ctx->spin); > + > + igt_assert(syncobj_wait(fd, &ctx->sync[1].handle, 1, INT64_MAX, 0, NULL)); > + igt_assert(syncobj_wait(fd, &ctx->sync[0].handle, 1, INT64_MAX, 0, NULL)); This wait on sync[0] is not needed, as it's signalled in-fence which comes from vm_bind part. > + > + ctx->sync[0].flags |= DRM_XE_SYNC_FLAG_SIGNAL; This syncobj should be reseted here. > + xe_vm_unbind_async(fd, ctx->vm, 0, 0, ctx->addr[0], ctx->bo_size, ctx->sync, 1); > + igt_assert(syncobj_wait(fd, &ctx->sync[0].handle, 1, INT64_MAX, 0, NULL)); > + > + if (opts->ahnd) > + put_ahnd(ctx->ahnd); This should be part of destroy, not stop. > + > + ctx->ended = true; > + > + if (opts->debug) > + igt_info("%d: spinner ended (timestamp=%u)\n", ctx->class, > + ctx->spin->timestamp); > } > > -uint32_t xe_cork_sync_handle(struct xe_cork *cork) > +void xe_cork_destroy(int fd, struct xe_cork *ctx) > { > - return cork->syncobj; > + if (!ctx) > + return; > + > + syncobj_destroy(fd, ctx->sync[0].handle); > + syncobj_destroy(fd, ctx->sync[1].handle); > + xe_exec_queue_destroy(fd, ctx->exec_queue); > + > + munmap(ctx->spin, ctx->bo_size); > + gem_close(fd, ctx->bo); > + > + free(ctx); > } > diff --git a/lib/xe/xe_spin.h b/lib/xe/xe_spin.h > index d65adb05c..4e159c973 100644 > --- a/lib/xe/xe_spin.h > +++ b/lib/xe/xe_spin.h > @@ -32,6 +32,11 @@ struct xe_spin_opts { > bool write_timestamp; > }; > > +struct xe_cork_opts { > + uint64_t ahnd; > + bool debug; > +}; > + > /* Mapped GPU object */ > struct xe_spin { > uint32_t batch[128]; > @@ -43,9 +48,36 @@ struct xe_spin { > uint32_t timestamp; > }; > > +struct xe_cork { > + struct xe_spin *spin; > + int fd; > + uint32_t vm; > + uint32_t bo; > + uint32_t exec_queue; > + uint32_t syncobj; > + uint64_t addr[XE_MAX_ENGINE_INSTANCE]; > + struct drm_xe_sync sync[2]; > + struct drm_xe_exec exec; > + size_t bo_size; > + struct xe_spin_opts spin_opts; > + bool ended; > + uint16_t class; > + uint16_t width; > + uint16_t num_placements; > + uint64_t ahnd; You may add struct xe_cork_opts here and copy it on create. > +}; > + > igt_spin_t *xe_spin_create(int fd, const struct igt_spin_factory *opt); > uint32_t duration_to_ctx_ticks(int fd, int gt_id, uint64_t ns); > void xe_spin_init(struct xe_spin *spin, struct xe_spin_opts *opts); > +struct xe_cork * > +xe_cork_create(int fd, struct drm_xe_engine_class_instance *hwe, uint32_t vm, > + uint16_t width, uint16_t num_placements, struct xe_cork_opts *opts); > +void xe_cork_destroy(int fd, struct xe_cork *ctx); > + > +#define xe_cork_create_opts(fd, hwe, vm, width, num_placements, ...) \ > + xe_cork_create(fd, hwe, vm, width, num_placements, \ > + &((struct xe_cork_opts){__VA_ARGS__})) > > #define xe_spin_init_opts(fd, ...) \ > xe_spin_init(fd, &((struct xe_spin_opts){__VA_ARGS__})) > @@ -55,23 +87,11 @@ void xe_spin_sync_wait(int fd, struct igt_spin *spin); > void xe_spin_wait_started(struct xe_spin *spin); > void xe_spin_end(struct xe_spin *spin); > void xe_spin_free(int fd, struct igt_spin *spin); > - > -struct xe_cork { > - struct xe_spin *spin; > - int fd; > - uint32_t vm; > - uint32_t bo; > - uint32_t exec_queue; > - uint32_t syncobj; > -}; > - > -void xe_cork_init(int fd, struct drm_xe_engine_class_instance *hwe, > - struct xe_cork *cork); > -bool xe_cork_started(struct xe_cork *cork); > -void xe_cork_wait_started(struct xe_cork *cork); > -void xe_cork_end(struct xe_cork *cork); > -void xe_cork_wait_done(struct xe_cork *cork); > -void xe_cork_fini(struct xe_cork *cork); > -uint32_t xe_cork_sync_handle(struct xe_cork *cork); > +void xe_cork_sync_start(int fd, struct xe_cork *ctx, struct xe_cork_opts *opts); > +void xe_cork_sync_end(int fd, struct xe_cork *ctx, struct xe_cork_opts *opts); > +#define xe_cork_sync_start_opts(fd, ctx, ...) \ > + xe_cork_sync_start(fd, ctx, &((struct xe_cork_opts){__VA_ARGS__})) > +#define xe_cork_sync_end_opts(fd, ctx, ...) \ > + xe_cork_sync_end(fd, ctx, &((struct xe_cork_opts){__VA_ARGS__})) > > #endif /* XE_SPIN_H */ > diff --git a/tests/intel/xe_drm_fdinfo.c b/tests/intel/xe_drm_fdinfo.c > index ef9273e2a..3111d1f6f 100644 > --- a/tests/intel/xe_drm_fdinfo.c > +++ b/tests/intel/xe_drm_fdinfo.c > @@ -367,133 +367,6 @@ static void basic_engine_utilization(int xe) > igt_require(info.num_engines); > } > > -struct spin_ctx { > - uint32_t vm; > - uint64_t addr[XE_MAX_ENGINE_INSTANCE]; > - struct drm_xe_sync sync[2]; > - struct drm_xe_exec exec; > - uint32_t exec_queue; > - size_t bo_size; > - uint32_t bo; > - struct xe_spin *spin; > - struct xe_spin_opts spin_opts; > - bool ended; > - uint16_t class; > - uint16_t width; > - uint16_t num_placements; > -}; > - > -static struct spin_ctx * > -spin_ctx_init(int fd, struct drm_xe_engine_class_instance *hwe, uint32_t vm, > - uint16_t width, uint16_t num_placements) > -{ > - struct spin_ctx *ctx = calloc(1, sizeof(*ctx)); > - > - igt_assert(width && num_placements && > - (width == 1 || num_placements == 1)); > - igt_assert_lt(width, XE_MAX_ENGINE_INSTANCE); > - > - ctx->class = hwe->engine_class; > - ctx->width = width; > - ctx->num_placements = num_placements; > - ctx->vm = vm; > - > - for (unsigned int i = 0; i < width; i++) > - ctx->addr[i] = 0x100000 + 0x100000 * hwe->engine_class; > - > - ctx->exec.num_batch_buffer = width; > - ctx->exec.num_syncs = 2; > - ctx->exec.syncs = to_user_pointer(ctx->sync); > - > - ctx->sync[0].type = DRM_XE_SYNC_TYPE_SYNCOBJ; > - ctx->sync[0].flags = DRM_XE_SYNC_FLAG_SIGNAL; > - ctx->sync[0].handle = syncobj_create(fd, 0); > - > - ctx->sync[1].type = DRM_XE_SYNC_TYPE_SYNCOBJ; > - ctx->sync[1].flags = DRM_XE_SYNC_FLAG_SIGNAL; > - ctx->sync[1].handle = syncobj_create(fd, 0); > - > - ctx->bo_size = sizeof(struct xe_spin); > - ctx->bo_size = xe_bb_size(fd, ctx->bo_size); > - ctx->bo = xe_bo_create(fd, ctx->vm, ctx->bo_size, > - vram_if_possible(fd, hwe->gt_id), > - DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM); > - ctx->spin = xe_bo_map(fd, ctx->bo, ctx->bo_size); > - > - igt_assert_eq(__xe_exec_queue_create(fd, ctx->vm, width, num_placements, > - hwe, 0, &ctx->exec_queue), 0); > - > - xe_vm_bind_async(fd, ctx->vm, 0, ctx->bo, 0, ctx->addr[0], ctx->bo_size, > - ctx->sync, 1); > - > - return ctx; > -} > - > -static void > -spin_sync_start(int fd, struct spin_ctx *ctx) > -{ > - if (!ctx) > - return; > - > - ctx->spin_opts.addr = ctx->addr[0]; > - ctx->spin_opts.write_timestamp = true; > - ctx->spin_opts.preempt = true; > - xe_spin_init(ctx->spin, &ctx->spin_opts); > - > - /* re-use sync[0] for exec */ > - ctx->sync[0].flags &= ~DRM_XE_SYNC_FLAG_SIGNAL; > - > - ctx->exec.exec_queue_id = ctx->exec_queue; > - > - if (ctx->width > 1) > - ctx->exec.address = to_user_pointer(ctx->addr); > - else > - ctx->exec.address = ctx->addr[0]; > - > - xe_exec(fd, &ctx->exec); > - > - xe_spin_wait_started(ctx->spin); > - igt_assert(!syncobj_wait(fd, &ctx->sync[1].handle, 1, 1, 0, NULL)); > - > - igt_debug("%s: spinner started\n", engine_map[ctx->class]); > -} > - > -static void > -spin_sync_end(int fd, struct spin_ctx *ctx) > -{ > - if (!ctx || ctx->ended) > - return; > - > - xe_spin_end(ctx->spin); > - > - igt_assert(syncobj_wait(fd, &ctx->sync[1].handle, 1, INT64_MAX, 0, NULL)); > - igt_assert(syncobj_wait(fd, &ctx->sync[0].handle, 1, INT64_MAX, 0, NULL)); > - > - ctx->sync[0].flags |= DRM_XE_SYNC_FLAG_SIGNAL; > - xe_vm_unbind_async(fd, ctx->vm, 0, 0, ctx->addr[0], ctx->bo_size, ctx->sync, 1); > - igt_assert(syncobj_wait(fd, &ctx->sync[0].handle, 1, INT64_MAX, 0, NULL)); > - > - ctx->ended = true; > - igt_debug("%s: spinner ended (timestamp=%u)\n", engine_map[ctx->class], > - ctx->spin->timestamp); > -} > - > -static void > -spin_ctx_destroy(int fd, struct spin_ctx *ctx) > -{ > - if (!ctx) > - return; > - > - syncobj_destroy(fd, ctx->sync[0].handle); > - syncobj_destroy(fd, ctx->sync[1].handle); > - xe_exec_queue_destroy(fd, ctx->exec_queue); > - > - munmap(ctx->spin, ctx->bo_size); > - gem_close(fd, ctx->bo); > - > - free(ctx); > -} > - > static void > check_results(struct pceu_cycles *s1, struct pceu_cycles *s2, > int class, int width, enum expected_load expected_load) > @@ -535,7 +408,7 @@ utilization_single(int fd, struct drm_xe_engine_class_instance *hwe, unsigned in > { > struct pceu_cycles pceu1[2][DRM_XE_ENGINE_CLASS_COMPUTE + 1]; > struct pceu_cycles pceu2[2][DRM_XE_ENGINE_CLASS_COMPUTE + 1]; > - struct spin_ctx *ctx = NULL; > + struct xe_cork *ctx = NULL; > enum expected_load expected_load; > uint32_t vm; > int new_fd; > @@ -545,8 +418,8 @@ utilization_single(int fd, struct drm_xe_engine_class_instance *hwe, unsigned in > > vm = xe_vm_create(fd, 0, 0); > if (flags & TEST_BUSY) { > - ctx = spin_ctx_init(fd, hwe, vm, 1, 1); > - spin_sync_start(fd, ctx); > + ctx = xe_cork_create_opts(fd, hwe, vm, 1, 1); > + xe_cork_sync_start_opts(fd, ctx); > } > > read_engine_cycles(fd, pceu1[0]); > @@ -555,7 +428,7 @@ utilization_single(int fd, struct drm_xe_engine_class_instance *hwe, unsigned in > > usleep(batch_duration_usec); > if (flags & TEST_TRAILING_IDLE) > - spin_sync_end(fd, ctx); > + xe_cork_sync_end_opts(fd, ctx); > > read_engine_cycles(fd, pceu2[0]); > if (flags & TEST_ISOLATION) > @@ -574,8 +447,8 @@ utilization_single(int fd, struct drm_xe_engine_class_instance *hwe, unsigned in > close(new_fd); > } > > - spin_sync_end(fd, ctx); > - spin_ctx_destroy(fd, ctx); > + xe_cork_sync_end_opts(fd, ctx); > + xe_cork_destroy(fd, ctx); > xe_vm_destroy(fd, vm); > } > > @@ -584,19 +457,19 @@ utilization_single_destroy_queue(int fd, struct drm_xe_engine_class_instance *hw > { > struct pceu_cycles pceu1[DRM_XE_ENGINE_CLASS_COMPUTE + 1]; > struct pceu_cycles pceu2[DRM_XE_ENGINE_CLASS_COMPUTE + 1]; > - struct spin_ctx *ctx = NULL; > + struct xe_cork *ctx = NULL; > uint32_t vm; > > vm = xe_vm_create(fd, 0, 0); > - ctx = spin_ctx_init(fd, hwe, vm, 1, 1); > - spin_sync_start(fd, ctx); > + ctx = xe_cork_create_opts(fd, hwe, vm, 1, 1); > + xe_cork_sync_start_opts(fd, ctx); > > read_engine_cycles(fd, pceu1); > usleep(batch_duration_usec); > > /* destroy queue before sampling again */ > - spin_sync_end(fd, ctx); > - spin_ctx_destroy(fd, ctx); > + xe_cork_sync_end_opts(fd, ctx); > + xe_cork_destroy(fd, ctx); > > read_engine_cycles(fd, pceu2); > > @@ -610,18 +483,17 @@ utilization_others_idle(int fd, struct drm_xe_engine_class_instance *hwe) > { > struct pceu_cycles pceu1[DRM_XE_ENGINE_CLASS_COMPUTE + 1]; > struct pceu_cycles pceu2[DRM_XE_ENGINE_CLASS_COMPUTE + 1]; > - struct spin_ctx *ctx = NULL; > + struct xe_cork *ctx = NULL; > uint32_t vm; > int class; > > vm = xe_vm_create(fd, 0, 0); > - > - ctx = spin_ctx_init(fd, hwe, vm, 1, 1); > - spin_sync_start(fd, ctx); > + ctx = xe_cork_create_opts(fd, hwe, vm, 1, 1); > + xe_cork_sync_start_opts(fd, ctx); > > read_engine_cycles(fd, pceu1); > usleep(batch_duration_usec); > - spin_sync_end(fd, ctx); > + xe_cork_sync_end_opts(fd, ctx); > read_engine_cycles(fd, pceu2); > > xe_for_each_engine_class(class) { > @@ -631,8 +503,8 @@ utilization_others_idle(int fd, struct drm_xe_engine_class_instance *hwe) > check_results(pceu1, pceu2, class, 1, expected_load); > } > > - spin_sync_end(fd, ctx); > - spin_ctx_destroy(fd, ctx); > + xe_cork_sync_end_opts(fd, ctx); > + xe_cork_destroy(fd, ctx); > xe_vm_destroy(fd, vm); > } > > @@ -641,7 +513,7 @@ utilization_others_full_load(int fd, struct drm_xe_engine_class_instance *hwe) > { > struct pceu_cycles pceu1[DRM_XE_ENGINE_CLASS_COMPUTE + 1]; > struct pceu_cycles pceu2[DRM_XE_ENGINE_CLASS_COMPUTE + 1]; > - struct spin_ctx *ctx[DRM_XE_ENGINE_CLASS_COMPUTE + 1] = {}; > + struct xe_cork *ctx[DRM_XE_ENGINE_CLASS_COMPUTE + 1] = {}; > struct drm_xe_engine_class_instance *_hwe; > uint32_t vm; > int class; > @@ -654,15 +526,14 @@ utilization_others_full_load(int fd, struct drm_xe_engine_class_instance *hwe) > > if (_class == hwe->engine_class || ctx[_class]) > continue; > - > - ctx[_class] = spin_ctx_init(fd, _hwe, vm, 1, 1); > - spin_sync_start(fd, ctx[_class]); > + ctx[_class] = xe_cork_create_opts(fd, _hwe, vm, 1, 1); > + xe_cork_sync_start_opts(fd, ctx[_class]); > } > > read_engine_cycles(fd, pceu1); > usleep(batch_duration_usec); > xe_for_each_engine_class(class) > - spin_sync_end(fd, ctx[class]); > + xe_cork_sync_end_opts(fd, ctx[class]); > read_engine_cycles(fd, pceu2); > > xe_for_each_engine_class(class) { > @@ -673,8 +544,8 @@ utilization_others_full_load(int fd, struct drm_xe_engine_class_instance *hwe) > continue; > > check_results(pceu1, pceu2, class, 1, expected_load); > - spin_sync_end(fd, ctx[class]); > - spin_ctx_destroy(fd, ctx[class]); > + xe_cork_sync_end_opts(fd, ctx[class]); > + xe_cork_destroy(fd, ctx[class]); > } > > xe_vm_destroy(fd, vm); > @@ -685,7 +556,7 @@ utilization_all_full_load(int fd) > { > struct pceu_cycles pceu1[DRM_XE_ENGINE_CLASS_COMPUTE + 1]; > struct pceu_cycles pceu2[DRM_XE_ENGINE_CLASS_COMPUTE + 1]; > - struct spin_ctx *ctx[DRM_XE_ENGINE_CLASS_COMPUTE + 1] = {}; > + struct xe_cork *ctx[DRM_XE_ENGINE_CLASS_COMPUTE + 1] = {}; > struct drm_xe_engine_class_instance *hwe; > uint32_t vm; > int class; > @@ -697,15 +568,14 @@ utilization_all_full_load(int fd) > class = hwe->engine_class; > if (ctx[class]) > continue; > - > - ctx[class] = spin_ctx_init(fd, hwe, vm, 1, 1); > - spin_sync_start(fd, ctx[class]); > + ctx[class] = xe_cork_create_opts(fd, hwe, vm, 1, 1); > + xe_cork_sync_start_opts(fd, ctx[class]); > } > > read_engine_cycles(fd, pceu1); > usleep(batch_duration_usec); > xe_for_each_engine_class(class) > - spin_sync_end(fd, ctx[class]); > + xe_cork_sync_end_opts(fd, ctx[class]); > read_engine_cycles(fd, pceu2); > > xe_for_each_engine_class(class) { > @@ -713,8 +583,8 @@ utilization_all_full_load(int fd) > continue; > > check_results(pceu1, pceu2, class, 1, EXPECTED_LOAD_FULL); > - spin_sync_end(fd, ctx[class]); > - spin_ctx_destroy(fd, ctx[class]); > + xe_cork_sync_end_opts(fd, ctx[class]); > + xe_cork_destroy(fd, ctx[class]); > } > > xe_vm_destroy(fd, vm); > @@ -741,7 +611,7 @@ utilization_multi(int fd, int gt, int class, unsigned int flags) > struct pceu_cycles pceu[2][DRM_XE_ENGINE_CLASS_COMPUTE + 1]; > struct pceu_cycles pceu_spill[2][DRM_XE_ENGINE_CLASS_COMPUTE + 1]; > struct drm_xe_engine_class_instance eci[XE_MAX_ENGINE_INSTANCE]; > - struct spin_ctx *ctx = NULL; > + struct xe_cork *ctx = NULL; > enum expected_load expected_load; > int fd_spill, num_placements; > uint32_t vm; > @@ -767,8 +637,8 @@ utilization_multi(int fd, int gt, int class, unsigned int flags) > > vm = xe_vm_create(fd, 0, 0); > if (flags & TEST_BUSY) { > - ctx = spin_ctx_init(fd, eci, vm, width, num_placements); > - spin_sync_start(fd, ctx); > + ctx = xe_cork_create_opts(fd, eci, vm, width, num_placements); > + xe_cork_sync_start_opts(fd, ctx); > } > > read_engine_cycles(fd, pceu[0]); > @@ -777,7 +647,7 @@ utilization_multi(int fd, int gt, int class, unsigned int flags) > > usleep(batch_duration_usec); > if (flags & TEST_TRAILING_IDLE) > - spin_sync_end(fd, ctx); > + xe_cork_sync_end_opts(fd, ctx); > > read_engine_cycles(fd, pceu[1]); > if (flags & TEST_ISOLATION) > @@ -797,8 +667,8 @@ utilization_multi(int fd, int gt, int class, unsigned int flags) > close(fd_spill); > } > > - spin_sync_end(fd, ctx); > - spin_ctx_destroy(fd, ctx); > + xe_cork_sync_end_opts(fd, ctx); > + xe_cork_destroy(fd, ctx); > > xe_vm_destroy(fd, vm); > } > diff --git a/tests/intel/xe_vm.c b/tests/intel/xe_vm.c > index e78ddd0e5..77c02c488 100644 > --- a/tests/intel/xe_vm.c > +++ b/tests/intel/xe_vm.c > @@ -945,18 +945,23 @@ test_bind_array(int fd, struct drm_xe_engine_class_instance *eci, int n_execs, > > sync[0].handle = syncobj_create(fd, 0); > if (flags & BIND_ARRAY_ENOBUFS_FLAG) { > - struct xe_cork cork; > + struct xe_cork *ctx = NULL; > + uint32_t vm_cork; > > - xe_cork_init(fd, eci, &cork); > + vm_cork = xe_vm_create(fd, 0, 0); > + ctx = xe_cork_create_opts(fd, eci, vm_cork, 1, 1); > + xe_cork_sync_start_opts(fd, ctx, .debug = true); > > - sync[1].handle = xe_cork_sync_handle(&cork); > + sync[1].handle = ctx->sync[1].handle; > sync[1].flags &= ~DRM_XE_SYNC_FLAG_SIGNAL; > > xe_vm_bind_array_err(fd, vm, bind_exec_queue, bind_ops, > n_execs, sync, 2, ENOBUFS); > - xe_cork_end(&cork); > - xe_cork_wait_done(&cork); > - xe_cork_fini(&cork); > + /* destroy queue before sampling again */ > + xe_cork_sync_end_opts(fd, ctx, .debug = true); > + xe_cork_destroy(fd, ctx); > + xe_vm_destroy(fd, vm_cork); > + > n_execs = n_execs / 4; > } > > -- > 2.34.1 > ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v5 1/2] lib/xe/xe_spin: move the spinner related functions to lib 2024-12-06 11:10 ` [PATCH v5 1/2] lib/xe/xe_spin: move the spinner related functions to lib Pravalika Gurram 2024-12-10 8:10 ` Zbigniew Kempczyński @ 2024-12-10 11:12 ` Kamil Konieczny 1 sibling, 0 replies; 8+ messages in thread From: Kamil Konieczny @ 2024-12-10 11:12 UTC (permalink / raw) To: Pravalika Gurram; +Cc: igt-dev, zbigniew.kempczynski Hi Pravalika, On 2024-12-06 at 16:40:31 +0530, Pravalika Gurram wrote: > move spin_ctx_init,spin_ctx_start,spin_ctx_end,spin_ctx_destroy > to xe spin lib to avoid code redundancy. > removed xe_cork* functions to avoid duplicate spinner code. > > Signed-off-by: Pravalika Gurram <pravalika.gurram@intel.com> > --- > lib/xe/xe_spin.c | 160 +++++++++++++++++++---------- > lib/xe/xe_spin.h | 56 ++++++---- > tests/intel/xe_drm_fdinfo.c | 200 +++++++----------------------------- > tests/intel/xe_vm.c | 17 +-- > 4 files changed, 188 insertions(+), 245 deletions(-) > > diff --git a/lib/xe/xe_spin.c b/lib/xe/xe_spin.c > index 3adacc3a8..f9b18dfc0 100644 > --- a/lib/xe/xe_spin.c > +++ b/lib/xe/xe_spin.c > @@ -292,77 +292,125 @@ void xe_spin_free(int fd, struct igt_spin *spin) > free(spin); > } > > -void xe_cork_init(int fd, struct drm_xe_engine_class_instance *hwe, > - struct xe_cork *cork) > +struct xe_cork * > +xe_cork_create(int fd, struct drm_xe_engine_class_instance *hwe, > + uint32_t vm, uint16_t width, uint16_t num_placements, > + struct xe_cork_opts *opts) While you changed public library functions definitions please also add descriptions to all, see for example lib/drmtest.c or lib/xe/xe_gt.c Regards, Kamil > { > - uint64_t addr = xe_get_default_alignment(fd); > - size_t bo_size = xe_bb_size(fd, SZ_4K); > - uint32_t vm, bo, exec_queue, syncobj; ...cut... ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v5 2/2] tests/xe_spin_batch: Add spin-timestamp-check 2024-12-06 11:10 [PATCH v5 0/2] tests/xe_spin_batch: Add spin-timestamp-check Pravalika Gurram 2024-12-06 11:10 ` [PATCH v5 1/2] lib/xe/xe_spin: move the spinner related functions to lib Pravalika Gurram @ 2024-12-06 11:10 ` Pravalika Gurram 2024-12-09 20:52 ` ✓ Xe.CI.BAT: success for tests/xe_spin_batch: Add spin-timestamp-check (rev6) Patchwork ` (2 subsequent siblings) 4 siblings, 0 replies; 8+ messages in thread From: Pravalika Gurram @ 2024-12-06 11:10 UTC (permalink / raw) To: igt-dev; +Cc: zbigniew.kempczynski, Pravalika Gurram check the ctx_timestamp register post gt reset for each engine. Signed-off-by: Pravalika Gurram <pravalika.gurram@intel.com> --- tests/intel/xe_spin_batch.c | 121 ++++++++++++++++++++++++++++++++++++ 1 file changed, 121 insertions(+) diff --git a/tests/intel/xe_spin_batch.c b/tests/intel/xe_spin_batch.c index 9314e229e..c34f48d05 100644 --- a/tests/intel/xe_spin_batch.c +++ b/tests/intel/xe_spin_batch.c @@ -309,6 +309,121 @@ static void xe_spin_fixed_duration(int fd, int gt, int class, int flags) put_ahnd(ahnd); } +static void exec_store(int fd, struct drm_xe_engine_class_instance *eci, + bool hang) +{ + uint64_t ahnd, bb_size, bb_addr; + uint32_t vm, exec_queue, bb; +#define USER_FENCE_VALUE 0xdeadbeefdeadbeefull + struct drm_xe_sync syncobj = { + .type = DRM_XE_SYNC_TYPE_USER_FENCE, + .flags = DRM_XE_SYNC_FLAG_SIGNAL, + .timeline_value = USER_FENCE_VALUE, + }; + + struct drm_xe_exec exec = { + .num_batch_buffer = 1, + .num_syncs = 1, + .syncs = to_user_pointer(&syncobj), + }; + struct { + uint32_t batch[16]; + uint64_t pad; + uint32_t data; + uint64_t vm_sync; + uint64_t exec_sync; + } *data; + uint64_t batch_offset, batch_addr, sdi_offset, sdi_addr; + int64_t timeout = NSEC_PER_SEC; + int i, ret; + + ahnd = intel_allocator_open(fd, 0, INTEL_ALLOCATOR_RELOC); + + vm = xe_vm_create(fd, 0, 0); + exec_queue = xe_exec_queue_create(fd, vm, eci, 0); + bb_size = xe_bb_size(fd, sizeof(*data)); + bb = xe_bo_create(fd, vm, bb_size, vram_if_possible(fd, eci->gt_id), 0); + bb_addr = intel_allocator_alloc_with_strategy(ahnd, bb, bb_size, 0, + ALLOC_STRATEGY_LOW_TO_HIGH); + data = xe_bo_map(fd, bb, bb_size); + syncobj.addr = to_user_pointer(&data->vm_sync); + xe_vm_bind_async(fd, vm, 0, bb, 0, bb_addr, bb_size, &syncobj, 1); + xe_wait_ufence(fd, &data->vm_sync, USER_FENCE_VALUE, 0, NSEC_PER_SEC); + + batch_offset = (char *)&data->batch - (char *)data; + batch_addr = bb_addr + batch_offset; + sdi_offset = (char *)&data->data - (char *)data; + sdi_addr = bb_addr + sdi_offset; + + i = 0; + + data->batch[i++] = MI_STORE_DWORD_IMM_GEN4; + data->batch[i++] = sdi_addr; + data->batch[i++] = sdi_addr >> 32; + data->batch[i++] = 0; + if (!hang) + data->batch[i++] = MI_BATCH_BUFFER_END; + igt_assert(i <= ARRAY_SIZE(data->batch)); + + syncobj.addr = bb_addr + (char *)&data->exec_sync - (char *)data; + exec.exec_queue_id = exec_queue; + exec.address = batch_addr; + xe_exec(fd, &exec); + ret = __xe_wait_ufence(fd, &data->exec_sync, USER_FENCE_VALUE, 0, &timeout); + igt_assert(hang ? ret < 0 : ret == 0); + + munmap(data, bb_size); + gem_close(fd, bb); + + xe_exec_queue_destroy(fd, exec_queue); + xe_vm_destroy(fd, vm); + + put_ahnd(ahnd); +} + +static void run_spinner(int fd, struct drm_xe_engine_class_instance *eci) +{ + struct xe_cork *ctx = NULL; + uint32_t vm; + uint32_t ts_1, ts_2; + uint64_t ahnd; + + vm = xe_vm_create(fd, 0, 0); + ahnd = intel_allocator_open(fd, 0, INTEL_ALLOCATOR_RELOC); + ctx = xe_cork_create_opts(fd, eci, vm, 1, 1, .ahnd = ahnd); + xe_cork_sync_start_opts(fd, ctx); + + /* Collect and check timestamps before stopping the spinner */ + usleep(50000); + ts_1 = READ_ONCE(ctx->spin->timestamp); + usleep(50000); + ts_2 = READ_ONCE(ctx->spin->timestamp); + igt_assert_neq_u32(ts_1, ts_2); + + xe_cork_sync_end_opts(fd, ctx); + xe_cork_destroy(fd, ctx); + + xe_vm_destroy(fd, vm); + put_ahnd(ahnd); +} + +#define TRUE 1 +#define FALSE 0 +/** + * SUBTEST: spin-timestamp-check + * Description: Intiate gt reset then check the timestamp register for each engine. + * Test category: functionality test + */ +static void xe_spin_timestamp_check(int fd, struct drm_xe_engine_class_instance *eci) +{ + /*sanity check for exec submission*/ + exec_store(fd, eci, FALSE); + + exec_store(fd, eci, TRUE); + + run_spinner(fd, eci); +} + igt_main { struct drm_xe_engine_class_instance *hwe; @@ -343,6 +458,12 @@ igt_main xe_for_each_engine_class(class) xe_spin_fixed_duration(fd, gt, class, SPIN_FIX_DURATION_PREEMPT); + igt_subtest_with_dynamic("spin-timestamp-check") + xe_for_each_engine(fd, hwe) { + igt_dynamic_f("engine-%s", xe_engine_class_string(hwe->engine_class)) + xe_spin_timestamp_check(fd, hwe); + } + igt_fixture drm_close_driver(fd); } -- 2.34.1 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* ✓ Xe.CI.BAT: success for tests/xe_spin_batch: Add spin-timestamp-check (rev6) 2024-12-06 11:10 [PATCH v5 0/2] tests/xe_spin_batch: Add spin-timestamp-check Pravalika Gurram 2024-12-06 11:10 ` [PATCH v5 1/2] lib/xe/xe_spin: move the spinner related functions to lib Pravalika Gurram 2024-12-06 11:10 ` [PATCH v5 2/2] tests/xe_spin_batch: Add spin-timestamp-check Pravalika Gurram @ 2024-12-09 20:52 ` Patchwork 2024-12-09 21:02 ` ✗ i915.CI.BAT: failure " Patchwork 2024-12-09 21:59 ` ✗ Xe.CI.Full: " Patchwork 4 siblings, 0 replies; 8+ messages in thread From: Patchwork @ 2024-12-09 20:52 UTC (permalink / raw) To: Gurram, Pravalika; +Cc: igt-dev [-- Attachment #1: Type: text/plain, Size: 871 bytes --] == Series Details == Series: tests/xe_spin_batch: Add spin-timestamp-check (rev6) URL : https://patchwork.freedesktop.org/series/140933/ State : success == Summary == CI Bug Log - changes from XEIGT_8145_BAT -> XEIGTPW_12276_BAT ==================================================== Summary ------- **SUCCESS** No regressions found. Participating hosts (7 -> 7) ------------------------------ No changes in participating hosts Changes ------- No changes found Build changes ------------- * IGT: IGT_8145 -> IGTPW_12276 IGTPW_12276: 12276 IGT_8145: 9ecc5cadf47dc934af126a6b34653b860974b9f1 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git xe-2340-9d12021e081c72b18c31bda175fb9a43f1d005fc: 9d12021e081c72b18c31bda175fb9a43f1d005fc == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/index.html [-- Attachment #2: Type: text/html, Size: 1416 bytes --] ^ permalink raw reply [flat|nested] 8+ messages in thread
* ✗ i915.CI.BAT: failure for tests/xe_spin_batch: Add spin-timestamp-check (rev6) 2024-12-06 11:10 [PATCH v5 0/2] tests/xe_spin_batch: Add spin-timestamp-check Pravalika Gurram ` (2 preceding siblings ...) 2024-12-09 20:52 ` ✓ Xe.CI.BAT: success for tests/xe_spin_batch: Add spin-timestamp-check (rev6) Patchwork @ 2024-12-09 21:02 ` Patchwork 2024-12-09 21:59 ` ✗ Xe.CI.Full: " Patchwork 4 siblings, 0 replies; 8+ messages in thread From: Patchwork @ 2024-12-09 21:02 UTC (permalink / raw) To: Gurram, Pravalika; +Cc: igt-dev == Series Details == Series: tests/xe_spin_batch: Add spin-timestamp-check (rev6) URL : https://patchwork.freedesktop.org/series/140933/ State : failure == Summary == CI Bug Log - changes from IGT_8145 -> IGTPW_12276 ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with IGTPW_12276 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in IGTPW_12276, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12276/index.html Participating hosts (45 -> 44) ------------------------------ Missing (1): fi-snb-2520m Possible new issues ------------------- Here are the unknown changes that may have been introduced in IGTPW_12276: ### IGT changes ### #### Possible regressions #### * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-xr24@pipe-c-dp-1: - bat-apl-1: [PASS][1] -> [DMESG-WARN][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8145/bat-apl-1/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-xr24@pipe-c-dp-1.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12276/bat-apl-1/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-xr24@pipe-c-dp-1.html #### Suppressed #### The following results come from untrusted machines, tests, or statuses. They do not affect the overall result. * igt@gem_close_race@basic-process: - {bat-mtlp-9}: [PASS][3] -> [DMESG-WARN][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8145/bat-mtlp-9/igt@gem_close_race@basic-process.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12276/bat-mtlp-9/igt@gem_close_race@basic-process.html * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence: - {bat-mtlp-9}: [PASS][5] -> [FAIL][6] +3 other tests fail [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8145/bat-mtlp-9/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12276/bat-mtlp-9/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html Known issues ------------ Here are the changes found in IGTPW_12276 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@i915_selftest@live: - bat-jsl-1: [PASS][7] -> [DMESG-FAIL][8] ([i915#13132]) +1 other test dmesg-fail [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8145/bat-jsl-1/igt@i915_selftest@live.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12276/bat-jsl-1/igt@i915_selftest@live.html - bat-arls-5: NOTRUN -> [ABORT][9] ([i915#12061]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12276/bat-arls-5/igt@i915_selftest@live.html * igt@i915_selftest@live@workarounds: - bat-arls-5: [PASS][10] -> [ABORT][11] ([i915#12061]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8145/bat-arls-5/igt@i915_selftest@live@workarounds.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12276/bat-arls-5/igt@i915_selftest@live@workarounds.html * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-xr24: - bat-apl-1: [PASS][12] -> [DMESG-WARN][13] ([i915#12921]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8145/bat-apl-1/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-xr24.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12276/bat-apl-1/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-xr24.html * igt@kms_pipe_crc_basic@read-crc-frame-sequence: - bat-dg2-11: [PASS][14] -> [SKIP][15] ([i915#9197]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8145/bat-dg2-11/igt@kms_pipe_crc_basic@read-crc-frame-sequence.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12276/bat-dg2-11/igt@kms_pipe_crc_basic@read-crc-frame-sequence.html #### Possible fixes #### * igt@i915_module_load@load: - bat-twl-1: [DMESG-WARN][16] ([i915#1982]) -> [PASS][17] [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8145/bat-twl-1/igt@i915_module_load@load.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12276/bat-twl-1/igt@i915_module_load@load.html * igt@i915_selftest@live@workarounds: - bat-arlh-3: [ABORT][18] ([i915#12061]) -> [PASS][19] +1 other test pass [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8145/bat-arlh-3/igt@i915_selftest@live@workarounds.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12276/bat-arlh-3/igt@i915_selftest@live@workarounds.html * igt@kms_flip@basic-flip-vs-dpms@d-edp1: - {bat-mtlp-9}: [DMESG-WARN][20] -> [PASS][21] [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8145/bat-mtlp-9/igt@kms_flip@basic-flip-vs-dpms@d-edp1.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12276/bat-mtlp-9/igt@kms_flip@basic-flip-vs-dpms@d-edp1.html * igt@kms_flip@basic-flip-vs-modeset: - fi-kbl-7567u: [DMESG-WARN][22] ([i915#12926]) -> [PASS][23] [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8145/fi-kbl-7567u/igt@kms_flip@basic-flip-vs-modeset.html [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12276/fi-kbl-7567u/igt@kms_flip@basic-flip-vs-modeset.html * igt@kms_flip@basic-flip-vs-modeset@a-dp1: - fi-kbl-7567u: [DMESG-WARN][24] -> [PASS][25] [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8145/fi-kbl-7567u/igt@kms_flip@basic-flip-vs-modeset@a-dp1.html [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12276/fi-kbl-7567u/igt@kms_flip@basic-flip-vs-modeset@a-dp1.html * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-xr24@pipe-b-edp-1: - {bat-mtlp-9}: [FAIL][26] -> [PASS][27] +3 other tests pass [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8145/bat-mtlp-9/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-xr24@pipe-b-edp-1.html [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12276/bat-mtlp-9/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-xr24@pipe-b-edp-1.html * igt@kms_pipe_crc_basic@hang-read-crc@pipe-b-edp-1: - {bat-mtlp-9}: [DMESG-WARN][28] ([i915#12695]) -> [PASS][29] +8 other tests pass [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8145/bat-mtlp-9/igt@kms_pipe_crc_basic@hang-read-crc@pipe-b-edp-1.html [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12276/bat-mtlp-9/igt@kms_pipe_crc_basic@hang-read-crc@pipe-b-edp-1.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061 [i915#12695]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12695 [i915#12921]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12921 [i915#12926]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12926 [i915#13132]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13132 [i915#1982]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1982 [i915#9197]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9197 Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_8145 -> IGTPW_12276 CI-20190529: 20190529 CI_DRM_15808: 9d12021e081c72b18c31bda175fb9a43f1d005fc @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_12276: 12276 IGT_8145: 9ecc5cadf47dc934af126a6b34653b860974b9f1 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12276/index.html ^ permalink raw reply [flat|nested] 8+ messages in thread
* ✗ Xe.CI.Full: failure for tests/xe_spin_batch: Add spin-timestamp-check (rev6) 2024-12-06 11:10 [PATCH v5 0/2] tests/xe_spin_batch: Add spin-timestamp-check Pravalika Gurram ` (3 preceding siblings ...) 2024-12-09 21:02 ` ✗ i915.CI.BAT: failure " Patchwork @ 2024-12-09 21:59 ` Patchwork 4 siblings, 0 replies; 8+ messages in thread From: Patchwork @ 2024-12-09 21:59 UTC (permalink / raw) To: Gurram, Pravalika; +Cc: igt-dev [-- Attachment #1: Type: text/plain, Size: 83021 bytes --] == Series Details == Series: tests/xe_spin_batch: Add spin-timestamp-check (rev6) URL : https://patchwork.freedesktop.org/series/140933/ State : failure == Summary == CI Bug Log - changes from XEIGT_8145_full -> XEIGTPW_12276_full ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with XEIGTPW_12276_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in XEIGTPW_12276_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (4 -> 4) ------------------------------ No changes in participating hosts Possible new issues ------------------- Here are the unknown changes that may have been introduced in XEIGTPW_12276_full: ### IGT changes ### #### Possible regressions #### * igt@kms_async_flips@crc@pipe-a-hdmi-a-3: - shard-bmg: NOTRUN -> [INCOMPLETE][1] [1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-5/igt@kms_async_flips@crc@pipe-a-hdmi-a-3.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-dp2: - shard-bmg: [PASS][2] -> [FAIL][3] [2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-7/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-dp2.html [3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-4/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-dp2.html * igt@xe_intel_bb@intel-bb-blit-x: - shard-bmg: NOTRUN -> [DMESG-WARN][4] +3 other tests dmesg-warn [4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-4/igt@xe_intel_bb@intel-bb-blit-x.html * igt@xe_vm@mmap-style-bind-many-either-side-partial-hammer: - shard-bmg: [PASS][5] -> [DMESG-WARN][6] +5 other tests dmesg-warn [5]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-8/igt@xe_vm@mmap-style-bind-many-either-side-partial-hammer.html [6]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-8/igt@xe_vm@mmap-style-bind-many-either-side-partial-hammer.html New tests --------- New tests have been introduced between XEIGT_8145_full and XEIGTPW_12276_full: ### New IGT tests (6) ### * igt@xe_spin_batch@spin-timestamp-check: - Statuses : 2 pass(s) - Exec time: [5.79, 8.04] s * igt@xe_spin_batch@spin-timestamp-check@engine-drm_xe_engine_class_compute: - Statuses : 2 pass(s) - Exec time: [1.15] s * igt@xe_spin_batch@spin-timestamp-check@engine-drm_xe_engine_class_copy: - Statuses : 2 pass(s) - Exec time: [1.15] s * igt@xe_spin_batch@spin-timestamp-check@engine-drm_xe_engine_class_render: - Statuses : 2 pass(s) - Exec time: [1.13, 1.18] s * igt@xe_spin_batch@spin-timestamp-check@engine-drm_xe_engine_class_video_decode: - Statuses : 2 pass(s) - Exec time: [1.15, 2.30] s * igt@xe_spin_batch@spin-timestamp-check@engine-drm_xe_engine_class_video_enhance: - Statuses : 2 pass(s) - Exec time: [1.15, 2.30] s Known issues ------------ Here are the changes found in XEIGTPW_12276_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@intel_hwmon@hwmon-write: - shard-lnl: NOTRUN -> [SKIP][7] ([Intel XE#1125]) [7]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-5/igt@intel_hwmon@hwmon-write.html * igt@kms_async_flips@alternate-sync-async-flip-atomic: - shard-bmg: NOTRUN -> [FAIL][8] ([Intel XE#3701] / [Intel XE#3718]) [8]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-2/igt@kms_async_flips@alternate-sync-async-flip-atomic.html * igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-d-dp-2: - shard-bmg: NOTRUN -> [FAIL][9] ([Intel XE#3746]) [9]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-2/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-d-dp-2.html * igt@kms_atomic_interruptible@universal-setplane-cursor: - shard-bmg: [PASS][10] -> [DMESG-WARN][11] ([Intel XE#1727] / [Intel XE#3468]) +6 other tests dmesg-warn [10]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-8/igt@kms_atomic_interruptible@universal-setplane-cursor.html [11]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-2/igt@kms_atomic_interruptible@universal-setplane-cursor.html * igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels: - shard-bmg: NOTRUN -> [SKIP][12] ([Intel XE#2370]) [12]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-1/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html * igt@kms_big_fb@4-tiled-16bpp-rotate-270: - shard-lnl: NOTRUN -> [SKIP][13] ([Intel XE#1407]) +6 other tests skip [13]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-3/igt@kms_big_fb@4-tiled-16bpp-rotate-270.html * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip: - shard-lnl: NOTRUN -> [SKIP][14] ([Intel XE#3658]) [14]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-1/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-async-flip: - shard-bmg: NOTRUN -> [DMESG-FAIL][15] ([Intel XE#3468]) +13 other tests dmesg-fail [15]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-1/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html * igt@kms_big_fb@linear-8bpp-rotate-90: - shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#2327]) +3 other tests skip [16]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-6/igt@kms_big_fb@linear-8bpp-rotate-90.html * igt@kms_big_fb@yf-tiled-16bpp-rotate-270: - shard-lnl: NOTRUN -> [SKIP][17] ([Intel XE#1124]) +13 other tests skip [17]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-1/igt@kms_big_fb@yf-tiled-16bpp-rotate-270.html * igt@kms_big_fb@yf-tiled-addfb: - shard-lnl: NOTRUN -> [SKIP][18] ([Intel XE#1467]) [18]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-7/igt@kms_big_fb@yf-tiled-addfb.html - shard-bmg: NOTRUN -> [SKIP][19] ([Intel XE#2328]) [19]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-6/igt@kms_big_fb@yf-tiled-addfb.html * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip: - shard-bmg: NOTRUN -> [SKIP][20] ([Intel XE#1124]) +10 other tests skip [20]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-7/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip.html * igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p: - shard-lnl: NOTRUN -> [SKIP][21] ([Intel XE#2191]) [21]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-1/igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p.html * igt@kms_bw@connected-linear-tiling-3-displays-3840x2160p: - shard-bmg: NOTRUN -> [SKIP][22] ([Intel XE#2314] / [Intel XE#2894]) [22]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-2/igt@kms_bw@connected-linear-tiling-3-displays-3840x2160p.html * igt@kms_bw@linear-tiling-1-displays-2160x1440p: - shard-bmg: NOTRUN -> [SKIP][23] ([Intel XE#367]) +2 other tests skip [23]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-7/igt@kms_bw@linear-tiling-1-displays-2160x1440p.html * igt@kms_bw@linear-tiling-2-displays-3840x2160p: - shard-lnl: NOTRUN -> [SKIP][24] ([Intel XE#367]) +1 other test skip [24]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-7/igt@kms_bw@linear-tiling-2-displays-3840x2160p.html * igt@kms_bw@linear-tiling-4-displays-2560x1440p: - shard-lnl: NOTRUN -> [SKIP][25] ([Intel XE#1512]) [25]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-6/igt@kms_bw@linear-tiling-4-displays-2560x1440p.html * igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs@pipe-a-edp-1: - shard-lnl: NOTRUN -> [SKIP][26] ([Intel XE#2669]) +3 other tests skip [26]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-7/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs@pipe-a-edp-1.html * igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs@pipe-d-hdmi-a-3: - shard-bmg: NOTRUN -> [SKIP][27] ([Intel XE#2652] / [Intel XE#787]) +4 other tests skip [27]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-6/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs@pipe-d-hdmi-a-3.html * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs: - shard-bmg: [PASS][28] -> [INCOMPLETE][29] ([Intel XE#3468]) +1 other test incomplete [28]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-4/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html [29]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-8/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs: - shard-bmg: NOTRUN -> [SKIP][30] ([Intel XE#3432]) +2 other tests skip [30]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-4/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html * igt@kms_ccs@crc-primary-suspend-y-tiled-ccs: - shard-lnl: NOTRUN -> [SKIP][31] ([Intel XE#3432]) +1 other test skip [31]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-5/igt@kms_ccs@crc-primary-suspend-y-tiled-ccs.html * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs: - shard-lnl: NOTRUN -> [SKIP][32] ([Intel XE#2887]) +18 other tests skip [32]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-8/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs.html * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs: - shard-bmg: NOTRUN -> [SKIP][33] ([Intel XE#2887]) +10 other tests skip [33]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-4/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs.html * igt@kms_chamelium_color@gamma: - shard-lnl: NOTRUN -> [SKIP][34] ([Intel XE#306]) +1 other test skip [34]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-1/igt@kms_chamelium_color@gamma.html - shard-bmg: NOTRUN -> [SKIP][35] ([Intel XE#2325]) [35]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-4/igt@kms_chamelium_color@gamma.html * igt@kms_chamelium_hpd@common-hpd-after-suspend: - shard-bmg: NOTRUN -> [SKIP][36] ([Intel XE#2252]) +10 other tests skip [36]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-6/igt@kms_chamelium_hpd@common-hpd-after-suspend.html * igt@kms_chamelium_hpd@vga-hpd-fast: - shard-lnl: NOTRUN -> [SKIP][37] ([Intel XE#373]) +14 other tests skip [37]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-3/igt@kms_chamelium_hpd@vga-hpd-fast.html * igt@kms_content_protection@atomic-dpms@pipe-a-dp-2: - shard-bmg: NOTRUN -> [FAIL][38] ([Intel XE#1178]) +1 other test fail [38]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-1/igt@kms_content_protection@atomic-dpms@pipe-a-dp-2.html * igt@kms_content_protection@legacy: - shard-lnl: NOTRUN -> [SKIP][39] ([Intel XE#3278]) [39]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-1/igt@kms_content_protection@legacy.html * igt@kms_content_protection@lic-type-0: - shard-bmg: NOTRUN -> [SKIP][40] ([Intel XE#2341]) [40]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-6/igt@kms_content_protection@lic-type-0.html * igt@kms_cursor_crc@cursor-offscreen-128x42: - shard-bmg: NOTRUN -> [SKIP][41] ([Intel XE#2320]) +6 other tests skip [41]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-7/igt@kms_cursor_crc@cursor-offscreen-128x42.html * igt@kms_cursor_crc@cursor-offscreen-512x170: - shard-lnl: NOTRUN -> [SKIP][42] ([Intel XE#2321]) +1 other test skip [42]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-7/igt@kms_cursor_crc@cursor-offscreen-512x170.html * igt@kms_cursor_crc@cursor-onscreen-128x128: - shard-bmg: [PASS][43] -> [DMESG-FAIL][44] ([Intel XE#3468]) +15 other tests dmesg-fail [43]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-4/igt@kms_cursor_crc@cursor-onscreen-128x128.html [44]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-8/igt@kms_cursor_crc@cursor-onscreen-128x128.html * igt@kms_cursor_crc@cursor-onscreen-512x512: - shard-bmg: NOTRUN -> [SKIP][45] ([Intel XE#2321]) [45]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-7/igt@kms_cursor_crc@cursor-onscreen-512x512.html * igt@kms_cursor_crc@cursor-rapid-movement-64x21: - shard-lnl: NOTRUN -> [SKIP][46] ([Intel XE#1424]) +7 other tests skip [46]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-8/igt@kms_cursor_crc@cursor-rapid-movement-64x21.html * igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic: - shard-lnl: NOTRUN -> [SKIP][47] ([Intel XE#309]) +7 other tests skip [47]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-2/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: - shard-lnl: NOTRUN -> [SKIP][48] ([Intel XE#323]) [48]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-8/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html - shard-bmg: NOTRUN -> [SKIP][49] ([Intel XE#2286]) [49]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-6/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size: - shard-bmg: NOTRUN -> [SKIP][50] ([Intel XE#2291]) +1 other test skip [50]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-4/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html * igt@kms_cursor_legacy@cursorb-vs-flipb-toggle: - shard-bmg: [PASS][51] -> [SKIP][52] ([Intel XE#2291]) +4 other tests skip [51]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-3/igt@kms_cursor_legacy@cursorb-vs-flipb-toggle.html [52]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-5/igt@kms_cursor_legacy@cursorb-vs-flipb-toggle.html * igt@kms_cursor_legacy@single-bo: - shard-bmg: [PASS][53] -> [DMESG-WARN][54] ([Intel XE#877]) +1 other test dmesg-warn [53]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-4/igt@kms_cursor_legacy@single-bo.html [54]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-1/igt@kms_cursor_legacy@single-bo.html * igt@kms_dirtyfb@psr-dirtyfb-ioctl: - shard-bmg: NOTRUN -> [SKIP][55] ([Intel XE#1508]) +1 other test skip [55]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-6/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html * igt@kms_dp_linktrain_fallback@dp-fallback: - shard-bmg: [PASS][56] -> [SKIP][57] ([Intel XE#3070]) [56]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-1/igt@kms_dp_linktrain_fallback@dp-fallback.html [57]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-5/igt@kms_dp_linktrain_fallback@dp-fallback.html * igt@kms_draw_crc@draw-method-render: - shard-bmg: [PASS][58] -> [INCOMPLETE][59] ([Intel XE#1727] / [Intel XE#3468]) +3 other tests incomplete [58]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-6/igt@kms_draw_crc@draw-method-render.html [59]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-7/igt@kms_draw_crc@draw-method-render.html * igt@kms_feature_discovery@chamelium: - shard-lnl: NOTRUN -> [SKIP][60] ([Intel XE#701]) [60]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-6/igt@kms_feature_discovery@chamelium.html * igt@kms_feature_discovery@display-2x: - shard-lnl: NOTRUN -> [SKIP][61] ([Intel XE#702]) [61]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-3/igt@kms_feature_discovery@display-2x.html * igt@kms_feature_discovery@psr1: - shard-bmg: NOTRUN -> [SKIP][62] ([Intel XE#2374]) [62]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-1/igt@kms_feature_discovery@psr1.html * igt@kms_flip@2x-flip-vs-absolute-wf_vblank-interruptible: - shard-bmg: [PASS][63] -> [SKIP][64] ([Intel XE#2316]) +3 other tests skip [63]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-8/igt@kms_flip@2x-flip-vs-absolute-wf_vblank-interruptible.html [64]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-5/igt@kms_flip@2x-flip-vs-absolute-wf_vblank-interruptible.html * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-dp2-hdmi-a3: - shard-bmg: NOTRUN -> [FAIL][65] ([Intel XE#2882]) [65]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-1/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-dp2-hdmi-a3.html * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bd-dp2-hdmi-a3: - shard-bmg: NOTRUN -> [FAIL][66] ([Intel XE#3321]) +3 other tests fail [66]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-1/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bd-dp2-hdmi-a3.html * igt@kms_flip@2x-plain-flip-ts-check: - shard-lnl: NOTRUN -> [SKIP][67] ([Intel XE#1421]) +10 other tests skip [67]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-7/igt@kms_flip@2x-plain-flip-ts-check.html * igt@kms_flip@2x-plain-flip-ts-check-interruptible: - shard-bmg: NOTRUN -> [SKIP][68] ([Intel XE#2316]) +2 other tests skip [68]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-4/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-bmg: [PASS][69] -> [FAIL][70] ([Intel XE#2882]) [69]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-7/igt@kms_flip@flip-vs-expired-vblank-interruptible.html [70]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-4/igt@kms_flip@flip-vs-expired-vblank-interruptible.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp2: - shard-bmg: [PASS][71] -> [FAIL][72] ([Intel XE#3321]) [71]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-7/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp2.html [72]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-4/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp2.html * igt@kms_flip@flip-vs-suspend-interruptible: - shard-bmg: [PASS][73] -> [DMESG-FAIL][74] ([Intel XE#1727] / [Intel XE#3468]) +2 other tests dmesg-fail [73]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-6/igt@kms_flip@flip-vs-suspend-interruptible.html [74]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-7/igt@kms_flip@flip-vs-suspend-interruptible.html * igt@kms_flip@flip-vs-suspend@a-hdmi-a3: - shard-bmg: NOTRUN -> [DMESG-WARN][75] ([Intel XE#1727] / [Intel XE#3468]) +1 other test dmesg-warn [75]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-8/igt@kms_flip@flip-vs-suspend@a-hdmi-a3.html * igt@kms_flip@flip-vs-suspend@c-dp2: - shard-bmg: NOTRUN -> [DMESG-FAIL][76] ([Intel XE#1727] / [Intel XE#3468]) +6 other tests dmesg-fail [76]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-8/igt@kms_flip@flip-vs-suspend@c-dp2.html * igt@kms_flip@plain-flip-ts-check-interruptible@d-hdmi-a3: - shard-bmg: [PASS][77] -> [DMESG-WARN][78] ([Intel XE#3468]) +91 other tests dmesg-warn [77]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-3/igt@kms_flip@plain-flip-ts-check-interruptible@d-hdmi-a3.html [78]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-1/igt@kms_flip@plain-flip-ts-check-interruptible@d-hdmi-a3.html * igt@kms_flip@wf_vblank-ts-check: - shard-bmg: [PASS][79] -> [DMESG-FAIL][80] ([Intel XE#2705] / [Intel XE#3468]) +2 other tests dmesg-fail [79]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-7/igt@kms_flip@wf_vblank-ts-check.html [80]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-3/igt@kms_flip@wf_vblank-ts-check.html * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling@pipe-a-valid-mode: - shard-bmg: NOTRUN -> [SKIP][81] ([Intel XE#2293]) +5 other tests skip [81]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-6/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling@pipe-a-valid-mode.html * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-default-mode: - shard-lnl: NOTRUN -> [SKIP][82] ([Intel XE#1401]) +9 other tests skip [82]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-4/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-default-mode.html * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling: - shard-bmg: NOTRUN -> [SKIP][83] ([Intel XE#2293] / [Intel XE#2380]) +5 other tests skip [83]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-3/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling.html * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling: - shard-lnl: NOTRUN -> [SKIP][84] ([Intel XE#1401] / [Intel XE#1745]) +9 other tests skip [84]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-3/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling.html * igt@kms_force_connector_basic@prune-stale-modes: - shard-lnl: NOTRUN -> [SKIP][85] ([Intel XE#352]) +1 other test skip [85]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-3/igt@kms_force_connector_basic@prune-stale-modes.html * igt@kms_frontbuffer_tracking@drrs-modesetfrombusy: - shard-lnl: NOTRUN -> [SKIP][86] ([Intel XE#651]) +13 other tests skip [86]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-2/igt@kms_frontbuffer_tracking@drrs-modesetfrombusy.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-wc: - shard-lnl: NOTRUN -> [SKIP][87] ([Intel XE#656]) +60 other tests skip [87]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff: - shard-bmg: NOTRUN -> [FAIL][88] ([Intel XE#2333]) +11 other tests fail [88]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc: - shard-bmg: NOTRUN -> [SKIP][89] ([Intel XE#2311]) +25 other tests skip [89]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-pgflip-blt: - shard-bmg: NOTRUN -> [SKIP][90] ([Intel XE#2313]) +21 other tests skip [90]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-pgflip-blt.html * igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt: - shard-bmg: NOTRUN -> [SKIP][91] ([Intel XE#2312]) +25 other tests skip [91]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-5/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html * igt@kms_frontbuffer_tracking@psr-suspend: - shard-lnl: NOTRUN -> [ABORT][92] ([Intel XE#3673]) +12 other tests abort [92]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-7/igt@kms_frontbuffer_tracking@psr-suspend.html * igt@kms_getfb@getfb2-accept-ccs: - shard-lnl: NOTRUN -> [SKIP][93] ([Intel XE#2340]) [93]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-7/igt@kms_getfb@getfb2-accept-ccs.html * igt@kms_plane@pixel-format: - shard-bmg: [PASS][94] -> [INCOMPLETE][95] ([Intel XE#1035] / [Intel XE#3468]) [94]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-3/igt@kms_plane@pixel-format.html [95]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-1/igt@kms_plane@pixel-format.html * igt@kms_plane_cursor@primary@pipe-a-dp-2-size-256: - shard-bmg: NOTRUN -> [DMESG-FAIL][96] ([Intel XE#2705]) [96]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-1/igt@kms_plane_cursor@primary@pipe-a-dp-2-size-256.html * igt@kms_plane_multiple@tiling-y: - shard-lnl: NOTRUN -> [SKIP][97] ([Intel XE#2493]) [97]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-5/igt@kms_plane_multiple@tiling-y.html - shard-bmg: NOTRUN -> [SKIP][98] ([Intel XE#2493]) [98]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-5/igt@kms_plane_multiple@tiling-y.html * igt@kms_plane_scaling@2x-scaler-multi-pipe: - shard-bmg: [PASS][99] -> [SKIP][100] ([Intel XE#2571]) [99]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-1/igt@kms_plane_scaling@2x-scaler-multi-pipe.html [100]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-6/igt@kms_plane_scaling@2x-scaler-multi-pipe.html * igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-a: - shard-lnl: NOTRUN -> [SKIP][101] ([Intel XE#2763]) +27 other tests skip [101]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-2/igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-a.html * igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-5: - shard-bmg: NOTRUN -> [DMESG-WARN][102] ([Intel XE#2566] / [Intel XE#3468]) [102]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-6/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-5.html * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-b: - shard-bmg: NOTRUN -> [SKIP][103] ([Intel XE#2763]) +9 other tests skip [103]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-1/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-b.html * igt@kms_pm_dc@dc3co-vpb-simulation: - shard-lnl: NOTRUN -> [SKIP][104] ([Intel XE#736]) [104]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-3/igt@kms_pm_dc@dc3co-vpb-simulation.html * igt@kms_pm_dc@dc5-dpms: - shard-lnl: [PASS][105] -> [FAIL][106] ([Intel XE#718]) [105]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-lnl-4/igt@kms_pm_dc@dc5-dpms.html [106]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-2/igt@kms_pm_dc@dc5-dpms.html * igt@kms_pm_dc@dc6-dpms: - shard-lnl: NOTRUN -> [FAIL][107] ([Intel XE#1430]) [107]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-4/igt@kms_pm_dc@dc6-dpms.html * igt@kms_pm_rpm@dpms-mode-unset-non-lpsp: - shard-lnl: NOTRUN -> [SKIP][108] ([Intel XE#1439] / [Intel XE#836]) [108]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-7/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html * igt@kms_pm_rpm@modeset-lpsp: - shard-bmg: NOTRUN -> [SKIP][109] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#836]) [109]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-5/igt@kms_pm_rpm@modeset-lpsp.html * igt@kms_pm_rpm@modeset-stress-extra-wait: - shard-bmg: [PASS][110] -> [INCOMPLETE][111] ([Intel XE#1727] / [Intel XE#2864] / [Intel XE#3468]) [110]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-6/igt@kms_pm_rpm@modeset-stress-extra-wait.html [111]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-2/igt@kms_pm_rpm@modeset-stress-extra-wait.html * igt@kms_prop_blob@basic: - shard-bmg: NOTRUN -> [DMESG-WARN][112] ([Intel XE#2705]) [112]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-8/igt@kms_prop_blob@basic.html * igt@kms_psr2_sf@pr-overlay-plane-move-continuous-sf: - shard-lnl: NOTRUN -> [SKIP][113] ([Intel XE#2893]) +2 other tests skip [113]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-1/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-sf.html * igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-sf: - shard-bmg: NOTRUN -> [SKIP][114] ([Intel XE#1489]) +9 other tests skip [114]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-1/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-sf.html * igt@kms_psr@fbc-psr-basic: - shard-bmg: NOTRUN -> [SKIP][115] ([Intel XE#2234] / [Intel XE#2850]) +14 other tests skip [115]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-1/igt@kms_psr@fbc-psr-basic.html * igt@kms_psr@pr-sprite-render: - shard-lnl: NOTRUN -> [SKIP][116] ([Intel XE#1406]) +3 other tests skip [116]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-7/igt@kms_psr@pr-sprite-render.html * igt@kms_rotation_crc@primary-y-tiled-reflect-x-90: - shard-lnl: NOTRUN -> [SKIP][117] ([Intel XE#3414]) +3 other tests skip [117]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-2/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180: - shard-lnl: NOTRUN -> [SKIP][118] ([Intel XE#1127]) [118]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-4/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html - shard-bmg: NOTRUN -> [SKIP][119] ([Intel XE#2330]) [119]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-5/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html * igt@kms_rotation_crc@sprite-rotation-90: - shard-bmg: NOTRUN -> [SKIP][120] ([Intel XE#3414]) +1 other test skip [120]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-4/igt@kms_rotation_crc@sprite-rotation-90.html * igt@kms_scaling_modes@scaling-mode-full: - shard-bmg: NOTRUN -> [SKIP][121] ([Intel XE#2413]) [121]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-6/igt@kms_scaling_modes@scaling-mode-full.html * igt@kms_setmode@basic-clone-single-crtc: - shard-lnl: NOTRUN -> [SKIP][122] ([Intel XE#1435]) +1 other test skip [122]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-1/igt@kms_setmode@basic-clone-single-crtc.html * igt@kms_setmode@invalid-clone-single-crtc-stealing: - shard-bmg: [PASS][123] -> [SKIP][124] ([Intel XE#1435]) [123]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-8/igt@kms_setmode@invalid-clone-single-crtc-stealing.html [124]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-4/igt@kms_setmode@invalid-clone-single-crtc-stealing.html * igt@kms_tiled_display@basic-test-pattern: - shard-bmg: NOTRUN -> [SKIP][125] ([Intel XE#2426]) [125]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-4/igt@kms_tiled_display@basic-test-pattern.html * igt@kms_tiled_display@basic-test-pattern-with-chamelium: - shard-lnl: NOTRUN -> [SKIP][126] ([Intel XE#362]) [126]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-1/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html * igt@kms_tv_load_detect@load-detect: - shard-lnl: NOTRUN -> [SKIP][127] ([Intel XE#330]) [127]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-3/igt@kms_tv_load_detect@load-detect.html * igt@kms_vrr@flip-basic: - shard-bmg: NOTRUN -> [SKIP][128] ([Intel XE#1499]) [128]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-6/igt@kms_vrr@flip-basic.html * igt@kms_vrr@lobf: - shard-lnl: NOTRUN -> [SKIP][129] ([Intel XE#1499]) [129]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-4/igt@kms_vrr@lobf.html * igt@kms_writeback@writeback-fb-id-xrgb2101010: - shard-lnl: NOTRUN -> [SKIP][130] ([Intel XE#756]) +1 other test skip [130]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-4/igt@kms_writeback@writeback-fb-id-xrgb2101010.html - shard-bmg: NOTRUN -> [SKIP][131] ([Intel XE#756]) [131]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-5/igt@kms_writeback@writeback-fb-id-xrgb2101010.html * igt@xe_create@create-big-vram: - shard-lnl: NOTRUN -> [SKIP][132] ([Intel XE#1062]) [132]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-5/igt@xe_create@create-big-vram.html * igt@xe_eudebug@vm-bind-clear: - shard-bmg: NOTRUN -> [SKIP][133] ([Intel XE#2905]) +12 other tests skip [133]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-8/igt@xe_eudebug@vm-bind-clear.html * igt@xe_eudebug_online@basic-breakpoint: - shard-lnl: NOTRUN -> [SKIP][134] ([Intel XE#2905]) +9 other tests skip [134]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-2/igt@xe_eudebug_online@basic-breakpoint.html * igt@xe_evict@evict-beng-large-external-cm: - shard-lnl: NOTRUN -> [SKIP][135] ([Intel XE#688]) +12 other tests skip [135]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-5/igt@xe_evict@evict-beng-large-external-cm.html * igt@xe_exec_basic@multigpu-no-exec-bindexecqueue: - shard-bmg: NOTRUN -> [SKIP][136] ([Intel XE#2322]) +8 other tests skip [136]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-7/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue.html * igt@xe_exec_basic@multigpu-no-exec-null-defer-mmap: - shard-lnl: NOTRUN -> [SKIP][137] ([Intel XE#1392]) +7 other tests skip [137]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-2/igt@xe_exec_basic@multigpu-no-exec-null-defer-mmap.html * igt@xe_exec_sip_eudebug@wait-writesip-nodebug@drm_xe_engine_class_render0: - shard-bmg: NOTRUN -> [DMESG-WARN][138] ([Intel XE#3468]) +42 other tests dmesg-warn [138]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-6/igt@xe_exec_sip_eudebug@wait-writesip-nodebug@drm_xe_engine_class_render0.html * igt@xe_exec_threads@threads-bal-shared-vm-userptr-rebind: - shard-bmg: [PASS][139] -> [DMESG-WARN][140] ([Intel XE#2705] / [Intel XE#3468]) [139]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-5/igt@xe_exec_threads@threads-bal-shared-vm-userptr-rebind.html [140]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-4/igt@xe_exec_threads@threads-bal-shared-vm-userptr-rebind.html * igt@xe_fault_injection@vm-bind-fail-xe_pt_update_ops_prepare: - shard-bmg: [PASS][141] -> [DMESG-WARN][142] ([Intel XE#3467] / [Intel XE#3468]) [141]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-1/igt@xe_fault_injection@vm-bind-fail-xe_pt_update_ops_prepare.html [142]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-8/igt@xe_fault_injection@vm-bind-fail-xe_pt_update_ops_prepare.html * igt@xe_fault_injection@vm-create-fail-xe_pt_create: - shard-bmg: NOTRUN -> [DMESG-WARN][143] ([Intel XE#3467] / [Intel XE#3468]) [143]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-1/igt@xe_fault_injection@vm-create-fail-xe_pt_create.html * igt@xe_live_ktest@xe_eudebug: - shard-bmg: NOTRUN -> [SKIP][144] ([Intel XE#2833]) [144]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-5/igt@xe_live_ktest@xe_eudebug.html * igt@xe_media_fill@media-fill: - shard-bmg: NOTRUN -> [SKIP][145] ([Intel XE#2459] / [Intel XE#2596]) [145]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-7/igt@xe_media_fill@media-fill.html * igt@xe_module_load@load: - shard-lnl: ([PASS][146], [PASS][147], [PASS][148], [PASS][149], [PASS][150], [PASS][151], [PASS][152], [PASS][153], [PASS][154], [PASS][155], [PASS][156], [PASS][157], [PASS][158], [PASS][159], [PASS][160], [PASS][161], [PASS][162], [PASS][163], [PASS][164], [PASS][165], [PASS][166], [PASS][167], [PASS][168], [PASS][169], [PASS][170]) -> ([PASS][171], [PASS][172], [PASS][173], [PASS][174], [PASS][175], [PASS][176], [PASS][177], [PASS][178], [PASS][179], [PASS][180], [PASS][181], [PASS][182], [PASS][183], [PASS][184], [PASS][185], [PASS][186], [PASS][187], [PASS][188], [PASS][189], [PASS][190], [PASS][191], [PASS][192], [PASS][193], [SKIP][194], [PASS][195], [PASS][196]) ([Intel XE#378]) [146]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-lnl-5/igt@xe_module_load@load.html [147]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-lnl-8/igt@xe_module_load@load.html [148]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-lnl-8/igt@xe_module_load@load.html [149]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-lnl-4/igt@xe_module_load@load.html [150]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-lnl-4/igt@xe_module_load@load.html [151]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-lnl-8/igt@xe_module_load@load.html [152]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-lnl-2/igt@xe_module_load@load.html [153]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-lnl-2/igt@xe_module_load@load.html [154]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-lnl-7/igt@xe_module_load@load.html [155]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-lnl-3/igt@xe_module_load@load.html [156]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-lnl-6/igt@xe_module_load@load.html [157]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-lnl-4/igt@xe_module_load@load.html [158]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-lnl-1/igt@xe_module_load@load.html [159]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-lnl-1/igt@xe_module_load@load.html [160]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-lnl-1/igt@xe_module_load@load.html [161]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-lnl-7/igt@xe_module_load@load.html [162]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-lnl-6/igt@xe_module_load@load.html [163]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-lnl-3/igt@xe_module_load@load.html [164]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-lnl-3/igt@xe_module_load@load.html [165]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-lnl-7/igt@xe_module_load@load.html [166]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-lnl-7/igt@xe_module_load@load.html [167]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-lnl-6/igt@xe_module_load@load.html [168]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-lnl-5/igt@xe_module_load@load.html [169]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-lnl-5/igt@xe_module_load@load.html [170]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-lnl-5/igt@xe_module_load@load.html [171]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-4/igt@xe_module_load@load.html [172]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-1/igt@xe_module_load@load.html [173]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-4/igt@xe_module_load@load.html [174]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-7/igt@xe_module_load@load.html [175]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-1/igt@xe_module_load@load.html [176]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-4/igt@xe_module_load@load.html [177]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-7/igt@xe_module_load@load.html [178]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-7/igt@xe_module_load@load.html [179]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-2/igt@xe_module_load@load.html [180]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-2/igt@xe_module_load@load.html [181]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-2/igt@xe_module_load@load.html [182]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-7/igt@xe_module_load@load.html [183]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-8/igt@xe_module_load@load.html [184]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-8/igt@xe_module_load@load.html [185]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-8/igt@xe_module_load@load.html [186]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-5/igt@xe_module_load@load.html [187]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-3/igt@xe_module_load@load.html [188]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-6/igt@xe_module_load@load.html [189]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-6/igt@xe_module_load@load.html [190]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-6/igt@xe_module_load@load.html [191]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-3/igt@xe_module_load@load.html [192]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-3/igt@xe_module_load@load.html [193]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-1/igt@xe_module_load@load.html [194]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-3/igt@xe_module_load@load.html [195]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-5/igt@xe_module_load@load.html [196]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-5/igt@xe_module_load@load.html - shard-bmg: ([PASS][197], [PASS][198], [PASS][199], [PASS][200], [PASS][201], [PASS][202], [PASS][203], [PASS][204], [PASS][205], [PASS][206], [PASS][207], [PASS][208], [PASS][209], [PASS][210], [PASS][211], [PASS][212], [PASS][213], [PASS][214], [PASS][215], [PASS][216], [PASS][217], [PASS][218], [PASS][219], [PASS][220], [PASS][221]) -> ([PASS][222], [SKIP][223], [PASS][224], [PASS][225], [PASS][226], [PASS][227], [PASS][228], [PASS][229], [PASS][230], [PASS][231], [PASS][232], [PASS][233], [PASS][234], [PASS][235], [PASS][236], [PASS][237], [PASS][238], [PASS][239], [PASS][240], [PASS][241], [PASS][242], [PASS][243], [PASS][244], [PASS][245], [PASS][246], [PASS][247]) ([Intel XE#2457]) [197]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-8/igt@xe_module_load@load.html [198]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-8/igt@xe_module_load@load.html [199]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-8/igt@xe_module_load@load.html [200]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-3/igt@xe_module_load@load.html [201]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-4/igt@xe_module_load@load.html [202]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-3/igt@xe_module_load@load.html [203]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-1/igt@xe_module_load@load.html [204]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-6/igt@xe_module_load@load.html [205]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-6/igt@xe_module_load@load.html [206]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-6/igt@xe_module_load@load.html [207]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-8/igt@xe_module_load@load.html [208]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-4/igt@xe_module_load@load.html [209]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-3/igt@xe_module_load@load.html [210]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-1/igt@xe_module_load@load.html [211]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-5/igt@xe_module_load@load.html [212]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-5/igt@xe_module_load@load.html [213]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-5/igt@xe_module_load@load.html [214]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-5/igt@xe_module_load@load.html [215]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-1/igt@xe_module_load@load.html [216]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-7/igt@xe_module_load@load.html [217]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-7/igt@xe_module_load@load.html [218]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-2/igt@xe_module_load@load.html [219]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-2/igt@xe_module_load@load.html [220]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-7/igt@xe_module_load@load.html [221]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-4/igt@xe_module_load@load.html [222]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-6/igt@xe_module_load@load.html [223]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-1/igt@xe_module_load@load.html [224]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-1/igt@xe_module_load@load.html [225]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-1/igt@xe_module_load@load.html [226]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-5/igt@xe_module_load@load.html [227]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-3/igt@xe_module_load@load.html [228]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-3/igt@xe_module_load@load.html [229]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-3/igt@xe_module_load@load.html [230]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-4/igt@xe_module_load@load.html [231]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-7/igt@xe_module_load@load.html [232]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-2/igt@xe_module_load@load.html [233]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-2/igt@xe_module_load@load.html [234]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-2/igt@xe_module_load@load.html [235]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-6/igt@xe_module_load@load.html [236]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-4/igt@xe_module_load@load.html [237]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-4/igt@xe_module_load@load.html [238]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-6/igt@xe_module_load@load.html [239]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-6/igt@xe_module_load@load.html [240]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-8/igt@xe_module_load@load.html [241]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-8/igt@xe_module_load@load.html [242]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-5/igt@xe_module_load@load.html [243]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-5/igt@xe_module_load@load.html [244]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-5/igt@xe_module_load@load.html [245]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-7/igt@xe_module_load@load.html [246]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-7/igt@xe_module_load@load.html [247]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-1/igt@xe_module_load@load.html * igt@xe_module_load@reload-no-display: - shard-bmg: [PASS][248] -> [DMESG-WARN][249] ([Intel XE#3467]) [248]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-4/igt@xe_module_load@reload-no-display.html [249]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-4/igt@xe_module_load@reload-no-display.html * igt@xe_module_load@unload: - shard-bmg: NOTRUN -> [DMESG-WARN][250] ([Intel XE#3467]) [250]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-6/igt@xe_module_load@unload.html * igt@xe_noexec_ping_pong: - shard-lnl: NOTRUN -> [SKIP][251] ([Intel XE#379]) [251]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-3/igt@xe_noexec_ping_pong.html * igt@xe_oa@oa-tlb-invalidate: - shard-lnl: NOTRUN -> [SKIP][252] ([Intel XE#2248]) [252]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-4/igt@xe_oa@oa-tlb-invalidate.html - shard-bmg: NOTRUN -> [SKIP][253] ([Intel XE#2248]) [253]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-3/igt@xe_oa@oa-tlb-invalidate.html * igt@xe_pat@pat-index-xelp: - shard-lnl: NOTRUN -> [SKIP][254] ([Intel XE#977]) [254]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-7/igt@xe_pat@pat-index-xelp.html - shard-bmg: NOTRUN -> [SKIP][255] ([Intel XE#2245]) [255]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-6/igt@xe_pat@pat-index-xelp.html * igt@xe_pat@pat-index-xelpg: - shard-lnl: NOTRUN -> [SKIP][256] ([Intel XE#979]) [256]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-2/igt@xe_pat@pat-index-xelpg.html * igt@xe_pm@s2idle-basic: - shard-lnl: NOTRUN -> [ABORT][257] ([Intel XE#1358] / [Intel XE#3673]) [257]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-8/igt@xe_pm@s2idle-basic.html * igt@xe_pm@s2idle-basic-exec: - shard-bmg: NOTRUN -> [ABORT][258] ([Intel XE#1616]) +1 other test abort [258]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-8/igt@xe_pm@s2idle-basic-exec.html - shard-lnl: NOTRUN -> [ABORT][259] ([Intel XE#1358] / [Intel XE#1616] / [Intel XE#3766]) +1 other test abort [259]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-6/igt@xe_pm@s2idle-basic-exec.html * igt@xe_pm@s2idle-vm-bind-unbind-all: - shard-lnl: NOTRUN -> [ABORT][260] ([Intel XE#1616] / [Intel XE#1694] / [Intel XE#3766]) [260]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-5/igt@xe_pm@s2idle-vm-bind-unbind-all.html * igt@xe_pm@s3-basic-exec: - shard-bmg: NOTRUN -> [DMESG-WARN][261] ([Intel XE#1727] / [Intel XE#3468] / [Intel XE#569]) [261]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-2/igt@xe_pm@s3-basic-exec.html * igt@xe_pm@s3-vm-bind-userptr: - shard-lnl: NOTRUN -> [SKIP][262] ([Intel XE#584]) +2 other tests skip [262]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-3/igt@xe_pm@s3-vm-bind-userptr.html * igt@xe_pm@s4-vm-bind-userptr: - shard-lnl: [PASS][263] -> [ABORT][264] ([Intel XE#1794]) [263]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-lnl-8/igt@xe_pm@s4-vm-bind-userptr.html [264]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-2/igt@xe_pm@s4-vm-bind-userptr.html * igt@xe_pm@vram-d3cold-threshold: - shard-lnl: NOTRUN -> [SKIP][265] ([Intel XE#579]) [265]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-3/igt@xe_pm@vram-d3cold-threshold.html - shard-bmg: NOTRUN -> [SKIP][266] ([Intel XE#579]) [266]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-3/igt@xe_pm@vram-d3cold-threshold.html * igt@xe_query@multigpu-query-cs-cycles: - shard-lnl: NOTRUN -> [SKIP][267] ([Intel XE#944]) +2 other tests skip [267]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-4/igt@xe_query@multigpu-query-cs-cycles.html * igt@xe_query@multigpu-query-topology-l3-bank-mask: - shard-bmg: NOTRUN -> [SKIP][268] ([Intel XE#944]) +3 other tests skip [268]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-6/igt@xe_query@multigpu-query-topology-l3-bank-mask.html #### Possible fixes #### * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip: - shard-bmg: [DMESG-FAIL][269] ([Intel XE#3468]) -> [PASS][270] +1 other test pass [269]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-7/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip.html [270]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-5/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip.html * igt@kms_color@ctm-signed: - shard-bmg: [DMESG-WARN][271] ([Intel XE#877]) -> [PASS][272] +1 other test pass [271]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-3/igt@kms_color@ctm-signed.html [272]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-7/igt@kms_color@ctm-signed.html * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions: - shard-bmg: [SKIP][273] ([Intel XE#2291]) -> [PASS][274] +3 other tests pass [273]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html [274]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-8/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html * igt@kms_flip@flip-vs-expired-vblank: - shard-bmg: [FAIL][275] ([Intel XE#2882]) -> [PASS][276] +3 other tests pass [275]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-4/igt@kms_flip@flip-vs-expired-vblank.html [276]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-6/igt@kms_flip@flip-vs-expired-vblank.html * igt@kms_flip@flip-vs-panning-interruptible: - shard-bmg: [DMESG-WARN][277] ([Intel XE#2705] / [Intel XE#3468]) -> [PASS][278] [277]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-2/igt@kms_flip@flip-vs-panning-interruptible.html [278]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-6/igt@kms_flip@flip-vs-panning-interruptible.html * igt@kms_hdr@invalid-metadata-sizes: - shard-bmg: [SKIP][279] ([Intel XE#1503]) -> [PASS][280] +1 other test pass [279]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-5/igt@kms_hdr@invalid-metadata-sizes.html [280]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-3/igt@kms_hdr@invalid-metadata-sizes.html * igt@kms_plane_alpha_blend@constant-alpha-max: - shard-bmg: [DMESG-WARN][281] ([Intel XE#3468]) -> [PASS][282] +25 other tests pass [281]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-6/igt@kms_plane_alpha_blend@constant-alpha-max.html [282]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-6/igt@kms_plane_alpha_blend@constant-alpha-max.html * igt@kms_setmode@clone-exclusive-crtc: - shard-bmg: [SKIP][283] ([Intel XE#1435]) -> [PASS][284] [283]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-4/igt@kms_setmode@clone-exclusive-crtc.html [284]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-2/igt@kms_setmode@clone-exclusive-crtc.html * igt@kms_vrr@negative-basic: - shard-bmg: [SKIP][285] ([Intel XE#1499]) -> [PASS][286] [285]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-6/igt@kms_vrr@negative-basic.html [286]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-4/igt@kms_vrr@negative-basic.html * igt@xe_exec_balancer@once-cm-parallel-basic: - shard-bmg: [DMESG-WARN][287] -> [PASS][288] [287]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-2/igt@xe_exec_balancer@once-cm-parallel-basic.html [288]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-3/igt@xe_exec_balancer@once-cm-parallel-basic.html * igt@xe_exec_basic@many-bindexecqueue-userptr-invalidate: - shard-bmg: [DMESG-WARN][289] ([Intel XE#1727]) -> [PASS][290] [289]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-1/igt@xe_exec_basic@many-bindexecqueue-userptr-invalidate.html [290]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-1/igt@xe_exec_basic@many-bindexecqueue-userptr-invalidate.html * igt@xe_exec_compute_mode@many-execqueues-bindexecqueue-userptr-rebind: - shard-lnl: [FAIL][291] -> [PASS][292] [291]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-lnl-1/igt@xe_exec_compute_mode@many-execqueues-bindexecqueue-userptr-rebind.html [292]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-7/igt@xe_exec_compute_mode@many-execqueues-bindexecqueue-userptr-rebind.html * igt@xe_fault_injection@inject-fault-probe-function-xe_guc_relay_init: - shard-bmg: [DMESG-WARN][293] ([Intel XE#3343]) -> [PASS][294] [293]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-6/igt@xe_fault_injection@inject-fault-probe-function-xe_guc_relay_init.html [294]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-3/igt@xe_fault_injection@inject-fault-probe-function-xe_guc_relay_init.html * igt@xe_fault_injection@inject-fault-probe-function-xe_tile_init_early: - shard-bmg: [DMESG-WARN][295] ([Intel XE#3467] / [Intel XE#3468]) -> [PASS][296] [295]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-3/igt@xe_fault_injection@inject-fault-probe-function-xe_tile_init_early.html [296]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-1/igt@xe_fault_injection@inject-fault-probe-function-xe_tile_init_early.html * igt@xe_module_load@reload: - shard-bmg: [FAIL][297] ([Intel XE#3625]) -> [PASS][298] [297]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-7/igt@xe_module_load@reload.html [298]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-5/igt@xe_module_load@reload.html * igt@xe_pm@d3hot-mocs: - shard-bmg: [DMESG-WARN][299] ([Intel XE#1727] / [Intel XE#3468]) -> [PASS][300] [299]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-2/igt@xe_pm@d3hot-mocs.html [300]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-2/igt@xe_pm@d3hot-mocs.html * igt@xe_pm@s3-vm-bind-prefetch: - shard-bmg: [DMESG-WARN][301] ([Intel XE#1727] / [Intel XE#3468] / [Intel XE#569]) -> [PASS][302] [301]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-7/igt@xe_pm@s3-vm-bind-prefetch.html [302]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-3/igt@xe_pm@s3-vm-bind-prefetch.html * igt@xe_pm_residency@cpg-basic: - shard-bmg: [DMESG-FAIL][303] ([Intel XE#1727] / [Intel XE#3468]) -> [PASS][304] [303]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-2/igt@xe_pm_residency@cpg-basic.html [304]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-4/igt@xe_pm_residency@cpg-basic.html * igt@xe_pm_residency@toggle-gt-c6: - shard-lnl: [FAIL][305] ([Intel XE#958]) -> [PASS][306] [305]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-lnl-8/igt@xe_pm_residency@toggle-gt-c6.html [306]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-lnl-6/igt@xe_pm_residency@toggle-gt-c6.html #### Warnings #### * igt@kms_async_flips@alternate-sync-async-flip@pipe-a-dp-2: - shard-bmg: [FAIL][307] ([Intel XE#827]) -> [DMESG-FAIL][308] ([Intel XE#3468]) +1 other test dmesg-fail [307]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-1/igt@kms_async_flips@alternate-sync-async-flip@pipe-a-dp-2.html [308]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-4/igt@kms_async_flips@alternate-sync-async-flip@pipe-a-dp-2.html * igt@kms_flip@2x-flip-vs-absolute-wf_vblank: - shard-bmg: [DMESG-WARN][309] ([Intel XE#3468]) -> [SKIP][310] ([Intel XE#2316]) +1 other test skip [309]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-2/igt@kms_flip@2x-flip-vs-absolute-wf_vblank.html [310]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-4/igt@kms_flip@2x-flip-vs-absolute-wf_vblank.html * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible: - shard-bmg: [SKIP][311] ([Intel XE#2316]) -> [FAIL][312] ([Intel XE#2882]) [311]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-5/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html [312]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-1/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html * igt@kms_flip@2x-wf_vblank-ts-check: - shard-bmg: [SKIP][313] ([Intel XE#2316]) -> [DMESG-WARN][314] ([Intel XE#3468]) [313]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-5/igt@kms_flip@2x-wf_vblank-ts-check.html [314]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-7/igt@kms_flip@2x-wf_vblank-ts-check.html * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt: - shard-bmg: [SKIP][315] ([Intel XE#2311]) -> [SKIP][316] ([Intel XE#2312]) +14 other tests skip [315]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-7/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html [316]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render: - shard-bmg: [INCOMPLETE][317] ([Intel XE#1727]) -> [FAIL][318] ([Intel XE#2333]) [317]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render.html [318]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-render: - shard-bmg: [DMESG-FAIL][319] ([Intel XE#3468]) -> [FAIL][320] ([Intel XE#2333]) +1 other test fail [319]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-render.html [320]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-render.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-wc: - shard-bmg: [DMESG-FAIL][321] ([Intel XE#3468]) -> [SKIP][322] ([Intel XE#2312]) [321]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-wc.html [322]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen: - shard-bmg: [FAIL][323] ([Intel XE#2333]) -> [DMESG-FAIL][324] ([Intel XE#3468]) +5 other tests dmesg-fail [323]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen.html [324]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff: - shard-bmg: [SKIP][325] ([Intel XE#2312]) -> [FAIL][326] ([Intel XE#2333]) +3 other tests fail [325]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff.html [326]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-mmap-wc: - shard-bmg: [SKIP][327] ([Intel XE#2312]) -> [DMESG-FAIL][328] ([Intel XE#3468]) [327]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-mmap-wc.html [328]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt: - shard-bmg: [FAIL][329] ([Intel XE#2333]) -> [SKIP][330] ([Intel XE#2312]) +4 other tests skip [329]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt.html [330]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt.html * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-render: - shard-bmg: [SKIP][331] ([Intel XE#2312]) -> [SKIP][332] ([Intel XE#2311]) +19 other tests skip [331]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-render.html [332]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-render.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-msflip-blt: - shard-bmg: [SKIP][333] ([Intel XE#2313]) -> [SKIP][334] ([Intel XE#2312]) +10 other tests skip [333]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-msflip-blt.html [334]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-msflip-blt.html * igt@kms_frontbuffer_tracking@pipe-fbc-rte: - shard-bmg: [FAIL][335] ([Intel XE#2333]) -> [INCOMPLETE][336] ([Intel XE#1727] / [Intel XE#2050] / [Intel XE#3468]) [335]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-3/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html [336]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-4/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html * igt@kms_frontbuffer_tracking@pipe-fbc-rte@pipe-b-dp-2: - shard-bmg: [FAIL][337] ([Intel XE#2333]) -> [INCOMPLETE][338] ([Intel XE#1727] / [Intel XE#3468]) [337]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-3/igt@kms_frontbuffer_tracking@pipe-fbc-rte@pipe-b-dp-2.html [338]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-4/igt@kms_frontbuffer_tracking@pipe-fbc-rte@pipe-b-dp-2.html * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-pgflip-blt: - shard-bmg: [SKIP][339] ([Intel XE#2312]) -> [SKIP][340] ([Intel XE#2313]) +13 other tests skip [339]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-4/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-pgflip-blt.html [340]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-3/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-pgflip-blt.html * igt@kms_hdr@brightness-with-hdr: - shard-bmg: [SKIP][341] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][342] ([Intel XE#3544]) [341]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-3/igt@kms_hdr@brightness-with-hdr.html [342]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-1/igt@kms_hdr@brightness-with-hdr.html * igt@kms_hdr@static-toggle-suspend: - shard-bmg: [SKIP][343] ([Intel XE#1503]) -> [DMESG-WARN][344] ([Intel XE#3468]) [343]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-5/igt@kms_hdr@static-toggle-suspend.html [344]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-6/igt@kms_hdr@static-toggle-suspend.html * igt@xe_evict@evict-beng-large-multi-vm-cm: - shard-bmg: [FAIL][345] ([Intel XE#2364]) -> [DMESG-FAIL][346] ([Intel XE#3468]) [345]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-7/igt@xe_evict@evict-beng-large-multi-vm-cm.html [346]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-4/igt@xe_evict@evict-beng-large-multi-vm-cm.html * igt@xe_evict@evict-beng-mixed-threads-large: - shard-bmg: [DMESG-FAIL][347] -> [TIMEOUT][348] ([Intel XE#1473]) [347]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-5/igt@xe_evict@evict-beng-mixed-threads-large.html [348]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-6/igt@xe_evict@evict-beng-mixed-threads-large.html * igt@xe_evict@evict-beng-threads-large: - shard-bmg: [TIMEOUT][349] ([Intel XE#1473]) -> [FAIL][350] ([Intel XE#1000]) [349]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-4/igt@xe_evict@evict-beng-threads-large.html [350]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-7/igt@xe_evict@evict-beng-threads-large.html * igt@xe_evict@evict-large-multi-vm-cm: - shard-bmg: [DMESG-FAIL][351] ([Intel XE#3468]) -> [FAIL][352] ([Intel XE#2364]) [351]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-2/igt@xe_evict@evict-large-multi-vm-cm.html [352]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-6/igt@xe_evict@evict-large-multi-vm-cm.html * igt@xe_evict@evict-mixed-many-threads-small: - shard-bmg: [TIMEOUT][353] ([Intel XE#1473] / [Intel XE#2472]) -> [INCOMPLETE][354] ([Intel XE#1473] / [Intel XE#3468]) [353]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-8/igt@xe_evict@evict-mixed-many-threads-small.html [354]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-4/igt@xe_evict@evict-mixed-many-threads-small.html * igt@xe_fault_injection@inject-fault-probe-function-xe_ggtt_init_early: - shard-bmg: [DMESG-WARN][355] ([Intel XE#3467] / [Intel XE#3468]) -> [DMESG-WARN][356] ([Intel XE#3467]) [355]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-1/igt@xe_fault_injection@inject-fault-probe-function-xe_ggtt_init_early.html [356]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-6/igt@xe_fault_injection@inject-fault-probe-function-xe_ggtt_init_early.html * igt@xe_module_load@many-reload: - shard-bmg: [DMESG-WARN][357] ([Intel XE#3467]) -> [DMESG-FAIL][358] ([Intel XE#3467]) [357]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-2/igt@xe_module_load@many-reload.html [358]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-2/igt@xe_module_load@many-reload.html * igt@xe_pm@s2idle-vm-bind-unbind-all: - shard-bmg: [ABORT][359] ([Intel XE#1616] / [Intel XE#3468]) -> [ABORT][360] ([Intel XE#1616]) [359]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-2/igt@xe_pm@s2idle-vm-bind-unbind-all.html [360]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-5/igt@xe_pm@s2idle-vm-bind-unbind-all.html * igt@xe_pm@s2idle-vm-bind-userptr: - shard-bmg: [ABORT][361] ([Intel XE#1616]) -> [ABORT][362] ([Intel XE#1616] / [Intel XE#3468]) [361]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-4/igt@xe_pm@s2idle-vm-bind-userptr.html [362]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-6/igt@xe_pm@s2idle-vm-bind-userptr.html * igt@xe_wedged@wedged-at-any-timeout: - shard-bmg: [ABORT][363] ([Intel XE#3765]) -> [ABORT][364] ([Intel XE#3421] / [Intel XE#3765]) [363]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-6/igt@xe_wedged@wedged-at-any-timeout.html [364]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-6/igt@xe_wedged@wedged-at-any-timeout.html * igt@xe_wedged@wedged-mode-toggle: - shard-bmg: [DMESG-WARN][365] ([Intel XE#3467]) -> [DMESG-WARN][366] ([Intel XE#3467] / [Intel XE#3468]) [365]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8145/shard-bmg-7/igt@xe_wedged@wedged-mode-toggle.html [366]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/shard-bmg-3/igt@xe_wedged@wedged-mode-toggle.html [Intel XE#1000]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1000 [Intel XE#1035]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1035 [Intel XE#1062]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1062 [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124 [Intel XE#1125]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1125 [Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127 [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178 [Intel XE#1358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1358 [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392 [Intel XE#1401]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1401 [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406 [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407 [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421 [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424 [Intel XE#1430]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1430 [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435 [Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439 [Intel XE#1467]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1467 [Intel XE#1473]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1473 [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489 [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499 [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503 [Intel XE#1508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1508 [Intel XE#1512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1512 [Intel XE#1616]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1616 [Intel XE#1694]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1694 [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727 [Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745 [Intel XE#1794]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1794 [Intel XE#2050]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2050 [Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191 [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234 [Intel XE#2245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2245 [Intel XE#2248]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2248 [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252 [Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286 [Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291 [Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293 [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311 [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312 [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313 [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314 [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316 [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320 [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321 [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322 [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325 [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327 [Intel XE#2328]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2328 [Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330 [Intel XE#2333]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2333 [Intel XE#2340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2340 [Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341 [Intel XE#2364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2364 [Intel XE#2370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2370 [Intel XE#2374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2374 [Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380 [Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413 [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426 [Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457 [Intel XE#2459]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2459 [Intel XE#2472]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2472 [Intel XE#2493]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2493 [Intel XE#2566]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2566 [Intel XE#2571]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2571 [Intel XE#2596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2596 [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652 [Intel XE#2669]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2669 [Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705 [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763 [Intel XE#2833]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2833 [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850 [Intel XE#2864]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2864 [Intel XE#2882]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2882 [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887 [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893 [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894 [Intel XE#2905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2905 [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306 [Intel XE#3070]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3070 [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309 [Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141 [Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323 [Intel XE#3278]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3278 [Intel XE#330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/330 [Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321 [Intel XE#3343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3343 [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374 [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414 [Intel XE#3421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3421 [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432 [Intel XE#3467]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3467 [Intel XE#3468]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3468 [Intel XE#352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/352 [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544 [Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362 [Intel XE#3625]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3625 [Intel XE#3658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3658 [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367 [Intel XE#3673]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3673 [Intel XE#3701]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3701 [Intel XE#3718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3718 [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373 [Intel XE#3746]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3746 [Intel XE#3765]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3765 [Intel XE#3766]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3766 [Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378 [Intel XE#379]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/379 [Intel XE#569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/569 [Intel XE#579]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/579 [Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584 [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651 [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656 [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688 [Intel XE#701]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/701 [Intel XE#702]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/702 [Intel XE#718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/718 [Intel XE#736]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/736 [Intel XE#756]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/756 [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787 [Intel XE#827]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/827 [Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836 [Intel XE#877]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/877 [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944 [Intel XE#958]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/958 [Intel XE#977]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/977 [Intel XE#979]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/979 Build changes ------------- * IGT: IGT_8145 -> IGTPW_12276 IGTPW_12276: 12276 IGT_8145: 9ecc5cadf47dc934af126a6b34653b860974b9f1 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git xe-2340-9d12021e081c72b18c31bda175fb9a43f1d005fc: 9d12021e081c72b18c31bda175fb9a43f1d005fc == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12276/index.html [-- Attachment #2: Type: text/html, Size: 98159 bytes --] ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2024-12-10 11:12 UTC | newest] Thread overview: 8+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2024-12-06 11:10 [PATCH v5 0/2] tests/xe_spin_batch: Add spin-timestamp-check Pravalika Gurram 2024-12-06 11:10 ` [PATCH v5 1/2] lib/xe/xe_spin: move the spinner related functions to lib Pravalika Gurram 2024-12-10 8:10 ` Zbigniew Kempczyński 2024-12-10 11:12 ` Kamil Konieczny 2024-12-06 11:10 ` [PATCH v5 2/2] tests/xe_spin_batch: Add spin-timestamp-check Pravalika Gurram 2024-12-09 20:52 ` ✓ Xe.CI.BAT: success for tests/xe_spin_batch: Add spin-timestamp-check (rev6) Patchwork 2024-12-09 21:02 ` ✗ i915.CI.BAT: failure " Patchwork 2024-12-09 21:59 ` ✗ Xe.CI.Full: " Patchwork
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