* [PATCH v7 0/2] tests/xe_spin_batch: Add spin-timestamp-check
@ 2024-12-11 8:58 Pravalika Gurram
2024-12-11 8:58 ` [PATCH v7 1/2] lib/xe/xe_spin: move the spinner related functions to lib Pravalika Gurram
` (4 more replies)
0 siblings, 5 replies; 7+ messages in thread
From: Pravalika Gurram @ 2024-12-11 8:58 UTC (permalink / raw)
To: igt-dev; +Cc: zbigniew.kempczynski, Pravalika Gurram
Move the spinner related functions to lib.
check the ctx_timestamp register post gt reset for each engine.
Pravalika Gurram (2):
lib/xe/xe_spin: move the spinner related functions to lib
tests/xe_spin_batch: Add spin-timestamp-check
lib/xe/xe_spin.c | 207 ++++++++++++++++++++++++++----------
lib/xe/xe_spin.h | 52 +++++----
tests/intel/xe_drm_fdinfo.c | 195 ++++++---------------------------
tests/intel/xe_spin_batch.c | 121 +++++++++++++++++++++
tests/intel/xe_vm.c | 17 +--
5 files changed, 347 insertions(+), 245 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v7 1/2] lib/xe/xe_spin: move the spinner related functions to lib
2024-12-11 8:58 [PATCH v7 0/2] tests/xe_spin_batch: Add spin-timestamp-check Pravalika Gurram
@ 2024-12-11 8:58 ` Pravalika Gurram
2024-12-13 6:18 ` Zbigniew Kempczyński
2024-12-11 8:58 ` [PATCH v7 2/2] tests/xe_spin_batch: Add spin-timestamp-check Pravalika Gurram
` (3 subsequent siblings)
4 siblings, 1 reply; 7+ messages in thread
From: Pravalika Gurram @ 2024-12-11 8:58 UTC (permalink / raw)
To: igt-dev; +Cc: zbigniew.kempczynski, Pravalika Gurram
move spin_ctx_init,spin_ctx_start,spin_ctx_end,spin_ctx_destroy
to xe spin lib to avoid code redundancy.
removed xe_cork* functions to avoid duplicate spinner code.
Signed-off-by: Pravalika Gurram <pravalika.gurram@intel.com>
---
lib/xe/xe_spin.c | 207 ++++++++++++++++++++++++++----------
lib/xe/xe_spin.h | 52 +++++----
tests/intel/xe_drm_fdinfo.c | 195 ++++++---------------------------
tests/intel/xe_vm.c | 17 +--
4 files changed, 226 insertions(+), 245 deletions(-)
diff --git a/lib/xe/xe_spin.c b/lib/xe/xe_spin.c
index 3adacc3a8..f7b51387c 100644
--- a/lib/xe/xe_spin.c
+++ b/lib/xe/xe_spin.c
@@ -292,77 +292,172 @@ void xe_spin_free(int fd, struct igt_spin *spin)
free(spin);
}
-void xe_cork_init(int fd, struct drm_xe_engine_class_instance *hwe,
- struct xe_cork *cork)
-{
- uint64_t addr = xe_get_default_alignment(fd);
- size_t bo_size = xe_bb_size(fd, SZ_4K);
- uint32_t vm, bo, exec_queue, syncobj;
- struct xe_spin *spin;
- struct drm_xe_sync sync = {
- .type = DRM_XE_SYNC_TYPE_SYNCOBJ, .flags = DRM_XE_SYNC_FLAG_SIGNAL,
- };
- struct drm_xe_exec exec = {
- .num_batch_buffer = 1,
- .num_syncs = 1,
- .syncs = to_user_pointer(&sync),
- };
-
- vm = xe_vm_create(fd, 0, 0);
+/**
+ * xe_cork_create:
+ * @fd: xe device fd
+ * @hwe: Xe engine class instance if device is Xe
+ * @vm: vm handle
+ * @width: number of batch buffers
+ * @num_placements: number of valid placements for this exec queue
+ * @opts: controlling options such as allocator handle, debug.
+ *
+ * xe_cork_create create vm, bo, exec_queue and bind the buffer
+ * using vmbind
+ *
+ * This returns xe_cork after binding buffer object.
+ */
- bo = xe_bo_create(fd, vm, bo_size, vram_if_possible(fd, hwe->gt_id),
- DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
- spin = xe_bo_map(fd, bo, 0x1000);
+struct xe_cork *
+xe_cork_create(int fd, struct drm_xe_engine_class_instance *hwe,
+ uint32_t vm, uint16_t width, uint16_t num_placements,
+ struct xe_cork_opts *opts)
+{
+ struct xe_cork *ctx = calloc(1, sizeof(*ctx));
+
+ igt_assert(ctx);
+ igt_assert(width && num_placements &&
+ (width == 1 || num_placements == 1));
+ igt_assert_lt(width, XE_MAX_ENGINE_INSTANCE);
+
+ ctx->class = hwe->engine_class;
+ ctx->width = width;
+ ctx->num_placements = num_placements;
+ ctx->vm = vm;
+ ctx->cork_opts.ahnd = opts->ahnd;
+ ctx->cork_opts.debug = opts->debug;
+
+ ctx->exec.num_batch_buffer = width;
+ ctx->exec.num_syncs = 2;
+ ctx->exec.syncs = to_user_pointer(ctx->sync);
+
+ ctx->sync[0].type = DRM_XE_SYNC_TYPE_SYNCOBJ;
+ ctx->sync[0].flags = DRM_XE_SYNC_FLAG_SIGNAL;
+ ctx->sync[0].handle = syncobj_create(fd, 0);
+
+ ctx->sync[1].type = DRM_XE_SYNC_TYPE_SYNCOBJ;
+ ctx->sync[1].flags = DRM_XE_SYNC_FLAG_SIGNAL;
+ ctx->sync[1].handle = syncobj_create(fd, 0);
+
+ ctx->bo_size = sizeof(struct xe_spin);
+ ctx->bo_size = xe_bb_size(fd, ctx->bo_size);
+ ctx->bo = xe_bo_create(fd, ctx->vm, ctx->bo_size,
+ vram_if_possible(fd, hwe->gt_id),
+ DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
+ if (ctx->cork_opts.ahnd) {
+ for (unsigned int i = 0; i < width; i++)
+ ctx->addr[i] = intel_allocator_alloc_with_strategy(ctx->cork_opts.ahnd,
+ ctx->bo, ctx->bo_size, 0,
+ ALLOC_STRATEGY_LOW_TO_HIGH);
+ } else {
+ for (unsigned int i = 0; i < width; i++)
+ ctx->addr[i] = 0x100000 + 0x100000 * hwe->engine_class;
+ }
- xe_vm_bind_sync(fd, vm, bo, 0, addr, bo_size);
+ ctx->spin = xe_bo_map(fd, ctx->bo, ctx->bo_size);
- exec_queue = xe_exec_queue_create(fd, vm, hwe, 0);
- syncobj = syncobj_create(fd, 0);
+ igt_assert_eq(__xe_exec_queue_create(fd, ctx->vm, width, num_placements,
+ hwe, 0, &ctx->exec_queue), 0);
- xe_spin_init_opts(spin, .addr = addr, .preempt = true);
- exec.exec_queue_id = exec_queue;
- exec.address = addr;
- sync.handle = syncobj;
- igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_EXEC, &exec), 0);
+ xe_vm_bind_async(fd, ctx->vm, 0, ctx->bo, 0, ctx->addr[0], ctx->bo_size,
+ ctx->sync, 1);
- cork->spin = spin;
- cork->fd = fd;
- cork->vm = vm;
- cork->bo = bo;
- cork->exec_queue = exec_queue;
- cork->syncobj = syncobj;
+ return ctx;
}
-bool xe_cork_started(struct xe_cork *cork)
+/**
+ * xe_cork_sync_start:
+ *
+ * @fd: xe device fd
+ * @ctx: pointer to xe_cork structure
+ *
+ * run the spinner using xe_spin_init submit batch using xe_exec
+ * and wait for fence using syncobj_wait
+ */
+void xe_cork_sync_start(int fd, struct xe_cork *ctx)
{
- return xe_spin_started(cork->spin);
-}
+ igt_assert(ctx);
-void xe_cork_wait_started(struct xe_cork *cork)
-{
- xe_spin_wait_started(cork->spin);
-}
+ ctx->spin_opts.addr = ctx->addr[0];
+ ctx->spin_opts.write_timestamp = true;
+ ctx->spin_opts.preempt = true;
+ xe_spin_init(ctx->spin, &ctx->spin_opts);
-void xe_cork_end(struct xe_cork *cork)
-{
- xe_spin_end(cork->spin);
-}
+ /* reuse sync[0] as in-fence for exec */
+ ctx->sync[0].flags &= ~DRM_XE_SYNC_FLAG_SIGNAL;
-void xe_cork_wait_done(struct xe_cork *cork)
-{
- igt_assert(syncobj_wait(cork->fd, &cork->syncobj, 1, INT64_MAX, 0,
- NULL));
+ ctx->exec.exec_queue_id = ctx->exec_queue;
+
+ if (ctx->width > 1)
+ ctx->exec.address = to_user_pointer(ctx->addr);
+ else
+ ctx->exec.address = ctx->addr[0];
+
+ xe_exec(fd, &ctx->exec);
+
+ xe_spin_wait_started(ctx->spin);
+ igt_assert(!syncobj_wait(fd, &ctx->sync[1].handle, 1, 1, 0, NULL));
+
+ if (ctx->cork_opts.debug)
+ igt_info("%d: spinner started\n", ctx->class);
}
-void xe_cork_fini(struct xe_cork *cork)
+/*
+ * xe_cork_sync_end
+ *
+ * @fd: xe device fd
+ * @ctx: pointer to xe_cork structure
+ *
+ * Wrapper to end spinner created by xe_cork_create. It will
+ * unbind the vm which was binded to the exec_queue and bo.
+ */
+void xe_cork_sync_end(int fd, struct xe_cork *ctx)
{
- syncobj_destroy(cork->fd, cork->syncobj);
- xe_exec_queue_destroy(cork->fd, cork->exec_queue);
- xe_vm_destroy(cork->fd, cork->vm);
- gem_close(cork->fd, cork->bo);
+
+ if (!ctx)
+ return;
+
+ if (ctx->ended)
+ igt_warn("Don't attempt call end twice %d\n", ctx->ended);
+
+ xe_spin_end(ctx->spin);
+
+ igt_assert(syncobj_wait(fd, &ctx->sync[1].handle, 1, INT64_MAX, 0, NULL));
+
+ ctx->sync[0].flags |= DRM_XE_SYNC_FLAG_SIGNAL;
+ syncobj_reset(fd, &ctx->sync[0].handle, 1);
+
+ xe_vm_unbind_async(fd, ctx->vm, 0, 0, ctx->addr[0], ctx->bo_size, ctx->sync, 1);
+ igt_assert(syncobj_wait(fd, &ctx->sync[0].handle, 1, INT64_MAX, 0, NULL));
+
+ ctx->ended = true;
+
+ if (ctx->cork_opts.debug)
+ igt_info("%d: spinner ended (timestamp=%u)\n", ctx->class,
+ ctx->spin->timestamp);
}
-uint32_t xe_cork_sync_handle(struct xe_cork *cork)
+/*
+ * xe_cork_destroy
+ *
+ * @fd: xe device fd
+ * @ctx: pointer to xe_cork structure
+ *
+ * It will destroy vm, exec_queue and free the ctx.
+ */
+void xe_cork_destroy(int fd, struct xe_cork *ctx)
{
- return cork->syncobj;
+ if (!ctx)
+ return;
+
+ syncobj_destroy(fd, ctx->sync[0].handle);
+ syncobj_destroy(fd, ctx->sync[1].handle);
+ xe_exec_queue_destroy(fd, ctx->exec_queue);
+
+ if (ctx->cork_opts.ahnd)
+ put_ahnd(ctx->cork_opts.ahnd);
+
+ munmap(ctx->spin, ctx->bo_size);
+ gem_close(fd, ctx->bo);
+
+ free(ctx);
}
diff --git a/lib/xe/xe_spin.h b/lib/xe/xe_spin.h
index d65adb05c..593065bc0 100644
--- a/lib/xe/xe_spin.h
+++ b/lib/xe/xe_spin.h
@@ -32,6 +32,11 @@ struct xe_spin_opts {
bool write_timestamp;
};
+struct xe_cork_opts {
+ uint64_t ahnd;
+ bool debug;
+};
+
/* Mapped GPU object */
struct xe_spin {
uint32_t batch[128];
@@ -43,9 +48,36 @@ struct xe_spin {
uint32_t timestamp;
};
+struct xe_cork {
+ struct xe_spin *spin;
+ int fd;
+ uint32_t vm;
+ uint32_t bo;
+ uint32_t exec_queue;
+ uint32_t syncobj;
+ uint64_t addr[XE_MAX_ENGINE_INSTANCE];
+ struct drm_xe_sync sync[2];
+ struct drm_xe_exec exec;
+ size_t bo_size;
+ struct xe_spin_opts spin_opts;
+ struct xe_cork_opts cork_opts;
+ bool ended;
+ uint16_t class;
+ uint16_t width;
+ uint16_t num_placements;
+};
+
igt_spin_t *xe_spin_create(int fd, const struct igt_spin_factory *opt);
uint32_t duration_to_ctx_ticks(int fd, int gt_id, uint64_t ns);
void xe_spin_init(struct xe_spin *spin, struct xe_spin_opts *opts);
+struct xe_cork *
+xe_cork_create(int fd, struct drm_xe_engine_class_instance *hwe, uint32_t vm,
+ uint16_t width, uint16_t num_placements, struct xe_cork_opts *opts);
+void xe_cork_destroy(int fd, struct xe_cork *ctx);
+
+#define xe_cork_create_opts(fd, hwe, vm, width, num_placements, ...) \
+ xe_cork_create(fd, hwe, vm, width, num_placements, \
+ &((struct xe_cork_opts){__VA_ARGS__}))
#define xe_spin_init_opts(fd, ...) \
xe_spin_init(fd, &((struct xe_spin_opts){__VA_ARGS__}))
@@ -55,23 +87,7 @@ void xe_spin_sync_wait(int fd, struct igt_spin *spin);
void xe_spin_wait_started(struct xe_spin *spin);
void xe_spin_end(struct xe_spin *spin);
void xe_spin_free(int fd, struct igt_spin *spin);
-
-struct xe_cork {
- struct xe_spin *spin;
- int fd;
- uint32_t vm;
- uint32_t bo;
- uint32_t exec_queue;
- uint32_t syncobj;
-};
-
-void xe_cork_init(int fd, struct drm_xe_engine_class_instance *hwe,
- struct xe_cork *cork);
-bool xe_cork_started(struct xe_cork *cork);
-void xe_cork_wait_started(struct xe_cork *cork);
-void xe_cork_end(struct xe_cork *cork);
-void xe_cork_wait_done(struct xe_cork *cork);
-void xe_cork_fini(struct xe_cork *cork);
-uint32_t xe_cork_sync_handle(struct xe_cork *cork);
+void xe_cork_sync_start(int fd, struct xe_cork *ctx);
+void xe_cork_sync_end(int fd, struct xe_cork *ctx);
#endif /* XE_SPIN_H */
diff --git a/tests/intel/xe_drm_fdinfo.c b/tests/intel/xe_drm_fdinfo.c
index ef9273e2a..66a181d5b 100644
--- a/tests/intel/xe_drm_fdinfo.c
+++ b/tests/intel/xe_drm_fdinfo.c
@@ -367,133 +367,6 @@ static void basic_engine_utilization(int xe)
igt_require(info.num_engines);
}
-struct spin_ctx {
- uint32_t vm;
- uint64_t addr[XE_MAX_ENGINE_INSTANCE];
- struct drm_xe_sync sync[2];
- struct drm_xe_exec exec;
- uint32_t exec_queue;
- size_t bo_size;
- uint32_t bo;
- struct xe_spin *spin;
- struct xe_spin_opts spin_opts;
- bool ended;
- uint16_t class;
- uint16_t width;
- uint16_t num_placements;
-};
-
-static struct spin_ctx *
-spin_ctx_init(int fd, struct drm_xe_engine_class_instance *hwe, uint32_t vm,
- uint16_t width, uint16_t num_placements)
-{
- struct spin_ctx *ctx = calloc(1, sizeof(*ctx));
-
- igt_assert(width && num_placements &&
- (width == 1 || num_placements == 1));
- igt_assert_lt(width, XE_MAX_ENGINE_INSTANCE);
-
- ctx->class = hwe->engine_class;
- ctx->width = width;
- ctx->num_placements = num_placements;
- ctx->vm = vm;
-
- for (unsigned int i = 0; i < width; i++)
- ctx->addr[i] = 0x100000 + 0x100000 * hwe->engine_class;
-
- ctx->exec.num_batch_buffer = width;
- ctx->exec.num_syncs = 2;
- ctx->exec.syncs = to_user_pointer(ctx->sync);
-
- ctx->sync[0].type = DRM_XE_SYNC_TYPE_SYNCOBJ;
- ctx->sync[0].flags = DRM_XE_SYNC_FLAG_SIGNAL;
- ctx->sync[0].handle = syncobj_create(fd, 0);
-
- ctx->sync[1].type = DRM_XE_SYNC_TYPE_SYNCOBJ;
- ctx->sync[1].flags = DRM_XE_SYNC_FLAG_SIGNAL;
- ctx->sync[1].handle = syncobj_create(fd, 0);
-
- ctx->bo_size = sizeof(struct xe_spin);
- ctx->bo_size = xe_bb_size(fd, ctx->bo_size);
- ctx->bo = xe_bo_create(fd, ctx->vm, ctx->bo_size,
- vram_if_possible(fd, hwe->gt_id),
- DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
- ctx->spin = xe_bo_map(fd, ctx->bo, ctx->bo_size);
-
- igt_assert_eq(__xe_exec_queue_create(fd, ctx->vm, width, num_placements,
- hwe, 0, &ctx->exec_queue), 0);
-
- xe_vm_bind_async(fd, ctx->vm, 0, ctx->bo, 0, ctx->addr[0], ctx->bo_size,
- ctx->sync, 1);
-
- return ctx;
-}
-
-static void
-spin_sync_start(int fd, struct spin_ctx *ctx)
-{
- if (!ctx)
- return;
-
- ctx->spin_opts.addr = ctx->addr[0];
- ctx->spin_opts.write_timestamp = true;
- ctx->spin_opts.preempt = true;
- xe_spin_init(ctx->spin, &ctx->spin_opts);
-
- /* re-use sync[0] for exec */
- ctx->sync[0].flags &= ~DRM_XE_SYNC_FLAG_SIGNAL;
-
- ctx->exec.exec_queue_id = ctx->exec_queue;
-
- if (ctx->width > 1)
- ctx->exec.address = to_user_pointer(ctx->addr);
- else
- ctx->exec.address = ctx->addr[0];
-
- xe_exec(fd, &ctx->exec);
-
- xe_spin_wait_started(ctx->spin);
- igt_assert(!syncobj_wait(fd, &ctx->sync[1].handle, 1, 1, 0, NULL));
-
- igt_debug("%s: spinner started\n", engine_map[ctx->class]);
-}
-
-static void
-spin_sync_end(int fd, struct spin_ctx *ctx)
-{
- if (!ctx || ctx->ended)
- return;
-
- xe_spin_end(ctx->spin);
-
- igt_assert(syncobj_wait(fd, &ctx->sync[1].handle, 1, INT64_MAX, 0, NULL));
- igt_assert(syncobj_wait(fd, &ctx->sync[0].handle, 1, INT64_MAX, 0, NULL));
-
- ctx->sync[0].flags |= DRM_XE_SYNC_FLAG_SIGNAL;
- xe_vm_unbind_async(fd, ctx->vm, 0, 0, ctx->addr[0], ctx->bo_size, ctx->sync, 1);
- igt_assert(syncobj_wait(fd, &ctx->sync[0].handle, 1, INT64_MAX, 0, NULL));
-
- ctx->ended = true;
- igt_debug("%s: spinner ended (timestamp=%u)\n", engine_map[ctx->class],
- ctx->spin->timestamp);
-}
-
-static void
-spin_ctx_destroy(int fd, struct spin_ctx *ctx)
-{
- if (!ctx)
- return;
-
- syncobj_destroy(fd, ctx->sync[0].handle);
- syncobj_destroy(fd, ctx->sync[1].handle);
- xe_exec_queue_destroy(fd, ctx->exec_queue);
-
- munmap(ctx->spin, ctx->bo_size);
- gem_close(fd, ctx->bo);
-
- free(ctx);
-}
-
static void
check_results(struct pceu_cycles *s1, struct pceu_cycles *s2,
int class, int width, enum expected_load expected_load)
@@ -535,7 +408,7 @@ utilization_single(int fd, struct drm_xe_engine_class_instance *hwe, unsigned in
{
struct pceu_cycles pceu1[2][DRM_XE_ENGINE_CLASS_COMPUTE + 1];
struct pceu_cycles pceu2[2][DRM_XE_ENGINE_CLASS_COMPUTE + 1];
- struct spin_ctx *ctx = NULL;
+ struct xe_cork *ctx = NULL;
enum expected_load expected_load;
uint32_t vm;
int new_fd;
@@ -545,8 +418,8 @@ utilization_single(int fd, struct drm_xe_engine_class_instance *hwe, unsigned in
vm = xe_vm_create(fd, 0, 0);
if (flags & TEST_BUSY) {
- ctx = spin_ctx_init(fd, hwe, vm, 1, 1);
- spin_sync_start(fd, ctx);
+ ctx = xe_cork_create_opts(fd, hwe, vm, 1, 1);
+ xe_cork_sync_start(fd, ctx);
}
read_engine_cycles(fd, pceu1[0]);
@@ -555,7 +428,7 @@ utilization_single(int fd, struct drm_xe_engine_class_instance *hwe, unsigned in
usleep(batch_duration_usec);
if (flags & TEST_TRAILING_IDLE)
- spin_sync_end(fd, ctx);
+ xe_cork_sync_end(fd, ctx);
read_engine_cycles(fd, pceu2[0]);
if (flags & TEST_ISOLATION)
@@ -574,8 +447,7 @@ utilization_single(int fd, struct drm_xe_engine_class_instance *hwe, unsigned in
close(new_fd);
}
- spin_sync_end(fd, ctx);
- spin_ctx_destroy(fd, ctx);
+ xe_cork_destroy(fd, ctx);
xe_vm_destroy(fd, vm);
}
@@ -584,19 +456,19 @@ utilization_single_destroy_queue(int fd, struct drm_xe_engine_class_instance *hw
{
struct pceu_cycles pceu1[DRM_XE_ENGINE_CLASS_COMPUTE + 1];
struct pceu_cycles pceu2[DRM_XE_ENGINE_CLASS_COMPUTE + 1];
- struct spin_ctx *ctx = NULL;
+ struct xe_cork *ctx = NULL;
uint32_t vm;
vm = xe_vm_create(fd, 0, 0);
- ctx = spin_ctx_init(fd, hwe, vm, 1, 1);
- spin_sync_start(fd, ctx);
+ ctx = xe_cork_create_opts(fd, hwe, vm, 1, 1);
+ xe_cork_sync_start(fd, ctx);
read_engine_cycles(fd, pceu1);
usleep(batch_duration_usec);
/* destroy queue before sampling again */
- spin_sync_end(fd, ctx);
- spin_ctx_destroy(fd, ctx);
+ xe_cork_sync_end(fd, ctx);
+ xe_cork_destroy(fd, ctx);
read_engine_cycles(fd, pceu2);
@@ -610,18 +482,17 @@ utilization_others_idle(int fd, struct drm_xe_engine_class_instance *hwe)
{
struct pceu_cycles pceu1[DRM_XE_ENGINE_CLASS_COMPUTE + 1];
struct pceu_cycles pceu2[DRM_XE_ENGINE_CLASS_COMPUTE + 1];
- struct spin_ctx *ctx = NULL;
+ struct xe_cork *ctx = NULL;
uint32_t vm;
int class;
vm = xe_vm_create(fd, 0, 0);
-
- ctx = spin_ctx_init(fd, hwe, vm, 1, 1);
- spin_sync_start(fd, ctx);
+ ctx = xe_cork_create_opts(fd, hwe, vm, 1, 1);
+ xe_cork_sync_start(fd, ctx);
read_engine_cycles(fd, pceu1);
usleep(batch_duration_usec);
- spin_sync_end(fd, ctx);
+ xe_cork_sync_end(fd, ctx);
read_engine_cycles(fd, pceu2);
xe_for_each_engine_class(class) {
@@ -631,8 +502,7 @@ utilization_others_idle(int fd, struct drm_xe_engine_class_instance *hwe)
check_results(pceu1, pceu2, class, 1, expected_load);
}
- spin_sync_end(fd, ctx);
- spin_ctx_destroy(fd, ctx);
+ xe_cork_destroy(fd, ctx);
xe_vm_destroy(fd, vm);
}
@@ -641,7 +511,7 @@ utilization_others_full_load(int fd, struct drm_xe_engine_class_instance *hwe)
{
struct pceu_cycles pceu1[DRM_XE_ENGINE_CLASS_COMPUTE + 1];
struct pceu_cycles pceu2[DRM_XE_ENGINE_CLASS_COMPUTE + 1];
- struct spin_ctx *ctx[DRM_XE_ENGINE_CLASS_COMPUTE + 1] = {};
+ struct xe_cork *ctx[DRM_XE_ENGINE_CLASS_COMPUTE + 1] = {};
struct drm_xe_engine_class_instance *_hwe;
uint32_t vm;
int class;
@@ -654,15 +524,14 @@ utilization_others_full_load(int fd, struct drm_xe_engine_class_instance *hwe)
if (_class == hwe->engine_class || ctx[_class])
continue;
-
- ctx[_class] = spin_ctx_init(fd, _hwe, vm, 1, 1);
- spin_sync_start(fd, ctx[_class]);
+ ctx[_class] = xe_cork_create_opts(fd, _hwe, vm, 1, 1);
+ xe_cork_sync_start(fd, ctx[_class]);
}
read_engine_cycles(fd, pceu1);
usleep(batch_duration_usec);
xe_for_each_engine_class(class)
- spin_sync_end(fd, ctx[class]);
+ xe_cork_sync_end(fd, ctx[class]);
read_engine_cycles(fd, pceu2);
xe_for_each_engine_class(class) {
@@ -673,8 +542,7 @@ utilization_others_full_load(int fd, struct drm_xe_engine_class_instance *hwe)
continue;
check_results(pceu1, pceu2, class, 1, expected_load);
- spin_sync_end(fd, ctx[class]);
- spin_ctx_destroy(fd, ctx[class]);
+ xe_cork_destroy(fd, ctx[class]);
}
xe_vm_destroy(fd, vm);
@@ -685,7 +553,7 @@ utilization_all_full_load(int fd)
{
struct pceu_cycles pceu1[DRM_XE_ENGINE_CLASS_COMPUTE + 1];
struct pceu_cycles pceu2[DRM_XE_ENGINE_CLASS_COMPUTE + 1];
- struct spin_ctx *ctx[DRM_XE_ENGINE_CLASS_COMPUTE + 1] = {};
+ struct xe_cork *ctx[DRM_XE_ENGINE_CLASS_COMPUTE + 1] = {};
struct drm_xe_engine_class_instance *hwe;
uint32_t vm;
int class;
@@ -697,15 +565,14 @@ utilization_all_full_load(int fd)
class = hwe->engine_class;
if (ctx[class])
continue;
-
- ctx[class] = spin_ctx_init(fd, hwe, vm, 1, 1);
- spin_sync_start(fd, ctx[class]);
+ ctx[class] = xe_cork_create_opts(fd, hwe, vm, 1, 1);
+ xe_cork_sync_start(fd, ctx[class]);
}
read_engine_cycles(fd, pceu1);
usleep(batch_duration_usec);
xe_for_each_engine_class(class)
- spin_sync_end(fd, ctx[class]);
+ xe_cork_sync_end(fd, ctx[class]);
read_engine_cycles(fd, pceu2);
xe_for_each_engine_class(class) {
@@ -713,8 +580,7 @@ utilization_all_full_load(int fd)
continue;
check_results(pceu1, pceu2, class, 1, EXPECTED_LOAD_FULL);
- spin_sync_end(fd, ctx[class]);
- spin_ctx_destroy(fd, ctx[class]);
+ xe_cork_destroy(fd, ctx[class]);
}
xe_vm_destroy(fd, vm);
@@ -741,7 +607,7 @@ utilization_multi(int fd, int gt, int class, unsigned int flags)
struct pceu_cycles pceu[2][DRM_XE_ENGINE_CLASS_COMPUTE + 1];
struct pceu_cycles pceu_spill[2][DRM_XE_ENGINE_CLASS_COMPUTE + 1];
struct drm_xe_engine_class_instance eci[XE_MAX_ENGINE_INSTANCE];
- struct spin_ctx *ctx = NULL;
+ struct xe_cork *ctx = NULL;
enum expected_load expected_load;
int fd_spill, num_placements;
uint32_t vm;
@@ -767,8 +633,8 @@ utilization_multi(int fd, int gt, int class, unsigned int flags)
vm = xe_vm_create(fd, 0, 0);
if (flags & TEST_BUSY) {
- ctx = spin_ctx_init(fd, eci, vm, width, num_placements);
- spin_sync_start(fd, ctx);
+ ctx = xe_cork_create_opts(fd, eci, vm, width, num_placements);
+ xe_cork_sync_start(fd, ctx);
}
read_engine_cycles(fd, pceu[0]);
@@ -777,7 +643,7 @@ utilization_multi(int fd, int gt, int class, unsigned int flags)
usleep(batch_duration_usec);
if (flags & TEST_TRAILING_IDLE)
- spin_sync_end(fd, ctx);
+ xe_cork_sync_end(fd, ctx);
read_engine_cycles(fd, pceu[1]);
if (flags & TEST_ISOLATION)
@@ -797,8 +663,7 @@ utilization_multi(int fd, int gt, int class, unsigned int flags)
close(fd_spill);
}
- spin_sync_end(fd, ctx);
- spin_ctx_destroy(fd, ctx);
+ xe_cork_destroy(fd, ctx);
xe_vm_destroy(fd, vm);
}
diff --git a/tests/intel/xe_vm.c b/tests/intel/xe_vm.c
index e78ddd0e5..705805de2 100644
--- a/tests/intel/xe_vm.c
+++ b/tests/intel/xe_vm.c
@@ -945,18 +945,23 @@ test_bind_array(int fd, struct drm_xe_engine_class_instance *eci, int n_execs,
sync[0].handle = syncobj_create(fd, 0);
if (flags & BIND_ARRAY_ENOBUFS_FLAG) {
- struct xe_cork cork;
+ struct xe_cork *ctx = NULL;
+ uint32_t vm_cork;
- xe_cork_init(fd, eci, &cork);
+ vm_cork = xe_vm_create(fd, 0, 0);
+ ctx = xe_cork_create_opts(fd, eci, vm_cork, 1, 1, .debug = true);
+ xe_cork_sync_start(fd, ctx);
- sync[1].handle = xe_cork_sync_handle(&cork);
+ sync[1].handle = ctx->sync[1].handle;
sync[1].flags &= ~DRM_XE_SYNC_FLAG_SIGNAL;
xe_vm_bind_array_err(fd, vm, bind_exec_queue, bind_ops,
n_execs, sync, 2, ENOBUFS);
- xe_cork_end(&cork);
- xe_cork_wait_done(&cork);
- xe_cork_fini(&cork);
+ /* destroy queue before sampling again */
+ xe_cork_sync_end(fd, ctx);
+ xe_cork_destroy(fd, ctx);
+ xe_vm_destroy(fd, vm_cork);
+
n_execs = n_execs / 4;
}
--
2.34.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v7 2/2] tests/xe_spin_batch: Add spin-timestamp-check
2024-12-11 8:58 [PATCH v7 0/2] tests/xe_spin_batch: Add spin-timestamp-check Pravalika Gurram
2024-12-11 8:58 ` [PATCH v7 1/2] lib/xe/xe_spin: move the spinner related functions to lib Pravalika Gurram
@ 2024-12-11 8:58 ` Pravalika Gurram
2024-12-11 9:34 ` ✓ Xe.CI.BAT: success for tests/xe_spin_batch: Add spin-timestamp-check (rev7) Patchwork
` (2 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Pravalika Gurram @ 2024-12-11 8:58 UTC (permalink / raw)
To: igt-dev; +Cc: zbigniew.kempczynski, Pravalika Gurram
check the ctx_timestamp register post gt reset for each engine.
Signed-off-by: Pravalika Gurram <pravalika.gurram@intel.com>
---
tests/intel/xe_spin_batch.c | 121 ++++++++++++++++++++++++++++++++++++
1 file changed, 121 insertions(+)
diff --git a/tests/intel/xe_spin_batch.c b/tests/intel/xe_spin_batch.c
index 9314e229e..00299fcdf 100644
--- a/tests/intel/xe_spin_batch.c
+++ b/tests/intel/xe_spin_batch.c
@@ -309,6 +309,121 @@ static void xe_spin_fixed_duration(int fd, int gt, int class, int flags)
put_ahnd(ahnd);
}
+static void exec_store(int fd, struct drm_xe_engine_class_instance *eci,
+ bool hang)
+{
+ uint64_t ahnd, bb_size, bb_addr;
+ uint32_t vm, exec_queue, bb;
+#define USER_FENCE_VALUE 0xdeadbeefdeadbeefull
+ struct drm_xe_sync syncobj = {
+ .type = DRM_XE_SYNC_TYPE_USER_FENCE,
+ .flags = DRM_XE_SYNC_FLAG_SIGNAL,
+ .timeline_value = USER_FENCE_VALUE,
+ };
+
+ struct drm_xe_exec exec = {
+ .num_batch_buffer = 1,
+ .num_syncs = 1,
+ .syncs = to_user_pointer(&syncobj),
+ };
+ struct {
+ uint32_t batch[16];
+ uint64_t pad;
+ uint32_t data;
+ uint64_t vm_sync;
+ uint64_t exec_sync;
+ } *data;
+ uint64_t batch_offset, batch_addr, sdi_offset, sdi_addr;
+ int64_t timeout = NSEC_PER_SEC;
+ int i, ret;
+
+ ahnd = intel_allocator_open(fd, 0, INTEL_ALLOCATOR_RELOC);
+
+ vm = xe_vm_create(fd, 0, 0);
+ exec_queue = xe_exec_queue_create(fd, vm, eci, 0);
+ bb_size = xe_bb_size(fd, sizeof(*data));
+ bb = xe_bo_create(fd, vm, bb_size, vram_if_possible(fd, eci->gt_id), 0);
+ bb_addr = intel_allocator_alloc_with_strategy(ahnd, bb, bb_size, 0,
+ ALLOC_STRATEGY_LOW_TO_HIGH);
+ data = xe_bo_map(fd, bb, bb_size);
+ syncobj.addr = to_user_pointer(&data->vm_sync);
+ xe_vm_bind_async(fd, vm, 0, bb, 0, bb_addr, bb_size, &syncobj, 1);
+ xe_wait_ufence(fd, &data->vm_sync, USER_FENCE_VALUE, 0, NSEC_PER_SEC);
+
+ batch_offset = (char *)&data->batch - (char *)data;
+ batch_addr = bb_addr + batch_offset;
+ sdi_offset = (char *)&data->data - (char *)data;
+ sdi_addr = bb_addr + sdi_offset;
+
+ i = 0;
+
+ data->batch[i++] = MI_STORE_DWORD_IMM_GEN4;
+ data->batch[i++] = sdi_addr;
+ data->batch[i++] = sdi_addr >> 32;
+ data->batch[i++] = 0;
+ if (!hang)
+ data->batch[i++] = MI_BATCH_BUFFER_END;
+ igt_assert(i <= ARRAY_SIZE(data->batch));
+
+ syncobj.addr = bb_addr + (char *)&data->exec_sync - (char *)data;
+ exec.exec_queue_id = exec_queue;
+ exec.address = batch_addr;
+ xe_exec(fd, &exec);
+ ret = __xe_wait_ufence(fd, &data->exec_sync, USER_FENCE_VALUE, 0, &timeout);
+ igt_assert(hang ? ret < 0 : ret == 0);
+
+ munmap(data, bb_size);
+ gem_close(fd, bb);
+
+ xe_exec_queue_destroy(fd, exec_queue);
+ xe_vm_destroy(fd, vm);
+
+ put_ahnd(ahnd);
+}
+
+static void run_spinner(int fd, struct drm_xe_engine_class_instance *eci)
+{
+ struct xe_cork *ctx = NULL;
+ uint32_t vm;
+ uint32_t ts_1, ts_2;
+ uint64_t ahnd;
+
+ vm = xe_vm_create(fd, 0, 0);
+ ahnd = intel_allocator_open(fd, 0, INTEL_ALLOCATOR_RELOC);
+ ctx = xe_cork_create_opts(fd, eci, vm, 1, 1, .ahnd = ahnd);
+ xe_cork_sync_start(fd, ctx);
+
+ /* Collect and check timestamps before stopping the spinner */
+ usleep(50000);
+ ts_1 = READ_ONCE(ctx->spin->timestamp);
+ usleep(50000);
+ ts_2 = READ_ONCE(ctx->spin->timestamp);
+ igt_assert_neq_u32(ts_1, ts_2);
+
+ xe_cork_sync_end(fd, ctx);
+ xe_cork_destroy(fd, ctx);
+
+ xe_vm_destroy(fd, vm);
+ put_ahnd(ahnd);
+}
+
+#define TRUE 1
+#define FALSE 0
+/**
+ * SUBTEST: spin-timestamp-check
+ * Description: Intiate gt reset then check the timestamp register for each engine.
+ * Test category: functionality test
+ */
+static void xe_spin_timestamp_check(int fd, struct drm_xe_engine_class_instance *eci)
+{
+ /*sanity check for exec submission*/
+ exec_store(fd, eci, FALSE);
+
+ exec_store(fd, eci, TRUE);
+
+ run_spinner(fd, eci);
+}
+
igt_main
{
struct drm_xe_engine_class_instance *hwe;
@@ -343,6 +458,12 @@ igt_main
xe_for_each_engine_class(class)
xe_spin_fixed_duration(fd, gt, class, SPIN_FIX_DURATION_PREEMPT);
+ igt_subtest_with_dynamic("spin-timestamp-check")
+ xe_for_each_engine(fd, hwe) {
+ igt_dynamic_f("engine-%s", xe_engine_class_string(hwe->engine_class))
+ xe_spin_timestamp_check(fd, hwe);
+ }
+
igt_fixture
drm_close_driver(fd);
}
--
2.34.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* ✓ Xe.CI.BAT: success for tests/xe_spin_batch: Add spin-timestamp-check (rev7)
2024-12-11 8:58 [PATCH v7 0/2] tests/xe_spin_batch: Add spin-timestamp-check Pravalika Gurram
2024-12-11 8:58 ` [PATCH v7 1/2] lib/xe/xe_spin: move the spinner related functions to lib Pravalika Gurram
2024-12-11 8:58 ` [PATCH v7 2/2] tests/xe_spin_batch: Add spin-timestamp-check Pravalika Gurram
@ 2024-12-11 9:34 ` Patchwork
2024-12-11 9:38 ` ✗ i915.CI.BAT: failure " Patchwork
2024-12-11 10:18 ` ✗ Xe.CI.Full: " Patchwork
4 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2024-12-11 9:34 UTC (permalink / raw)
To: Pravalika Gurram; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 2476 bytes --]
== Series Details ==
Series: tests/xe_spin_batch: Add spin-timestamp-check (rev7)
URL : https://patchwork.freedesktop.org/series/140933/
State : success
== Summary ==
CI Bug Log - changes from XEIGT_8147_BAT -> XEIGTPW_12290_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (8 -> 8)
------------------------------
No changes in participating hosts
New tests
---------
New tests have been introduced between XEIGT_8147_BAT and XEIGTPW_12290_BAT:
### New IGT tests (3) ###
* igt@xe_pat@pat-index-xehpc@blt:
- Statuses : 1 pass(s)
- Exec time: [3.82] s
* igt@xe_pat@pat-index-xehpc@dw:
- Statuses : 1 pass(s)
- Exec time: [3.51] s
* igt@xe_pat@pat-index-xehpc@render:
- Statuses : 1 skip(s)
- Exec time: [0.0] s
Known issues
------------
Here are the changes found in XEIGTPW_12290_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size:
- bat-lnl-1: [PASS][1] -> [DMESG-WARN][2] ([Intel XE#3729])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/bat-lnl-1/igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/bat-lnl-1/igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size.html
#### Possible fixes ####
* igt@kms_flip@basic-flip-vs-dpms@a-edp1:
- bat-lnl-1: [DMESG-WARN][3] ([Intel XE#3729]) -> [PASS][4] +1 other test pass
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/bat-lnl-1/igt@kms_flip@basic-flip-vs-dpms@a-edp1.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/bat-lnl-1/igt@kms_flip@basic-flip-vs-dpms@a-edp1.html
[Intel XE#3729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3729
Build changes
-------------
* IGT: IGT_8147 -> IGTPW_12290
* Linux: xe-2345-afdbad14a16d9f44489fe37a05e93b24581bdc4f -> xe-2349-7bbcd7df9387f0d9004f997df33f7a9472d9c080
IGTPW_12290: 12290
IGT_8147: df65b61f81a5cc919c10ff9c5ed516b45364135c @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-2345-afdbad14a16d9f44489fe37a05e93b24581bdc4f: afdbad14a16d9f44489fe37a05e93b24581bdc4f
xe-2349-7bbcd7df9387f0d9004f997df33f7a9472d9c080: 7bbcd7df9387f0d9004f997df33f7a9472d9c080
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/index.html
[-- Attachment #2: Type: text/html, Size: 3249 bytes --]
^ permalink raw reply [flat|nested] 7+ messages in thread
* ✗ i915.CI.BAT: failure for tests/xe_spin_batch: Add spin-timestamp-check (rev7)
2024-12-11 8:58 [PATCH v7 0/2] tests/xe_spin_batch: Add spin-timestamp-check Pravalika Gurram
` (2 preceding siblings ...)
2024-12-11 9:34 ` ✓ Xe.CI.BAT: success for tests/xe_spin_batch: Add spin-timestamp-check (rev7) Patchwork
@ 2024-12-11 9:38 ` Patchwork
2024-12-11 10:18 ` ✗ Xe.CI.Full: " Patchwork
4 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2024-12-11 9:38 UTC (permalink / raw)
To: Pravalika Gurram; +Cc: igt-dev
== Series Details ==
Series: tests/xe_spin_batch: Add spin-timestamp-check (rev7)
URL : https://patchwork.freedesktop.org/series/140933/
State : failure
== Summary ==
CI Bug Log - changes from IGT_8147 -> IGTPW_12290
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with IGTPW_12290 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_12290, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12290/index.html
Participating hosts (45 -> 45)
------------------------------
Additional (1): fi-ivb-3770
Missing (1): fi-snb-2520m
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_12290:
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@live@requests:
- bat-apl-1: [PASS][1] -> [DMESG-FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8147/bat-apl-1/igt@i915_selftest@live@requests.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12290/bat-apl-1/igt@i915_selftest@live@requests.html
Known issues
------------
Here are the changes found in IGTPW_12290 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live:
- bat-mtlp-8: [PASS][3] -> [ABORT][4] ([i915#12061]) +1 other test abort
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8147/bat-mtlp-8/igt@i915_selftest@live.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12290/bat-mtlp-8/igt@i915_selftest@live.html
- bat-apl-1: [PASS][5] -> [DMESG-FAIL][6] ([i915#12435])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8147/bat-apl-1/igt@i915_selftest@live.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12290/bat-apl-1/igt@i915_selftest@live.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-b-vga-1:
- fi-ivb-3770: NOTRUN -> [SKIP][7] +23 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12290/fi-ivb-3770/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-b-vga-1.html
#### Possible fixes ####
* igt@dmabuf@all-tests:
- bat-apl-1: [INCOMPLETE][8] ([i915#12904]) -> [PASS][9] +1 other test pass
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8147/bat-apl-1/igt@dmabuf@all-tests.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12290/bat-apl-1/igt@dmabuf@all-tests.html
* igt@i915_module_load@reload:
- fi-cfl-8109u: [DMESG-WARN][10] ([i915#11621] / [i915#1982]) -> [PASS][11]
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8147/fi-cfl-8109u/igt@i915_module_load@reload.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12290/fi-cfl-8109u/igt@i915_module_load@reload.html
* igt@i915_selftest@live@late_gt_pm:
- fi-cfl-8109u: [DMESG-WARN][12] ([i915#11621]) -> [PASS][13] +131 other tests pass
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8147/fi-cfl-8109u/igt@i915_selftest@live@late_gt_pm.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12290/fi-cfl-8109u/igt@i915_selftest@live@late_gt_pm.html
* igt@kms_chamelium_edid@dp-edid-read:
- bat-dg2-13: [FAIL][14] ([i915#12505]) -> [PASS][15]
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8147/bat-dg2-13/igt@kms_chamelium_edid@dp-edid-read.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12290/bat-dg2-13/igt@kms_chamelium_edid@dp-edid-read.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-dg2-11: [SKIP][16] ([i915#9197]) -> [PASS][17] +2 other tests pass
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8147/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12290/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#11621]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11621
[i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
[i915#12435]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12435
[i915#12505]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12505
[i915#12904]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12904
[i915#1982]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1982
[i915#9197]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9197
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_8147 -> IGTPW_12290
* Linux: CI_DRM_15814 -> CI_DRM_15817
CI-20190529: 20190529
CI_DRM_15814: 6966a52cb5531bf6cc785fadba160a71cd31e7aa @ git://anongit.freedesktop.org/gfx-ci/linux
CI_DRM_15817: 7bbcd7df9387f0d9004f997df33f7a9472d9c080 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_12290: 12290
IGT_8147: df65b61f81a5cc919c10ff9c5ed516b45364135c @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12290/index.html
^ permalink raw reply [flat|nested] 7+ messages in thread
* ✗ Xe.CI.Full: failure for tests/xe_spin_batch: Add spin-timestamp-check (rev7)
2024-12-11 8:58 [PATCH v7 0/2] tests/xe_spin_batch: Add spin-timestamp-check Pravalika Gurram
` (3 preceding siblings ...)
2024-12-11 9:38 ` ✗ i915.CI.BAT: failure " Patchwork
@ 2024-12-11 10:18 ` Patchwork
4 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2024-12-11 10:18 UTC (permalink / raw)
To: Pravalika Gurram; +Cc: igt-dev
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== Series Details ==
Series: tests/xe_spin_batch: Add spin-timestamp-check (rev7)
URL : https://patchwork.freedesktop.org/series/140933/
State : failure
== Summary ==
CI Bug Log - changes from XEIGT_8147_full -> XEIGTPW_12290_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with XEIGTPW_12290_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in XEIGTPW_12290_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in XEIGTPW_12290_full:
### IGT changes ###
#### Possible regressions ####
* igt@kms_plane@plane-position-hole-dpms@pipe-a-plane-1:
- shard-bmg: [PASS][1] -> [DMESG-WARN][2] +1 other test dmesg-warn
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-8/igt@kms_plane@plane-position-hole-dpms@pipe-a-plane-1.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-5/igt@kms_plane@plane-position-hole-dpms@pipe-a-plane-1.html
New tests
---------
New tests have been introduced between XEIGT_8147_full and XEIGTPW_12290_full:
### New IGT tests (6) ###
* igt@xe_spin_batch@spin-timestamp-check:
- Statuses : 2 pass(s)
- Exec time: [5.73, 8.04] s
* igt@xe_spin_batch@spin-timestamp-check@engine-drm_xe_engine_class_compute:
- Statuses : 2 pass(s)
- Exec time: [1.15] s
* igt@xe_spin_batch@spin-timestamp-check@engine-drm_xe_engine_class_copy:
- Statuses : 2 pass(s)
- Exec time: [1.14, 1.15] s
* igt@xe_spin_batch@spin-timestamp-check@engine-drm_xe_engine_class_render:
- Statuses : 2 pass(s)
- Exec time: [1.12] s
* igt@xe_spin_batch@spin-timestamp-check@engine-drm_xe_engine_class_video_decode:
- Statuses : 2 pass(s)
- Exec time: [1.15, 2.30] s
* igt@xe_spin_batch@spin-timestamp-check@engine-drm_xe_engine_class_video_enhance:
- Statuses : 2 pass(s)
- Exec time: [1.15, 2.30] s
Known issues
------------
Here are the changes found in XEIGTPW_12290_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_async_flips@invalid-async-flip-atomic:
- shard-lnl: NOTRUN -> [SKIP][3] ([Intel XE#3768])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-3/igt@kms_async_flips@invalid-async-flip-atomic.html
* igt@kms_async_flips@test-cursor:
- shard-lnl: NOTRUN -> [SKIP][4] ([Intel XE#664])
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-8/igt@kms_async_flips@test-cursor.html
* igt@kms_big_fb@4-tiled-16bpp-rotate-270:
- shard-lnl: NOTRUN -> [SKIP][5] ([Intel XE#1407]) +6 other tests skip
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-2/igt@kms_big_fb@4-tiled-16bpp-rotate-270.html
* igt@kms_big_fb@linear-16bpp-rotate-180:
- shard-bmg: NOTRUN -> [DMESG-FAIL][6] ([Intel XE#3468])
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-3/igt@kms_big_fb@linear-16bpp-rotate-180.html
* igt@kms_big_fb@x-tiled-32bpp-rotate-90:
- shard-bmg: NOTRUN -> [SKIP][7] ([Intel XE#2327]) +1 other test skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-2/igt@kms_big_fb@x-tiled-32bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-32bpp-rotate-180:
- shard-lnl: NOTRUN -> [SKIP][8] ([Intel XE#1124]) +10 other tests skip
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-1/igt@kms_big_fb@y-tiled-32bpp-rotate-180.html
* igt@kms_big_fb@yf-tiled-32bpp-rotate-0:
- shard-bmg: NOTRUN -> [SKIP][9] ([Intel XE#1124]) +12 other tests skip
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-6/igt@kms_big_fb@yf-tiled-32bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-addfb:
- shard-lnl: NOTRUN -> [SKIP][10] ([Intel XE#1467])
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-3/igt@kms_big_fb@yf-tiled-addfb.html
* igt@kms_bw@connected-linear-tiling-3-displays-2160x1440p:
- shard-lnl: NOTRUN -> [SKIP][11] ([Intel XE#2191]) +2 other tests skip
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-3/igt@kms_bw@connected-linear-tiling-3-displays-2160x1440p.html
* igt@kms_bw@connected-linear-tiling-3-displays-2560x1440p:
- shard-bmg: NOTRUN -> [SKIP][12] ([Intel XE#2314] / [Intel XE#2894]) +2 other tests skip
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-5/igt@kms_bw@connected-linear-tiling-3-displays-2560x1440p.html
* igt@kms_bw@linear-tiling-2-displays-2560x1440p:
- shard-bmg: NOTRUN -> [SKIP][13] ([Intel XE#367])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-5/igt@kms_bw@linear-tiling-2-displays-2560x1440p.html
- shard-lnl: NOTRUN -> [SKIP][14] ([Intel XE#367])
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-1/igt@kms_bw@linear-tiling-2-displays-2560x1440p.html
* igt@kms_bw@linear-tiling-4-displays-3840x2160p:
- shard-lnl: NOTRUN -> [SKIP][15] ([Intel XE#1512]) +1 other test skip
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-2/igt@kms_bw@linear-tiling-4-displays-3840x2160p.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc:
- shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#3432])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-4/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc.html
- shard-lnl: NOTRUN -> [SKIP][17] ([Intel XE#3432])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-3/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc:
- shard-bmg: NOTRUN -> [SKIP][18] ([Intel XE#2887]) +16 other tests skip
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-3/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-mc-ccs:
- shard-lnl: NOTRUN -> [SKIP][19] ([Intel XE#2887]) +15 other tests skip
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-5/igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-mc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-c-dp-2:
- shard-bmg: NOTRUN -> [SKIP][20] ([Intel XE#2652] / [Intel XE#787]) +14 other tests skip
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-4/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-c-dp-2.html
* igt@kms_cdclk@mode-transition@pipe-b-edp-1:
- shard-lnl: NOTRUN -> [SKIP][21] ([Intel XE#314]) +3 other tests skip
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-1/igt@kms_cdclk@mode-transition@pipe-b-edp-1.html
* igt@kms_chamelium_color@ctm-negative:
- shard-lnl: NOTRUN -> [SKIP][22] ([Intel XE#306]) +3 other tests skip
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-6/igt@kms_chamelium_color@ctm-negative.html
- shard-bmg: NOTRUN -> [SKIP][23] ([Intel XE#2325]) +2 other tests skip
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-3/igt@kms_chamelium_color@ctm-negative.html
* igt@kms_chamelium_edid@dp-edid-resolution-list:
- shard-bmg: NOTRUN -> [SKIP][24] ([Intel XE#2252]) +12 other tests skip
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-8/igt@kms_chamelium_edid@dp-edid-resolution-list.html
* igt@kms_chamelium_hpd@vga-hpd-fast:
- shard-lnl: NOTRUN -> [SKIP][25] ([Intel XE#373]) +13 other tests skip
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-8/igt@kms_chamelium_hpd@vga-hpd-fast.html
* igt@kms_content_protection@dp-mst-type-1:
- shard-lnl: NOTRUN -> [SKIP][26] ([Intel XE#307]) +1 other test skip
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-3/igt@kms_content_protection@dp-mst-type-1.html
- shard-bmg: NOTRUN -> [SKIP][27] ([Intel XE#2390]) +1 other test skip
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-3/igt@kms_content_protection@dp-mst-type-1.html
* igt@kms_content_protection@type1:
- shard-bmg: NOTRUN -> [SKIP][28] ([Intel XE#2341]) +1 other test skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-4/igt@kms_content_protection@type1.html
* igt@kms_content_protection@uevent:
- shard-lnl: NOTRUN -> [SKIP][29] ([Intel XE#3278])
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-5/igt@kms_content_protection@uevent.html
* igt@kms_content_protection@uevent@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][30] ([Intel XE#1188])
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-3/igt@kms_content_protection@uevent@pipe-a-dp-2.html
* igt@kms_cursor_crc@cursor-offscreen-512x170:
- shard-lnl: NOTRUN -> [SKIP][31] ([Intel XE#2321]) +2 other tests skip
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-5/igt@kms_cursor_crc@cursor-offscreen-512x170.html
- shard-bmg: NOTRUN -> [SKIP][32] ([Intel XE#2321]) +2 other tests skip
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-2/igt@kms_cursor_crc@cursor-offscreen-512x170.html
* igt@kms_cursor_crc@cursor-rapid-movement-256x85:
- shard-lnl: NOTRUN -> [SKIP][33] ([Intel XE#1424])
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-7/igt@kms_cursor_crc@cursor-rapid-movement-256x85.html
* igt@kms_cursor_crc@cursor-rapid-movement-32x10:
- shard-bmg: NOTRUN -> [SKIP][34] ([Intel XE#2320]) +3 other tests skip
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-7/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html
* igt@kms_cursor_edge_walk@256x256-right-edge:
- shard-bmg: [PASS][35] -> [DMESG-FAIL][36] ([Intel XE#3468]) +1 other test dmesg-fail
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-7/igt@kms_cursor_edge_walk@256x256-right-edge.html
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-3/igt@kms_cursor_edge_walk@256x256-right-edge.html
* igt@kms_cursor_legacy@2x-cursor-vs-flip-atomic:
- shard-bmg: NOTRUN -> [SKIP][37] ([Intel XE#2291]) +2 other tests skip
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-6/igt@kms_cursor_legacy@2x-cursor-vs-flip-atomic.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- shard-bmg: NOTRUN -> [SKIP][38] ([Intel XE#2286]) +1 other test skip
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-6/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- shard-lnl: NOTRUN -> [SKIP][39] ([Intel XE#323]) +1 other test skip
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-1/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_cursor_legacy@cursora-vs-flipb-varying-size:
- shard-lnl: NOTRUN -> [SKIP][40] ([Intel XE#309]) +4 other tests skip
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-3/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
- shard-bmg: [PASS][41] -> [SKIP][42] ([Intel XE#2291]) +3 other tests skip
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-3/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-4/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc:
- shard-bmg: NOTRUN -> [SKIP][43] ([Intel XE#1340]) +1 other test skip
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-5/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
* igt@kms_dsc@dsc-fractional-bpp:
- shard-bmg: NOTRUN -> [SKIP][44] ([Intel XE#2244]) +3 other tests skip
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-5/igt@kms_dsc@dsc-fractional-bpp.html
* igt@kms_dsc@dsc-with-output-formats-with-bpc:
- shard-lnl: NOTRUN -> [SKIP][45] ([Intel XE#2244]) +2 other tests skip
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-3/igt@kms_dsc@dsc-with-output-formats-with-bpc.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-bmg: NOTRUN -> [FAIL][46] ([Intel XE#1695])
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-7/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_feature_discovery@display-3x:
- shard-lnl: NOTRUN -> [SKIP][47] ([Intel XE#703])
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-2/igt@kms_feature_discovery@display-3x.html
- shard-bmg: NOTRUN -> [SKIP][48] ([Intel XE#2373])
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-4/igt@kms_feature_discovery@display-3x.html
* igt@kms_feature_discovery@display-4x:
- shard-lnl: NOTRUN -> [SKIP][49] ([Intel XE#1138])
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-7/igt@kms_feature_discovery@display-4x.html
* igt@kms_flip@2x-blocking-wf_vblank:
- shard-bmg: [PASS][50] -> [SKIP][51] ([Intel XE#2316]) +6 other tests skip
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-2/igt@kms_flip@2x-blocking-wf_vblank.html
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-6/igt@kms_flip@2x-blocking-wf_vblank.html
* igt@kms_flip@2x-flip-vs-rmfb-interruptible:
- shard-lnl: NOTRUN -> [SKIP][52] ([Intel XE#1421]) +7 other tests skip
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-6/igt@kms_flip@2x-flip-vs-rmfb-interruptible.html
* igt@kms_flip@2x-wf_vblank-ts-check:
- shard-bmg: NOTRUN -> [SKIP][53] ([Intel XE#2316]) +1 other test skip
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-5/igt@kms_flip@2x-wf_vblank-ts-check.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling:
- shard-lnl: NOTRUN -> [SKIP][54] ([Intel XE#1401] / [Intel XE#1745])
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-8/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling@pipe-a-default-mode:
- shard-lnl: NOTRUN -> [SKIP][55] ([Intel XE#1401])
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-8/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling:
- shard-lnl: NOTRUN -> [SKIP][56] ([Intel XE#1397] / [Intel XE#1745])
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-8/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling@pipe-a-default-mode:
- shard-lnl: NOTRUN -> [SKIP][57] ([Intel XE#1397])
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-8/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling:
- shard-bmg: [PASS][58] -> [INCOMPLETE][59] ([Intel XE#1727] / [Intel XE#3468]) +1 other test incomplete
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-5/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling.html
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-6/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling:
- shard-bmg: NOTRUN -> [SKIP][60] ([Intel XE#2293] / [Intel XE#2380]) +3 other tests skip
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-4/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode:
- shard-bmg: NOTRUN -> [SKIP][61] ([Intel XE#2293]) +3 other tests skip
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-4/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode.html
* igt@kms_frontbuffer_tracking@drrs-1p-offscren-pri-indfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][62] ([Intel XE#2311]) +31 other tests skip
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-1p-offscren-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt:
- shard-bmg: NOTRUN -> [FAIL][63] ([Intel XE#2333]) +13 other tests fail
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-indfb-msflip-blt:
- shard-lnl: NOTRUN -> [SKIP][64] ([Intel XE#651]) +22 other tests skip
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-8/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-indfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-pgflip-blt:
- shard-bmg: NOTRUN -> [SKIP][65] ([Intel XE#2312]) +25 other tests skip
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-pgflip-blt:
- shard-bmg: NOTRUN -> [SKIP][66] ([Intel XE#2313]) +20 other tests skip
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-7/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-plflip-blt:
- shard-lnl: NOTRUN -> [SKIP][67] ([Intel XE#656]) +47 other tests skip
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-3/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-plflip-blt.html
* igt@kms_getfb@getfb-reject-ccs:
- shard-lnl: NOTRUN -> [SKIP][68] ([Intel XE#605])
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-3/igt@kms_getfb@getfb-reject-ccs.html
* igt@kms_hdr@brightness-with-hdr:
- shard-lnl: NOTRUN -> [SKIP][69] ([Intel XE#3374] / [Intel XE#3544])
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-1/igt@kms_hdr@brightness-with-hdr.html
- shard-bmg: NOTRUN -> [SKIP][70] ([Intel XE#3374] / [Intel XE#3544])
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-8/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_hdr@static-toggle:
- shard-lnl: NOTRUN -> [SKIP][71] ([Intel XE#1503])
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-3/igt@kms_hdr@static-toggle.html
* igt@kms_invalid_mode@clock-too-high:
- shard-lnl: NOTRUN -> [SKIP][72] ([Intel XE#1450] / [Intel XE#2568])
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-1/igt@kms_invalid_mode@clock-too-high.html
* igt@kms_invalid_mode@clock-too-high@pipe-a-edp-1:
- shard-lnl: NOTRUN -> [SKIP][73] ([Intel XE#1450]) +2 other tests skip
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-1/igt@kms_invalid_mode@clock-too-high@pipe-a-edp-1.html
* igt@kms_joiner@invalid-modeset-ultra-joiner:
- shard-lnl: NOTRUN -> [SKIP][74] ([Intel XE#2927])
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-6/igt@kms_joiner@invalid-modeset-ultra-joiner.html
* igt@kms_plane_scaling@intel-max-src-size:
- shard-lnl: NOTRUN -> [SKIP][75] ([Intel XE#3307])
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-3/igt@kms_plane_scaling@intel-max-src-size.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-c:
- shard-lnl: NOTRUN -> [SKIP][76] ([Intel XE#2763]) +17 other tests skip
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-6/igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-c.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75@pipe-b:
- shard-bmg: NOTRUN -> [SKIP][77] ([Intel XE#2763]) +9 other tests skip
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-3/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75@pipe-b.html
* igt@kms_pm_backlight@fade-with-dpms:
- shard-bmg: NOTRUN -> [SKIP][78] ([Intel XE#870])
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-6/igt@kms_pm_backlight@fade-with-dpms.html
* igt@kms_pm_dc@dc6-dpms:
- shard-lnl: NOTRUN -> [FAIL][79] ([Intel XE#1430])
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-1/igt@kms_pm_dc@dc6-dpms.html
* igt@kms_pm_rpm@dpms-mode-unset-lpsp:
- shard-bmg: NOTRUN -> [SKIP][80] ([Intel XE#1439] / [Intel XE#836])
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-2/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html
* igt@kms_pm_rpm@dpms-mode-unset-non-lpsp:
- shard-lnl: NOTRUN -> [SKIP][81] ([Intel XE#1439] / [Intel XE#836])
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-8/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html
* igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-fully-sf:
- shard-bmg: NOTRUN -> [SKIP][82] ([Intel XE#1489]) +9 other tests skip
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-2/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_sf@pr-overlay-plane-move-continuous-sf:
- shard-lnl: NOTRUN -> [SKIP][83] ([Intel XE#2893]) +5 other tests skip
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-8/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-sf.html
* igt@kms_psr@pr-cursor-plane-move:
- shard-lnl: NOTRUN -> [SKIP][84] ([Intel XE#1406]) +8 other tests skip
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-6/igt@kms_psr@pr-cursor-plane-move.html
* igt@kms_psr@psr2-no-drrs:
- shard-bmg: NOTRUN -> [SKIP][85] ([Intel XE#2234] / [Intel XE#2850]) +21 other tests skip
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-6/igt@kms_psr@psr2-no-drrs.html
* igt@kms_psr@psr2-primary-render:
- shard-bmg: NOTRUN -> [SKIP][86] ([Intel XE#2234])
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-5/igt@kms_psr@psr2-primary-render.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-180:
- shard-lnl: NOTRUN -> [SKIP][87] ([Intel XE#1127])
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-1/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
- shard-bmg: NOTRUN -> [SKIP][88] ([Intel XE#3414]) +1 other test skip
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-7/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
- shard-lnl: NOTRUN -> [SKIP][89] ([Intel XE#3414])
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-8/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
* igt@kms_scaling_modes@scaling-mode-center:
- shard-bmg: NOTRUN -> [SKIP][90] ([Intel XE#2413]) +1 other test skip
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-5/igt@kms_scaling_modes@scaling-mode-center.html
* igt@kms_setmode@invalid-clone-exclusive-crtc:
- shard-bmg: NOTRUN -> [SKIP][91] ([Intel XE#1435])
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-3/igt@kms_setmode@invalid-clone-exclusive-crtc.html
- shard-lnl: NOTRUN -> [SKIP][92] ([Intel XE#1435])
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-5/igt@kms_setmode@invalid-clone-exclusive-crtc.html
* igt@kms_tv_load_detect@load-detect:
- shard-lnl: NOTRUN -> [SKIP][93] ([Intel XE#330])
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-6/igt@kms_tv_load_detect@load-detect.html
- shard-bmg: NOTRUN -> [SKIP][94] ([Intel XE#2450])
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-3/igt@kms_tv_load_detect@load-detect.html
* igt@kms_vrr@cmrr:
- shard-bmg: NOTRUN -> [SKIP][95] ([Intel XE#2168])
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-6/igt@kms_vrr@cmrr.html
* igt@kms_vrr@flip-basic:
- shard-bmg: NOTRUN -> [SKIP][96] ([Intel XE#1499]) +3 other tests skip
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-4/igt@kms_vrr@flip-basic.html
* igt@kms_vrr@seamless-rr-switch-drrs:
- shard-lnl: NOTRUN -> [SKIP][97] ([Intel XE#1499])
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-1/igt@kms_vrr@seamless-rr-switch-drrs.html
* igt@kms_writeback@writeback-pixel-formats:
- shard-bmg: NOTRUN -> [SKIP][98] ([Intel XE#756])
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-7/igt@kms_writeback@writeback-pixel-formats.html
- shard-lnl: NOTRUN -> [SKIP][99] ([Intel XE#756]) +1 other test skip
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-8/igt@kms_writeback@writeback-pixel-formats.html
* igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all:
- shard-lnl: NOTRUN -> [SKIP][100] ([Intel XE#1091] / [Intel XE#2849])
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-5/igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all.html
- shard-bmg: NOTRUN -> [SKIP][101] ([Intel XE#1091] / [Intel XE#2849])
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-2/igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all.html
* igt@xe_ccs@block-copy-uncompressed:
- shard-bmg: NOTRUN -> [DMESG-WARN][102] ([Intel XE#3468]) +4 other tests dmesg-warn
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-5/igt@xe_ccs@block-copy-uncompressed.html
* igt@xe_ccs@suspend-resume@linear-compressed-compfmt0-system-system:
- shard-lnl: NOTRUN -> [ABORT][103] ([Intel XE#3673]) +15 other tests abort
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-3/igt@xe_ccs@suspend-resume@linear-compressed-compfmt0-system-system.html
* igt@xe_eudebug@basic-vm-access-userptr:
- shard-bmg: NOTRUN -> [SKIP][104] ([Intel XE#2905]) +13 other tests skip
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-6/igt@xe_eudebug@basic-vm-access-userptr.html
* igt@xe_eudebug@basic-vm-bind:
- shard-lnl: NOTRUN -> [SKIP][105] ([Intel XE#2905]) +11 other tests skip
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-8/igt@xe_eudebug@basic-vm-bind.html
* igt@xe_evict@evict-beng-large-multi-vm-cm:
- shard-bmg: NOTRUN -> [FAIL][106] ([Intel XE#2364])
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-2/igt@xe_evict@evict-beng-large-multi-vm-cm.html
* igt@xe_evict@evict-beng-mixed-many-threads-small:
- shard-bmg: NOTRUN -> [TIMEOUT][107] ([Intel XE#1473])
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-5/igt@xe_evict@evict-beng-mixed-many-threads-small.html
* igt@xe_evict@evict-beng-threads-large-multi-vm:
- shard-lnl: NOTRUN -> [SKIP][108] ([Intel XE#688]) +12 other tests skip
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-5/igt@xe_evict@evict-beng-threads-large-multi-vm.html
* igt@xe_exec_basic@multigpu-no-exec-userptr:
- shard-lnl: NOTRUN -> [SKIP][109] ([Intel XE#1392]) +11 other tests skip
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-8/igt@xe_exec_basic@multigpu-no-exec-userptr.html
* igt@xe_exec_basic@multigpu-once-null-rebind:
- shard-bmg: NOTRUN -> [SKIP][110] ([Intel XE#2322]) +14 other tests skip
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-4/igt@xe_exec_basic@multigpu-once-null-rebind.html
* igt@xe_exec_threads@threads-fd-userptr-invalidate-race:
- shard-bmg: [PASS][111] -> [DMESG-WARN][112] ([Intel XE#3468]) +6 other tests dmesg-warn
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-5/igt@xe_exec_threads@threads-fd-userptr-invalidate-race.html
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-5/igt@xe_exec_threads@threads-fd-userptr-invalidate-race.html
* igt@xe_fault_injection@inject-fault-probe-function-xe_guc_ct_init:
- shard-bmg: [PASS][113] -> [DMESG-WARN][114] ([Intel XE#3343])
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-2/igt@xe_fault_injection@inject-fault-probe-function-xe_guc_ct_init.html
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-3/igt@xe_fault_injection@inject-fault-probe-function-xe_guc_ct_init.html
* igt@xe_fault_injection@vm-bind-fail-xe_pt_update_ops_prepare:
- shard-bmg: [PASS][115] -> [DMESG-WARN][116] ([Intel XE#3467] / [Intel XE#3468]) +1 other test dmesg-warn
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-4/igt@xe_fault_injection@vm-bind-fail-xe_pt_update_ops_prepare.html
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-7/igt@xe_fault_injection@vm-bind-fail-xe_pt_update_ops_prepare.html
* igt@xe_fault_injection@vm-bind-fail-xe_pt_update_ops_run:
- shard-bmg: NOTRUN -> [DMESG-WARN][117] ([Intel XE#3467] / [Intel XE#3468])
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-8/igt@xe_fault_injection@vm-bind-fail-xe_pt_update_ops_run.html
* igt@xe_media_fill@media-fill:
- shard-lnl: NOTRUN -> [SKIP][118] ([Intel XE#560])
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-6/igt@xe_media_fill@media-fill.html
* igt@xe_module_load@reload:
- shard-bmg: NOTRUN -> [DMESG-WARN][119] ([Intel XE#3467])
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-3/igt@xe_module_load@reload.html
* igt@xe_pat@pat-index-xelpg:
- shard-bmg: NOTRUN -> [SKIP][120] ([Intel XE#2236])
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-5/igt@xe_pat@pat-index-xelpg.html
* igt@xe_pm@d3cold-basic:
- shard-lnl: NOTRUN -> [SKIP][121] ([Intel XE#2284] / [Intel XE#366]) +1 other test skip
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-2/igt@xe_pm@d3cold-basic.html
* igt@xe_pm@d3cold-mmap-vram:
- shard-bmg: NOTRUN -> [SKIP][122] ([Intel XE#2284])
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-4/igt@xe_pm@d3cold-mmap-vram.html
* igt@xe_pm@d3cold-mocs:
- shard-lnl: NOTRUN -> [SKIP][123] ([Intel XE#2284])
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-7/igt@xe_pm@d3cold-mocs.html
* igt@xe_pm@s2idle-vm-bind-unbind-all:
- shard-lnl: NOTRUN -> [ABORT][124] ([Intel XE#1616] / [Intel XE#1694] / [Intel XE#3766])
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-1/igt@xe_pm@s2idle-vm-bind-unbind-all.html
* igt@xe_pm@s3-mocs:
- shard-lnl: NOTRUN -> [SKIP][125] ([Intel XE#584]) +3 other tests skip
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-6/igt@xe_pm@s3-mocs.html
* igt@xe_pm@s3-vm-bind-prefetch:
- shard-bmg: [PASS][126] -> [DMESG-WARN][127] ([Intel XE#3468] / [Intel XE#569])
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-6/igt@xe_pm@s3-vm-bind-prefetch.html
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-5/igt@xe_pm@s3-vm-bind-prefetch.html
* igt@xe_pm@s4-basic:
- shard-lnl: NOTRUN -> [ABORT][128] ([Intel XE#1358] / [Intel XE#1607])
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-2/igt@xe_pm@s4-basic.html
* igt@xe_query@multigpu-query-mem-usage:
- shard-bmg: NOTRUN -> [SKIP][129] ([Intel XE#944]) +3 other tests skip
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-4/igt@xe_query@multigpu-query-mem-usage.html
* igt@xe_query@multigpu-query-topology:
- shard-lnl: NOTRUN -> [SKIP][130] ([Intel XE#944]) +1 other test skip
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-3/igt@xe_query@multigpu-query-topology.html
* igt@xe_sriov_flr@flr-vf1-clear:
- shard-lnl: NOTRUN -> [SKIP][131] ([Intel XE#3342])
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-1/igt@xe_sriov_flr@flr-vf1-clear.html
#### Possible fixes ####
* igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-edp-1-linear:
- shard-lnl: [FAIL][132] ([Intel XE#911]) -> [PASS][133] +3 other tests pass
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-lnl-1/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-edp-1-linear.html
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-6/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-edp-1-linear.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
- shard-bmg: [SKIP][134] ([Intel XE#2136] / [Intel XE#2231]) -> [PASS][135] +1 other test pass
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-4/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-5/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
* igt@kms_big_fb@linear-8bpp-rotate-180:
- shard-bmg: [DMESG-FAIL][136] ([Intel XE#3468]) -> [PASS][137] +13 other tests pass
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-8/igt@kms_big_fb@linear-8bpp-rotate-180.html
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-4/igt@kms_big_fb@linear-8bpp-rotate-180.html
* igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p:
- shard-bmg: [SKIP][138] ([Intel XE#2314] / [Intel XE#2894]) -> [PASS][139]
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-5/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-2/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html
* igt@kms_color@deep-color:
- shard-bmg: [INCOMPLETE][140] -> [PASS][141] +1 other test pass
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-2/igt@kms_color@deep-color.html
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-5/igt@kms_color@deep-color.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions:
- shard-bmg: [SKIP][142] ([Intel XE#2291]) -> [PASS][143]
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions.html
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-2/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions.html
* igt@kms_dp_linktrain_fallback@dp-fallback:
- shard-bmg: [SKIP][144] ([Intel XE#3070]) -> [PASS][145]
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-6/igt@kms_dp_linktrain_fallback@dp-fallback.html
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-7/igt@kms_dp_linktrain_fallback@dp-fallback.html
* igt@kms_flip@2x-flip-vs-expired-vblank@cd-dp2-hdmi-a3:
- shard-bmg: [FAIL][146] ([Intel XE#3321]) -> [PASS][147]
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-8/igt@kms_flip@2x-flip-vs-expired-vblank@cd-dp2-hdmi-a3.html
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-7/igt@kms_flip@2x-flip-vs-expired-vblank@cd-dp2-hdmi-a3.html
* igt@kms_flip@2x-flip-vs-wf_vblank-interruptible:
- shard-bmg: [SKIP][148] ([Intel XE#2316]) -> [PASS][149] +2 other tests pass
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-6/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible.html
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-8/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible.html
* igt@kms_flip@wf_vblank-ts-check-interruptible:
- shard-bmg: [INCOMPLETE][150] ([Intel XE#2635]) -> [PASS][151]
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-7/igt@kms_flip@wf_vblank-ts-check-interruptible.html
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-5/igt@kms_flip@wf_vblank-ts-check-interruptible.html
* igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-upscaling@pipe-a-valid-mode:
- shard-bmg: [INCOMPLETE][152] ([Intel XE#1727] / [Intel XE#3468]) -> [PASS][153] +2 other tests pass
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-6/igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-upscaling@pipe-a-valid-mode.html
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-3/igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-downscaling:
- shard-bmg: [DMESG-WARN][154] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3468]) -> [PASS][155] +1 other test pass
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-8/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-downscaling.html
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-3/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling:
- shard-bmg: [INCOMPLETE][156] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3468]) -> [PASS][157] +1 other test pass
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-6/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling.html
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-2/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling.html
* igt@kms_hdr@static-toggle-suspend:
- shard-bmg: [SKIP][158] ([Intel XE#1503]) -> [PASS][159]
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-5/igt@kms_hdr@static-toggle-suspend.html
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-2/igt@kms_hdr@static-toggle-suspend.html
* igt@kms_pipe_crc_basic@suspend-read-crc:
- shard-bmg: [INCOMPLETE][160] ([Intel XE#1727] / [Intel XE#3468] / [Intel XE#3663]) -> [PASS][161]
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-8/igt@kms_pipe_crc_basic@suspend-read-crc.html
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-8/igt@kms_pipe_crc_basic@suspend-read-crc.html
* igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-5:
- shard-bmg: [SKIP][162] ([Intel XE#3007]) -> [PASS][163] +6 other tests pass
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-4/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-5.html
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-5/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-5.html
* igt@kms_universal_plane@cursor-fb-leak@pipe-a-edp-1:
- shard-lnl: [FAIL][164] ([Intel XE#899]) -> [PASS][165]
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-lnl-5/igt@kms_universal_plane@cursor-fb-leak@pipe-a-edp-1.html
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-lnl-1/igt@kms_universal_plane@cursor-fb-leak@pipe-a-edp-1.html
* igt@kms_vblank@ts-continuation-dpms-rpm@pipe-d-hdmi-a-3:
- shard-bmg: [DMESG-WARN][166] ([Intel XE#1727] / [Intel XE#3468]) -> [PASS][167] +3 other tests pass
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-6/igt@kms_vblank@ts-continuation-dpms-rpm@pipe-d-hdmi-a-3.html
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-7/igt@kms_vblank@ts-continuation-dpms-rpm@pipe-d-hdmi-a-3.html
* igt@xe_evict@evict-large-external-cm:
- shard-bmg: [SKIP][168] ([Intel XE#1130]) -> [PASS][169] +17 other tests pass
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-4/igt@xe_evict@evict-large-external-cm.html
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-3/igt@xe_evict@evict-large-external-cm.html
* igt@xe_exec_basic@twice-userptr-invalidate:
- shard-bmg: [DMESG-WARN][170] -> [PASS][171]
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-8/igt@xe_exec_basic@twice-userptr-invalidate.html
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-3/igt@xe_exec_basic@twice-userptr-invalidate.html
* igt@xe_fault_injection@inject-fault-probe-function-xe_guc_relay_init:
- shard-bmg: [DMESG-WARN][172] ([Intel XE#3343] / [Intel XE#3468]) -> [PASS][173] +1 other test pass
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-8/igt@xe_fault_injection@inject-fault-probe-function-xe_guc_relay_init.html
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-4/igt@xe_fault_injection@inject-fault-probe-function-xe_guc_relay_init.html
* igt@xe_fault_injection@inject-fault-probe-function-xe_wa_init:
- shard-bmg: [DMESG-WARN][174] ([Intel XE#3467] / [Intel XE#3468]) -> [PASS][175]
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-7/igt@xe_fault_injection@inject-fault-probe-function-xe_wa_init.html
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-5/igt@xe_fault_injection@inject-fault-probe-function-xe_wa_init.html
* igt@xe_module_load@many-reload:
- shard-bmg: [DMESG-WARN][176] ([Intel XE#3467]) -> [PASS][177]
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-6/igt@xe_module_load@many-reload.html
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-3/igt@xe_module_load@many-reload.html
* igt@xe_pm@s3-vm-bind-userptr:
- shard-bmg: [DMESG-WARN][178] ([Intel XE#1727] / [Intel XE#3468] / [Intel XE#569]) -> [PASS][179]
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-8/igt@xe_pm@s3-vm-bind-userptr.html
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-2/igt@xe_pm@s3-vm-bind-userptr.html
* igt@xe_pm@s4-vm-bind-unbind-all:
- shard-bmg: [DMESG-WARN][180] ([Intel XE#2280] / [Intel XE#3468]) -> [PASS][181]
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-6/igt@xe_pm@s4-vm-bind-unbind-all.html
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-8/igt@xe_pm@s4-vm-bind-unbind-all.html
* igt@xe_sysfs_preempt_timeout@preempt_timeout_us-timeout:
- shard-bmg: [DMESG-WARN][182] ([Intel XE#3468]) -> [PASS][183] +78 other tests pass
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-6/igt@xe_sysfs_preempt_timeout@preempt_timeout_us-timeout.html
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-7/igt@xe_sysfs_preempt_timeout@preempt_timeout_us-timeout.html
#### Warnings ####
* igt@kms_big_fb@x-tiled-16bpp-rotate-270:
- shard-bmg: [SKIP][184] ([Intel XE#2136] / [Intel XE#2231]) -> [SKIP][185] ([Intel XE#2327])
[184]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-4/igt@kms_big_fb@x-tiled-16bpp-rotate-270.html
[185]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-5/igt@kms_big_fb@x-tiled-16bpp-rotate-270.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip:
- shard-bmg: [SKIP][186] ([Intel XE#2136] / [Intel XE#2231]) -> [SKIP][187] ([Intel XE#1124]) +1 other test skip
[186]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-4/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
[187]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-8/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
* igt@kms_bw@linear-tiling-2-displays-3840x2160p:
- shard-bmg: [SKIP][188] ([Intel XE#3007]) -> [SKIP][189] ([Intel XE#367])
[188]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-4/igt@kms_bw@linear-tiling-2-displays-3840x2160p.html
[189]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-2/igt@kms_bw@linear-tiling-2-displays-3840x2160p.html
* igt@kms_ccs@crc-primary-rotation-180-y-tiled-ccs:
- shard-bmg: [SKIP][190] ([Intel XE#2136] / [Intel XE#2231]) -> [SKIP][191] ([Intel XE#2887]) +1 other test skip
[190]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-4/igt@kms_ccs@crc-primary-rotation-180-y-tiled-ccs.html
[191]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-5/igt@kms_ccs@crc-primary-rotation-180-y-tiled-ccs.html
* igt@kms_chamelium_color@gamma:
- shard-bmg: [SKIP][192] ([Intel XE#3007]) -> [SKIP][193] ([Intel XE#2325])
[192]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-4/igt@kms_chamelium_color@gamma.html
[193]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-2/igt@kms_chamelium_color@gamma.html
* igt@kms_chamelium_frames@dp-crc-fast:
- shard-bmg: [SKIP][194] ([Intel XE#3007]) -> [SKIP][195] ([Intel XE#2252])
[194]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-4/igt@kms_chamelium_frames@dp-crc-fast.html
[195]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-7/igt@kms_chamelium_frames@dp-crc-fast.html
* igt@kms_content_protection@atomic:
- shard-bmg: [INCOMPLETE][196] ([Intel XE#2715] / [Intel XE#3468]) -> [FAIL][197] ([Intel XE#1178]) +1 other test fail
[196]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-7/igt@kms_content_protection@atomic.html
[197]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-4/igt@kms_content_protection@atomic.html
* igt@kms_content_protection@uevent:
- shard-bmg: [SKIP][198] ([Intel XE#2341]) -> [FAIL][199] ([Intel XE#1188])
[198]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-5/igt@kms_content_protection@uevent.html
[199]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-3/igt@kms_content_protection@uevent.html
* igt@kms_cursor_crc@cursor-onscreen-max-size:
- shard-bmg: [SKIP][200] ([Intel XE#3007]) -> [SKIP][201] ([Intel XE#2320]) +1 other test skip
[200]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-4/igt@kms_cursor_crc@cursor-onscreen-max-size.html
[201]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-7/igt@kms_cursor_crc@cursor-onscreen-max-size.html
* igt@kms_flip@2x-flip-vs-expired-vblank:
- shard-bmg: [DMESG-FAIL][202] ([Intel XE#3468]) -> [FAIL][203] ([Intel XE#2882])
[202]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-8/igt@kms_flip@2x-flip-vs-expired-vblank.html
[203]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-7/igt@kms_flip@2x-flip-vs-expired-vblank.html
* igt@kms_flip@2x-flip-vs-expired-vblank@ac-dp2-hdmi-a3:
- shard-bmg: [DMESG-WARN][204] ([Intel XE#3468]) -> [FAIL][205] ([Intel XE#3321])
[204]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-8/igt@kms_flip@2x-flip-vs-expired-vblank@ac-dp2-hdmi-a3.html
[205]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-7/igt@kms_flip@2x-flip-vs-expired-vblank@ac-dp2-hdmi-a3.html
* igt@kms_flip@2x-plain-flip-ts-check:
- shard-bmg: [SKIP][206] ([Intel XE#3007]) -> [SKIP][207] ([Intel XE#2316])
[206]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-4/igt@kms_flip@2x-plain-flip-ts-check.html
[207]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-6/igt@kms_flip@2x-plain-flip-ts-check.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][208] ([Intel XE#2136] / [Intel XE#2231]) -> [SKIP][209] ([Intel XE#2311]) +4 other tests skip
[208]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html
[209]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-blt:
- shard-bmg: [SKIP][210] ([Intel XE#2312]) -> [SKIP][211] ([Intel XE#2311]) +13 other tests skip
[210]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-blt.html
[211]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-7/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][212] ([Intel XE#2136] / [Intel XE#2231]) -> [FAIL][213] ([Intel XE#2333]) +1 other test fail
[212]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-wc.html
[213]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-pgflip-blt:
- shard-bmg: [DMESG-FAIL][214] ([Intel XE#3468]) -> [FAIL][215] ([Intel XE#2333]) +5 other tests fail
[214]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-pgflip-blt.html
[215]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-plflip-blt:
- shard-bmg: [INCOMPLETE][216] -> [FAIL][217] ([Intel XE#2333])
[216]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-plflip-blt.html
[217]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen:
- shard-bmg: [FAIL][218] ([Intel XE#2333]) -> [SKIP][219] ([Intel XE#2312]) +3 other tests skip
[218]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen.html
[219]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff:
- shard-bmg: [SKIP][220] ([Intel XE#2312]) -> [FAIL][221] ([Intel XE#2333]) +8 other tests fail
[220]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff.html
[221]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-render:
- shard-bmg: [SKIP][222] ([Intel XE#2311]) -> [SKIP][223] ([Intel XE#2312]) +15 other tests skip
[222]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-render.html
[223]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-bmg: [SKIP][224] ([Intel XE#2136] / [Intel XE#2231]) -> [SKIP][225] ([Intel XE#2312])
[224]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-mmap-wc.html
[225]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt:
- shard-bmg: [SKIP][226] ([Intel XE#2313]) -> [SKIP][227] ([Intel XE#2312]) +15 other tests skip
[226]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt.html
[227]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][228] ([Intel XE#2136] / [Intel XE#2231]) -> [SKIP][229] ([Intel XE#2313]) +1 other test skip
[228]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-mmap-wc.html
[229]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt:
- shard-bmg: [SKIP][230] ([Intel XE#2312]) -> [SKIP][231] ([Intel XE#2313]) +14 other tests skip
[230]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-5/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html
[231]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-7/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html
* igt@kms_hdr@invalid-metadata-sizes:
- shard-bmg: [SKIP][232] ([Intel XE#3007]) -> [SKIP][233] ([Intel XE#1503])
[232]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-4/igt@kms_hdr@invalid-metadata-sizes.html
[233]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-5/igt@kms_hdr@invalid-metadata-sizes.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf:
- shard-bmg: [SKIP][234] ([Intel XE#2136] / [Intel XE#2231]) -> [SKIP][235] ([Intel XE#1489])
[234]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-4/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf.html
[235]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-4/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_su@page_flip-nv12:
- shard-bmg: [SKIP][236] ([Intel XE#2136] / [Intel XE#2231]) -> [SKIP][237] ([Intel XE#2387])
[236]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-4/igt@kms_psr2_su@page_flip-nv12.html
[237]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-7/igt@kms_psr2_su@page_flip-nv12.html
* igt@kms_psr@psr-basic:
- shard-bmg: [SKIP][238] ([Intel XE#2136] / [Intel XE#2231]) -> [SKIP][239] ([Intel XE#2234] / [Intel XE#2850])
[238]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-4/igt@kms_psr@psr-basic.html
[239]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-3/igt@kms_psr@psr-basic.html
* igt@kms_rotation_crc@primary-4-tiled-reflect-x-180:
- shard-bmg: [DMESG-WARN][240] ([Intel XE#3468]) -> [DMESG-FAIL][241] ([Intel XE#3468]) +1 other test dmesg-fail
[240]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-6/igt@kms_rotation_crc@primary-4-tiled-reflect-x-180.html
[241]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-3/igt@kms_rotation_crc@primary-4-tiled-reflect-x-180.html
* igt@kms_vrr@lobf:
- shard-bmg: [SKIP][242] ([Intel XE#3007]) -> [SKIP][243] ([Intel XE#2168])
[242]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-4/igt@kms_vrr@lobf.html
[243]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-4/igt@kms_vrr@lobf.html
* igt@xe_eudebug@basic-vm-bind-extended:
- shard-bmg: [SKIP][244] ([Intel XE#1130]) -> [SKIP][245] ([Intel XE#2905])
[244]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-4/igt@xe_eudebug@basic-vm-bind-extended.html
[245]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-3/igt@xe_eudebug@basic-vm-bind-extended.html
* igt@xe_evict@evict-beng-mixed-many-threads-large:
- shard-bmg: [TIMEOUT][246] ([Intel XE#1473]) -> [INCOMPLETE][247] ([Intel XE#1473] / [Intel XE#3468])
[246]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-4/igt@xe_evict@evict-beng-mixed-many-threads-large.html
[247]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-5/igt@xe_evict@evict-beng-mixed-many-threads-large.html
* igt@xe_evict@evict-beng-threads-large:
- shard-bmg: [FAIL][248] ([Intel XE#1000]) -> [TIMEOUT][249] ([Intel XE#1473])
[248]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-7/igt@xe_evict@evict-beng-threads-large.html
[249]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-4/igt@xe_evict@evict-beng-threads-large.html
* igt@xe_evict@evict-mixed-threads-large:
- shard-bmg: [FAIL][250] ([Intel XE#1000]) -> [TIMEOUT][251] ([Intel XE#1473] / [Intel XE#2472])
[250]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-2/igt@xe_evict@evict-mixed-threads-large.html
[251]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-8/igt@xe_evict@evict-mixed-threads-large.html
* igt@xe_evict@evict-threads-large:
- shard-bmg: [TIMEOUT][252] ([Intel XE#1473] / [Intel XE#2472]) -> [INCOMPLETE][253] ([Intel XE#1473])
[252]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-8/igt@xe_evict@evict-threads-large.html
[253]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-3/igt@xe_evict@evict-threads-large.html
* igt@xe_fault_injection@vm-bind-fail-vm_bind_ioctl_ops_execute:
- shard-bmg: [SKIP][254] ([Intel XE#1130]) -> [DMESG-WARN][255] ([Intel XE#3467] / [Intel XE#3468])
[254]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-4/igt@xe_fault_injection@vm-bind-fail-vm_bind_ioctl_ops_execute.html
[255]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-5/igt@xe_fault_injection@vm-bind-fail-vm_bind_ioctl_ops_execute.html
* igt@xe_pm@s2idle-basic-exec:
- shard-bmg: [ABORT][256] ([Intel XE#1616]) -> [ABORT][257] ([Intel XE#1616] / [Intel XE#1727] / [Intel XE#3468])
[256]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-6/igt@xe_pm@s2idle-basic-exec.html
[257]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-8/igt@xe_pm@s2idle-basic-exec.html
* igt@xe_pm@s2idle-d3hot-basic-exec:
- shard-bmg: [ABORT][258] ([Intel XE#1616]) -> [ABORT][259] ([Intel XE#1616] / [Intel XE#3468])
[258]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-2/igt@xe_pm@s2idle-d3hot-basic-exec.html
[259]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-7/igt@xe_pm@s2idle-d3hot-basic-exec.html
* igt@xe_pm@s2idle-multiple-execs:
- shard-bmg: [SKIP][260] ([Intel XE#1130]) -> [ABORT][261] ([Intel XE#1616])
[260]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-4/igt@xe_pm@s2idle-multiple-execs.html
[261]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-5/igt@xe_pm@s2idle-multiple-execs.html
* igt@xe_pm@s2idle-vm-bind-unbind-all:
- shard-bmg: [DMESG-WARN][262] ([Intel XE#1616] / [Intel XE#1727] / [Intel XE#3468]) -> [ABORT][263] ([Intel XE#1616])
[262]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-7/igt@xe_pm@s2idle-vm-bind-unbind-all.html
[263]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-2/igt@xe_pm@s2idle-vm-bind-unbind-all.html
* igt@xe_sriov_flr@flr-vf1-clear:
- shard-bmg: [SKIP][264] ([Intel XE#1130]) -> [SKIP][265] ([Intel XE#3342])
[264]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8147/shard-bmg-4/igt@xe_sriov_flr@flr-vf1-clear.html
[265]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/shard-bmg-5/igt@xe_sriov_flr@flr-vf1-clear.html
[Intel XE#1000]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1000
[Intel XE#1091]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1091
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127
[Intel XE#1130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1130
[Intel XE#1138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1138
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1188]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1188
[Intel XE#1340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1340
[Intel XE#1358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1358
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1397
[Intel XE#1401]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1401
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
[Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
[Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
[Intel XE#1430]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1430
[Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
[Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
[Intel XE#1450]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1450
[Intel XE#1467]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1467
[Intel XE#1473]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1473
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1512
[Intel XE#1607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1607
[Intel XE#1616]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1616
[Intel XE#1694]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1694
[Intel XE#1695]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1695
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745
[Intel XE#2136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2136
[Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168
[Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
[Intel XE#2231]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2231
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2236]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2236
[Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2280]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2280
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
[Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
[Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2333]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2333
[Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
[Intel XE#2364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2364
[Intel XE#2373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2373
[Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
[Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
[Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
[Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413
[Intel XE#2450]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2450
[Intel XE#2472]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2472
[Intel XE#2568]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2568
[Intel XE#2635]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2635
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
[Intel XE#2715]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2715
[Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
[Intel XE#2849]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2849
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2882]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2882
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
[Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
[Intel XE#2905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2905
[Intel XE#2927]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2927
[Intel XE#3007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3007
[Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
[Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
[Intel XE#3070]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3070
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/314
[Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323
[Intel XE#3278]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3278
[Intel XE#330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/330
[Intel XE#3307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3307
[Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321
[Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
[Intel XE#3343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3343
[Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#3467]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3467
[Intel XE#3468]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3468
[Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
[Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
[Intel XE#3663]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3663
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#3673]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3673
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#3766]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3766
[Intel XE#3768]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3768
[Intel XE#560]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/560
[Intel XE#569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/569
[Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584
[Intel XE#605]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/605
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#664]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/664
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#703]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/703
[Intel XE#756]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/756
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
[Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
[Intel XE#899]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/899
[Intel XE#911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/911
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* IGT: IGT_8147 -> IGTPW_12290
* Linux: xe-2345-afdbad14a16d9f44489fe37a05e93b24581bdc4f -> xe-2349-7bbcd7df9387f0d9004f997df33f7a9472d9c080
IGTPW_12290: 12290
IGT_8147: df65b61f81a5cc919c10ff9c5ed516b45364135c @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-2345-afdbad14a16d9f44489fe37a05e93b24581bdc4f: afdbad14a16d9f44489fe37a05e93b24581bdc4f
xe-2349-7bbcd7df9387f0d9004f997df33f7a9472d9c080: 7bbcd7df9387f0d9004f997df33f7a9472d9c080
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12290/index.html
[-- Attachment #2: Type: text/html, Size: 87302 bytes --]
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v7 1/2] lib/xe/xe_spin: move the spinner related functions to lib
2024-12-11 8:58 ` [PATCH v7 1/2] lib/xe/xe_spin: move the spinner related functions to lib Pravalika Gurram
@ 2024-12-13 6:18 ` Zbigniew Kempczyński
0 siblings, 0 replies; 7+ messages in thread
From: Zbigniew Kempczyński @ 2024-12-13 6:18 UTC (permalink / raw)
To: Pravalika Gurram; +Cc: igt-dev
On Wed, Dec 11, 2024 at 02:28:47PM +0530, Pravalika Gurram wrote:
> move spin_ctx_init,spin_ctx_start,spin_ctx_end,spin_ctx_destroy
> to xe spin lib to avoid code redundancy.
> removed xe_cork* functions to avoid duplicate spinner code.
>
> Signed-off-by: Pravalika Gurram <pravalika.gurram@intel.com>
> ---
> lib/xe/xe_spin.c | 207 ++++++++++++++++++++++++++----------
> lib/xe/xe_spin.h | 52 +++++----
> tests/intel/xe_drm_fdinfo.c | 195 ++++++---------------------------
> tests/intel/xe_vm.c | 17 +--
> 4 files changed, 226 insertions(+), 245 deletions(-)
>
> diff --git a/lib/xe/xe_spin.c b/lib/xe/xe_spin.c
> index 3adacc3a8..f7b51387c 100644
> --- a/lib/xe/xe_spin.c
> +++ b/lib/xe/xe_spin.c
> @@ -292,77 +292,172 @@ void xe_spin_free(int fd, struct igt_spin *spin)
> free(spin);
> }
>
> -void xe_cork_init(int fd, struct drm_xe_engine_class_instance *hwe,
> - struct xe_cork *cork)
> -{
> - uint64_t addr = xe_get_default_alignment(fd);
> - size_t bo_size = xe_bb_size(fd, SZ_4K);
> - uint32_t vm, bo, exec_queue, syncobj;
> - struct xe_spin *spin;
> - struct drm_xe_sync sync = {
> - .type = DRM_XE_SYNC_TYPE_SYNCOBJ, .flags = DRM_XE_SYNC_FLAG_SIGNAL,
> - };
> - struct drm_xe_exec exec = {
> - .num_batch_buffer = 1,
> - .num_syncs = 1,
> - .syncs = to_user_pointer(&sync),
> - };
> -
> - vm = xe_vm_create(fd, 0, 0);
> +/**
> + * xe_cork_create:
> + * @fd: xe device fd
> + * @hwe: Xe engine class instance if device is Xe
> + * @vm: vm handle
> + * @width: number of batch buffers
> + * @num_placements: number of valid placements for this exec queue
> + * @opts: controlling options such as allocator handle, debug.
> + *
> + * xe_cork_create create vm, bo, exec_queue and bind the buffer
> + * using vmbind
> + *
> + * This returns xe_cork after binding buffer object.
> + */
>
> - bo = xe_bo_create(fd, vm, bo_size, vram_if_possible(fd, hwe->gt_id),
> - DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
> - spin = xe_bo_map(fd, bo, 0x1000);
> +struct xe_cork *
> +xe_cork_create(int fd, struct drm_xe_engine_class_instance *hwe,
> + uint32_t vm, uint16_t width, uint16_t num_placements,
> + struct xe_cork_opts *opts)
> +{
> + struct xe_cork *ctx = calloc(1, sizeof(*ctx));
> +
> + igt_assert(ctx);
> + igt_assert(width && num_placements &&
> + (width == 1 || num_placements == 1));
> + igt_assert_lt(width, XE_MAX_ENGINE_INSTANCE);
> +
> + ctx->class = hwe->engine_class;
> + ctx->width = width;
> + ctx->num_placements = num_placements;
> + ctx->vm = vm;
> + ctx->cork_opts.ahnd = opts->ahnd;
> + ctx->cork_opts.debug = opts->debug;
ctx->cork_opts = *opts;
is enough.
> +
> + ctx->exec.num_batch_buffer = width;
> + ctx->exec.num_syncs = 2;
> + ctx->exec.syncs = to_user_pointer(ctx->sync);
> +
> + ctx->sync[0].type = DRM_XE_SYNC_TYPE_SYNCOBJ;
> + ctx->sync[0].flags = DRM_XE_SYNC_FLAG_SIGNAL;
> + ctx->sync[0].handle = syncobj_create(fd, 0);
> +
> + ctx->sync[1].type = DRM_XE_SYNC_TYPE_SYNCOBJ;
> + ctx->sync[1].flags = DRM_XE_SYNC_FLAG_SIGNAL;
> + ctx->sync[1].handle = syncobj_create(fd, 0);
> +
> + ctx->bo_size = sizeof(struct xe_spin);
> + ctx->bo_size = xe_bb_size(fd, ctx->bo_size);
> + ctx->bo = xe_bo_create(fd, ctx->vm, ctx->bo_size,
> + vram_if_possible(fd, hwe->gt_id),
> + DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
> + if (ctx->cork_opts.ahnd) {
> + for (unsigned int i = 0; i < width; i++)
> + ctx->addr[i] = intel_allocator_alloc_with_strategy(ctx->cork_opts.ahnd,
> + ctx->bo, ctx->bo_size, 0,
> + ALLOC_STRATEGY_LOW_TO_HIGH);
> + } else {
> + for (unsigned int i = 0; i < width; i++)
> + ctx->addr[i] = 0x100000 + 0x100000 * hwe->engine_class;
> + }
>
> - xe_vm_bind_sync(fd, vm, bo, 0, addr, bo_size);
> + ctx->spin = xe_bo_map(fd, ctx->bo, ctx->bo_size);
>
> - exec_queue = xe_exec_queue_create(fd, vm, hwe, 0);
> - syncobj = syncobj_create(fd, 0);
> + igt_assert_eq(__xe_exec_queue_create(fd, ctx->vm, width, num_placements,
> + hwe, 0, &ctx->exec_queue), 0);
>
> - xe_spin_init_opts(spin, .addr = addr, .preempt = true);
> - exec.exec_queue_id = exec_queue;
> - exec.address = addr;
> - sync.handle = syncobj;
> - igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_EXEC, &exec), 0);
> + xe_vm_bind_async(fd, ctx->vm, 0, ctx->bo, 0, ctx->addr[0], ctx->bo_size,
> + ctx->sync, 1);
>
> - cork->spin = spin;
> - cork->fd = fd;
> - cork->vm = vm;
> - cork->bo = bo;
> - cork->exec_queue = exec_queue;
> - cork->syncobj = syncobj;
> + return ctx;
> }
>
> -bool xe_cork_started(struct xe_cork *cork)
> +/**
> + * xe_cork_sync_start:
> + *
> + * @fd: xe device fd
> + * @ctx: pointer to xe_cork structure
> + *
> + * run the spinner using xe_spin_init submit batch using xe_exec
> + * and wait for fence using syncobj_wait
> + */
> +void xe_cork_sync_start(int fd, struct xe_cork *ctx)
> {
> - return xe_spin_started(cork->spin);
> -}
> + igt_assert(ctx);
>
> -void xe_cork_wait_started(struct xe_cork *cork)
> -{
> - xe_spin_wait_started(cork->spin);
> -}
> + ctx->spin_opts.addr = ctx->addr[0];
> + ctx->spin_opts.write_timestamp = true;
> + ctx->spin_opts.preempt = true;
> + xe_spin_init(ctx->spin, &ctx->spin_opts);
>
> -void xe_cork_end(struct xe_cork *cork)
> -{
> - xe_spin_end(cork->spin);
> -}
> + /* reuse sync[0] as in-fence for exec */
> + ctx->sync[0].flags &= ~DRM_XE_SYNC_FLAG_SIGNAL;
>
> -void xe_cork_wait_done(struct xe_cork *cork)
> -{
> - igt_assert(syncobj_wait(cork->fd, &cork->syncobj, 1, INT64_MAX, 0,
> - NULL));
> + ctx->exec.exec_queue_id = ctx->exec_queue;
> +
> + if (ctx->width > 1)
> + ctx->exec.address = to_user_pointer(ctx->addr);
> + else
> + ctx->exec.address = ctx->addr[0];
> +
> + xe_exec(fd, &ctx->exec);
> +
> + xe_spin_wait_started(ctx->spin);
> + igt_assert(!syncobj_wait(fd, &ctx->sync[1].handle, 1, 1, 0, NULL));
> +
> + if (ctx->cork_opts.debug)
> + igt_info("%d: spinner started\n", ctx->class);
> }
>
> -void xe_cork_fini(struct xe_cork *cork)
> +/*
> + * xe_cork_sync_end
> + *
> + * @fd: xe device fd
> + * @ctx: pointer to xe_cork structure
> + *
> + * Wrapper to end spinner created by xe_cork_create. It will
> + * unbind the vm which was binded to the exec_queue and bo.
> + */
> +void xe_cork_sync_end(int fd, struct xe_cork *ctx)
> {
> - syncobj_destroy(cork->fd, cork->syncobj);
> - xe_exec_queue_destroy(cork->fd, cork->exec_queue);
> - xe_vm_destroy(cork->fd, cork->vm);
> - gem_close(cork->fd, cork->bo);
> +
> + if (!ctx)
> + return;
> +
> + if (ctx->ended)
> + igt_warn("Don't attempt call end twice %d\n", ctx->ended);
> +
> + xe_spin_end(ctx->spin);
> +
> + igt_assert(syncobj_wait(fd, &ctx->sync[1].handle, 1, INT64_MAX, 0, NULL));
> +
> + ctx->sync[0].flags |= DRM_XE_SYNC_FLAG_SIGNAL;
> + syncobj_reset(fd, &ctx->sync[0].handle, 1);
Now it is correct.
> +
> + xe_vm_unbind_async(fd, ctx->vm, 0, 0, ctx->addr[0], ctx->bo_size, ctx->sync, 1);
> + igt_assert(syncobj_wait(fd, &ctx->sync[0].handle, 1, INT64_MAX, 0, NULL));
> +
> + ctx->ended = true;
> +
> + if (ctx->cork_opts.debug)
> + igt_info("%d: spinner ended (timestamp=%u)\n", ctx->class,
> + ctx->spin->timestamp);
> }
>
> -uint32_t xe_cork_sync_handle(struct xe_cork *cork)
> +/*
> + * xe_cork_destroy
> + *
> + * @fd: xe device fd
> + * @ctx: pointer to xe_cork structure
> + *
> + * It will destroy vm, exec_queue and free the ctx.
> + */
> +void xe_cork_destroy(int fd, struct xe_cork *ctx)
> {
> - return cork->syncobj;
> + if (!ctx)
> + return;
> +
> + syncobj_destroy(fd, ctx->sync[0].handle);
> + syncobj_destroy(fd, ctx->sync[1].handle);
> + xe_exec_queue_destroy(fd, ctx->exec_queue);
> +
> + if (ctx->cork_opts.ahnd)
> + put_ahnd(ctx->cork_opts.ahnd);
This is wrong. You can't release ahnd what comes from the caller.
Instead you should free offsets here. I would suggest to use
get_offset() and put_offset() helpers for alloc/free.
--
Zbigniew
> +
> + munmap(ctx->spin, ctx->bo_size);
> + gem_close(fd, ctx->bo);
> +
> + free(ctx);
> }
> diff --git a/lib/xe/xe_spin.h b/lib/xe/xe_spin.h
> index d65adb05c..593065bc0 100644
> --- a/lib/xe/xe_spin.h
> +++ b/lib/xe/xe_spin.h
> @@ -32,6 +32,11 @@ struct xe_spin_opts {
> bool write_timestamp;
> };
>
> +struct xe_cork_opts {
> + uint64_t ahnd;
> + bool debug;
> +};
> +
> /* Mapped GPU object */
> struct xe_spin {
> uint32_t batch[128];
> @@ -43,9 +48,36 @@ struct xe_spin {
> uint32_t timestamp;
> };
>
> +struct xe_cork {
> + struct xe_spin *spin;
> + int fd;
> + uint32_t vm;
> + uint32_t bo;
> + uint32_t exec_queue;
> + uint32_t syncobj;
> + uint64_t addr[XE_MAX_ENGINE_INSTANCE];
> + struct drm_xe_sync sync[2];
> + struct drm_xe_exec exec;
> + size_t bo_size;
> + struct xe_spin_opts spin_opts;
> + struct xe_cork_opts cork_opts;
> + bool ended;
> + uint16_t class;
> + uint16_t width;
> + uint16_t num_placements;
> +};
> +
> igt_spin_t *xe_spin_create(int fd, const struct igt_spin_factory *opt);
> uint32_t duration_to_ctx_ticks(int fd, int gt_id, uint64_t ns);
> void xe_spin_init(struct xe_spin *spin, struct xe_spin_opts *opts);
> +struct xe_cork *
> +xe_cork_create(int fd, struct drm_xe_engine_class_instance *hwe, uint32_t vm,
> + uint16_t width, uint16_t num_placements, struct xe_cork_opts *opts);
> +void xe_cork_destroy(int fd, struct xe_cork *ctx);
> +
> +#define xe_cork_create_opts(fd, hwe, vm, width, num_placements, ...) \
> + xe_cork_create(fd, hwe, vm, width, num_placements, \
> + &((struct xe_cork_opts){__VA_ARGS__}))
>
> #define xe_spin_init_opts(fd, ...) \
> xe_spin_init(fd, &((struct xe_spin_opts){__VA_ARGS__}))
> @@ -55,23 +87,7 @@ void xe_spin_sync_wait(int fd, struct igt_spin *spin);
> void xe_spin_wait_started(struct xe_spin *spin);
> void xe_spin_end(struct xe_spin *spin);
> void xe_spin_free(int fd, struct igt_spin *spin);
> -
> -struct xe_cork {
> - struct xe_spin *spin;
> - int fd;
> - uint32_t vm;
> - uint32_t bo;
> - uint32_t exec_queue;
> - uint32_t syncobj;
> -};
> -
> -void xe_cork_init(int fd, struct drm_xe_engine_class_instance *hwe,
> - struct xe_cork *cork);
> -bool xe_cork_started(struct xe_cork *cork);
> -void xe_cork_wait_started(struct xe_cork *cork);
> -void xe_cork_end(struct xe_cork *cork);
> -void xe_cork_wait_done(struct xe_cork *cork);
> -void xe_cork_fini(struct xe_cork *cork);
> -uint32_t xe_cork_sync_handle(struct xe_cork *cork);
> +void xe_cork_sync_start(int fd, struct xe_cork *ctx);
> +void xe_cork_sync_end(int fd, struct xe_cork *ctx);
>
> #endif /* XE_SPIN_H */
> diff --git a/tests/intel/xe_drm_fdinfo.c b/tests/intel/xe_drm_fdinfo.c
> index ef9273e2a..66a181d5b 100644
> --- a/tests/intel/xe_drm_fdinfo.c
> +++ b/tests/intel/xe_drm_fdinfo.c
> @@ -367,133 +367,6 @@ static void basic_engine_utilization(int xe)
> igt_require(info.num_engines);
> }
>
> -struct spin_ctx {
> - uint32_t vm;
> - uint64_t addr[XE_MAX_ENGINE_INSTANCE];
> - struct drm_xe_sync sync[2];
> - struct drm_xe_exec exec;
> - uint32_t exec_queue;
> - size_t bo_size;
> - uint32_t bo;
> - struct xe_spin *spin;
> - struct xe_spin_opts spin_opts;
> - bool ended;
> - uint16_t class;
> - uint16_t width;
> - uint16_t num_placements;
> -};
> -
> -static struct spin_ctx *
> -spin_ctx_init(int fd, struct drm_xe_engine_class_instance *hwe, uint32_t vm,
> - uint16_t width, uint16_t num_placements)
> -{
> - struct spin_ctx *ctx = calloc(1, sizeof(*ctx));
> -
> - igt_assert(width && num_placements &&
> - (width == 1 || num_placements == 1));
> - igt_assert_lt(width, XE_MAX_ENGINE_INSTANCE);
> -
> - ctx->class = hwe->engine_class;
> - ctx->width = width;
> - ctx->num_placements = num_placements;
> - ctx->vm = vm;
> -
> - for (unsigned int i = 0; i < width; i++)
> - ctx->addr[i] = 0x100000 + 0x100000 * hwe->engine_class;
> -
> - ctx->exec.num_batch_buffer = width;
> - ctx->exec.num_syncs = 2;
> - ctx->exec.syncs = to_user_pointer(ctx->sync);
> -
> - ctx->sync[0].type = DRM_XE_SYNC_TYPE_SYNCOBJ;
> - ctx->sync[0].flags = DRM_XE_SYNC_FLAG_SIGNAL;
> - ctx->sync[0].handle = syncobj_create(fd, 0);
> -
> - ctx->sync[1].type = DRM_XE_SYNC_TYPE_SYNCOBJ;
> - ctx->sync[1].flags = DRM_XE_SYNC_FLAG_SIGNAL;
> - ctx->sync[1].handle = syncobj_create(fd, 0);
> -
> - ctx->bo_size = sizeof(struct xe_spin);
> - ctx->bo_size = xe_bb_size(fd, ctx->bo_size);
> - ctx->bo = xe_bo_create(fd, ctx->vm, ctx->bo_size,
> - vram_if_possible(fd, hwe->gt_id),
> - DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
> - ctx->spin = xe_bo_map(fd, ctx->bo, ctx->bo_size);
> -
> - igt_assert_eq(__xe_exec_queue_create(fd, ctx->vm, width, num_placements,
> - hwe, 0, &ctx->exec_queue), 0);
> -
> - xe_vm_bind_async(fd, ctx->vm, 0, ctx->bo, 0, ctx->addr[0], ctx->bo_size,
> - ctx->sync, 1);
> -
> - return ctx;
> -}
> -
> -static void
> -spin_sync_start(int fd, struct spin_ctx *ctx)
> -{
> - if (!ctx)
> - return;
> -
> - ctx->spin_opts.addr = ctx->addr[0];
> - ctx->spin_opts.write_timestamp = true;
> - ctx->spin_opts.preempt = true;
> - xe_spin_init(ctx->spin, &ctx->spin_opts);
> -
> - /* re-use sync[0] for exec */
> - ctx->sync[0].flags &= ~DRM_XE_SYNC_FLAG_SIGNAL;
> -
> - ctx->exec.exec_queue_id = ctx->exec_queue;
> -
> - if (ctx->width > 1)
> - ctx->exec.address = to_user_pointer(ctx->addr);
> - else
> - ctx->exec.address = ctx->addr[0];
> -
> - xe_exec(fd, &ctx->exec);
> -
> - xe_spin_wait_started(ctx->spin);
> - igt_assert(!syncobj_wait(fd, &ctx->sync[1].handle, 1, 1, 0, NULL));
> -
> - igt_debug("%s: spinner started\n", engine_map[ctx->class]);
> -}
> -
> -static void
> -spin_sync_end(int fd, struct spin_ctx *ctx)
> -{
> - if (!ctx || ctx->ended)
> - return;
> -
> - xe_spin_end(ctx->spin);
> -
> - igt_assert(syncobj_wait(fd, &ctx->sync[1].handle, 1, INT64_MAX, 0, NULL));
> - igt_assert(syncobj_wait(fd, &ctx->sync[0].handle, 1, INT64_MAX, 0, NULL));
> -
> - ctx->sync[0].flags |= DRM_XE_SYNC_FLAG_SIGNAL;
> - xe_vm_unbind_async(fd, ctx->vm, 0, 0, ctx->addr[0], ctx->bo_size, ctx->sync, 1);
> - igt_assert(syncobj_wait(fd, &ctx->sync[0].handle, 1, INT64_MAX, 0, NULL));
> -
> - ctx->ended = true;
> - igt_debug("%s: spinner ended (timestamp=%u)\n", engine_map[ctx->class],
> - ctx->spin->timestamp);
> -}
> -
> -static void
> -spin_ctx_destroy(int fd, struct spin_ctx *ctx)
> -{
> - if (!ctx)
> - return;
> -
> - syncobj_destroy(fd, ctx->sync[0].handle);
> - syncobj_destroy(fd, ctx->sync[1].handle);
> - xe_exec_queue_destroy(fd, ctx->exec_queue);
> -
> - munmap(ctx->spin, ctx->bo_size);
> - gem_close(fd, ctx->bo);
> -
> - free(ctx);
> -}
> -
> static void
> check_results(struct pceu_cycles *s1, struct pceu_cycles *s2,
> int class, int width, enum expected_load expected_load)
> @@ -535,7 +408,7 @@ utilization_single(int fd, struct drm_xe_engine_class_instance *hwe, unsigned in
> {
> struct pceu_cycles pceu1[2][DRM_XE_ENGINE_CLASS_COMPUTE + 1];
> struct pceu_cycles pceu2[2][DRM_XE_ENGINE_CLASS_COMPUTE + 1];
> - struct spin_ctx *ctx = NULL;
> + struct xe_cork *ctx = NULL;
> enum expected_load expected_load;
> uint32_t vm;
> int new_fd;
> @@ -545,8 +418,8 @@ utilization_single(int fd, struct drm_xe_engine_class_instance *hwe, unsigned in
>
> vm = xe_vm_create(fd, 0, 0);
> if (flags & TEST_BUSY) {
> - ctx = spin_ctx_init(fd, hwe, vm, 1, 1);
> - spin_sync_start(fd, ctx);
> + ctx = xe_cork_create_opts(fd, hwe, vm, 1, 1);
> + xe_cork_sync_start(fd, ctx);
> }
>
> read_engine_cycles(fd, pceu1[0]);
> @@ -555,7 +428,7 @@ utilization_single(int fd, struct drm_xe_engine_class_instance *hwe, unsigned in
>
> usleep(batch_duration_usec);
> if (flags & TEST_TRAILING_IDLE)
> - spin_sync_end(fd, ctx);
> + xe_cork_sync_end(fd, ctx);
>
> read_engine_cycles(fd, pceu2[0]);
> if (flags & TEST_ISOLATION)
> @@ -574,8 +447,7 @@ utilization_single(int fd, struct drm_xe_engine_class_instance *hwe, unsigned in
> close(new_fd);
> }
>
> - spin_sync_end(fd, ctx);
> - spin_ctx_destroy(fd, ctx);
> + xe_cork_destroy(fd, ctx);
> xe_vm_destroy(fd, vm);
> }
>
> @@ -584,19 +456,19 @@ utilization_single_destroy_queue(int fd, struct drm_xe_engine_class_instance *hw
> {
> struct pceu_cycles pceu1[DRM_XE_ENGINE_CLASS_COMPUTE + 1];
> struct pceu_cycles pceu2[DRM_XE_ENGINE_CLASS_COMPUTE + 1];
> - struct spin_ctx *ctx = NULL;
> + struct xe_cork *ctx = NULL;
> uint32_t vm;
>
> vm = xe_vm_create(fd, 0, 0);
> - ctx = spin_ctx_init(fd, hwe, vm, 1, 1);
> - spin_sync_start(fd, ctx);
> + ctx = xe_cork_create_opts(fd, hwe, vm, 1, 1);
> + xe_cork_sync_start(fd, ctx);
>
> read_engine_cycles(fd, pceu1);
> usleep(batch_duration_usec);
>
> /* destroy queue before sampling again */
> - spin_sync_end(fd, ctx);
> - spin_ctx_destroy(fd, ctx);
> + xe_cork_sync_end(fd, ctx);
> + xe_cork_destroy(fd, ctx);
>
> read_engine_cycles(fd, pceu2);
>
> @@ -610,18 +482,17 @@ utilization_others_idle(int fd, struct drm_xe_engine_class_instance *hwe)
> {
> struct pceu_cycles pceu1[DRM_XE_ENGINE_CLASS_COMPUTE + 1];
> struct pceu_cycles pceu2[DRM_XE_ENGINE_CLASS_COMPUTE + 1];
> - struct spin_ctx *ctx = NULL;
> + struct xe_cork *ctx = NULL;
> uint32_t vm;
> int class;
>
> vm = xe_vm_create(fd, 0, 0);
> -
> - ctx = spin_ctx_init(fd, hwe, vm, 1, 1);
> - spin_sync_start(fd, ctx);
> + ctx = xe_cork_create_opts(fd, hwe, vm, 1, 1);
> + xe_cork_sync_start(fd, ctx);
>
> read_engine_cycles(fd, pceu1);
> usleep(batch_duration_usec);
> - spin_sync_end(fd, ctx);
> + xe_cork_sync_end(fd, ctx);
> read_engine_cycles(fd, pceu2);
>
> xe_for_each_engine_class(class) {
> @@ -631,8 +502,7 @@ utilization_others_idle(int fd, struct drm_xe_engine_class_instance *hwe)
> check_results(pceu1, pceu2, class, 1, expected_load);
> }
>
> - spin_sync_end(fd, ctx);
> - spin_ctx_destroy(fd, ctx);
> + xe_cork_destroy(fd, ctx);
> xe_vm_destroy(fd, vm);
> }
>
> @@ -641,7 +511,7 @@ utilization_others_full_load(int fd, struct drm_xe_engine_class_instance *hwe)
> {
> struct pceu_cycles pceu1[DRM_XE_ENGINE_CLASS_COMPUTE + 1];
> struct pceu_cycles pceu2[DRM_XE_ENGINE_CLASS_COMPUTE + 1];
> - struct spin_ctx *ctx[DRM_XE_ENGINE_CLASS_COMPUTE + 1] = {};
> + struct xe_cork *ctx[DRM_XE_ENGINE_CLASS_COMPUTE + 1] = {};
> struct drm_xe_engine_class_instance *_hwe;
> uint32_t vm;
> int class;
> @@ -654,15 +524,14 @@ utilization_others_full_load(int fd, struct drm_xe_engine_class_instance *hwe)
>
> if (_class == hwe->engine_class || ctx[_class])
> continue;
> -
> - ctx[_class] = spin_ctx_init(fd, _hwe, vm, 1, 1);
> - spin_sync_start(fd, ctx[_class]);
> + ctx[_class] = xe_cork_create_opts(fd, _hwe, vm, 1, 1);
> + xe_cork_sync_start(fd, ctx[_class]);
> }
>
> read_engine_cycles(fd, pceu1);
> usleep(batch_duration_usec);
> xe_for_each_engine_class(class)
> - spin_sync_end(fd, ctx[class]);
> + xe_cork_sync_end(fd, ctx[class]);
> read_engine_cycles(fd, pceu2);
>
> xe_for_each_engine_class(class) {
> @@ -673,8 +542,7 @@ utilization_others_full_load(int fd, struct drm_xe_engine_class_instance *hwe)
> continue;
>
> check_results(pceu1, pceu2, class, 1, expected_load);
> - spin_sync_end(fd, ctx[class]);
> - spin_ctx_destroy(fd, ctx[class]);
> + xe_cork_destroy(fd, ctx[class]);
> }
>
> xe_vm_destroy(fd, vm);
> @@ -685,7 +553,7 @@ utilization_all_full_load(int fd)
> {
> struct pceu_cycles pceu1[DRM_XE_ENGINE_CLASS_COMPUTE + 1];
> struct pceu_cycles pceu2[DRM_XE_ENGINE_CLASS_COMPUTE + 1];
> - struct spin_ctx *ctx[DRM_XE_ENGINE_CLASS_COMPUTE + 1] = {};
> + struct xe_cork *ctx[DRM_XE_ENGINE_CLASS_COMPUTE + 1] = {};
> struct drm_xe_engine_class_instance *hwe;
> uint32_t vm;
> int class;
> @@ -697,15 +565,14 @@ utilization_all_full_load(int fd)
> class = hwe->engine_class;
> if (ctx[class])
> continue;
> -
> - ctx[class] = spin_ctx_init(fd, hwe, vm, 1, 1);
> - spin_sync_start(fd, ctx[class]);
> + ctx[class] = xe_cork_create_opts(fd, hwe, vm, 1, 1);
> + xe_cork_sync_start(fd, ctx[class]);
> }
>
> read_engine_cycles(fd, pceu1);
> usleep(batch_duration_usec);
> xe_for_each_engine_class(class)
> - spin_sync_end(fd, ctx[class]);
> + xe_cork_sync_end(fd, ctx[class]);
> read_engine_cycles(fd, pceu2);
>
> xe_for_each_engine_class(class) {
> @@ -713,8 +580,7 @@ utilization_all_full_load(int fd)
> continue;
>
> check_results(pceu1, pceu2, class, 1, EXPECTED_LOAD_FULL);
> - spin_sync_end(fd, ctx[class]);
> - spin_ctx_destroy(fd, ctx[class]);
> + xe_cork_destroy(fd, ctx[class]);
> }
>
> xe_vm_destroy(fd, vm);
> @@ -741,7 +607,7 @@ utilization_multi(int fd, int gt, int class, unsigned int flags)
> struct pceu_cycles pceu[2][DRM_XE_ENGINE_CLASS_COMPUTE + 1];
> struct pceu_cycles pceu_spill[2][DRM_XE_ENGINE_CLASS_COMPUTE + 1];
> struct drm_xe_engine_class_instance eci[XE_MAX_ENGINE_INSTANCE];
> - struct spin_ctx *ctx = NULL;
> + struct xe_cork *ctx = NULL;
> enum expected_load expected_load;
> int fd_spill, num_placements;
> uint32_t vm;
> @@ -767,8 +633,8 @@ utilization_multi(int fd, int gt, int class, unsigned int flags)
>
> vm = xe_vm_create(fd, 0, 0);
> if (flags & TEST_BUSY) {
> - ctx = spin_ctx_init(fd, eci, vm, width, num_placements);
> - spin_sync_start(fd, ctx);
> + ctx = xe_cork_create_opts(fd, eci, vm, width, num_placements);
> + xe_cork_sync_start(fd, ctx);
> }
>
> read_engine_cycles(fd, pceu[0]);
> @@ -777,7 +643,7 @@ utilization_multi(int fd, int gt, int class, unsigned int flags)
>
> usleep(batch_duration_usec);
> if (flags & TEST_TRAILING_IDLE)
> - spin_sync_end(fd, ctx);
> + xe_cork_sync_end(fd, ctx);
>
> read_engine_cycles(fd, pceu[1]);
> if (flags & TEST_ISOLATION)
> @@ -797,8 +663,7 @@ utilization_multi(int fd, int gt, int class, unsigned int flags)
> close(fd_spill);
> }
>
> - spin_sync_end(fd, ctx);
> - spin_ctx_destroy(fd, ctx);
> + xe_cork_destroy(fd, ctx);
>
> xe_vm_destroy(fd, vm);
> }
> diff --git a/tests/intel/xe_vm.c b/tests/intel/xe_vm.c
> index e78ddd0e5..705805de2 100644
> --- a/tests/intel/xe_vm.c
> +++ b/tests/intel/xe_vm.c
> @@ -945,18 +945,23 @@ test_bind_array(int fd, struct drm_xe_engine_class_instance *eci, int n_execs,
>
> sync[0].handle = syncobj_create(fd, 0);
> if (flags & BIND_ARRAY_ENOBUFS_FLAG) {
> - struct xe_cork cork;
> + struct xe_cork *ctx = NULL;
> + uint32_t vm_cork;
>
> - xe_cork_init(fd, eci, &cork);
> + vm_cork = xe_vm_create(fd, 0, 0);
> + ctx = xe_cork_create_opts(fd, eci, vm_cork, 1, 1, .debug = true);
> + xe_cork_sync_start(fd, ctx);
>
> - sync[1].handle = xe_cork_sync_handle(&cork);
> + sync[1].handle = ctx->sync[1].handle;
> sync[1].flags &= ~DRM_XE_SYNC_FLAG_SIGNAL;
>
> xe_vm_bind_array_err(fd, vm, bind_exec_queue, bind_ops,
> n_execs, sync, 2, ENOBUFS);
> - xe_cork_end(&cork);
> - xe_cork_wait_done(&cork);
> - xe_cork_fini(&cork);
> + /* destroy queue before sampling again */
> + xe_cork_sync_end(fd, ctx);
> + xe_cork_destroy(fd, ctx);
> + xe_vm_destroy(fd, vm_cork);
> +
> n_execs = n_execs / 4;
> }
>
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 7+ messages in thread
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2024-12-11 8:58 [PATCH v7 0/2] tests/xe_spin_batch: Add spin-timestamp-check Pravalika Gurram
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2024-12-13 6:18 ` Zbigniew Kempczyński
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