* [PATCH i-g-t 0/4] Add SR-IOV provisioning scheduling attributes and tests
@ 2025-01-20 20:34 Marcin Bernatowicz
2025-01-20 20:34 ` [PATCH i-g-t 1/4] lib/xe/xe_sriov_provisioning: Add scheduling attributes accessors Marcin Bernatowicz
` (6 more replies)
0 siblings, 7 replies; 12+ messages in thread
From: Marcin Bernatowicz @ 2025-01-20 20:34 UTC (permalink / raw)
To: igt-dev
Cc: Marcin Bernatowicz, Adam Miszczak, Jakub Kolakowski,
Lukasz Laguna, Michał Wajdeczko, Michał Winiarski,
Narasimha C V, Piotr Piórkowski, Satyanarayana K V P,
Tomasz Lis
Add helper functions to get and set SR-IOV provisioning scheduling
attributes. These functions provide an interface for accessing
provisioning attributes such as execution quantum, preemption timeout,
schedule if idle policy, schedule priority, and engine reset policy.
Include both returning and asserting versions to handle errors
appropriately.
Introduce a function to validate default SR-IOV scheduling attributes
for VFs and PF. This function skips the test if non-default attributes
are detected. The default attributes verified include:
- exec_quantum_ms set to 0 (infinite execution quantum)
- preempt_timeout_us set to 0 (infinite preemption timeout)
- sched_if_idle set to false
- reset_engine set to false
- sched_priority set to XE_SRIOV_SCHED_PRIORITY_LOW
Implement equal-throughput validation for VFs (PF is treated as VF0)
with identical workloads and scheduling settings.
Scheduling settings are adjusted to consider execution quantum, job
duration, and the number of VFs, while adhering to timeout constraints
and aiming for a sufficient number of job repeats. This approach
balances overall test duration with accuracy.
Verify the occurrence of engine resets
when non-preemptible workloads surpass the combined
duration of execution quantum and preemption timeout.
Cc: Adam Miszczak <adam.miszczak@linux.intel.com>
Cc: Jakub Kolakowski <jakub1.kolakowski@intel.com>
Cc: Lukasz Laguna <lukasz.laguna@intel.com>
Cc: Michał Wajdeczko <michal.wajdeczko@intel.com>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: Narasimha C V <narasimha.c.v@intel.com>
Cc: Piotr Piórkowski <piotr.piorkowski@intel.com>
Cc: Satyanarayana K V P <satyanarayana.k.v.p@intel.com>
Cc: Tomasz Lis <tomasz.lis@intel.com>
Marcin Bernatowicz (4):
lib/xe/xe_sriov_provisioning: Add scheduling attributes accessors
lib/xe/xe_sriov_provisioning: Add helper to check default scheduling
attributes
tests/xe_sriov_scheduling: VF equal-throughput validation
tests/xe_sriov_scheduling: nonpreempt-engine-resets subtest
lib/xe/xe_sriov_provisioning.c | 411 ++++++++++++++-
lib/xe/xe_sriov_provisioning.h | 54 ++
tests/intel/xe_sriov_scheduling.c | 824 ++++++++++++++++++++++++++++++
tests/meson.build | 1 +
4 files changed, 1289 insertions(+), 1 deletion(-)
create mode 100644 tests/intel/xe_sriov_scheduling.c
--
2.31.1
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH i-g-t 1/4] lib/xe/xe_sriov_provisioning: Add scheduling attributes accessors
2025-01-20 20:34 [PATCH i-g-t 0/4] Add SR-IOV provisioning scheduling attributes and tests Marcin Bernatowicz
@ 2025-01-20 20:34 ` Marcin Bernatowicz
2025-01-29 14:07 ` Laguna, Lukasz
2025-01-20 20:34 ` [PATCH i-g-t 2/4] lib/xe/xe_sriov_provisioning: Add helper to check default scheduling attributes Marcin Bernatowicz
` (5 subsequent siblings)
6 siblings, 1 reply; 12+ messages in thread
From: Marcin Bernatowicz @ 2025-01-20 20:34 UTC (permalink / raw)
To: igt-dev
Cc: Marcin Bernatowicz, Adam Miszczak, Jakub Kolakowski,
Lukasz Laguna, Michał Wajdeczko, Michał Winiarski,
Narasimha C V, Piotr Piórkowski, Satyanarayana K V P,
Tomasz Lis
Add helper functions to get and set SR-IOV provisioning scheduling
attributes. These functions provide an interface for accessing
provisioning attributes such as execution quantum, preemption timeout,
schedule if idle policy, schedule priority, and engine reset policy.
Include both returning and asserting versions to handle errors
appropriately.
Signed-off-by: Marcin Bernatowicz <marcin.bernatowicz@linux.intel.com>
Cc: Adam Miszczak <adam.miszczak@linux.intel.com>
Cc: Jakub Kolakowski <jakub1.kolakowski@intel.com>
Cc: Lukasz Laguna <lukasz.laguna@intel.com>
Cc: Michał Wajdeczko <michal.wajdeczko@intel.com>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: Narasimha C V <narasimha.c.v@intel.com>
Cc: Piotr Piórkowski <piotr.piorkowski@intel.com>
Cc: Satyanarayana K V P <satyanarayana.k.v.p@intel.com>
Cc: Tomasz Lis <tomasz.lis@intel.com>
---
lib/xe/xe_sriov_provisioning.c | 369 ++++++++++++++++++++++++++++++++-
lib/xe/xe_sriov_provisioning.h | 53 +++++
2 files changed, 421 insertions(+), 1 deletion(-)
diff --git a/lib/xe/xe_sriov_provisioning.c b/lib/xe/xe_sriov_provisioning.c
index 22035ffd8..4e3fbaae2 100644
--- a/lib/xe/xe_sriov_provisioning.c
+++ b/lib/xe/xe_sriov_provisioning.c
@@ -6,10 +6,11 @@
#include <errno.h>
#include "igt_core.h"
+#include "igt_sriov_device.h"
#include "intel_chipset.h"
#include "linux_scaffold.h"
-#include "xe/xe_mmio.h"
#include "xe/xe_query.h"
+#include "xe/xe_mmio.h"
#include "xe/xe_sriov_debugfs.h"
#include "xe/xe_sriov_provisioning.h"
@@ -296,3 +297,369 @@ bool xe_sriov_is_shared_res_provisionable(int pf, enum xe_sriov_shared_res res,
return true;
}
+
+/**
+ * __xe_sriov_get_exec_quantum_ms - Read the execution quantum in milliseconds for a given VF
+ * @pf: PF device file descriptor
+ * @vf_num: VF number (1-based) or 0 for PF
+ * @gt_num: GT number
+ * @value: Pointer to store the read value
+ *
+ * Reads the execution quantum in milliseconds for the given PF device @pf,
+ * VF number @vf_num on GT @gt_num.
+ *
+ * Return: 0 on success, negative error code on failure.
+ */
+int __xe_sriov_get_exec_quantum_ms(int pf, unsigned int vf_num,
+ unsigned int gt_num, uint32_t *value)
+{
+ return __xe_sriov_pf_debugfs_get_u32(pf, vf_num, gt_num, "exec_quantum_ms", value);
+}
+
+/**
+ * xe_sriov_get_exec_quantum_ms - Get the execution quantum in milliseconds for a given VF
+ * @pf: PF device file descriptor
+ * @vf_num: VF number (1-based) or 0 for PF
+ * @gt_num: GT number
+ *
+ * A throwing version of __xe_sriov_get_exec_quantum_ms().
+ * Instead of returning an error code, it returns the value read and
+ * asserts in case of an error.
+ *
+ * Return: Execution quantum in milliseconds assigned to a given VF. Asserts in case of failure.
+ */
+uint32_t xe_sriov_get_exec_quantum_ms(int pf, unsigned int vf_num,
+ unsigned int gt_num)
+{
+ uint32_t value;
+
+ igt_fail_on(__xe_sriov_get_exec_quantum_ms(pf, vf_num, gt_num, &value));
+
+ return value;
+}
+
+/**
+ * __xe_sriov_set_exec_quantum_ms - Set the execution quantum in milliseconds for a given VF
+ * @pf: PF device file descriptor
+ * @vf_num: VF number (1-based) or 0 for PF
+ * @gt_num: GT number
+ * @value: Value to set
+ *
+ * Sets the execution quantum in milliseconds for the given PF device @pf,
+ * VF number @vf_num on GT @gt_num.
+ *
+ * Return: 0 on success, negative error code on failure.
+ */
+int __xe_sriov_set_exec_quantum_ms(int pf, unsigned int vf_num,
+ unsigned int gt_num, uint32_t value)
+{
+ return __xe_sriov_pf_debugfs_set_u32(pf, vf_num, gt_num, "exec_quantum_ms", value);
+}
+
+/**
+ * xe_sriov_set_exec_quantum_ms - Set the execution quantum in milliseconds for a given VF
+ * @pf: PF device file descriptor
+ * @vf_num: VF number (1-based) or 0 for PF
+ * @gt_num: GT number
+ * @value: Value to set
+ *
+ * A throwing version of __xe_sriov_set_exec_quantum_ms().
+ * Instead of returning an error code, it asserts in case of an error.
+ */
+void xe_sriov_set_exec_quantum_ms(int pf, unsigned int vf_num,
+ unsigned int gt_num, uint32_t value)
+{
+ igt_fail_on(__xe_sriov_set_exec_quantum_ms(pf, vf_num, gt_num, value));
+}
+
+/**
+ * __xe_sriov_get_preempt_timeout_us - Get the preemption timeout in microseconds for a given VF
+ * @pf: PF device file descriptor
+ * @vf_num: VF number (1-based) or 0 for PF
+ * @gt_num: GT number
+ * @value: Pointer to store the read value
+ *
+ * Reads the preemption timeout in microseconds for the given PF device @pf,
+ * VF number @vf_num on GT @gt_num.
+ *
+ * Return: 0 on success, negative error code on failure.
+ */
+int __xe_sriov_get_preempt_timeout_us(int pf, unsigned int vf_num,
+ unsigned int gt_num, uint32_t *value)
+{
+ return __xe_sriov_pf_debugfs_get_u32(pf, vf_num, gt_num, "preempt_timeout_us", value);
+}
+
+/**
+ * xe_sriov_get_preempt_timeout_us - Get the preemption timeout in microseconds for a given VF
+ * @pf: PF device file descriptor
+ * @vf_num: VF number (1-based) or 0 for PF
+ * @gt_num: GT number
+ *
+ * A throwing version of __xe_sriov_get_preempt_timeout_us().
+ * Instead of returning an error code, it returns the value read and
+ * asserts in case of an error.
+ *
+ * Return: Preemption timeout in microseconds assigned to a given VF.
+ * Asserts in case of failure.
+ */
+uint32_t xe_sriov_get_preempt_timeout_us(int pf, unsigned int vf_num,
+ unsigned int gt_num)
+{
+ uint32_t value;
+
+ igt_fail_on(__xe_sriov_get_preempt_timeout_us(pf, vf_num, gt_num, &value));
+
+ return value;
+}
+
+/**
+ * __xe_sriov_set_preempt_timeout_us - Set the preemption timeout in microseconds for a given VF
+ * @pf: PF device file descriptor
+ * @vf_num: VF number (1-based) or 0 for PF
+ * @gt_num: GT number
+ * @value: Value to set
+ *
+ * Sets the preemption timeout in microseconds for the given PF device @pf,
+ * VF number @vf_num on GT @gt_num.
+ *
+ * Return: 0 on success, negative error code on failure.
+ */
+int __xe_sriov_set_preempt_timeout_us(int pf, unsigned int vf_num,
+ unsigned int gt_num, uint32_t value)
+{
+ return __xe_sriov_pf_debugfs_set_u32(pf, vf_num, gt_num, "preempt_timeout_us", value);
+}
+
+/**
+ * xe_sriov_set_preempt_timeout_us - Set the preemption timeout in microseconds for a given VF
+ * @pf: PF device file descriptor
+ * @vf_num: VF number (1-based) or 0 for PF
+ * @gt_num: GT number
+ * @value: Value to set
+ *
+ * A throwing version of __xe_sriov_set_preempt_timeout_us().
+ * Instead of returning an error code, it asserts in case of an error.
+ */
+void xe_sriov_set_preempt_timeout_us(int pf, unsigned int vf_num,
+ unsigned int gt_num, uint32_t value)
+{
+ igt_fail_on(__xe_sriov_set_preempt_timeout_us(pf, vf_num, gt_num, value));
+}
+
+/**
+ * __xe_sriov_get_engine_reset - Get the engine reset policy status for a given GT
+ * @pf: PF device file descriptor
+ * @gt_num: GT number
+ * @value: Pointer to store the read engine reset policy status
+ *
+ * Reads the engine reset status for the given PF device @pf on GT @gt_num.
+ *
+ * Return: 0 on success, negative error code on failure.
+ */
+int __xe_sriov_get_engine_reset(int pf, unsigned int gt_num, bool *value)
+{
+ return __xe_sriov_pf_debugfs_get_boolean(pf, 0, gt_num, "reset_engine", value);
+}
+
+/**
+ * xe_sriov_get_engine_reset - Get the engine reset policy status for a given GT
+ * @pf: PF device file descriptor
+ * @gt_num: GT number
+ *
+ * A throwing version of __xe_sriov_get_engine_reset().
+ * Instead of returning an error code, it returns the engine reset status
+ * and asserts in case of an error.
+ *
+ * Return: The engine reset status for the given GT.
+ * Asserts in case of failure.
+ */
+bool xe_sriov_get_engine_reset(int pf, unsigned int gt_num)
+{
+ bool value;
+
+ igt_fail_on(__xe_sriov_get_engine_reset(pf, gt_num, &value));
+
+ return value;
+}
+
+/**
+ * __xe_sriov_set_engine_reset - Set the engine reset policy for a given GT
+ * @pf: PF device file descriptor
+ * @gt_num: GT number
+ * @value: Engine reset policy status to set
+ *
+ * Sets the engine reset policy for the given PF device @pf on GT @gt_num.
+ *
+ * Return: 0 on success, negative error code on failure.
+ */
+int __xe_sriov_set_engine_reset(int pf, unsigned int gt_num, bool value)
+{
+ return __xe_sriov_pf_debugfs_set_boolean(pf, 0, gt_num, "reset_engine", value);
+}
+
+/**
+ * xe_sriov_set_engine_reset - Set the engine reset policy for a given GT
+ * @pf: PF device file descriptor
+ * @gt_num: GT number
+ * @value: Engine reset policy status to set
+ *
+ * A throwing version of __xe_sriov_set_engine_reset().
+ * Instead of returning an error code, it asserts in case of an error.
+ */
+void xe_sriov_set_engine_reset(int pf, unsigned int gt_num, bool value)
+{
+ igt_fail_on(__xe_sriov_set_engine_reset(pf, gt_num, value));
+}
+
+/**
+ * __xe_sriov_get_sched_if_idle - Get the scheduling if idle policy for a given GT
+ * @pf: PF device file descriptor
+ * @gt_num: GT number
+ * @value: Pointer to store the read scheduling if idle policy status
+ *
+ * Reads the scheduling if idle policy status for the given PF device @pf on GT @gt_num.
+ *
+ * Return: 0 on success, negative error code on failure.
+ */
+int __xe_sriov_get_sched_if_idle(int pf, unsigned int gt_num, bool *value)
+{
+ return __xe_sriov_pf_debugfs_get_boolean(pf, 0, gt_num, "sched_if_idle", value);
+}
+
+/**
+ * xe_sriov_get_sched_if_idle - Get the scheduling if idle policy for a given GT
+ * @pf: PF device file descriptor
+ * @gt_num: GT number
+ *
+ * A throwing version of __xe_sriov_get_sched_if_idle().
+ * Instead of returning an error code, it returns the scheduling if idle policy status
+ * and asserts in case of an error.
+ *
+ * Return: The scheduling if idle status for the given GT.
+ * Asserts in case of failure.
+ */
+bool xe_sriov_get_sched_if_idle(int pf, unsigned int gt_num)
+{
+ bool value;
+
+ igt_fail_on(__xe_sriov_get_sched_if_idle(pf, gt_num, &value));
+
+ return value;
+}
+
+/**
+ * __xe_sriov_set_sched_if_idle - Set the scheduling if idle policy status for a given GT
+ * @pf: PF device file descriptor
+ * @gt_num: GT number
+ * @value: Scheduling if idle policy status to set
+ *
+ * Sets the scheduling if idle policy status for the given PF device @pf on GT @gt_num.
+ *
+ * Return: 0 on success, negative error code on failure.
+ */
+int __xe_sriov_set_sched_if_idle(int pf, unsigned int gt_num, bool value)
+{
+ return __xe_sriov_pf_debugfs_set_boolean(pf, 0, gt_num, "sched_if_idle", value);
+}
+
+/**
+ * xe_sriov_set_sched_if_idle - Set the scheduling if idle status policy for a given GT
+ * @pf: PF device file descriptor
+ * @gt_num: GT number
+ * @value: Scheduling if idle policy status to set
+ *
+ * A throwing version of __xe_sriov_set_sched_if_idle().
+ * Instead of returning an error code, it asserts in case of an error.
+ */
+void xe_sriov_set_sched_if_idle(int pf, unsigned int gt_num, bool value)
+{
+ igt_fail_on(__xe_sriov_set_sched_if_idle(pf, gt_num, value));
+}
+
+/**
+ * __xe_sriov_get_sched_priority - Get the scheduling priority for a given VF
+ * @pf: PF device file descriptor
+ * @vf_num: VF number (1-based) or 0 for PF
+ * @gt_num: GT number
+ * @value: Pointer to store the read scheduling priority
+ *
+ * Reads the scheduling priority for the given PF device @pf,
+ * VF number @vf_num on GT @gt_num.
+ *
+ * Return: 0 on success, negative error code on failure.
+ */
+int __xe_sriov_get_sched_priority(int pf, unsigned int vf_num,
+ unsigned int gt_num,
+ enum xe_sriov_sched_priority *value)
+{
+ uint32_t priority;
+ int ret;
+
+ ret = __xe_sriov_pf_debugfs_get_u32(pf, vf_num, gt_num, "sched_priority", &priority);
+ if (igt_debug_on_f(ret, "Failed to read sched_priority attribute for GT%u\n", gt_num))
+ return ret;
+
+ if (priority <= XE_SRIOV_SCHED_PRIORITY_HIGH) {
+ *value = (enum xe_sriov_sched_priority)priority;
+ return 0;
+ }
+
+ return -ERANGE;
+}
+
+/**
+ * xe_sriov_get_sched_priority - Get the scheduling priority for a given VF
+ * @pf: PF device file descriptor
+ * @vf_num: VF number (1-based) or 0 for PF
+ * @gt_num: GT number
+ *
+ * A throwing version of __xe_sriov_get_sched_priority().
+ * Instead of returning an error code, it returns the scheduling priority
+ * and asserts in case of an error.
+ *
+ * Return: The scheduling priority for the given VF and GT.
+ * Asserts in case of failure.
+ */
+enum xe_sriov_sched_priority
+xe_sriov_get_sched_priority(int pf, unsigned int vf_num, unsigned int gt_num)
+{
+ enum xe_sriov_sched_priority priority;
+
+ igt_fail_on(__xe_sriov_get_sched_priority(pf, vf_num, gt_num, &priority));
+
+ return priority;
+}
+
+/**
+ * __xe_sriov_set_sched_priority - Set the scheduling priority for a given VF
+ * @pf: PF device file descriptor
+ * @vf_num: VF number (1-based) or 0 for PF
+ * @gt_num: GT number
+ * @value: Scheduling priority to set (enum xe_sriov_sched_priority)
+ *
+ * Sets the scheduling priority for the given PF device @pf, VF number @vf_num on GT @gt_num.
+ *
+ * Return: 0 on success, negative error code on failure.
+ */
+int __xe_sriov_set_sched_priority(int pf, unsigned int vf_num, unsigned int gt_num,
+ enum xe_sriov_sched_priority value)
+{
+ return __xe_sriov_pf_debugfs_set_u32(pf, vf_num, gt_num, "sched_priority", value);
+}
+
+/**
+ * xe_sriov_set_sched_priority - Set the scheduling priority for a given VF
+ * @pf: PF device file descriptor
+ * @vf_num: VF number (1-based) or 0 for PF
+ * @gt_num: GT number
+ * @value: Scheduling priority to set (enum xe_sriov_sched_priority)
+ *
+ * A throwing version of __xe_sriov_set_sched_priority().
+ * Instead of returning an error code, it asserts in case of an error.
+ */
+void xe_sriov_set_sched_priority(int pf, unsigned int vf_num, unsigned int gt_num,
+ enum xe_sriov_sched_priority value)
+{
+ igt_fail_on(__xe_sriov_set_sched_priority(pf, vf_num, gt_num, value));
+}
diff --git a/lib/xe/xe_sriov_provisioning.h b/lib/xe/xe_sriov_provisioning.h
index b4300ec2e..b22f96d88 100644
--- a/lib/xe/xe_sriov_provisioning.h
+++ b/lib/xe/xe_sriov_provisioning.h
@@ -55,6 +55,26 @@ enum xe_sriov_shared_res {
for ((res) = 0; (res) < XE_SRIOV_SHARED_RES_NUM; (res)++) \
for_if(xe_sriov_is_shared_res_provisionable((pf), (res), (gt)))
+/**
+ * enum xe_sriov_sched_priority - SR-IOV scheduling priorities
+ * @XE_SRIOV_SCHED_PRIORITY_LOW: Schedule VF only if it has active work and
+ * VF-State is VF_STATE_RUNNING. This is the
+ * default value.
+ * @XE_SRIOV_SCHED_PRIORITY_NORMAL: Schedule VF always, irrespective of whether
+ * it has work or not, as long as VF-State is
+ * not VF_STATE_DISABLED. Once scheduled, VF
+ * will run for its entire execution quantum.
+ * @XE_SRIOV_SCHED_PRIORITY_HIGH: Schedule VF in the next time-slice after the
+ * current active time-slice completes. VF is
+ * scheduled only if it has work and VF-State is
+ * VF_STATE_RUNNING.
+ */
+enum xe_sriov_sched_priority {
+ XE_SRIOV_SCHED_PRIORITY_LOW,
+ XE_SRIOV_SCHED_PRIORITY_NORMAL,
+ XE_SRIOV_SCHED_PRIORITY_HIGH
+};
+
/**
* struct xe_sriov_provisioned_range - Provisioned range for a Virtual Function (VF)
* @vf_id: The ID of the VF
@@ -89,5 +109,38 @@ int __xe_sriov_pf_set_shared_res_attr(int pf, enum xe_sriov_shared_res res,
void xe_sriov_pf_set_shared_res_attr(int pf, enum xe_sriov_shared_res res,
unsigned int vf_num, unsigned int gt_num,
uint64_t value);
+int __xe_sriov_get_exec_quantum_ms(int pf, unsigned int vf_num,
+ unsigned int gt_num, uint32_t *value);
+uint32_t xe_sriov_get_exec_quantum_ms(int pf, unsigned int vf_num,
+ unsigned int gt_num);
+int __xe_sriov_set_exec_quantum_ms(int pf, unsigned int vf_num,
+ unsigned int gt_num, uint32_t value);
+void xe_sriov_set_exec_quantum_ms(int pf, unsigned int vf_num,
+ unsigned int gt_num, uint32_t value);
+int __xe_sriov_get_preempt_timeout_us(int pf, unsigned int vf_num,
+ unsigned int gt_num, uint32_t *value);
+uint32_t xe_sriov_get_preempt_timeout_us(int pf, unsigned int vf_num,
+ unsigned int gt_num);
+int __xe_sriov_set_preempt_timeout_us(int pf, unsigned int vf_num,
+ unsigned int gt_num, uint32_t value);
+void xe_sriov_set_preempt_timeout_us(int pf, unsigned int vf_num,
+ unsigned int gt_num, uint32_t value);
+int __xe_sriov_get_engine_reset(int pf, unsigned int gt_num, bool *value);
+bool xe_sriov_get_engine_reset(int pf, unsigned int gt_num);
+int __xe_sriov_set_engine_reset(int pf, unsigned int gt_num, bool value);
+void xe_sriov_set_engine_reset(int pf, unsigned int gt_num, bool value);
+int __xe_sriov_get_sched_if_idle(int pf, unsigned int gt_num, bool *value);
+bool xe_sriov_get_sched_if_idle(int pf, unsigned int gt_num);
+int __xe_sriov_set_sched_if_idle(int pf, unsigned int gt_num, bool value);
+void xe_sriov_set_sched_if_idle(int pf, unsigned int gt_num, bool value);
+int __xe_sriov_get_sched_priority(int pf, unsigned int vf_num,
+ unsigned int gt_num,
+ enum xe_sriov_sched_priority *value);
+enum xe_sriov_sched_priority xe_sriov_get_sched_priority(int pf, unsigned int vf_num,
+ unsigned int gt_num);
+int __xe_sriov_set_sched_priority(int pf, unsigned int vf_num, unsigned int gt_num,
+ enum xe_sriov_sched_priority value);
+void xe_sriov_set_sched_priority(int pf, unsigned int vf_num, unsigned int gt_num,
+ enum xe_sriov_sched_priority value);
#endif /* __XE_SRIOV_PROVISIONING_H__ */
--
2.31.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH i-g-t 2/4] lib/xe/xe_sriov_provisioning: Add helper to check default scheduling attributes
2025-01-20 20:34 [PATCH i-g-t 0/4] Add SR-IOV provisioning scheduling attributes and tests Marcin Bernatowicz
2025-01-20 20:34 ` [PATCH i-g-t 1/4] lib/xe/xe_sriov_provisioning: Add scheduling attributes accessors Marcin Bernatowicz
@ 2025-01-20 20:34 ` Marcin Bernatowicz
2025-01-29 14:14 ` Laguna, Lukasz
2025-01-20 20:34 ` [PATCH i-g-t 3/4] tests/xe_sriov_scheduling: VF equal-throughput validation Marcin Bernatowicz
` (4 subsequent siblings)
6 siblings, 1 reply; 12+ messages in thread
From: Marcin Bernatowicz @ 2025-01-20 20:34 UTC (permalink / raw)
To: igt-dev
Cc: Marcin Bernatowicz, Adam Miszczak, Jakub Kolakowski,
Lukasz Laguna, Michał Wajdeczko, Michał Winiarski,
Narasimha C V, Piotr Piórkowski, Satyanarayana K V P,
Tomasz Lis
Introduce a function to validate default SR-IOV scheduling attributes
for VFs and PF. This function skips the test if non-default attributes
are detected. The default attributes verified include:
- exec_quantum_ms set to 0 (infinite execution quantum)
- preempt_timeout_us set to 0 (infinite preemption timeout)
- sched_if_idle set to false
- reset_engine set to false
- sched_priority set to XE_SRIOV_SCHED_PRIORITY_LOW
Signed-off-by: Marcin Bernatowicz <marcin.bernatowicz@linux.intel.com>
Cc: Adam Miszczak <adam.miszczak@linux.intel.com>
Cc: Jakub Kolakowski <jakub1.kolakowski@intel.com>
Cc: Lukasz Laguna <lukasz.laguna@intel.com>
Cc: Michał Wajdeczko <michal.wajdeczko@intel.com>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: Narasimha C V <narasimha.c.v@intel.com>
Cc: Piotr Piórkowski <piotr.piorkowski@intel.com>
Cc: Satyanarayana K V P <satyanarayana.k.v.p@intel.com>
Cc: Tomasz Lis <tomasz.lis@intel.com>
---
lib/xe/xe_sriov_provisioning.c | 42 ++++++++++++++++++++++++++++++++++
lib/xe/xe_sriov_provisioning.h | 1 +
2 files changed, 43 insertions(+)
diff --git a/lib/xe/xe_sriov_provisioning.c b/lib/xe/xe_sriov_provisioning.c
index 4e3fbaae2..da580144d 100644
--- a/lib/xe/xe_sriov_provisioning.c
+++ b/lib/xe/xe_sriov_provisioning.c
@@ -663,3 +663,45 @@ void xe_sriov_set_sched_priority(int pf, unsigned int vf_num, unsigned int gt_nu
{
igt_fail_on(__xe_sriov_set_sched_priority(pf, vf_num, gt_num, value));
}
+
+/**
+ * xe_sriov_require_default_scheduling_attributes - Ensure default SR-IOV scheduling attributes
+ * @pf_fd: PF device file descriptor
+ *
+ * Skips the current test if non-default SR-IOV scheduling attributes are set.
+ *
+ * Default scheduling attributes are as follows for each VF and PF:
+ * - exec_quantum_ms equals zero (meaning infinity)
+ * - preempt_timeout_us equals zero (meaning infinity)
+ * - sched_if_idle equals false
+ * - reset_engine equals false
+ * - sched_priority equals XE_SRIOV_SCHED_PRIORITY_LOW
+ */
+void xe_sriov_require_default_scheduling_attributes(int pf)
+{
+ unsigned int totalvfs = igt_sriov_get_total_vfs(pf);
+ enum xe_sriov_sched_priority sched_priority;
+ bool sched_if_idle, reset_engine;
+ uint32_t eq, pt;
+ unsigned int gt;
+
+ xe_for_each_gt(pf, gt) {
+ igt_skip_on(__xe_sriov_get_sched_if_idle(pf, gt, &sched_if_idle));
+ igt_require_f(!sched_if_idle, "sched_if_idle != false on gt%u\n", gt);
+ igt_skip_on(__xe_sriov_get_engine_reset(pf, gt, &reset_engine));
+ igt_require_f(!reset_engine, "reset_engine != false on gt%u\n", gt);
+
+ for (unsigned int vf_num = 0; vf_num <= totalvfs; ++vf_num) {
+ igt_skip_on(__xe_sriov_get_exec_quantum_ms(pf, vf_num, gt, &eq));
+ igt_require_f(eq == 0, "exec_quantum_ms != 0 on gt%u/VF%u\n", gt, vf_num);
+
+ igt_skip_on(__xe_sriov_get_preempt_timeout_us(pf, vf_num, gt, &pt));
+ igt_require_f(pt == 0, "preempt_timeout_us != 0 on gt%u/VF%u\n",
+ gt, vf_num);
+
+ igt_skip_on(__xe_sriov_get_sched_priority(pf, vf_num, gt, &sched_priority));
+ igt_require_f(sched_priority == XE_SRIOV_SCHED_PRIORITY_LOW,
+ "sched_priority != LOW on gt%u/VF%u\n", gt, vf_num);
+ }
+ }
+}
diff --git a/lib/xe/xe_sriov_provisioning.h b/lib/xe/xe_sriov_provisioning.h
index b22f96d88..4382f528f 100644
--- a/lib/xe/xe_sriov_provisioning.h
+++ b/lib/xe/xe_sriov_provisioning.h
@@ -142,5 +142,6 @@ int __xe_sriov_set_sched_priority(int pf, unsigned int vf_num, unsigned int gt_n
enum xe_sriov_sched_priority value);
void xe_sriov_set_sched_priority(int pf, unsigned int vf_num, unsigned int gt_num,
enum xe_sriov_sched_priority value);
+void xe_sriov_require_default_scheduling_attributes(int pf);
#endif /* __XE_SRIOV_PROVISIONING_H__ */
--
2.31.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH i-g-t 3/4] tests/xe_sriov_scheduling: VF equal-throughput validation
2025-01-20 20:34 [PATCH i-g-t 0/4] Add SR-IOV provisioning scheduling attributes and tests Marcin Bernatowicz
2025-01-20 20:34 ` [PATCH i-g-t 1/4] lib/xe/xe_sriov_provisioning: Add scheduling attributes accessors Marcin Bernatowicz
2025-01-20 20:34 ` [PATCH i-g-t 2/4] lib/xe/xe_sriov_provisioning: Add helper to check default scheduling attributes Marcin Bernatowicz
@ 2025-01-20 20:34 ` Marcin Bernatowicz
2025-01-30 15:40 ` Laguna, Lukasz
2025-01-20 20:34 ` [PATCH i-g-t 4/4] tests/xe_sriov_scheduling: nonpreempt-engine-resets subtest Marcin Bernatowicz
` (3 subsequent siblings)
6 siblings, 1 reply; 12+ messages in thread
From: Marcin Bernatowicz @ 2025-01-20 20:34 UTC (permalink / raw)
To: igt-dev
Cc: Marcin Bernatowicz, Adam Miszczak, Jakub Kolakowski,
Lukasz Laguna, Michał Wajdeczko, Michał Winiarski,
Narasimha C V, Piotr Piórkowski, Satyanarayana K V P,
Tomasz Lis
Implement equal-throughput validation for VFs (PF is treated as VF0)
with identical workloads and scheduling settings.
Scheduling settings are adjusted to consider execution quantum, job
duration, and the number of VFs, while adhering to timeout constraints
and aiming for a sufficient number of job repeats. This approach
balances overall test duration with accuracy.
Signed-off-by: Marcin Bernatowicz <marcin.bernatowicz@linux.intel.com>
Cc: Adam Miszczak <adam.miszczak@linux.intel.com>
Cc: Jakub Kolakowski <jakub1.kolakowski@intel.com>
Cc: Lukasz Laguna <lukasz.laguna@intel.com>
Cc: Michał Wajdeczko <michal.wajdeczko@intel.com>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: Narasimha C V <narasimha.c.v@intel.com>
Cc: Piotr Piórkowski <piotr.piorkowski@intel.com>
Cc: Satyanarayana K V P <satyanarayana.k.v.p@intel.com>
Cc: Tomasz Lis <tomasz.lis@intel.com>
---
tests/intel/xe_sriov_scheduling.c | 698 ++++++++++++++++++++++++++++++
tests/meson.build | 1 +
2 files changed, 699 insertions(+)
create mode 100644 tests/intel/xe_sriov_scheduling.c
diff --git a/tests/intel/xe_sriov_scheduling.c b/tests/intel/xe_sriov_scheduling.c
new file mode 100644
index 000000000..20ec15b22
--- /dev/null
+++ b/tests/intel/xe_sriov_scheduling.c
@@ -0,0 +1,698 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2024 Intel Corporation
+ */
+#include "igt.h"
+#include "igt_sriov_device.h"
+#include "igt_syncobj.h"
+#include "xe_drm.h"
+#include "xe/xe_ioctl.h"
+#include "xe/xe_spin.h"
+#include "xe/xe_sriov_provisioning.h"
+
+/**
+ * TEST: Tests for SR-IOV scheduling parameters.
+ * Category: Core
+ * Mega feature: SR-IOV
+ * Sub-category: scheduling
+ * Functionality: vGPU profiles scheduling parameters
+ * Run type: FULL
+ * Description: Verify the occurrence of engine resets
+ * when non-preemptible workloads surpass the combined
+ * duration of execution quantum and preemption timeout.
+ */
+
+enum subm_sync_method { SYNC_NONE, SYNC_BARRIER };
+
+struct subm_opts {
+ enum subm_sync_method sync_method;
+ uint32_t exec_quantum_ms;
+ uint32_t preempt_timeout_us;
+ double outlier_treshold;
+};
+
+struct subm_work_desc {
+ uint64_t duration_ms;
+ bool preempt;
+ unsigned int repeats;
+};
+
+struct subm_stats {
+ igt_stats_t samples;
+ uint64_t start_timestamp;
+ uint64_t end_timestamp;
+ unsigned int num_early_finish;
+ unsigned int concurrent_execs;
+ double concurrent_rate;
+ double concurrent_mean;
+};
+
+struct subm {
+ char id[32];
+ int fd;
+ int vf_num;
+ struct subm_work_desc work;
+ uint32_t expected_ticks;
+ uint64_t addr;
+ uint32_t vm;
+ struct drm_xe_engine_class_instance hwe;
+ uint32_t exec_queue_id;
+ uint32_t bo;
+ size_t bo_size;
+ struct xe_spin *spin;
+ struct drm_xe_sync sync[1];
+ struct drm_xe_exec exec;
+};
+
+struct subm_thread_data {
+ struct subm subm;
+ struct subm_stats stats;
+ const struct subm_opts *opts;
+ pthread_t thread;
+ pthread_barrier_t *barrier;
+};
+
+struct subm_set {
+ struct subm_thread_data *data;
+ int ndata;
+ enum subm_sync_method sync_method;
+ pthread_barrier_t barrier;
+};
+
+static void subm_init(struct subm *s, int fd, int vf_num, uint64_t addr,
+ struct drm_xe_engine_class_instance hwe)
+{
+ memset(s, 0, sizeof(*s));
+ s->fd = fd;
+ s->vf_num = vf_num;
+ s->hwe = hwe;
+ snprintf(s->id, sizeof(s->id), "VF%d %d:%d:%d", vf_num,
+ hwe.engine_class, hwe.engine_instance, hwe.gt_id);
+ s->addr = addr ? addr : 0x1a0000;
+ s->vm = xe_vm_create(s->fd, 0, 0);
+ s->exec_queue_id = xe_exec_queue_create(s->fd, s->vm, &s->hwe, 0);
+ s->bo_size = ALIGN(sizeof(struct xe_spin) + xe_cs_prefetch_size(s->fd),
+ xe_get_default_alignment(s->fd));
+ s->bo = xe_bo_create(s->fd, s->vm, s->bo_size,
+ vram_if_possible(fd, s->hwe.gt_id),
+ DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
+ s->spin = xe_bo_map(s->fd, s->bo, s->bo_size);
+ xe_vm_bind_sync(s->fd, s->vm, s->bo, 0, s->addr, s->bo_size);
+ /* out fence */
+ s->sync[0].type = DRM_XE_SYNC_TYPE_SYNCOBJ;
+ s->sync[0].flags = DRM_XE_SYNC_FLAG_SIGNAL;
+ s->sync[0].handle = syncobj_create(s->fd, 0);
+ s->exec.num_syncs = 1;
+ s->exec.syncs = to_user_pointer(&s->sync[0]);
+ s->exec.num_batch_buffer = 1;
+ s->exec.exec_queue_id = s->exec_queue_id;
+ s->exec.address = s->addr;
+}
+
+static void subm_fini(struct subm *s)
+{
+ xe_vm_unbind_sync(s->fd, s->vm, 0, s->addr, s->bo_size);
+ gem_munmap(s->spin, s->bo_size);
+ gem_close(s->fd, s->bo);
+ xe_exec_queue_destroy(s->fd, s->exec_queue_id);
+ xe_vm_destroy(s->fd, s->vm);
+ syncobj_destroy(s->fd, s->sync[0].handle);
+}
+
+static void subm_workload_init(struct subm *s, struct subm_work_desc *work)
+{
+ s->work = *work;
+ s->expected_ticks = xe_spin_nsec_to_ticks(s->fd, s->hwe.gt_id,
+ s->work.duration_ms * 1000000);
+ xe_spin_init_opts(s->spin, .addr = s->addr, .preempt = s->work.preempt,
+ .ctx_ticks = s->expected_ticks);
+}
+
+static void subm_wait(struct subm *s, uint64_t abs_timeout_nsec)
+{
+ igt_assert(syncobj_wait(s->fd, &s->sync[0].handle, 1, abs_timeout_nsec,
+ 0, NULL));
+}
+
+static void subm_exec(struct subm *s)
+{
+ syncobj_reset(s->fd, &s->sync[0].handle, 1);
+ xe_exec(s->fd, &s->exec);
+}
+
+static bool subm_is_work_complete(struct subm *s)
+{
+ return s->expected_ticks <= ~s->spin->ticks_delta;
+}
+
+static bool subm_is_exec_queue_banned(struct subm *s)
+{
+ struct drm_xe_exec_queue_get_property args = {
+ .exec_queue_id = s->exec_queue_id,
+ .property = DRM_XE_EXEC_QUEUE_GET_PROPERTY_BAN,
+ };
+ int ret = igt_ioctl(s->fd, DRM_IOCTL_XE_EXEC_QUEUE_GET_PROPERTY, &args);
+
+ return ret || args.value;
+}
+
+static void subm_exec_loop(struct subm *s, struct subm_stats *stats,
+ const struct subm_opts *opts)
+{
+ struct timespec tv;
+ unsigned int i;
+
+ igt_gettime(&tv);
+ stats->start_timestamp =
+ tv.tv_sec * (uint64_t)NSEC_PER_SEC + tv.tv_nsec;
+ igt_debug("[%s] start_timestamp: %f\n", s->id, stats->start_timestamp * 1e-9);
+
+ for (i = 0; i < s->work.repeats; ++i) {
+ igt_gettime(&tv);
+
+ subm_exec(s);
+
+ subm_wait(s, INT64_MAX);
+
+ igt_stats_push(&stats->samples, igt_nsec_elapsed(&tv));
+
+ if (!subm_is_work_complete(s)) {
+ stats->num_early_finish++;
+
+ igt_debug("[%s] subm #%d early_finish=%u\n",
+ s->id, i, stats->num_early_finish);
+
+ if (subm_is_exec_queue_banned(s))
+ break;
+ }
+ }
+
+ igt_gettime(&tv);
+ stats->end_timestamp = tv.tv_sec * (uint64_t)NSEC_PER_SEC + tv.tv_nsec;
+ igt_debug("[%s] end_timestamp: %f\n", s->id, stats->end_timestamp * 1e-9);
+}
+
+static void *subm_thread(void *thread_data)
+{
+ struct subm_thread_data *td = thread_data;
+ struct timespec tv;
+
+ igt_gettime(&tv);
+ igt_debug("[%s] thread started %ld.%ld\n", td->subm.id, tv.tv_sec,
+ tv.tv_nsec);
+
+ if (td->barrier)
+ pthread_barrier_wait(td->barrier);
+
+ subm_exec_loop(&td->subm, &td->stats, td->opts);
+
+ return NULL;
+}
+
+static void subm_set_dispatch_and_wait_threads(struct subm_set *set)
+{
+ int i;
+
+ for (i = 0; i < set->ndata; ++i)
+ igt_assert_eq(0, pthread_create(&set->data[i].thread, NULL,
+ subm_thread, &set->data[i]));
+
+ for (i = 0; i < set->ndata; ++i)
+ pthread_join(set->data[i].thread, NULL);
+}
+
+static void subm_set_alloc_data(struct subm_set *set, unsigned int ndata)
+{
+ igt_assert(!set->data);
+ set->ndata = ndata;
+ set->data = calloc(set->ndata, sizeof(struct subm_thread_data));
+ igt_assert(set->data);
+}
+
+static void subm_set_free_data(struct subm_set *set)
+{
+ free(set->data);
+ set->data = NULL;
+ set->ndata = 0;
+}
+
+static void subm_set_init_sync_method(struct subm_set *set, enum subm_sync_method sm)
+{
+ set->sync_method = sm;
+ if (set->sync_method == SYNC_BARRIER)
+ pthread_barrier_init(&set->barrier, NULL, set->ndata);
+}
+
+static void subm_set_fini(struct subm_set *set)
+{
+ int i;
+
+ if (!set->ndata)
+ return;
+
+ for (i = 0; i < set->ndata; ++i) {
+ igt_stats_fini(&set->data[i].stats.samples);
+ subm_fini(&set->data[i].subm);
+ drm_close_driver(set->data[i].subm.fd);
+ }
+ subm_set_free_data(set);
+
+ if (set->sync_method == SYNC_BARRIER)
+ pthread_barrier_destroy(&set->barrier);
+}
+
+struct init_vf_ids_opts {
+ bool shuffle;
+ bool shuffle_pf;
+};
+
+static void init_vf_ids(uint8_t *array, size_t n,
+ const struct init_vf_ids_opts *opts)
+{
+ size_t i, j;
+
+ if (!opts->shuffle_pf && n) {
+ array[0] = 0;
+ n -= 1;
+ array = array + 1;
+ }
+
+ for (i = 0; i < n; i++) {
+ j = (opts->shuffle) ? rand() % (i + 1) : i;
+
+ if (j != i)
+ array[i] = array[j];
+
+ array[j] = i + (opts->shuffle_pf ? 0 : 1);
+ }
+}
+
+struct vf_sched_params {
+ uint32_t exec_quantum_ms;
+ uint32_t preempt_timeout_us;
+};
+
+static void set_vfs_scheduling_params(int pf_fd, int num_vfs,
+ const struct vf_sched_params *p)
+{
+ unsigned int gt;
+
+ xe_for_each_gt(pf_fd, gt) {
+ for (int vf = 0; vf <= num_vfs; ++vf) {
+ xe_sriov_set_exec_quantum_ms(pf_fd, vf, gt, p->exec_quantum_ms);
+ xe_sriov_set_preempt_timeout_us(pf_fd, vf, gt, p->preempt_timeout_us);
+ }
+ }
+}
+
+static bool check_within_epsilon(const double x, const double ref, const double tol)
+{
+ return x <= (1.0 + tol) * ref && x >= (1.0 - tol) * ref;
+}
+
+static void compute_common_time_frame_stats(struct subm_set *set)
+{
+ struct subm_thread_data *data = set->data;
+ int i, j, ndata = set->ndata;
+ struct subm_stats *stats;
+ uint64_t common_start = 0;
+ uint64_t common_end = UINT64_MAX;
+
+ /* Find the common time frame */
+ for (i = 0; i < ndata; i++) {
+ stats = &data[i].stats;
+
+ if (stats->start_timestamp > common_start)
+ common_start = stats->start_timestamp;
+
+ if (stats->end_timestamp < common_end)
+ common_end = stats->end_timestamp;
+ }
+
+ igt_info("common time frame: [%lu;%lu] %.2fms\n",
+ common_start, common_end, (common_end - common_start) / 1e6);
+
+ if (igt_warn_on_f(common_end <= common_start, "No common time frame for all sets found\n"))
+ return;
+
+ /* Compute concurrent_rate for each sample set within the common time frame */
+ for (i = 0; i < ndata; i++) {
+ uint64_t total_samples_duration = 0;
+ uint64_t samples_duration_in_common_frame = 0;
+
+ stats = &data[i].stats;
+ stats->concurrent_execs = 0;
+ stats->concurrent_rate = 0.0;
+ stats->concurrent_mean = 0.0;
+
+ for (j = 0; j < stats->samples.n_values; j++) {
+ uint64_t sample_start = stats->start_timestamp + total_samples_duration;
+ uint64_t sample_end = sample_start + stats->samples.values_u64[j];
+
+ if (sample_start >= common_start &&
+ sample_end <= common_end) {
+ stats->concurrent_execs++;
+ samples_duration_in_common_frame +=
+ stats->samples.values_u64[j];
+ }
+
+ total_samples_duration += stats->samples.values_u64[j];
+ }
+
+ stats->concurrent_rate = samples_duration_in_common_frame ?
+ (double)stats->concurrent_execs /
+ (samples_duration_in_common_frame *
+ 1e-9) :
+ 0.0;
+ stats->concurrent_mean = stats->concurrent_execs ?
+ (double)samples_duration_in_common_frame /
+ stats->concurrent_execs :
+ 0.0;
+ igt_info("[%s] Throughput = %.4f execs/s mean duration=%.4fms nsamples=%d\n",
+ data[i].subm.id, stats->concurrent_rate, stats->concurrent_mean * 1e-6,
+ stats->concurrent_execs);
+ }
+}
+
+static void log_sample_values(char *id, struct subm_stats *stats,
+ double comparison_mean, double outlier_treshold)
+{
+ const uint64_t *values = stats->samples.values_u64;
+ unsigned int n = stats->samples.n_values;
+ char buffer[2048];
+ char *p = buffer, *pend = buffer + sizeof(buffer);
+ unsigned int i;
+ const unsigned int edge_items = 3;
+ bool is_outlier;
+ double tolerance = outlier_treshold * comparison_mean;
+
+ p += snprintf(p, pend - p,
+ "[%s] start=%f end=%f nsamples=%u comparison_mean=%.2fms\n",
+ id, stats->start_timestamp * 1e-9, stats->end_timestamp * 1e-9, n,
+ comparison_mean * 1e-6);
+
+ for (i = 0; i < n && p < pend; ++i) {
+ is_outlier = fabs(values[i] - comparison_mean) > tolerance;
+
+ if (n <= 2 * edge_items || i < edge_items ||
+ i >= n - edge_items || is_outlier) {
+ if (is_outlier) {
+ double pct_diff =
+ 100 *
+ (comparison_mean ?
+ (values[i] - comparison_mean) /
+ comparison_mean :
+ 1.0);
+
+ p += snprintf(p, pend - p,
+ "%0.2f @%d Pct Diff %0.2f%%\n",
+ values[i] * 1e-6, i,
+ pct_diff);
+ } else {
+ p += snprintf(p, pend - p, "%0.2f\n",
+ values[i] * 1e-6);
+ }
+ }
+
+ if (i == edge_items && n > 2 * edge_items)
+ p += snprintf(p, pend - p, "...\n");
+ }
+
+ igt_debug("%s\n", buffer);
+}
+
+#define MIN_NUM_REPEATS 25
+#define MIN_EXEC_QUANTUM_MS 8
+#define MAX_EXEC_QUANTUM_MS 32
+#define MIN_JOB_DURATION_MS 16
+#define JOB_TIMEOUT_MS 5000
+#define MAX_TOTAL_DURATION_MS 15000
+#define PREFERRED_TOTAL_DURATION_MS 10000
+#define MAX_PREFERRED_REPEATS 100
+
+struct job_sched_params {
+ int duration_ms;
+ int num_repeats;
+ struct vf_sched_params sched_params;
+};
+
+static int calculate_job_duration_ms(int execution_ms)
+{
+ return execution_ms * 2 > MIN_JOB_DURATION_MS ? execution_ms * 2 :
+ MIN_JOB_DURATION_MS;
+}
+
+static bool compute_max_exec_quantum_ms(struct job_sched_params *params,
+ int num_threads)
+{
+ for (int test_execution_ms = MAX_EXEC_QUANTUM_MS;
+ test_execution_ms >= MIN_EXEC_QUANTUM_MS; test_execution_ms--) {
+ int test_duration_ms =
+ calculate_job_duration_ms(test_execution_ms);
+ int max_delay_ms = (num_threads - 1) * test_execution_ms;
+
+ /*
+ * Check if the job can complete within JOB_TIMEOUT_MS,
+ * including the maximum scheduling delay
+ */
+ if (test_duration_ms + max_delay_ms <= JOB_TIMEOUT_MS) {
+ int estimated_num_repeats =
+ MAX_TOTAL_DURATION_MS /
+ (num_threads * test_duration_ms);
+
+ if (estimated_num_repeats >= MIN_NUM_REPEATS) {
+ params->sched_params.exec_quantum_ms = test_execution_ms;
+ return true;
+ }
+ }
+ }
+ return false;
+}
+
+static void adjust_num_repeats(struct job_sched_params *params, int num_threads)
+{
+ int preferred_max_repeats = PREFERRED_TOTAL_DURATION_MS /
+ (num_threads * params->duration_ms);
+ int optimal_repeats = min(preferred_max_repeats, MAX_PREFERRED_REPEATS);
+
+ params->num_repeats = max(optimal_repeats, MIN_NUM_REPEATS);
+}
+
+static struct job_sched_params
+prepare_job_sched_params(int num_threads, const struct subm_opts *opts)
+{
+ struct job_sched_params params = { MIN_NUM_REPEATS,
+ MIN_JOB_DURATION_MS,
+ { MIN_EXEC_QUANTUM_MS,
+ MIN_EXEC_QUANTUM_MS * 2000 } };
+
+ if (opts->exec_quantum_ms || opts->preempt_timeout_us) {
+ if (opts->exec_quantum_ms)
+ params.sched_params.exec_quantum_ms =
+ opts->exec_quantum_ms;
+ if (opts->preempt_timeout_us)
+ params.sched_params.preempt_timeout_us =
+ opts->preempt_timeout_us;
+ } else {
+ if (igt_debug_on(!compute_max_exec_quantum_ms(¶ms, num_threads)))
+ return params;
+
+ /*
+ * After computing a feasible max_exec_quantum_ms,
+ * select a random exec_quantum_ms within the new range
+ */
+ params.sched_params.exec_quantum_ms =
+ MIN_EXEC_QUANTUM_MS +
+ rand() % (params.sched_params.exec_quantum_ms -
+ MIN_EXEC_QUANTUM_MS + 1);
+ params.sched_params.preempt_timeout_us =
+ params.sched_params.exec_quantum_ms * 2000;
+ }
+ params.duration_ms =
+ calculate_job_duration_ms(params.sched_params.exec_quantum_ms);
+
+ adjust_num_repeats(¶ms, num_threads);
+
+ return params;
+}
+
+/**
+ * SUBTEST: equal-throughput
+ * Description:
+ * Check all VFs with same scheduling settings running same workload
+ * achieve the same throughput.
+ */
+static void throughput_ratio(int pf_fd, int num_vfs, const struct subm_opts *opts)
+{
+ struct subm_set set_ = {}, *set = &set_;
+ uint8_t vf_ids[num_vfs + 1 /*PF*/];
+ struct job_sched_params job_sched_params = prepare_job_sched_params(num_vfs + 1, opts);
+
+ igt_info("eq=%ums pt=%uus duration=%ums repeats=%d num_vfs=%d\n",
+ job_sched_params.sched_params.exec_quantum_ms,
+ job_sched_params.sched_params.preempt_timeout_us,
+ job_sched_params.duration_ms, job_sched_params.num_repeats,
+ num_vfs + 1);
+
+ init_vf_ids(vf_ids, ARRAY_SIZE(vf_ids),
+ &(struct init_vf_ids_opts){ .shuffle = true,
+ .shuffle_pf = true });
+ xe_sriov_require_default_scheduling_attributes(pf_fd);
+ /* enable VFs */
+ igt_sriov_disable_driver_autoprobe(pf_fd);
+ igt_sriov_enable_vfs(pf_fd, num_vfs);
+ /* set scheduling params (PF and VFs) */
+ set_vfs_scheduling_params(pf_fd, num_vfs, &job_sched_params.sched_params);
+ /* probe VFs */
+ igt_sriov_enable_driver_autoprobe(pf_fd);
+ for (int vf = 1; vf <= num_vfs; ++vf)
+ igt_sriov_bind_vf_drm_driver(pf_fd, vf);
+
+ /* init subm_set */
+ subm_set_alloc_data(set, num_vfs + 1 /*PF*/);
+ subm_set_init_sync_method(set, opts->sync_method);
+
+ for (int n = 0; n < set->ndata; ++n) {
+ int vf_fd =
+ vf_ids[n] ?
+ igt_sriov_open_vf_drm_device(pf_fd, vf_ids[n]) :
+ drm_reopen_driver(pf_fd);
+
+ igt_assert_fd(vf_fd);
+ set->data[n].opts = opts;
+ subm_init(&set->data[n].subm, vf_fd, vf_ids[n], 0,
+ xe_engine(vf_fd, 0)->instance);
+ subm_workload_init(&set->data[n].subm,
+ &(struct subm_work_desc){
+ .duration_ms = job_sched_params.duration_ms,
+ .preempt = true,
+ .repeats = job_sched_params.num_repeats });
+ igt_stats_init_with_size(&set->data[n].stats.samples,
+ set->data[n].subm.work.repeats);
+ if (set->sync_method == SYNC_BARRIER)
+ set->data[n].barrier = &set->barrier;
+ }
+
+ /* dispatch spinners, wait for results */
+ subm_set_dispatch_and_wait_threads(set);
+
+ /* verify results */
+ compute_common_time_frame_stats(set);
+ for (int n = 0; n < set->ndata; ++n) {
+ struct subm_stats *stats = &set->data[n].stats;
+ const double ref_rate = set->data[0].stats.concurrent_rate;
+
+ igt_assert_eq(0, stats->num_early_finish);
+ if (!check_within_epsilon(stats->concurrent_rate, ref_rate,
+ opts->outlier_treshold)) {
+ log_sample_values(set->data[0].subm.id,
+ &set->data[0].stats,
+ set->data[0].stats.concurrent_mean,
+ opts->outlier_treshold);
+ log_sample_values(set->data[n].subm.id, stats,
+ set->data[0].stats.concurrent_mean,
+ opts->outlier_treshold);
+ igt_assert_f(false,
+ "Throughput=%.3f execs/s not within +-%.0f%% of expected=%.3f execs/s\n",
+ stats->concurrent_rate,
+ opts->outlier_treshold * 100, ref_rate);
+ }
+ }
+
+ /* cleanup */
+ subm_set_fini(set);
+ set_vfs_scheduling_params(pf_fd, num_vfs, &(struct vf_sched_params){});
+ igt_sriov_disable_vfs(pf_fd);
+}
+
+static struct subm_opts subm_opts = {
+ .sync_method = SYNC_BARRIER,
+ .outlier_treshold = 0.1,
+};
+
+static bool extended_scope;
+
+static int subm_opts_handler(int opt, int opt_index, void *data)
+{
+ switch (opt) {
+ case 'e':
+ extended_scope = true;
+ break;
+ case 's':
+ subm_opts.sync_method = atoi(optarg);
+ igt_info("Sync method: %d\n", subm_opts.sync_method);
+ break;
+ case 'q':
+ subm_opts.exec_quantum_ms = atoi(optarg);
+ igt_info("Execution quantum ms: %u\n", subm_opts.exec_quantum_ms);
+ break;
+ case 'p':
+ subm_opts.preempt_timeout_us = atoi(optarg);
+ igt_info("Preempt timeout us: %u\n", subm_opts.preempt_timeout_us);
+ break;
+ case 't':
+ subm_opts.outlier_treshold = atoi(optarg) / 100.0;
+ igt_info("Outlier threshold: %.2f\n", subm_opts.outlier_treshold);
+ break;
+ default:
+ return IGT_OPT_HANDLER_ERROR;
+ }
+
+ return IGT_OPT_HANDLER_SUCCESS;
+}
+
+static const struct option long_opts[] = {
+ { .name = "extended", .has_arg = false, .val = 'e', },
+ { .name = "sync", .has_arg = true, .val = 's', },
+ { .name = "threshold", .has_arg = true, .val = 't', },
+ { .name = "eq_ms", .has_arg = true, .val = 'q', },
+ { .name = "pt_us", .has_arg = true, .val = 'p', },
+ {}
+};
+
+static const char help_str[] =
+ " --extended\tRun the extended test scope\n"
+ " --sync\tThreads synchronization method: 0 - none 1 - barrier (Default 1)\n"
+ " --threshold\tSample outlier threshold (Default 0.1)\n"
+ " --eq_ms\texec_quantum_ms\n"
+ " --pt_us\tpreempt_timeout_us\n";
+
+igt_main_args("s:e:p:", long_opts, help_str, subm_opts_handler, NULL)
+{
+ int pf_fd;
+ bool autoprobe;
+
+ igt_fixture {
+ pf_fd = drm_open_driver(DRIVER_XE);
+ igt_require(igt_sriov_is_pf(pf_fd));
+ igt_require(igt_sriov_get_enabled_vfs(pf_fd) == 0);
+ autoprobe = igt_sriov_is_driver_autoprobe_enabled(pf_fd);
+ xe_sriov_require_default_scheduling_attributes(pf_fd);
+ }
+
+ igt_describe("Check VFs achieve equal throughput");
+ igt_subtest_with_dynamic("equal-throughput") {
+ if (extended_scope)
+ for_each_sriov_num_vfs(pf_fd, vf)
+ igt_dynamic_f("numvfs-%d", vf)
+ throughput_ratio(pf_fd, vf, &subm_opts);
+
+ for_random_sriov_vf(pf_fd, vf)
+ igt_dynamic("numvfs-random")
+ throughput_ratio(pf_fd, vf, &subm_opts);
+ }
+
+ igt_fixture {
+ set_vfs_scheduling_params(pf_fd, igt_sriov_get_total_vfs(pf_fd),
+ &(struct vf_sched_params){});
+ igt_sriov_disable_vfs(pf_fd);
+ /* abort to avoid execution of next tests with enabled VFs */
+ igt_abort_on_f(igt_sriov_get_enabled_vfs(pf_fd) > 0,
+ "Failed to disable VF(s)");
+ autoprobe ? igt_sriov_enable_driver_autoprobe(pf_fd) :
+ igt_sriov_disable_driver_autoprobe(pf_fd);
+ igt_abort_on_f(autoprobe != igt_sriov_is_driver_autoprobe_enabled(pf_fd),
+ "Failed to restore sriov_drivers_autoprobe value\n");
+ drm_close_driver(pf_fd);
+ }
+}
diff --git a/tests/meson.build b/tests/meson.build
index 33dffad31..c8868d5ab 100644
--- a/tests/meson.build
+++ b/tests/meson.build
@@ -318,6 +318,7 @@ intel_xe_progs = [
'xe_spin_batch',
'xe_sriov_auto_provisioning',
'xe_sriov_flr',
+ 'xe_sriov_scheduling',
'xe_sysfs_defaults',
'xe_sysfs_preempt_timeout',
'xe_sysfs_scheduler',
--
2.31.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH i-g-t 4/4] tests/xe_sriov_scheduling: nonpreempt-engine-resets subtest
2025-01-20 20:34 [PATCH i-g-t 0/4] Add SR-IOV provisioning scheduling attributes and tests Marcin Bernatowicz
` (2 preceding siblings ...)
2025-01-20 20:34 ` [PATCH i-g-t 3/4] tests/xe_sriov_scheduling: VF equal-throughput validation Marcin Bernatowicz
@ 2025-01-20 20:34 ` Marcin Bernatowicz
2025-01-30 17:02 ` Laguna, Lukasz
2025-01-20 22:31 ` ✗ i915.CI.BAT: failure for Add SR-IOV provisioning scheduling attributes and tests Patchwork
` (2 subsequent siblings)
6 siblings, 1 reply; 12+ messages in thread
From: Marcin Bernatowicz @ 2025-01-20 20:34 UTC (permalink / raw)
To: igt-dev
Cc: Marcin Bernatowicz, Adam Miszczak, Jakub Kolakowski,
Lukasz Laguna, Michał Wajdeczko, Michał Winiarski,
Narasimha C V, Piotr Piórkowski, Satyanarayana K V P,
Tomasz Lis
Verify the occurrence of engine resets
when non-preemptible workloads surpass the combined
duration of execution quantum and preemption timeout.
Signed-off-by: Marcin Bernatowicz <marcin.bernatowicz@linux.intel.com>
Cc: Adam Miszczak <adam.miszczak@linux.intel.com>
Cc: Jakub Kolakowski <jakub1.kolakowski@intel.com>
Cc: Lukasz Laguna <lukasz.laguna@intel.com>
Cc: Michał Wajdeczko <michal.wajdeczko@intel.com>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: Narasimha C V <narasimha.c.v@intel.com>
Cc: Piotr Piórkowski <piotr.piorkowski@intel.com>
Cc: Satyanarayana K V P <satyanarayana.k.v.p@intel.com>
Cc: Tomasz Lis <tomasz.lis@intel.com>
---
tests/intel/xe_sriov_scheduling.c | 126 ++++++++++++++++++++++++++++++
1 file changed, 126 insertions(+)
diff --git a/tests/intel/xe_sriov_scheduling.c b/tests/intel/xe_sriov_scheduling.c
index 20ec15b22..5999c3f98 100644
--- a/tests/intel/xe_sriov_scheduling.c
+++ b/tests/intel/xe_sriov_scheduling.c
@@ -605,6 +605,119 @@ static void throughput_ratio(int pf_fd, int num_vfs, const struct subm_opts *opt
igt_sriov_disable_vfs(pf_fd);
}
+static unsigned int select_random_exec_quantum_value(unsigned int min,
+ unsigned int num_vfs,
+ unsigned int job_timeout)
+{
+ int max = min(64u, job_timeout / (3 * (num_vfs + 1)));
+
+ igt_skip_on(max <= min);
+ /* random between min (inclusive) and max (exclusive) */
+ return rand() % (max - min) + min;
+}
+
+static struct vf_sched_params prepare_vf_sched_params(int num_vfs,
+ const struct subm_opts *opts)
+{
+ struct vf_sched_params params = {};
+
+ if (opts->exec_quantum_ms || opts->preempt_timeout_us) {
+ if (opts->exec_quantum_ms)
+ params.exec_quantum_ms = opts->exec_quantum_ms;
+ if (opts->preempt_timeout_us)
+ params.preempt_timeout_us = opts->preempt_timeout_us;
+ } else {
+ params.exec_quantum_ms =
+ select_random_exec_quantum_value(8, num_vfs, 5000);
+ params.preempt_timeout_us = 2 * params.exec_quantum_ms * 1000;
+ }
+
+ return params;
+}
+
+/**
+ * SUBTEST: nonpreempt-engine-resets
+ * Description:
+ * Check all VFs running a non-preemptible workload with a duration
+ * exceeding the sum of its execution quantum and preemption timeout,
+ * will experience engine reset due to preemption timeout.
+ */
+static void nonpreempt_engine_resets(int pf_fd, int num_vfs,
+ const struct subm_opts *opts)
+{
+ struct subm_set set_ = {}, *set = &set_;
+ struct vf_sched_params vf_sched_params =
+ prepare_vf_sched_params(num_vfs, opts);
+ uint64_t duration_ms = 2 * vf_sched_params.exec_quantum_ms +
+ vf_sched_params.preempt_timeout_us / 1000;
+ int preemptible_end = 1;
+ uint8_t vf_ids[num_vfs + 1 /*PF*/];
+
+ igt_info("eq=%ums pt=%uus duration=%lums num_vfs=%d\n",
+ vf_sched_params.exec_quantum_ms,
+ vf_sched_params.preempt_timeout_us, duration_ms, num_vfs);
+ igt_assert(duration_ms);
+ igt_assert_lt(duration_ms, 2000);
+
+ init_vf_ids(vf_ids, ARRAY_SIZE(vf_ids),
+ &(struct init_vf_ids_opts){ .shuffle = true,
+ .shuffle_pf = true });
+ xe_sriov_require_default_scheduling_attributes(pf_fd);
+ /* enable VFs */
+ igt_sriov_disable_driver_autoprobe(pf_fd);
+ igt_sriov_enable_vfs(pf_fd, num_vfs);
+ /* set scheduling params (PF and VFs) */
+ set_vfs_scheduling_params(pf_fd, num_vfs, &vf_sched_params);
+ /* probe VFs */
+ igt_sriov_enable_driver_autoprobe(pf_fd);
+ for (int vf = 1; vf <= num_vfs; ++vf)
+ igt_sriov_bind_vf_drm_driver(pf_fd, vf);
+
+ /* init subm_set */
+ subm_set_alloc_data(set, num_vfs + 1 /*PF*/);
+ subm_set_init_sync_method(set, opts->sync_method);
+
+ for (int n = 0; n < set->ndata; ++n) {
+ int vf_fd =
+ vf_ids[n] ?
+ igt_sriov_open_vf_drm_device(pf_fd, vf_ids[n]) :
+ drm_reopen_driver(pf_fd);
+
+ igt_assert_fd(vf_fd);
+ set->data[n].opts = opts;
+ subm_init(&set->data[n].subm, vf_fd, vf_ids[n], 0,
+ xe_engine(vf_fd, 0)->instance);
+ subm_workload_init(&set->data[n].subm,
+ &(struct subm_work_desc){
+ .duration_ms = duration_ms,
+ .preempt = (n < preemptible_end),
+ .repeats = 2000 / duration_ms });
+ igt_stats_init_with_size(&set->data[n].stats.samples,
+ set->data[n].subm.work.repeats);
+ if (set->sync_method == SYNC_BARRIER)
+ set->data[n].barrier = &set->barrier;
+ }
+
+ /* dispatch spinners, wait for results */
+ subm_set_dispatch_and_wait_threads(set);
+
+ /* verify results */
+ for (int n = 0; n < set->ndata; ++n) {
+ if (n < preemptible_end) {
+ igt_assert_eq(0, set->data[n].stats.num_early_finish);
+ igt_assert_eq(set->data[n].subm.work.repeats,
+ set->data[n].stats.samples.n_values);
+ } else {
+ igt_assert_eq(1, set->data[n].stats.num_early_finish);
+ }
+ }
+
+ /* cleanup */
+ subm_set_fini(set);
+ set_vfs_scheduling_params(pf_fd, num_vfs, &(struct vf_sched_params){});
+ igt_sriov_disable_vfs(pf_fd);
+}
+
static struct subm_opts subm_opts = {
.sync_method = SYNC_BARRIER,
.outlier_treshold = 0.1,
@@ -682,6 +795,19 @@ igt_main_args("s:e:p:", long_opts, help_str, subm_opts_handler, NULL)
throughput_ratio(pf_fd, vf, &subm_opts);
}
+ igt_describe("Check VFs experience engine reset due to preemption timeout");
+ igt_subtest_with_dynamic("nonpreempt-engine-resets") {
+ if (extended_scope)
+ for_each_sriov_num_vfs(pf_fd, vf)
+ igt_dynamic_f("numvfs-%d", vf)
+ nonpreempt_engine_resets(pf_fd, vf,
+ &subm_opts);
+
+ for_random_sriov_vf(pf_fd, vf)
+ igt_dynamic("numvfs-random")
+ nonpreempt_engine_resets(pf_fd, vf, &subm_opts);
+ }
+
igt_fixture {
set_vfs_scheduling_params(pf_fd, igt_sriov_get_total_vfs(pf_fd),
&(struct vf_sched_params){});
--
2.31.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* ✗ i915.CI.BAT: failure for Add SR-IOV provisioning scheduling attributes and tests
2025-01-20 20:34 [PATCH i-g-t 0/4] Add SR-IOV provisioning scheduling attributes and tests Marcin Bernatowicz
` (3 preceding siblings ...)
2025-01-20 20:34 ` [PATCH i-g-t 4/4] tests/xe_sriov_scheduling: nonpreempt-engine-resets subtest Marcin Bernatowicz
@ 2025-01-20 22:31 ` Patchwork
2025-01-20 22:43 ` ✓ Xe.CI.BAT: success " Patchwork
2025-01-21 0:12 ` ✗ Xe.CI.Full: failure " Patchwork
6 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2025-01-20 22:31 UTC (permalink / raw)
To: Marcin Bernatowicz; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 10949 bytes --]
== Series Details ==
Series: Add SR-IOV provisioning scheduling attributes and tests
URL : https://patchwork.freedesktop.org/series/143762/
State : failure
== Summary ==
CI Bug Log - changes from IGT_8199 -> IGTPW_12470
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with IGTPW_12470 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_12470, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12470/index.html
Participating hosts (39 -> 41)
------------------------------
Additional (2): fi-bsw-nick fi-elk-e7500
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_12470:
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@live@guc:
- bat-adlp-6: [PASS][1] -> [ABORT][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8199/bat-adlp-6/igt@i915_selftest@live@guc.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12470/bat-adlp-6/igt@i915_selftest@live@guc.html
Known issues
------------
Here are the changes found in IGTPW_12470 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@fbdev@info:
- fi-bsw-nick: NOTRUN -> [SKIP][3] ([i915#1849])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12470/fi-bsw-nick/igt@fbdev@info.html
* igt@gem_lmem_swapping@parallel-random-engines:
- fi-bsw-nick: NOTRUN -> [SKIP][4] +43 other tests skip
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12470/fi-bsw-nick/igt@gem_lmem_swapping@parallel-random-engines.html
* igt@gem_mmap@basic:
- bat-dg2-13: NOTRUN -> [SKIP][5] ([i915#4083])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12470/bat-dg2-13/igt@gem_mmap@basic.html
* igt@gem_tiled_blits@basic:
- bat-dg2-13: NOTRUN -> [SKIP][6] ([i915#4077]) +2 other tests skip
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12470/bat-dg2-13/igt@gem_tiled_blits@basic.html
* igt@gem_tiled_pread_basic:
- bat-dg2-13: NOTRUN -> [SKIP][7] ([i915#4079]) +1 other test skip
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12470/bat-dg2-13/igt@gem_tiled_pread_basic.html
* igt@i915_pm_rpm@module-reload:
- fi-cfl-8109u: [PASS][8] -> [DMESG-WARN][9] ([i915#11621] / [i915#1982])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8199/fi-cfl-8109u/igt@i915_pm_rpm@module-reload.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12470/fi-cfl-8109u/igt@i915_pm_rpm@module-reload.html
* igt@i915_pm_rps@basic-api:
- bat-dg2-13: NOTRUN -> [SKIP][10] ([i915#11681] / [i915#6621])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12470/bat-dg2-13/igt@i915_pm_rps@basic-api.html
* igt@i915_selftest@live:
- bat-adlp-6: [PASS][11] -> [ABORT][12] ([i915#13399])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8199/bat-adlp-6/igt@i915_selftest@live.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12470/bat-adlp-6/igt@i915_selftest@live.html
* igt@i915_selftest@live@execlists:
- bat-jsl-3: [PASS][13] -> [INCOMPLETE][14] ([i915#12445] / [i915#13241]) +1 other test incomplete
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8199/bat-jsl-3/igt@i915_selftest@live@execlists.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12470/bat-jsl-3/igt@i915_selftest@live@execlists.html
* igt@i915_selftest@live@late_gt_pm:
- fi-cfl-8109u: [PASS][15] -> [DMESG-WARN][16] ([i915#11621]) +13 other tests dmesg-warn
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8199/fi-cfl-8109u/igt@i915_selftest@live@late_gt_pm.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12470/fi-cfl-8109u/igt@i915_selftest@live@late_gt_pm.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- bat-dg2-13: NOTRUN -> [SKIP][17] ([i915#5190])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12470/bat-dg2-13/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@kms_addfb_basic@basic-y-tiled-legacy:
- bat-dg2-13: NOTRUN -> [SKIP][18] ([i915#4215] / [i915#5190])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12470/bat-dg2-13/igt@kms_addfb_basic@basic-y-tiled-legacy.html
* igt@kms_addfb_basic@framebuffer-vs-set-tiling:
- bat-dg2-13: NOTRUN -> [SKIP][19] ([i915#4212]) +7 other tests skip
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12470/bat-dg2-13/igt@kms_addfb_basic@framebuffer-vs-set-tiling.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- bat-dg2-13: NOTRUN -> [SKIP][20] ([i915#4103] / [i915#4213]) +1 other test skip
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12470/bat-dg2-13/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
* igt@kms_dsc@dsc-basic:
- bat-dg2-13: NOTRUN -> [SKIP][21] ([i915#3555] / [i915#3840])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12470/bat-dg2-13/igt@kms_dsc@dsc-basic.html
* igt@kms_force_connector_basic@force-load-detect:
- bat-dg2-13: NOTRUN -> [SKIP][22]
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12470/bat-dg2-13/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_force_connector_basic@prune-stale-modes:
- bat-dg2-13: NOTRUN -> [SKIP][23] ([i915#5274])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12470/bat-dg2-13/igt@kms_force_connector_basic@prune-stale-modes.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-a-hdmi-a-1:
- fi-elk-e7500: NOTRUN -> [SKIP][24] +24 other tests skip
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12470/fi-elk-e7500/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-a-hdmi-a-1.html
* igt@kms_pm_backlight@basic-brightness:
- bat-dg2-13: NOTRUN -> [SKIP][25] ([i915#5354])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12470/bat-dg2-13/igt@kms_pm_backlight@basic-brightness.html
* igt@kms_psr@psr-primary-page-flip:
- bat-dg2-13: NOTRUN -> [SKIP][26] ([i915#1072] / [i915#9732]) +3 other tests skip
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12470/bat-dg2-13/igt@kms_psr@psr-primary-page-flip.html
* igt@kms_setmode@basic-clone-single-crtc:
- bat-dg2-13: NOTRUN -> [SKIP][27] ([i915#3555])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12470/bat-dg2-13/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-fence-flip:
- bat-dg2-13: NOTRUN -> [SKIP][28] ([i915#3708])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12470/bat-dg2-13/igt@prime_vgem@basic-fence-flip.html
* igt@prime_vgem@basic-fence-mmap:
- bat-dg2-13: NOTRUN -> [SKIP][29] ([i915#3708] / [i915#4077]) +1 other test skip
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12470/bat-dg2-13/igt@prime_vgem@basic-fence-mmap.html
* igt@prime_vgem@basic-write:
- bat-dg2-13: NOTRUN -> [SKIP][30] ([i915#3291] / [i915#3708]) +2 other tests skip
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12470/bat-dg2-13/igt@prime_vgem@basic-write.html
#### Possible fixes ####
* igt@i915_module_load@load:
- bat-dg2-13: [ABORT][31] ([i915#13530]) -> [PASS][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8199/bat-dg2-13/igt@i915_module_load@load.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12470/bat-dg2-13/igt@i915_module_load@load.html
* igt@i915_selftest@live@workarounds:
- {bat-arls-6}: [DMESG-FAIL][33] ([i915#12061]) -> [PASS][34] +1 other test pass
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8199/bat-arls-6/igt@i915_selftest@live@workarounds.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12470/bat-arls-6/igt@i915_selftest@live@workarounds.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
[i915#11621]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11621
[i915#11681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11681
[i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
[i915#12445]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12445
[i915#13241]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13241
[i915#13399]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13399
[i915#13530]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13530
[i915#1849]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1849
[i915#1982]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1982
[i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
[i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
[i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
[i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
[i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
[i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4213
[i915#4215]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4215
[i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
[i915#5274]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5274
[i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
[i915#6621]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6621
[i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_8199 -> IGTPW_12470
* Linux: CI_DRM_15983 -> CI_DRM_15985
CI-20190529: 20190529
CI_DRM_15983: 4d9c78b35c395ed49796502224f3a421b0ce65ef @ git://anongit.freedesktop.org/gfx-ci/linux
CI_DRM_15985: fb87b4e061d1844beaca66c8446cfcf60db99a23 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_12470: 7f19312a42cdf84cc7517e0f2f9e01a37be7e9fd @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8199: 8df1895672949617992cddbc33c5d683865879e8 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_12470/index.html
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^ permalink raw reply [flat|nested] 12+ messages in thread
* ✓ Xe.CI.BAT: success for Add SR-IOV provisioning scheduling attributes and tests
2025-01-20 20:34 [PATCH i-g-t 0/4] Add SR-IOV provisioning scheduling attributes and tests Marcin Bernatowicz
` (4 preceding siblings ...)
2025-01-20 22:31 ` ✗ i915.CI.BAT: failure for Add SR-IOV provisioning scheduling attributes and tests Patchwork
@ 2025-01-20 22:43 ` Patchwork
2025-01-21 0:12 ` ✗ Xe.CI.Full: failure " Patchwork
6 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2025-01-20 22:43 UTC (permalink / raw)
To: Marcin Bernatowicz; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 1169 bytes --]
== Series Details ==
Series: Add SR-IOV provisioning scheduling attributes and tests
URL : https://patchwork.freedesktop.org/series/143762/
State : success
== Summary ==
CI Bug Log - changes from XEIGT_8199_BAT -> XEIGTPW_12470_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (8 -> 8)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* IGT: IGT_8199 -> IGTPW_12470
* Linux: xe-2514-4d9c78b35c395ed49796502224f3a421b0ce65ef -> xe-2516-fb87b4e061d1844beaca66c8446cfcf60db99a23
IGTPW_12470: 7f19312a42cdf84cc7517e0f2f9e01a37be7e9fd @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8199: 8df1895672949617992cddbc33c5d683865879e8 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-2514-4d9c78b35c395ed49796502224f3a421b0ce65ef: 4d9c78b35c395ed49796502224f3a421b0ce65ef
xe-2516-fb87b4e061d1844beaca66c8446cfcf60db99a23: fb87b4e061d1844beaca66c8446cfcf60db99a23
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/index.html
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^ permalink raw reply [flat|nested] 12+ messages in thread
* ✗ Xe.CI.Full: failure for Add SR-IOV provisioning scheduling attributes and tests
2025-01-20 20:34 [PATCH i-g-t 0/4] Add SR-IOV provisioning scheduling attributes and tests Marcin Bernatowicz
` (5 preceding siblings ...)
2025-01-20 22:43 ` ✓ Xe.CI.BAT: success " Patchwork
@ 2025-01-21 0:12 ` Patchwork
6 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2025-01-21 0:12 UTC (permalink / raw)
To: Marcin Bernatowicz; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 134250 bytes --]
== Series Details ==
Series: Add SR-IOV provisioning scheduling attributes and tests
URL : https://patchwork.freedesktop.org/series/143762/
State : failure
== Summary ==
CI Bug Log - changes from XEIGT_8199_full -> XEIGTPW_12470_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with XEIGTPW_12470_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in XEIGTPW_12470_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in XEIGTPW_12470_full:
### IGT changes ###
#### Possible regressions ####
* igt@kms_flip@2x-flip-vs-expired-vblank@bd-dp2-hdmi-a3:
- shard-bmg: [PASS][1] -> [FAIL][2] +1 other test fail
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-3/igt@kms_flip@2x-flip-vs-expired-vblank@bd-dp2-hdmi-a3.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-2/igt@kms_flip@2x-flip-vs-expired-vblank@bd-dp2-hdmi-a3.html
* {igt@xe_sriov_scheduling@nonpreempt-engine-resets} (NEW):
- shard-dg2-set2: NOTRUN -> [SKIP][3] +1 other test skip
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-466/igt@xe_sriov_scheduling@nonpreempt-engine-resets.html
- shard-lnl: NOTRUN -> [SKIP][4] +1 other test skip
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-3/igt@xe_sriov_scheduling@nonpreempt-engine-resets.html
#### Warnings ####
* igt@kms_content_protection@atomic-dpms@pipe-a-dp-4:
- shard-dg2-set2: [FAIL][5] ([Intel XE#1178]) -> [INCOMPLETE][6]
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-435/igt@kms_content_protection@atomic-dpms@pipe-a-dp-4.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@kms_content_protection@atomic-dpms@pipe-a-dp-4.html
New tests
---------
New tests have been introduced between XEIGT_8199_full and XEIGTPW_12470_full:
### New IGT tests (2) ###
* igt@xe_sriov_scheduling@equal-throughput:
- Statuses : 3 skip(s)
- Exec time: [0.0] s
* igt@xe_sriov_scheduling@nonpreempt-engine-resets:
- Statuses : 3 skip(s)
- Exec time: [0.0] s
Known issues
------------
Here are the changes found in XEIGTPW_12470_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@core_hotunplug@hotrebind-lateclose:
- shard-bmg: [PASS][7] -> [SKIP][8] ([Intel XE#1885]) +1 other test skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-1/igt@core_hotunplug@hotrebind-lateclose.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@core_hotunplug@hotrebind-lateclose.html
* igt@fbdev@unaligned-write:
- shard-bmg: [PASS][9] -> [SKIP][10] ([Intel XE#2134])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-4/igt@fbdev@unaligned-write.html
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@fbdev@unaligned-write.html
* igt@intel_hwmon@hwmon-write:
- shard-lnl: NOTRUN -> [SKIP][11] ([Intel XE#1125])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-4/igt@intel_hwmon@hwmon-write.html
* igt@kms_async_flips@async-flip-with-page-flip-events-atomic:
- shard-lnl: NOTRUN -> [FAIL][12] ([Intel XE#3719]) +3 other tests fail
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-4/igt@kms_async_flips@async-flip-with-page-flip-events-atomic.html
* igt@kms_async_flips@async-flip-with-page-flip-events-atomic@pipe-d-hdmi-a-2-4-rc-ccs-cc:
- shard-dg2-set2: NOTRUN -> [SKIP][13] ([Intel XE#3767]) +15 other tests skip
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-432/igt@kms_async_flips@async-flip-with-page-flip-events-atomic@pipe-d-hdmi-a-2-4-rc-ccs-cc.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
- shard-dg2-set2: [PASS][14] -> [SKIP][15] ([Intel XE#2136]) +4 other tests skip
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-433/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
- shard-bmg: [PASS][16] -> [SKIP][17] ([Intel XE#2136] / [Intel XE#2231]) +1 other test skip
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-1/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-3/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
* igt@kms_big_fb@linear-64bpp-rotate-0:
- shard-lnl: NOTRUN -> [DMESG-WARN][18] ([Intel XE#1725])
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-6/igt@kms_big_fb@linear-64bpp-rotate-0.html
* igt@kms_big_fb@x-tiled-8bpp-rotate-270:
- shard-dg2-set2: NOTRUN -> [SKIP][19] ([Intel XE#316]) +3 other tests skip
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-434/igt@kms_big_fb@x-tiled-8bpp-rotate-270.html
- shard-lnl: NOTRUN -> [SKIP][20] ([Intel XE#1407]) +5 other tests skip
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-4/igt@kms_big_fb@x-tiled-8bpp-rotate-270.html
* igt@kms_big_fb@x-tiled-addfb:
- shard-bmg: [PASS][21] -> [SKIP][22] ([Intel XE#2136]) +21 other tests skip
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-8/igt@kms_big_fb@x-tiled-addfb.html
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_big_fb@x-tiled-addfb.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0:
- shard-dg2-set2: NOTRUN -> [SKIP][23] ([Intel XE#1124]) +7 other tests skip
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-463/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
- shard-dg2-set2: NOTRUN -> [SKIP][24] ([Intel XE#607])
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-434/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
* igt@kms_big_fb@yf-tiled-addfb-size-overflow:
- shard-dg2-set2: NOTRUN -> [SKIP][25] ([Intel XE#610])
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-lnl: NOTRUN -> [SKIP][26] ([Intel XE#1124]) +6 other tests skip
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-6/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p:
- shard-lnl: NOTRUN -> [SKIP][27] ([Intel XE#2191]) +1 other test skip
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-5/igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p.html
* igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p:
- shard-dg2-set2: NOTRUN -> [SKIP][28] ([Intel XE#2191]) +1 other test skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-463/igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p.html
* igt@kms_bw@linear-tiling-2-displays-3840x2160p:
- shard-dg2-set2: NOTRUN -> [SKIP][29] ([Intel XE#367]) +7 other tests skip
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-432/igt@kms_bw@linear-tiling-2-displays-3840x2160p.html
* igt@kms_bw@linear-tiling-4-displays-1920x1080p:
- shard-lnl: NOTRUN -> [SKIP][30] ([Intel XE#1512])
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-6/igt@kms_bw@linear-tiling-4-displays-1920x1080p.html
* igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs:
- shard-lnl: NOTRUN -> [SKIP][31] ([Intel XE#2887]) +9 other tests skip
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-1/igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs.html
* igt@kms_ccs@bad-pixel-format-yf-tiled-ccs:
- shard-dg2-set2: NOTRUN -> [SKIP][32] ([Intel XE#455] / [Intel XE#787]) +27 other tests skip
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@kms_ccs@bad-pixel-format-yf-tiled-ccs.html
* igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [SKIP][33] ([Intel XE#787]) +125 other tests skip
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-433/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-6.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs:
- shard-dg2-set2: NOTRUN -> [SKIP][34] ([Intel XE#2907])
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-434/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
- shard-bmg: [PASS][35] -> [INCOMPLETE][36] ([Intel XE#3862]) +1 other test incomplete
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-8/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc:
- shard-lnl: NOTRUN -> [SKIP][37] ([Intel XE#3432])
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-8/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs@pipe-d-hdmi-a-3:
- shard-bmg: NOTRUN -> [SKIP][38] ([Intel XE#2652] / [Intel XE#787]) +11 other tests skip
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-5/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs@pipe-d-hdmi-a-3.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-dp-4:
- shard-dg2-set2: [PASS][39] -> [DMESG-WARN][40] ([Intel XE#1727] / [Intel XE#3113])
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-dp-4.html
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-dp-4.html
* igt@kms_cdclk@mode-transition@pipe-d-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][41] ([Intel XE#314]) +3 other tests skip
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-434/igt@kms_cdclk@mode-transition@pipe-d-dp-4.html
* igt@kms_chamelium_color@ctm-blue-to-red:
- shard-lnl: NOTRUN -> [SKIP][42] ([Intel XE#306]) +1 other test skip
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-1/igt@kms_chamelium_color@ctm-blue-to-red.html
- shard-dg2-set2: NOTRUN -> [SKIP][43] ([Intel XE#306])
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-433/igt@kms_chamelium_color@ctm-blue-to-red.html
* igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode:
- shard-dg2-set2: NOTRUN -> [SKIP][44] ([Intel XE#373]) +9 other tests skip
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-463/igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode.html
* igt@kms_chamelium_hpd@vga-hpd-without-ddc:
- shard-lnl: NOTRUN -> [SKIP][45] ([Intel XE#373]) +6 other tests skip
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-3/igt@kms_chamelium_hpd@vga-hpd-without-ddc.html
* igt@kms_content_protection@dp-mst-type-0:
- shard-lnl: NOTRUN -> [SKIP][46] ([Intel XE#307]) +1 other test skip
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-8/igt@kms_content_protection@dp-mst-type-0.html
* igt@kms_content_protection@legacy@pipe-a-dp-4:
- shard-dg2-set2: NOTRUN -> [FAIL][47] ([Intel XE#1178])
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-434/igt@kms_content_protection@legacy@pipe-a-dp-4.html
* igt@kms_content_protection@lic-type-0@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][48] ([Intel XE#1178]) +1 other test fail
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-1/igt@kms_content_protection@lic-type-0@pipe-a-dp-2.html
* igt@kms_content_protection@type1:
- shard-lnl: NOTRUN -> [SKIP][49] ([Intel XE#3278])
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-3/igt@kms_content_protection@type1.html
* igt@kms_content_protection@uevent@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][50] ([Intel XE#1188])
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-1/igt@kms_content_protection@uevent@pipe-a-dp-2.html
* igt@kms_cursor_crc@cursor-offscreen-512x512:
- shard-dg2-set2: NOTRUN -> [SKIP][51] ([Intel XE#308]) +2 other tests skip
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-433/igt@kms_cursor_crc@cursor-offscreen-512x512.html
* igt@kms_cursor_crc@cursor-random-512x512:
- shard-lnl: NOTRUN -> [SKIP][52] ([Intel XE#2321])
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-6/igt@kms_cursor_crc@cursor-random-512x512.html
* igt@kms_cursor_crc@cursor-sliding-128x42:
- shard-lnl: NOTRUN -> [SKIP][53] ([Intel XE#1424]) +2 other tests skip
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-6/igt@kms_cursor_crc@cursor-sliding-128x42.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-legacy:
- shard-bmg: [PASS][54] -> [INCOMPLETE][55] ([Intel XE#3226])
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-1/igt@kms_cursor_legacy@cursorb-vs-flipb-legacy.html
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-5/igt@kms_cursor_legacy@cursorb-vs-flipb-legacy.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
- shard-dg2-set2: NOTRUN -> [SKIP][56] ([Intel XE#323])
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-466/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
- shard-lnl: NOTRUN -> [SKIP][57] ([Intel XE#323]) +1 other test skip
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-1/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
* igt@kms_display_modes@extended-mode-basic:
- shard-lnl: NOTRUN -> [SKIP][58] ([Intel XE#3383])
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-1/igt@kms_display_modes@extended-mode-basic.html
* igt@kms_dsc@dsc-fractional-bpp-with-bpc:
- shard-dg2-set2: NOTRUN -> [SKIP][59] ([Intel XE#2136] / [Intel XE#2351]) +2 other tests skip
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html
* igt@kms_feature_discovery@chamelium:
- shard-dg2-set2: NOTRUN -> [SKIP][60] ([Intel XE#701])
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-436/igt@kms_feature_discovery@chamelium.html
- shard-lnl: NOTRUN -> [SKIP][61] ([Intel XE#701])
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-1/igt@kms_feature_discovery@chamelium.html
* igt@kms_feature_discovery@display-2x:
- shard-lnl: NOTRUN -> [SKIP][62] ([Intel XE#702])
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-5/igt@kms_feature_discovery@display-2x.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
- shard-dg2-set2: [PASS][63] -> [FAIL][64] ([Intel XE#301])
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-432/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-466/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a6-dp4:
- shard-dg2-set2: NOTRUN -> [FAIL][65] ([Intel XE#301] / [Intel XE#3321]) +2 other tests fail
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-466/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a6-dp4.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-dp2-hdmi-a3:
- shard-bmg: [PASS][66] -> [FAIL][67] ([Intel XE#3321]) +1 other test fail
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-5/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-dp2-hdmi-a3.html
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-2/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-dp2-hdmi-a3.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@cd-hdmi-a6-dp4:
- shard-dg2-set2: NOTRUN -> [FAIL][68] ([Intel XE#301]) +5 other tests fail
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-466/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@cd-hdmi-a6-dp4.html
* igt@kms_flip@2x-flip-vs-modeset:
- shard-lnl: NOTRUN -> [SKIP][69] ([Intel XE#1421])
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-7/igt@kms_flip@2x-flip-vs-modeset.html
* igt@kms_flip@2x-plain-flip-fb-recreate:
- shard-bmg: [PASS][70] -> [SKIP][71] ([Intel XE#2423]) +101 other tests skip
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-1/igt@kms_flip@2x-plain-flip-fb-recreate.html
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_flip@2x-plain-flip-fb-recreate.html
* igt@kms_flip@absolute-wf_vblank:
- shard-dg2-set2: [PASS][72] -> [SKIP][73] ([Intel XE#2423] / [i915#2575]) +13 other tests skip
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-466/igt@kms_flip@absolute-wf_vblank.html
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@kms_flip@absolute-wf_vblank.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode:
- shard-bmg: NOTRUN -> [SKIP][74] ([Intel XE#2293]) +5 other tests skip
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-2/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-upscaling:
- shard-dg2-set2: [PASS][75] -> [SKIP][76] ([Intel XE#2136] / [Intel XE#2351]) +2 other tests skip
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-432/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-upscaling.html
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling:
- shard-lnl: NOTRUN -> [SKIP][77] ([Intel XE#1401] / [Intel XE#1745]) +2 other tests skip
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-3/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-default-mode:
- shard-lnl: NOTRUN -> [SKIP][78] ([Intel XE#1401]) +2 other tests skip
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-3/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling:
- shard-lnl: NOTRUN -> [SKIP][79] ([Intel XE#1397] / [Intel XE#1745])
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-4/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling@pipe-a-default-mode:
- shard-lnl: NOTRUN -> [SKIP][80] ([Intel XE#1397])
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-4/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling:
- shard-dg2-set2: NOTRUN -> [SKIP][81] ([Intel XE#455]) +9 other tests skip
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-466/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html
* igt@kms_force_connector_basic@force-connector-state:
- shard-bmg: [PASS][82] -> [SKIP][83] ([Intel XE#3007]) +11 other tests skip
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-1/igt@kms_force_connector_basic@force-connector-state.html
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-3/igt@kms_force_connector_basic@force-connector-state.html
* igt@kms_frontbuffer_tracking@drrs-1p-primscrn-shrfb-msflip-blt:
- shard-lnl: NOTRUN -> [SKIP][84] ([Intel XE#651]) +6 other tests skip
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-5/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@drrs-suspend:
- shard-dg2-set2: NOTRUN -> [SKIP][85] ([Intel XE#651]) +23 other tests skip
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-432/igt@kms_frontbuffer_tracking@drrs-suspend.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-render:
- shard-dg2-set2: NOTRUN -> [SKIP][86] ([Intel XE#2136]) +4 other tests skip
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-pgflip-blt:
- shard-lnl: NOTRUN -> [SKIP][87] ([Intel XE#656]) +24 other tests skip
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y:
- shard-dg2-set2: NOTRUN -> [SKIP][88] ([Intel XE#658])
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-433/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-blt:
- shard-dg2-set2: NOTRUN -> [SKIP][89] ([Intel XE#653]) +20 other tests skip
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-434/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-blt.html
* igt@kms_invalid_mode@overflow-vrefresh:
- shard-dg2-set2: NOTRUN -> [SKIP][90] ([Intel XE#2423] / [i915#2575]) +1 other test skip
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@kms_invalid_mode@overflow-vrefresh.html
* igt@kms_plane_cursor@primary@pipe-a-hdmi-a-6-size-256:
- shard-dg2-set2: NOTRUN -> [FAIL][91] ([Intel XE#616]) +2 other tests fail
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-433/igt@kms_plane_cursor@primary@pipe-a-hdmi-a-6-size-256.html
* igt@kms_plane_scaling@2x-scaler-multi-pipe:
- shard-lnl: NOTRUN -> [SKIP][92] ([Intel XE#309]) +3 other tests skip
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-7/igt@kms_plane_scaling@2x-scaler-multi-pipe.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-c:
- shard-lnl: NOTRUN -> [SKIP][93] ([Intel XE#2763]) +11 other tests skip
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-8/igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-c.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-d:
- shard-dg2-set2: NOTRUN -> [SKIP][94] ([Intel XE#2763] / [Intel XE#455]) +5 other tests skip
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-434/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-d.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-b:
- shard-dg2-set2: NOTRUN -> [SKIP][95] ([Intel XE#2763]) +8 other tests skip
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-463/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-b.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-a:
- shard-bmg: NOTRUN -> [SKIP][96] ([Intel XE#2763]) +11 other tests skip
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-2/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-a.html
* igt@kms_pm_backlight@basic-brightness:
- shard-dg2-set2: NOTRUN -> [SKIP][97] ([Intel XE#870])
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-466/igt@kms_pm_backlight@basic-brightness.html
* igt@kms_pm_backlight@brightness-with-dpms:
- shard-dg2-set2: NOTRUN -> [SKIP][98] ([Intel XE#2938])
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-433/igt@kms_pm_backlight@brightness-with-dpms.html
* igt@kms_pm_dc@dc5-psr:
- shard-dg2-set2: NOTRUN -> [SKIP][99] ([Intel XE#1129])
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-432/igt@kms_pm_dc@dc5-psr.html
* igt@kms_pm_rpm@i2c:
- shard-bmg: [PASS][100] -> [SKIP][101] ([Intel XE#2446]) +4 other tests skip
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-1/igt@kms_pm_rpm@i2c.html
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_pm_rpm@i2c.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
- shard-lnl: NOTRUN -> [SKIP][102] ([Intel XE#1439] / [Intel XE#3141])
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-3/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
* igt@kms_pm_rpm@system-suspend-modeset:
- shard-dg2-set2: [PASS][103] -> [SKIP][104] ([Intel XE#2446]) +1 other test skip
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-435/igt@kms_pm_rpm@system-suspend-modeset.html
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@kms_pm_rpm@system-suspend-modeset.html
* igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf:
- shard-dg2-set2: NOTRUN -> [SKIP][105] ([Intel XE#1489]) +1 other test skip
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-466/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf.html
* igt@kms_psr2_su@page_flip-nv12:
- shard-dg2-set2: NOTRUN -> [SKIP][106] ([Intel XE#1122])
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@kms_psr2_su@page_flip-nv12.html
* igt@kms_psr@pr-sprite-plane-onoff:
- shard-lnl: NOTRUN -> [SKIP][107] ([Intel XE#1406]) +3 other tests skip
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-7/igt@kms_psr@pr-sprite-plane-onoff.html
* igt@kms_psr@psr-dpms:
- shard-dg2-set2: NOTRUN -> [SKIP][108] ([Intel XE#2850] / [Intel XE#929]) +13 other tests skip
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-466/igt@kms_psr@psr-dpms.html
* igt@kms_rotation_crc@primary-rotation-90:
- shard-dg2-set2: NOTRUN -> [SKIP][109] ([Intel XE#3414]) +1 other test skip
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-433/igt@kms_rotation_crc@primary-rotation-90.html
- shard-lnl: NOTRUN -> [SKIP][110] ([Intel XE#3414] / [Intel XE#3904]) +1 other test skip
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-3/igt@kms_rotation_crc@primary-rotation-90.html
* igt@kms_setmode@invalid-clone-single-crtc:
- shard-lnl: NOTRUN -> [SKIP][111] ([Intel XE#1435])
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-6/igt@kms_setmode@invalid-clone-single-crtc.html
* igt@kms_sysfs_edid_timing:
- shard-bmg: [PASS][112] -> [FAIL][113] ([Intel XE#1174])
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-6/igt@kms_sysfs_edid_timing.html
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-4/igt@kms_sysfs_edid_timing.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-lnl: NOTRUN -> [SKIP][114] ([Intel XE#362])
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-8/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_vrr@lobf:
- shard-dg2-set2: NOTRUN -> [SKIP][115] ([Intel XE#2168])
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-432/igt@kms_vrr@lobf.html
* igt@kms_writeback@writeback-check-output-xrgb2101010:
- shard-lnl: NOTRUN -> [SKIP][116] ([Intel XE#756])
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-3/igt@kms_writeback@writeback-check-output-xrgb2101010.html
* igt@kms_writeback@writeback-fb-id-xrgb2101010:
- shard-dg2-set2: NOTRUN -> [SKIP][117] ([Intel XE#756])
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@kms_writeback@writeback-fb-id-xrgb2101010.html
* igt@sriov_basic@enable-vfs-autoprobe-off:
- shard-dg2-set2: NOTRUN -> [SKIP][118] ([Intel XE#1091] / [Intel XE#2849])
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-436/igt@sriov_basic@enable-vfs-autoprobe-off.html
* igt@xe_eudebug@basic-vm-bind-ufence-delay-ack:
- shard-dg2-set2: NOTRUN -> [SKIP][119] ([Intel XE#1130]) +4 other tests skip
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@xe_eudebug@basic-vm-bind-ufence-delay-ack.html
* igt@xe_eudebug@basic-vm-bind-ufence-reconnect:
- shard-dg2-set2: NOTRUN -> [SKIP][120] ([Intel XE#3889])
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-463/igt@xe_eudebug@basic-vm-bind-ufence-reconnect.html
- shard-lnl: NOTRUN -> [SKIP][121] ([Intel XE#3889]) +1 other test skip
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-8/igt@xe_eudebug@basic-vm-bind-ufence-reconnect.html
* igt@xe_eudebug_online@preempt-breakpoint:
- shard-lnl: NOTRUN -> [SKIP][122] ([Intel XE#2905]) +3 other tests skip
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-1/igt@xe_eudebug_online@preempt-breakpoint.html
* igt@xe_evict@evict-beng-large-cm:
- shard-dg2-set2: [PASS][123] -> [SKIP][124] ([Intel XE#1130]) +26 other tests skip
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-463/igt@xe_evict@evict-beng-large-cm.html
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@xe_evict@evict-beng-large-cm.html
* igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-reopen:
- shard-lnl: NOTRUN -> [SKIP][125] ([Intel XE#688]) +1 other test skip
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-8/igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-reopen.html
* igt@xe_exec_basic@multigpu-once-basic-defer-mmap:
- shard-lnl: NOTRUN -> [SKIP][126] ([Intel XE#1392]) +5 other tests skip
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-2/igt@xe_exec_basic@multigpu-once-basic-defer-mmap.html
* igt@xe_exec_basic@multigpu-once-null:
- shard-dg2-set2: [PASS][127] -> [SKIP][128] ([Intel XE#1392]) +1 other test skip
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-463/igt@xe_exec_basic@multigpu-once-null.html
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-432/igt@xe_exec_basic@multigpu-once-null.html
* igt@xe_exec_fault_mode@twice-userptr-invalidate-race:
- shard-dg2-set2: NOTRUN -> [SKIP][129] ([Intel XE#288]) +17 other tests skip
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-433/igt@xe_exec_fault_mode@twice-userptr-invalidate-race.html
* igt@xe_exec_sip_eudebug@breakpoint-writesip:
- shard-dg2-set2: NOTRUN -> [SKIP][130] ([Intel XE#2905]) +7 other tests skip
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-434/igt@xe_exec_sip_eudebug@breakpoint-writesip.html
* igt@xe_fault_injection@inject-fault-probe-function-xe_ggtt_init_early:
- shard-bmg: [PASS][131] -> [SKIP][132] ([Intel XE#1130]) +250 other tests skip
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-4/igt@xe_fault_injection@inject-fault-probe-function-xe_ggtt_init_early.html
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@xe_fault_injection@inject-fault-probe-function-xe_ggtt_init_early.html
* igt@xe_mmap@pci-membarrier-bad-pagesize:
- shard-lnl: NOTRUN -> [SKIP][133] ([Intel XE#4045]) +1 other test skip
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-4/igt@xe_mmap@pci-membarrier-bad-pagesize.html
* igt@xe_mmap@small-bar:
- shard-dg2-set2: NOTRUN -> [SKIP][134] ([Intel XE#512])
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-466/igt@xe_mmap@small-bar.html
* igt@xe_oa@whitelisted-registers-userspace-config:
- shard-dg2-set2: NOTRUN -> [SKIP][135] ([Intel XE#2541] / [Intel XE#3573]) +4 other tests skip
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-433/igt@xe_oa@whitelisted-registers-userspace-config.html
* igt@xe_pat@pat-index-xe2:
- shard-dg2-set2: NOTRUN -> [SKIP][136] ([Intel XE#977])
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-466/igt@xe_pat@pat-index-xe2.html
* igt@xe_peer2peer@read@read-gpua-vram01-gpub-system-p2p:
- shard-dg2-set2: NOTRUN -> [FAIL][137] ([Intel XE#1173]) +2 other tests fail
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-433/igt@xe_peer2peer@read@read-gpua-vram01-gpub-system-p2p.html
* igt@xe_peer2peer@write:
- shard-lnl: NOTRUN -> [SKIP][138] ([Intel XE#1061])
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-5/igt@xe_peer2peer@write.html
* igt@xe_pm@d3cold-mmap-vram:
- shard-dg2-set2: NOTRUN -> [SKIP][139] ([Intel XE#2284] / [Intel XE#366])
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-434/igt@xe_pm@d3cold-mmap-vram.html
- shard-lnl: NOTRUN -> [SKIP][140] ([Intel XE#2284] / [Intel XE#366])
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-6/igt@xe_pm@d3cold-mmap-vram.html
* igt@xe_pm@d3hot-mmap-vram:
- shard-lnl: NOTRUN -> [SKIP][141] ([Intel XE#1948])
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-4/igt@xe_pm@d3hot-mmap-vram.html
* igt@xe_pm@s3-vm-bind-unbind-all:
- shard-lnl: NOTRUN -> [SKIP][142] ([Intel XE#584])
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-1/igt@xe_pm@s3-vm-bind-unbind-all.html
* igt@xe_pm@s4-vm-bind-userptr:
- shard-lnl: [PASS][143] -> [ABORT][144] ([Intel XE#1358] / [Intel XE#1794])
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-lnl-8/igt@xe_pm@s4-vm-bind-userptr.html
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-2/igt@xe_pm@s4-vm-bind-userptr.html
* igt@xe_pm@vram-d3cold-threshold:
- shard-dg2-set2: NOTRUN -> [SKIP][145] ([Intel XE#579])
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-463/igt@xe_pm@vram-d3cold-threshold.html
* igt@xe_query@multigpu-query-cs-cycles:
- shard-dg2-set2: NOTRUN -> [SKIP][146] ([Intel XE#944])
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-433/igt@xe_query@multigpu-query-cs-cycles.html
* igt@xe_query@multigpu-query-invalid-cs-cycles:
- shard-lnl: NOTRUN -> [SKIP][147] ([Intel XE#944])
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-5/igt@xe_query@multigpu-query-invalid-cs-cycles.html
* igt@xe_sriov_flr@flr-vf1-clear:
- shard-dg2-set2: NOTRUN -> [SKIP][148] ([Intel XE#3342])
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@xe_sriov_flr@flr-vf1-clear.html
* {igt@xe_sriov_scheduling@nonpreempt-engine-resets} (NEW):
- shard-bmg: NOTRUN -> [SKIP][149] ([Intel XE#1130]) +1 other test skip
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@xe_sriov_scheduling@nonpreempt-engine-resets.html
#### Possible fixes ####
* igt@core_hotunplug@hotrebind:
- shard-bmg: [SKIP][150] ([Intel XE#1885]) -> [PASS][151] +1 other test pass
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@core_hotunplug@hotrebind.html
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-2/igt@core_hotunplug@hotrebind.html
* igt@fbdev@pan:
- shard-bmg: [SKIP][152] ([Intel XE#2134]) -> [PASS][153] +1 other test pass
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@fbdev@pan.html
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-2/igt@fbdev@pan.html
* igt@kms_addfb_basic@unused-pitches:
- shard-dg2-set2: [SKIP][154] ([Intel XE#2423] / [i915#2575]) -> [PASS][155] +17 other tests pass
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-435/igt@kms_addfb_basic@unused-pitches.html
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@kms_addfb_basic@unused-pitches.html
* igt@kms_async_flips@async-flip-with-page-flip-events@pipe-c-dp-4-4-rc-ccs:
- shard-dg2-set2: [SKIP][156] ([Intel XE#2550] / [Intel XE#3767]) -> [PASS][157] +7 other tests pass
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-436/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-c-dp-4-4-rc-ccs.html
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-433/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-c-dp-4-4-rc-ccs.html
* igt@kms_big_fb@x-tiled-16bpp-rotate-0:
- shard-bmg: [SKIP][158] ([Intel XE#2136]) -> [PASS][159] +14 other tests pass
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_big_fb@x-tiled-16bpp-rotate-0.html
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-5/igt@kms_big_fb@x-tiled-16bpp-rotate-0.html
* igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p:
- shard-bmg: [SKIP][160] ([Intel XE#2314] / [Intel XE#2894]) -> [PASS][161]
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p.html
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-2/igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs-cc:
- shard-dg2-set2: [SKIP][162] ([Intel XE#2136]) -> [PASS][163] +4 other tests pass
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-435/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs-cc.html
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-463/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_draw_crc@fill-fb:
- shard-dg2-set2: [SKIP][164] ([Intel XE#2136] / [Intel XE#2351]) -> [PASS][165]
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-435/igt@kms_draw_crc@fill-fb.html
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-436/igt@kms_draw_crc@fill-fb.html
- shard-bmg: [SKIP][166] ([Intel XE#2136] / [Intel XE#2231]) -> [PASS][167]
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-5/igt@kms_draw_crc@fill-fb.html
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-2/igt@kms_draw_crc@fill-fb.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-dp2-hdmi-a3:
- shard-bmg: [FAIL][168] -> [PASS][169] +1 other test pass
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-5/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-dp2-hdmi-a3.html
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-2/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-dp2-hdmi-a3.html
* igt@kms_flip@2x-flip-vs-panning-interruptible:
- shard-bmg: [SKIP][170] ([Intel XE#2316]) -> [PASS][171] +3 other tests pass
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-6/igt@kms_flip@2x-flip-vs-panning-interruptible.html
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-4/igt@kms_flip@2x-flip-vs-panning-interruptible.html
* igt@kms_flip@blocking-wf_vblank:
- shard-lnl: [FAIL][172] ([Intel XE#886]) -> [PASS][173] +2 other tests pass
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-lnl-6/igt@kms_flip@blocking-wf_vblank.html
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-8/igt@kms_flip@blocking-wf_vblank.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a6:
- shard-dg2-set2: [FAIL][174] ([Intel XE#301]) -> [PASS][175] +3 other tests pass
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-466/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a6.html
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-463/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a6.html
* igt@kms_flip@flip-vs-panning-vs-hang:
- shard-bmg: [SKIP][176] ([Intel XE#2423]) -> [PASS][177] +78 other tests pass
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_flip@flip-vs-panning-vs-hang.html
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-5/igt@kms_flip@flip-vs-panning-vs-hang.html
* igt@kms_flip@plain-flip-fb-recreate:
- shard-bmg: [FAIL][178] ([Intel XE#2882]) -> [PASS][179] +1 other test pass
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-8/igt@kms_flip@plain-flip-fb-recreate.html
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-2/igt@kms_flip@plain-flip-fb-recreate.html
* igt@kms_plane@plane-panning-bottom-right-suspend:
- shard-dg2-set2: [ABORT][180] ([Intel XE#2625]) -> [PASS][181] +1 other test pass
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-432/igt@kms_plane@plane-panning-bottom-right-suspend.html
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-433/igt@kms_plane@plane-panning-bottom-right-suspend.html
* igt@kms_plane_cursor@viewport:
- shard-dg2-set2: [FAIL][182] ([Intel XE#616]) -> [PASS][183] +1 other test pass
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-434/igt@kms_plane_cursor@viewport.html
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-434/igt@kms_plane_cursor@viewport.html
* igt@kms_plane_scaling@2x-scaler-multi-pipe:
- shard-bmg: [SKIP][184] ([Intel XE#2571]) -> [PASS][185]
[184]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-6/igt@kms_plane_scaling@2x-scaler-multi-pipe.html
[185]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-1/igt@kms_plane_scaling@2x-scaler-multi-pipe.html
* igt@kms_plane_scaling@plane-upscale-20x20-with-modifiers:
- shard-bmg: [SKIP][186] ([Intel XE#3007]) -> [PASS][187] +16 other tests pass
[186]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-5/igt@kms_plane_scaling@plane-upscale-20x20-with-modifiers.html
[187]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-1/igt@kms_plane_scaling@plane-upscale-20x20-with-modifiers.html
* igt@kms_pm_dc@dc5-psr:
- shard-lnl: [FAIL][188] ([Intel XE#718]) -> [PASS][189]
[188]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-lnl-7/igt@kms_pm_dc@dc5-psr.html
[189]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-4/igt@kms_pm_dc@dc5-psr.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress:
- shard-bmg: [SKIP][190] ([Intel XE#2446]) -> [PASS][191] +3 other tests pass
[190]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
[191]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-4/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
* igt@kms_psr@psr2-primary-render:
- shard-lnl: [FAIL][192] -> [PASS][193] +1 other test pass
[192]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-lnl-6/igt@kms_psr@psr2-primary-render.html
[193]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-lnl-6/igt@kms_psr@psr2-primary-render.html
* igt@kms_rmfb@close-fd:
- shard-dg2-set2: [INCOMPLETE][194] -> [PASS][195]
[194]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-466/igt@kms_rmfb@close-fd.html
[195]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-432/igt@kms_rmfb@close-fd.html
* igt@xe_exec_balancer@twice-virtual-basic:
- shard-dg2-set2: [SKIP][196] ([Intel XE#1130]) -> [PASS][197] +31 other tests pass
[196]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-435/igt@xe_exec_balancer@twice-virtual-basic.html
[197]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-436/igt@xe_exec_balancer@twice-virtual-basic.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic-defer-bind:
- shard-dg2-set2: [SKIP][198] ([Intel XE#1392]) -> [PASS][199] +4 other tests pass
[198]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-432/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic-defer-bind.html
[199]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-434/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic-defer-bind.html
* igt@xe_exec_threads@threads-bal-shared-vm-userptr-invalidate:
- shard-bmg: [SKIP][200] ([Intel XE#1130]) -> [PASS][201] +196 other tests pass
[200]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@xe_exec_threads@threads-bal-shared-vm-userptr-invalidate.html
[201]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-4/igt@xe_exec_threads@threads-bal-shared-vm-userptr-invalidate.html
* igt@xe_live_ktest@xe_mocs@xe_live_mocs_kernel_kunit:
- shard-bmg: [FAIL][202] ([Intel XE#1999]) -> [PASS][203] +2 other tests pass
[202]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@xe_live_ktest@xe_mocs@xe_live_mocs_kernel_kunit.html
[203]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-8/igt@xe_live_ktest@xe_mocs@xe_live_mocs_kernel_kunit.html
* igt@xe_pm@s2idle-vm-bind-unbind-all:
- shard-dg2-set2: [ABORT][204] ([Intel XE#1358] / [Intel XE#1794]) -> [PASS][205]
[204]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-432/igt@xe_pm@s2idle-vm-bind-unbind-all.html
[205]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-434/igt@xe_pm@s2idle-vm-bind-unbind-all.html
#### Warnings ####
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- shard-bmg: [SKIP][206] ([Intel XE#2233]) -> [SKIP][207] ([Intel XE#2423])
[206]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-1/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
[207]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@kms_async_flips@invalid-async-flip:
- shard-bmg: [SKIP][208] ([Intel XE#2423]) -> [SKIP][209] ([Intel XE#873])
[208]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_async_flips@invalid-async-flip.html
[209]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-2/igt@kms_async_flips@invalid-async-flip.html
* igt@kms_atomic@plane-primary-overlay-mutable-zpos:
- shard-bmg: [SKIP][210] ([Intel XE#2385]) -> [SKIP][211] ([Intel XE#2423])
[210]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-4/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html
[211]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html
* igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
- shard-bmg: [SKIP][212] ([Intel XE#2370]) -> [SKIP][213] ([Intel XE#2423])
[212]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-2/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html
[213]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html
* igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
- shard-bmg: [SKIP][214] ([Intel XE#2423]) -> [SKIP][215] ([Intel XE#2370])
[214]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
[215]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-1/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
* igt@kms_big_fb@4-tiled-32bpp-rotate-90:
- shard-bmg: [SKIP][216] ([Intel XE#2327]) -> [SKIP][217] ([Intel XE#2136]) +6 other tests skip
[216]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-5/igt@kms_big_fb@4-tiled-32bpp-rotate-90.html
[217]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_big_fb@4-tiled-32bpp-rotate-90.html
* igt@kms_big_fb@linear-16bpp-rotate-270:
- shard-dg2-set2: [SKIP][218] ([Intel XE#2136]) -> [SKIP][219] ([Intel XE#316])
[218]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-435/igt@kms_big_fb@linear-16bpp-rotate-270.html
[219]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-432/igt@kms_big_fb@linear-16bpp-rotate-270.html
- shard-bmg: [SKIP][220] ([Intel XE#2136] / [Intel XE#2231]) -> [SKIP][221] ([Intel XE#2327])
[220]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-5/igt@kms_big_fb@linear-16bpp-rotate-270.html
[221]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-8/igt@kms_big_fb@linear-16bpp-rotate-270.html
* igt@kms_big_fb@linear-32bpp-rotate-90:
- shard-bmg: [SKIP][222] ([Intel XE#2136]) -> [SKIP][223] ([Intel XE#2327]) +2 other tests skip
[222]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_big_fb@linear-32bpp-rotate-90.html
[223]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-4/igt@kms_big_fb@linear-32bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-addfb-size-offset-overflow:
- shard-bmg: [SKIP][224] ([Intel XE#2136]) -> [SKIP][225] ([Intel XE#607])
[224]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_big_fb@y-tiled-addfb-size-offset-overflow.html
[225]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-5/igt@kms_big_fb@y-tiled-addfb-size-offset-overflow.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
- shard-dg2-set2: [SKIP][226] ([Intel XE#1124]) -> [SKIP][227] ([Intel XE#2136])
[226]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-433/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
[227]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
- shard-bmg: [SKIP][228] ([Intel XE#1124]) -> [SKIP][229] ([Intel XE#2136]) +11 other tests skip
[228]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-8/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
[229]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip:
- shard-dg2-set2: [SKIP][230] ([Intel XE#2136]) -> [SKIP][231] ([Intel XE#1124]) +3 other tests skip
[230]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-435/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
[231]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-434/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip:
- shard-bmg: [SKIP][232] ([Intel XE#2136]) -> [SKIP][233] ([Intel XE#1124]) +11 other tests skip
[232]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
[233]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-3/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-dg2-set2: [SKIP][234] ([Intel XE#1124]) -> [SKIP][235] ([Intel XE#2136] / [Intel XE#2351])
[234]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-463/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
[235]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_big_fb@yf-tiled-16bpp-rotate-180:
- shard-bmg: [SKIP][236] ([Intel XE#1124]) -> [SKIP][237] ([Intel XE#2136] / [Intel XE#2231]) +2 other tests skip
[236]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-2/igt@kms_big_fb@yf-tiled-16bpp-rotate-180.html
[237]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-3/igt@kms_big_fb@yf-tiled-16bpp-rotate-180.html
* igt@kms_big_fb@yf-tiled-16bpp-rotate-270:
- shard-bmg: [SKIP][238] ([Intel XE#2136] / [Intel XE#2231]) -> [SKIP][239] ([Intel XE#1124]) +1 other test skip
[238]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-5/igt@kms_big_fb@yf-tiled-16bpp-rotate-270.html
[239]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-5/igt@kms_big_fb@yf-tiled-16bpp-rotate-270.html
* igt@kms_big_fb@yf-tiled-addfb:
- shard-dg2-set2: [SKIP][240] ([Intel XE#619]) -> [SKIP][241] ([Intel XE#2136] / [Intel XE#2351])
[240]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-435/igt@kms_big_fb@yf-tiled-addfb.html
[241]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@kms_big_fb@yf-tiled-addfb.html
* igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p:
- shard-bmg: [SKIP][242] ([Intel XE#2314] / [Intel XE#2894]) -> [SKIP][243] ([Intel XE#2423]) +2 other tests skip
[242]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-6/igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p.html
[243]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p.html
* igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p:
- shard-bmg: [SKIP][244] ([Intel XE#2423]) -> [SKIP][245] ([Intel XE#2314] / [Intel XE#2894])
[244]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p.html
[245]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-1/igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p.html
* igt@kms_bw@linear-tiling-1-displays-2160x1440p:
- shard-bmg: [SKIP][246] ([Intel XE#2423]) -> [SKIP][247] ([Intel XE#367])
[246]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_bw@linear-tiling-1-displays-2160x1440p.html
[247]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-4/igt@kms_bw@linear-tiling-1-displays-2160x1440p.html
* igt@kms_bw@linear-tiling-2-displays-2160x1440p:
- shard-bmg: [SKIP][248] ([Intel XE#3007]) -> [SKIP][249] ([Intel XE#367])
[248]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-5/igt@kms_bw@linear-tiling-2-displays-2160x1440p.html
[249]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-4/igt@kms_bw@linear-tiling-2-displays-2160x1440p.html
- shard-dg2-set2: [SKIP][250] ([Intel XE#2423] / [i915#2575]) -> [SKIP][251] ([Intel XE#367])
[250]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-435/igt@kms_bw@linear-tiling-2-displays-2160x1440p.html
[251]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-433/igt@kms_bw@linear-tiling-2-displays-2160x1440p.html
* igt@kms_bw@linear-tiling-4-displays-1920x1080p:
- shard-bmg: [SKIP][252] ([Intel XE#367]) -> [SKIP][253] ([Intel XE#2423]) +4 other tests skip
[252]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-2/igt@kms_bw@linear-tiling-4-displays-1920x1080p.html
[253]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_bw@linear-tiling-4-displays-1920x1080p.html
* igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc:
- shard-bmg: [SKIP][254] ([Intel XE#2887]) -> [SKIP][255] ([Intel XE#2136] / [Intel XE#2231]) +1 other test skip
[254]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-3/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc.html
[255]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-3/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc.html
- shard-dg2-set2: [SKIP][256] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][257] ([Intel XE#2136] / [Intel XE#2351])
[256]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-436/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc.html
[257]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc.html
* igt@kms_ccs@bad-rotation-90-y-tiled-gen12-mc-ccs:
- shard-dg2-set2: [SKIP][258] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][259] ([Intel XE#2136])
[258]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-432/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-mc-ccs.html
[259]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-mc-ccs.html
* igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs-cc:
- shard-bmg: [SKIP][260] ([Intel XE#2136]) -> [SKIP][261] ([Intel XE#2887]) +14 other tests skip
[260]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs-cc.html
[261]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-5/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs-cc.html
* igt@kms_ccs@crc-primary-rotation-180-y-tiled-ccs:
- shard-dg2-set2: [SKIP][262] ([Intel XE#2136] / [Intel XE#2351]) -> [SKIP][263] ([Intel XE#455] / [Intel XE#787])
[262]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-435/igt@kms_ccs@crc-primary-rotation-180-y-tiled-ccs.html
[263]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-433/igt@kms_ccs@crc-primary-rotation-180-y-tiled-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc:
- shard-bmg: [SKIP][264] ([Intel XE#3432]) -> [SKIP][265] ([Intel XE#2136] / [Intel XE#2231])
[264]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-2/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc.html
[265]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-3/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs:
- shard-bmg: [SKIP][266] ([Intel XE#3432]) -> [SKIP][267] ([Intel XE#2136])
[266]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-6/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs.html
[267]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc:
- shard-bmg: [SKIP][268] ([Intel XE#2136]) -> [SKIP][269] ([Intel XE#3432]) +2 other tests skip
[268]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc.html
[269]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-3/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs:
- shard-bmg: [SKIP][270] ([Intel XE#2136]) -> [SKIP][271] ([Intel XE#2652] / [Intel XE#787])
[270]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html
[271]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-5/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs:
- shard-bmg: [SKIP][272] ([Intel XE#2136] / [Intel XE#2231]) -> [SKIP][273] ([Intel XE#2887]) +3 other tests skip
[272]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-5/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs.html
[273]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-4/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
- shard-bmg: [SKIP][274] ([Intel XE#2887]) -> [SKIP][275] ([Intel XE#2136]) +17 other tests skip
[274]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-6/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
[275]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
- shard-dg2-set2: [DMESG-WARN][276] ([Intel XE#1727]) -> [INCOMPLETE][277] ([Intel XE#1727] / [Intel XE#3124])
[276]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
[277]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-d-dp-4:
- shard-dg2-set2: [DMESG-WARN][278] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113]) -> [INCOMPLETE][279] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124])
[278]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-d-dp-4.html
[279]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-d-dp-4.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-6:
- shard-dg2-set2: [DMESG-WARN][280] ([Intel XE#1727]) -> [INCOMPLETE][281] ([Intel XE#3124])
[280]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-6.html
[281]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-6.html
* igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs:
- shard-bmg: [SKIP][282] ([Intel XE#2652] / [Intel XE#787]) -> [SKIP][283] ([Intel XE#2136]) +2 other tests skip
[282]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-3/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs.html
[283]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs.html
* igt@kms_ccs@random-ccs-data-y-tiled-ccs:
- shard-dg2-set2: [SKIP][284] ([Intel XE#2136]) -> [SKIP][285] ([Intel XE#455] / [Intel XE#787]) +1 other test skip
[284]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-435/igt@kms_ccs@random-ccs-data-y-tiled-ccs.html
[285]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-433/igt@kms_ccs@random-ccs-data-y-tiled-ccs.html
* igt@kms_cdclk@mode-transition:
- shard-bmg: [SKIP][286] ([Intel XE#2136]) -> [SKIP][287] ([Intel XE#2724])
[286]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_cdclk@mode-transition.html
[287]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-8/igt@kms_cdclk@mode-transition.html
* igt@kms_chamelium_color@ctm-0-50:
- shard-bmg: [SKIP][288] ([Intel XE#2325]) -> [SKIP][289] ([Intel XE#2423]) +3 other tests skip
[288]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-3/igt@kms_chamelium_color@ctm-0-50.html
[289]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_chamelium_color@ctm-0-50.html
* igt@kms_chamelium_color@ctm-red-to-blue:
- shard-bmg: [SKIP][290] ([Intel XE#2423]) -> [SKIP][291] ([Intel XE#2325])
[290]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_chamelium_color@ctm-red-to-blue.html
[291]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-1/igt@kms_chamelium_color@ctm-red-to-blue.html
* igt@kms_chamelium_edid@dp-edid-change-during-hibernate:
- shard-bmg: [SKIP][292] ([Intel XE#2423]) -> [SKIP][293] ([Intel XE#3007]) +5 other tests skip
[292]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_chamelium_edid@dp-edid-change-during-hibernate.html
[293]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-3/igt@kms_chamelium_edid@dp-edid-change-during-hibernate.html
- shard-dg2-set2: [SKIP][294] ([Intel XE#373]) -> [SKIP][295] ([Intel XE#2423] / [i915#2575])
[294]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-434/igt@kms_chamelium_edid@dp-edid-change-during-hibernate.html
[295]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@kms_chamelium_edid@dp-edid-change-during-hibernate.html
* igt@kms_chamelium_edid@hdmi-edid-change-during-hibernate:
- shard-bmg: [SKIP][296] ([Intel XE#2423]) -> [SKIP][297] ([Intel XE#2252]) +9 other tests skip
[296]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_chamelium_edid@hdmi-edid-change-during-hibernate.html
[297]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-1/igt@kms_chamelium_edid@hdmi-edid-change-during-hibernate.html
* igt@kms_chamelium_hpd@common-hpd-after-suspend:
- shard-bmg: [SKIP][298] ([Intel XE#2252]) -> [SKIP][299] ([Intel XE#2423]) +9 other tests skip
[298]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-3/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
[299]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
* igt@kms_chamelium_hpd@dp-hpd-storm:
- shard-bmg: [SKIP][300] ([Intel XE#3007]) -> [SKIP][301] ([Intel XE#2252]) +1 other test skip
[300]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-5/igt@kms_chamelium_hpd@dp-hpd-storm.html
[301]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-2/igt@kms_chamelium_hpd@dp-hpd-storm.html
- shard-dg2-set2: [SKIP][302] ([Intel XE#2423] / [i915#2575]) -> [SKIP][303] ([Intel XE#373]) +1 other test skip
[302]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-435/igt@kms_chamelium_hpd@dp-hpd-storm.html
[303]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-466/igt@kms_chamelium_hpd@dp-hpd-storm.html
* igt@kms_content_protection@atomic:
- shard-bmg: [SKIP][304] ([Intel XE#2341]) -> [SKIP][305] ([Intel XE#2423])
[304]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-6/igt@kms_content_protection@atomic.html
[305]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_content_protection@atomic.html
* igt@kms_content_protection@atomic-dpms:
- shard-dg2-set2: [FAIL][306] ([Intel XE#1178]) -> [INCOMPLETE][307] ([Intel XE#2715])
[306]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-435/igt@kms_content_protection@atomic-dpms.html
[307]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@kms_content_protection@atomic-dpms.html
* igt@kms_content_protection@atomic-dpms@pipe-a-dp-2:
- shard-bmg: [FAIL][308] ([Intel XE#1178]) -> [INCOMPLETE][309] ([Intel XE#2715]) +1 other test incomplete
[308]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-8/igt@kms_content_protection@atomic-dpms@pipe-a-dp-2.html
[309]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-5/igt@kms_content_protection@atomic-dpms@pipe-a-dp-2.html
* igt@kms_content_protection@content-type-change:
- shard-bmg: [SKIP][310] ([Intel XE#3007]) -> [SKIP][311] ([Intel XE#2341])
[310]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-5/igt@kms_content_protection@content-type-change.html
[311]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-2/igt@kms_content_protection@content-type-change.html
* igt@kms_content_protection@dp-mst-type-0:
- shard-dg2-set2: [SKIP][312] ([Intel XE#307]) -> [SKIP][313] ([Intel XE#2423] / [i915#2575])
[312]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-463/igt@kms_content_protection@dp-mst-type-0.html
[313]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@kms_content_protection@dp-mst-type-0.html
* igt@kms_content_protection@legacy:
- shard-bmg: [SKIP][314] ([Intel XE#2423]) -> [FAIL][315] ([Intel XE#1178]) +1 other test fail
[314]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_content_protection@legacy.html
[315]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-8/igt@kms_content_protection@legacy.html
* igt@kms_content_protection@srm:
- shard-bmg: [FAIL][316] ([Intel XE#1178]) -> [SKIP][317] ([Intel XE#2423])
[316]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-1/igt@kms_content_protection@srm.html
[317]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_content_protection@srm.html
* igt@kms_content_protection@uevent:
- shard-bmg: [SKIP][318] ([Intel XE#2423]) -> [FAIL][319] ([Intel XE#1188])
[318]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_content_protection@uevent.html
[319]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-1/igt@kms_content_protection@uevent.html
* igt@kms_cursor_crc@cursor-offscreen-128x42:
- shard-bmg: [SKIP][320] ([Intel XE#2320]) -> [SKIP][321] ([Intel XE#2423]) +5 other tests skip
[320]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-2/igt@kms_cursor_crc@cursor-offscreen-128x42.html
[321]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_cursor_crc@cursor-offscreen-128x42.html
* igt@kms_cursor_crc@cursor-offscreen-512x512:
- shard-bmg: [SKIP][322] ([Intel XE#2321]) -> [SKIP][323] ([Intel XE#2423]) +1 other test skip
[322]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-6/igt@kms_cursor_crc@cursor-offscreen-512x512.html
[323]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_cursor_crc@cursor-offscreen-512x512.html
* igt@kms_cursor_crc@cursor-onscreen-32x32:
- shard-bmg: [SKIP][324] ([Intel XE#2423]) -> [SKIP][325] ([Intel XE#2320]) +2 other tests skip
[324]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_cursor_crc@cursor-onscreen-32x32.html
[325]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-5/igt@kms_cursor_crc@cursor-onscreen-32x32.html
* igt@kms_cursor_crc@cursor-sliding-512x512:
- shard-bmg: [SKIP][326] ([Intel XE#2423]) -> [SKIP][327] ([Intel XE#2321]) +3 other tests skip
[326]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_cursor_crc@cursor-sliding-512x512.html
[327]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-1/igt@kms_cursor_crc@cursor-sliding-512x512.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size:
- shard-bmg: [SKIP][328] ([Intel XE#2286]) -> [SKIP][329] ([Intel XE#3007])
[328]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-8/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html
[329]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-3/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html
- shard-dg2-set2: [SKIP][330] ([Intel XE#323]) -> [SKIP][331] ([Intel XE#2423] / [i915#2575])
[330]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-435/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html
[331]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html
* igt@kms_cursor_legacy@cursora-vs-flipb-toggle:
- shard-bmg: [SKIP][332] ([Intel XE#2291]) -> [SKIP][333] ([Intel XE#2423]) +3 other tests skip
[332]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-6/igt@kms_cursor_legacy@cursora-vs-flipb-toggle.html
[333]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_cursor_legacy@cursora-vs-flipb-toggle.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
- shard-bmg: [SKIP][334] ([Intel XE#2423]) -> [SKIP][335] ([Intel XE#2286]) +1 other test skip
[334]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html
[335]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-2/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html
* igt@kms_display_modes@extended-mode-basic:
- shard-bmg: [SKIP][336] ([Intel XE#2425]) -> [SKIP][337] ([Intel XE#2423])
[336]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-6/igt@kms_display_modes@extended-mode-basic.html
[337]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_display_modes@extended-mode-basic.html
* igt@kms_display_modes@mst-extended-mode-negative:
- shard-bmg: [SKIP][338] ([Intel XE#2423]) -> [SKIP][339] ([Intel XE#2323])
[338]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_display_modes@mst-extended-mode-negative.html
[339]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-8/igt@kms_display_modes@mst-extended-mode-negative.html
* igt@kms_dsc@dsc-fractional-bpp-with-bpc:
- shard-bmg: [SKIP][340] ([Intel XE#2244]) -> [SKIP][341] ([Intel XE#2136] / [Intel XE#2231])
[340]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-6/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html
[341]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-3/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html
* igt@kms_dsc@dsc-with-bpc:
- shard-bmg: [SKIP][342] ([Intel XE#2136]) -> [SKIP][343] ([Intel XE#2244])
[342]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_dsc@dsc-with-bpc.html
[343]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-4/igt@kms_dsc@dsc-with-bpc.html
* igt@kms_dsc@dsc-with-output-formats-with-bpc:
- shard-dg2-set2: [SKIP][344] ([Intel XE#2136]) -> [SKIP][345] ([Intel XE#455]) +1 other test skip
[344]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-435/igt@kms_dsc@dsc-with-output-formats-with-bpc.html
[345]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-466/igt@kms_dsc@dsc-with-output-formats-with-bpc.html
- shard-bmg: [SKIP][346] ([Intel XE#2136] / [Intel XE#2231]) -> [SKIP][347] ([Intel XE#2244])
[346]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-5/igt@kms_dsc@dsc-with-output-formats-with-bpc.html
[347]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-4/igt@kms_dsc@dsc-with-output-formats-with-bpc.html
* igt@kms_fbcon_fbt@fbc:
- shard-bmg: [FAIL][348] ([Intel XE#1695]) -> [SKIP][349] ([Intel XE#2136])
[348]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-3/igt@kms_fbcon_fbt@fbc.html
[349]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_fbcon_fbt@fbc.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-bmg: [FAIL][350] ([Intel XE#1695]) -> [SKIP][351] ([Intel XE#2136] / [Intel XE#2231])
[350]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-3/igt@kms_fbcon_fbt@fbc-suspend.html
[351]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-3/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_fbcon_fbt@psr-suspend:
- shard-bmg: [SKIP][352] ([Intel XE#2136]) -> [SKIP][353] ([Intel XE#776])
[352]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_fbcon_fbt@psr-suspend.html
[353]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-8/igt@kms_fbcon_fbt@psr-suspend.html
* igt@kms_feature_discovery@chamelium:
- shard-bmg: [SKIP][354] ([Intel XE#2372]) -> [SKIP][355] ([Intel XE#2423])
[354]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-2/igt@kms_feature_discovery@chamelium.html
[355]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_feature_discovery@chamelium.html
* igt@kms_feature_discovery@dp-mst:
- shard-bmg: [SKIP][356] ([Intel XE#2423]) -> [SKIP][357] ([Intel XE#2375])
[356]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_feature_discovery@dp-mst.html
[357]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-3/igt@kms_feature_discovery@dp-mst.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling:
- shard-bmg: [SKIP][358] ([Intel XE#2293] / [Intel XE#2380]) -> [SKIP][359] ([Intel XE#2136]) +3 other tests skip
[358]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-3/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling.html
[359]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling:
- shard-bmg: [SKIP][360] ([Intel XE#2136]) -> [SKIP][361] ([Intel XE#2293] / [Intel XE#2380]) +5 other tests skip
[360]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling.html
[361]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-3/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling.html
* igt@kms_frontbuffer_tracking@drrs-1p-offscren-pri-indfb-draw-blt:
- shard-bmg: [SKIP][362] ([Intel XE#2136]) -> [SKIP][363] ([Intel XE#2311]) +32 other tests skip
[362]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_frontbuffer_tracking@drrs-1p-offscren-pri-indfb-draw-blt.html
[363]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-1p-offscren-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-fullscreen:
- shard-bmg: [SKIP][364] ([Intel XE#2136] / [Intel XE#2231]) -> [SKIP][365] ([Intel XE#2311]) +2 other tests skip
[364]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-fullscreen.html
[365]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-fullscreen.html
- shard-dg2-set2: [SKIP][366] ([Intel XE#2136]) -> [SKIP][367] ([Intel XE#651]) +2 other tests skip
[366]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-435/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-fullscreen.html
[367]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-msflip-blt:
- shard-bmg: [SKIP][368] ([Intel XE#2312]) -> [SKIP][369] ([Intel XE#2136] / [Intel XE#2231])
[368]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-msflip-blt.html
[369]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-draw-render:
- shard-bmg: [SKIP][370] ([Intel XE#2311]) -> [SKIP][371] ([Intel XE#2136] / [Intel XE#2231]) +2 other tests skip
[370]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-draw-render.html
[371]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-draw-render.html
- shard-dg2-set2: [SKIP][372] ([Intel XE#651]) -> [SKIP][373] ([Intel XE#2136] / [Intel XE#2351]) +1 other test skip
[372]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-463/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-draw-render.html
[373]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][374] ([Intel XE#2312]) -> [SKIP][375] ([Intel XE#2311]) +5 other tests skip
[374]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html
[375]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-render:
- shard-bmg: [SKIP][376] ([Intel XE#2311]) -> [SKIP][377] ([Intel XE#2136]) +33 other tests skip
[376]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-render.html
[377]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-render.html
* igt@kms_frontbuffer_tracking@drrs-shrfb-scaledprimary:
- shard-dg2-set2: [SKIP][378] ([Intel XE#2136] / [Intel XE#2351]) -> [SKIP][379] ([Intel XE#651]) +1 other test skip
[378]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-435/igt@kms_frontbuffer_tracking@drrs-shrfb-scaledprimary.html
[379]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-466/igt@kms_frontbuffer_tracking@drrs-shrfb-scaledprimary.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-blt:
- shard-bmg: [FAIL][380] ([Intel XE#2333]) -> [SKIP][381] ([Intel XE#2136] / [Intel XE#2231]) +2 other tests skip
[380]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-blt.html
[381]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt:
- shard-bmg: [FAIL][382] ([Intel XE#2333]) -> [SKIP][383] ([Intel XE#2136]) +18 other tests skip
[382]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html
[383]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render:
- shard-bmg: [SKIP][384] ([Intel XE#2136] / [Intel XE#2231]) -> [FAIL][385] ([Intel XE#2333]) +2 other tests fail
[384]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html
[385]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-msflip-blt:
- shard-bmg: [SKIP][386] ([Intel XE#2312]) -> [FAIL][387] ([Intel XE#2333])
[386]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-msflip-blt.html
[387]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][388] ([Intel XE#2136]) -> [FAIL][389] ([Intel XE#2333]) +14 other tests fail
[388]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc.html
[389]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-offscren-pri-indfb-draw-blt:
- shard-dg2-set2: [SKIP][390] ([Intel XE#651]) -> [SKIP][391] ([Intel XE#2136])
[390]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-435/igt@kms_frontbuffer_tracking@fbcdrrs-1p-offscren-pri-indfb-draw-blt.html
[391]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@kms_frontbuffer_tracking@fbcdrrs-1p-offscren-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y:
- shard-bmg: [SKIP][392] ([Intel XE#2352]) -> [SKIP][393] ([Intel XE#2136])
[392]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y.html
[393]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw:
- shard-bmg: [SKIP][394] ([Intel XE#2313]) -> [SKIP][395] ([Intel XE#2136] / [Intel XE#2231]) +2 other tests skip
[394]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw.html
[395]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-pgflip-blt:
- shard-dg2-set2: [SKIP][396] ([Intel XE#2136]) -> [SKIP][397] ([Intel XE#653]) +4 other tests skip
[396]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-435/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-pgflip-blt.html
[397]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-466/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render:
- shard-bmg: [SKIP][398] ([Intel XE#2136] / [Intel XE#2231]) -> [SKIP][399] ([Intel XE#2136]) +12 other tests skip
[398]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render.html
[399]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt:
- shard-bmg: [SKIP][400] ([Intel XE#2312]) -> [SKIP][401] ([Intel XE#2313]) +7 other tests skip
[400]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt.html
[401]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt:
- shard-bmg: [SKIP][402] ([Intel XE#2313]) -> [SKIP][403] ([Intel XE#2136]) +31 other tests skip
[402]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt.html
[403]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-slowdraw:
- shard-dg2-set2: [SKIP][404] ([Intel XE#653]) -> [SKIP][405] ([Intel XE#2136] / [Intel XE#2351]) +1 other test skip
[404]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-466/igt@kms_frontbuffer_tracking@fbcpsr-slowdraw.html
[405]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@kms_frontbuffer_tracking@fbcpsr-slowdraw.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-blt:
- shard-bmg: [SKIP][406] ([Intel XE#2136]) -> [SKIP][407] ([Intel XE#2313]) +24 other tests skip
[406]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-blt.html
[407]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt:
- shard-bmg: [SKIP][408] ([Intel XE#2312]) -> [SKIP][409] ([Intel XE#2136]) +9 other tests skip
[408]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html
[409]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-plflip-blt:
- shard-bmg: [SKIP][410] ([Intel XE#2136] / [Intel XE#2231]) -> [SKIP][411] ([Intel XE#2313]) +5 other tests skip
[410]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-5/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-plflip-blt.html
[411]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-2/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-plflip-blt.html
- shard-dg2-set2: [SKIP][412] ([Intel XE#2136] / [Intel XE#2351]) -> [SKIP][413] ([Intel XE#653]) +1 other test skip
[412]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-435/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-plflip-blt.html
[413]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@psr-slowdraw:
- shard-dg2-set2: [SKIP][414] ([Intel XE#653]) -> [SKIP][415] ([Intel XE#2136]) +3 other tests skip
[414]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-466/igt@kms_frontbuffer_tracking@psr-slowdraw.html
[415]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@kms_frontbuffer_tracking@psr-slowdraw.html
* igt@kms_getfb@getfb-reject-ccs:
- shard-bmg: [SKIP][416] ([Intel XE#2502]) -> [SKIP][417] ([Intel XE#2423])
[416]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-3/igt@kms_getfb@getfb-reject-ccs.html
[417]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_getfb@getfb-reject-ccs.html
* igt@kms_getfb@getfb2-accept-ccs:
- shard-bmg: [SKIP][418] ([Intel XE#2423]) -> [SKIP][419] ([Intel XE#2340])
[418]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_getfb@getfb2-accept-ccs.html
[419]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-3/igt@kms_getfb@getfb2-accept-ccs.html
* igt@kms_hdr@invalid-hdr:
- shard-dg2-set2: [SKIP][420] ([Intel XE#2423] / [i915#2575]) -> [SKIP][421] ([Intel XE#455]) +3 other tests skip
[420]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-435/igt@kms_hdr@invalid-hdr.html
[421]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-434/igt@kms_hdr@invalid-hdr.html
* igt@kms_joiner@basic-force-ultra-joiner:
- shard-bmg: [SKIP][422] ([Intel XE#2136]) -> [SKIP][423] ([Intel XE#2934])
[422]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_joiner@basic-force-ultra-joiner.html
[423]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-8/igt@kms_joiner@basic-force-ultra-joiner.html
* igt@kms_joiner@basic-ultra-joiner:
- shard-bmg: [SKIP][424] ([Intel XE#2927]) -> [SKIP][425] ([Intel XE#2136])
[424]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-2/igt@kms_joiner@basic-ultra-joiner.html
[425]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_joiner@basic-ultra-joiner.html
* igt@kms_joiner@invalid-modeset-big-joiner:
- shard-bmg: [SKIP][426] ([Intel XE#346]) -> [SKIP][427] ([Intel XE#2136])
[426]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-6/igt@kms_joiner@invalid-modeset-big-joiner.html
[427]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_joiner@invalid-modeset-big-joiner.html
* igt@kms_joiner@invalid-modeset-force-ultra-joiner:
- shard-bmg: [SKIP][428] ([Intel XE#2934]) -> [SKIP][429] ([Intel XE#2136] / [Intel XE#2231])
[428]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-5/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html
[429]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-3/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html
- shard-dg2-set2: [SKIP][430] ([Intel XE#2925]) -> [SKIP][431] ([Intel XE#2136])
[430]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-432/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html
[431]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html
* igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
- shard-bmg: [SKIP][432] ([Intel XE#2423]) -> [SKIP][433] ([Intel XE#2501])
[432]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
[433]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-2/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
* igt@kms_panel_fitting@legacy:
- shard-bmg: [SKIP][434] ([Intel XE#2486]) -> [SKIP][435] ([Intel XE#2423]) +1 other test skip
[434]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-4/igt@kms_panel_fitting@legacy.html
[435]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_panel_fitting@legacy.html
* igt@kms_plane_lowres@tiling-y:
- shard-bmg: [SKIP][436] ([Intel XE#2423]) -> [SKIP][437] ([Intel XE#2393])
[436]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_plane_lowres@tiling-y.html
[437]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-8/igt@kms_plane_lowres@tiling-y.html
* igt@kms_plane_lowres@tiling-yf:
- shard-bmg: [SKIP][438] ([Intel XE#2393]) -> [SKIP][439] ([Intel XE#3007])
[438]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-4/igt@kms_plane_lowres@tiling-yf.html
[439]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-3/igt@kms_plane_lowres@tiling-yf.html
- shard-dg2-set2: [SKIP][440] ([Intel XE#455]) -> [SKIP][441] ([Intel XE#2423] / [i915#2575])
[440]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-463/igt@kms_plane_lowres@tiling-yf.html
[441]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@kms_plane_lowres@tiling-yf.html
* igt@kms_plane_multiple@tiling-none:
- shard-bmg: [SKIP][442] ([Intel XE#3007]) -> [SKIP][443] ([Intel XE#2423]) +6 other tests skip
[442]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-5/igt@kms_plane_multiple@tiling-none.html
[443]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_plane_multiple@tiling-none.html
* igt@kms_plane_multiple@tiling-yf:
- shard-bmg: [SKIP][444] ([Intel XE#2423]) -> [SKIP][445] ([Intel XE#2493]) +1 other test skip
[444]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_plane_multiple@tiling-yf.html
[445]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-5/igt@kms_plane_multiple@tiling-yf.html
* igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format:
- shard-bmg: [SKIP][446] ([Intel XE#2763]) -> [SKIP][447] ([Intel XE#2423]) +3 other tests skip
[446]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-2/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format.html
[447]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75:
- shard-bmg: [SKIP][448] ([Intel XE#2423]) -> [SKIP][449] ([Intel XE#2763]) +2 other tests skip
[448]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75.html
[449]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-2/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75.html
* igt@kms_pm_backlight@fade:
- shard-bmg: [SKIP][450] ([Intel XE#870]) -> [SKIP][451] ([Intel XE#2136]) +2 other tests skip
[450]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-2/igt@kms_pm_backlight@fade.html
[451]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_pm_backlight@fade.html
* igt@kms_pm_backlight@fade-with-dpms:
- shard-bmg: [SKIP][452] ([Intel XE#2136]) -> [SKIP][453] ([Intel XE#870])
[452]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_pm_backlight@fade-with-dpms.html
[453]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-5/igt@kms_pm_backlight@fade-with-dpms.html
* igt@kms_pm_dc@dc3co-vpb-simulation:
- shard-bmg: [SKIP][454] ([Intel XE#2391]) -> [SKIP][455] ([Intel XE#2136])
[454]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-5/igt@kms_pm_dc@dc3co-vpb-simulation.html
[455]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_pm_dc@dc3co-vpb-simulation.html
* igt@kms_pm_dc@dc6-psr:
- shard-bmg: [SKIP][456] ([Intel XE#2392]) -> [SKIP][457] ([Intel XE#2136])
[456]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-8/igt@kms_pm_dc@dc6-psr.html
[457]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_pm_dc@dc6-psr.html
* igt@kms_pm_lpsp@kms-lpsp:
- shard-bmg: [SKIP][458] ([Intel XE#2499]) -> [SKIP][459] ([Intel XE#2136])
[458]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-2/igt@kms_pm_lpsp@kms-lpsp.html
[459]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_pm_lpsp@kms-lpsp.html
* igt@kms_pm_rpm@dpms-mode-unset-lpsp:
- shard-bmg: [SKIP][460] ([Intel XE#2446]) -> [SKIP][461] ([Intel XE#1439] / [Intel XE#836])
[460]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html
[461]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-5/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html
* igt@kms_pm_rpm@modeset-lpsp-stress:
- shard-bmg: [SKIP][462] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#836]) -> [SKIP][463] ([Intel XE#2446])
[462]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-6/igt@kms_pm_rpm@modeset-lpsp-stress.html
[463]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_pm_rpm@modeset-lpsp-stress.html
* igt@kms_pm_rpm@modeset-lpsp-stress-no-wait:
- shard-bmg: [SKIP][464] ([Intel XE#2446]) -> [SKIP][465] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#836])
[464]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html
[465]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-2/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html
* igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf:
- shard-bmg: [SKIP][466] ([Intel XE#2136]) -> [SKIP][467] ([Intel XE#1489]) +13 other tests skip
[466]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf.html
[467]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-5/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf:
- shard-bmg: [SKIP][468] ([Intel XE#1489]) -> [SKIP][469] ([Intel XE#2136]) +8 other tests skip
[468]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-6/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf.html
[469]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf.html
* igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-sf:
- shard-dg2-set2: [SKIP][470] ([Intel XE#2136]) -> [SKIP][471] ([Intel XE#1489]) +1 other test skip
[470]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-435/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-sf.html
[471]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-466/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-sf.html
- shard-bmg: [SKIP][472] ([Intel XE#2136] / [Intel XE#2231]) -> [SKIP][473] ([Intel XE#1489]) +1 other test skip
[472]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-5/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-sf.html
[473]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-3/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-sf.html
* igt@kms_psr2_sf@psr2-overlay-plane-update-sf-dmg-area:
- shard-bmg: [SKIP][474] ([Intel XE#1489]) -> [SKIP][475] ([Intel XE#2136] / [Intel XE#2231]) +1 other test skip
[474]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-2/igt@kms_psr2_sf@psr2-overlay-plane-update-sf-dmg-area.html
[475]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-3/igt@kms_psr2_sf@psr2-overlay-plane-update-sf-dmg-area.html
- shard-dg2-set2: [SKIP][476] ([Intel XE#1489]) -> [SKIP][477] ([Intel XE#2136]) +1 other test skip
[476]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-434/igt@kms_psr2_sf@psr2-overlay-plane-update-sf-dmg-area.html
[477]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@kms_psr2_sf@psr2-overlay-plane-update-sf-dmg-area.html
* igt@kms_psr2_su@page_flip-p010:
- shard-bmg: [SKIP][478] ([Intel XE#2387]) -> [SKIP][479] ([Intel XE#2136]) +2 other tests skip
[478]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-5/igt@kms_psr2_su@page_flip-p010.html
[479]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_psr2_su@page_flip-p010.html
* igt@kms_psr@fbc-pr-cursor-plane-onoff:
- shard-bmg: [SKIP][480] ([Intel XE#2234] / [Intel XE#2850]) -> [SKIP][481] ([Intel XE#2136]) +14 other tests skip
[480]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-3/igt@kms_psr@fbc-pr-cursor-plane-onoff.html
[481]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_psr@fbc-pr-cursor-plane-onoff.html
* igt@kms_psr@fbc-psr-cursor-plane-move:
- shard-bmg: [SKIP][482] ([Intel XE#2136]) -> [SKIP][483] ([Intel XE#2234] / [Intel XE#2850]) +9 other tests skip
[482]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_psr@fbc-psr-cursor-plane-move.html
[483]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-5/igt@kms_psr@fbc-psr-cursor-plane-move.html
* igt@kms_psr@fbc-psr-suspend:
- shard-bmg: [SKIP][484] ([Intel XE#2136] / [Intel XE#2231]) -> [SKIP][485] ([Intel XE#2234] / [Intel XE#2850]) +1 other test skip
[484]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-5/igt@kms_psr@fbc-psr-suspend.html
[485]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-1/igt@kms_psr@fbc-psr-suspend.html
* igt@kms_psr@fbc-psr2-primary-blt:
- shard-bmg: [SKIP][486] ([Intel XE#2234] / [Intel XE#2850]) -> [SKIP][487] ([Intel XE#2136] / [Intel XE#2231]) +1 other test skip
[486]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-1/igt@kms_psr@fbc-psr2-primary-blt.html
[487]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-3/igt@kms_psr@fbc-psr2-primary-blt.html
- shard-dg2-set2: [SKIP][488] ([Intel XE#2850] / [Intel XE#929]) -> [SKIP][489] ([Intel XE#2136])
[488]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-466/igt@kms_psr@fbc-psr2-primary-blt.html
[489]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@kms_psr@fbc-psr2-primary-blt.html
* igt@kms_psr@fbc-psr2-sprite-plane-onoff:
- shard-dg2-set2: [SKIP][490] ([Intel XE#2136]) -> [SKIP][491] ([Intel XE#2850] / [Intel XE#929]) +1 other test skip
[490]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-435/igt@kms_psr@fbc-psr2-sprite-plane-onoff.html
[491]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-466/igt@kms_psr@fbc-psr2-sprite-plane-onoff.html
* igt@kms_psr@psr2-suspend:
- shard-bmg: [SKIP][492] ([Intel XE#2136]) -> [SKIP][493] ([Intel XE#2136] / [Intel XE#2231]) +8 other tests skip
[492]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_psr@psr2-suspend.html
[493]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-3/igt@kms_psr@psr2-suspend.html
* igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
- shard-bmg: [SKIP][494] ([Intel XE#2414]) -> [SKIP][495] ([Intel XE#2136])
[494]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-8/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
[495]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
* igt@kms_rotation_crc@bad-pixel-format:
- shard-bmg: [SKIP][496] ([Intel XE#3414] / [Intel XE#3904]) -> [SKIP][497] ([Intel XE#2423]) +3 other tests skip
[496]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-8/igt@kms_rotation_crc@bad-pixel-format.html
[497]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_rotation_crc@bad-pixel-format.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-90:
- shard-dg2-set2: [SKIP][498] ([Intel XE#2423] / [i915#2575]) -> [SKIP][499] ([Intel XE#3414])
[498]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-435/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html
[499]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-434/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html
- shard-bmg: [SKIP][500] ([Intel XE#3007]) -> [SKIP][501] ([Intel XE#3414] / [Intel XE#3904])
[500]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-5/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html
[501]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-3/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
- shard-bmg: [SKIP][502] ([Intel XE#2423]) -> [SKIP][503] ([Intel XE#2330]) +1 other test skip
[502]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html
[503]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-1/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html
* igt@kms_setmode@basic-clone-single-crtc:
- shard-bmg: [SKIP][504] ([Intel XE#1435]) -> [SKIP][505] ([Intel XE#2423])
[504]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-8/igt@kms_setmode@basic-clone-single-crtc.html
[505]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_setmode@basic-clone-single-crtc.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-dg2-set2: [FAIL][506] ([Intel XE#1729]) -> [SKIP][507] ([Intel XE#362])
[506]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-433/igt@kms_tiled_display@basic-test-pattern.html
[507]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-463/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_tv_load_detect@load-detect:
- shard-dg2-set2: [SKIP][508] ([Intel XE#330]) -> [SKIP][509] ([Intel XE#2423] / [i915#2575])
[508]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-436/igt@kms_tv_load_detect@load-detect.html
[509]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@kms_tv_load_detect@load-detect.html
- shard-bmg: [SKIP][510] ([Intel XE#2450]) -> [SKIP][511] ([Intel XE#3007])
[510]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-8/igt@kms_tv_load_detect@load-detect.html
[511]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-3/igt@kms_tv_load_detect@load-detect.html
* igt@kms_vrr@cmrr:
- shard-bmg: [SKIP][512] ([Intel XE#2423]) -> [SKIP][513] ([Intel XE#2168])
[512]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_vrr@cmrr.html
[513]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-4/igt@kms_vrr@cmrr.html
* igt@kms_vrr@seamless-rr-switch-virtual:
- shard-bmg: [SKIP][514] ([Intel XE#2423]) -> [SKIP][515] ([Intel XE#1499]) +1 other test skip
[514]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_vrr@seamless-rr-switch-virtual.html
[515]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-5/igt@kms_vrr@seamless-rr-switch-virtual.html
* igt@kms_vrr@seamless-rr-switch-vrr:
- shard-bmg: [SKIP][516] ([Intel XE#1499]) -> [SKIP][517] ([Intel XE#2423])
[516]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-1/igt@kms_vrr@seamless-rr-switch-vrr.html
[517]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_vrr@seamless-rr-switch-vrr.html
* igt@kms_writeback@writeback-fb-id:
- shard-bmg: [SKIP][518] ([Intel XE#2423]) -> [SKIP][519] ([Intel XE#756])
[518]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@kms_writeback@writeback-fb-id.html
[519]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-5/igt@kms_writeback@writeback-fb-id.html
* igt@kms_writeback@writeback-pixel-formats:
- shard-bmg: [SKIP][520] ([Intel XE#756]) -> [SKIP][521] ([Intel XE#2423]) +1 other test skip
[520]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-1/igt@kms_writeback@writeback-pixel-formats.html
[521]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@kms_writeback@writeback-pixel-formats.html
* igt@xe_copy_basic@mem-copy-linear-0x3fff:
- shard-dg2-set2: [SKIP][522] ([Intel XE#1123]) -> [SKIP][523] ([Intel XE#1130])
[522]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-434/igt@xe_copy_basic@mem-copy-linear-0x3fff.html
[523]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@xe_copy_basic@mem-copy-linear-0x3fff.html
* igt@xe_copy_basic@mem-set-linear-0x369:
- shard-dg2-set2: [SKIP][524] ([Intel XE#1130]) -> [SKIP][525] ([Intel XE#1126])
[524]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-435/igt@xe_copy_basic@mem-set-linear-0x369.html
[525]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-466/igt@xe_copy_basic@mem-set-linear-0x369.html
* igt@xe_create@multigpu-create-massive-size:
- shard-bmg: [SKIP][526] ([Intel XE#1130]) -> [SKIP][527] ([Intel XE#2504])
[526]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@xe_create@multigpu-create-massive-size.html
[527]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-2/igt@xe_create@multigpu-create-massive-size.html
* igt@xe_eudebug@basic-vm-bind-metadata-discovery:
- shard-bmg: [SKIP][528] ([Intel XE#1130]) -> [SKIP][529] ([Intel XE#2905]) +11 other tests skip
[528]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@xe_eudebug@basic-vm-bind-metadata-discovery.html
[529]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-4/igt@xe_eudebug@basic-vm-bind-metadata-discovery.html
* igt@xe_eudebug@discovery-empty:
- shard-bmg: [SKIP][530] ([Intel XE#2905]) -> [SKIP][531] ([Intel XE#1130]) +12 other tests skip
[530]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-6/igt@xe_eudebug@discovery-empty.html
[531]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@xe_eudebug@discovery-empty.html
* igt@xe_eudebug@discovery-race:
- shard-dg2-set2: [SKIP][532] ([Intel XE#1130]) -> [SKIP][533] ([Intel XE#2905])
[532]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-435/igt@xe_eudebug@discovery-race.html
[533]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-433/igt@xe_eudebug@discovery-race.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr:
- shard-bmg: [SKIP][534] ([Intel XE#2322]) -> [SKIP][535] ([Intel XE#1130]) +9 other tests skip
[534]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-2/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr.html
[535]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr.html
* igt@xe_exec_basic@multigpu-once-null-rebind:
- shard-bmg: [SKIP][536] ([Intel XE#1130]) -> [SKIP][537] ([Intel XE#2322]) +10 other tests skip
[536]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@xe_exec_basic@multigpu-once-null-rebind.html
[537]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-5/igt@xe_exec_basic@multigpu-once-null-rebind.html
* igt@xe_exec_fault_mode@many-execqueues-rebind:
- shard-dg2-set2: [SKIP][538] ([Intel XE#1130]) -> [SKIP][539] ([Intel XE#288]) +5 other tests skip
[538]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-435/igt@xe_exec_fault_mode@many-execqueues-rebind.html
[539]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-466/igt@xe_exec_fault_mode@many-execqueues-rebind.html
* igt@xe_exec_fault_mode@once-userptr-rebind:
- shard-dg2-set2: [SKIP][540] ([Intel XE#288]) -> [SKIP][541] ([Intel XE#1130]) +3 other tests skip
[540]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-434/igt@xe_exec_fault_mode@once-userptr-rebind.html
[541]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@xe_exec_fault_mode@once-userptr-rebind.html
* igt@xe_exec_mix_modes@exec-simple-batch-store-lr:
- shard-dg2-set2: [SKIP][542] ([Intel XE#2360]) -> [SKIP][543] ([Intel XE#1130])
[542]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-463/igt@xe_exec_mix_modes@exec-simple-batch-store-lr.html
[543]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@xe_exec_mix_modes@exec-simple-batch-store-lr.html
* igt@xe_media_fill@media-fill:
- shard-bmg: [SKIP][544] ([Intel XE#2459] / [Intel XE#2596]) -> [SKIP][545] ([Intel XE#1130])
[544]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-2/igt@xe_media_fill@media-fill.html
[545]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@xe_media_fill@media-fill.html
* igt@xe_oa@invalid-oa-metric-set-id:
- shard-dg2-set2: [SKIP][546] ([Intel XE#2541] / [Intel XE#3573]) -> [SKIP][547] ([Intel XE#1130]) +1 other test skip
[546]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-463/igt@xe_oa@invalid-oa-metric-set-id.html
[547]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@xe_oa@invalid-oa-metric-set-id.html
* igt@xe_oa@oa-regs-whitelisted:
- shard-dg2-set2: [SKIP][548] ([Intel XE#1130]) -> [SKIP][549] ([Intel XE#2541] / [Intel XE#3573]) +1 other test skip
[548]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-435/igt@xe_oa@oa-regs-whitelisted.html
[549]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-433/igt@xe_oa@oa-regs-whitelisted.html
* igt@xe_pat@pat-index-xelp:
- shard-bmg: [SKIP][550] ([Intel XE#1130]) -> [SKIP][551] ([Intel XE#2245])
[550]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@xe_pat@pat-index-xelp.html
[551]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-2/igt@xe_pat@pat-index-xelp.html
* igt@xe_peer2peer@read:
- shard-dg2-set2: [SKIP][552] ([Intel XE#1061]) -> [FAIL][553] ([Intel XE#1173])
[552]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-432/igt@xe_peer2peer@read.html
[553]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-433/igt@xe_peer2peer@read.html
* igt@xe_pm@d3cold-mmap-system:
- shard-bmg: [SKIP][554] ([Intel XE#1130]) -> [SKIP][555] ([Intel XE#2284])
[554]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@xe_pm@d3cold-mmap-system.html
[555]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-2/igt@xe_pm@d3cold-mmap-system.html
* igt@xe_pm@s2idle-d3cold-basic-exec:
- shard-bmg: [SKIP][556] ([Intel XE#2284]) -> [SKIP][557] ([Intel XE#1130]) +1 other test skip
[556]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-1/igt@xe_pm@s2idle-d3cold-basic-exec.html
[557]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@xe_pm@s2idle-d3cold-basic-exec.html
* igt@xe_pm@s2idle-vm-bind-userptr:
- shard-dg2-set2: [ABORT][558] ([Intel XE#1358] / [Intel XE#1794]) -> [SKIP][559] ([Intel XE#1130])
[558]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-432/igt@xe_pm@s2idle-vm-bind-userptr.html
[559]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-435/igt@xe_pm@s2idle-vm-bind-userptr.html
* igt@xe_query@multigpu-query-cs-cycles:
- shard-bmg: [SKIP][560] ([Intel XE#944]) -> [SKIP][561] ([Intel XE#1130]) +3 other tests skip
[560]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-6/igt@xe_query@multigpu-query-cs-cycles.html
[561]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-7/igt@xe_query@multigpu-query-cs-cycles.html
* igt@xe_query@multigpu-query-invalid-extension:
- shard-bmg: [SKIP][562] ([Intel XE#1130]) -> [SKIP][563] ([Intel XE#944]) +4 other tests skip
[562]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-bmg-7/igt@xe_query@multigpu-query-invalid-extension.html
[563]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-bmg-5/igt@xe_query@multigpu-query-invalid-extension.html
* igt@xe_query@multigpu-query-uc-fw-version-guc:
- shard-dg2-set2: [SKIP][564] ([Intel XE#1130]) -> [SKIP][565] ([Intel XE#944])
[564]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8199/shard-dg2-435/igt@xe_query@multigpu-query-uc-fw-version-guc.html
[565]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/shard-dg2-463/igt@xe_query@multigpu-query-uc-fw-version-guc.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#1061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1061
[Intel XE#1091]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1091
[Intel XE#1122]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1122
[Intel XE#1123]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1123
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1125]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1125
[Intel XE#1126]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1126
[Intel XE#1129]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1129
[Intel XE#1130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1130
[Intel XE#1173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1173
[Intel XE#1174]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1174
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1188]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1188
[Intel XE#1358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1358
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1397
[Intel XE#1401]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1401
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
[Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
[Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
[Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
[Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#1512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1512
[Intel XE#1695]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1695
[Intel XE#1725]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1725
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745
[Intel XE#1794]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1794
[Intel XE#1885]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1885
[Intel XE#1948]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1948
[Intel XE#1999]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1999
[Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134
[Intel XE#2136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2136
[Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168
[Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
[Intel XE#2231]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2231
[Intel XE#2233]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2233
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
[Intel XE#2245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2245
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
[Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
[Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2323
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
[Intel XE#2333]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2333
[Intel XE#2340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2340
[Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
[Intel XE#2351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2351
[Intel XE#2352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2352
[Intel XE#2360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2360
[Intel XE#2370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2370
[Intel XE#2372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2372
[Intel XE#2375]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2375
[Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
[Intel XE#2385]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2385
[Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
[Intel XE#2391]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2391
[Intel XE#2392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2392
[Intel XE#2393]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2393
[Intel XE#2414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2414
[Intel XE#2423]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2423
[Intel XE#2425]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2425
[Intel XE#2446]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2446
[Intel XE#2450]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2450
[Intel XE#2459]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2459
[Intel XE#2486]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2486
[Intel XE#2493]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2493
[Intel XE#2499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2499
[Intel XE#2501]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2501
[Intel XE#2502]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2502
[Intel XE#2504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2504
[Intel XE#2541]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2541
[Intel XE#2550]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2550
[Intel XE#2571]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2571
[Intel XE#2596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2596
[Intel XE#2625]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2625
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
[Intel XE#2715]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2715
[Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724
[Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
[Intel XE#2849]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2849
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#2882]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2882
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
[Intel XE#2905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2905
[Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
[Intel XE#2925]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2925
[Intel XE#2927]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2927
[Intel XE#2934]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2934
[Intel XE#2938]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2938
[Intel XE#3007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3007
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
[Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
[Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
[Intel XE#3124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3124
[Intel XE#314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/314
[Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
[Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
[Intel XE#3226]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3226
[Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323
[Intel XE#3278]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3278
[Intel XE#330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/330
[Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321
[Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
[Intel XE#3383]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3383
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#346]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/346
[Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
[Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
[Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#3719]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3719
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#3767]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3767
[Intel XE#3862]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3862
[Intel XE#3889]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3889
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#4045]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4045
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/512
[Intel XE#579]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/579
[Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584
[Intel XE#607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/607
[Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
[Intel XE#616]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/616
[Intel XE#619]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/619
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/658
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#701]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/701
[Intel XE#702]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/702
[Intel XE#718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/718
[Intel XE#756]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/756
[Intel XE#776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/776
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
[Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
[Intel XE#873]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/873
[Intel XE#886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/886
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
[Intel XE#977]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/977
[i915#2575]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2575
Build changes
-------------
* IGT: IGT_8199 -> IGTPW_12470
* Linux: xe-2514-4d9c78b35c395ed49796502224f3a421b0ce65ef -> xe-2516-fb87b4e061d1844beaca66c8446cfcf60db99a23
IGTPW_12470: 7f19312a42cdf84cc7517e0f2f9e01a37be7e9fd @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8199: 8df1895672949617992cddbc33c5d683865879e8 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-2514-4d9c78b35c395ed49796502224f3a421b0ce65ef: 4d9c78b35c395ed49796502224f3a421b0ce65ef
xe-2516-fb87b4e061d1844beaca66c8446cfcf60db99a23: fb87b4e061d1844beaca66c8446cfcf60db99a23
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_12470/index.html
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^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH i-g-t 1/4] lib/xe/xe_sriov_provisioning: Add scheduling attributes accessors
2025-01-20 20:34 ` [PATCH i-g-t 1/4] lib/xe/xe_sriov_provisioning: Add scheduling attributes accessors Marcin Bernatowicz
@ 2025-01-29 14:07 ` Laguna, Lukasz
0 siblings, 0 replies; 12+ messages in thread
From: Laguna, Lukasz @ 2025-01-29 14:07 UTC (permalink / raw)
To: Marcin Bernatowicz, igt-dev
Cc: Adam Miszczak, Jakub Kolakowski, Michał Wajdeczko,
Michał Winiarski, Narasimha C V, Piotr Piórkowski,
Satyanarayana K V P, Tomasz Lis
[-- Attachment #1: Type: text/plain, Size: 18844 bytes --]
On 1/20/2025 21:34, Marcin Bernatowicz wrote:
> Add helper functions to get and set SR-IOV provisioning scheduling
> attributes. These functions provide an interface for accessing
> provisioning attributes such as execution quantum, preemption timeout,
> schedule if idle policy, schedule priority, and engine reset policy.
>
> Include both returning and asserting versions to handle errors
> appropriately.
>
> Signed-off-by: Marcin Bernatowicz<marcin.bernatowicz@linux.intel.com>
> Cc: Adam Miszczak<adam.miszczak@linux.intel.com>
> Cc: Jakub Kolakowski<jakub1.kolakowski@intel.com>
> Cc: Lukasz Laguna<lukasz.laguna@intel.com>
> Cc: Michał Wajdeczko<michal.wajdeczko@intel.com>
> Cc: Michał Winiarski<michal.winiarski@intel.com>
> Cc: Narasimha C V<narasimha.c.v@intel.com>
> Cc: Piotr Piórkowski<piotr.piorkowski@intel.com>
> Cc: Satyanarayana K V P<satyanarayana.k.v.p@intel.com>
> Cc: Tomasz Lis<tomasz.lis@intel.com>
> ---
> lib/xe/xe_sriov_provisioning.c | 369 ++++++++++++++++++++++++++++++++-
> lib/xe/xe_sriov_provisioning.h | 53 +++++
> 2 files changed, 421 insertions(+), 1 deletion(-)
>
> diff --git a/lib/xe/xe_sriov_provisioning.c b/lib/xe/xe_sriov_provisioning.c
> index 22035ffd8..4e3fbaae2 100644
> --- a/lib/xe/xe_sriov_provisioning.c
> +++ b/lib/xe/xe_sriov_provisioning.c
> @@ -6,10 +6,11 @@
> #include <errno.h>
>
> #include "igt_core.h"
> +#include "igt_sriov_device.h"
> #include "intel_chipset.h"
> #include "linux_scaffold.h"
> -#include "xe/xe_mmio.h"
> #include "xe/xe_query.h"
> +#include "xe/xe_mmio.h"
> #include "xe/xe_sriov_debugfs.h"
> #include "xe/xe_sriov_provisioning.h"
>
> @@ -296,3 +297,369 @@ bool xe_sriov_is_shared_res_provisionable(int pf, enum xe_sriov_shared_res res,
>
> return true;
> }
> +
> +/**
> + * __xe_sriov_get_exec_quantum_ms - Read the execution quantum in milliseconds for a given VF
> + * @pf: PF device file descriptor
> + * @vf_num: VF number (1-based) or 0 for PF
> + * @gt_num: GT number
> + * @value: Pointer to store the read value
> + *
> + * Reads the execution quantum in milliseconds for the given PF device @pf,
> + * VF number @vf_num on GT @gt_num.
> + *
> + * Return: 0 on success, negative error code on failure.
> + */
> +int __xe_sriov_get_exec_quantum_ms(int pf, unsigned int vf_num,
> + unsigned int gt_num, uint32_t *value)
> +{
> + return __xe_sriov_pf_debugfs_get_u32(pf, vf_num, gt_num, "exec_quantum_ms", value);
> +}
> +
> +/**
> + * xe_sriov_get_exec_quantum_ms - Get the execution quantum in milliseconds for a given VF
> + * @pf: PF device file descriptor
> + * @vf_num: VF number (1-based) or 0 for PF
> + * @gt_num: GT number
> + *
> + * A throwing version of __xe_sriov_get_exec_quantum_ms().
> + * Instead of returning an error code, it returns the value read and
> + * asserts in case of an error.
> + *
> + * Return: Execution quantum in milliseconds assigned to a given VF. Asserts in case of failure.
> + */
> +uint32_t xe_sriov_get_exec_quantum_ms(int pf, unsigned int vf_num,
> + unsigned int gt_num)
> +{
> + uint32_t value;
> +
> + igt_fail_on(__xe_sriov_get_exec_quantum_ms(pf, vf_num, gt_num, &value));
> +
> + return value;
> +}
> +
> +/**
> + * __xe_sriov_set_exec_quantum_ms - Set the execution quantum in milliseconds for a given VF
> + * @pf: PF device file descriptor
> + * @vf_num: VF number (1-based) or 0 for PF
> + * @gt_num: GT number
> + * @value: Value to set
> + *
> + * Sets the execution quantum in milliseconds for the given PF device @pf,
> + * VF number @vf_num on GT @gt_num.
> + *
> + * Return: 0 on success, negative error code on failure.
> + */
> +int __xe_sriov_set_exec_quantum_ms(int pf, unsigned int vf_num,
> + unsigned int gt_num, uint32_t value)
> +{
> + return __xe_sriov_pf_debugfs_set_u32(pf, vf_num, gt_num, "exec_quantum_ms", value);
> +}
> +
> +/**
> + * xe_sriov_set_exec_quantum_ms - Set the execution quantum in milliseconds for a given VF
> + * @pf: PF device file descriptor
> + * @vf_num: VF number (1-based) or 0 for PF
> + * @gt_num: GT number
> + * @value: Value to set
> + *
> + * A throwing version of __xe_sriov_set_exec_quantum_ms().
> + * Instead of returning an error code, it asserts in case of an error.
> + */
> +void xe_sriov_set_exec_quantum_ms(int pf, unsigned int vf_num,
> + unsigned int gt_num, uint32_t value)
> +{
> + igt_fail_on(__xe_sriov_set_exec_quantum_ms(pf, vf_num, gt_num, value));
> +}
> +
> +/**
> + * __xe_sriov_get_preempt_timeout_us - Get the preemption timeout in microseconds for a given VF
> + * @pf: PF device file descriptor
> + * @vf_num: VF number (1-based) or 0 for PF
> + * @gt_num: GT number
> + * @value: Pointer to store the read value
> + *
> + * Reads the preemption timeout in microseconds for the given PF device @pf,
> + * VF number @vf_num on GT @gt_num.
> + *
> + * Return: 0 on success, negative error code on failure.
> + */
> +int __xe_sriov_get_preempt_timeout_us(int pf, unsigned int vf_num,
> + unsigned int gt_num, uint32_t *value)
> +{
> + return __xe_sriov_pf_debugfs_get_u32(pf, vf_num, gt_num, "preempt_timeout_us", value);
> +}
> +
> +/**
> + * xe_sriov_get_preempt_timeout_us - Get the preemption timeout in microseconds for a given VF
> + * @pf: PF device file descriptor
> + * @vf_num: VF number (1-based) or 0 for PF
> + * @gt_num: GT number
> + *
> + * A throwing version of __xe_sriov_get_preempt_timeout_us().
> + * Instead of returning an error code, it returns the value read and
> + * asserts in case of an error.
> + *
> + * Return: Preemption timeout in microseconds assigned to a given VF.
> + * Asserts in case of failure.
> + */
> +uint32_t xe_sriov_get_preempt_timeout_us(int pf, unsigned int vf_num,
> + unsigned int gt_num)
> +{
> + uint32_t value;
> +
> + igt_fail_on(__xe_sriov_get_preempt_timeout_us(pf, vf_num, gt_num, &value));
> +
> + return value;
> +}
> +
> +/**
> + * __xe_sriov_set_preempt_timeout_us - Set the preemption timeout in microseconds for a given VF
> + * @pf: PF device file descriptor
> + * @vf_num: VF number (1-based) or 0 for PF
> + * @gt_num: GT number
> + * @value: Value to set
> + *
> + * Sets the preemption timeout in microseconds for the given PF device @pf,
> + * VF number @vf_num on GT @gt_num.
> + *
> + * Return: 0 on success, negative error code on failure.
> + */
> +int __xe_sriov_set_preempt_timeout_us(int pf, unsigned int vf_num,
> + unsigned int gt_num, uint32_t value)
> +{
> + return __xe_sriov_pf_debugfs_set_u32(pf, vf_num, gt_num, "preempt_timeout_us", value);
> +}
> +
> +/**
> + * xe_sriov_set_preempt_timeout_us - Set the preemption timeout in microseconds for a given VF
> + * @pf: PF device file descriptor
> + * @vf_num: VF number (1-based) or 0 for PF
> + * @gt_num: GT number
> + * @value: Value to set
> + *
> + * A throwing version of __xe_sriov_set_preempt_timeout_us().
> + * Instead of returning an error code, it asserts in case of an error.
> + */
> +void xe_sriov_set_preempt_timeout_us(int pf, unsigned int vf_num,
> + unsigned int gt_num, uint32_t value)
> +{
> + igt_fail_on(__xe_sriov_set_preempt_timeout_us(pf, vf_num, gt_num, value));
> +}
> +
> +/**
> + * __xe_sriov_get_engine_reset - Get the engine reset policy status for a given GT
> + * @pf: PF device file descriptor
> + * @gt_num: GT number
> + * @value: Pointer to store the read engine reset policy status
> + *
> + * Reads the engine reset status for the given PF device @pf on GT @gt_num.
> + *
> + * Return: 0 on success, negative error code on failure.
> + */
> +int __xe_sriov_get_engine_reset(int pf, unsigned int gt_num, bool *value)
> +{
> + return __xe_sriov_pf_debugfs_get_boolean(pf, 0, gt_num, "reset_engine", value);
> +}
> +
> +/**
> + * xe_sriov_get_engine_reset - Get the engine reset policy status for a given GT
> + * @pf: PF device file descriptor
> + * @gt_num: GT number
> + *
> + * A throwing version of __xe_sriov_get_engine_reset().
> + * Instead of returning an error code, it returns the engine reset status
> + * and asserts in case of an error.
> + *
> + * Return: The engine reset status for the given GT.
> + * Asserts in case of failure.
> + */
> +bool xe_sriov_get_engine_reset(int pf, unsigned int gt_num)
> +{
> + bool value;
> +
> + igt_fail_on(__xe_sriov_get_engine_reset(pf, gt_num, &value));
> +
> + return value;
> +}
> +
> +/**
> + * __xe_sriov_set_engine_reset - Set the engine reset policy for a given GT
> + * @pf: PF device file descriptor
> + * @gt_num: GT number
> + * @value: Engine reset policy status to set
> + *
> + * Sets the engine reset policy for the given PF device @pf on GT @gt_num.
> + *
> + * Return: 0 on success, negative error code on failure.
> + */
> +int __xe_sriov_set_engine_reset(int pf, unsigned int gt_num, bool value)
> +{
> + return __xe_sriov_pf_debugfs_set_boolean(pf, 0, gt_num, "reset_engine", value);
> +}
> +
> +/**
> + * xe_sriov_set_engine_reset - Set the engine reset policy for a given GT
> + * @pf: PF device file descriptor
> + * @gt_num: GT number
> + * @value: Engine reset policy status to set
> + *
> + * A throwing version of __xe_sriov_set_engine_reset().
> + * Instead of returning an error code, it asserts in case of an error.
> + */
> +void xe_sriov_set_engine_reset(int pf, unsigned int gt_num, bool value)
> +{
> + igt_fail_on(__xe_sriov_set_engine_reset(pf, gt_num, value));
> +}
> +
> +/**
> + * __xe_sriov_get_sched_if_idle - Get the scheduling if idle policy for a given GT
> + * @pf: PF device file descriptor
> + * @gt_num: GT number
> + * @value: Pointer to store the read scheduling if idle policy status
> + *
> + * Reads the scheduling if idle policy status for the given PF device @pf on GT @gt_num.
> + *
> + * Return: 0 on success, negative error code on failure.
> + */
> +int __xe_sriov_get_sched_if_idle(int pf, unsigned int gt_num, bool *value)
> +{
> + return __xe_sriov_pf_debugfs_get_boolean(pf, 0, gt_num, "sched_if_idle", value);
> +}
> +
> +/**
> + * xe_sriov_get_sched_if_idle - Get the scheduling if idle policy for a given GT
> + * @pf: PF device file descriptor
> + * @gt_num: GT number
> + *
> + * A throwing version of __xe_sriov_get_sched_if_idle().
> + * Instead of returning an error code, it returns the scheduling if idle policy status
> + * and asserts in case of an error.
> + *
> + * Return: The scheduling if idle status for the given GT.
> + * Asserts in case of failure.
> + */
> +bool xe_sriov_get_sched_if_idle(int pf, unsigned int gt_num)
> +{
> + bool value;
> +
> + igt_fail_on(__xe_sriov_get_sched_if_idle(pf, gt_num, &value));
> +
> + return value;
> +}
> +
> +/**
> + * __xe_sriov_set_sched_if_idle - Set the scheduling if idle policy status for a given GT
> + * @pf: PF device file descriptor
> + * @gt_num: GT number
> + * @value: Scheduling if idle policy status to set
> + *
> + * Sets the scheduling if idle policy status for the given PF device @pf on GT @gt_num.
> + *
> + * Return: 0 on success, negative error code on failure.
> + */
> +int __xe_sriov_set_sched_if_idle(int pf, unsigned int gt_num, bool value)
> +{
> + return __xe_sriov_pf_debugfs_set_boolean(pf, 0, gt_num, "sched_if_idle", value);
> +}
> +
> +/**
> + * xe_sriov_set_sched_if_idle - Set the scheduling if idle status policy for a given GT
> + * @pf: PF device file descriptor
> + * @gt_num: GT number
> + * @value: Scheduling if idle policy status to set
> + *
> + * A throwing version of __xe_sriov_set_sched_if_idle().
> + * Instead of returning an error code, it asserts in case of an error.
> + */
> +void xe_sriov_set_sched_if_idle(int pf, unsigned int gt_num, bool value)
> +{
> + igt_fail_on(__xe_sriov_set_sched_if_idle(pf, gt_num, value));
> +}
> +
> +/**
> + * __xe_sriov_get_sched_priority - Get the scheduling priority for a given VF
> + * @pf: PF device file descriptor
> + * @vf_num: VF number (1-based) or 0 for PF
> + * @gt_num: GT number
> + * @value: Pointer to store the read scheduling priority
> + *
> + * Reads the scheduling priority for the given PF device @pf,
> + * VF number @vf_num on GT @gt_num.
> + *
> + * Return: 0 on success, negative error code on failure.
> + */
> +int __xe_sriov_get_sched_priority(int pf, unsigned int vf_num,
> + unsigned int gt_num,
> + enum xe_sriov_sched_priority *value)
> +{
> + uint32_t priority;
> + int ret;
> +
> + ret = __xe_sriov_pf_debugfs_get_u32(pf, vf_num, gt_num, "sched_priority", &priority);
> + if (igt_debug_on_f(ret, "Failed to read sched_priority attribute for GT%u\n", gt_num))
nit: no info about VF number? btw. what is so special about this one
that you decided to add debug message?
> + return ret;
> +
> + if (priority <= XE_SRIOV_SCHED_PRIORITY_HIGH) {
> + *value = (enum xe_sriov_sched_priority)priority;
> + return 0;
> + }
> +
> + return -ERANGE;
> +}
> +
> +/**
> + * xe_sriov_get_sched_priority - Get the scheduling priority for a given VF
> + * @pf: PF device file descriptor
> + * @vf_num: VF number (1-based) or 0 for PF
> + * @gt_num: GT number
> + *
> + * A throwing version of __xe_sriov_get_sched_priority().
> + * Instead of returning an error code, it returns the scheduling priority
> + * and asserts in case of an error.
> + *
> + * Return: The scheduling priority for the given VF and GT.
> + * Asserts in case of failure.
> + */
> +enum xe_sriov_sched_priority
> +xe_sriov_get_sched_priority(int pf, unsigned int vf_num, unsigned int gt_num)
> +{
> + enum xe_sriov_sched_priority priority;
> +
> + igt_fail_on(__xe_sriov_get_sched_priority(pf, vf_num, gt_num, &priority));
> +
> + return priority;
> +}
> +
> +/**
> + * __xe_sriov_set_sched_priority - Set the scheduling priority for a given VF
> + * @pf: PF device file descriptor
> + * @vf_num: VF number (1-based) or 0 for PF
> + * @gt_num: GT number
> + * @value: Scheduling priority to set (enum xe_sriov_sched_priority)
> + *
> + * Sets the scheduling priority for the given PF device @pf, VF number @vf_num on GT @gt_num.
> + *
> + * Return: 0 on success, negative error code on failure.
> + */
> +int __xe_sriov_set_sched_priority(int pf, unsigned int vf_num, unsigned int gt_num,
> + enum xe_sriov_sched_priority value)
> +{
> + return __xe_sriov_pf_debugfs_set_u32(pf, vf_num, gt_num, "sched_priority", value);
> +}
> +
> +/**
> + * xe_sriov_set_sched_priority - Set the scheduling priority for a given VF
> + * @pf: PF device file descriptor
> + * @vf_num: VF number (1-based) or 0 for PF
> + * @gt_num: GT number
> + * @value: Scheduling priority to set (enum xe_sriov_sched_priority)
> + *
> + * A throwing version of __xe_sriov_set_sched_priority().
> + * Instead of returning an error code, it asserts in case of an error.
> + */
> +void xe_sriov_set_sched_priority(int pf, unsigned int vf_num, unsigned int gt_num,
> + enum xe_sriov_sched_priority value)
> +{
> + igt_fail_on(__xe_sriov_set_sched_priority(pf, vf_num, gt_num, value));
> +}
> diff --git a/lib/xe/xe_sriov_provisioning.h b/lib/xe/xe_sriov_provisioning.h
> index b4300ec2e..b22f96d88 100644
> --- a/lib/xe/xe_sriov_provisioning.h
> +++ b/lib/xe/xe_sriov_provisioning.h
> @@ -55,6 +55,26 @@ enum xe_sriov_shared_res {
> for ((res) = 0; (res) < XE_SRIOV_SHARED_RES_NUM; (res)++) \
> for_if(xe_sriov_is_shared_res_provisionable((pf), (res), (gt)))
>
> +/**
> + * enum xe_sriov_sched_priority - SR-IOV scheduling priorities
> + * @XE_SRIOV_SCHED_PRIORITY_LOW: Schedule VF only if it has active work and
> + * VF-State is VF_STATE_RUNNING. This is the
> + * default value.
> + * @XE_SRIOV_SCHED_PRIORITY_NORMAL: Schedule VF always, irrespective of whether
> + * it has work or not, as long as VF-State is
> + * not VF_STATE_DISABLED. Once scheduled, VF
> + * will run for its entire execution quantum.
> + * @XE_SRIOV_SCHED_PRIORITY_HIGH: Schedule VF in the next time-slice after the
> + * current active time-slice completes. VF is
> + * scheduled only if it has work and VF-State is
> + * VF_STATE_RUNNING.
> + */
> +enum xe_sriov_sched_priority {
> + XE_SRIOV_SCHED_PRIORITY_LOW,
> + XE_SRIOV_SCHED_PRIORITY_NORMAL,
> + XE_SRIOV_SCHED_PRIORITY_HIGH
> +};
> +
> /**
> * struct xe_sriov_provisioned_range - Provisioned range for a Virtual Function (VF)
> * @vf_id: The ID of the VF
> @@ -89,5 +109,38 @@ int __xe_sriov_pf_set_shared_res_attr(int pf, enum xe_sriov_shared_res res,
> void xe_sriov_pf_set_shared_res_attr(int pf, enum xe_sriov_shared_res res,
> unsigned int vf_num, unsigned int gt_num,
> uint64_t value);
> +int __xe_sriov_get_exec_quantum_ms(int pf, unsigned int vf_num,
> + unsigned int gt_num, uint32_t *value);
> +uint32_t xe_sriov_get_exec_quantum_ms(int pf, unsigned int vf_num,
> + unsigned int gt_num);
> +int __xe_sriov_set_exec_quantum_ms(int pf, unsigned int vf_num,
> + unsigned int gt_num, uint32_t value);
> +void xe_sriov_set_exec_quantum_ms(int pf, unsigned int vf_num,
> + unsigned int gt_num, uint32_t value);
> +int __xe_sriov_get_preempt_timeout_us(int pf, unsigned int vf_num,
> + unsigned int gt_num, uint32_t *value);
> +uint32_t xe_sriov_get_preempt_timeout_us(int pf, unsigned int vf_num,
> + unsigned int gt_num);
> +int __xe_sriov_set_preempt_timeout_us(int pf, unsigned int vf_num,
> + unsigned int gt_num, uint32_t value);
> +void xe_sriov_set_preempt_timeout_us(int pf, unsigned int vf_num,
> + unsigned int gt_num, uint32_t value);
> +int __xe_sriov_get_engine_reset(int pf, unsigned int gt_num, bool *value);
> +bool xe_sriov_get_engine_reset(int pf, unsigned int gt_num);
> +int __xe_sriov_set_engine_reset(int pf, unsigned int gt_num, bool value);
> +void xe_sriov_set_engine_reset(int pf, unsigned int gt_num, bool value);
> +int __xe_sriov_get_sched_if_idle(int pf, unsigned int gt_num, bool *value);
> +bool xe_sriov_get_sched_if_idle(int pf, unsigned int gt_num);
> +int __xe_sriov_set_sched_if_idle(int pf, unsigned int gt_num, bool value);
> +void xe_sriov_set_sched_if_idle(int pf, unsigned int gt_num, bool value);
> +int __xe_sriov_get_sched_priority(int pf, unsigned int vf_num,
> + unsigned int gt_num,
> + enum xe_sriov_sched_priority *value);
> +enum xe_sriov_sched_priority xe_sriov_get_sched_priority(int pf, unsigned int vf_num,
> + unsigned int gt_num);
> +int __xe_sriov_set_sched_priority(int pf, unsigned int vf_num, unsigned int gt_num,
> + enum xe_sriov_sched_priority value);
> +void xe_sriov_set_sched_priority(int pf, unsigned int vf_num, unsigned int gt_num,
> + enum xe_sriov_sched_priority value);
>
> #endif /* __XE_SRIOV_PROVISIONING_H__ */
One nit, but overall looks good:
Reviewed-by: Lukasz Laguna <lukasz.laguna@intel.com>
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^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH i-g-t 2/4] lib/xe/xe_sriov_provisioning: Add helper to check default scheduling attributes
2025-01-20 20:34 ` [PATCH i-g-t 2/4] lib/xe/xe_sriov_provisioning: Add helper to check default scheduling attributes Marcin Bernatowicz
@ 2025-01-29 14:14 ` Laguna, Lukasz
0 siblings, 0 replies; 12+ messages in thread
From: Laguna, Lukasz @ 2025-01-29 14:14 UTC (permalink / raw)
To: Marcin Bernatowicz, igt-dev
Cc: Adam Miszczak, Jakub Kolakowski, Michał Wajdeczko,
Michał Winiarski, Narasimha C V, Piotr Piórkowski,
Satyanarayana K V P, Tomasz Lis
[-- Attachment #1: Type: text/plain, Size: 3983 bytes --]
On 1/20/2025 21:34, Marcin Bernatowicz wrote:
> Introduce a function to validate default SR-IOV scheduling attributes
> for VFs and PF. This function skips the test if non-default attributes
> are detected. The default attributes verified include:
>
> - exec_quantum_ms set to 0 (infinite execution quantum)
> - preempt_timeout_us set to 0 (infinite preemption timeout)
> - sched_if_idle set to false
> - reset_engine set to false
> - sched_priority set to XE_SRIOV_SCHED_PRIORITY_LOW
>
> Signed-off-by: Marcin Bernatowicz<marcin.bernatowicz@linux.intel.com>
> Cc: Adam Miszczak<adam.miszczak@linux.intel.com>
> Cc: Jakub Kolakowski<jakub1.kolakowski@intel.com>
> Cc: Lukasz Laguna<lukasz.laguna@intel.com>
> Cc: Michał Wajdeczko<michal.wajdeczko@intel.com>
> Cc: Michał Winiarski<michal.winiarski@intel.com>
> Cc: Narasimha C V<narasimha.c.v@intel.com>
> Cc: Piotr Piórkowski<piotr.piorkowski@intel.com>
> Cc: Satyanarayana K V P<satyanarayana.k.v.p@intel.com>
> Cc: Tomasz Lis<tomasz.lis@intel.com>
> ---
> lib/xe/xe_sriov_provisioning.c | 42 ++++++++++++++++++++++++++++++++++
> lib/xe/xe_sriov_provisioning.h | 1 +
> 2 files changed, 43 insertions(+)
>
> diff --git a/lib/xe/xe_sriov_provisioning.c b/lib/xe/xe_sriov_provisioning.c
> index 4e3fbaae2..da580144d 100644
> --- a/lib/xe/xe_sriov_provisioning.c
> +++ b/lib/xe/xe_sriov_provisioning.c
> @@ -663,3 +663,45 @@ void xe_sriov_set_sched_priority(int pf, unsigned int vf_num, unsigned int gt_nu
> {
> igt_fail_on(__xe_sriov_set_sched_priority(pf, vf_num, gt_num, value));
> }
> +
> +/**
> + * xe_sriov_require_default_scheduling_attributes - Ensure default SR-IOV scheduling attributes
> + * @pf_fd: PF device file descriptor
> + *
> + * Skips the current test if non-default SR-IOV scheduling attributes are set.
> + *
> + * Default scheduling attributes are as follows for each VF and PF:
> + * - exec_quantum_ms equals zero (meaning infinity)
> + * - preempt_timeout_us equals zero (meaning infinity)
> + * - sched_if_idle equals false
> + * - reset_engine equals false
> + * - sched_priority equals XE_SRIOV_SCHED_PRIORITY_LOW
> + */
> +void xe_sriov_require_default_scheduling_attributes(int pf)
> +{
> + unsigned int totalvfs = igt_sriov_get_total_vfs(pf);
> + enum xe_sriov_sched_priority sched_priority;
> + bool sched_if_idle, reset_engine;
> + uint32_t eq, pt;
> + unsigned int gt;
> +
> + xe_for_each_gt(pf, gt) {
> + igt_skip_on(__xe_sriov_get_sched_if_idle(pf, gt, &sched_if_idle));
> + igt_require_f(!sched_if_idle, "sched_if_idle != false on gt%u\n", gt);
> + igt_skip_on(__xe_sriov_get_engine_reset(pf, gt, &reset_engine));
> + igt_require_f(!reset_engine, "reset_engine != false on gt%u\n", gt);
> +
> + for (unsigned int vf_num = 0; vf_num <= totalvfs; ++vf_num) {
> + igt_skip_on(__xe_sriov_get_exec_quantum_ms(pf, vf_num, gt, &eq));
> + igt_require_f(eq == 0, "exec_quantum_ms != 0 on gt%u/VF%u\n", gt, vf_num);
> +
> + igt_skip_on(__xe_sriov_get_preempt_timeout_us(pf, vf_num, gt, &pt));
> + igt_require_f(pt == 0, "preempt_timeout_us != 0 on gt%u/VF%u\n",
> + gt, vf_num);
> +
> + igt_skip_on(__xe_sriov_get_sched_priority(pf, vf_num, gt, &sched_priority));
> + igt_require_f(sched_priority == XE_SRIOV_SCHED_PRIORITY_LOW,
> + "sched_priority != LOW on gt%u/VF%u\n", gt, vf_num);
> + }
> + }
> +}
> diff --git a/lib/xe/xe_sriov_provisioning.h b/lib/xe/xe_sriov_provisioning.h
> index b22f96d88..4382f528f 100644
> --- a/lib/xe/xe_sriov_provisioning.h
> +++ b/lib/xe/xe_sriov_provisioning.h
> @@ -142,5 +142,6 @@ int __xe_sriov_set_sched_priority(int pf, unsigned int vf_num, unsigned int gt_n
> enum xe_sriov_sched_priority value);
> void xe_sriov_set_sched_priority(int pf, unsigned int vf_num, unsigned int gt_num,
> enum xe_sriov_sched_priority value);
> +void xe_sriov_require_default_scheduling_attributes(int pf);
>
> #endif /* __XE_SRIOV_PROVISIONING_H__ */
LGTM,
Reviewed-by: Lukasz Laguna <lukasz.laguna@intel.com>
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^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH i-g-t 3/4] tests/xe_sriov_scheduling: VF equal-throughput validation
2025-01-20 20:34 ` [PATCH i-g-t 3/4] tests/xe_sriov_scheduling: VF equal-throughput validation Marcin Bernatowicz
@ 2025-01-30 15:40 ` Laguna, Lukasz
0 siblings, 0 replies; 12+ messages in thread
From: Laguna, Lukasz @ 2025-01-30 15:40 UTC (permalink / raw)
To: Marcin Bernatowicz, igt-dev
Cc: Adam Miszczak, Jakub Kolakowski, Michał Wajdeczko,
Michał Winiarski, Narasimha C V, Piotr Piórkowski,
Satyanarayana K V P, Tomasz Lis
On 1/20/2025 21:34, Marcin Bernatowicz wrote:
> Implement equal-throughput validation for VFs (PF is treated as VF0)
> with identical workloads and scheduling settings.
> Scheduling settings are adjusted to consider execution quantum, job
> duration, and the number of VFs, while adhering to timeout constraints
> and aiming for a sufficient number of job repeats. This approach
> balances overall test duration with accuracy.
>
> Signed-off-by: Marcin Bernatowicz <marcin.bernatowicz@linux.intel.com>
> Cc: Adam Miszczak <adam.miszczak@linux.intel.com>
> Cc: Jakub Kolakowski <jakub1.kolakowski@intel.com>
> Cc: Lukasz Laguna <lukasz.laguna@intel.com>
> Cc: Michał Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Michał Winiarski <michal.winiarski@intel.com>
> Cc: Narasimha C V <narasimha.c.v@intel.com>
> Cc: Piotr Piórkowski <piotr.piorkowski@intel.com>
> Cc: Satyanarayana K V P <satyanarayana.k.v.p@intel.com>
> Cc: Tomasz Lis <tomasz.lis@intel.com>
> ---
> tests/intel/xe_sriov_scheduling.c | 698 ++++++++++++++++++++++++++++++
> tests/meson.build | 1 +
> 2 files changed, 699 insertions(+)
> create mode 100644 tests/intel/xe_sriov_scheduling.c
>
> diff --git a/tests/intel/xe_sriov_scheduling.c b/tests/intel/xe_sriov_scheduling.c
> new file mode 100644
> index 000000000..20ec15b22
> --- /dev/null
> +++ b/tests/intel/xe_sriov_scheduling.c
> @@ -0,0 +1,698 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2024 Intel Corporation
2025
> + */
> +#include "igt.h"
> +#include "igt_sriov_device.h"
> +#include "igt_syncobj.h"
> +#include "xe_drm.h"
> +#include "xe/xe_ioctl.h"
> +#include "xe/xe_spin.h"
> +#include "xe/xe_sriov_provisioning.h"
> +
> +/**
> + * TEST: Tests for SR-IOV scheduling parameters.
> + * Category: Core
> + * Mega feature: SR-IOV
> + * Sub-category: scheduling
> + * Functionality: vGPU profiles scheduling parameters
> + * Run type: FULL
> + * Description: Verify the occurrence of engine resets
> + * when non-preemptible workloads surpass the combined
> + * duration of execution quantum and preemption timeout.
> + */
Description doesn't seem to be accurate.
> +
> +enum subm_sync_method { SYNC_NONE, SYNC_BARRIER };
> +
> +struct subm_opts {
> + enum subm_sync_method sync_method;
> + uint32_t exec_quantum_ms;
> + uint32_t preempt_timeout_us;
> + double outlier_treshold;
> +};
> +
> +struct subm_work_desc {
> + uint64_t duration_ms;
> + bool preempt;
> + unsigned int repeats;
> +};
> +
> +struct subm_stats {
> + igt_stats_t samples;
> + uint64_t start_timestamp;
> + uint64_t end_timestamp;
> + unsigned int num_early_finish;
> + unsigned int concurrent_execs;
> + double concurrent_rate;
> + double concurrent_mean;
> +};
> +
> +struct subm {
> + char id[32];
> + int fd;
> + int vf_num;
> + struct subm_work_desc work;
> + uint32_t expected_ticks;
> + uint64_t addr;
> + uint32_t vm;
> + struct drm_xe_engine_class_instance hwe;
> + uint32_t exec_queue_id;
> + uint32_t bo;
> + size_t bo_size;
> + struct xe_spin *spin;
> + struct drm_xe_sync sync[1];
> + struct drm_xe_exec exec;
> +};
> +
> +struct subm_thread_data {
> + struct subm subm;
> + struct subm_stats stats;
> + const struct subm_opts *opts;
> + pthread_t thread;
> + pthread_barrier_t *barrier;
> +};
> +
> +struct subm_set {
> + struct subm_thread_data *data;
> + int ndata;
> + enum subm_sync_method sync_method;
> + pthread_barrier_t barrier;
> +};
> +
> +static void subm_init(struct subm *s, int fd, int vf_num, uint64_t addr,
> + struct drm_xe_engine_class_instance hwe)
> +{
> + memset(s, 0, sizeof(*s));
> + s->fd = fd;
> + s->vf_num = vf_num;
> + s->hwe = hwe;
> + snprintf(s->id, sizeof(s->id), "VF%d %d:%d:%d", vf_num,
> + hwe.engine_class, hwe.engine_instance, hwe.gt_id);
> + s->addr = addr ? addr : 0x1a0000;
> + s->vm = xe_vm_create(s->fd, 0, 0);
> + s->exec_queue_id = xe_exec_queue_create(s->fd, s->vm, &s->hwe, 0);
> + s->bo_size = ALIGN(sizeof(struct xe_spin) + xe_cs_prefetch_size(s->fd),
> + xe_get_default_alignment(s->fd));
> + s->bo = xe_bo_create(s->fd, s->vm, s->bo_size,
> + vram_if_possible(fd, s->hwe.gt_id),
> + DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
> + s->spin = xe_bo_map(s->fd, s->bo, s->bo_size);
> + xe_vm_bind_sync(s->fd, s->vm, s->bo, 0, s->addr, s->bo_size);
> + /* out fence */
> + s->sync[0].type = DRM_XE_SYNC_TYPE_SYNCOBJ;
> + s->sync[0].flags = DRM_XE_SYNC_FLAG_SIGNAL;
> + s->sync[0].handle = syncobj_create(s->fd, 0);
> + s->exec.num_syncs = 1;
> + s->exec.syncs = to_user_pointer(&s->sync[0]);
> + s->exec.num_batch_buffer = 1;
> + s->exec.exec_queue_id = s->exec_queue_id;
> + s->exec.address = s->addr;
> +}
> +
> +static void subm_fini(struct subm *s)
> +{
> + xe_vm_unbind_sync(s->fd, s->vm, 0, s->addr, s->bo_size);
> + gem_munmap(s->spin, s->bo_size);
> + gem_close(s->fd, s->bo);
> + xe_exec_queue_destroy(s->fd, s->exec_queue_id);
> + xe_vm_destroy(s->fd, s->vm);
> + syncobj_destroy(s->fd, s->sync[0].handle);
> +}
> +
> +static void subm_workload_init(struct subm *s, struct subm_work_desc *work)
> +{
> + s->work = *work;
> + s->expected_ticks = xe_spin_nsec_to_ticks(s->fd, s->hwe.gt_id,
> + s->work.duration_ms * 1000000);
> + xe_spin_init_opts(s->spin, .addr = s->addr, .preempt = s->work.preempt,
> + .ctx_ticks = s->expected_ticks);
> +}
> +
> +static void subm_wait(struct subm *s, uint64_t abs_timeout_nsec)
> +{
> + igt_assert(syncobj_wait(s->fd, &s->sync[0].handle, 1, abs_timeout_nsec,
> + 0, NULL));
> +}
> +
> +static void subm_exec(struct subm *s)
> +{
> + syncobj_reset(s->fd, &s->sync[0].handle, 1);
> + xe_exec(s->fd, &s->exec);
> +}
> +
> +static bool subm_is_work_complete(struct subm *s)
> +{
> + return s->expected_ticks <= ~s->spin->ticks_delta;
> +}
> +
> +static bool subm_is_exec_queue_banned(struct subm *s)
> +{
> + struct drm_xe_exec_queue_get_property args = {
> + .exec_queue_id = s->exec_queue_id,
> + .property = DRM_XE_EXEC_QUEUE_GET_PROPERTY_BAN,
> + };
> + int ret = igt_ioctl(s->fd, DRM_IOCTL_XE_EXEC_QUEUE_GET_PROPERTY, &args);
> +
> + return ret || args.value;
> +}
> +
> +static void subm_exec_loop(struct subm *s, struct subm_stats *stats,
> + const struct subm_opts *opts)
> +{
> + struct timespec tv;
> + unsigned int i;
> +
> + igt_gettime(&tv);
> + stats->start_timestamp =
> + tv.tv_sec * (uint64_t)NSEC_PER_SEC + tv.tv_nsec;
> + igt_debug("[%s] start_timestamp: %f\n", s->id, stats->start_timestamp * 1e-9);
> +
> + for (i = 0; i < s->work.repeats; ++i) {
> + igt_gettime(&tv);
> +
> + subm_exec(s);
> +
> + subm_wait(s, INT64_MAX);
> +
> + igt_stats_push(&stats->samples, igt_nsec_elapsed(&tv));
> +
> + if (!subm_is_work_complete(s)) {
> + stats->num_early_finish++;
> +
> + igt_debug("[%s] subm #%d early_finish=%u\n",
> + s->id, i, stats->num_early_finish);
> +
> + if (subm_is_exec_queue_banned(s))
> + break;
> + }
> + }
> +
> + igt_gettime(&tv);
> + stats->end_timestamp = tv.tv_sec * (uint64_t)NSEC_PER_SEC + tv.tv_nsec;
> + igt_debug("[%s] end_timestamp: %f\n", s->id, stats->end_timestamp * 1e-9);
> +}
> +
> +static void *subm_thread(void *thread_data)
> +{
> + struct subm_thread_data *td = thread_data;
> + struct timespec tv;
> +
> + igt_gettime(&tv);
> + igt_debug("[%s] thread started %ld.%ld\n", td->subm.id, tv.tv_sec,
> + tv.tv_nsec);
> +
> + if (td->barrier)
> + pthread_barrier_wait(td->barrier);
> +
> + subm_exec_loop(&td->subm, &td->stats, td->opts);
> +
> + return NULL;
> +}
> +
> +static void subm_set_dispatch_and_wait_threads(struct subm_set *set)
> +{
> + int i;
> +
> + for (i = 0; i < set->ndata; ++i)
> + igt_assert_eq(0, pthread_create(&set->data[i].thread, NULL,
> + subm_thread, &set->data[i]));
> +
> + for (i = 0; i < set->ndata; ++i)
> + pthread_join(set->data[i].thread, NULL);
> +}
> +
> +static void subm_set_alloc_data(struct subm_set *set, unsigned int ndata)
> +{
> + igt_assert(!set->data);
> + set->ndata = ndata;
> + set->data = calloc(set->ndata, sizeof(struct subm_thread_data));
> + igt_assert(set->data);
> +}
> +
> +static void subm_set_free_data(struct subm_set *set)
> +{
> + free(set->data);
> + set->data = NULL;
> + set->ndata = 0;
> +}
> +
> +static void subm_set_init_sync_method(struct subm_set *set, enum subm_sync_method sm)
> +{
> + set->sync_method = sm;
> + if (set->sync_method == SYNC_BARRIER)
> + pthread_barrier_init(&set->barrier, NULL, set->ndata);
> +}
> +
> +static void subm_set_fini(struct subm_set *set)
> +{
> + int i;
> +
> + if (!set->ndata)
> + return;
> +
> + for (i = 0; i < set->ndata; ++i) {
> + igt_stats_fini(&set->data[i].stats.samples);
> + subm_fini(&set->data[i].subm);
> + drm_close_driver(set->data[i].subm.fd);
> + }
> + subm_set_free_data(set);
> +
> + if (set->sync_method == SYNC_BARRIER)
> + pthread_barrier_destroy(&set->barrier);
> +}
> +
> +struct init_vf_ids_opts {
> + bool shuffle;
> + bool shuffle_pf;
> +};
> +
> +static void init_vf_ids(uint8_t *array, size_t n,
> + const struct init_vf_ids_opts *opts)
> +{
> + size_t i, j;
> +
> + if (!opts->shuffle_pf && n) {
> + array[0] = 0;
> + n -= 1;
> + array = array + 1;
> + }
> +
> + for (i = 0; i < n; i++) {
> + j = (opts->shuffle) ? rand() % (i + 1) : i;
> +
> + if (j != i)
> + array[i] = array[j];
> +
> + array[j] = i + (opts->shuffle_pf ? 0 : 1);
> + }
> +}
> +
> +struct vf_sched_params {
> + uint32_t exec_quantum_ms;
> + uint32_t preempt_timeout_us;
> +};
> +
> +static void set_vfs_scheduling_params(int pf_fd, int num_vfs,
> + const struct vf_sched_params *p)
> +{
> + unsigned int gt;
> +
> + xe_for_each_gt(pf_fd, gt) {
> + for (int vf = 0; vf <= num_vfs; ++vf) {
> + xe_sriov_set_exec_quantum_ms(pf_fd, vf, gt, p->exec_quantum_ms);
> + xe_sriov_set_preempt_timeout_us(pf_fd, vf, gt, p->preempt_timeout_us);
> + }
> + }
> +}
> +
> +static bool check_within_epsilon(const double x, const double ref, const double tol)
> +{
> + return x <= (1.0 + tol) * ref && x >= (1.0 - tol) * ref;
> +}
> +
> +static void compute_common_time_frame_stats(struct subm_set *set)
> +{
> + struct subm_thread_data *data = set->data;
> + int i, j, ndata = set->ndata;
> + struct subm_stats *stats;
> + uint64_t common_start = 0;
> + uint64_t common_end = UINT64_MAX;
> +
> + /* Find the common time frame */
> + for (i = 0; i < ndata; i++) {
> + stats = &data[i].stats;
> +
> + if (stats->start_timestamp > common_start)
> + common_start = stats->start_timestamp;
> +
> + if (stats->end_timestamp < common_end)
> + common_end = stats->end_timestamp;
> + }
> +
> + igt_info("common time frame: [%lu;%lu] %.2fms\n",
> + common_start, common_end, (common_end - common_start) / 1e6);
> +
> + if (igt_warn_on_f(common_end <= common_start, "No common time frame for all sets found\n"))
> + return;
> +
> + /* Compute concurrent_rate for each sample set within the common time frame */
> + for (i = 0; i < ndata; i++) {
> + uint64_t total_samples_duration = 0;
> + uint64_t samples_duration_in_common_frame = 0;
> +
> + stats = &data[i].stats;
> + stats->concurrent_execs = 0;
> + stats->concurrent_rate = 0.0;
> + stats->concurrent_mean = 0.0;
> +
> + for (j = 0; j < stats->samples.n_values; j++) {
> + uint64_t sample_start = stats->start_timestamp + total_samples_duration;
> + uint64_t sample_end = sample_start + stats->samples.values_u64[j];
> +
> + if (sample_start >= common_start &&
> + sample_end <= common_end) {
> + stats->concurrent_execs++;
> + samples_duration_in_common_frame +=
> + stats->samples.values_u64[j];
> + }
> +
> + total_samples_duration += stats->samples.values_u64[j];
> + }
> +
> + stats->concurrent_rate = samples_duration_in_common_frame ?
> + (double)stats->concurrent_execs /
> + (samples_duration_in_common_frame *
> + 1e-9) :
> + 0.0;
> + stats->concurrent_mean = stats->concurrent_execs ?
> + (double)samples_duration_in_common_frame /
> + stats->concurrent_execs :
> + 0.0;
> + igt_info("[%s] Throughput = %.4f execs/s mean duration=%.4fms nsamples=%d\n",
> + data[i].subm.id, stats->concurrent_rate, stats->concurrent_mean * 1e-6,
> + stats->concurrent_execs);
> + }
> +}
> +
> +static void log_sample_values(char *id, struct subm_stats *stats,
> + double comparison_mean, double outlier_treshold)
> +{
> + const uint64_t *values = stats->samples.values_u64;
> + unsigned int n = stats->samples.n_values;
> + char buffer[2048];
> + char *p = buffer, *pend = buffer + sizeof(buffer);
> + unsigned int i;
> + const unsigned int edge_items = 3;
> + bool is_outlier;
> + double tolerance = outlier_treshold * comparison_mean;
> +
> + p += snprintf(p, pend - p,
> + "[%s] start=%f end=%f nsamples=%u comparison_mean=%.2fms\n",
> + id, stats->start_timestamp * 1e-9, stats->end_timestamp * 1e-9, n,
> + comparison_mean * 1e-6);
> +
> + for (i = 0; i < n && p < pend; ++i) {
> + is_outlier = fabs(values[i] - comparison_mean) > tolerance;
> +
> + if (n <= 2 * edge_items || i < edge_items ||
> + i >= n - edge_items || is_outlier) {
> + if (is_outlier) {
> + double pct_diff =
> + 100 *
> + (comparison_mean ?
> + (values[i] - comparison_mean) /
> + comparison_mean :
> + 1.0);
> +
> + p += snprintf(p, pend - p,
> + "%0.2f @%d Pct Diff %0.2f%%\n",
> + values[i] * 1e-6, i,
> + pct_diff);
> + } else {
> + p += snprintf(p, pend - p, "%0.2f\n",
> + values[i] * 1e-6);
> + }
> + }
> +
> + if (i == edge_items && n > 2 * edge_items)
> + p += snprintf(p, pend - p, "...\n");
> + }
> +
> + igt_debug("%s\n", buffer);
> +}
> +
> +#define MIN_NUM_REPEATS 25
> +#define MIN_EXEC_QUANTUM_MS 8
> +#define MAX_EXEC_QUANTUM_MS 32
> +#define MIN_JOB_DURATION_MS 16
> +#define JOB_TIMEOUT_MS 5000
> +#define MAX_TOTAL_DURATION_MS 15000
> +#define PREFERRED_TOTAL_DURATION_MS 10000
> +#define MAX_PREFERRED_REPEATS 100
> +
> +struct job_sched_params {
> + int duration_ms;
> + int num_repeats;
> + struct vf_sched_params sched_params;
> +};
> +
> +static int calculate_job_duration_ms(int execution_ms)
> +{
> + return execution_ms * 2 > MIN_JOB_DURATION_MS ? execution_ms * 2 :
> + MIN_JOB_DURATION_MS;
> +}
> +
> +static bool compute_max_exec_quantum_ms(struct job_sched_params *params,
> + int num_threads)
> +{
> + for (int test_execution_ms = MAX_EXEC_QUANTUM_MS;
> + test_execution_ms >= MIN_EXEC_QUANTUM_MS; test_execution_ms--) {
> + int test_duration_ms =
> + calculate_job_duration_ms(test_execution_ms);
> + int max_delay_ms = (num_threads - 1) * test_execution_ms;
> +
> + /*
> + * Check if the job can complete within JOB_TIMEOUT_MS,
> + * including the maximum scheduling delay
> + */
> + if (test_duration_ms + max_delay_ms <= JOB_TIMEOUT_MS) {
> + int estimated_num_repeats =
> + MAX_TOTAL_DURATION_MS /
> + (num_threads * test_duration_ms);
> +
> + if (estimated_num_repeats >= MIN_NUM_REPEATS) {
> + params->sched_params.exec_quantum_ms = test_execution_ms;
> + return true;
> + }
> + }
> + }
> + return false;
> +}
> +
> +static void adjust_num_repeats(struct job_sched_params *params, int num_threads)
> +{
> + int preferred_max_repeats = PREFERRED_TOTAL_DURATION_MS /
> + (num_threads * params->duration_ms);
> + int optimal_repeats = min(preferred_max_repeats, MAX_PREFERRED_REPEATS);
> +
> + params->num_repeats = max(optimal_repeats, MIN_NUM_REPEATS);
> +}
> +
> +static struct job_sched_params
> +prepare_job_sched_params(int num_threads, const struct subm_opts *opts)
> +{
> + struct job_sched_params params = { MIN_NUM_REPEATS,
> + MIN_JOB_DURATION_MS,
> + { MIN_EXEC_QUANTUM_MS,
> + MIN_EXEC_QUANTUM_MS * 2000 } };
Maybe macro MIN_PREEMPT_TIMEOUT_US should be defined?
> +
> + if (opts->exec_quantum_ms || opts->preempt_timeout_us) {
> + if (opts->exec_quantum_ms)
> + params.sched_params.exec_quantum_ms =
> + opts->exec_quantum_ms;
> + if (opts->preempt_timeout_us)
> + params.sched_params.preempt_timeout_us =
> + opts->preempt_timeout_us;
> + } else {
> + if (igt_debug_on(!compute_max_exec_quantum_ms(¶ms, num_threads)))
> + return params;
> +
> + /*
> + * After computing a feasible max_exec_quantum_ms,
> + * select a random exec_quantum_ms within the new range
> + */
> + params.sched_params.exec_quantum_ms =
> + MIN_EXEC_QUANTUM_MS +
> + rand() % (params.sched_params.exec_quantum_ms -
> + MIN_EXEC_QUANTUM_MS + 1);
> + params.sched_params.preempt_timeout_us =
> + params.sched_params.exec_quantum_ms * 2000;
> + }
> + params.duration_ms =
> + calculate_job_duration_ms(params.sched_params.exec_quantum_ms);
> +
> + adjust_num_repeats(¶ms, num_threads);
> +
> + return params;
> +}
> +
> +/**
> + * SUBTEST: equal-throughput
> + * Description:
> + * Check all VFs with same scheduling settings running same workload
> + * achieve the same throughput.
> + */
> +static void throughput_ratio(int pf_fd, int num_vfs, const struct subm_opts *opts)
> +{
> + struct subm_set set_ = {}, *set = &set_;
> + uint8_t vf_ids[num_vfs + 1 /*PF*/];
> + struct job_sched_params job_sched_params = prepare_job_sched_params(num_vfs + 1, opts);
> +
> + igt_info("eq=%ums pt=%uus duration=%ums repeats=%d num_vfs=%d\n",
> + job_sched_params.sched_params.exec_quantum_ms,
> + job_sched_params.sched_params.preempt_timeout_us,
> + job_sched_params.duration_ms, job_sched_params.num_repeats,
> + num_vfs + 1);
> +
> + init_vf_ids(vf_ids, ARRAY_SIZE(vf_ids),
> + &(struct init_vf_ids_opts){ .shuffle = true,
> + .shuffle_pf = true });
> + xe_sriov_require_default_scheduling_attributes(pf_fd);
> + /* enable VFs */
> + igt_sriov_disable_driver_autoprobe(pf_fd);
> + igt_sriov_enable_vfs(pf_fd, num_vfs);
> + /* set scheduling params (PF and VFs) */
> + set_vfs_scheduling_params(pf_fd, num_vfs, &job_sched_params.sched_params);
> + /* probe VFs */
> + igt_sriov_enable_driver_autoprobe(pf_fd);
> + for (int vf = 1; vf <= num_vfs; ++vf)
> + igt_sriov_bind_vf_drm_driver(pf_fd, vf);
> +
> + /* init subm_set */
> + subm_set_alloc_data(set, num_vfs + 1 /*PF*/);
> + subm_set_init_sync_method(set, opts->sync_method);
> +
> + for (int n = 0; n < set->ndata; ++n) {
> + int vf_fd =
> + vf_ids[n] ?
> + igt_sriov_open_vf_drm_device(pf_fd, vf_ids[n]) :
> + drm_reopen_driver(pf_fd);
> +
> + igt_assert_fd(vf_fd);
> + set->data[n].opts = opts;
> + subm_init(&set->data[n].subm, vf_fd, vf_ids[n], 0,
> + xe_engine(vf_fd, 0)->instance);
> + subm_workload_init(&set->data[n].subm,
> + &(struct subm_work_desc){
> + .duration_ms = job_sched_params.duration_ms,
> + .preempt = true,
> + .repeats = job_sched_params.num_repeats });
> + igt_stats_init_with_size(&set->data[n].stats.samples,
> + set->data[n].subm.work.repeats);
> + if (set->sync_method == SYNC_BARRIER)
> + set->data[n].barrier = &set->barrier;
> + }
> +
> + /* dispatch spinners, wait for results */
> + subm_set_dispatch_and_wait_threads(set);
> +
> + /* verify results */
> + compute_common_time_frame_stats(set);
> + for (int n = 0; n < set->ndata; ++n) {
> + struct subm_stats *stats = &set->data[n].stats;
> + const double ref_rate = set->data[0].stats.concurrent_rate;
> +
> + igt_assert_eq(0, stats->num_early_finish);
> + if (!check_within_epsilon(stats->concurrent_rate, ref_rate,
> + opts->outlier_treshold)) {
> + log_sample_values(set->data[0].subm.id,
> + &set->data[0].stats,
> + set->data[0].stats.concurrent_mean,
> + opts->outlier_treshold);
> + log_sample_values(set->data[n].subm.id, stats,
> + set->data[0].stats.concurrent_mean,
> + opts->outlier_treshold);
> + igt_assert_f(false,
> + "Throughput=%.3f execs/s not within +-%.0f%% of expected=%.3f execs/s\n",
> + stats->concurrent_rate,
> + opts->outlier_treshold * 100, ref_rate);
> + }
> + }
> +
> + /* cleanup */
> + subm_set_fini(set);
> + set_vfs_scheduling_params(pf_fd, num_vfs, &(struct vf_sched_params){});
> + igt_sriov_disable_vfs(pf_fd);
> +}
> +
> +static struct subm_opts subm_opts = {
> + .sync_method = SYNC_BARRIER,
> + .outlier_treshold = 0.1,
> +};
> +
> +static bool extended_scope;
> +
> +static int subm_opts_handler(int opt, int opt_index, void *data)
> +{
> + switch (opt) {
> + case 'e':
> + extended_scope = true;
> + break;
> + case 's':
> + subm_opts.sync_method = atoi(optarg);
> + igt_info("Sync method: %d\n", subm_opts.sync_method);
> + break;
> + case 'q':
> + subm_opts.exec_quantum_ms = atoi(optarg);
> + igt_info("Execution quantum ms: %u\n", subm_opts.exec_quantum_ms);
> + break;
> + case 'p':
> + subm_opts.preempt_timeout_us = atoi(optarg);
> + igt_info("Preempt timeout us: %u\n", subm_opts.preempt_timeout_us);
> + break;
> + case 't':
> + subm_opts.outlier_treshold = atoi(optarg) / 100.0;
> + igt_info("Outlier threshold: %.2f\n", subm_opts.outlier_treshold);
> + break;
> + default:
> + return IGT_OPT_HANDLER_ERROR;
> + }
> +
> + return IGT_OPT_HANDLER_SUCCESS;
> +}
> +
> +static const struct option long_opts[] = {
> + { .name = "extended", .has_arg = false, .val = 'e', },
> + { .name = "sync", .has_arg = true, .val = 's', },
> + { .name = "threshold", .has_arg = true, .val = 't', },
> + { .name = "eq_ms", .has_arg = true, .val = 'q', },
> + { .name = "pt_us", .has_arg = true, .val = 'p', },
> + {}
> +};
> +
> +static const char help_str[] =
> + " --extended\tRun the extended test scope\n"
> + " --sync\tThreads synchronization method: 0 - none 1 - barrier (Default 1)\n"
> + " --threshold\tSample outlier threshold (Default 0.1)\n"
> + " --eq_ms\texec_quantum_ms\n"
> + " --pt_us\tpreempt_timeout_us\n";
> +
> +igt_main_args("s:e:p:", long_opts, help_str, subm_opts_handler, NULL)
missing short opts
> +{
> + int pf_fd;
> + bool autoprobe;
> +
> + igt_fixture {
> + pf_fd = drm_open_driver(DRIVER_XE);
> + igt_require(igt_sriov_is_pf(pf_fd));
> + igt_require(igt_sriov_get_enabled_vfs(pf_fd) == 0);
> + autoprobe = igt_sriov_is_driver_autoprobe_enabled(pf_fd);
> + xe_sriov_require_default_scheduling_attributes(pf_fd);
> + }
> +
> + igt_describe("Check VFs achieve equal throughput");
> + igt_subtest_with_dynamic("equal-throughput") {
> + if (extended_scope)
> + for_each_sriov_num_vfs(pf_fd, vf)
> + igt_dynamic_f("numvfs-%d", vf)
> + throughput_ratio(pf_fd, vf, &subm_opts);
> +
> + for_random_sriov_vf(pf_fd, vf)
> + igt_dynamic("numvfs-random")
> + throughput_ratio(pf_fd, vf, &subm_opts);
> + }
> +
> + igt_fixture {
> + set_vfs_scheduling_params(pf_fd, igt_sriov_get_total_vfs(pf_fd),
> + &(struct vf_sched_params){});
> + igt_sriov_disable_vfs(pf_fd);
> + /* abort to avoid execution of next tests with enabled VFs */
> + igt_abort_on_f(igt_sriov_get_enabled_vfs(pf_fd) > 0,
> + "Failed to disable VF(s)");
> + autoprobe ? igt_sriov_enable_driver_autoprobe(pf_fd) :
> + igt_sriov_disable_driver_autoprobe(pf_fd);
> + igt_abort_on_f(autoprobe != igt_sriov_is_driver_autoprobe_enabled(pf_fd),
> + "Failed to restore sriov_drivers_autoprobe value\n");
> + drm_close_driver(pf_fd);
> + }
> +}
> diff --git a/tests/meson.build b/tests/meson.build
> index 33dffad31..c8868d5ab 100644
> --- a/tests/meson.build
> +++ b/tests/meson.build
> @@ -318,6 +318,7 @@ intel_xe_progs = [
> 'xe_spin_batch',
> 'xe_sriov_auto_provisioning',
> 'xe_sriov_flr',
> + 'xe_sriov_scheduling',
> 'xe_sysfs_defaults',
> 'xe_sysfs_preempt_timeout',
> 'xe_sysfs_scheduler',
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH i-g-t 4/4] tests/xe_sriov_scheduling: nonpreempt-engine-resets subtest
2025-01-20 20:34 ` [PATCH i-g-t 4/4] tests/xe_sriov_scheduling: nonpreempt-engine-resets subtest Marcin Bernatowicz
@ 2025-01-30 17:02 ` Laguna, Lukasz
0 siblings, 0 replies; 12+ messages in thread
From: Laguna, Lukasz @ 2025-01-30 17:02 UTC (permalink / raw)
To: Marcin Bernatowicz, igt-dev
Cc: Adam Miszczak, Jakub Kolakowski, Michał Wajdeczko,
Michał Winiarski, Narasimha C V, Piotr Piórkowski,
Satyanarayana K V P, Tomasz Lis
On 1/20/2025 21:34, Marcin Bernatowicz wrote:
> Verify the occurrence of engine resets
> when non-preemptible workloads surpass the combined
> duration of execution quantum and preemption timeout.
>
> Signed-off-by: Marcin Bernatowicz <marcin.bernatowicz@linux.intel.com>
> Cc: Adam Miszczak <adam.miszczak@linux.intel.com>
> Cc: Jakub Kolakowski <jakub1.kolakowski@intel.com>
> Cc: Lukasz Laguna <lukasz.laguna@intel.com>
> Cc: Michał Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Michał Winiarski <michal.winiarski@intel.com>
> Cc: Narasimha C V <narasimha.c.v@intel.com>
> Cc: Piotr Piórkowski <piotr.piorkowski@intel.com>
> Cc: Satyanarayana K V P <satyanarayana.k.v.p@intel.com>
> Cc: Tomasz Lis <tomasz.lis@intel.com>
> ---
> tests/intel/xe_sriov_scheduling.c | 126 ++++++++++++++++++++++++++++++
> 1 file changed, 126 insertions(+)
>
> diff --git a/tests/intel/xe_sriov_scheduling.c b/tests/intel/xe_sriov_scheduling.c
> index 20ec15b22..5999c3f98 100644
> --- a/tests/intel/xe_sriov_scheduling.c
> +++ b/tests/intel/xe_sriov_scheduling.c
> @@ -605,6 +605,119 @@ static void throughput_ratio(int pf_fd, int num_vfs, const struct subm_opts *opt
> igt_sriov_disable_vfs(pf_fd);
> }
>
> +static unsigned int select_random_exec_quantum_value(unsigned int min,
> + unsigned int num_vfs,
> + unsigned int job_timeout)
> +{
> + int max = min(64u, job_timeout / (3 * (num_vfs + 1)));
> +
> + igt_skip_on(max <= min);
> + /* random between min (inclusive) and max (exclusive) */
> + return rand() % (max - min) + min;
> +}
> +
> +static struct vf_sched_params prepare_vf_sched_params(int num_vfs,
> + const struct subm_opts *opts)
> +{
> + struct vf_sched_params params = {};
> +
> + if (opts->exec_quantum_ms || opts->preempt_timeout_us) {
> + if (opts->exec_quantum_ms)
> + params.exec_quantum_ms = opts->exec_quantum_ms;
> + if (opts->preempt_timeout_us)
> + params.preempt_timeout_us = opts->preempt_timeout_us;
> + } else {
> + params.exec_quantum_ms =
> + select_random_exec_quantum_value(8, num_vfs, 5000);
Looks like existing macros can be used.
> + params.preempt_timeout_us = 2 * params.exec_quantum_ms * 1000;
> + }
> +
> + return params;
> +}
> +
> +/**
> + * SUBTEST: nonpreempt-engine-resets
> + * Description:
> + * Check all VFs running a non-preemptible workload with a duration
> + * exceeding the sum of its execution quantum and preemption timeout,
> + * will experience engine reset due to preemption timeout.
> + */
> +static void nonpreempt_engine_resets(int pf_fd, int num_vfs,
> + const struct subm_opts *opts)
> +{
> + struct subm_set set_ = {}, *set = &set_;
> + struct vf_sched_params vf_sched_params =
> + prepare_vf_sched_params(num_vfs, opts);
> + uint64_t duration_ms = 2 * vf_sched_params.exec_quantum_ms +
> + vf_sched_params.preempt_timeout_us / 1000;
> + int preemptible_end = 1;
> + uint8_t vf_ids[num_vfs + 1 /*PF*/];
> +
> + igt_info("eq=%ums pt=%uus duration=%lums num_vfs=%d\n",
> + vf_sched_params.exec_quantum_ms,
> + vf_sched_params.preempt_timeout_us, duration_ms, num_vfs);
> + igt_assert(duration_ms);
> + igt_assert_lt(duration_ms, 2000);
Can we use some macro instead of "2000"?
> +
> + init_vf_ids(vf_ids, ARRAY_SIZE(vf_ids),
> + &(struct init_vf_ids_opts){ .shuffle = true,
> + .shuffle_pf = true });
> + xe_sriov_require_default_scheduling_attributes(pf_fd);
> + /* enable VFs */
> + igt_sriov_disable_driver_autoprobe(pf_fd);
> + igt_sriov_enable_vfs(pf_fd, num_vfs);
> + /* set scheduling params (PF and VFs) */
> + set_vfs_scheduling_params(pf_fd, num_vfs, &vf_sched_params);
> + /* probe VFs */
> + igt_sriov_enable_driver_autoprobe(pf_fd);
> + for (int vf = 1; vf <= num_vfs; ++vf)
> + igt_sriov_bind_vf_drm_driver(pf_fd, vf);
> +
> + /* init subm_set */
> + subm_set_alloc_data(set, num_vfs + 1 /*PF*/);
> + subm_set_init_sync_method(set, opts->sync_method);
> +
> + for (int n = 0; n < set->ndata; ++n) {
> + int vf_fd =
> + vf_ids[n] ?
> + igt_sriov_open_vf_drm_device(pf_fd, vf_ids[n]) :
> + drm_reopen_driver(pf_fd);
> +
> + igt_assert_fd(vf_fd);
> + set->data[n].opts = opts;
> + subm_init(&set->data[n].subm, vf_fd, vf_ids[n], 0,
> + xe_engine(vf_fd, 0)->instance);
> + subm_workload_init(&set->data[n].subm,
> + &(struct subm_work_desc){
> + .duration_ms = duration_ms,
> + .preempt = (n < preemptible_end),
> + .repeats = 2000 / duration_ms });
> + igt_stats_init_with_size(&set->data[n].stats.samples,
> + set->data[n].subm.work.repeats);
> + if (set->sync_method == SYNC_BARRIER)
> + set->data[n].barrier = &set->barrier;
> + }
> +
> + /* dispatch spinners, wait for results */
> + subm_set_dispatch_and_wait_threads(set);
> +
> + /* verify results */
> + for (int n = 0; n < set->ndata; ++n) {
> + if (n < preemptible_end) {
> + igt_assert_eq(0, set->data[n].stats.num_early_finish);
> + igt_assert_eq(set->data[n].subm.work.repeats,
> + set->data[n].stats.samples.n_values);
> + } else {
> + igt_assert_eq(1, set->data[n].stats.num_early_finish);
> + }
> + }
> +
> + /* cleanup */
> + subm_set_fini(set);
> + set_vfs_scheduling_params(pf_fd, num_vfs, &(struct vf_sched_params){});
> + igt_sriov_disable_vfs(pf_fd);
> +}
> +
> static struct subm_opts subm_opts = {
> .sync_method = SYNC_BARRIER,
> .outlier_treshold = 0.1,
> @@ -682,6 +795,19 @@ igt_main_args("s:e:p:", long_opts, help_str, subm_opts_handler, NULL)
> throughput_ratio(pf_fd, vf, &subm_opts);
> }
>
> + igt_describe("Check VFs experience engine reset due to preemption timeout");
> + igt_subtest_with_dynamic("nonpreempt-engine-resets") {
> + if (extended_scope)
> + for_each_sriov_num_vfs(pf_fd, vf)
> + igt_dynamic_f("numvfs-%d", vf)
> + nonpreempt_engine_resets(pf_fd, vf,
> + &subm_opts);
> +
> + for_random_sriov_vf(pf_fd, vf)
> + igt_dynamic("numvfs-random")
> + nonpreempt_engine_resets(pf_fd, vf, &subm_opts);
> + }
> +
> igt_fixture {
> set_vfs_scheduling_params(pf_fd, igt_sriov_get_total_vfs(pf_fd),
> &(struct vf_sched_params){});
^ permalink raw reply [flat|nested] 12+ messages in thread
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2025-01-20 20:34 [PATCH i-g-t 0/4] Add SR-IOV provisioning scheduling attributes and tests Marcin Bernatowicz
2025-01-20 20:34 ` [PATCH i-g-t 1/4] lib/xe/xe_sriov_provisioning: Add scheduling attributes accessors Marcin Bernatowicz
2025-01-29 14:07 ` Laguna, Lukasz
2025-01-20 20:34 ` [PATCH i-g-t 2/4] lib/xe/xe_sriov_provisioning: Add helper to check default scheduling attributes Marcin Bernatowicz
2025-01-29 14:14 ` Laguna, Lukasz
2025-01-20 20:34 ` [PATCH i-g-t 3/4] tests/xe_sriov_scheduling: VF equal-throughput validation Marcin Bernatowicz
2025-01-30 15:40 ` Laguna, Lukasz
2025-01-20 20:34 ` [PATCH i-g-t 4/4] tests/xe_sriov_scheduling: nonpreempt-engine-resets subtest Marcin Bernatowicz
2025-01-30 17:02 ` Laguna, Lukasz
2025-01-20 22:31 ` ✗ i915.CI.BAT: failure for Add SR-IOV provisioning scheduling attributes and tests Patchwork
2025-01-20 22:43 ` ✓ Xe.CI.BAT: success " Patchwork
2025-01-21 0:12 ` ✗ Xe.CI.Full: failure " Patchwork
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