From: Swati Sharma <swati2.sharma@intel.com>
To: igt-dev@lists.freedesktop.org
Cc: ankit.k.nautiyal@intel.com, Swati Sharma <swati2.sharma@intel.com>
Subject: [PATCH i-g-t 3/5] tests/intel/kms_cdclk: Introduce set_mode()
Date: Thu, 13 Feb 2025 16:38:12 +0530 [thread overview]
Message-ID: <20250213110814.351186-4-swati2.sharma@intel.com> (raw)
In-Reply-To: <20250213110814.351186-1-swati2.sharma@intel.com>
Encapsulate the mode-setting functionality in the set_mode
function to reduce redundancy.
Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
tests/intel/kms_cdclk.c | 71 +++++++++++++----------------------------
1 file changed, 22 insertions(+), 49 deletions(-)
diff --git a/tests/intel/kms_cdclk.c b/tests/intel/kms_cdclk.c
index 75542e21b..eeb1ecd69 100644
--- a/tests/intel/kms_cdclk.c
+++ b/tests/intel/kms_cdclk.c
@@ -258,21 +258,36 @@ static void test_mode_transition(data_t *data, enum pipe pipe, igt_output_t *out
igt_remove_fb(display->drm_fd, &fb);
}
+static void set_mode(data_t *data, int count, drmModeModeInfo *mode,
+ igt_output_t **valid_outputs, struct igt_fb fb)
+{
+ igt_display_t *display = &data->display;
+ igt_pipe_t *pipe;
+ igt_plane_t *plane;
+
+ for (int i = 0; i < count; i++) {
+ pipe = &display->pipes[i];
+ plane = igt_pipe_get_plane_type(pipe, DRM_PLANE_TYPE_PRIMARY);
+
+ igt_output_override_mode(valid_outputs[i], &mode[i]);
+
+ igt_plane_set_fb(plane, &fb);
+ igt_fb_set_size(&fb, plane, mode[i].hdisplay, mode[i].vdisplay);
+ igt_plane_set_size(plane, mode[i].hdisplay, mode[i].vdisplay);
+ }
+}
+
static void test_mode_transition_on_all_outputs(data_t *data)
{
igt_display_t *display = &data->display;
int debugfs_fd = data->debugfs_fd;
- drmModeModeInfo *mode, mode_hi, mode_lo;
- drmModeModeInfo mode_highres[IGT_MAX_PIPES] = {0}, mode_lowres[IGT_MAX_PIPES] = {0};
+ drmModeModeInfo *mode, mode_highres[IGT_MAX_PIPES] = {0}, mode_lowres[IGT_MAX_PIPES] = {0};
igt_output_t *valid_outputs[IGT_MAX_PIPES] = {NULL};
igt_output_t *output;
int count = 0;
int cdclk_ref, cdclk_new;
uint16_t width = 0, height = 0;
struct igt_fb fb;
- igt_pipe_t *pipe;
- igt_plane_t *plane;
- int i = 0, j = 0;
do_cleanup_display(display);
igt_display_reset(display);
@@ -316,52 +331,11 @@ static void test_mode_transition_on_all_outputs(data_t *data)
igt_create_pattern_fb(data->drm_fd, width, height, DRM_FORMAT_XRGB8888,
DRM_FORMAT_MOD_LINEAR, &fb);
- i = 0;
- for_each_connected_output(display, output) {
- pipe = &display->pipes[i];
- plane = igt_pipe_get_plane_type(pipe, DRM_PLANE_TYPE_PRIMARY);
-
- mode = NULL;
-
- igt_output_set_pipe(output, i);
- mode = igt_output_get_mode(output);
- igt_assert(mode);
-
- mode_lo = *get_lowres_mode(output);
-
- igt_output_override_mode(output, &mode_lo);
- igt_plane_set_fb(plane, &fb);
- igt_fb_set_size(&fb, plane, mode_lo.hdisplay, mode_lo.vdisplay);
- igt_plane_set_size(plane, mode_lo.hdisplay, mode_lo.vdisplay);
- i++;
- }
-
+ set_mode(data, count, mode_lowres, valid_outputs, fb);
igt_display_commit2(display, COMMIT_ATOMIC);
cdclk_ref = get_current_cdclk_freq(debugfs_fd);
- j = 0;
- for_each_connected_output(display, output) {
- pipe = &display->pipes[j];
- plane = igt_pipe_get_plane_type(pipe, DRM_PLANE_TYPE_PRIMARY);
-
- mode = NULL;
-
- igt_output_set_pipe(output, j);
- mode = igt_output_get_mode(output);
- igt_assert(mode);
-
- mode_hi = *igt_output_get_highres_mode(output);
- igt_require_f(mode_hi.hdisplay >= HDISPLAY_4K && mode_hi.vdisplay >= VDISPLAY_4K &&
- mode_hi.vrefresh >= VREFRESH, "Mode >= 4K not found on output %s.\n",
- igt_output_name(output));
-
- igt_output_override_mode(output, &mode_hi);
- igt_plane_set_fb(plane, &fb);
- igt_fb_set_size(&fb, plane, mode_hi.hdisplay, mode_hi.vdisplay);
- igt_plane_set_size(plane, mode_hi.hdisplay, mode_hi.vdisplay);
- j++;
- }
-
+ set_mode(data, count, mode_highres, valid_outputs, fb);
igt_display_commit2(display, COMMIT_ATOMIC);
cdclk_new = get_current_cdclk_freq(debugfs_fd);
igt_info("CD clock frequency %d -> %d\n", cdclk_ref, cdclk_new);
@@ -369,7 +343,6 @@ static void test_mode_transition_on_all_outputs(data_t *data)
/* cdclk should bump */
igt_assert_lt(cdclk_ref, cdclk_new);
- igt_plane_set_fb(plane, NULL);
do_cleanup_display(display);
igt_remove_fb(data->drm_fd, &fb);
}
--
2.25.1
next prev parent reply other threads:[~2025-02-13 11:03 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-13 11:08 [PATCH i-g-t 0/5] tests/intel/kms_cdclk: Refactor mode setting and CD clock verification Swati Sharma
2025-02-13 11:08 ` [PATCH i-g-t 1/5] lib/igt_kms: Add highres() and lowres() func Swati Sharma
2025-02-17 8:12 ` Nautiyal, Ankit K
2025-02-13 11:08 ` [PATCH i-g-t 2/5] tests/intel/kms_cdclk: Add conditions to filter valid outputs Swati Sharma
2025-02-17 8:17 ` Nautiyal, Ankit K
2025-02-13 11:08 ` Swati Sharma [this message]
2025-02-13 11:08 ` [PATCH i-g-t 4/5] lib/igt_kms: Add igt_get_max_cdclk() Swati Sharma
2025-02-17 8:35 ` Nautiyal, Ankit K
2025-02-13 11:08 ` [PATCH i-g-t 5/5] tests/intel/kms_cdclk: Use igt_get_max_cdclk() Swati Sharma
2025-02-17 8:36 ` Nautiyal, Ankit K
2025-02-13 12:33 ` ✓ Xe.CI.BAT: success for tests/intel/kms_cdclk: Refactor mode setting and CD clock verification (rev3) Patchwork
2025-02-13 12:50 ` ✓ i915.CI.BAT: " Patchwork
2025-02-13 20:09 ` ✗ i915.CI.Full: failure " Patchwork
2025-02-14 4:35 ` ✗ Xe.CI.Full: " Patchwork
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