* [PATCH i-g-t v9 0/3] tests/intel/xe_compute_preempt: Compute preemption check
@ 2025-10-03 5:26 Sobin Thomas
2025-10-03 5:26 ` [PATCH i-g-t v9 1/3] " Sobin Thomas
` (6 more replies)
0 siblings, 7 replies; 12+ messages in thread
From: Sobin Thomas @ 2025-10-03 5:26 UTC (permalink / raw)
To: igt-dev
Cc: kamil.konieczny, zbigniew.kempczynski, priyanka.dandamudi,
Sobin Thomas
Patch 1 introduces a preemption capability check.
Patch 2 Adds kernel validation logic and kernel lookup.
Patch 3 removes redundant loop count logic for WMTP. Since WMTP uses a loop/SIP kernel
and does not require a separate long kernel, the loop count assignment for
WMTP is unnecessary and has been removed.
---
**Patch Summary:**
- **[PATCH 1/2]** tests/intel/xe_compute_preempt: Compute preemption check
Adds preemption capability detection and kernel validation logic.
- **[PATCH 2/3]** igt/lib/intel_compute.c: Add kernel lookup and
validation for compute IP versions
- **[PATCH 3/3]** igt/lib/intel_compute.c: Update loop count for WMTP
Removes unnecessary loop count assignment for WMTP, which uses loop/SIP kernels
Sobin Thomas (3):
tests/intel/xe_compute_preempt: Compute preemption check
lib/intel/intel_compute: Add kernel lookup and validation for compute
IP versions
lib/intel_compute: Adjust long kernel usage for WMTP
lib/intel_compute.c | 160 ++++++++++++++++++++++++-------
lib/intel_compute.h | 12 +++
tests/intel/xe_compute_preempt.c | 6 ++
3 files changed, 146 insertions(+), 32 deletions(-)
--
2.51.0
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH i-g-t v9 1/3] tests/intel/xe_compute_preempt: Compute preemption check
2025-10-03 5:26 [PATCH i-g-t v9 0/3] tests/intel/xe_compute_preempt: Compute preemption check Sobin Thomas
@ 2025-10-03 5:26 ` Sobin Thomas
2025-10-10 8:57 ` Zbigniew Kempczyński
2025-10-10 9:09 ` Zbigniew Kempczyński
2025-10-03 5:26 ` [PATCH i-g-t v9 2/3] lib/intel/intel_compute: Add kernel lookup and validation for compute IP versions Sobin Thomas
` (5 subsequent siblings)
6 siblings, 2 replies; 12+ messages in thread
From: Sobin Thomas @ 2025-10-03 5:26 UTC (permalink / raw)
To: igt-dev
Cc: kamil.konieczny, zbigniew.kempczynski, priyanka.dandamudi,
Sobin Thomas
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset=y, Size: 8199 bytes --]
On platforms (like PVC) that do not support walker mid-thread
preemption, running tests in forked threads can lead to inconsistent
states due to igt_skip being called mid-execution. Made changes to
perform kernel preemption check at the beginning of each subtests.
If the GPU version does not support the required features, the
test is skipped gracefully, ensuring consistent behavior across
different platforms.
v2: Fixed review comments to move the compatibility check
into the igt_fixture. [Priyanka]
v3: Added check for thread group preemption and WMTP.
Added enum flags for preemption type as per review . [Zbigniew]
v4: Added check for preempt inside __run_intel_compute_kernel_preempt
Refactored the code. [priyanka]
v5: Refactor for finding the kernel and out of bound check. [Zbigniew]
v6: Added NULL Check for kernel. [Zbigniew]
v7: Moved TODO inside the code. [kamil]
Modified the check condition for kernel [Priyanka]
v8: Additional check for the kernel variants
v9: Refactored in to logically related patches
Signed-off-by: Sobin Thomas <sobin.thomas@intel.com>
---
lib/intel_compute.c | 78 ++++++++++++++++++++++++++++----
lib/intel_compute.h | 11 +++++
tests/intel/xe_compute_preempt.c | 6 +++
3 files changed, 86 insertions(+), 9 deletions(-)
diff --git a/lib/intel_compute.c b/lib/intel_compute.c
index 147dd2916..ae656a4f6 100644
--- a/lib/intel_compute.c
+++ b/lib/intel_compute.c
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2023 Intel Corporation
- *
+ * TODO: Add kernel for PVC for preemption test
* Authors:
* Francois Dugast <francois.dugast@intel.com>
*/
@@ -2193,40 +2193,72 @@ static const struct {
bool threadgroup_preemption,
enum execenv_alloc_prefs alloc_prefs);
uint32_t compat;
+ enum xe_compute_preempt_type preempt_type;
} intel_compute_preempt_batches[] = {
{
.ip_ver = IP_VER(20, 01),
.compute_exec = xe2lpg_compute_preempt_exec,
.compat = COMPAT_DRIVER_XE,
+ .preempt_type = PREEMPT_TGP | PREEMPT_WMTP,
},
{
.ip_ver = IP_VER(20, 04),
.compute_exec = xe2lpg_compute_preempt_exec,
.compat = COMPAT_DRIVER_XE,
+ .preempt_type = PREEMPT_TGP | PREEMPT_WMTP,
},
{
.ip_ver = IP_VER(30, 00),
.compute_exec = xe2lpg_compute_preempt_exec,
.compat = COMPAT_DRIVER_XE,
+ .preempt_type = PREEMPT_TGP | PREEMPT_WMTP,
},
};
+static int find_preempt_batch(unsigned int ip_ver)
+{
+ for (int batch_idx = 0; batch_idx < ARRAY_SIZE(intel_compute_preempt_batches); batch_idx++)
+ if (ip_ver == intel_compute_preempt_batches[batch_idx].ip_ver)
+ return batch_idx;
+ return -1;
+}
+
+static bool is_preemptable(int batch, enum xe_compute_preempt_type required_preempt)
+{
+ if (required_preempt &&
+ !(intel_compute_preempt_batches[batch].preempt_type & required_preempt)) {
+ igt_info("Preemption not supported\n");
+ return false;
+ }
+ return true;
+}
+
+static const char *xe_preempt_type_to_str(enum xe_compute_preempt_type type)
+{
+ switch (type) {
+ case PREEMPT_TGP:
+ return "PREEMPT_TGP";
+ case PREEMPT_WMTP:
+ return "PREEMPT_WMTP";
+ default:
+ return "UNKNOWN_PREEMPT_TYPE";
+ }
+}
+
static bool __run_intel_compute_kernel_preempt(int fd,
struct drm_xe_engine_class_instance *eci,
bool threadgroup_preemption,
enum execenv_alloc_prefs alloc_prefs)
{
unsigned int ip_ver = intel_graphics_ver(intel_get_drm_devid(fd));
- unsigned int batch;
- const struct intel_compute_kernels *kernels = intel_compute_square_kernels;
+ int batch;
+ const struct intel_compute_kernels *kernel_entries = intel_compute_square_kernels, *kernels;
enum intel_driver driver = get_intel_driver(fd);
+ enum xe_compute_preempt_type required_preempt =
+ threadgroup_preemption ? PREEMPT_TGP : PREEMPT_WMTP;
- for (batch = 0; batch < ARRAY_SIZE(intel_compute_preempt_batches); batch++)
- if (ip_ver == intel_compute_preempt_batches[batch].ip_ver)
- break;
-
-
- if (batch == ARRAY_SIZE(intel_compute_preempt_batches)) {
+ batch = find_preempt_batch(ip_ver);
+ if (batch < 0) {
igt_debug("GPU version 0x%x not supported\n", ip_ver);
return false;
}
@@ -2244,6 +2276,9 @@ static bool __run_intel_compute_kernel_preempt(int fd,
kernels++;
}
+ if (!is_preemptable(batch, required_preempt))
+ return false;
+
if (!kernels->kernel || !kernels->sip_kernel || !kernels->long_kernel)
return 0;
@@ -2260,6 +2295,31 @@ static bool __run_intel_compute_kernel_preempt(int fd,
return true;
}
+
+/**
+ * xe_kernel_preempt_check - Checks IP version to confirm if provided
+ * preempt type is supported.
+ * @fd: file descriptor of the opened DRM Xe device
+ * @required_preempt: Preemption type (WMTP/TGP)
+ *
+ * Returns true on success, false otherwise.
+ */
+bool xe_kernel_preempt_check(int fd, enum xe_compute_preempt_type required_preempt)
+{
+ unsigned int ip_ver = intel_graphics_ver(intel_get_drm_devid(fd));
+ int batch = find_preempt_batch(ip_ver);
+
+ if (batch < 0) {
+ igt_debug("Preemption type %s not supported on GPU version 0x%x\n",
+ xe_preempt_type_to_str(required_preempt), ip_ver);
+ return false;
+ }
+ if (!is_preemptable(batch, required_preempt))
+ return false;
+
+ return true;
+}
+
/**
* run_intel_compute_kernel_preempt - runs compute kernels to
* exercise preemption scenario.
diff --git a/lib/intel_compute.h b/lib/intel_compute.h
index 412791d07..6e18d93e9 100644
--- a/lib/intel_compute.h
+++ b/lib/intel_compute.h
@@ -71,6 +71,16 @@ enum execenv_alloc_prefs {
EXECENV_PREF_VRAM_IF_POSSIBLE,
};
+/**
+ * enum xe_compute_preempt_type - Types of compute preemption supported.
+ * PREEMPT_TGP: ThreadGroup Preemption
+ * PREEMPT_WMTP: Walker Mid Thread Preemption
+ */
+enum xe_compute_preempt_type {
+ PREEMPT_TGP = 1 << 0,
+ PREEMPT_WMTP = 1 << 1,
+};
+
extern const struct intel_compute_kernels intel_compute_square_kernels[];
bool run_intel_compute_kernel(int fd, struct user_execenv *user,
@@ -81,4 +91,5 @@ bool xe_run_intel_compute_kernel_on_engine(int fd, struct drm_xe_engine_class_in
bool run_intel_compute_kernel_preempt(int fd, struct drm_xe_engine_class_instance *eci,
bool threadgroup_preemption,
enum execenv_alloc_prefs alloc_prefs);
+bool xe_kernel_preempt_check(int fd, enum xe_compute_preempt_type required_preempt);
#endif /* INTEL_COMPUTE_H */
diff --git a/tests/intel/xe_compute_preempt.c b/tests/intel/xe_compute_preempt.c
index c9b194869..076360f1d 100644
--- a/tests/intel/xe_compute_preempt.c
+++ b/tests/intel/xe_compute_preempt.c
@@ -76,6 +76,7 @@ igt_main
}
igt_subtest_with_dynamic("compute-preempt") {
+ igt_require(xe_kernel_preempt_check(xe, PREEMPT_WMTP));
xe_for_each_engine(xe, hwe) {
if (hwe->engine_class != DRM_XE_ENGINE_CLASS_COMPUTE)
continue;
@@ -86,6 +87,7 @@ igt_main
}
igt_subtest_with_dynamic("compute-preempt-many") {
+ igt_require(xe_kernel_preempt_check(xe, PREEMPT_WMTP));
xe_for_each_engine(xe, hwe) {
if (hwe->engine_class != DRM_XE_ENGINE_CLASS_COMPUTE)
continue;
@@ -112,6 +114,7 @@ igt_main
igt_subtest_with_dynamic("compute-preempt-many-all-ram") {
igt_require(swap_mb > CONTEXT_MB * 10);
+ igt_require(xe_kernel_preempt_check(xe, PREEMPT_WMTP));
xe_for_each_engine(xe, hwe) {
if (hwe->engine_class != DRM_XE_ENGINE_CLASS_COMPUTE)
continue;
@@ -138,6 +141,7 @@ igt_main
igt_subtest_with_dynamic("compute-preempt-many-vram") {
igt_require(xe_has_vram(xe));
+ igt_require(xe_kernel_preempt_check(xe, PREEMPT_WMTP));
xe_for_each_engine(xe, hwe) {
if (hwe->engine_class != DRM_XE_ENGINE_CLASS_COMPUTE)
continue;
@@ -164,6 +168,7 @@ igt_main
igt_subtest_with_dynamic("compute-preempt-many-vram-evict") {
igt_require(xe_has_vram(xe));
+ igt_require(xe_kernel_preempt_check(xe, PREEMPT_WMTP));
xe_for_each_engine(xe, hwe) {
if (hwe->engine_class != DRM_XE_ENGINE_CLASS_COMPUTE)
continue;
@@ -188,6 +193,7 @@ igt_main
}
igt_subtest_with_dynamic("compute-threadgroup-preempt") {
+ igt_require(xe_kernel_preempt_check(xe, PREEMPT_TGP));
xe_for_each_engine(xe, hwe) {
if (hwe->engine_class != DRM_XE_ENGINE_CLASS_COMPUTE)
continue;
--
2.51.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH i-g-t v9 2/3] lib/intel/intel_compute: Add kernel lookup and validation for compute IP versions
2025-10-03 5:26 [PATCH i-g-t v9 0/3] tests/intel/xe_compute_preempt: Compute preemption check Sobin Thomas
2025-10-03 5:26 ` [PATCH i-g-t v9 1/3] " Sobin Thomas
@ 2025-10-03 5:26 ` Sobin Thomas
2025-10-10 9:23 ` Zbigniew Kempczyński
2025-10-03 5:26 ` [PATCH i-g-t v9 3/3] lib/intel_compute: Adjust long kernel usage for WMTP Sobin Thomas
` (4 subsequent siblings)
6 siblings, 1 reply; 12+ messages in thread
From: Sobin Thomas @ 2025-10-03 5:26 UTC (permalink / raw)
To: igt-dev
Cc: kamil.konieczny, zbigniew.kempczynski, priyanka.dandamudi,
Sobin Thomas
Introduce functions to locate compute square kernels based on IP version
and validate their availability for preemption scenarios.
- intel_compute_find_kernels() returns the matching kernel entry.
- validate_kernels() ensures required kernel variants are present
for compute and preemption kernels.
Signed-off-by: Sobin Thomas <sobin.thomas@intel.com>
---
lib/intel_compute.c | 90 ++++++++++++++++++++++++++++++++++-----------
1 file changed, 69 insertions(+), 21 deletions(-)
diff --git a/lib/intel_compute.c b/lib/intel_compute.c
index ae656a4f6..ade0b44c1 100644
--- a/lib/intel_compute.c
+++ b/lib/intel_compute.c
@@ -1921,23 +1921,80 @@ static const struct {
},
};
+static const struct intel_compute_kernels
+ *intel_compute_find_kernels(const struct intel_compute_kernels *kernels,
+ unsigned int ip_ver)
+{
+ if (!kernels) {
+ igt_debug("%s: kernel_list is NULL\n", __func__);
+ return NULL;
+ }
+
+ while (kernels->kernel) {
+ if (ip_ver == kernels->ip_ver)
+ return kernels;
+ kernels++;
+ }
+
+ return NULL;
+}
+
+static bool validate_kernels(const struct intel_compute_kernels *kernels,
+ bool check_preemption, bool threadgroup_preemption,
+ unsigned int ip_ver)
+{
+ if (!kernels) {
+ igt_warn("No kernel entry found for IP version 0x%x\n", ip_ver);
+ return false;
+ }
+
+ if (!kernels->kernel) {
+ igt_warn("Missing compute square kernel for IP version 0x%x\n", ip_ver);
+ return false;
+ }
+
+ if (!check_preemption)
+ return true;
+
+ /* The following checks are only performed if preemption check is enabled. */
+ if (threadgroup_preemption && !kernels->long_kernel) {
+ igt_warn("Missing Long kernel for IP version 0x%x\n", ip_ver);
+ return false;
+ } else if (!threadgroup_preemption) {
+ if (!kernels->sip_kernel) {
+ igt_warn("Missing SIP kernel for IP version 0x%x\n", ip_ver);
+ return false;
+ }
+ if (!kernels->loop_kernel) {
+ igt_warn("Missing Loop kernel for IP version 0x%x\n", ip_ver);
+ return false;
+ }
+ }
+ return true;
+}
+
+static int find_compute_batch(unsigned int ip_ver)
+{
+ for (int batch_idx = 0; batch_idx < ARRAY_SIZE(intel_compute_batches); batch_idx++)
+ if (ip_ver == intel_compute_batches[batch_idx].ip_ver)
+ return batch_idx;
+ return -1;
+}
+
static bool __run_intel_compute_kernel(int fd,
struct drm_xe_engine_class_instance *eci,
struct user_execenv *user,
enum execenv_alloc_prefs alloc_prefs)
{
unsigned int ip_ver = intel_graphics_ver(intel_get_drm_devid(fd));
- unsigned int batch;
- const struct intel_compute_kernels *kernels = intel_compute_square_kernels;
+ int batch;
+ const struct intel_compute_kernels *kernel_entries = intel_compute_square_kernels, *kernels;
enum intel_driver driver = get_intel_driver(fd);
const unsigned char *kernel;
unsigned int kernel_size;
- for (batch = 0; batch < ARRAY_SIZE(intel_compute_batches); batch++) {
- if (ip_ver == intel_compute_batches[batch].ip_ver)
- break;
- }
- if (batch == ARRAY_SIZE(intel_compute_batches)) {
+ batch = find_compute_batch(ip_ver);
+ if (batch < 0) {
igt_debug("GPU version 0x%x not supported\n", ip_ver);
return false;
}
@@ -1954,12 +2011,8 @@ static bool __run_intel_compute_kernel(int fd,
kernel = user->kernel;
kernel_size = user->kernel_size;
} else {
- while (kernels->kernel) {
- if (ip_ver == kernels->ip_ver)
- break;
- kernels++;
- }
- if (!kernels->kernel)
+ kernels = intel_compute_find_kernels(kernel_entries, ip_ver);
+ if (!validate_kernels(kernels, false, false, ip_ver))
return false;
kernel = kernels->kernel;
kernel_size = kernels->size;
@@ -2270,18 +2323,13 @@ static bool __run_intel_compute_kernel_preempt(int fd,
return false;
}
- while (kernels->kernel) {
- if (ip_ver == kernels->ip_ver)
- break;
- kernels++;
- }
-
if (!is_preemptable(batch, required_preempt))
return false;
- if (!kernels->kernel || !kernels->sip_kernel || !kernels->long_kernel)
- return 0;
+ kernels = intel_compute_find_kernels(kernel_entries, ip_ver);
+ if (!validate_kernels(kernels, true, threadgroup_preemption, ip_ver))
+ return false;
intel_compute_preempt_batches[batch].compute_exec(fd, kernels->long_kernel,
kernels->long_kernel_size,
kernels->kernel, kernels->size,
--
2.51.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH i-g-t v9 3/3] lib/intel_compute: Adjust long kernel usage for WMTP
2025-10-03 5:26 [PATCH i-g-t v9 0/3] tests/intel/xe_compute_preempt: Compute preemption check Sobin Thomas
2025-10-03 5:26 ` [PATCH i-g-t v9 1/3] " Sobin Thomas
2025-10-03 5:26 ` [PATCH i-g-t v9 2/3] lib/intel/intel_compute: Add kernel lookup and validation for compute IP versions Sobin Thomas
@ 2025-10-03 5:26 ` Sobin Thomas
2025-10-10 9:24 ` Zbigniew Kempczyński
2025-10-03 7:11 ` ✓ Xe.CI.BAT: success for tests/intel/xe_compute_preempt: Compute preemption check Patchwork
` (3 subsequent siblings)
6 siblings, 1 reply; 12+ messages in thread
From: Sobin Thomas @ 2025-10-03 5:26 UTC (permalink / raw)
To: igt-dev
Cc: kamil.konieczny, zbigniew.kempczynski, priyanka.dandamudi,
Sobin Thomas
WMTP uses different shaders SIP and loop kernel and does not
require a separate long_kernel; This will make long kernel test to
be enabled or Thread group preemption tests.
Signed-off-by: Sobin Thomas <sobin.thomas@intel.com>
---
lib/intel_compute.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/lib/intel_compute.c b/lib/intel_compute.c
index ade0b44c1..23931f089 100644
--- a/lib/intel_compute.c
+++ b/lib/intel_compute.c
@@ -72,7 +72,6 @@
* WMTP - Walker Mid Thread Preemption
*/
#define TGP_long_kernel_loop_count 10
-#define WMTP_long_kernel_loop_count 1000000
#define XE2_THREADGROUP_PREEMPT_XDIM 0x4000
struct bo_dict_entry {
@@ -2135,8 +2134,6 @@ static void xe2lpg_compute_preempt_exec(int fd, const unsigned char *long_kernel
if (threadgroup_preemption)
long_kernel_loop_count = TGP_long_kernel_loop_count;
- else
- long_kernel_loop_count = WMTP_long_kernel_loop_count;
for (int i = 0; i < entries; ++i)
bo_dict_short[i] = bo_dict_long[i];
--
2.51.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* ✓ Xe.CI.BAT: success for tests/intel/xe_compute_preempt: Compute preemption check
2025-10-03 5:26 [PATCH i-g-t v9 0/3] tests/intel/xe_compute_preempt: Compute preemption check Sobin Thomas
` (2 preceding siblings ...)
2025-10-03 5:26 ` [PATCH i-g-t v9 3/3] lib/intel_compute: Adjust long kernel usage for WMTP Sobin Thomas
@ 2025-10-03 7:11 ` Patchwork
2025-10-03 7:11 ` ✗ Xe.CI.BAT: failure " Patchwork
` (2 subsequent siblings)
6 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2025-10-03 7:11 UTC (permalink / raw)
To: Sobin Thomas; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 1081 bytes --]
== Series Details ==
Series: tests/intel/xe_compute_preempt: Compute preemption check
URL : https://patchwork.freedesktop.org/series/155359/
State : success
== Summary ==
CI Bug Log - changes from XEIGT_8572_BAT -> XEIGTPW_13856_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (11 -> 11)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* IGT: IGT_8572 -> IGTPW_13856
* Linux: xe-3858-591ba5707c230e4a62c634450ce492118fe25948 -> xe-3861-2f24a052341862b0f13a2016d2b8afc7be4bf64f
IGTPW_13856: 2b6c459a67e85eb724912faf8a0d3ed4e0b870c0 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8572: 8572
xe-3858-591ba5707c230e4a62c634450ce492118fe25948: 591ba5707c230e4a62c634450ce492118fe25948
xe-3861-2f24a052341862b0f13a2016d2b8afc7be4bf64f: 2f24a052341862b0f13a2016d2b8afc7be4bf64f
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/index.html
[-- Attachment #2: Type: text/html, Size: 1640 bytes --]
^ permalink raw reply [flat|nested] 12+ messages in thread
* ✗ Xe.CI.BAT: failure for tests/intel/xe_compute_preempt: Compute preemption check
2025-10-03 5:26 [PATCH i-g-t v9 0/3] tests/intel/xe_compute_preempt: Compute preemption check Sobin Thomas
` (3 preceding siblings ...)
2025-10-03 7:11 ` ✓ Xe.CI.BAT: success for tests/intel/xe_compute_preempt: Compute preemption check Patchwork
@ 2025-10-03 7:11 ` Patchwork
2025-10-03 7:26 ` ✗ i915.CI.BAT: " Patchwork
2025-10-03 8:43 ` ✗ Xe.CI.Full: " Patchwork
6 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2025-10-03 7:11 UTC (permalink / raw)
To: Sobin Thomas; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 1081 bytes --]
== Series Details ==
Series: tests/intel/xe_compute_preempt: Compute preemption check
URL : https://patchwork.freedesktop.org/series/155359/
State : failure
== Summary ==
CI Bug Log - changes from XEIGT_8572_BAT -> XEIGTPW_13856_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (11 -> 11)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* IGT: IGT_8572 -> IGTPW_13856
* Linux: xe-3858-591ba5707c230e4a62c634450ce492118fe25948 -> xe-3861-2f24a052341862b0f13a2016d2b8afc7be4bf64f
IGTPW_13856: 2b6c459a67e85eb724912faf8a0d3ed4e0b870c0 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8572: 8572
xe-3858-591ba5707c230e4a62c634450ce492118fe25948: 591ba5707c230e4a62c634450ce492118fe25948
xe-3861-2f24a052341862b0f13a2016d2b8afc7be4bf64f: 2f24a052341862b0f13a2016d2b8afc7be4bf64f
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/index.html
[-- Attachment #2: Type: text/html, Size: 1640 bytes --]
^ permalink raw reply [flat|nested] 12+ messages in thread
* ✗ i915.CI.BAT: failure for tests/intel/xe_compute_preempt: Compute preemption check
2025-10-03 5:26 [PATCH i-g-t v9 0/3] tests/intel/xe_compute_preempt: Compute preemption check Sobin Thomas
` (4 preceding siblings ...)
2025-10-03 7:11 ` ✗ Xe.CI.BAT: failure " Patchwork
@ 2025-10-03 7:26 ` Patchwork
2025-10-03 8:43 ` ✗ Xe.CI.Full: " Patchwork
6 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2025-10-03 7:26 UTC (permalink / raw)
To: Sobin Thomas; +Cc: igt-dev
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== Series Details ==
Series: tests/intel/xe_compute_preempt: Compute preemption check
URL : https://patchwork.freedesktop.org/series/155359/
State : failure
== Summary ==
CI Bug Log - changes from IGT_8572 -> IGTPW_13856
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with IGTPW_13856 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_13856, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13856/index.html
Participating hosts (44 -> 43)
------------------------------
Missing (1): fi-snb-2520m
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_13856:
### IGT changes ###
#### Possible regressions ####
* igt@gem_exec_fence@basic-await:
- bat-dg2-14: [PASS][1] -> [FAIL][2] +1 other test fail
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8572/bat-dg2-14/igt@gem_exec_fence@basic-await.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13856/bat-dg2-14/igt@gem_exec_fence@basic-await.html
* igt@i915_selftest@live@guc_multi_lrc:
- bat-arlh-2: [PASS][3] -> [INCOMPLETE][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8572/bat-arlh-2/igt@i915_selftest@live@guc_multi_lrc.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13856/bat-arlh-2/igt@i915_selftest@live@guc_multi_lrc.html
Known issues
------------
Here are the changes found in IGTPW_13856 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@dmabuf@all-tests@dma_fence_chain:
- fi-bsw-nick: [PASS][5] -> [ABORT][6] ([i915#12904]) +1 other test abort
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8572/fi-bsw-nick/igt@dmabuf@all-tests@dma_fence_chain.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13856/fi-bsw-nick/igt@dmabuf@all-tests@dma_fence_chain.html
* igt@i915_selftest@live:
- bat-arlh-2: [PASS][7] -> [INCOMPLETE][8] ([i915#14803] / [i915#14838])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8572/bat-arlh-2/igt@i915_selftest@live.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13856/bat-arlh-2/igt@i915_selftest@live.html
* igt@i915_selftest@live@workarounds:
- bat-arlh-3: [PASS][9] -> [DMESG-FAIL][10] ([i915#12061]) +1 other test dmesg-fail
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8572/bat-arlh-3/igt@i915_selftest@live@workarounds.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13856/bat-arlh-3/igt@i915_selftest@live@workarounds.html
- bat-dg2-9: [PASS][11] -> [DMESG-FAIL][12] ([i915#12061]) +1 other test dmesg-fail
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8572/bat-dg2-9/igt@i915_selftest@live@workarounds.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13856/bat-dg2-9/igt@i915_selftest@live@workarounds.html
#### Possible fixes ####
* igt@dmabuf@all-tests@dma_fence_chain:
- fi-bsw-n3050: [ABORT][13] ([i915#12904]) -> [PASS][14] +1 other test pass
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8572/fi-bsw-n3050/igt@dmabuf@all-tests@dma_fence_chain.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13856/fi-bsw-n3050/igt@dmabuf@all-tests@dma_fence_chain.html
[i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
[i915#12904]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12904
[i915#14803]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14803
[i915#14838]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14838
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_8572 -> IGTPW_13856
* Linux: CI_DRM_17300 -> CI_DRM_17302
CI-20190529: 20190529
CI_DRM_17300: 0aa5ad66ed77cd8c3bb9fb01997f68f31200f434 @ git://anongit.freedesktop.org/gfx-ci/linux
CI_DRM_17302: 2f24a052341862b0f13a2016d2b8afc7be4bf64f @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_13856: 2b6c459a67e85eb724912faf8a0d3ed4e0b870c0 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8572: 8572
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_13856/index.html
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^ permalink raw reply [flat|nested] 12+ messages in thread
* ✗ Xe.CI.Full: failure for tests/intel/xe_compute_preempt: Compute preemption check
2025-10-03 5:26 [PATCH i-g-t v9 0/3] tests/intel/xe_compute_preempt: Compute preemption check Sobin Thomas
` (5 preceding siblings ...)
2025-10-03 7:26 ` ✗ i915.CI.BAT: " Patchwork
@ 2025-10-03 8:43 ` Patchwork
6 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2025-10-03 8:43 UTC (permalink / raw)
To: Sobin Thomas; +Cc: igt-dev
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== Series Details ==
Series: tests/intel/xe_compute_preempt: Compute preemption check
URL : https://patchwork.freedesktop.org/series/155359/
State : failure
== Summary ==
CI Bug Log - changes from XEIGT_8572_FULL -> XEIGTPW_13856_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with XEIGTPW_13856_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in XEIGTPW_13856_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (4 -> 3)
------------------------------
Missing (1): shard-adlp
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in XEIGTPW_13856_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@xe_exec_balancer@many-execqueues-cm-virtual-basic:
- shard-bmg: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-bmg-2/igt@xe_exec_balancer@many-execqueues-cm-virtual-basic.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-6/igt@xe_exec_balancer@many-execqueues-cm-virtual-basic.html
#### Warnings ####
* igt@xe_compute_preempt@compute-preempt-many:
- shard-dg2-set2: [FAIL][3] ([Intel XE#5890]) -> [SKIP][4] +1 other test skip
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-dg2-433/igt@xe_compute_preempt@compute-preempt-many.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-436/igt@xe_compute_preempt@compute-preempt-many.html
* igt@xe_compute_preempt@compute-threadgroup-preempt:
- shard-dg2-set2: [SKIP][5] ([Intel XE#1280] / [Intel XE#455]) -> [SKIP][6]
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-dg2-434/igt@xe_compute_preempt@compute-threadgroup-preempt.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-466/igt@xe_compute_preempt@compute-threadgroup-preempt.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@xe_compute_preempt@compute-preempt-many-vram-evict}:
- shard-dg2-set2: [FAIL][7] ([Intel XE#5890]) -> [SKIP][8] +1 other test skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-dg2-435/igt@xe_compute_preempt@compute-preempt-many-vram-evict.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-434/igt@xe_compute_preempt@compute-preempt-many-vram-evict.html
Known issues
------------
Here are the changes found in XEIGTPW_13856_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_async_flips@async-flip-with-page-flip-events-linear-atomic@pipe-c-edp-1:
- shard-lnl: [PASS][9] -> [FAIL][10] ([Intel XE#6054]) +3 other tests fail
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-lnl-1/igt@kms_async_flips@async-flip-with-page-flip-events-linear-atomic@pipe-c-edp-1.html
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-2/igt@kms_async_flips@async-flip-with-page-flip-events-linear-atomic@pipe-c-edp-1.html
* igt@kms_async_flips@async-flip-with-page-flip-events-linear@pipe-c-edp-1:
- shard-lnl: [PASS][11] -> [FAIL][12] ([Intel XE#5993]) +3 other tests fail
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-lnl-7/igt@kms_async_flips@async-flip-with-page-flip-events-linear@pipe-c-edp-1.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-7/igt@kms_async_flips@async-flip-with-page-flip-events-linear@pipe-c-edp-1.html
* igt@kms_big_fb@x-tiled-64bpp-rotate-270:
- shard-bmg: NOTRUN -> [SKIP][13] ([Intel XE#2327]) +1 other test skip
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-4/igt@kms_big_fb@x-tiled-64bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-64bpp-rotate-90:
- shard-bmg: NOTRUN -> [SKIP][14] ([Intel XE#1124]) +6 other tests skip
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-2/igt@kms_big_fb@y-tiled-64bpp-rotate-90.html
* igt@kms_big_fb@yf-tiled-addfb:
- shard-bmg: NOTRUN -> [SKIP][15] ([Intel XE#2328])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-2/igt@kms_big_fb@yf-tiled-addfb.html
* igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
- shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#607])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-1/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
- shard-dg2-set2: NOTRUN -> [SKIP][17] ([Intel XE#1124]) +6 other tests skip
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-466/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
- shard-lnl: NOTRUN -> [SKIP][18] ([Intel XE#1124]) +4 other tests skip
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-5/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
* igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p:
- shard-bmg: [PASS][19] -> [SKIP][20] ([Intel XE#2314] / [Intel XE#2894])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-bmg-8/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html
* igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p:
- shard-lnl: NOTRUN -> [SKIP][21] ([Intel XE#2191])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-7/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html
* igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p:
- shard-bmg: NOTRUN -> [SKIP][22] ([Intel XE#2314] / [Intel XE#2894])
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-4/igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p.html
- shard-dg2-set2: NOTRUN -> [SKIP][23] ([Intel XE#2191])
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-463/igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p.html
* igt@kms_bw@linear-tiling-3-displays-2160x1440p:
- shard-dg2-set2: NOTRUN -> [SKIP][24] ([Intel XE#367])
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-466/igt@kms_bw@linear-tiling-3-displays-2160x1440p.html
- shard-lnl: NOTRUN -> [SKIP][25] ([Intel XE#367])
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-1/igt@kms_bw@linear-tiling-3-displays-2160x1440p.html
* igt@kms_bw@linear-tiling-4-displays-1920x1080p:
- shard-bmg: NOTRUN -> [SKIP][26] ([Intel XE#367])
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-8/igt@kms_bw@linear-tiling-4-displays-1920x1080p.html
* igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs:
- shard-dg2-set2: NOTRUN -> [SKIP][27] ([Intel XE#2907])
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-466/igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs@pipe-c-edp-1:
- shard-lnl: NOTRUN -> [SKIP][28] ([Intel XE#2669]) +3 other tests skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-5/igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs@pipe-c-edp-1.html
* igt@kms_ccs@crc-primary-basic-yf-tiled-ccs@pipe-d-dp-2:
- shard-dg2-set2: NOTRUN -> [SKIP][29] ([Intel XE#455] / [Intel XE#787]) +20 other tests skip
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-432/igt@kms_ccs@crc-primary-basic-yf-tiled-ccs@pipe-d-dp-2.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [SKIP][30] ([Intel XE#2652] / [Intel XE#787]) +12 other tests skip
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-dp-2.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs:
- shard-bmg: NOTRUN -> [SKIP][31] ([Intel XE#3432]) +1 other test skip
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs.html
- shard-lnl: NOTRUN -> [SKIP][32] ([Intel XE#3432])
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-7/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc:
- shard-bmg: NOTRUN -> [SKIP][33] ([Intel XE#2887]) +12 other tests skip
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-6/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-2:
- shard-dg2-set2: NOTRUN -> [SKIP][34] ([Intel XE#787]) +111 other tests skip
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-432/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-2.html
* igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs:
- shard-lnl: NOTRUN -> [SKIP][35] ([Intel XE#2887]) +5 other tests skip
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-3/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs.html
* igt@kms_cdclk@mode-transition-all-outputs:
- shard-bmg: NOTRUN -> [SKIP][36] ([Intel XE#2724])
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-8/igt@kms_cdclk@mode-transition-all-outputs.html
* igt@kms_cdclk@mode-transition@pipe-a-dp-2:
- shard-dg2-set2: NOTRUN -> [SKIP][37] ([Intel XE#4417]) +3 other tests skip
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-432/igt@kms_cdclk@mode-transition@pipe-a-dp-2.html
* igt@kms_chamelium_color@ctm-0-50:
- shard-bmg: NOTRUN -> [SKIP][38] ([Intel XE#2325]) +2 other tests skip
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-1/igt@kms_chamelium_color@ctm-0-50.html
* igt@kms_chamelium_color@ctm-green-to-red:
- shard-dg2-set2: NOTRUN -> [SKIP][39] ([Intel XE#306])
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-434/igt@kms_chamelium_color@ctm-green-to-red.html
* igt@kms_chamelium_color@gamma:
- shard-lnl: NOTRUN -> [SKIP][40] ([Intel XE#306]) +1 other test skip
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-4/igt@kms_chamelium_color@gamma.html
* igt@kms_chamelium_edid@dp-edid-resolution-list:
- shard-bmg: NOTRUN -> [SKIP][41] ([Intel XE#2252]) +4 other tests skip
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-6/igt@kms_chamelium_edid@dp-edid-resolution-list.html
* igt@kms_chamelium_hpd@common-hpd-after-suspend:
- shard-dg2-set2: NOTRUN -> [SKIP][42] ([Intel XE#373]) +1 other test skip
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-436/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
- shard-lnl: NOTRUN -> [SKIP][43] ([Intel XE#373])
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-2/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
* igt@kms_content_protection@content-type-change:
- shard-bmg: NOTRUN -> [SKIP][44] ([Intel XE#2341]) +1 other test skip
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-4/igt@kms_content_protection@content-type-change.html
* igt@kms_content_protection@legacy@pipe-a-dp-2:
- shard-dg2-set2: NOTRUN -> [FAIL][45] ([Intel XE#1178])
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-432/igt@kms_content_protection@legacy@pipe-a-dp-2.html
* igt@kms_content_protection@srm:
- shard-bmg: NOTRUN -> [FAIL][46] ([Intel XE#1178]) +2 other tests fail
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-1/igt@kms_content_protection@srm.html
* igt@kms_content_protection@uevent:
- shard-lnl: NOTRUN -> [SKIP][47] ([Intel XE#3278])
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-1/igt@kms_content_protection@uevent.html
* igt@kms_content_protection@uevent@pipe-a-dp-2:
- shard-dg2-set2: NOTRUN -> [FAIL][48] ([Intel XE#1188])
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-432/igt@kms_content_protection@uevent@pipe-a-dp-2.html
* igt@kms_cursor_crc@cursor-offscreen-64x21:
- shard-lnl: NOTRUN -> [SKIP][49] ([Intel XE#1424]) +1 other test skip
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-8/igt@kms_cursor_crc@cursor-offscreen-64x21.html
* igt@kms_cursor_crc@cursor-onscreen-512x512:
- shard-bmg: NOTRUN -> [SKIP][50] ([Intel XE#2321])
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-6/igt@kms_cursor_crc@cursor-onscreen-512x512.html
* igt@kms_cursor_crc@cursor-random-256x85:
- shard-bmg: NOTRUN -> [SKIP][51] ([Intel XE#2320]) +4 other tests skip
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-5/igt@kms_cursor_crc@cursor-random-256x85.html
* igt@kms_cursor_crc@cursor-sliding-512x170:
- shard-dg2-set2: NOTRUN -> [SKIP][52] ([Intel XE#308])
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-433/igt@kms_cursor_crc@cursor-sliding-512x170.html
- shard-lnl: NOTRUN -> [SKIP][53] ([Intel XE#2321])
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-3/igt@kms_cursor_crc@cursor-sliding-512x170.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-legacy:
- shard-bmg: [PASS][54] -> [SKIP][55] ([Intel XE#2291]) +2 other tests skip
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-bmg-3/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size:
- shard-lnl: NOTRUN -> [SKIP][56] ([Intel XE#309]) +1 other test skip
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-2/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
* igt@kms_dsc@dsc-basic:
- shard-bmg: NOTRUN -> [SKIP][57] ([Intel XE#2244])
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-3/igt@kms_dsc@dsc-basic.html
* igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests:
- shard-bmg: NOTRUN -> [SKIP][58] ([Intel XE#4422])
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-2/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests.html
* igt@kms_feature_discovery@chamelium:
- shard-lnl: NOTRUN -> [SKIP][59] ([Intel XE#701])
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-7/igt@kms_feature_discovery@chamelium.html
* igt@kms_feature_discovery@display-4x:
- shard-bmg: NOTRUN -> [SKIP][60] ([Intel XE#1138])
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-2/igt@kms_feature_discovery@display-4x.html
- shard-dg2-set2: NOTRUN -> [SKIP][61] ([Intel XE#1138])
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-463/igt@kms_feature_discovery@display-4x.html
* igt@kms_flip@2x-plain-flip-fb-recreate:
- shard-bmg: [PASS][62] -> [SKIP][63] ([Intel XE#2316]) +7 other tests skip
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-bmg-2/igt@kms_flip@2x-plain-flip-fb-recreate.html
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-6/igt@kms_flip@2x-plain-flip-fb-recreate.html
* igt@kms_flip@2x-plain-flip-interruptible:
- shard-bmg: NOTRUN -> [SKIP][64] ([Intel XE#2316]) +1 other test skip
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-6/igt@kms_flip@2x-plain-flip-interruptible.html
* igt@kms_flip@2x-plain-flip-ts-check:
- shard-lnl: NOTRUN -> [SKIP][65] ([Intel XE#1421]) +3 other tests skip
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-5/igt@kms_flip@2x-plain-flip-ts-check.html
* igt@kms_flip@flip-vs-suspend@d-dp4:
- shard-dg2-set2: [PASS][66] -> [INCOMPLETE][67] ([Intel XE#2049] / [Intel XE#2597]) +1 other test incomplete
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-dg2-436/igt@kms_flip@flip-vs-suspend@d-dp4.html
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-433/igt@kms_flip@flip-vs-suspend@d-dp4.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling:
- shard-bmg: NOTRUN -> [SKIP][68] ([Intel XE#2293] / [Intel XE#2380]) +2 other tests skip
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-6/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling:
- shard-dg2-set2: NOTRUN -> [SKIP][69] ([Intel XE#455]) +2 other tests skip
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-466/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling.html
- shard-lnl: NOTRUN -> [SKIP][70] ([Intel XE#1401] / [Intel XE#1745])
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-4/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling@pipe-a-default-mode:
- shard-lnl: NOTRUN -> [SKIP][71] ([Intel XE#1401])
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-4/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling:
- shard-lnl: NOTRUN -> [SKIP][72] ([Intel XE#1397] / [Intel XE#1745])
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-4/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-default-mode:
- shard-lnl: NOTRUN -> [SKIP][73] ([Intel XE#1397])
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-4/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling@pipe-a-valid-mode:
- shard-bmg: NOTRUN -> [SKIP][74] ([Intel XE#2293]) +2 other tests skip
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-6/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling@pipe-a-valid-mode.html
* igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-onoff:
- shard-lnl: NOTRUN -> [SKIP][75] ([Intel XE#651]) +1 other test skip
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-8/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-onoff.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen:
- shard-dg2-set2: NOTRUN -> [SKIP][76] ([Intel XE#651]) +8 other tests skip
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-432/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen.html
- shard-lnl: NOTRUN -> [SKIP][77] ([Intel XE#656]) +13 other tests skip
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-1/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][78] ([Intel XE#5390]) +8 other tests skip
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][79] ([Intel XE#2312]) +1 other test skip
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-rte:
- shard-bmg: NOTRUN -> [SKIP][80] ([Intel XE#5427])
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-rte.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][81] ([Intel XE#2311]) +20 other tests skip
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-indfb-plflip-blt:
- shard-bmg: NOTRUN -> [SKIP][82] ([Intel XE#2313]) +21 other tests skip
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-slowdraw:
- shard-dg2-set2: NOTRUN -> [SKIP][83] ([Intel XE#653]) +9 other tests skip
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-435/igt@kms_frontbuffer_tracking@fbcpsr-slowdraw.html
* igt@kms_hdr@static-swap:
- shard-bmg: [PASS][84] -> [SKIP][85] ([Intel XE#1503])
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-bmg-5/igt@kms_hdr@static-swap.html
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-6/igt@kms_hdr@static-swap.html
* igt@kms_plane@pixel-format-source-clamping@pipe-a-plane-0:
- shard-lnl: NOTRUN -> [FAIL][86] ([Intel XE#5195]) +2 other tests fail
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-1/igt@kms_plane@pixel-format-source-clamping@pipe-a-plane-0.html
* igt@kms_plane_multiple@2x-tiling-y:
- shard-lnl: NOTRUN -> [SKIP][87] ([Intel XE#4596])
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-8/igt@kms_plane_multiple@2x-tiling-y.html
* igt@kms_plane_scaling@intel-max-src-size:
- shard-bmg: NOTRUN -> [SKIP][88] ([Intel XE#2685] / [Intel XE#3307])
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-6/igt@kms_plane_scaling@intel-max-src-size.html
* igt@kms_plane_scaling@plane-downscale-factor-0-5-with-modifiers:
- shard-lnl: NOTRUN -> [SKIP][89] ([Intel XE#2763]) +7 other tests skip
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-3/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-modifiers.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-a:
- shard-bmg: NOTRUN -> [SKIP][90] ([Intel XE#2763]) +4 other tests skip
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-8/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-a.html
* igt@kms_pm_dc@dc5-psr:
- shard-lnl: [PASS][91] -> [FAIL][92] ([Intel XE#718])
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-lnl-8/igt@kms_pm_dc@dc5-psr.html
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-7/igt@kms_pm_dc@dc5-psr.html
* igt@kms_pm_dc@deep-pkgc:
- shard-dg2-set2: NOTRUN -> [SKIP][93] ([Intel XE#908])
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-463/igt@kms_pm_dc@deep-pkgc.html
- shard-lnl: NOTRUN -> [FAIL][94] ([Intel XE#2029])
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-3/igt@kms_pm_dc@deep-pkgc.html
* igt@kms_pm_rpm@dpms-lpsp:
- shard-bmg: NOTRUN -> [SKIP][95] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#836])
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-2/igt@kms_pm_rpm@dpms-lpsp.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf:
- shard-lnl: NOTRUN -> [SKIP][96] ([Intel XE#1406] / [Intel XE#2893] / [Intel XE#4608])
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-7/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf@pipe-b-edp-1:
- shard-lnl: NOTRUN -> [SKIP][97] ([Intel XE#1406] / [Intel XE#4608]) +1 other test skip
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-7/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf@pipe-b-edp-1.html
* igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf:
- shard-bmg: NOTRUN -> [SKIP][98] ([Intel XE#1406] / [Intel XE#1489]) +5 other tests skip
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-2/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf.html
* igt@kms_psr2_sf@psr2-overlay-primary-update-sf-dmg-area:
- shard-dg2-set2: NOTRUN -> [SKIP][99] ([Intel XE#1406] / [Intel XE#1489]) +1 other test skip
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-436/igt@kms_psr2_sf@psr2-overlay-primary-update-sf-dmg-area.html
* igt@kms_psr2_su@page_flip-nv12:
- shard-bmg: NOTRUN -> [SKIP][100] ([Intel XE#1406] / [Intel XE#2387])
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-6/igt@kms_psr2_su@page_flip-nv12.html
* igt@kms_psr@fbc-psr2-sprite-render:
- shard-lnl: NOTRUN -> [SKIP][101] ([Intel XE#1406]) +1 other test skip
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-4/igt@kms_psr@fbc-psr2-sprite-render.html
* igt@kms_psr@fbc-psr2-sprite-render@edp-1:
- shard-lnl: NOTRUN -> [SKIP][102] ([Intel XE#1406] / [Intel XE#4609])
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-4/igt@kms_psr@fbc-psr2-sprite-render@edp-1.html
* igt@kms_psr@pr-sprite-render:
- shard-bmg: NOTRUN -> [SKIP][103] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +4 other tests skip
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-1/igt@kms_psr@pr-sprite-render.html
* igt@kms_psr@psr2-primary-render:
- shard-dg2-set2: NOTRUN -> [SKIP][104] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +2 other tests skip
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-434/igt@kms_psr@psr2-primary-render.html
- shard-bmg: NOTRUN -> [SKIP][105] ([Intel XE#1406] / [Intel XE#2234])
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-1/igt@kms_psr@psr2-primary-render.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
- shard-bmg: NOTRUN -> [SKIP][106] ([Intel XE#2330])
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-4/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html
* igt@kms_rotation_crc@sprite-rotation-90-pos-100-0:
- shard-bmg: NOTRUN -> [SKIP][107] ([Intel XE#3414] / [Intel XE#3904]) +2 other tests skip
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-7/igt@kms_rotation_crc@sprite-rotation-90-pos-100-0.html
* igt@kms_setmode@basic-clone-single-crtc:
- shard-bmg: NOTRUN -> [SKIP][108] ([Intel XE#1435])
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-7/igt@kms_setmode@basic-clone-single-crtc.html
* igt@kms_vrr@cmrr@pipe-a-edp-1:
- shard-lnl: [PASS][109] -> [FAIL][110] ([Intel XE#4459]) +1 other test fail
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-lnl-5/igt@kms_vrr@cmrr@pipe-a-edp-1.html
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-8/igt@kms_vrr@cmrr@pipe-a-edp-1.html
* igt@kms_vrr@seamless-rr-switch-virtual:
- shard-bmg: NOTRUN -> [SKIP][111] ([Intel XE#1499]) +1 other test skip
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-4/igt@kms_vrr@seamless-rr-switch-virtual.html
* igt@xe_eu_stall@unprivileged-access:
- shard-dg2-set2: NOTRUN -> [SKIP][112] ([Intel XE#5626])
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-434/igt@xe_eu_stall@unprivileged-access.html
* igt@xe_eudebug@basic-connect:
- shard-lnl: NOTRUN -> [SKIP][113] ([Intel XE#4837]) +6 other tests skip
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-4/igt@xe_eudebug@basic-connect.html
* igt@xe_eudebug_online@interrupt-other:
- shard-bmg: NOTRUN -> [SKIP][114] ([Intel XE#4837]) +6 other tests skip
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-8/igt@xe_eudebug_online@interrupt-other.html
* igt@xe_eudebug_online@writes-caching-sram-bb-vram-target-sram:
- shard-dg2-set2: NOTRUN -> [SKIP][115] ([Intel XE#4837]) +4 other tests skip
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-463/igt@xe_eudebug_online@writes-caching-sram-bb-vram-target-sram.html
* igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-reopen:
- shard-lnl: NOTRUN -> [SKIP][116] ([Intel XE#688]) +2 other tests skip
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-5/igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-reopen.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race:
- shard-bmg: NOTRUN -> [SKIP][117] ([Intel XE#2322]) +5 other tests skip
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-2/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-rebind:
- shard-lnl: NOTRUN -> [SKIP][118] ([Intel XE#1392])
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-1/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-rebind.html
* igt@xe_exec_basic@multigpu-no-exec-userptr-invalidate-race:
- shard-dg2-set2: [PASS][119] -> [SKIP][120] ([Intel XE#1392]) +3 other tests skip
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-dg2-434/igt@xe_exec_basic@multigpu-no-exec-userptr-invalidate-race.html
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-463/igt@xe_exec_basic@multigpu-no-exec-userptr-invalidate-race.html
* igt@xe_exec_fault_mode@many-execqueues-userptr-invalidate-imm:
- shard-dg2-set2: NOTRUN -> [SKIP][121] ([Intel XE#288]) +6 other tests skip
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-436/igt@xe_exec_fault_mode@many-execqueues-userptr-invalidate-imm.html
* igt@xe_exec_reset@parallel-gt-reset:
- shard-bmg: NOTRUN -> [DMESG-WARN][122] ([Intel XE#3876])
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-6/igt@xe_exec_reset@parallel-gt-reset.html
* igt@xe_exec_system_allocator@threads-many-large-execqueues-mmap-new-huge-nomemset:
- shard-lnl: NOTRUN -> [SKIP][123] ([Intel XE#4943]) +7 other tests skip
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-3/igt@xe_exec_system_allocator@threads-many-large-execqueues-mmap-new-huge-nomemset.html
* igt@xe_exec_system_allocator@threads-many-stride-mmap-shared:
- shard-dg2-set2: NOTRUN -> [SKIP][124] ([Intel XE#4915]) +74 other tests skip
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-466/igt@xe_exec_system_allocator@threads-many-stride-mmap-shared.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-stride-malloc-multi-fault:
- shard-dg2-set2: NOTRUN -> [INCOMPLETE][125] ([Intel XE#2594])
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-436/igt@xe_exec_system_allocator@threads-shared-vm-many-stride-malloc-multi-fault.html
* igt@xe_exec_system_allocator@twice-mmap-huge:
- shard-bmg: NOTRUN -> [SKIP][126] ([Intel XE#4943]) +15 other tests skip
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-2/igt@xe_exec_system_allocator@twice-mmap-huge.html
* igt@xe_exec_threads@threads-mixed-userptr-rebind:
- shard-bmg: [PASS][127] -> [DMESG-FAIL][128] ([Intel XE#3876])
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-bmg-2/igt@xe_exec_threads@threads-mixed-userptr-rebind.html
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-6/igt@xe_exec_threads@threads-mixed-userptr-rebind.html
* igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit:
- shard-lnl: NOTRUN -> [SKIP][129] ([Intel XE#2229])
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-8/igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit.html
* igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit:
- shard-bmg: NOTRUN -> [SKIP][130] ([Intel XE#2229])
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-8/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html
* igt@xe_mmap@small-bar:
- shard-bmg: NOTRUN -> [SKIP][131] ([Intel XE#586])
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-6/igt@xe_mmap@small-bar.html
* igt@xe_module_load@force-load:
- shard-bmg: NOTRUN -> [SKIP][132] ([Intel XE#2457])
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-5/igt@xe_module_load@force-load.html
* igt@xe_oa@mi-rpc:
- shard-dg2-set2: NOTRUN -> [SKIP][133] ([Intel XE#3573]) +1 other test skip
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-464/igt@xe_oa@mi-rpc.html
* igt@xe_peer2peer@read:
- shard-bmg: NOTRUN -> [SKIP][134] ([Intel XE#2427])
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-6/igt@xe_peer2peer@read.html
* igt@xe_pm@d3cold-multiple-execs:
- shard-bmg: NOTRUN -> [SKIP][135] ([Intel XE#2284])
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-5/igt@xe_pm@d3cold-multiple-execs.html
- shard-dg2-set2: NOTRUN -> [SKIP][136] ([Intel XE#2284] / [Intel XE#366])
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-433/igt@xe_pm@d3cold-multiple-execs.html
- shard-lnl: NOTRUN -> [SKIP][137] ([Intel XE#2284] / [Intel XE#366])
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-3/igt@xe_pm@d3cold-multiple-execs.html
* igt@xe_pmu@gt-frequency:
- shard-dg2-set2: [PASS][138] -> [FAIL][139] ([Intel XE#4819]) +1 other test fail
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-dg2-434/igt@xe_pmu@gt-frequency.html
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-432/igt@xe_pmu@gt-frequency.html
* igt@xe_pxp@pxp-src-to-pxp-dest-rendercopy:
- shard-bmg: NOTRUN -> [SKIP][140] ([Intel XE#4733]) +2 other tests skip
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-2/igt@xe_pxp@pxp-src-to-pxp-dest-rendercopy.html
- shard-dg2-set2: NOTRUN -> [SKIP][141] ([Intel XE#4733])
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-463/igt@xe_pxp@pxp-src-to-pxp-dest-rendercopy.html
* igt@xe_sriov_auto_provisioning@selfconfig-basic:
- shard-bmg: NOTRUN -> [FAIL][142] ([Intel XE#5937]) +1 other test fail
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-1/igt@xe_sriov_auto_provisioning@selfconfig-basic.html
#### Possible fixes ####
* igt@kms_big_fb@linear-8bpp-rotate-0:
- shard-lnl: [ABORT][143] ([Intel XE#4760]) -> [PASS][144]
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-lnl-4/igt@kms_big_fb@linear-8bpp-rotate-0.html
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-1/igt@kms_big_fb@linear-8bpp-rotate-0.html
* igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p:
- shard-bmg: [SKIP][145] ([Intel XE#2314] / [Intel XE#2894]) -> [PASS][146] +1 other test pass
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-5/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size:
- shard-bmg: [SKIP][147] ([Intel XE#2291]) -> [PASS][148] +7 other tests pass
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-2/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@flip-vs-cursor-varying-size:
- shard-dg2-set2: [INCOMPLETE][149] ([Intel XE#3226]) -> [PASS][150]
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-dg2-434/igt@kms_cursor_legacy@flip-vs-cursor-varying-size.html
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-466/igt@kms_cursor_legacy@flip-vs-cursor-varying-size.html
* igt@kms_feature_discovery@display-2x:
- shard-bmg: [SKIP][151] ([Intel XE#2373]) -> [PASS][152]
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-bmg-6/igt@kms_feature_discovery@display-2x.html
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-3/igt@kms_feature_discovery@display-2x.html
* igt@kms_flip@2x-flip-vs-dpms:
- shard-bmg: [SKIP][153] ([Intel XE#2316]) -> [PASS][154] +6 other tests pass
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-bmg-6/igt@kms_flip@2x-flip-vs-dpms.html
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-4/igt@kms_flip@2x-flip-vs-dpms.html
* igt@kms_plane_cursor@overlay@pipe-a-hdmi-a-6-size-64:
- shard-dg2-set2: [FAIL][155] ([Intel XE#616]) -> [PASS][156] +1 other test pass
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-dg2-435/igt@kms_plane_cursor@overlay@pipe-a-hdmi-a-6-size-64.html
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-464/igt@kms_plane_cursor@overlay@pipe-a-hdmi-a-6-size-64.html
* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- shard-lnl: [SKIP][157] ([Intel XE#1406] / [Intel XE#4692]) -> [PASS][158]
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-lnl-5/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-4/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
* igt@xe_exec_basic@multigpu-once-bindexecqueue:
- shard-dg2-set2: [SKIP][159] ([Intel XE#1392]) -> [PASS][160] +2 other tests pass
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-dg2-432/igt@xe_exec_basic@multigpu-once-bindexecqueue.html
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-435/igt@xe_exec_basic@multigpu-once-bindexecqueue.html
* {igt@xe_exec_system_allocator@many-64k-new-prefetch}:
- shard-lnl: [CRASH][161] ([Intel XE#6192]) -> [PASS][162] +6 other tests pass
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-lnl-1/igt@xe_exec_system_allocator@many-64k-new-prefetch.html
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-lnl-8/igt@xe_exec_system_allocator@many-64k-new-prefetch.html
* {igt@xe_exec_system_allocator@many-large-execqueues-new-prefetch}:
- shard-bmg: [CRASH][163] ([Intel XE#6192]) -> [PASS][164] +12 other tests pass
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-bmg-4/igt@xe_exec_system_allocator@many-large-execqueues-new-prefetch.html
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-4/igt@xe_exec_system_allocator@many-large-execqueues-new-prefetch.html
* {igt@xe_exec_system_allocator@threads-many-execqueues-mmap-prefetch}:
- shard-bmg: [WARN][165] ([Intel XE#5786]) -> [PASS][166]
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-bmg-7/igt@xe_exec_system_allocator@threads-many-execqueues-mmap-prefetch.html
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-2/igt@xe_exec_system_allocator@threads-many-execqueues-mmap-prefetch.html
#### Warnings ####
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs:
- shard-dg2-set2: [INCOMPLETE][167] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345] / [Intel XE#4522]) -> [INCOMPLETE][168] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4345])
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-dp-4:
- shard-dg2-set2: [INCOMPLETE][169] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522]) -> [INCOMPLETE][170] ([Intel XE#1727] / [Intel XE#3113] / [i915#14968])
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-dp-4.html
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-dp-4.html
* igt@kms_content_protection@legacy:
- shard-bmg: [SKIP][171] ([Intel XE#2341]) -> [FAIL][172] ([Intel XE#1178])
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-bmg-6/igt@kms_content_protection@legacy.html
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-1/igt@kms_content_protection@legacy.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt:
- shard-bmg: [SKIP][173] ([Intel XE#2312]) -> [SKIP][174] ([Intel XE#2311]) +11 other tests skip
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][175] ([Intel XE#2311]) -> [SKIP][176] ([Intel XE#2312]) +12 other tests skip
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render:
- shard-bmg: [SKIP][177] ([Intel XE#5390]) -> [SKIP][178] ([Intel XE#2312]) +7 other tests skip
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][179] ([Intel XE#2312]) -> [SKIP][180] ([Intel XE#5390]) +5 other tests skip
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-wc.html
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-onoff:
- shard-bmg: [SKIP][181] ([Intel XE#2312]) -> [SKIP][182] ([Intel XE#2313]) +14 other tests skip
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-onoff.html
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-onoff.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen:
- shard-bmg: [SKIP][183] ([Intel XE#2313]) -> [SKIP][184] ([Intel XE#2312]) +11 other tests skip
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-bmg-1/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen.html
[184]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen.html
* igt@kms_plane_multiple@2x-tiling-y:
- shard-bmg: [SKIP][185] ([Intel XE#4596]) -> [SKIP][186] ([Intel XE#5021])
[185]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-y.html
[186]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-bmg-2/igt@kms_plane_multiple@2x-tiling-y.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-dg2-set2: [SKIP][187] ([Intel XE#362]) -> [FAIL][188] ([Intel XE#1729])
[187]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8572/shard-dg2-463/igt@kms_tiled_display@basic-test-pattern.html
[188]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/shard-dg2-435/igt@kms_tiled_display@basic-test-pattern.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1138
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1188]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1188
[Intel XE#1280]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1280
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1397
[Intel XE#1401]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1401
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
[Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
[Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
[Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745
[Intel XE#2029]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2029
[Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
[Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
[Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
[Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2328]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2328
[Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
[Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
[Intel XE#2373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2373
[Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
[Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
[Intel XE#2427]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2427
[Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
[Intel XE#2594]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2594
[Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2669]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2669
[Intel XE#2685]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2685
[Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
[Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724
[Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
[Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
[Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
[Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
[Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
[Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
[Intel XE#3226]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3226
[Intel XE#3278]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3278
[Intel XE#3307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3307
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
[Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
[Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#3876]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3876
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
[Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
[Intel XE#4417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4417
[Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
[Intel XE#4459]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4459
[Intel XE#4522]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4522
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
[Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608
[Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609
[Intel XE#4692]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4692
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#4760]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4760
[Intel XE#4819]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4819
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
[Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
[Intel XE#5007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5007
[Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
[Intel XE#5195]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5195
[Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
[Intel XE#5427]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5427
[Intel XE#5626]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5626
[Intel XE#5745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5745
[Intel XE#5786]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5786
[Intel XE#586]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/586
[Intel XE#5890]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5890
[Intel XE#5937]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5937
[Intel XE#5993]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5993
[Intel XE#6054]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6054
[Intel XE#607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/607
[Intel XE#616]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/616
[Intel XE#6192]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6192
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#701]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/701
[Intel XE#718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/718
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
[Intel XE#908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/908
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[i915#14968]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14968
Build changes
-------------
* IGT: IGT_8572 -> IGTPW_13856
* Linux: xe-3858-591ba5707c230e4a62c634450ce492118fe25948 -> xe-3861-2f24a052341862b0f13a2016d2b8afc7be4bf64f
IGTPW_13856: 2b6c459a67e85eb724912faf8a0d3ed4e0b870c0 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8572: 8572
xe-3858-591ba5707c230e4a62c634450ce492118fe25948: 591ba5707c230e4a62c634450ce492118fe25948
xe-3861-2f24a052341862b0f13a2016d2b8afc7be4bf64f: 2f24a052341862b0f13a2016d2b8afc7be4bf64f
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_13856/index.html
[-- Attachment #2: Type: text/html, Size: 65858 bytes --]
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH i-g-t v9 1/3] tests/intel/xe_compute_preempt: Compute preemption check
2025-10-03 5:26 ` [PATCH i-g-t v9 1/3] " Sobin Thomas
@ 2025-10-10 8:57 ` Zbigniew Kempczyński
2025-10-10 9:09 ` Zbigniew Kempczyński
1 sibling, 0 replies; 12+ messages in thread
From: Zbigniew Kempczyński @ 2025-10-10 8:57 UTC (permalink / raw)
To: Sobin Thomas; +Cc: igt-dev, kamil.konieczny, priyanka.dandamudi
On Fri, Oct 03, 2025 at 05:26:19AM +0000, Sobin Thomas wrote:
> On platforms (like PVC) that do not support walker mid-thread
> preemption, running tests in forked threads can lead to inconsistent
> states due to igt_skip being called mid-execution. Made changes to
> perform kernel preemption check at the beginning of each subtests.
> If the GPU version does not support the required features, the
> test is skipped gracefully, ensuring consistent behavior across
> different platforms.
>
> v2: Fixed review comments to move the compatibility check
> into the igt_fixture. [Priyanka]
>
> v3: Added check for thread group preemption and WMTP.
> Added enum flags for preemption type as per review . [Zbigniew]
>
> v4: Added check for preempt inside __run_intel_compute_kernel_preempt
> Refactored the code. [priyanka]
>
> v5: Refactor for finding the kernel and out of bound check. [Zbigniew]
>
> v6: Added NULL Check for kernel. [Zbigniew]
>
> v7: Moved TODO inside the code. [kamil]
> Modified the check condition for kernel [Priyanka]
>
> v8: Additional check for the kernel variants
>
> v9: Refactored in to logically related patches
>
> Signed-off-by: Sobin Thomas <sobin.thomas@intel.com>
> ---
> lib/intel_compute.c | 78 ++++++++++++++++++++++++++++----
> lib/intel_compute.h | 11 +++++
> tests/intel/xe_compute_preempt.c | 6 +++
> 3 files changed, 86 insertions(+), 9 deletions(-)
>
> diff --git a/lib/intel_compute.c b/lib/intel_compute.c
> index 147dd2916..ae656a4f6 100644
> --- a/lib/intel_compute.c
> +++ b/lib/intel_compute.c
> @@ -1,7 +1,7 @@
> /* SPDX-License-Identifier: MIT */
> /*
> * Copyright © 2023 Intel Corporation
> - *
> + * TODO: Add kernel for PVC for preemption test
> * Authors:
> * Francois Dugast <francois.dugast@intel.com>
> */
> @@ -2193,40 +2193,72 @@ static const struct {
> bool threadgroup_preemption,
> enum execenv_alloc_prefs alloc_prefs);
> uint32_t compat;
> + enum xe_compute_preempt_type preempt_type;
> } intel_compute_preempt_batches[] = {
> {
> .ip_ver = IP_VER(20, 01),
> .compute_exec = xe2lpg_compute_preempt_exec,
> .compat = COMPAT_DRIVER_XE,
> + .preempt_type = PREEMPT_TGP | PREEMPT_WMTP,
> },
> {
> .ip_ver = IP_VER(20, 04),
> .compute_exec = xe2lpg_compute_preempt_exec,
> .compat = COMPAT_DRIVER_XE,
> + .preempt_type = PREEMPT_TGP | PREEMPT_WMTP,
> },
> {
> .ip_ver = IP_VER(30, 00),
> .compute_exec = xe2lpg_compute_preempt_exec,
> .compat = COMPAT_DRIVER_XE,
> + .preempt_type = PREEMPT_TGP | PREEMPT_WMTP,
> },
> };
>
> +static int find_preempt_batch(unsigned int ip_ver)
> +{
> + for (int batch_idx = 0; batch_idx < ARRAY_SIZE(intel_compute_preempt_batches); batch_idx++)
> + if (ip_ver == intel_compute_preempt_batches[batch_idx].ip_ver)
> + return batch_idx;
> + return -1;
> +}
> +
> +static bool is_preemptable(int batch, enum xe_compute_preempt_type required_preempt)
> +{
> + if (required_preempt &&
> + !(intel_compute_preempt_batches[batch].preempt_type & required_preempt)) {
> + igt_info("Preemption not supported\n");
> + return false;
> + }
> + return true;
> +}
> +
> +static const char *xe_preempt_type_to_str(enum xe_compute_preempt_type type)
> +{
> + switch (type) {
> + case PREEMPT_TGP:
> + return "PREEMPT_TGP";
> + case PREEMPT_WMTP:
> + return "PREEMPT_WMTP";
> + default:
> + return "UNKNOWN_PREEMPT_TYPE";
> + }
> +}
> +
> static bool __run_intel_compute_kernel_preempt(int fd,
> struct drm_xe_engine_class_instance *eci,
> bool threadgroup_preemption,
> enum execenv_alloc_prefs alloc_prefs)
> {
> unsigned int ip_ver = intel_graphics_ver(intel_get_drm_devid(fd));
> - unsigned int batch;
> - const struct intel_compute_kernels *kernels = intel_compute_square_kernels;
> + int batch;
> + const struct intel_compute_kernels *kernel_entries = intel_compute_square_kernels, *kernels;
Unused, produces compilation warning.
> enum intel_driver driver = get_intel_driver(fd);
> + enum xe_compute_preempt_type required_preempt =
> + threadgroup_preemption ? PREEMPT_TGP : PREEMPT_WMTP;
>
> - for (batch = 0; batch < ARRAY_SIZE(intel_compute_preempt_batches); batch++)
> - if (ip_ver == intel_compute_preempt_batches[batch].ip_ver)
> - break;
> -
> -
> - if (batch == ARRAY_SIZE(intel_compute_preempt_batches)) {
> + batch = find_preempt_batch(ip_ver);
> + if (batch < 0) {
> igt_debug("GPU version 0x%x not supported\n", ip_ver);
> return false;
> }
> @@ -2244,6 +2276,9 @@ static bool __run_intel_compute_kernel_preempt(int fd,
> kernels++;
> }
>
> + if (!is_preemptable(batch, required_preempt))
> + return false;
> +
> if (!kernels->kernel || !kernels->sip_kernel || !kernels->long_kernel)
> return 0;
>
> @@ -2260,6 +2295,31 @@ static bool __run_intel_compute_kernel_preempt(int fd,
>
> return true;
> }
> +
> +/**
> + * xe_kernel_preempt_check - Checks IP version to confirm if provided
> + * preempt type is supported.
> + * @fd: file descriptor of the opened DRM Xe device
> + * @required_preempt: Preemption type (WMTP/TGP)
> + *
> + * Returns true on success, false otherwise.
> + */
> +bool xe_kernel_preempt_check(int fd, enum xe_compute_preempt_type required_preempt)
> +{
> + unsigned int ip_ver = intel_graphics_ver(intel_get_drm_devid(fd));
> + int batch = find_preempt_batch(ip_ver);
> +
> + if (batch < 0) {
> + igt_debug("Preemption type %s not supported on GPU version 0x%x\n",
> + xe_preempt_type_to_str(required_preempt), ip_ver);
> + return false;
> + }
> + if (!is_preemptable(batch, required_preempt))
> + return false;
> +
> + return true;
> +}
> +
> /**
> * run_intel_compute_kernel_preempt - runs compute kernels to
> * exercise preemption scenario.
> diff --git a/lib/intel_compute.h b/lib/intel_compute.h
> index 412791d07..6e18d93e9 100644
> --- a/lib/intel_compute.h
> +++ b/lib/intel_compute.h
> @@ -71,6 +71,16 @@ enum execenv_alloc_prefs {
> EXECENV_PREF_VRAM_IF_POSSIBLE,
> };
>
> +/**
> + * enum xe_compute_preempt_type - Types of compute preemption supported.
> + * PREEMPT_TGP: ThreadGroup Preemption
> + * PREEMPT_WMTP: Walker Mid Thread Preemption
> + */
> +enum xe_compute_preempt_type {
> + PREEMPT_TGP = 1 << 0,
> + PREEMPT_WMTP = 1 << 1,
> +};
> +
> extern const struct intel_compute_kernels intel_compute_square_kernels[];
>
> bool run_intel_compute_kernel(int fd, struct user_execenv *user,
> @@ -81,4 +91,5 @@ bool xe_run_intel_compute_kernel_on_engine(int fd, struct drm_xe_engine_class_in
> bool run_intel_compute_kernel_preempt(int fd, struct drm_xe_engine_class_instance *eci,
> bool threadgroup_preemption,
> enum execenv_alloc_prefs alloc_prefs);
> +bool xe_kernel_preempt_check(int fd, enum xe_compute_preempt_type required_preempt);
> #endif /* INTEL_COMPUTE_H */
> diff --git a/tests/intel/xe_compute_preempt.c b/tests/intel/xe_compute_preempt.c
> index c9b194869..076360f1d 100644
> --- a/tests/intel/xe_compute_preempt.c
> +++ b/tests/intel/xe_compute_preempt.c
> @@ -76,6 +76,7 @@ igt_main
> }
>
> igt_subtest_with_dynamic("compute-preempt") {
> + igt_require(xe_kernel_preempt_check(xe, PREEMPT_WMTP));
> xe_for_each_engine(xe, hwe) {
> if (hwe->engine_class != DRM_XE_ENGINE_CLASS_COMPUTE)
> continue;
> @@ -86,6 +87,7 @@ igt_main
> }
>
> igt_subtest_with_dynamic("compute-preempt-many") {
> + igt_require(xe_kernel_preempt_check(xe, PREEMPT_WMTP));
> xe_for_each_engine(xe, hwe) {
> if (hwe->engine_class != DRM_XE_ENGINE_CLASS_COMPUTE)
> continue;
> @@ -112,6 +114,7 @@ igt_main
> igt_subtest_with_dynamic("compute-preempt-many-all-ram") {
> igt_require(swap_mb > CONTEXT_MB * 10);
>
> + igt_require(xe_kernel_preempt_check(xe, PREEMPT_WMTP));
> xe_for_each_engine(xe, hwe) {
> if (hwe->engine_class != DRM_XE_ENGINE_CLASS_COMPUTE)
> continue;
> @@ -138,6 +141,7 @@ igt_main
> igt_subtest_with_dynamic("compute-preempt-many-vram") {
> igt_require(xe_has_vram(xe));
>
> + igt_require(xe_kernel_preempt_check(xe, PREEMPT_WMTP));
> xe_for_each_engine(xe, hwe) {
> if (hwe->engine_class != DRM_XE_ENGINE_CLASS_COMPUTE)
> continue;
> @@ -164,6 +168,7 @@ igt_main
> igt_subtest_with_dynamic("compute-preempt-many-vram-evict") {
> igt_require(xe_has_vram(xe));
>
> + igt_require(xe_kernel_preempt_check(xe, PREEMPT_WMTP));
> xe_for_each_engine(xe, hwe) {
> if (hwe->engine_class != DRM_XE_ENGINE_CLASS_COMPUTE)
> continue;
> @@ -188,6 +193,7 @@ igt_main
> }
>
> igt_subtest_with_dynamic("compute-threadgroup-preempt") {
> + igt_require(xe_kernel_preempt_check(xe, PREEMPT_TGP));
> xe_for_each_engine(xe, hwe) {
> if (hwe->engine_class != DRM_XE_ENGINE_CLASS_COMPUTE)
> continue;
> --
> 2.51.0
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH i-g-t v9 1/3] tests/intel/xe_compute_preempt: Compute preemption check
2025-10-03 5:26 ` [PATCH i-g-t v9 1/3] " Sobin Thomas
2025-10-10 8:57 ` Zbigniew Kempczyński
@ 2025-10-10 9:09 ` Zbigniew Kempczyński
1 sibling, 0 replies; 12+ messages in thread
From: Zbigniew Kempczyński @ 2025-10-10 9:09 UTC (permalink / raw)
To: Sobin Thomas; +Cc: igt-dev, kamil.konieczny, priyanka.dandamudi
On Fri, Oct 03, 2025 at 05:26:19AM +0000, Sobin Thomas wrote:
> On platforms (like PVC) that do not support walker mid-thread
> preemption, running tests in forked threads can lead to inconsistent
> states due to igt_skip being called mid-execution. Made changes to
> perform kernel preemption check at the beginning of each subtests.
> If the GPU version does not support the required features, the
> test is skipped gracefully, ensuring consistent behavior across
> different platforms.
>
> v2: Fixed review comments to move the compatibility check
> into the igt_fixture. [Priyanka]
>
> v3: Added check for thread group preemption and WMTP.
> Added enum flags for preemption type as per review . [Zbigniew]
>
> v4: Added check for preempt inside __run_intel_compute_kernel_preempt
> Refactored the code. [priyanka]
>
> v5: Refactor for finding the kernel and out of bound check. [Zbigniew]
>
> v6: Added NULL Check for kernel. [Zbigniew]
>
> v7: Moved TODO inside the code. [kamil]
> Modified the check condition for kernel [Priyanka]
>
> v8: Additional check for the kernel variants
>
> v9: Refactored in to logically related patches
>
> Signed-off-by: Sobin Thomas <sobin.thomas@intel.com>
> ---
> lib/intel_compute.c | 78 ++++++++++++++++++++++++++++----
> lib/intel_compute.h | 11 +++++
> tests/intel/xe_compute_preempt.c | 6 +++
> 3 files changed, 86 insertions(+), 9 deletions(-)
>
> diff --git a/lib/intel_compute.c b/lib/intel_compute.c
> index 147dd2916..ae656a4f6 100644
> --- a/lib/intel_compute.c
> +++ b/lib/intel_compute.c
> @@ -1,7 +1,7 @@
> /* SPDX-License-Identifier: MIT */
> /*
> * Copyright © 2023 Intel Corporation
> - *
> + * TODO: Add kernel for PVC for preemption test
> * Authors:
> * Francois Dugast <francois.dugast@intel.com>
> */
> @@ -2193,40 +2193,72 @@ static const struct {
> bool threadgroup_preemption,
> enum execenv_alloc_prefs alloc_prefs);
> uint32_t compat;
> + enum xe_compute_preempt_type preempt_type;
> } intel_compute_preempt_batches[] = {
> {
> .ip_ver = IP_VER(20, 01),
> .compute_exec = xe2lpg_compute_preempt_exec,
> .compat = COMPAT_DRIVER_XE,
> + .preempt_type = PREEMPT_TGP | PREEMPT_WMTP,
> },
> {
> .ip_ver = IP_VER(20, 04),
> .compute_exec = xe2lpg_compute_preempt_exec,
> .compat = COMPAT_DRIVER_XE,
> + .preempt_type = PREEMPT_TGP | PREEMPT_WMTP,
> },
> {
> .ip_ver = IP_VER(30, 00),
> .compute_exec = xe2lpg_compute_preempt_exec,
> .compat = COMPAT_DRIVER_XE,
> + .preempt_type = PREEMPT_TGP | PREEMPT_WMTP,
> },
> };
>
> +static int find_preempt_batch(unsigned int ip_ver)
> +{
> + for (int batch_idx = 0; batch_idx < ARRAY_SIZE(intel_compute_preempt_batches); batch_idx++)
> + if (ip_ver == intel_compute_preempt_batches[batch_idx].ip_ver)
> + return batch_idx;
> + return -1;
> +}
> +
> +static bool is_preemptable(int batch, enum xe_compute_preempt_type required_preempt)
> +{
> + if (required_preempt &&
> + !(intel_compute_preempt_batches[batch].preempt_type & required_preempt)) {
> + igt_info("Preemption not supported\n");
I would also remove this igt_info() here allowing caller to decide how
to inform that this preemption is not supported.
> + return false;
> + }
> + return true;
> +}
> +
> +static const char *xe_preempt_type_to_str(enum xe_compute_preempt_type type)
> +{
> + switch (type) {
> + case PREEMPT_TGP:
> + return "PREEMPT_TGP";
> + case PREEMPT_WMTP:
> + return "PREEMPT_WMTP";
> + default:
> + return "UNKNOWN_PREEMPT_TYPE";
> + }
> +}
> +
> static bool __run_intel_compute_kernel_preempt(int fd,
> struct drm_xe_engine_class_instance *eci,
> bool threadgroup_preemption,
> enum execenv_alloc_prefs alloc_prefs)
> {
> unsigned int ip_ver = intel_graphics_ver(intel_get_drm_devid(fd));
> - unsigned int batch;
> - const struct intel_compute_kernels *kernels = intel_compute_square_kernels;
> + int batch;
> + const struct intel_compute_kernels *kernel_entries = intel_compute_square_kernels, *kernels;
> enum intel_driver driver = get_intel_driver(fd);
> + enum xe_compute_preempt_type required_preempt =
> + threadgroup_preemption ? PREEMPT_TGP : PREEMPT_WMTP;
>
> - for (batch = 0; batch < ARRAY_SIZE(intel_compute_preempt_batches); batch++)
> - if (ip_ver == intel_compute_preempt_batches[batch].ip_ver)
> - break;
> -
> -
> - if (batch == ARRAY_SIZE(intel_compute_preempt_batches)) {
> + batch = find_preempt_batch(ip_ver);
> + if (batch < 0) {
> igt_debug("GPU version 0x%x not supported\n", ip_ver);
> return false;
> }
> @@ -2244,6 +2276,9 @@ static bool __run_intel_compute_kernel_preempt(int fd,
> kernels++;
> }
>
> + if (!is_preemptable(batch, required_preempt))
I mean here, similar to if (batch < 0) conditional.
--
Zbigniew
> + return false;
> +
> if (!kernels->kernel || !kernels->sip_kernel || !kernels->long_kernel)
> return 0;
>
> @@ -2260,6 +2295,31 @@ static bool __run_intel_compute_kernel_preempt(int fd,
>
> return true;
> }
> +
> +/**
> + * xe_kernel_preempt_check - Checks IP version to confirm if provided
> + * preempt type is supported.
> + * @fd: file descriptor of the opened DRM Xe device
> + * @required_preempt: Preemption type (WMTP/TGP)
> + *
> + * Returns true on success, false otherwise.
> + */
> +bool xe_kernel_preempt_check(int fd, enum xe_compute_preempt_type required_preempt)
> +{
> + unsigned int ip_ver = intel_graphics_ver(intel_get_drm_devid(fd));
> + int batch = find_preempt_batch(ip_ver);
> +
> + if (batch < 0) {
> + igt_debug("Preemption type %s not supported on GPU version 0x%x\n",
> + xe_preempt_type_to_str(required_preempt), ip_ver);
> + return false;
> + }
> + if (!is_preemptable(batch, required_preempt))
> + return false;
> +
> + return true;
> +}
> +
> /**
> * run_intel_compute_kernel_preempt - runs compute kernels to
> * exercise preemption scenario.
> diff --git a/lib/intel_compute.h b/lib/intel_compute.h
> index 412791d07..6e18d93e9 100644
> --- a/lib/intel_compute.h
> +++ b/lib/intel_compute.h
> @@ -71,6 +71,16 @@ enum execenv_alloc_prefs {
> EXECENV_PREF_VRAM_IF_POSSIBLE,
> };
>
> +/**
> + * enum xe_compute_preempt_type - Types of compute preemption supported.
> + * PREEMPT_TGP: ThreadGroup Preemption
> + * PREEMPT_WMTP: Walker Mid Thread Preemption
> + */
> +enum xe_compute_preempt_type {
> + PREEMPT_TGP = 1 << 0,
> + PREEMPT_WMTP = 1 << 1,
> +};
> +
> extern const struct intel_compute_kernels intel_compute_square_kernels[];
>
> bool run_intel_compute_kernel(int fd, struct user_execenv *user,
> @@ -81,4 +91,5 @@ bool xe_run_intel_compute_kernel_on_engine(int fd, struct drm_xe_engine_class_in
> bool run_intel_compute_kernel_preempt(int fd, struct drm_xe_engine_class_instance *eci,
> bool threadgroup_preemption,
> enum execenv_alloc_prefs alloc_prefs);
> +bool xe_kernel_preempt_check(int fd, enum xe_compute_preempt_type required_preempt);
> #endif /* INTEL_COMPUTE_H */
> diff --git a/tests/intel/xe_compute_preempt.c b/tests/intel/xe_compute_preempt.c
> index c9b194869..076360f1d 100644
> --- a/tests/intel/xe_compute_preempt.c
> +++ b/tests/intel/xe_compute_preempt.c
> @@ -76,6 +76,7 @@ igt_main
> }
>
> igt_subtest_with_dynamic("compute-preempt") {
> + igt_require(xe_kernel_preempt_check(xe, PREEMPT_WMTP));
> xe_for_each_engine(xe, hwe) {
> if (hwe->engine_class != DRM_XE_ENGINE_CLASS_COMPUTE)
> continue;
> @@ -86,6 +87,7 @@ igt_main
> }
>
> igt_subtest_with_dynamic("compute-preempt-many") {
> + igt_require(xe_kernel_preempt_check(xe, PREEMPT_WMTP));
> xe_for_each_engine(xe, hwe) {
> if (hwe->engine_class != DRM_XE_ENGINE_CLASS_COMPUTE)
> continue;
> @@ -112,6 +114,7 @@ igt_main
> igt_subtest_with_dynamic("compute-preempt-many-all-ram") {
> igt_require(swap_mb > CONTEXT_MB * 10);
>
> + igt_require(xe_kernel_preempt_check(xe, PREEMPT_WMTP));
> xe_for_each_engine(xe, hwe) {
> if (hwe->engine_class != DRM_XE_ENGINE_CLASS_COMPUTE)
> continue;
> @@ -138,6 +141,7 @@ igt_main
> igt_subtest_with_dynamic("compute-preempt-many-vram") {
> igt_require(xe_has_vram(xe));
>
> + igt_require(xe_kernel_preempt_check(xe, PREEMPT_WMTP));
> xe_for_each_engine(xe, hwe) {
> if (hwe->engine_class != DRM_XE_ENGINE_CLASS_COMPUTE)
> continue;
> @@ -164,6 +168,7 @@ igt_main
> igt_subtest_with_dynamic("compute-preempt-many-vram-evict") {
> igt_require(xe_has_vram(xe));
>
> + igt_require(xe_kernel_preempt_check(xe, PREEMPT_WMTP));
> xe_for_each_engine(xe, hwe) {
> if (hwe->engine_class != DRM_XE_ENGINE_CLASS_COMPUTE)
> continue;
> @@ -188,6 +193,7 @@ igt_main
> }
>
> igt_subtest_with_dynamic("compute-threadgroup-preempt") {
> + igt_require(xe_kernel_preempt_check(xe, PREEMPT_TGP));
> xe_for_each_engine(xe, hwe) {
> if (hwe->engine_class != DRM_XE_ENGINE_CLASS_COMPUTE)
> continue;
> --
> 2.51.0
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH i-g-t v9 2/3] lib/intel/intel_compute: Add kernel lookup and validation for compute IP versions
2025-10-03 5:26 ` [PATCH i-g-t v9 2/3] lib/intel/intel_compute: Add kernel lookup and validation for compute IP versions Sobin Thomas
@ 2025-10-10 9:23 ` Zbigniew Kempczyński
0 siblings, 0 replies; 12+ messages in thread
From: Zbigniew Kempczyński @ 2025-10-10 9:23 UTC (permalink / raw)
To: Sobin Thomas; +Cc: igt-dev, kamil.konieczny, priyanka.dandamudi
On Fri, Oct 03, 2025 at 05:26:20AM +0000, Sobin Thomas wrote:
> Introduce functions to locate compute square kernels based on IP version
> and validate their availability for preemption scenarios.
>
> - intel_compute_find_kernels() returns the matching kernel entry.
> - validate_kernels() ensures required kernel variants are present
> for compute and preemption kernels.
>
> Signed-off-by: Sobin Thomas <sobin.thomas@intel.com>
> ---
> lib/intel_compute.c | 90 ++++++++++++++++++++++++++++++++++-----------
> 1 file changed, 69 insertions(+), 21 deletions(-)
>
> diff --git a/lib/intel_compute.c b/lib/intel_compute.c
> index ae656a4f6..ade0b44c1 100644
> --- a/lib/intel_compute.c
> +++ b/lib/intel_compute.c
> @@ -1921,23 +1921,80 @@ static const struct {
> },
> };
>
> +static const struct intel_compute_kernels
> + *intel_compute_find_kernels(const struct intel_compute_kernels *kernels,
> + unsigned int ip_ver)
This should be indented to function arguments.
Rest looks good to me, with nit you have to migrate kernel_entries
assignment from 1/3 to this patch.
With these nits addressed:
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
--
Zbigniew
> +{
> + if (!kernels) {
> + igt_debug("%s: kernel_list is NULL\n", __func__);
> + return NULL;
> + }
> +
> + while (kernels->kernel) {
> + if (ip_ver == kernels->ip_ver)
> + return kernels;
> + kernels++;
> + }
> +
> + return NULL;
> +}
> +
> +static bool validate_kernels(const struct intel_compute_kernels *kernels,
> + bool check_preemption, bool threadgroup_preemption,
> + unsigned int ip_ver)
> +{
> + if (!kernels) {
> + igt_warn("No kernel entry found for IP version 0x%x\n", ip_ver);
> + return false;
> + }
> +
> + if (!kernels->kernel) {
> + igt_warn("Missing compute square kernel for IP version 0x%x\n", ip_ver);
> + return false;
> + }
> +
> + if (!check_preemption)
> + return true;
> +
> + /* The following checks are only performed if preemption check is enabled. */
> + if (threadgroup_preemption && !kernels->long_kernel) {
> + igt_warn("Missing Long kernel for IP version 0x%x\n", ip_ver);
> + return false;
> + } else if (!threadgroup_preemption) {
> + if (!kernels->sip_kernel) {
> + igt_warn("Missing SIP kernel for IP version 0x%x\n", ip_ver);
> + return false;
> + }
> + if (!kernels->loop_kernel) {
> + igt_warn("Missing Loop kernel for IP version 0x%x\n", ip_ver);
> + return false;
> + }
> + }
> + return true;
> +}
> +
> +static int find_compute_batch(unsigned int ip_ver)
> +{
> + for (int batch_idx = 0; batch_idx < ARRAY_SIZE(intel_compute_batches); batch_idx++)
> + if (ip_ver == intel_compute_batches[batch_idx].ip_ver)
> + return batch_idx;
> + return -1;
> +}
> +
> static bool __run_intel_compute_kernel(int fd,
> struct drm_xe_engine_class_instance *eci,
> struct user_execenv *user,
> enum execenv_alloc_prefs alloc_prefs)
> {
> unsigned int ip_ver = intel_graphics_ver(intel_get_drm_devid(fd));
> - unsigned int batch;
> - const struct intel_compute_kernels *kernels = intel_compute_square_kernels;
> + int batch;
> + const struct intel_compute_kernels *kernel_entries = intel_compute_square_kernels, *kernels;
> enum intel_driver driver = get_intel_driver(fd);
> const unsigned char *kernel;
> unsigned int kernel_size;
>
> - for (batch = 0; batch < ARRAY_SIZE(intel_compute_batches); batch++) {
> - if (ip_ver == intel_compute_batches[batch].ip_ver)
> - break;
> - }
> - if (batch == ARRAY_SIZE(intel_compute_batches)) {
> + batch = find_compute_batch(ip_ver);
> + if (batch < 0) {
> igt_debug("GPU version 0x%x not supported\n", ip_ver);
> return false;
> }
> @@ -1954,12 +2011,8 @@ static bool __run_intel_compute_kernel(int fd,
> kernel = user->kernel;
> kernel_size = user->kernel_size;
> } else {
> - while (kernels->kernel) {
> - if (ip_ver == kernels->ip_ver)
> - break;
> - kernels++;
> - }
> - if (!kernels->kernel)
> + kernels = intel_compute_find_kernels(kernel_entries, ip_ver);
> + if (!validate_kernels(kernels, false, false, ip_ver))
> return false;
> kernel = kernels->kernel;
> kernel_size = kernels->size;
> @@ -2270,18 +2323,13 @@ static bool __run_intel_compute_kernel_preempt(int fd,
> return false;
> }
>
> - while (kernels->kernel) {
> - if (ip_ver == kernels->ip_ver)
> - break;
> - kernels++;
> - }
> -
> if (!is_preemptable(batch, required_preempt))
> return false;
>
> - if (!kernels->kernel || !kernels->sip_kernel || !kernels->long_kernel)
> - return 0;
> + kernels = intel_compute_find_kernels(kernel_entries, ip_ver);
>
> + if (!validate_kernels(kernels, true, threadgroup_preemption, ip_ver))
> + return false;
> intel_compute_preempt_batches[batch].compute_exec(fd, kernels->long_kernel,
> kernels->long_kernel_size,
> kernels->kernel, kernels->size,
> --
> 2.51.0
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH i-g-t v9 3/3] lib/intel_compute: Adjust long kernel usage for WMTP
2025-10-03 5:26 ` [PATCH i-g-t v9 3/3] lib/intel_compute: Adjust long kernel usage for WMTP Sobin Thomas
@ 2025-10-10 9:24 ` Zbigniew Kempczyński
0 siblings, 0 replies; 12+ messages in thread
From: Zbigniew Kempczyński @ 2025-10-10 9:24 UTC (permalink / raw)
To: Sobin Thomas; +Cc: igt-dev, kamil.konieczny, priyanka.dandamudi
On Fri, Oct 03, 2025 at 05:26:21AM +0000, Sobin Thomas wrote:
> WMTP uses different shaders SIP and loop kernel and does not
> require a separate long_kernel; This will make long kernel test to
> be enabled or Thread group preemption tests.
>
> Signed-off-by: Sobin Thomas <sobin.thomas@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
--
Zbigniew
> ---
> lib/intel_compute.c | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/lib/intel_compute.c b/lib/intel_compute.c
> index ade0b44c1..23931f089 100644
> --- a/lib/intel_compute.c
> +++ b/lib/intel_compute.c
> @@ -72,7 +72,6 @@
> * WMTP - Walker Mid Thread Preemption
> */
> #define TGP_long_kernel_loop_count 10
> -#define WMTP_long_kernel_loop_count 1000000
> #define XE2_THREADGROUP_PREEMPT_XDIM 0x4000
>
> struct bo_dict_entry {
> @@ -2135,8 +2134,6 @@ static void xe2lpg_compute_preempt_exec(int fd, const unsigned char *long_kernel
>
> if (threadgroup_preemption)
> long_kernel_loop_count = TGP_long_kernel_loop_count;
> - else
> - long_kernel_loop_count = WMTP_long_kernel_loop_count;
>
> for (int i = 0; i < entries; ++i)
> bo_dict_short[i] = bo_dict_long[i];
> --
> 2.51.0
>
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2025-10-10 9:24 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz follow: Atom feed
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2025-10-03 5:26 [PATCH i-g-t v9 0/3] tests/intel/xe_compute_preempt: Compute preemption check Sobin Thomas
2025-10-03 5:26 ` [PATCH i-g-t v9 1/3] " Sobin Thomas
2025-10-10 8:57 ` Zbigniew Kempczyński
2025-10-10 9:09 ` Zbigniew Kempczyński
2025-10-03 5:26 ` [PATCH i-g-t v9 2/3] lib/intel/intel_compute: Add kernel lookup and validation for compute IP versions Sobin Thomas
2025-10-10 9:23 ` Zbigniew Kempczyński
2025-10-03 5:26 ` [PATCH i-g-t v9 3/3] lib/intel_compute: Adjust long kernel usage for WMTP Sobin Thomas
2025-10-10 9:24 ` Zbigniew Kempczyński
2025-10-03 7:11 ` ✓ Xe.CI.BAT: success for tests/intel/xe_compute_preempt: Compute preemption check Patchwork
2025-10-03 7:11 ` ✗ Xe.CI.BAT: failure " Patchwork
2025-10-03 7:26 ` ✗ i915.CI.BAT: " Patchwork
2025-10-03 8:43 ` ✗ Xe.CI.Full: " Patchwork
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