* [PATCH v2 i-g-t 0/2] tests/intel-ci: Add NVL display and core blocklists
@ 2026-03-12 7:48 Aditya Chauhan
2026-03-12 7:48 ` [PATCH v2 i-g-t 1/2] tests/intel-ci: Add NVL core blocklist Aditya Chauhan
` (4 more replies)
0 siblings, 5 replies; 10+ messages in thread
From: Aditya Chauhan @ 2026-03-12 7:48 UTC (permalink / raw)
To: ramadevi.gandi, himanshu.girotra, swati2.sharma, igt-dev
This series adds blocklist files for the NVL platform under intel-ci.
Patch 1 introduces the xe.nvl.core.blocklist file and registers it
in meson.build to track known failing core tests on NVL.
Patch 2 fixes a missing meson.build entry for the NVL display blocklist
that was added in commit 04db3b26c52b
("intel-ci: Add NVL display blocklist").
Changes in v2: Add more descriptive commit messages(Swati Sharma)
Aditya Chauhan (2):
tests/intel-ci: Add NVL core blocklist
tests/ci: Add NVL Display blocklist to meson.build
tests/intel-ci/meson.build | 2 +
tests/intel-ci/xe.nvl.core.blocklist.txt | 69 ++++++++++++++++++++++++
2 files changed, 71 insertions(+)
create mode 100644 tests/intel-ci/xe.nvl.core.blocklist.txt
--
2.34.1
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2 i-g-t 1/2] tests/intel-ci: Add NVL core blocklist
2026-03-12 7:48 [PATCH v2 i-g-t 0/2] tests/intel-ci: Add NVL display and core blocklists Aditya Chauhan
@ 2026-03-12 7:48 ` Aditya Chauhan
2026-03-12 8:06 ` Sharma, Swati2
2026-03-12 7:48 ` [PATCH v2 i-g-t 2/2] tests/ci: Add NVL Display blocklist to meson.build Aditya Chauhan
` (3 subsequent siblings)
4 siblings, 1 reply; 10+ messages in thread
From: Aditya Chauhan @ 2026-03-12 7:48 UTC (permalink / raw)
To: ramadevi.gandi, himanshu.girotra, swati2.sharma, igt-dev
Introduce core blocklist for the NVL platform containing
NVL-specific core test exclusions. Also add this blocklist file
to meson.build so that this can be used in execution.
Signed-off-by: Aditya Chauhan <aditya.chauhan@intel.com>
---
tests/intel-ci/meson.build | 1 +
tests/intel-ci/xe.nvl.core.blocklist.txt | 69 ++++++++++++++++++++++++
2 files changed, 70 insertions(+)
create mode 100644 tests/intel-ci/xe.nvl.core.blocklist.txt
diff --git a/tests/intel-ci/meson.build b/tests/intel-ci/meson.build
index cf0023c63..a1e9dff55 100644
--- a/tests/intel-ci/meson.build
+++ b/tests/intel-ci/meson.build
@@ -25,6 +25,7 @@ intelci_files = [
'xe.multigpu.blocklist.txt',
'xe.ptl.core.blocklist.txt',
'xe.ptl.display.blocklist.txt',
+ 'xe.nvl.core.blocklist.txt',
'xe.sriov-vf.blocklist.txt',
'xe-sriov-vf.blocklist.txt',
'xe.sriov-vm.blocklist.txt',
diff --git a/tests/intel-ci/xe.nvl.core.blocklist.txt b/tests/intel-ci/xe.nvl.core.blocklist.txt
new file mode 100644
index 000000000..297651d43
--- /dev/null
+++ b/tests/intel-ci/xe.nvl.core.blocklist.txt
@@ -0,0 +1,69 @@
+##################################################################
+# Tests NA for Native
+##################################################################
+igt@.*iov.*
+##################################################################
+# KMS - Display related tests
+# Other Display specific tests
+##################################################################
+igt@.*kms.*
+igt@testdisplay
+igt@xe_pat@display-vs-wb-transient
+igt@fbdev@.*
+##################################################################
+# Expected skip as iGPU has no vram
+##################################################################
+igt@xe_mmap@vram$
+igt@xe_mmap@small-bar
+igt@xe_noexec_ping_pong
+igt@xe_create@create-big-vram
+igt@xe_evict.*
+igt@xe_pm@d3hot-mmap-vram
+igt@xe_eudebug_online@writes-caching-(?!sram-bb-sram-target-sram).*
+igt@xe_compute_preempt@.*vram.*
+igt@xe_vm@out-of-memory
+##################################################################
+# Expected skips as the test are expected to run
+# only on older platforms
+##################################################################
+igt@xe_pat@pat-index-xe3p-xpc
+igt@xe_pat@pat-index-xehpc
+igt@xe_pat@pat-index-xelp
+igt@xe_pat@pat-index-xelpg
+igt@xe_media_fill@media-fill
+igt@xe_pat@pat-index-xe2
+##################################################################
+# Expected skip for the platform as the tests need more than
+# one CCS engine
+##################################################################
+igt@xe_compute@ccs-mode-basic
+igt@xe_compute@ccs-mode-compute-kernel
+igt@xe_compute@eu-busy-10s
+##################################################################
+# Expected skip for the platform
+##################################################################
+igt@xe_huc_copy@huc_copy
+igt@xe_exec_balancer@.*
+igt@.*@.*tiles
+igt@xe_oa@oa-tlb-invalidate
+igt@xe_pxp@.*
+igt@xe_exec_system_allocator@.*
+##################################################################
+#Expected skip for integrated platforms
+##################################################################
+igt@intel_hwmon@.*
+igt@.*@.*multigpu.*
+igt@xe_peer2peer@.*
+igt@xe_mmap@pci-membarrier.*
+igt@xe_pm@d3hot-i2c
+igt@xe_configfs@survivability-mode
+igt@xe_survivability@.*
+##################################################################
+# Kernel support not available
+##################################################################
+igt@xe_eudebug@.*
+igt@xe_eudebug_online@.*
+igt@xe_exec_sip@.*
+igt@xe_exec_sip_eudebug@.*
+igt@xe_live_ktest@xe_eudebug
+##################################################################
--
2.34.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v2 i-g-t 2/2] tests/ci: Add NVL Display blocklist to meson.build
2026-03-12 7:48 [PATCH v2 i-g-t 0/2] tests/intel-ci: Add NVL display and core blocklists Aditya Chauhan
2026-03-12 7:48 ` [PATCH v2 i-g-t 1/2] tests/intel-ci: Add NVL core blocklist Aditya Chauhan
@ 2026-03-12 7:48 ` Aditya Chauhan
2026-03-12 8:08 ` Sharma, Swati2
2026-03-12 12:28 ` ✓ i915.CI.BAT: success for tests/intel-ci: Add NVL display and core blocklists (rev2) Patchwork
` (2 subsequent siblings)
4 siblings, 1 reply; 10+ messages in thread
From: Aditya Chauhan @ 2026-03-12 7:48 UTC (permalink / raw)
To: ramadevi.gandi, himanshu.girotra, swati2.sharma, igt-dev
Add NVL display blocklist to meson.build so that this can
be used in execution.
Fixes: 04db3b26c52b ("intel-ci: Add NVL display blocklist")
Signed-off-by: Aditya Chauhan <aditya.chauhan@intel.com>
---
tests/intel-ci/meson.build | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/intel-ci/meson.build b/tests/intel-ci/meson.build
index a1e9dff55..2e40b2179 100644
--- a/tests/intel-ci/meson.build
+++ b/tests/intel-ci/meson.build
@@ -26,6 +26,7 @@ intelci_files = [
'xe.ptl.core.blocklist.txt',
'xe.ptl.display.blocklist.txt',
'xe.nvl.core.blocklist.txt',
+ 'xe.nvl.display.blocklist.txt',
'xe.sriov-vf.blocklist.txt',
'xe-sriov-vf.blocklist.txt',
'xe.sriov-vm.blocklist.txt',
--
2.34.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH v2 i-g-t 1/2] tests/intel-ci: Add NVL core blocklist
2026-03-12 7:48 ` [PATCH v2 i-g-t 1/2] tests/intel-ci: Add NVL core blocklist Aditya Chauhan
@ 2026-03-12 8:06 ` Sharma, Swati2
2026-03-12 10:48 ` Kamil Konieczny
0 siblings, 1 reply; 10+ messages in thread
From: Sharma, Swati2 @ 2026-03-12 8:06 UTC (permalink / raw)
To: Aditya Chauhan, ramadevi.gandi, himanshu.girotra, igt-dev,
Kamil Konieczny
Hi Aditya,
instead of tests/intel-ci: use intel-ci: in subject.
On 12-03-2026 01:18 pm, Aditya Chauhan wrote:
> Introduce core blocklist for the NVL platform containing
> NVL-specific core test exclusions. Also add this blocklist file
> to meson.build so that this can be used in execution.
>
> Signed-off-by: Aditya Chauhan <aditya.chauhan@intel.com>
> ---
> tests/intel-ci/meson.build | 1 +
> tests/intel-ci/xe.nvl.core.blocklist.txt | 69 ++++++++++++++++++++++++
> 2 files changed, 70 insertions(+)
> create mode 100644 tests/intel-ci/xe.nvl.core.blocklist.txt
>
> diff --git a/tests/intel-ci/meson.build b/tests/intel-ci/meson.build
> index cf0023c63..a1e9dff55 100644
> --- a/tests/intel-ci/meson.build
> +++ b/tests/intel-ci/meson.build
> @@ -25,6 +25,7 @@ intelci_files = [
> 'xe.multigpu.blocklist.txt',
> 'xe.ptl.core.blocklist.txt',
> 'xe.ptl.display.blocklist.txt',
> + 'xe.nvl.core.blocklist.txt',
Also, file should be added in alphabetical order.
> 'xe.sriov-vf.blocklist.txt',
> 'xe-sriov-vf.blocklist.txt',
> 'xe.sriov-vm.blocklist.txt',
> diff --git a/tests/intel-ci/xe.nvl.core.blocklist.txt b/tests/intel-ci/xe.nvl.core.blocklist.txt
> new file mode 100644
> index 000000000..297651d43
> --- /dev/null
> +++ b/tests/intel-ci/xe.nvl.core.blocklist.txt
If possible, please add descriptive comments for blocklisted tests.
Cc: Kamil
> @@ -0,0 +1,69 @@
> +##################################################################
> +# Tests NA for Native
> +##################################################################
> +igt@.*iov.*
> +##################################################################
> +# KMS - Display related tests
> +# Other Display specific tests
> +##################################################################
Ex: You can simply add KMS tests
> +igt@.*kms.*
> +igt@testdisplay
> +igt@xe_pat@display-vs-wb-transient
> +igt@fbdev@.*
> +##################################################################
> +# Expected skip as iGPU has no vram
Add some tag like Valid skip: <reason>
and follow same format for all skips.
You can take reference from xe.nvl.display.blocklist.txt
> +##################################################################
> +igt@xe_mmap@vram$
> +igt@xe_mmap@small-bar
> +igt@xe_noexec_ping_pong
> +igt@xe_create@create-big-vram
> +igt@xe_evict.*
> +igt@xe_pm@d3hot-mmap-vram
> +igt@xe_eudebug_online@writes-caching-(?!sram-bb-sram-target-sram).*
> +igt@xe_compute_preempt@.*vram.*
> +igt@xe_vm@out-of-memory
> +##################################################################
> +# Expected skips as the test are expected to run
> +# only on older platforms
> +##################################################################
> +igt@xe_pat@pat-index-xe3p-xpc
> +igt@xe_pat@pat-index-xehpc
> +igt@xe_pat@pat-index-xelp
> +igt@xe_pat@pat-index-xelpg
> +igt@xe_media_fill@media-fill
> +igt@xe_pat@pat-index-xe2
> +##################################################################
> +# Expected skip for the platform as the tests need more than
> +# one CCS engine
> +##################################################################
> +igt@xe_compute@ccs-mode-basic
> +igt@xe_compute@ccs-mode-compute-kernel
> +igt@xe_compute@eu-busy-10s
> +##################################################################
> +# Expected skip for the platform
> +##################################################################
> +igt@xe_huc_copy@huc_copy
> +igt@xe_exec_balancer@.*
> +igt@.*@.*tiles
> +igt@xe_oa@oa-tlb-invalidate
> +igt@xe_pxp@.*
> +igt@xe_exec_system_allocator@.*
> +##################################################################
> +#Expected skip for integrated platforms
> +##################################################################
> +igt@intel_hwmon@.*
> +igt@.*@.*multigpu.*
> +igt@xe_peer2peer@.*
> +igt@xe_mmap@pci-membarrier.*
> +igt@xe_pm@d3hot-i2c
> +igt@xe_configfs@survivability-mode
> +igt@xe_survivability@.*
> +##################################################################
> +# Kernel support not available
> +##################################################################
> +igt@xe_eudebug@.*
> +igt@xe_eudebug_online@.*
> +igt@xe_exec_sip@.*
> +igt@xe_exec_sip_eudebug@.*
> +igt@xe_live_ktest@xe_eudebug
> +##################################################################
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 i-g-t 2/2] tests/ci: Add NVL Display blocklist to meson.build
2026-03-12 7:48 ` [PATCH v2 i-g-t 2/2] tests/ci: Add NVL Display blocklist to meson.build Aditya Chauhan
@ 2026-03-12 8:08 ` Sharma, Swati2
2026-03-12 10:41 ` Kamil Konieczny
0 siblings, 1 reply; 10+ messages in thread
From: Sharma, Swati2 @ 2026-03-12 8:08 UTC (permalink / raw)
To: Aditya Chauhan, ramadevi.gandi, himanshu.girotra, igt-dev
Hi Aditya,
Subject should be intel-ci:
On 12-03-2026 01:18 pm, Aditya Chauhan wrote:
> Add NVL display blocklist to meson.build so that this can
> be used in execution.
>
> Fixes: 04db3b26c52b ("intel-ci: Add NVL display blocklist")
> Signed-off-by: Aditya Chauhan <aditya.chauhan@intel.com>
> ---
> tests/intel-ci/meson.build | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/tests/intel-ci/meson.build b/tests/intel-ci/meson.build
> index a1e9dff55..2e40b2179 100644
> --- a/tests/intel-ci/meson.build
> +++ b/tests/intel-ci/meson.build
> @@ -26,6 +26,7 @@ intelci_files = [
> 'xe.ptl.core.blocklist.txt',
> 'xe.ptl.display.blocklist.txt',
> 'xe.nvl.core.blocklist.txt',
> + 'xe.nvl.display.blocklist.txt',
Alphabetical order.
> 'xe.sriov-vf.blocklist.txt',
> 'xe-sriov-vf.blocklist.txt',
> 'xe.sriov-vm.blocklist.txt',
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 i-g-t 2/2] tests/ci: Add NVL Display blocklist to meson.build
2026-03-12 8:08 ` Sharma, Swati2
@ 2026-03-12 10:41 ` Kamil Konieczny
0 siblings, 0 replies; 10+ messages in thread
From: Kamil Konieczny @ 2026-03-12 10:41 UTC (permalink / raw)
To: Sharma, Swati2; +Cc: Aditya Chauhan, ramadevi.gandi, himanshu.girotra, igt-dev
Hi Sharma,,
On 2026-03-12 at 13:38:51 +0530, Sharma, Swati2 wrote:
> Hi Aditya,
>
> Subject should be intel-ci:
>
> On 12-03-2026 01:18 pm, Aditya Chauhan wrote:
> > Add NVL display blocklist to meson.build so that this can
> > be used in execution.
> >
> > Fixes: 04db3b26c52b ("intel-ci: Add NVL display blocklist")
> > Signed-off-by: Aditya Chauhan <aditya.chauhan@intel.com>
> > ---
> > tests/intel-ci/meson.build | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/tests/intel-ci/meson.build b/tests/intel-ci/meson.build
> > index a1e9dff55..2e40b2179 100644
> > --- a/tests/intel-ci/meson.build
> > +++ b/tests/intel-ci/meson.build
> > @@ -26,6 +26,7 @@ intelci_files = [
> > 'xe.ptl.core.blocklist.txt',
> > 'xe.ptl.display.blocklist.txt',
> > 'xe.nvl.core.blocklist.txt',
> > + 'xe.nvl.display.blocklist.txt',
> Alphabetical order.
As Swati said, please correct this and move both to correct place
(after xe.multigpu), , so it will be in alphabetical order.
Regards,
Kamil
> > 'xe.sriov-vf.blocklist.txt',
> > 'xe-sriov-vf.blocklist.txt',
> > 'xe.sriov-vm.blocklist.txt',
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 i-g-t 1/2] tests/intel-ci: Add NVL core blocklist
2026-03-12 8:06 ` Sharma, Swati2
@ 2026-03-12 10:48 ` Kamil Konieczny
0 siblings, 0 replies; 10+ messages in thread
From: Kamil Konieczny @ 2026-03-12 10:48 UTC (permalink / raw)
To: Sharma, Swati2; +Cc: Aditya Chauhan, ramadevi.gandi, himanshu.girotra, igt-dev
Hi Sharma,,
On 2026-03-12 at 13:36:37 +0530, Sharma, Swati2 wrote:
> Hi Aditya,
>
> instead of tests/intel-ci: use intel-ci: in subject.
>
> On 12-03-2026 01:18 pm, Aditya Chauhan wrote:
> > Introduce core blocklist for the NVL platform containing
> > NVL-specific core test exclusions. Also add this blocklist file
> > to meson.build so that this can be used in execution.
> >
> > Signed-off-by: Aditya Chauhan <aditya.chauhan@intel.com>
> > ---
> > tests/intel-ci/meson.build | 1 +
> > tests/intel-ci/xe.nvl.core.blocklist.txt | 69 ++++++++++++++++++++++++
> > 2 files changed, 70 insertions(+)
> > create mode 100644 tests/intel-ci/xe.nvl.core.blocklist.txt
> >
> > diff --git a/tests/intel-ci/meson.build b/tests/intel-ci/meson.build
> > index cf0023c63..a1e9dff55 100644
> > --- a/tests/intel-ci/meson.build
> > +++ b/tests/intel-ci/meson.build
> > @@ -25,6 +25,7 @@ intelci_files = [
> > 'xe.multigpu.blocklist.txt',
> > 'xe.ptl.core.blocklist.txt',
> > 'xe.ptl.display.blocklist.txt',
> > + 'xe.nvl.core.blocklist.txt',
> Also, file should be added in alphabetical order.
> > 'xe.sriov-vf.blocklist.txt',
> > 'xe-sriov-vf.blocklist.txt',
> > 'xe.sriov-vm.blocklist.txt',
> > diff --git a/tests/intel-ci/xe.nvl.core.blocklist.txt b/tests/intel-ci/xe.nvl.core.blocklist.txt
> > new file mode 100644
> > index 000000000..297651d43
> > --- /dev/null
> > +++ b/tests/intel-ci/xe.nvl.core.blocklist.txt
>
> If possible, please add descriptive comments for blocklisted tests.
>
> Cc: Kamil
>
> > @@ -0,0 +1,69 @@
> > +##################################################################
> > +# Tests NA for Native
> > +##################################################################
> > +igt@.*iov.*
> > +##################################################################
> > +# KMS - Display related tests
> > +# Other Display specific tests
> > +##################################################################
> Ex: You can simply add KMS tests
So here imho one line should be enough:
# KMS - Display related tests
> > +igt@.*kms.*
> > +igt@testdisplay
> > +igt@xe_pat@display-vs-wb-transient
> > +igt@fbdev@.*
> > +##################################################################
> > +# Expected skip as iGPU has no vram
>
> Add some tag like Valid skip: <reason>
>
> and follow same format for all skips.
>
> You can take reference from xe.nvl.display.blocklist.txt
>
> > +##################################################################
> > +igt@xe_mmap@vram$
> > +igt@xe_mmap@small-bar
> > +igt@xe_noexec_ping_pong
> > +igt@xe_create@create-big-vram
> > +igt@xe_evict.*
> > +igt@xe_pm@d3hot-mmap-vram
> > +igt@xe_eudebug_online@writes-caching-(?!sram-bb-sram-target-sram).*
> > +igt@xe_compute_preempt@.*vram.*
> > +igt@xe_vm@out-of-memory
> > +##################################################################
> > +# Expected skips as the test are expected to run
> > +# only on older platforms
I am not sure if all of below are 'old platform'?
> > +##################################################################
> > +igt@xe_pat@pat-index-xe3p-xpc
> > +igt@xe_pat@pat-index-xehpc
> > +igt@xe_pat@pat-index-xelp
> > +igt@xe_pat@pat-index-xelpg
> > +igt@xe_media_fill@media-fill
> > +igt@xe_pat@pat-index-xe2
> > +##################################################################
> > +# Expected skip for the platform as the tests need more than
> > +# one CCS engine
imho:
# Valid skip: needs more than one CCS engine
> > +##################################################################
> > +igt@xe_compute@ccs-mode-basic
> > +igt@xe_compute@ccs-mode-compute-kernel
> > +igt@xe_compute@eu-busy-10s
> > +##################################################################
> > +# Expected skip for the platform
> > +##################################################################
> > +igt@xe_huc_copy@huc_copy
> > +igt@xe_exec_balancer@.*
> > +igt@.*@.*tiles
> > +igt@xe_oa@oa-tlb-invalidate
> > +igt@xe_pxp@.*
> > +igt@xe_exec_system_allocator@.*
> > +##################################################################
> > +#Expected skip for integrated platforms
# Valid skip: should run only on dGPU
Regards,
Kamil
> > +##################################################################
> > +igt@intel_hwmon@.*
> > +igt@.*@.*multigpu.*
> > +igt@xe_peer2peer@.*
> > +igt@xe_mmap@pci-membarrier.*
> > +igt@xe_pm@d3hot-i2c
> > +igt@xe_configfs@survivability-mode
> > +igt@xe_survivability@.*
> > +##################################################################
> > +# Kernel support not available
> > +##################################################################
> > +igt@xe_eudebug@.*
> > +igt@xe_eudebug_online@.*
> > +igt@xe_exec_sip@.*
> > +igt@xe_exec_sip_eudebug@.*
> > +igt@xe_live_ktest@xe_eudebug
> > +##################################################################
^ permalink raw reply [flat|nested] 10+ messages in thread
* ✓ i915.CI.BAT: success for tests/intel-ci: Add NVL display and core blocklists (rev2)
2026-03-12 7:48 [PATCH v2 i-g-t 0/2] tests/intel-ci: Add NVL display and core blocklists Aditya Chauhan
2026-03-12 7:48 ` [PATCH v2 i-g-t 1/2] tests/intel-ci: Add NVL core blocklist Aditya Chauhan
2026-03-12 7:48 ` [PATCH v2 i-g-t 2/2] tests/ci: Add NVL Display blocklist to meson.build Aditya Chauhan
@ 2026-03-12 12:28 ` Patchwork
2026-03-12 12:35 ` ✓ Xe.CI.BAT: " Patchwork
2026-03-13 9:36 ` ✓ Xe.CI.FULL: " Patchwork
4 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-03-12 12:28 UTC (permalink / raw)
To: Aditya Chauhan; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 2041 bytes --]
== Series Details ==
Series: tests/intel-ci: Add NVL display and core blocklists (rev2)
URL : https://patchwork.freedesktop.org/series/163030/
State : success
== Summary ==
CI Bug Log - changes from IGT_8798 -> IGTPW_14742
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14742/index.html
Participating hosts (41 -> 39)
------------------------------
Missing (2): bat-dg2-13 fi-snb-2520m
Known issues
------------
Here are the changes found in IGTPW_14742 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live:
- bat-mtlp-8: [PASS][1] -> [DMESG-FAIL][2] ([i915#12061]) +1 other test dmesg-fail
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8798/bat-mtlp-8/igt@i915_selftest@live.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14742/bat-mtlp-8/igt@i915_selftest@live.html
#### Possible fixes ####
* igt@i915_selftest@live@workarounds:
- bat-arlh-2: [DMESG-FAIL][3] ([i915#12061]) -> [PASS][4] +1 other test pass
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_8798/bat-arlh-2/igt@i915_selftest@live@workarounds.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14742/bat-arlh-2/igt@i915_selftest@live@workarounds.html
[i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_8798 -> IGTPW_14742
* Linux: CI_DRM_18134 -> CI_DRM_18136
CI-20190529: 20190529
CI_DRM_18134: 169ea69ad8f2fb0a126608399386e4580bb2d0b0 @ git://anongit.freedesktop.org/gfx-ci/linux
CI_DRM_18136: 72190ebdd4c0e9a2b454b04ba382beeb6020e047 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_14742: 79ac3166394c85f863a54dedc6924af5e3328046 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8798: 8798
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_14742/index.html
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^ permalink raw reply [flat|nested] 10+ messages in thread
* ✓ Xe.CI.BAT: success for tests/intel-ci: Add NVL display and core blocklists (rev2)
2026-03-12 7:48 [PATCH v2 i-g-t 0/2] tests/intel-ci: Add NVL display and core blocklists Aditya Chauhan
` (2 preceding siblings ...)
2026-03-12 12:28 ` ✓ i915.CI.BAT: success for tests/intel-ci: Add NVL display and core blocklists (rev2) Patchwork
@ 2026-03-12 12:35 ` Patchwork
2026-03-13 9:36 ` ✓ Xe.CI.FULL: " Patchwork
4 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-03-12 12:35 UTC (permalink / raw)
To: Aditya Chauhan; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 2862 bytes --]
== Series Details ==
Series: tests/intel-ci: Add NVL display and core blocklists (rev2)
URL : https://patchwork.freedesktop.org/series/163030/
State : success
== Summary ==
CI Bug Log - changes from XEIGT_8798_BAT -> XEIGTPW_14742_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (14 -> 13)
------------------------------
Missing (1): bat-atsm-2
Known issues
------------
Here are the changes found in XEIGTPW_14742_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1:
- bat-adlp-7: [PASS][1] -> [DMESG-WARN][2] ([Intel XE#7483])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8798/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1.html
* igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit:
- bat-bmg-2: NOTRUN -> [SKIP][3] ([Intel XE#2229])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/bat-bmg-2/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html
#### Possible fixes ####
* igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1:
- bat-adlp-7: [DMESG-WARN][4] ([Intel XE#7483]) -> [PASS][5]
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8798/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html
#### Warnings ####
* igt@core_hotunplug@unbind-rebind:
- bat-bmg-2: [ABORT][6] ([Intel XE#7249]) -> [DMESG-WARN][7] ([Intel XE#7433])
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8798/bat-bmg-2/igt@core_hotunplug@unbind-rebind.html
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/bat-bmg-2/igt@core_hotunplug@unbind-rebind.html
[Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
[Intel XE#7249]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7249
[Intel XE#7433]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7433
[Intel XE#7483]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7483
Build changes
-------------
* IGT: IGT_8798 -> IGTPW_14742
* Linux: xe-4704-169ea69ad8f2fb0a126608399386e4580bb2d0b0 -> xe-4705-a0e231ebb0df84f6febf147ee5fcaafd40c2dafe
IGTPW_14742: 79ac3166394c85f863a54dedc6924af5e3328046 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8798: 8798
xe-4704-169ea69ad8f2fb0a126608399386e4580bb2d0b0: 169ea69ad8f2fb0a126608399386e4580bb2d0b0
xe-4705-a0e231ebb0df84f6febf147ee5fcaafd40c2dafe: a0e231ebb0df84f6febf147ee5fcaafd40c2dafe
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/index.html
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^ permalink raw reply [flat|nested] 10+ messages in thread
* ✓ Xe.CI.FULL: success for tests/intel-ci: Add NVL display and core blocklists (rev2)
2026-03-12 7:48 [PATCH v2 i-g-t 0/2] tests/intel-ci: Add NVL display and core blocklists Aditya Chauhan
` (3 preceding siblings ...)
2026-03-12 12:35 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-03-13 9:36 ` Patchwork
4 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-03-13 9:36 UTC (permalink / raw)
To: Aditya Chauhan; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 17888 bytes --]
== Series Details ==
Series: tests/intel-ci: Add NVL display and core blocklists (rev2)
URL : https://patchwork.freedesktop.org/series/163030/
State : success
== Summary ==
CI Bug Log - changes from XEIGT_8798_FULL -> XEIGTPW_14742_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in XEIGTPW_14742_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
- shard-lnl: NOTRUN -> [SKIP][1] ([Intel XE#1477] / [Intel XE#7361])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-8/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
- shard-lnl: NOTRUN -> [SKIP][2] ([Intel XE#1124]) +1 other test skip
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-6/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
* igt@kms_bw@connected-linear-tiling-3-displays-1920x1080p:
- shard-lnl: NOTRUN -> [SKIP][3] ([Intel XE#2191] / [Intel XE#7373])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-5/igt@kms_bw@connected-linear-tiling-3-displays-1920x1080p.html
* igt@kms_bw@linear-tiling-4-displays-3840x2160p:
- shard-lnl: NOTRUN -> [SKIP][4] ([Intel XE#1512] / [Intel XE#7392])
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-5/igt@kms_bw@linear-tiling-4-displays-3840x2160p.html
* igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs-cc:
- shard-lnl: NOTRUN -> [SKIP][5] ([Intel XE#2887]) +2 other tests skip
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-6/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs-cc.html
* igt@kms_chamelium_color@ctm-max:
- shard-lnl: NOTRUN -> [SKIP][6] ([Intel XE#306] / [Intel XE#7358])
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-1/igt@kms_chamelium_color@ctm-max.html
* igt@kms_chamelium_hpd@common-hpd-after-hibernate:
- shard-lnl: NOTRUN -> [SKIP][7] ([Intel XE#373])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-7/igt@kms_chamelium_hpd@common-hpd-after-hibernate.html
* igt@kms_color_pipeline@plane-lut3d-green-only:
- shard-lnl: NOTRUN -> [SKIP][8] ([Intel XE#6969] / [Intel XE#7006]) +1 other test skip
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-1/igt@kms_color_pipeline@plane-lut3d-green-only.html
* igt@kms_color_pipeline@plane-lut3d-green-only@pipe-b-plane-1:
- shard-lnl: NOTRUN -> [SKIP][9] ([Intel XE#6969]) +7 other tests skip
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-1/igt@kms_color_pipeline@plane-lut3d-green-only@pipe-b-plane-1.html
* igt@kms_cursor_crc@cursor-sliding-64x21:
- shard-lnl: NOTRUN -> [SKIP][10] ([Intel XE#1424]) +2 other tests skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-7/igt@kms_cursor_crc@cursor-sliding-64x21.html
* igt@kms_dp_linktrain_fallback@dsc-fallback:
- shard-lnl: NOTRUN -> [SKIP][11] ([Intel XE#4331] / [Intel XE#7227])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-5/igt@kms_dp_linktrain_fallback@dsc-fallback.html
* igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible:
- shard-lnl: NOTRUN -> [SKIP][12] ([Intel XE#1421]) +1 other test skip
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-6/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-lnl: [PASS][13] -> [FAIL][14] ([Intel XE#301]) +1 other test fail
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8798/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling:
- shard-lnl: NOTRUN -> [SKIP][15] ([Intel XE#7178] / [Intel XE#7349])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-2/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling:
- shard-lnl: NOTRUN -> [SKIP][16] ([Intel XE#7178] / [Intel XE#7351])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-4/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-draw-blt:
- shard-lnl: NOTRUN -> [SKIP][17] ([Intel XE#6312] / [Intel XE#651]) +1 other test skip
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-7/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-render:
- shard-lnl: NOTRUN -> [SKIP][18] ([Intel XE#656]) +7 other tests skip
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-2/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-render.html
* igt@kms_hdr@brightness-with-hdr:
- shard-lnl: NOTRUN -> [SKIP][19] ([Intel XE#3374] / [Intel XE#3544])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-4/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
- shard-lnl: NOTRUN -> [SKIP][20] ([Intel XE#7591])
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-8/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
* igt@kms_plane@pixel-format-y-tiled-modifier-source-clamping:
- shard-lnl: NOTRUN -> [SKIP][21] ([Intel XE#7283])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-6/igt@kms_plane@pixel-format-y-tiled-modifier-source-clamping.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
- shard-lnl: NOTRUN -> [SKIP][22] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#7383])
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-1/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
* igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area:
- shard-lnl: NOTRUN -> [SKIP][23] ([Intel XE#2893] / [Intel XE#4608] / [Intel XE#7304])
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-2/igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area.html
* igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area@pipe-a-edp-1:
- shard-lnl: NOTRUN -> [SKIP][24] ([Intel XE#4608])
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-2/igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area@pipe-a-edp-1.html
* igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area@pipe-b-edp-1:
- shard-lnl: NOTRUN -> [SKIP][25] ([Intel XE#4608] / [Intel XE#7304])
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-2/igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area@pipe-b-edp-1.html
* igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area-big-fb:
- shard-lnl: NOTRUN -> [SKIP][26] ([Intel XE#2893] / [Intel XE#7304])
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-8/igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area-big-fb.html
* igt@kms_psr@fbc-psr2-primary-blt:
- shard-lnl: NOTRUN -> [SKIP][27] ([Intel XE#1406] / [Intel XE#7345])
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-3/igt@kms_psr@fbc-psr2-primary-blt.html
* igt@kms_psr@fbc-psr2-primary-blt@edp-1:
- shard-lnl: NOTRUN -> [SKIP][28] ([Intel XE#1406] / [Intel XE#4609])
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-3/igt@kms_psr@fbc-psr2-primary-blt@edp-1.html
* igt@kms_psr@pr-dpms:
- shard-lnl: NOTRUN -> [SKIP][29] ([Intel XE#1406])
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-1/igt@kms_psr@pr-dpms.html
* igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
- shard-lnl: [PASS][30] -> [SKIP][31] ([Intel XE#4692] / [Intel XE#7508])
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8798/shard-lnl-5/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-6/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
- shard-lnl: NOTRUN -> [SKIP][32] ([Intel XE#1127] / [Intel XE#5813])
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-2/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html
* igt@xe_eudebug_online@single-step-one:
- shard-lnl: NOTRUN -> [SKIP][33] ([Intel XE#4837] / [Intel XE#6665]) +1 other test skip
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-3/igt@xe_eudebug_online@single-step-one.html
* igt@xe_evict@evict-large-multi-vm-cm:
- shard-lnl: NOTRUN -> [SKIP][34] ([Intel XE#6540] / [Intel XE#688])
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-8/igt@xe_evict@evict-large-multi-vm-cm.html
* igt@xe_exec_balancer@twice-parallel-basic:
- shard-lnl: NOTRUN -> [SKIP][35] ([Intel XE#7482]) +2 other tests skip
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-1/igt@xe_exec_balancer@twice-parallel-basic.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race:
- shard-lnl: NOTRUN -> [SKIP][36] ([Intel XE#1392]) +2 other tests skip
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-3/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race.html
* igt@xe_exec_fault_mode@once-multi-queue-userptr-invalidate-race-imm:
- shard-lnl: NOTRUN -> [SKIP][37] ([Intel XE#7136]) +2 other tests skip
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-7/igt@xe_exec_fault_mode@once-multi-queue-userptr-invalidate-race-imm.html
* igt@xe_exec_multi_queue@max-queues-preempt-mode-dyn-priority-smem:
- shard-lnl: NOTRUN -> [SKIP][38] ([Intel XE#6874]) +6 other tests skip
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-2/igt@xe_exec_multi_queue@max-queues-preempt-mode-dyn-priority-smem.html
* igt@xe_exec_threads@threads-multi-queue-shared-vm-rebind:
- shard-lnl: NOTRUN -> [SKIP][39] ([Intel XE#7138]) +1 other test skip
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-4/igt@xe_exec_threads@threads-multi-queue-shared-vm-rebind.html
* igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit:
- shard-lnl: NOTRUN -> [SKIP][40] ([Intel XE#2229])
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-8/igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit.html
* igt@xe_query@multigpu-query-topology-l3-bank-mask:
- shard-lnl: NOTRUN -> [SKIP][41] ([Intel XE#944]) +1 other test skip
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-7/igt@xe_query@multigpu-query-topology-l3-bank-mask.html
* igt@xe_sriov_admin@sched-priority-vf-write-denied:
- shard-lnl: NOTRUN -> [SKIP][42] ([Intel XE#7174])
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-7/igt@xe_sriov_admin@sched-priority-vf-write-denied.html
#### Possible fixes ####
* igt@kms_flip@flip-vs-expired-vblank@c-edp1:
- shard-lnl: [FAIL][43] ([Intel XE#301] / [Intel XE#3149]) -> [PASS][44] +1 other test pass
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8798/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
* igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1:
- shard-lnl: [FAIL][45] ([Intel XE#2142]) -> [PASS][46] +1 other test pass
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8798/shard-lnl-6/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-6/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html
* igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma:
- shard-lnl: [FAIL][47] ([Intel XE#5625]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_8798/shard-lnl-5/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma.html
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/shard-lnl-5/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma.html
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
[Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
[Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
[Intel XE#1477]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1477
[Intel XE#1512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1512
[Intel XE#2142]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2142
[Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
[Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
[Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
[Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331
[Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608
[Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609
[Intel XE#4692]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4692
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#5625]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5625
[Intel XE#5813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5813
[Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#6540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6540
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#6665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6665
[Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#6969]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6969
[Intel XE#7006]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7006
[Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
[Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
[Intel XE#7174]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7174
[Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
[Intel XE#7227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7227
[Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
[Intel XE#7304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7304
[Intel XE#7345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7345
[Intel XE#7349]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7349
[Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
[Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
[Intel XE#7361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7361
[Intel XE#7373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7373
[Intel XE#7383]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7383
[Intel XE#7392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7392
[Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
[Intel XE#7508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7508
[Intel XE#7591]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7591
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* IGT: IGT_8798 -> IGTPW_14742
* Linux: xe-4704-169ea69ad8f2fb0a126608399386e4580bb2d0b0 -> xe-4705-a0e231ebb0df84f6febf147ee5fcaafd40c2dafe
IGTPW_14742: 79ac3166394c85f863a54dedc6924af5e3328046 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8798: 8798
xe-4704-169ea69ad8f2fb0a126608399386e4580bb2d0b0: 169ea69ad8f2fb0a126608399386e4580bb2d0b0
xe-4705-a0e231ebb0df84f6febf147ee5fcaafd40c2dafe: a0e231ebb0df84f6febf147ee5fcaafd40c2dafe
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_14742/index.html
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2026-03-12 7:48 [PATCH v2 i-g-t 0/2] tests/intel-ci: Add NVL display and core blocklists Aditya Chauhan
2026-03-12 7:48 ` [PATCH v2 i-g-t 1/2] tests/intel-ci: Add NVL core blocklist Aditya Chauhan
2026-03-12 8:06 ` Sharma, Swati2
2026-03-12 10:48 ` Kamil Konieczny
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2026-03-12 12:28 ` ✓ i915.CI.BAT: success for tests/intel-ci: Add NVL display and core blocklists (rev2) Patchwork
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