* [PATCH 1/3] tests/amdgpu: Add FRL Test Support
@ 2026-06-17 19:24 Fangzhi Zuo
2026-06-17 19:24 ` [PATCH 2/3] tests/amdgpu: Fix for HDMI Compliance Automation Fangzhi Zuo
` (3 more replies)
0 siblings, 4 replies; 5+ messages in thread
From: Fangzhi Zuo @ 2026-06-17 19:24 UTC (permalink / raw)
To: igt-dev, harry.wentland, Christian.Koenig, Alex.Hung
Cc: Fangzhi Zuo, Mark Broadworth
From: Fangzhi Zuo <jzuo@amd.com>
1. Add 2.1 mode list.
2. Extend support of pixel format to RGB/444/422/420 and
color depth to 8/10/12 bpc.
Signed-off-by: Fangzhi Zuo <jzuo@amd.com>
Tested-by: Mark Broadworth <Mark.Broadworth@amd.com>
---
tools/amd_hdmi_compliance.c | 437 +++++++++++++++++++++++++++++++++++-
1 file changed, 428 insertions(+), 9 deletions(-)
diff --git a/tools/amd_hdmi_compliance.c b/tools/amd_hdmi_compliance.c
index e0ef78d81..dc24430dd 100644
--- a/tools/amd_hdmi_compliance.c
+++ b/tools/amd_hdmi_compliance.c
@@ -100,6 +100,102 @@ static drmModeModeInfo test_modes[] = {
50, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_16_9,
0x40, "1920x1080", /* VIC 31 */
},
+ [32] = { 74250,
+ 1920, 2558, 2602, 2750, 0,
+ 1080, 1084, 1089, 1125, 0,
+ 24, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_16_9,
+ 0x40, "1920x1080", /* VIC 32 */
+ },
+ [33] = { 74250,
+ 1920, 2448, 2492, 2640, 0,
+ 1080, 1084, 1089, 1125, 0,
+ 25, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_16_9,
+ 0x40, "1920x1080", /* VIC 33 */
+ },
+ [34] = { 74250,
+ 1920, 2008, 2052, 2200, 0,
+ 1080, 1084, 1089, 1125, 0,
+ 30, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_16_9,
+ 0x40, "1920x1080", /* VIC 34 */
+ },
+ [41] = { 148500,
+ 1280, 1720, 1760, 1980, 0,
+ 720, 725, 730, 750, 0,
+ 100, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_16_9,
+ 0x40, "1280x720", /* VIC 41 */
+ },
+ [42] = { 54000,
+ 720, 732, 796, 864, 0,
+ 576, 581, 586, 625, 0,
+ 100, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_PIC_AR_4_3,
+ 0x40, "720x576", /* VIC 42 */
+ },
+ [43] = { 54000,
+ 720, 732, 796, 864, 0,
+ 576, 581, 586, 625, 0,
+ 100, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_PIC_AR_16_9,
+ 0x40, "720x576", /* VIC 43 */
+ },
+ [47] = { 148500,
+ 1280, 1390, 1430, 1650, 0,
+ 720, 725, 730, 750, 0,
+ 120, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_16_9,
+ 0x40, "1280x720", /* VIC 47 */
+ },
+ [48] = { 54000,
+ 720, 736, 798, 858, 0,
+ 480, 489, 495, 525, 0,
+ 120, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_PIC_AR_4_3,
+ 0x40, "720x480", /* VIC 48 */
+ },
+ [49] = { 54000,
+ 720, 736, 798, 858, 0,
+ 480, 489, 495, 525, 0,
+ 120, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_PIC_AR_16_9,
+ 0x40, "720x480", /* VIC 49 */
+ },
+ [52] = { 108000,
+ 720, 732, 796, 864, 0,
+ 576, 581, 586, 625, 0,
+ 200, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_PIC_AR_4_3,
+ 0x40, "720x576", /* VIC 52 */
+ },
+ [53] = { 108000,
+ 720, 732, 796, 864, 0,
+ 576, 581, 586, 625, 0,
+ 200, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_PIC_AR_16_9,
+ 0x40, "720x576", /* VIC 53 */
+ },
+ [56] = { 108000,
+ 720, 736, 798, 858, 0,
+ 480, 489, 495, 525, 0,
+ 240, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_PIC_AR_4_3,
+ 0x40, "720x480", /* VIC 56 */
+ },
+ [57] = { 108000,
+ 720, 736, 798, 858, 0,
+ 480, 489, 495, 525, 0,
+ 240, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_PIC_AR_16_9,
+ 0x40, "720x480", /* VIC 57 */
+ },
+ [60] = { 59400,
+ 1280, 3040, 3080, 3300, 0,
+ 720, 725, 730, 750, 0,
+ 24, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_16_9,
+ 0x40, "1280x720", /* VIC 60 */
+ },
+ [61] = { 74250,
+ 1280, 3700, 3740, 3960, 0,
+ 720, 725, 730, 750, 0,
+ 25, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_16_9,
+ 0x40, "1280x720", /* VIC 61 */
+ },
+ [62] = { 74250,
+ 1280, 3040, 3080, 3300, 0,
+ 720, 725, 730, 750, 0,
+ 30, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_16_9,
+ 0x40, "1280x720", /* VIC 62 */
+ },
[63] = { 297000,
1920, 2008, 2052, 2200, 0,
1080, 1084, 1089, 1125, 0,
@@ -284,7 +380,7 @@ static drmModeModeInfo test_modes[] = {
3840, 5116, 5204, 5500, 0,
2160, 2168, 2178, 2250, 0,
24, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_16_9,
- 0x40, "4096x2160", /* VIC 93 */
+ 0x40, "3840x2160", /* VIC 93 */
},
[94] = { 297000,
3840, 4896, 4984, 5280, 0,
@@ -344,7 +440,7 @@ static drmModeModeInfo test_modes[] = {
3840, 5116, 5204, 5500, 0,
2160, 2168, 2178, 2250, 0,
24, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_64_27,
- 0x40, "4096x2160", /* VIC 103 */
+ 0x40, "3840x2160", /* VIC 103 */
},
[104] = { 297000,
3840, 4896, 4984, 5280, 0,
@@ -370,6 +466,288 @@ static drmModeModeInfo test_modes[] = {
60, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_64_27,
0x40, "3840x2160", /* VIC 107 */
},
+ [108] = { 90000,
+ 1280, 2240, 2280, 2500, 0,
+ 720, 725, 730, 750, 0,
+ 48, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_16_9,
+ 0x40, "1280x720", /* VIC 108 */
+ },
+ [109] = { 90000,
+ 1280, 2240, 2280, 2500, 0,
+ 720, 725, 730, 750, 0,
+ 48, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_64_27,
+ 0x40, "1280x720", /* VIC 109 */
+ },
+ [110] = { 99000,
+ 1680, 2490, 2530, 2750, 0,
+ 720, 725, 730, 750, 0,
+ 48, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_64_27,
+ 0x40, "1680x720", /* VIC 110 */
+ },
+ [111] = { 148500,
+ 1920, 2558, 2602, 2750, 0,
+ 1080, 1084, 1089, 1125, 0,
+ 48, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_16_9,
+ 0x40, "1920x1080", /* VIC 111 */
+ },
+ [112] = { 148500,
+ 1920, 2558, 2602, 2750, 0,
+ 1080, 1084, 1089, 1125, 0,
+ 48, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_64_27,
+ 0x40, "1920x1080", /* VIC 112 */
+ },
+ [113] = { 198000,
+ 2560, 3558, 3602, 3750, 0,
+ 1080, 1084, 1089, 1100, 0,
+ 48, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_64_27,
+ 0x40, "2560x1080", /* VIC 113 */
+ },
+ [114] = { 594000,
+ 3840, 5116, 5204, 5500, 0,
+ 2160, 2168, 2178, 2250, 0,
+ 48, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_16_9,
+ 0x40, "3840x2160", /* VIC 114 */
+ },
+ [115] = { 594000,
+ 4096, 5116, 5204, 5500, 0,
+ 2160, 2168, 2178, 2250, 0,
+ 48, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_256_135,
+ 0x40, "4096x2160", /* VIC 115 */
+ },
+ [116] = { 594000,
+ 3840, 5116, 5204, 5500, 0,
+ 2160, 2168, 2178, 2250, 0,
+ 48, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_64_27,
+ 0x40, "3840x2160", /* VIC 116 */
+ },
+ [117] = { 1188000,
+ 3840, 4896, 4984, 5280, 0,
+ 2160, 2168, 2178, 2250, 0,
+ 100, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_16_9,
+ 0x40, "3840x2160", /* VIC 117 */
+ },
+ [118] = { 1188000,
+ 3840, 4016, 4104, 4400, 0,
+ 2160, 2168, 2178, 2250, 0,
+ 120, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_16_9,
+ 0x40, "3840x2160", /* VIC 118 */
+ },
+ [119] = { 1188000,
+ 3840, 4896, 4984, 5280, 0,
+ 2160, 2168, 2178, 2250, 0,
+ 100, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_64_27,
+ 0x40, "3840x2160", /* VIC 119 */
+ },
+ [120] = { 1188000,
+ 3840, 4016, 4104, 4400, 0,
+ 2160, 2168, 2178, 2250, 0,
+ 120, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_64_27,
+ 0x40, "3840x2160", /* VIC 120 */
+ },
+ [121] = { 396000,
+ 5120, 7116, 7204, 7500, 0,
+ 2160, 2168, 2178, 2200, 0,
+ 24, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_64_27,
+ 0x40, "5120x2160", /* VIC 121 */
+ },
+ [122] = { 396000,
+ 5120, 6816, 6904, 7200, 0,
+ 2160, 2168, 2178, 2200, 0,
+ 25, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_64_27,
+ 0x40, "5120x2160", /* VIC 122 */
+ },
+ [123] = { 396000,
+ 5120, 5784, 5872, 6000, 0,
+ 2160, 2168, 2178, 2200, 0,
+ 30, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_64_27,
+ 0x40, "5120x2160", /* VIC 123 */
+ },
+ [124] = { 742500,
+ 5120, 5866, 5954, 6250, 0,
+ 2160, 2168, 2178, 2475, 0,
+ 48, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_64_27,
+ 0x40, "5120x2160", /* VIC 124 */
+ },
+ [125] = { 742500,
+ 5120, 6216, 6304, 6600, 0,
+ 2160, 2168, 2178, 2250, 0,
+ 50, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_64_27,
+ 0x40, "5120x2160", /* VIC 125 */
+ },
+ [126] = { 742500,
+ 5120, 5284, 5372, 5500, 0,
+ 2160, 2168, 2178, 2250, 0,
+ 60, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_64_27,
+ 0x40, "5120x2160", /* VIC 126 */
+ },
+ [127] = { 1485000,
+ 5120, 6216, 6304, 6600, 0,
+ 2160, 2168, 2178, 2250, 0,
+ 100, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_64_27,
+ 0x40, "5120x2160", /* VIC 127 */
+ },
+ [193] = { 1485000,
+ 5120, 5284, 5372, 5500, 0,
+ 2160, 2168, 2178, 2250, 0,
+ 120, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_64_27,
+ 0x40, "5120x2160", /* VIC 193 */
+ },
+ [194] = { 1188000,
+ 7680, 10232, 10408, 11000, 0,
+ 4320, 4336, 4356, 4500, 0,
+ 24, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_16_9,
+ 0x40, "7680x4320", /* VIC 194 */
+ },
+ [195] = { 1188000,
+ 7680, 10032, 10208, 10800, 0,
+ 4320, 4336, 4356, 4400, 0,
+ 25, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_16_9,
+ 0x40, "7680x4320", /* VIC 195 */
+ },
+ [196] = { 1188000,
+ 7680, 8232, 8408, 9000, 0,
+ 4320, 4336, 4356, 4400, 0,
+ 30, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_16_9,
+ 0x40, "7680x4320", /* VIC 196 */
+ },
+ [197] = { 2376000,
+ 7680, 10232, 10408, 11000, 0,
+ 4320, 4336, 4356, 4500, 0,
+ 48, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_16_9,
+ 0x40, "7680x4320", /* VIC 197 */
+ },
+ [198] = { 2376000,
+ 7680, 10032, 10208, 10800, 0,
+ 4320, 4336, 4356, 4400, 0,
+ 50, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_16_9,
+ 0x40, "7680x4320", /* VIC 198 */
+ },
+ [199] = { 2376000,
+ 7680, 8232, 8408, 9000, 0,
+ 4320, 4336, 4356, 4400, 0,
+ 60, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_16_9,
+ 0x40, "7680x4320", /* VIC 199 */
+ },
+ [200] = { 4752000,
+ 7680, 9792, 9968, 10560, 0,
+ 4320, 4336, 4356, 4500, 0,
+ 100, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_16_9,
+ 0x40, "7680x4320", /* VIC 200 */
+ },
+ [201] = { 4752000,
+ 7680, 8032, 8208, 8800, 0,
+ 4320, 4336, 4356, 4500, 0,
+ 120, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_16_9,
+ 0x40, "7680x4320", /* VIC 201 */
+ },
+ [202] = { 1188000,
+ 7680, 10232, 10408, 11000, 0,
+ 4320, 4336, 4356, 4500, 0,
+ 24, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_64_27,
+ 0x40, "7680x4320", /* VIC 202 */
+ },
+ [203] = { 1188000,
+ 7680, 10032, 10208, 10800, 0,
+ 4320, 4336, 4356, 4400, 0,
+ 25, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_64_27,
+ 0x40, "7680x4320", /* VIC 203 */
+ },
+ [204] = { 1188000,
+ 7680, 8232, 8408, 9000, 0,
+ 4320, 4336, 4356, 4400, 0,
+ 30, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_64_27,
+ 0x40, "7680x4320", /* VIC 204 */
+ },
+ [205] = { 2376000,
+ 7680, 10232, 10408, 11000, 0,
+ 4320, 4336, 4356, 4500, 0,
+ 48, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_64_27,
+ 0x40, "7680x4320", /* VIC 205 */
+ },
+ [206] = { 2376000,
+ 7680, 10032, 10208, 10800, 0,
+ 4320, 4336, 4356, 4400, 0,
+ 50, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_64_27,
+ 0x40, "7680x4320", /* VIC 206 */
+ },
+ [207] = { 2376000,
+ 7680, 8232, 8408, 9000, 0,
+ 4320, 4336, 4356, 4400, 0,
+ 60, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_64_27,
+ 0x40, "7680x4320", /* VIC 207 */
+ },
+ [208] = { 4752000,
+ 7680, 9792, 9968, 10560, 0,
+ 4320, 4336, 4356, 4500, 0,
+ 100, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_64_27,
+ 0x40, "7680x4320", /* VIC 208 */
+ },
+ [209] = { 4752000,
+ 7680, 8032, 8208, 8800, 0,
+ 4320, 4336, 4356, 4500, 0,
+ 120, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_64_27,
+ 0x40, "7680x4320", /* VIC 209 */
+ },
+ [210] = { 1485000,
+ 10240, 11732, 11908, 12500, 0,
+ 4320, 4336, 4356, 4950, 0,
+ 24, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_64_27,
+ 0x40, "10240x4320", /* VIC 210 */
+ },
+ [211] = { 1485000,
+ 10240, 12732, 12908, 13500, 0,
+ 4320, 4336, 4356, 4400, 0,
+ 25, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_64_27,
+ 0x40, "10240x4320", /* VIC 211 */
+ },
+ [212] = { 1485000,
+ 10240, 10528, 10704, 11000, 0,
+ 4320, 4336, 4356, 4500, 0,
+ 30, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_64_27,
+ 0x40, "10240x4320", /* VIC 212 */
+ },
+ [213] = { 2970000,
+ 10240, 11732, 11908, 12500, 0,
+ 4320, 4336, 4356, 4950, 0,
+ 48, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_64_27,
+ 0x40, "10240x4320", /* VIC 213 */
+ },
+ [214] = { 2970000,
+ 10240, 12732, 12908, 13500, 0,
+ 4320, 4336, 4356, 4400, 0,
+ 50, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_64_27,
+ 0x40, "10240x4320", /* VIC 214 */
+ },
+ [215] = { 2970000,
+ 10240, 10528, 10704, 11000, 0,
+ 4320, 4336, 4356, 4500, 0,
+ 60, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_64_27,
+ 0x40, "10240x4320", /* VIC 215 */
+ },
+ [216] = { 5940000,
+ 10240, 12432, 12608, 13200, 0,
+ 4320, 4336, 4356, 4500, 0,
+ 100, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_64_27,
+ 0x40, "10240x4320", /* VIC 216 */
+ },
+ [217] = { 5940000,
+ 10240, 10528, 10704, 11000, 0,
+ 4320, 4336, 4356, 4500, 0,
+ 120, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_64_27,
+ 0x40, "10240x4320", /* VIC 217 */
+ },
+ [218] = { 1188000,
+ 4096, 4896, 4984, 5280, 0,
+ 2160, 2168, 2178, 2250, 0,
+ 100, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_256_135,
+ 0x40, "4096x2160", /* VIC 218 */
+ },
+ [219] = { 1188000,
+ 4096, 4184, 4272, 4400, 0,
+ 2160, 2168, 2178, 2250, 0,
+ 120, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PIC_AR_256_135,
+ 0x40, "5120x2160", /* VIC 219 */
+ },
};
static void signal_handler(int signo)
@@ -460,21 +838,62 @@ static void set_force_yuv420(data_t *data, int force, int conn_id)
test_fini(data);
}
+static void set_force_yuv_pixel_format(data_t *data, int yuv_pixel_format, int conn_id)
+{
+ int fd, res;
+ const char *entry_name;
+
+ test_init(data, conn_id);
+
+ fd = igt_debugfs_connector_dir(data->fd, data->output->name, O_RDONLY);
+ igt_assert(fd >= 0);
+
+ igt_info("Setting %d on connector id %d\n",
+ yuv_pixel_format, data->output->config.connector->connector_id);
+
+ switch (yuv_pixel_format) {
+ case 2:
+ entry_name = "force_yuv422_output";
+ break;
+ case 3:
+ entry_name = "force_yuv444_output";
+ break;
+ case 4:
+ entry_name = "force_yuv420_output";
+ break;
+ default:
+ goto out;
+ }
+
+ igt_info("%s\n", entry_name);
+ res = igt_sysfs_write(fd, entry_name, "1", 2);
+ igt_info("res = %d\n", res);
+ igt_require(res > 0);
+
+out:
+ close(fd);
+ test_fini(data);
+}
+
/* Set "max bpc" property of connector */
static void set_max_bpc(data_t *data, int max_bpc, int conn_id)
{
igt_display_t *display = &data->display;
igt_fb_t afb;
+ drmModeModeInfo *mode;
test_init(data, conn_id);
+ mode = igt_output_get_mode(data->output);
+
igt_info("Setting max bpc to %d on connector id %d\n",
max_bpc, data->output->config.connector->connector_id);
- igt_create_fb(data->fd, 128, 128, DRM_FORMAT_XRGB8888, 0, &afb);
+ igt_create_pattern_fb(data->fd, 1024, 1024, DRM_FORMAT_XRGB8888, 0, &afb);
igt_plane_set_fb(data->primary, &afb);
igt_output_set_prop_value(data->output, IGT_CONNECTOR_MAX_BPC, max_bpc);
igt_display_commit_atomic(display, DRM_MODE_ATOMIC_ALLOW_MODESET, NULL);
+ igt_remove_fb(data->fd, &afb);
test_fini(data);
}
@@ -510,8 +929,8 @@ static void usage(const char *name)
igt_info("-t vic Select video mode based on VIC\n");
igt_info("-v Test on 'Virtual' connector as well, for debugging.\n");
igt_info("-i conn_id Use connector by ID\n");
- igt_info("-b max_bpc Set \"max bpc\" connector property\n");
- igt_info("-y 0|1 Write 0 or 1 to connector's debugfs force_yuv420_output\n");
+ igt_info("-b 8|10|12 8|10|12 bpc\n");
+ igt_info("-y 1|2|3|4 RGB|YUV422|YUV444|YUV420\n");
igt_info("-e seconds number of seconds to display test pattern and exit\n");
igt_info("NOTE: if -i is not specified, first connected HDMI connector will be used for -t, -b and -y\n");
}
@@ -523,7 +942,7 @@ int main(int argc, char **argv)
int vic = 0;
int conn_id = 0;
int max_bpc = 0;
- int force_yuv_420 = -1;
+ int force_yuv_pixel_format = -1;
memset(&data, 0, sizeof(data));
@@ -542,7 +961,7 @@ int main(int argc, char **argv)
max_bpc = atoi(optarg);
break;
case 'y':
- force_yuv_420 = atoi(optarg);
+ force_yuv_pixel_format = atoi(optarg);
break;
case 'e':
data.timeout_seconds = atoi(optarg);
@@ -561,8 +980,8 @@ int main(int argc, char **argv)
igt_require(data.display.is_atomic);
igt_display_require_output(&data.display);
- if (force_yuv_420 >= 0)
- set_force_yuv420(&data, force_yuv_420, conn_id);
+ if (force_yuv_pixel_format >= 2 && force_yuv_pixel_format <= 4)
+ set_force_yuv_pixel_format(&data, force_yuv_pixel_format, conn_id);
if (max_bpc)
set_max_bpc(&data, max_bpc, conn_id);
--
2.43.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/3] tests/amdgpu: Fix for HDMI Compliance Automation
2026-06-17 19:24 [PATCH 1/3] tests/amdgpu: Add FRL Test Support Fangzhi Zuo
@ 2026-06-17 19:24 ` Fangzhi Zuo
2026-06-17 19:24 ` [PATCH 3/3] lib/igt_amd: Fix 8k Memory Allocation Fangzhi Zuo
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Fangzhi Zuo @ 2026-06-17 19:24 UTC (permalink / raw)
To: igt-dev, harry.wentland, Christian.Koenig, Alex.Hung
Cc: Mark Broadworth, Fangzhi Zuo
From: Mark Broadworth <Mark.Broadworth@amd.com>
It is to fix hand shaking issue between DUT and the box.
Need to block until SIGNALRM triggered.
Signed-off-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Tested-by: Mark Broadworth <Mark.Broadworth@amd.com>
---
tools/amd_hdmi_compliance.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/tools/amd_hdmi_compliance.c b/tools/amd_hdmi_compliance.c
index dc24430dd..14f455320 100644
--- a/tools/amd_hdmi_compliance.c
+++ b/tools/amd_hdmi_compliance.c
@@ -915,8 +915,12 @@ static void test_vic_mode(data_t *data, int vic, int conn_id)
igt_plane_set_fb(data->primary, &afb);
igt_display_commit_atomic(display, DRM_MODE_ATOMIC_ALLOW_MODESET, NULL);
- igt_info("Press [Enter] to finish\n");
- wait_for_keypress();
+ if (data->timeout_seconds > 0)
+ pause(); /* block until SIGALRM fires (works when detached) */
+ else {
+ igt_info("Press [Enter] to finish\n");
+ wait_for_keypress();
+ }
test_fini(data);
}
--
2.43.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 3/3] lib/igt_amd: Fix 8k Memory Allocation
2026-06-17 19:24 [PATCH 1/3] tests/amdgpu: Add FRL Test Support Fangzhi Zuo
2026-06-17 19:24 ` [PATCH 2/3] tests/amdgpu: Fix for HDMI Compliance Automation Fangzhi Zuo
@ 2026-06-17 19:24 ` Fangzhi Zuo
2026-06-17 20:56 ` ✓ Xe.CI.BAT: success for series starting with [1/3] tests/amdgpu: Add FRL Test Support Patchwork
2026-06-17 21:43 ` ✓ i915.CI.BAT: " Patchwork
3 siblings, 0 replies; 5+ messages in thread
From: Fangzhi Zuo @ 2026-06-17 19:24 UTC (permalink / raw)
To: igt-dev, harry.wentland, Christian.Koenig, Alex.Hung
Cc: Fangzhi Zuo, Mark Broadworth
For the memory allocation greater than 5k on small BAR system,
need to stop accessing BO with CPU.
Signed-off-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Tested-by: Mark Broadworth <Mark.Broadworth@amd.com>
---
lib/igt_amd.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/igt_amd.c b/lib/igt_amd.c
index 47e587e54..5e8626c02 100644
--- a/lib/igt_amd.c
+++ b/lib/igt_amd.c
@@ -58,7 +58,7 @@ uint32_t igt_amd_create_bo(int fd, uint64_t size)
create.in.bo_size = size;
create.in.alignment = 256;
create.in.domains = AMDGPU_GEM_DOMAIN_VRAM;
- create.in.domain_flags = AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED
+ create.in.domain_flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS
| AMDGPU_GEM_CREATE_VRAM_CLEARED;
do_ioctl(fd, DRM_IOCTL_AMDGPU_GEM_CREATE, &create);
--
2.43.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* ✓ Xe.CI.BAT: success for series starting with [1/3] tests/amdgpu: Add FRL Test Support
2026-06-17 19:24 [PATCH 1/3] tests/amdgpu: Add FRL Test Support Fangzhi Zuo
2026-06-17 19:24 ` [PATCH 2/3] tests/amdgpu: Fix for HDMI Compliance Automation Fangzhi Zuo
2026-06-17 19:24 ` [PATCH 3/3] lib/igt_amd: Fix 8k Memory Allocation Fangzhi Zuo
@ 2026-06-17 20:56 ` Patchwork
2026-06-17 21:43 ` ✓ i915.CI.BAT: " Patchwork
3 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2026-06-17 20:56 UTC (permalink / raw)
To: Fangzhi Zuo; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 1086 bytes --]
== Series Details ==
Series: series starting with [1/3] tests/amdgpu: Add FRL Test Support
URL : https://patchwork.freedesktop.org/series/168733/
State : success
== Summary ==
CI Bug Log - changes from XEIGT_8971_BAT -> XEIGTPW_15390_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* IGT: IGT_8971 -> IGTPW_15390
* Linux: xe-5274-f7cb2873b7430d84afd4ad4e4771d3f8ad03fbf9 -> xe-5275-18816557ad112c94f3bf5ee625cd862d8d3f41af
IGTPW_15390: 3c6b9ccdfbc68629dbd67fe38fb6b147912c928e @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8971: 8971
xe-5274-f7cb2873b7430d84afd4ad4e4771d3f8ad03fbf9: f7cb2873b7430d84afd4ad4e4771d3f8ad03fbf9
xe-5275-18816557ad112c94f3bf5ee625cd862d8d3f41af: 18816557ad112c94f3bf5ee625cd862d8d3f41af
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15390/index.html
[-- Attachment #2: Type: text/html, Size: 1645 bytes --]
^ permalink raw reply [flat|nested] 5+ messages in thread
* ✓ i915.CI.BAT: success for series starting with [1/3] tests/amdgpu: Add FRL Test Support
2026-06-17 19:24 [PATCH 1/3] tests/amdgpu: Add FRL Test Support Fangzhi Zuo
` (2 preceding siblings ...)
2026-06-17 20:56 ` ✓ Xe.CI.BAT: success for series starting with [1/3] tests/amdgpu: Add FRL Test Support Patchwork
@ 2026-06-17 21:43 ` Patchwork
3 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2026-06-17 21:43 UTC (permalink / raw)
To: Fangzhi Zuo; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 2081 bytes --]
== Series Details ==
Series: series starting with [1/3] tests/amdgpu: Add FRL Test Support
URL : https://patchwork.freedesktop.org/series/168733/
State : success
== Summary ==
CI Bug Log - changes from IGT_8971 -> IGTPW_15390
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15390/index.html
Participating hosts (41 -> 40)
------------------------------
Additional (1): fi-skl-6600u
Missing (2): bat-dg2-13 fi-snb-2520m
Known issues
------------
Here are the changes found in IGTPW_15390 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_huc_copy@huc-copy:
- fi-skl-6600u: NOTRUN -> [SKIP][1] ([i915#2190])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15390/fi-skl-6600u/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@random-engines:
- fi-skl-6600u: NOTRUN -> [SKIP][2] ([i915#4613]) +3 other tests skip
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15390/fi-skl-6600u/igt@gem_lmem_swapping@random-engines.html
* igt@kms_dsc@dsc-basic:
- fi-skl-6600u: NOTRUN -> [SKIP][3] +11 other tests skip
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15390/fi-skl-6600u/igt@kms_dsc@dsc-basic.html
[i915#2190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2190
[i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_8971 -> IGTPW_15390
* Linux: CI_DRM_18696 -> CI_DRM_18697
CI-20190529: 20190529
CI_DRM_18696: f7cb2873b7430d84afd4ad4e4771d3f8ad03fbf9 @ git://anongit.freedesktop.org/gfx-ci/linux
CI_DRM_18697: 18816557ad112c94f3bf5ee625cd862d8d3f41af @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_15390: 3c6b9ccdfbc68629dbd67fe38fb6b147912c928e @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8971: 8971
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15390/index.html
[-- Attachment #2: Type: text/html, Size: 2755 bytes --]
^ permalink raw reply [flat|nested] 5+ messages in thread
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2026-06-17 19:24 [PATCH 1/3] tests/amdgpu: Add FRL Test Support Fangzhi Zuo
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2026-06-17 19:24 ` [PATCH 3/3] lib/igt_amd: Fix 8k Memory Allocation Fangzhi Zuo
2026-06-17 20:56 ` ✓ Xe.CI.BAT: success for series starting with [1/3] tests/amdgpu: Add FRL Test Support Patchwork
2026-06-17 21:43 ` ✓ i915.CI.BAT: " Patchwork
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