* [PATCH i-g-t v2 0/2] Enable multi-format testing for chamelium color tests
@ 2026-07-15 4:32 Pranay Samala
2026-07-15 4:32 ` [PATCH i-g-t v2 1/2] tests/chamelium/kms_chamelium_color: Prepare FB creation for explicit YUV color range handling Pranay Samala
` (5 more replies)
0 siblings, 6 replies; 7+ messages in thread
From: Pranay Samala @ 2026-07-15 4:32 UTC (permalink / raw)
To: igt-dev; +Cc: karthik.b.s, swati2.sharma, sameer.lattannavar, pranay.samala
This series adds multi-format coverage to kms_chamelium_color
pipe color tests.
To ensure deterministic behavior across YUV formats, the first patch
updates framebuffer creation to explicitly specify YCbCr encoding/range
instead of relying on implicit defaults.
The second patch extends gamma, degamma, and CTM tests to run across
multiple pixel formats at the dynamic subtest level. This adds coverage
for format-dependent color pipeline behavior.
Pranay Samala (2):
tests/chamelium/kms_chamelium_color: Prepare FB creation for explicit
YUV color range handling
tests/chamelium/kms_chamelium_color: Add multi-format coverage for
pipe color tests
tests/chamelium/kms_chamelium_color.c | 240 +++++++++++++++-----------
1 file changed, 139 insertions(+), 101 deletions(-)
--
2.53.0
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH i-g-t v2 1/2] tests/chamelium/kms_chamelium_color: Prepare FB creation for explicit YUV color range handling 2026-07-15 4:32 [PATCH i-g-t v2 0/2] Enable multi-format testing for chamelium color tests Pranay Samala @ 2026-07-15 4:32 ` Pranay Samala 2026-07-15 4:32 ` [PATCH i-g-t v2 2/2] tests/chamelium/kms_chamelium_color: Add multi-format coverage for pipe color tests Pranay Samala ` (4 subsequent siblings) 5 siblings, 0 replies; 7+ messages in thread From: Pranay Samala @ 2026-07-15 4:32 UTC (permalink / raw) To: igt-dev; +Cc: karthik.b.s, swati2.sharma, sameer.lattannavar, pranay.samala Switch framebuffer creation from igt_create_fb() to a common path that can use igt_create_fb_with_bo_size() when explicit YCbCr encoding/range is needed. YUV formats may otherwise be interpreted with implicit limited-range defaults (16-235) instead of full range (0-255), which can make color expectations non-deterministic in YUV coverage. This is a preparatory cleanup and does not fix a user-visible bug. It refactors FB creation so YUV paths can carry explicit YCbCr parameters, while RGB paths continue using the default framebuffer creation behavior. v2: - Keep RGB formats on the existing igt_create_fb() path - Use explicit range/encoding only for YUV formats - Rebase and split the patches Signed-off-by: Pranay Samala <pranay.samala@intel.com> --- tests/chamelium/kms_chamelium_color.c | 138 ++++++++++++++------------ 1 file changed, 72 insertions(+), 66 deletions(-) diff --git a/tests/chamelium/kms_chamelium_color.c b/tests/chamelium/kms_chamelium_color.c index 31629ec58..72d7716bc 100644 --- a/tests/chamelium/kms_chamelium_color.c +++ b/tests/chamelium/kms_chamelium_color.c @@ -58,6 +58,21 @@ IGT_TEST_DESCRIPTION("Test Color Features at Pipe level using Chamelium to verify instead of CRC"); +static unsigned int create_test_fb(data_t *data, int w, int h, + uint32_t format, + enum igt_color_encoding encoding, + enum igt_color_range range, + struct igt_fb *fb) +{ + if (igt_format_is_yuv(format)) + return igt_create_fb_with_bo_size(data->drm_fd, w, h, format, + DRM_FORMAT_MOD_LINEAR, + encoding, range, fb, 0, 0); + + return igt_create_fb(data->drm_fd, w, h, format, + DRM_FORMAT_MOD_LINEAR, fb); +} + /* * Draw 3 gradient rectangles in red, green and blue, with a maxed out * degamma LUT and verify we have the same frame dump as drawing solid color @@ -87,28 +102,25 @@ static bool test_pipe_degamma(data_t *data, igt_output_set_crtc(output, primary->crtc); /* Create a framebuffer at the size of the output. */ - fb_id = igt_create_fb(data->drm_fd, - mode->hdisplay, - mode->vdisplay, - DRM_FORMAT_XRGB8888, - DRM_FORMAT_MOD_LINEAR, - &fb); + fb_id = create_test_fb(data, mode->hdisplay, mode->vdisplay, + data->drm_format, + IGT_COLOR_YCBCR_BT709, + IGT_COLOR_YCBCR_FULL_RANGE, + &fb); igt_assert(fb_id); - fb_modeset_id = igt_create_fb(data->drm_fd, - mode->hdisplay, - mode->vdisplay, - DRM_FORMAT_XRGB8888, - DRM_FORMAT_MOD_LINEAR, - &fb_modeset); + fb_modeset_id = create_test_fb(data, mode->hdisplay, mode->vdisplay, + data->drm_format, + IGT_COLOR_YCBCR_BT709, + IGT_COLOR_YCBCR_FULL_RANGE, + &fb_modeset); igt_assert(fb_modeset_id); - fbref_id = igt_create_fb(data->drm_fd, - mode->hdisplay, - mode->vdisplay, - DRM_FORMAT_XRGB8888, - DRM_FORMAT_MOD_LINEAR, - &fbref); + fbref_id = create_test_fb(data, mode->hdisplay, mode->vdisplay, + data->drm_format, + IGT_COLOR_YCBCR_BT709, + IGT_COLOR_YCBCR_FULL_RANGE, + &fbref); igt_assert(fbref_id); igt_plane_set_fb(primary, &fb_modeset); @@ -177,28 +189,27 @@ static bool test_pipe_gamma(data_t *data, igt_output_set_crtc(output, primary->crtc); /* Create a framebuffer at the size of the output. */ - fb_id = igt_create_fb(data->drm_fd, - mode->hdisplay, - mode->vdisplay, - DRM_FORMAT_XRGB8888, - DRM_FORMAT_MOD_LINEAR, - &fb); + fb_id = create_test_fb(data, mode->hdisplay, mode->vdisplay, + data->drm_format, + IGT_COLOR_YCBCR_BT709, + IGT_COLOR_YCBCR_FULL_RANGE, + &fb); igt_assert(fb_id); - fb_modeset_id = igt_create_fb(data->drm_fd, - mode->hdisplay, - mode->vdisplay, - DRM_FORMAT_XRGB8888, - DRM_FORMAT_MOD_LINEAR, - &fb_modeset); + fb_modeset_id = create_test_fb(data, mode->hdisplay, + mode->vdisplay, + data->drm_format, + IGT_COLOR_YCBCR_BT709, + IGT_COLOR_YCBCR_FULL_RANGE, + &fb_modeset); igt_assert(fb_modeset_id); - fbref_id = igt_create_fb(data->drm_fd, - mode->hdisplay, - mode->vdisplay, - DRM_FORMAT_XRGB8888, - DRM_FORMAT_MOD_LINEAR, - &fbref); + fbref_id = create_test_fb(data, mode->hdisplay, + mode->vdisplay, + data->drm_format, + IGT_COLOR_YCBCR_BT709, + IGT_COLOR_YCBCR_FULL_RANGE, + &fbref); igt_assert(fbref_id); igt_plane_set_fb(primary, &fbref); @@ -265,28 +276,25 @@ static bool test_pipe_ctm(data_t *data, igt_output_set_crtc(output, primary->crtc); /* Create a framebuffer at the size of the output. */ - fb_id = igt_create_fb(data->drm_fd, - mode->hdisplay, - mode->vdisplay, - DRM_FORMAT_XRGB8888, - DRM_FORMAT_MOD_LINEAR, - &fb); + fb_id = create_test_fb(data, mode->hdisplay, mode->vdisplay, + data->drm_format, + IGT_COLOR_YCBCR_BT709, + IGT_COLOR_YCBCR_FULL_RANGE, + &fb); igt_assert(fb_id); - fb_modeset_id = igt_create_fb(data->drm_fd, - mode->hdisplay, - mode->vdisplay, - DRM_FORMAT_XRGB8888, - DRM_FORMAT_MOD_LINEAR, - &fb_modeset); + fb_modeset_id = create_test_fb(data, mode->hdisplay, mode->vdisplay, + data->drm_format, + IGT_COLOR_YCBCR_BT709, + IGT_COLOR_YCBCR_FULL_RANGE, + &fb_modeset); igt_assert(fb_modeset_id); - fbref_id = igt_create_fb(data->drm_fd, - mode->hdisplay, - mode->vdisplay, - DRM_FORMAT_XRGB8888, - DRM_FORMAT_MOD_LINEAR, - &fbref); + fbref_id = create_test_fb(data, mode->hdisplay, mode->vdisplay, + data->drm_format, + IGT_COLOR_YCBCR_BT709, + IGT_COLOR_YCBCR_FULL_RANGE, + &fbref); igt_assert(fbref_id); igt_plane_set_fb(primary, &fb_modeset); @@ -369,20 +377,18 @@ static bool test_pipe_limited_range_ctm(data_t *data, igt_output_set_crtc(output, primary->crtc); /* Create a framebuffer at the size of the output. */ - fb_id0 = igt_create_fb(data->drm_fd, - mode->hdisplay, - mode->vdisplay, - DRM_FORMAT_XRGB8888, - DRM_FORMAT_MOD_LINEAR, - &fb0); + fb_id0 = create_test_fb(data, mode->hdisplay, mode->vdisplay, + data->drm_format, + IGT_COLOR_YCBCR_BT709, + IGT_COLOR_YCBCR_FULL_RANGE, + &fb0); igt_assert(fb_id0); - fb_id1 = igt_create_fb(data->drm_fd, - mode->hdisplay, - mode->vdisplay, - DRM_FORMAT_XRGB8888, - DRM_FORMAT_MOD_LINEAR, - &fb1); + fb_id1 = create_test_fb(data, mode->hdisplay, mode->vdisplay, + data->drm_format, + IGT_COLOR_YCBCR_BT709, + IGT_COLOR_YCBCR_FULL_RANGE, + &fb1); igt_assert(fb_id1); set_degamma(data, primary->crtc, degamma_linear); -- 2.53.0 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH i-g-t v2 2/2] tests/chamelium/kms_chamelium_color: Add multi-format coverage for pipe color tests 2026-07-15 4:32 [PATCH i-g-t v2 0/2] Enable multi-format testing for chamelium color tests Pranay Samala 2026-07-15 4:32 ` [PATCH i-g-t v2 1/2] tests/chamelium/kms_chamelium_color: Prepare FB creation for explicit YUV color range handling Pranay Samala @ 2026-07-15 4:32 ` Pranay Samala 2026-07-15 5:58 ` ✓ Xe.CI.BAT: success for Enable multi-format testing for chamelium " Patchwork ` (3 subsequent siblings) 5 siblings, 0 replies; 7+ messages in thread From: Pranay Samala @ 2026-07-15 4:32 UTC (permalink / raw) To: igt-dev; +Cc: karthik.b.s, swati2.sharma, sameer.lattannavar, pranay.samala Extend chamelium color tests to run across multiple pixel formats at dynamic subtest level instead of being limited to single format for gamma/degamma and CTM tests. This improves coverage for format-dependent pipe color pipeline behavior. v2: - Add formats (P010, RGB10bit, FP16) - Rebase and split the patches Signed-off-by: Pranay Samala <pranay.samala@intel.com> --- tests/chamelium/kms_chamelium_color.c | 102 +++++++++++++++++--------- 1 file changed, 67 insertions(+), 35 deletions(-) diff --git a/tests/chamelium/kms_chamelium_color.c b/tests/chamelium/kms_chamelium_color.c index 72d7716bc..77970fa7e 100644 --- a/tests/chamelium/kms_chamelium_color.c +++ b/tests/chamelium/kms_chamelium_color.c @@ -58,6 +58,19 @@ IGT_TEST_DESCRIPTION("Test Color Features at Pipe level using Chamelium to verify instead of CRC"); +static const struct { + const char *name; + uint32_t format; + int bpc; +} formats[] = { + { "XRGB8888", DRM_FORMAT_XRGB8888, 8 }, + { "YUYV", DRM_FORMAT_YUYV, 8 }, + { "NV12", DRM_FORMAT_NV12, 8 }, + { "XRGB2101010", DRM_FORMAT_XRGB2101010, 10 }, + { "P010", DRM_FORMAT_P010, 10 }, + { "FP16", DRM_FORMAT_XRGB16161616F, 16 }, +}; + static unsigned int create_test_fb(data_t *data, int w, int h, uint32_t format, enum igt_color_encoding encoding, @@ -504,15 +517,24 @@ run_gamma_degamma_tests_for_crtc(data_t *data, igt_crtc_t *crtc, igt_require(port_idx >= 0); - data->color_depth = 8; - data->drm_format = DRM_FORMAT_XRGB8888; data->mode = igt_output_get_mode(data->output); if (!crtc_output_combo_valid(data, crtc)) return; - - igt_dynamic_f("pipe-%s-%s", igt_crtc_name(crtc), data->output->name) - igt_assert(test_t(data, data->primary, data->ports[port_idx])); + for (int i = 0; i < ARRAY_SIZE(formats); i++) { + if (!igt_plane_has_format_mod(data->primary, formats[i].format, + DRM_FORMAT_MOD_LINEAR)) + continue; + + igt_dynamic_f("pipe-%s-%s-%s", igt_crtc_name(crtc), + data->output->name, formats[i].name) { + igt_info("Running on " IGT_FORMAT_FMT " format\n", + IGT_FORMAT_ARGS(formats[i].format)); + data->color_depth = formats[i].bpc; + data->drm_format = formats[i].format; + igt_assert(test_t(data, data->primary, data->ports[port_idx])); + } + } } static void @@ -522,6 +544,7 @@ run_ctm_tests_for_crtc(data_t *data, igt_crtc_t *crtc, int iter) { double delta; + bool success; color_t red_green_blue[] = { { 1.0, 0.0, 0.0 }, { 0.0, 1.0, 0.0 }, @@ -542,43 +565,52 @@ run_ctm_tests_for_crtc(data_t *data, igt_crtc_t *crtc, * We assume an 8bits depth per color for degamma/gamma LUTs * for CRC checks with framebuffer references. */ - data->color_depth = 8; - delta = 1.0 / (1 << data->color_depth); - data->drm_format = DRM_FORMAT_XRGB8888; data->mode = igt_output_get_mode(data->output); if (!crtc_output_combo_valid(data, crtc)) return; - igt_dynamic_f("pipe-%s-%s", igt_crtc_name(crtc), data->output->name) { - bool success = false; - int i; - - if (!iter) - success = test_pipe_ctm(data, data->primary, - red_green_blue, - expected_colors, ctm, - data->ports[port_idx]); - - /* - * We tests a few values around the expected result because - * it depends on the hardware we're dealing with, we can either - * get clamped or rounded values and we also need to account - * for odd number of items in the LUTs. - */ - for (i = 0; i < iter; i++) { - expected_colors[0].r = - expected_colors[1].g = - expected_colors[2].b = - ctm[0] + delta * (i - (iter / 2)); - if (test_pipe_ctm(data, data->primary, - red_green_blue, expected_colors, - ctm, data->ports[port_idx])) { - success = true; - break; + for (int fi = 0; fi < ARRAY_SIZE(formats); fi++) { + if (!igt_plane_has_format_mod(data->primary, formats[fi].format, + DRM_FORMAT_MOD_LINEAR)) + continue; + + igt_dynamic_f("pipe-%s-%s", igt_crtc_name(crtc), data->output->name) { + data->color_depth = formats[fi].bpc; + delta = 1.0 / (1 << data->color_depth); + data->drm_format = formats[fi].format; + success = false; + int i; + + igt_info("Running on " IGT_FORMAT_FMT " format\n", + IGT_FORMAT_ARGS(formats[fi].format)); + + if (!iter) + success = test_pipe_ctm(data, data->primary, + red_green_blue, + expected_colors, ctm, + data->ports[port_idx]); + + /* + * We tests a few values around the expected result because + * it depends on the hardware we're dealing with, we can either + * get clamped or rounded values and we also need to account + * for odd number of items in the LUTs. + */ + for (i = 0; i < iter; i++) { + expected_colors[0].r = + expected_colors[1].g = + expected_colors[2].b = + ctm[0] + delta * (i - (iter / 2)); + if (test_pipe_ctm(data, data->primary, + red_green_blue, expected_colors, + ctm, data->ports[port_idx])) { + success = true; + break; + } } + igt_assert(success); } - igt_assert(success); } } -- 2.53.0 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* ✓ Xe.CI.BAT: success for Enable multi-format testing for chamelium color tests 2026-07-15 4:32 [PATCH i-g-t v2 0/2] Enable multi-format testing for chamelium color tests Pranay Samala 2026-07-15 4:32 ` [PATCH i-g-t v2 1/2] tests/chamelium/kms_chamelium_color: Prepare FB creation for explicit YUV color range handling Pranay Samala 2026-07-15 4:32 ` [PATCH i-g-t v2 2/2] tests/chamelium/kms_chamelium_color: Add multi-format coverage for pipe color tests Pranay Samala @ 2026-07-15 5:58 ` Patchwork 2026-07-15 6:23 ` ✓ i915.CI.BAT: " Patchwork ` (2 subsequent siblings) 5 siblings, 0 replies; 7+ messages in thread From: Patchwork @ 2026-07-15 5:58 UTC (permalink / raw) To: Pranay Samala; +Cc: igt-dev [-- Attachment #1: Type: text/plain, Size: 3975 bytes --] == Series Details == Series: Enable multi-format testing for chamelium color tests URL : https://patchwork.freedesktop.org/series/170452/ State : success == Summary == CI Bug Log - changes from XEIGT_9006_BAT -> XEIGTPW_15530_BAT ==================================================== Summary ------- **SUCCESS** No regressions found. Participating hosts (12 -> 13) ------------------------------ Additional (1): bat-bmg-2 Known issues ------------ Here are the changes found in XEIGTPW_15530_BAT that come from known issues: ### IGT changes ### #### Issues hit #### * igt@xe_module_load@load: - bat-ptl-2: [PASS][1] -> [ABORT][2] ([Intel XE#8607]) [1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/bat-ptl-2/igt@xe_module_load@load.html [2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/bat-ptl-2/igt@xe_module_load@load.html - bat-wcl-1: [PASS][3] -> [ABORT][4] ([Intel XE#8607]) [3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/bat-wcl-1/igt@xe_module_load@load.html [4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/bat-wcl-1/igt@xe_module_load@load.html - bat-ptl-1: [PASS][5] -> [ABORT][6] ([Intel XE#8607]) [5]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/bat-ptl-1/igt@xe_module_load@load.html [6]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/bat-ptl-1/igt@xe_module_load@load.html - bat-wcl-2: [PASS][7] -> [ABORT][8] ([Intel XE#8607]) [7]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/bat-wcl-2/igt@xe_module_load@load.html [8]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/bat-wcl-2/igt@xe_module_load@load.html - bat-lnl-1: [PASS][9] -> [ABORT][10] ([Intel XE#8607]) [9]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/bat-lnl-1/igt@xe_module_load@load.html [10]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/bat-lnl-1/igt@xe_module_load@load.html - bat-bmg-2: NOTRUN -> [ABORT][11] ([Intel XE#8607]) [11]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/bat-bmg-2/igt@xe_module_load@load.html - bat-bmg-3: [PASS][12] -> [ABORT][13] ([Intel XE#8607]) [12]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/bat-bmg-3/igt@xe_module_load@load.html [13]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/bat-bmg-3/igt@xe_module_load@load.html - bat-bmg-1: [PASS][14] -> [ABORT][15] ([Intel XE#8607]) [14]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/bat-bmg-1/igt@xe_module_load@load.html [15]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/bat-bmg-1/igt@xe_module_load@load.html - bat-adlp-7: [PASS][16] -> [ABORT][17] ([Intel XE#8607]) [16]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/bat-adlp-7/igt@xe_module_load@load.html [17]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/bat-adlp-7/igt@xe_module_load@load.html - bat-lnl-2: [PASS][18] -> [ABORT][19] ([Intel XE#8607]) [18]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/bat-lnl-2/igt@xe_module_load@load.html [19]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/bat-lnl-2/igt@xe_module_load@load.html [Intel XE#8607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8607 Build changes ------------- * IGT: IGT_9006 -> IGTPW_15530 * Linux: xe-5397-4df02bb6acd1307de4de001699112cbdaf5afdfc -> xe-5405-cf54bcae91390d166aed4b7e3222bee13912c306 IGTPW_15530: 6fb84fc62fa7937af5b83613654bdbada7d5501f @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git IGT_9006: 6380a8af26359dd222e22679442272ded836c463 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git xe-5397-4df02bb6acd1307de4de001699112cbdaf5afdfc: 4df02bb6acd1307de4de001699112cbdaf5afdfc xe-5405-cf54bcae91390d166aed4b7e3222bee13912c306: cf54bcae91390d166aed4b7e3222bee13912c306 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/index.html [-- Attachment #2: Type: text/html, Size: 5223 bytes --] ^ permalink raw reply [flat|nested] 7+ messages in thread
* ✓ i915.CI.BAT: success for Enable multi-format testing for chamelium color tests 2026-07-15 4:32 [PATCH i-g-t v2 0/2] Enable multi-format testing for chamelium color tests Pranay Samala ` (2 preceding siblings ...) 2026-07-15 5:58 ` ✓ Xe.CI.BAT: success for Enable multi-format testing for chamelium " Patchwork @ 2026-07-15 6:23 ` Patchwork 2026-07-15 6:41 ` ✓ i915.CI.Full: " Patchwork 2026-07-15 6:53 ` ✓ Xe.CI.FULL: " Patchwork 5 siblings, 0 replies; 7+ messages in thread From: Patchwork @ 2026-07-15 6:23 UTC (permalink / raw) To: Pranay Samala; +Cc: igt-dev [-- Attachment #1: Type: text/plain, Size: 12086 bytes --] == Series Details == Series: Enable multi-format testing for chamelium color tests URL : https://patchwork.freedesktop.org/series/170452/ State : success == Summary == CI Bug Log - changes from IGT_9006 -> IGTPW_15530 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/index.html Participating hosts (42 -> 40) ------------------------------ Missing (2): bat-dg2-13 fi-snb-2520m Known issues ------------ Here are the changes found in IGTPW_15530 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@i915_module_load@load: - fi-ilk-650: [PASS][1] -> [ABORT][2] ([i915#16623]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/fi-ilk-650/igt@i915_module_load@load.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/fi-ilk-650/igt@i915_module_load@load.html - fi-bsw-n3050: [PASS][3] -> [ABORT][4] ([i915#16623]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/fi-bsw-n3050/igt@i915_module_load@load.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/fi-bsw-n3050/igt@i915_module_load@load.html - bat-adlp-6: [PASS][5] -> [ABORT][6] ([i915#16623]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/bat-adlp-6/igt@i915_module_load@load.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/bat-adlp-6/igt@i915_module_load@load.html - bat-arlh-2: [PASS][7] -> [ABORT][8] ([i915#16623]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/bat-arlh-2/igt@i915_module_load@load.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/bat-arlh-2/igt@i915_module_load@load.html - fi-rkl-11600: [PASS][9] -> [ABORT][10] ([i915#16623]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/fi-rkl-11600/igt@i915_module_load@load.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/fi-rkl-11600/igt@i915_module_load@load.html - fi-skl-6600u: [PASS][11] -> [ABORT][12] ([i915#16623]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/fi-skl-6600u/igt@i915_module_load@load.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/fi-skl-6600u/igt@i915_module_load@load.html - bat-arlh-3: [PASS][13] -> [ABORT][14] ([i915#16623]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/bat-arlh-3/igt@i915_module_load@load.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/bat-arlh-3/igt@i915_module_load@load.html - fi-pnv-d510: [PASS][15] -> [ABORT][16] ([i915#16623]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/fi-pnv-d510/igt@i915_module_load@load.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/fi-pnv-d510/igt@i915_module_load@load.html - bat-dg1-7: [PASS][17] -> [ABORT][18] ([i915#16623]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/bat-dg1-7/igt@i915_module_load@load.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/bat-dg1-7/igt@i915_module_load@load.html - fi-glk-j4005: [PASS][19] -> [ABORT][20] ([i915#16623]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/fi-glk-j4005/igt@i915_module_load@load.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/fi-glk-j4005/igt@i915_module_load@load.html - bat-adlp-9: [PASS][21] -> [ABORT][22] ([i915#16623]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/bat-adlp-9/igt@i915_module_load@load.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/bat-adlp-9/igt@i915_module_load@load.html - bat-twl-2: [PASS][23] -> [ABORT][24] ([i915#16623]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/bat-twl-2/igt@i915_module_load@load.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/bat-twl-2/igt@i915_module_load@load.html - bat-rpls-4: [PASS][25] -> [ABORT][26] ([i915#16623]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/bat-rpls-4/igt@i915_module_load@load.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/bat-rpls-4/igt@i915_module_load@load.html - fi-kbl-7567u: [PASS][27] -> [ABORT][28] ([i915#16623]) [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/fi-kbl-7567u/igt@i915_module_load@load.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/fi-kbl-7567u/igt@i915_module_load@load.html - fi-cfl-8700k: [PASS][29] -> [ABORT][30] ([i915#16623]) [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/fi-cfl-8700k/igt@i915_module_load@load.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/fi-cfl-8700k/igt@i915_module_load@load.html - bat-twl-1: [PASS][31] -> [ABORT][32] ([i915#16623]) [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/bat-twl-1/igt@i915_module_load@load.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/bat-twl-1/igt@i915_module_load@load.html - fi-kbl-8809g: [PASS][33] -> [ABORT][34] ([i915#16623]) [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/fi-kbl-8809g/igt@i915_module_load@load.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/fi-kbl-8809g/igt@i915_module_load@load.html - bat-jsl-5: [PASS][35] -> [ABORT][36] ([i915#16623]) [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/bat-jsl-5/igt@i915_module_load@load.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/bat-jsl-5/igt@i915_module_load@load.html - bat-apl-1: [PASS][37] -> [ABORT][38] ([i915#16623]) [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/bat-apl-1/igt@i915_module_load@load.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/bat-apl-1/igt@i915_module_load@load.html - bat-dg2-14: [PASS][39] -> [ABORT][40] ([i915#16623]) [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/bat-dg2-14/igt@i915_module_load@load.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/bat-dg2-14/igt@i915_module_load@load.html - fi-elk-e7500: [PASS][41] -> [ABORT][42] ([i915#16623]) [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/fi-elk-e7500/igt@i915_module_load@load.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/fi-elk-e7500/igt@i915_module_load@load.html - fi-bsw-nick: [PASS][43] -> [ABORT][44] ([i915#16623]) [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/fi-bsw-nick/igt@i915_module_load@load.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/fi-bsw-nick/igt@i915_module_load@load.html - bat-kbl-2: [PASS][45] -> [ABORT][46] ([i915#16623]) [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/bat-kbl-2/igt@i915_module_load@load.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/bat-kbl-2/igt@i915_module_load@load.html - bat-arls-5: [PASS][47] -> [ABORT][48] ([i915#16623]) [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/bat-arls-5/igt@i915_module_load@load.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/bat-arls-5/igt@i915_module_load@load.html - bat-rplp-1: [PASS][49] -> [ABORT][50] ([i915#16623]) [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/bat-rplp-1/igt@i915_module_load@load.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/bat-rplp-1/igt@i915_module_load@load.html - fi-tgl-1115g4: [PASS][51] -> [ABORT][52] ([i915#16623]) [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/fi-tgl-1115g4/igt@i915_module_load@load.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/fi-tgl-1115g4/igt@i915_module_load@load.html - fi-cfl-guc: [PASS][53] -> [ABORT][54] ([i915#16623]) [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/fi-cfl-guc/igt@i915_module_load@load.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/fi-cfl-guc/igt@i915_module_load@load.html - bat-mtlp-9: [PASS][55] -> [ABORT][56] ([i915#16623]) [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/bat-mtlp-9/igt@i915_module_load@load.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/bat-mtlp-9/igt@i915_module_load@load.html - bat-arls-6: [PASS][57] -> [ABORT][58] ([i915#16623]) [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/bat-arls-6/igt@i915_module_load@load.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/bat-arls-6/igt@i915_module_load@load.html - bat-dg2-9: [PASS][59] -> [ABORT][60] ([i915#16623]) [59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/bat-dg2-9/igt@i915_module_load@load.html [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/bat-dg2-9/igt@i915_module_load@load.html - fi-kbl-x1275: [PASS][61] -> [ABORT][62] ([i915#16623]) [61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/fi-kbl-x1275/igt@i915_module_load@load.html [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/fi-kbl-x1275/igt@i915_module_load@load.html - bat-adlp-11: [PASS][63] -> [ABORT][64] ([i915#16623]) [63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/bat-adlp-11/igt@i915_module_load@load.html [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/bat-adlp-11/igt@i915_module_load@load.html - fi-hsw-4770: [PASS][65] -> [ABORT][66] ([i915#16623]) [65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/fi-hsw-4770/igt@i915_module_load@load.html [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/fi-hsw-4770/igt@i915_module_load@load.html - fi-cfl-8109u: [PASS][67] -> [ABORT][68] ([i915#16623]) [67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/fi-cfl-8109u/igt@i915_module_load@load.html [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/fi-cfl-8109u/igt@i915_module_load@load.html - fi-ivb-3770: [PASS][69] -> [ABORT][70] ([i915#16623]) [69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/fi-ivb-3770/igt@i915_module_load@load.html [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/fi-ivb-3770/igt@i915_module_load@load.html - bat-mtlp-8: [PASS][71] -> [ABORT][72] ([i915#16623]) [71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/bat-mtlp-8/igt@i915_module_load@load.html [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/bat-mtlp-8/igt@i915_module_load@load.html - bat-dg1-6: [PASS][73] -> [ABORT][74] ([i915#16623]) [73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/bat-dg1-6/igt@i915_module_load@load.html [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/bat-dg1-6/igt@i915_module_load@load.html - bat-dg2-8: [PASS][75] -> [ABORT][76] ([i915#16623]) [75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/bat-dg2-8/igt@i915_module_load@load.html [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/bat-dg2-8/igt@i915_module_load@load.html - bat-adls-6: [PASS][77] -> [ABORT][78] ([i915#16623]) [77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_9006/bat-adls-6/igt@i915_module_load@load.html [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/bat-adls-6/igt@i915_module_load@load.html [i915#16623]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16623 Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_9006 -> IGTPW_15530 * Linux: CI_DRM_18816 -> CI_DRM_18824 CI-20190529: 20190529 CI_DRM_18816: 4df02bb6acd1307de4de001699112cbdaf5afdfc @ git://anongit.freedesktop.org/gfx-ci/linux CI_DRM_18824: f4c3c25bd9477f347ff0dfe153b549c2f8c30da3 @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_15530: 6fb84fc62fa7937af5b83613654bdbada7d5501f @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git IGT_9006: 6380a8af26359dd222e22679442272ded836c463 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/index.html [-- Attachment #2: Type: text/html, Size: 15664 bytes --] ^ permalink raw reply [flat|nested] 7+ messages in thread
* ✓ i915.CI.Full: success for Enable multi-format testing for chamelium color tests 2026-07-15 4:32 [PATCH i-g-t v2 0/2] Enable multi-format testing for chamelium color tests Pranay Samala ` (3 preceding siblings ...) 2026-07-15 6:23 ` ✓ i915.CI.BAT: " Patchwork @ 2026-07-15 6:41 ` Patchwork 2026-07-15 6:53 ` ✓ Xe.CI.FULL: " Patchwork 5 siblings, 0 replies; 7+ messages in thread From: Patchwork @ 2026-07-15 6:41 UTC (permalink / raw) To: Pranay Samala; +Cc: igt-dev [-- Attachment #1: Type: text/plain, Size: 1230 bytes --] == Series Details == Series: Enable multi-format testing for chamelium color tests URL : https://patchwork.freedesktop.org/series/170452/ State : success == Summary == CI Bug Log - changes from CI_DRM_18824_full -> IGTPW_15530_full ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/index.html Participating hosts (10 -> 10) ------------------------------ No changes in participating hosts Changes ------- No changes found Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_9006 -> IGTPW_15530 * Piglit: piglit_4509 -> None CI-20190529: 20190529 CI_DRM_18824: f4c3c25bd9477f347ff0dfe153b549c2f8c30da3 @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_15530: 6fb84fc62fa7937af5b83613654bdbada7d5501f @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git IGT_9006: 6380a8af26359dd222e22679442272ded836c463 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_15530/index.html [-- Attachment #2: Type: text/html, Size: 1810 bytes --] ^ permalink raw reply [flat|nested] 7+ messages in thread
* ✓ Xe.CI.FULL: success for Enable multi-format testing for chamelium color tests 2026-07-15 4:32 [PATCH i-g-t v2 0/2] Enable multi-format testing for chamelium color tests Pranay Samala ` (4 preceding siblings ...) 2026-07-15 6:41 ` ✓ i915.CI.Full: " Patchwork @ 2026-07-15 6:53 ` Patchwork 5 siblings, 0 replies; 7+ messages in thread From: Patchwork @ 2026-07-15 6:53 UTC (permalink / raw) To: Pranay Samala; +Cc: igt-dev [-- Attachment #1: Type: text/plain, Size: 13753 bytes --] == Series Details == Series: Enable multi-format testing for chamelium color tests URL : https://patchwork.freedesktop.org/series/170452/ State : success == Summary == CI Bug Log - changes from XEIGT_9006_FULL -> XEIGTPW_15530_FULL ==================================================== Summary ------- **SUCCESS** No regressions found. Participating hosts (2 -> 2) ------------------------------ No changes in participating hosts Known issues ------------ Here are the changes found in XEIGTPW_15530_FULL that come from known issues: ### IGT changes ### #### Warnings #### * igt@xe_module_load@load: - shard-lnl: ([PASS][1], [PASS][2], [PASS][3], [PASS][4], [SKIP][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26]) ([Intel XE#378] / [Intel XE#7405]) -> ([DMESG-WARN][27], [DMESG-WARN][28], [DMESG-WARN][29], [DMESG-WARN][30], [DMESG-WARN][31], [DMESG-WARN][32], [DMESG-WARN][33], [DMESG-WARN][34], [DMESG-WARN][35], [DMESG-WARN][36], [DMESG-WARN][37], [DMESG-WARN][38], [DMESG-WARN][39], [DMESG-WARN][40], [DMESG-WARN][41], [DMESG-WARN][42], [DMESG-WARN][43], [DMESG-WARN][44], [DMESG-WARN][45], [DMESG-WARN][46], [DMESG-WARN][47], [DMESG-WARN][48], [DMESG-WARN][49], [DMESG-WARN][50], [DMESG-WARN][51]) ([Intel XE#8607]) [1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-lnl-2/igt@xe_module_load@load.html [2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-lnl-6/igt@xe_module_load@load.html [3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-lnl-5/igt@xe_module_load@load.html [4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-lnl-5/igt@xe_module_load@load.html [5]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-lnl-5/igt@xe_module_load@load.html [6]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-lnl-6/igt@xe_module_load@load.html [7]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-lnl-6/igt@xe_module_load@load.html [8]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-lnl-5/igt@xe_module_load@load.html [9]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-lnl-3/igt@xe_module_load@load.html [10]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-lnl-3/igt@xe_module_load@load.html [11]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-lnl-3/igt@xe_module_load@load.html [12]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-lnl-2/igt@xe_module_load@load.html [13]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-lnl-2/igt@xe_module_load@load.html [14]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-lnl-4/igt@xe_module_load@load.html [15]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-lnl-7/igt@xe_module_load@load.html [16]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-lnl-7/igt@xe_module_load@load.html [17]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-lnl-7/igt@xe_module_load@load.html [18]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-lnl-8/igt@xe_module_load@load.html [19]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-lnl-8/igt@xe_module_load@load.html [20]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-lnl-8/igt@xe_module_load@load.html [21]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-lnl-4/igt@xe_module_load@load.html [22]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-lnl-4/igt@xe_module_load@load.html [23]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-lnl-1/igt@xe_module_load@load.html [24]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-lnl-1/igt@xe_module_load@load.html [25]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-lnl-1/igt@xe_module_load@load.html [26]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-lnl-4/igt@xe_module_load@load.html [27]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/shard-lnl-1/igt@xe_module_load@load.html [28]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/shard-lnl-1/igt@xe_module_load@load.html [29]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/shard-lnl-1/igt@xe_module_load@load.html [30]: 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https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/shard-lnl-6/igt@xe_module_load@load.html [40]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/shard-lnl-3/igt@xe_module_load@load.html [41]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/shard-lnl-3/igt@xe_module_load@load.html [42]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/shard-lnl-3/igt@xe_module_load@load.html [43]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/shard-lnl-2/igt@xe_module_load@load.html [44]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/shard-lnl-2/igt@xe_module_load@load.html [45]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/shard-lnl-2/igt@xe_module_load@load.html [46]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/shard-lnl-7/igt@xe_module_load@load.html [47]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/shard-lnl-7/igt@xe_module_load@load.html [48]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/shard-lnl-7/igt@xe_module_load@load.html [49]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/shard-lnl-5/igt@xe_module_load@load.html [50]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/shard-lnl-5/igt@xe_module_load@load.html [51]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/shard-lnl-5/igt@xe_module_load@load.html - shard-bmg: ([PASS][52], [PASS][53], [PASS][54], [PASS][55], [PASS][56], [PASS][57], [PASS][58], [PASS][59], [PASS][60], [PASS][61], [PASS][62], [PASS][63], [SKIP][64], [PASS][65], [PASS][66], [PASS][67], [PASS][68], [PASS][69], [PASS][70], [PASS][71], [PASS][72], [PASS][73], [PASS][74], [PASS][75], [PASS][76], [PASS][77]) ([Intel XE#2457] / [Intel XE#7405]) -> ([DMESG-WARN][78], [DMESG-WARN][79], [DMESG-WARN][80], [DMESG-WARN][81], [DMESG-WARN][82], [DMESG-WARN][83], [DMESG-WARN][84], [DMESG-WARN][85], [DMESG-WARN][86], [DMESG-WARN][87], [DMESG-WARN][88], [DMESG-WARN][89], [DMESG-WARN][90], [DMESG-WARN][91], [DMESG-WARN][92], [DMESG-WARN][93], [DMESG-WARN][94], [DMESG-WARN][95], [DMESG-WARN][96], [DMESG-WARN][97], [DMESG-WARN][98], [DMESG-WARN][99], [DMESG-WARN][100], [DMESG-WARN][101], [DMESG-WARN][102]) ([Intel XE#8607]) [52]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-bmg-4/igt@xe_module_load@load.html [53]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-bmg-4/igt@xe_module_load@load.html [54]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-bmg-4/igt@xe_module_load@load.html [55]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-bmg-2/igt@xe_module_load@load.html [56]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-bmg-2/igt@xe_module_load@load.html [57]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-bmg-2/igt@xe_module_load@load.html [58]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-bmg-5/igt@xe_module_load@load.html [59]: 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https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-bmg-5/igt@xe_module_load@load.html [70]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-bmg-10/igt@xe_module_load@load.html [71]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-bmg-7/igt@xe_module_load@load.html [72]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-bmg-7/igt@xe_module_load@load.html [73]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-bmg-7/igt@xe_module_load@load.html [74]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-bmg-6/igt@xe_module_load@load.html [75]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-bmg-1/igt@xe_module_load@load.html [76]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-bmg-1/igt@xe_module_load@load.html [77]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_9006/shard-bmg-10/igt@xe_module_load@load.html [78]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/shard-bmg-4/igt@xe_module_load@load.html [79]: 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https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/shard-bmg-3/igt@xe_module_load@load.html [98]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/shard-bmg-3/igt@xe_module_load@load.html [99]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/shard-bmg-3/igt@xe_module_load@load.html [100]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/shard-bmg-5/igt@xe_module_load@load.html [101]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/shard-bmg-5/igt@xe_module_load@load.html [102]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/shard-bmg-5/igt@xe_module_load@load.html [Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457 [Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378 [Intel XE#7405]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7405 [Intel XE#8607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8607 Build changes ------------- * IGT: IGT_9006 -> IGTPW_15530 * Linux: xe-5397-4df02bb6acd1307de4de001699112cbdaf5afdfc -> xe-5405-cf54bcae91390d166aed4b7e3222bee13912c306 IGTPW_15530: 6fb84fc62fa7937af5b83613654bdbada7d5501f @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git IGT_9006: 6380a8af26359dd222e22679442272ded836c463 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git xe-5397-4df02bb6acd1307de4de001699112cbdaf5afdfc: 4df02bb6acd1307de4de001699112cbdaf5afdfc xe-5405-cf54bcae91390d166aed4b7e3222bee13912c306: cf54bcae91390d166aed4b7e3222bee13912c306 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_15530/index.html [-- Attachment #2: Type: text/html, Size: 14414 bytes --] ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2026-07-15 6:53 UTC | newest] Thread overview: 7+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-07-15 4:32 [PATCH i-g-t v2 0/2] Enable multi-format testing for chamelium color tests Pranay Samala 2026-07-15 4:32 ` [PATCH i-g-t v2 1/2] tests/chamelium/kms_chamelium_color: Prepare FB creation for explicit YUV color range handling Pranay Samala 2026-07-15 4:32 ` [PATCH i-g-t v2 2/2] tests/chamelium/kms_chamelium_color: Add multi-format coverage for pipe color tests Pranay Samala 2026-07-15 5:58 ` ✓ Xe.CI.BAT: success for Enable multi-format testing for chamelium " Patchwork 2026-07-15 6:23 ` ✓ i915.CI.BAT: " Patchwork 2026-07-15 6:41 ` ✓ i915.CI.Full: " Patchwork 2026-07-15 6:53 ` ✓ Xe.CI.FULL: " Patchwork
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