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From: Jeevan B <jeevan.b@intel.com>
To: igt-dev@lists.freedesktop.org
Cc: dibin.moolakadan.subrahmanian@intel.com,
	ramanaidu.naladala@intel.com, Jeevan B <jeevan.b@intel.com>
Subject: [PATCH i-g-t 0/2] tests/intel/kms_pm_dc: Add test to validate YUV420 with DC3CO
Date: Fri, 17 Jul 2026 09:26:56 +0530	[thread overview]
Message-ID: <20260717035658.857405-1-jeevan.b@intel.com> (raw)

Fix PSR/PR entry timeout in dynamic subtests and
Add test to validate YUV420 with DC3CO

Signed-off-by: Jeevan B <jeevan.b@intel.com>

Jeevan B (2):
  tests/intel/kms_pm_dc: Fix PSR/PR entry timeout in dynamic subtests
  tests/intel/kms_pm_dc: Add test to validate YUV420 with DC3CO

 tests/intel/kms_pm_dc.c | 92 ++++++++++++++++++++++++-----------------
 1 file changed, 55 insertions(+), 37 deletions(-)

-- 
2.43.0


             reply	other threads:[~2026-07-17  3:57 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-17  3:56 Jeevan B [this message]
2026-07-17  3:56 ` [PATCH i-g-t 1/2] tests/intel/kms_pm_dc: Fix PSR/PR entry timeout in dynamic subtests Jeevan B
     [not found]   ` <CO1PR11MB4913D78D03AD2A61DB0505ECE4C62@CO1PR11MB4913.namprd11.prod.outlook.com>
2026-07-17  6:24     ` FW: " Thasleem, Mohammed
2026-07-17  3:56 ` [PATCH i-g-t 2/2] tests/intel/kms_pm_dc: Add test to validate YUV420 with DC3CO Jeevan B
2026-07-17  7:44 ` ✓ Xe.CI.BAT: success for tests/intel/kms_pm_dc: Add test to validate YUV420 with DC3CO (rev4) Patchwork
2026-07-17  8:01 ` ✓ i915.CI.BAT: " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2026-07-16 15:33 [PATCH i-g-t 0/2] tests/intel/kms_pm_dc: Add test to validate YUV420 with DC3CO Jeevan B

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