From: Jeevan B <jeevan.b@intel.com>
To: igt-dev@lists.freedesktop.org
Cc: dibin.moolakadan.subrahmanian@intel.com,
ramanaidu.naladala@intel.com, Jeevan B <jeevan.b@intel.com>
Subject: [PATCH i-g-t 0/2] tests/intel/kms_pm_dc: Add test to validate YUV420 with DC3CO
Date: Thu, 16 Jul 2026 21:03:03 +0530 [thread overview]
Message-ID: <20260716153305.817439-1-jeevan.b@intel.com> (raw)
Fix PSR/PR entry timeout in dynamic subtests and
Add test to validate YUV420 with DC3CO
Signed-off-by: Jeevan B <jeevan.b@intel.com>
Jeevan B (2):
tests/intel/kms_pm_dc: Fix PSR/PR entry timeout in dynamic subtests
tests/intel/kms_pm_dc: Add test to validate YUV420 with DC3CO
tests/intel/kms_pm_dc.c | 92 ++++++++++++++++++++++++-----------------
1 file changed, 55 insertions(+), 37 deletions(-)
--
2.43.0
next reply other threads:[~2026-07-16 15:33 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-16 15:33 Jeevan B [this message]
2026-07-16 15:33 ` [PATCH i-g-t 1/2] tests/intel/kms_pm_dc: Fix PSR/PR entry timeout in dynamic subtests Jeevan B
2026-07-16 15:33 ` [PATCH i-g-t 2/2] tests/intel/kms_pm_dc: Add test to validate YUV420 with DC3CO Jeevan B
-- strict thread matches above, loose matches on Subject: below --
2026-07-17 3:56 [PATCH i-g-t 0/2] " Jeevan B
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