* [PATCH i-g-t 1/2] tests/intel/kms_pm_dc: Fix PSR/PR entry timeout in dynamic subtests
2026-07-16 15:33 [PATCH i-g-t 0/2] tests/intel/kms_pm_dc: Add test to validate YUV420 with DC3CO Jeevan B
@ 2026-07-16 15:33 ` Jeevan B
2026-07-16 15:33 ` [PATCH i-g-t 2/2] tests/intel/kms_pm_dc: Add test to validate YUV420 with DC3CO Jeevan B
1 sibling, 0 replies; 3+ messages in thread
From: Jeevan B @ 2026-07-16 15:33 UTC (permalink / raw)
To: igt-dev; +Cc: dibin.moolakadan.subrahmanian, ramanaidu.naladala, Jeevan B
After cleanup_dc3co_fbs disables the primary plane, later dynamic
subtests can wait for PSR2/Panel Replay entry without any valid plane
content, causing entry checks to time out.
Add commit_initial_dc3co_frame and call it before setup_dc3co in
all DC3CO test paths to ensure a valid framebuffer is present when
PSR2/Panel Replay entry is verified.
Signed-off-by: Jeevan B <jeevan.b@intel.com>
---
tests/intel/kms_pm_dc.c | 22 ++++++++++++++++++----
1 file changed, 18 insertions(+), 4 deletions(-)
diff --git a/tests/intel/kms_pm_dc.c b/tests/intel/kms_pm_dc.c
index ef53c5f96..018def5e4 100644
--- a/tests/intel/kms_pm_dc.c
+++ b/tests/intel/kms_pm_dc.c
@@ -315,6 +315,16 @@ static void setup_videoplayback(data_t *data)
create_color_fb(data, &data->fb_rgr, red_green_red);
}
+static void commit_initial_dc3co_frame(data_t *data)
+{
+ igt_plane_t *primary;
+
+ primary = igt_output_get_plane_type(data->output,
+ DRM_PLANE_TYPE_PRIMARY);
+ igt_plane_set_fb(primary, &data->fb_rgb);
+ igt_display_commit(&data->display);
+}
+
static void check_dc3co_with_videoplayback_like_load(data_t *data)
{
igt_plane_t *primary;
@@ -356,8 +366,9 @@ static void test_dc3co_vpb_simulation(data_t *data)
{
igt_require_dc_counter(data->debugfs_fd, IGT_INTEL_CHECK_DC3CO);
setup_output(data);
- setup_dc3co(data);
setup_videoplayback(data);
+ commit_initial_dc3co_frame(data);
+ setup_dc3co(data);
check_dc3co_with_videoplayback_like_load(data);
cleanup_dc3co_fbs(data);
}
@@ -436,8 +447,9 @@ static void test_dc3co_framedrop(data_t *data)
{
igt_require_dc_counter(data->debugfs_fd, IGT_INTEL_CHECK_DC3CO);
setup_output(data);
- setup_dc3co(data);
setup_videoplayback(data);
+ commit_initial_dc3co_frame(data);
+ setup_dc3co(data);
detect_dc3co_framedrop(data);
cleanup_dc3co_fbs(data);
}
@@ -493,8 +505,9 @@ static void test_dc3co_vpb_framegap(data_t *data)
{
igt_require_dc_counter(data->debugfs_fd, IGT_INTEL_CHECK_DC3CO);
setup_output(data);
- setup_dc3co(data);
setup_videoplayback(data);
+ commit_initial_dc3co_frame(data);
+ setup_dc3co(data);
check_dc3co_with_framegap_load(data);
cleanup_dc3co_fbs(data);
}
@@ -706,9 +719,10 @@ static void test_dc3co_after_dc6(data_t *data)
igt_require_dc_counter(data->debugfs_fd, IGT_INTEL_CHECK_DC6);
setup_output(data);
+ setup_videoplayback(data);
+ commit_initial_dc3co_frame(data);
setup_dc3co(data);
test_dc_state_dpms(data, IGT_INTEL_CHECK_DC6);
- setup_videoplayback(data);
check_dc3co_with_videoplayback_like_load(data);
cleanup_dc3co_fbs(data);
}
--
2.43.0
^ permalink raw reply related [flat|nested] 3+ messages in thread* [PATCH i-g-t 2/2] tests/intel/kms_pm_dc: Add test to validate YUV420 with DC3CO
2026-07-16 15:33 [PATCH i-g-t 0/2] tests/intel/kms_pm_dc: Add test to validate YUV420 with DC3CO Jeevan B
2026-07-16 15:33 ` [PATCH i-g-t 1/2] tests/intel/kms_pm_dc: Fix PSR/PR entry timeout in dynamic subtests Jeevan B
@ 2026-07-16 15:33 ` Jeevan B
1 sibling, 0 replies; 3+ messages in thread
From: Jeevan B @ 2026-07-16 15:33 UTC (permalink / raw)
To: igt-dev; +Cc: dibin.moolakadan.subrahmanian, ramanaidu.naladala, Jeevan B
Add a new validation test to ensure YUV420 works correctly when
DC3CO is enabled.
v2: Add YUV420 support for all DC3CO tests.
Signed-off-by: Jeevan B <jeevan.b@intel.com>
---
tests/intel/kms_pm_dc.c | 70 ++++++++++++++++++++++-------------------
1 file changed, 37 insertions(+), 33 deletions(-)
diff --git a/tests/intel/kms_pm_dc.c b/tests/intel/kms_pm_dc.c
index 018def5e4..2730fa81b 100644
--- a/tests/intel/kms_pm_dc.c
+++ b/tests/intel/kms_pm_dc.c
@@ -125,16 +125,24 @@ typedef struct {
igt_display_t display;
struct igt_fb fb_white, fb_rgb, fb_rgr;
enum psr_mode op_psr_mode;
+ uint32_t dc3co_fb_format;
drmModeModeInfo *mode;
igt_output_t *output;
bool runtime_suspend_disabled;
} data_t;
-struct dc3co_test_mode {
+struct dc3co_test_case {
enum psr_mode mode;
+ uint32_t fb_format;
const char *name;
};
+static const struct dc3co_test_case dc3co_cases[] = {
+ { PSR_MODE_2, DRM_FORMAT_XRGB8888, "psr2-xrgb8888" },
+ { PR_MODE, DRM_FORMAT_XRGB8888, "pr-xrgb8888" },
+ { PSR_MODE_2, DRM_FORMAT_NV12, "psr2-yuv420" },
+}
+
static void assert_dc_counter(data_t *data, int dc_flag, uint32_t prev_dc_count);
static void set_output_on_pipe_b(data_t *data)
@@ -275,7 +283,7 @@ static void create_color_fb(data_t *data, igt_fb_t *fb, color_t *fb_color)
fb_id = igt_create_fb(data->drm_fd,
data->mode->hdisplay,
data->mode->vdisplay,
- DRM_FORMAT_XRGB8888,
+ data->dc3co_fb_format,
DRM_FORMAT_MOD_LINEAR,
fb);
igt_assert(fb_id);
@@ -300,6 +308,15 @@ static void assert_dc_counter_negative(data_t *data, int dc_flag, uint32_t prev_
static void setup_videoplayback(data_t *data)
{
+ igt_plane_t *primary;
+
+ primary = igt_output_get_plane_type(data->output,
+ DRM_PLANE_TYPE_PRIMARY);
+ igt_require_f(igt_plane_has_format_mod(primary, data->dc3co_fb_format,
+ DRM_FORMAT_MOD_LINEAR),
+ "Primary plane does not support format %s\n",
+ igt_format_str(data->dc3co_fb_format));
+
color_t red_green_blue[] = {
{ 1.0, 0.0, 0.0 },
{ 0.0, 1.0, 0.0 },
@@ -893,14 +910,10 @@ int igt_main()
igt_describe("In this test we make sure that system enters DC3CO "
"when PSR2 or PR is active and system is in SLEEP state");
igt_subtest_with_dynamic("dc3co-vpb-simulation") {
- static const struct dc3co_test_mode dc3co_modes[] = {
- { PSR_MODE_2, "psr2" },
- { PR_MODE, "pr" },
- };
-
- for (int i = 0; i < ARRAY_SIZE(dc3co_modes); i++) {
- const char *name = dc3co_modes[i].name;
- data.op_psr_mode = dc3co_modes[i].mode;
+ for (int i = 0; i < ARRAY_SIZE(dc3co_cases); i++) {
+ const char *name = dc3co_cases[i].name;
+ data.op_psr_mode = dc3co_cases[i].mode;
+ data.dc3co_fb_format = dc3co_cases[i].fb_format;
igt_dynamic_f("%s", name) {
igt_require_f(intel_display_ver(data.devid) >= 35,
@@ -919,14 +932,10 @@ int igt_main()
igt_describe("Validate that no frame drops occur during DC3CO entry "
"while alternating framebuffers with PSR2 or Panel Replay active");
igt_subtest_with_dynamic("dc3co-framedrop-check") {
- static const struct dc3co_test_mode dc3co_modes[] = {
- { PSR_MODE_2, "psr2" },
- { PR_MODE, "pr" },
- };
-
- for (int i = 0; i < ARRAY_SIZE(dc3co_modes); i++) {
- const char *name = dc3co_modes[i].name;
- data.op_psr_mode = dc3co_modes[i].mode;
+ for (int i = 0; i < ARRAY_SIZE(dc3co_cases); i++) {
+ const char *name = dc3co_cases[i].name;
+ data.op_psr_mode = dc3co_cases[i].mode;
+ data.dc3co_fb_format = dc3co_cases[i].fb_format;
igt_dynamic_f("%s", name) {
igt_require_f(intel_display_ver(data.devid) >= 35,
@@ -945,17 +954,14 @@ int igt_main()
igt_describe("Verify DC3CO entry is still functional after a DC6 entry "
"and exit cycle");
igt_subtest_with_dynamic("dc3co-after-dc6") {
- static const struct dc3co_test_mode dc3co_modes[] = {
- { PSR_MODE_2, "psr2" },
- { PR_MODE, "pr" },
- };
igt_require_f(igt_pm_pc8_plus_residencies_enabled(data.msr_fd),
"PC8+ residencies not supported\n");
- for (int i = 0; i < ARRAY_SIZE(dc3co_modes); i++) {
- const char *name = dc3co_modes[i].name;
- data.op_psr_mode = dc3co_modes[i].mode;
+ for (int i = 0; i < ARRAY_SIZE(dc3co_cases); i++) {
+ const char *name = dc3co_cases[i].name;
+ data.op_psr_mode = dc3co_cases[i].mode;
+ data.dc3co_fb_format = dc3co_cases[i].fb_format;
igt_dynamic_f("%s", name) {
igt_require_f(intel_display_ver(data.devid) >= 35,
@@ -974,14 +980,10 @@ int igt_main()
igt_describe("Validate DC3CO counter increments before and after a delay "
"greater than 6 frame gaps during video-like load with PSR2/PR active");
igt_subtest_with_dynamic("dc3co-vpb-framegap") {
- static const struct dc3co_test_mode dc3co_modes[] = {
- { PSR_MODE_2, "psr2" },
- { PR_MODE, "pr" },
- };
-
- for (int i = 0; i < ARRAY_SIZE(dc3co_modes); i++) {
- const char *name = dc3co_modes[i].name;
- data.op_psr_mode = dc3co_modes[i].mode;
+ for (int i = 0; i < ARRAY_SIZE(dc3co_cases); i++) {
+ const char *name = dc3co_cases[i].name;
+ data.op_psr_mode = dc3co_cases[i].mode;
+ data.dc3co_fb_format = dc3co_cases[i].fb_format;
igt_dynamic_f("%s", name) {
igt_require_f(intel_display_ver(data.devid) >= 35,
@@ -1025,6 +1027,7 @@ int igt_main()
igt_require_f(igt_pm_pc8_plus_residencies_enabled(data.msr_fd),
"PC8+ residencies not supported\n");
igt_require(intel_display_ver(data.devid) >= 20);
+ data.dc3co_fb_format = DRM_FORMAT_XRGB8888;
test_deep_pkgc_state(&data);
}
@@ -1053,6 +1056,7 @@ int igt_main()
igt_require(psr_sink_support(data.drm_fd, data.debugfs_fd,
PSR_MODE_1, NULL));
data.op_psr_mode = PSR_MODE_1;
+ data.dc3co_fb_format = DRM_FORMAT_XRGB8888;
psr_enable(data.drm_fd, data.debugfs_fd, data.op_psr_mode, NULL);
igt_require(!psr_disabled_check(data.debugfs_fd));
test_dc5_pageflip_negative(&data, IGT_INTEL_CHECK_DC5);
--
2.43.0
^ permalink raw reply related [flat|nested] 3+ messages in thread