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* [PATCH i-g-t] tests/unigraf_lt: Optimize DP lane count validations
@ 2026-08-13 17:59 Mark Yacoub
  2026-08-13 21:09 ` ✓ i915.CI.BAT: success for " Patchwork
  2026-08-13 21:26 ` ✓ Xe.CI.BAT: " Patchwork
  0 siblings, 2 replies; 3+ messages in thread
From: Mark Yacoub @ 2026-08-13 17:59 UTC (permalink / raw)
  To: igt-dev; +Cc: Louis Chauvet, Mark Yacoub

Some drivers dynamically optimize power by downshifting lane utilization
if the current video mode (e.g., 1080p) has low bandwidth requirements,
regardless of the physical ceiling.

To avoid pointlessly testing artificially high lane mock ceilings
that would result in false-negative failures, we introduce a pre-check
in the lane count subtest. We safely pre-calculate the kernel's natural
max lane utilization for the current mode through an unconstrained HPD
sequence, allowing us to skip unachievable configurations.

Signed-off-by: Mark Yacoub <markyacoub@google.com>
---
 tests/unigraf/unigraf_lt.c | 37 ++++++++++++++++++++++++++++++++++---
 1 file changed, 34 insertions(+), 3 deletions(-)

diff --git a/tests/unigraf/unigraf_lt.c b/tests/unigraf/unigraf_lt.c
index 81e6ecd3f..7b9a2fc27 100644
--- a/tests/unigraf/unigraf_lt.c
+++ b/tests/unigraf/unigraf_lt.c
@@ -103,12 +103,43 @@ int igt_main()
 
 	igt_subtest_with_dynamic("unigraf-dp-lane-count") {
 		int lane_counts[3] = {1, 2, 4};
+		int max_natural_lanes = 0;
 		int current_lanes;
 
+		/*
+		 * Some drivers dynamically optimize power by downshifting lane
+		 * utilization if the current video mode (e.g., 1080p) has low
+		 * bandwidth requirements, regardless of the physical ceiling.
+		 *
+		 * To avoid pointlessly testing artificially high lane mock
+		 * ceilings (e.g. testing 4 lanes when we know the driver adamantly
+		 * refuses to use more than 1 or 2 for this mode), we first
+		 * perform an unconstrained HPD sequence. We initialize the output
+		 * and observe precisely how many lanes the kernel naturally demands.
+		 */
+		unigraf_reset();
+		unigraf_set_max_lane_count(4);
+		unigraf_hpd_pulse(500000);
+
+		igt_display_require_output(&display);
+		output = igt_output_from_connector(&display, connector);
+		igt_assert(output);
+		igt_dp_force_link_retrain(drm_fd, output, 2);
+		init_output_and_display_pattern(&display, output);
+
+		max_natural_lanes = igt_dp_get_current_lane_count(drm_fd, output);
+		igt_info("Pre-check: Kernel naturally trains a maximum of %d lanes for the current mode.\n",
+			 max_natural_lanes);
+
 		for (i = 0; i < ARRAY_SIZE(lane_counts); i++) {
-			igt_dynamic_f("unigraf-dp-lane-count-%d", lane_counts[i]) {
+			int lane_count = lane_counts[i];
+
+			if (lane_count > max_natural_lanes)
+				continue;
+
+			igt_dynamic_f("unigraf-dp-lane-count-%d", lane_count) {
 				unigraf_reset();
-				unigraf_set_max_lane_count(lane_counts[i]);
+				unigraf_set_max_lane_count(lane_count);
 				unigraf_hpd_pulse(500000);
 
 				igt_display_require_output(&display);
@@ -118,7 +149,7 @@ int igt_main()
 				init_output_and_display_pattern(&display, output);
 
 				current_lanes = igt_dp_get_current_lane_count(drm_fd, output);
-				igt_assert_eq(current_lanes, lane_counts[i]);
+				igt_assert_eq(current_lanes, lane_count);
 			}
 		}
 	}
-- 
2.55.0.691.gc56d675ccc-goog


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2026-08-13 17:59 [PATCH i-g-t] tests/unigraf_lt: Optimize DP lane count validations Mark Yacoub
2026-08-13 21:09 ` ✓ i915.CI.BAT: success for " Patchwork
2026-08-13 21:26 ` ✓ Xe.CI.BAT: " Patchwork

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