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From: nishit.sharma@intel.com
To: igt-dev@lists.freedesktop.org, kamil.konieczny@intel.com
Subject: [PATCH v2 3/9] tests/intel/xe_exec_reset: add gt-stress-reset-memory-pressure subtest
Date: Tue, 18 Aug 2026 04:08:39 +0000	[thread overview]
Message-ID: <20260818040845.548727-4-nishit.sharma@intel.com> (raw)
In-Reply-To: <20260818040845.548727-1-nishit.sharma@intel.com>

From: Nishit Sharma <nishit.sharma@intel.com>

Add memory-pressure coverage for the GT reset stress harness. This extends
concurrent reset+submission testing to include BO memory pressure while
preserving default behavior for existing subtests.

Signed-off-by: Nishit Sharma <nishit.sharma@intel.com>
---
 tests/intel/xe_exec_reset.c | 48 +++++++++++++++++++++++++++++++++++++
 1 file changed, 48 insertions(+)

diff --git a/tests/intel/xe_exec_reset.c b/tests/intel/xe_exec_reset.c
index 407775cfc..825fc6aa1 100644
--- a/tests/intel/xe_exec_reset.c
+++ b/tests/intel/xe_exec_reset.c
@@ -29,6 +29,7 @@
 
 #define SYNC_OBJ_SIGNALED	(0x1 << 0)
 #define LEGACY_MODE_ADDR	0x1a0000
+#define PRESSURE_COUNT		32
 
 static void ignore_gt_reset_warnings_in_dmesg(void)
 {
@@ -133,6 +134,7 @@ static void test_spin(int fd, struct drm_xe_engine_class_instance *eci,
 #define MULTI_QUEUE			(0x1 << 14)
 #define SECONDARY_QUEUE			(0x1 << 15)
 #define RESET_SYNC_MODE			(0x1 << 16)
+#define MEM_PRESSURE_STRESS		(0x1 << 17)
 
 /**
  * SUBTEST: %s-cat-error
@@ -657,6 +659,30 @@ struct gt_thread_data {
 	bool do_reset;
 };
 
+static void pressure_bo_create(int fd, uint32_t vm, int gt,
+			       uint32_t *bos, int *count)
+{
+	int i;
+
+	*count = 0;
+	for (i = 0; i < PRESSURE_COUNT; i++) {
+		bos[i] = xe_bo_create(fd, vm, xe_bb_size(fd, SZ_2M),
+				      vram_if_possible(fd, gt),
+				      DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
+		if (!bos[i])
+			break;
+		(*count)++;
+	}
+}
+
+static void pressure_bo_destroy(int fd, uint32_t *bos, int count)
+{
+	int i;
+
+	for (i = 0; i < count; i++)
+		gem_close(fd, bos[i]);
+}
+
 static void do_resets(struct gt_thread_data *t)
 {
 	while (!*(t->exit)) {
@@ -676,7 +702,10 @@ static void submit_jobs(struct gt_thread_data *t)
 	uint64_t addr = 0x1a0000;
 	size_t bo_size = xe_bb_size(fd, SZ_4K);
 	uint32_t bo;
+	uint32_t pressure_bos[PRESSURE_COUNT];
 	uint32_t *data;
+	int pressure_count;
+	int i = 0;
 
 	bo = xe_bo_create(fd, vm, bo_size, vram_if_possible(fd, t->gt),
 			  DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
@@ -685,6 +714,9 @@ static void submit_jobs(struct gt_thread_data *t)
 
 	xe_vm_bind_sync(fd, vm, bo, 0, addr, bo_size);
 
+	if (t->flags & MEM_PRESSURE_STRESS)
+		pressure_bo_create(fd, vm, t->gt, pressure_bos, &pressure_count);
+
 	while (!*(t->exit)) {
 		struct drm_xe_engine_class_instance instance = {
 			.engine_class = DRM_XE_ENGINE_CLASS_COPY,
@@ -707,8 +739,19 @@ static void submit_jobs(struct gt_thread_data *t)
 		xe_exec(fd, &exec);
 		xe_exec_queue_destroy(fd, exec.exec_queue_id);
 		(*t->num_submit)++;
+
+		if ((t->flags & MEM_PRESSURE_STRESS) && !(i % 128)) {
+			pressure_bo_destroy(fd, pressure_bos, pressure_count);
+			pressure_count = 0;
+			pressure_bo_create(fd, vm, t->gt, pressure_bos, &pressure_count);
+		}
+
+		i++;
 	}
 
+	if (t->flags & MEM_PRESSURE_STRESS)
+		pressure_bo_destroy(fd, pressure_bos, PRESSURE_COUNT);
+
 	munmap(data, bo_size);
 	gem_close(fd, bo);
 	xe_vm_destroy(fd, vm);
@@ -744,6 +787,10 @@ static void *gt_reset_thread(void *data)
  * Description: Stress concurrent GT resets and job submissions with sync resets
  * Test category: stress test
  *
+ * SUBTEST: gt-stress-reset-memory-pressure
+ * Description: Stress concurrent GT resets and job submissions under memory pressure
+ * Test category: stress test
+ *
  */
 static void
 gt_reset(int fd, int gt, int n_threads, int n_sec, unsigned int flags)
@@ -962,6 +1009,7 @@ int igt_main()
 	const struct section ssections[] = {
 		{ "reset-concurrent-submit", 0 },
 		{ "reset-concurrent-submit-sync", RESET_SYNC_MODE },
+		{ "reset-memory-pressure", MEM_PRESSURE_STRESS },
 		{ NULL },
 	};
 	int gt;
-- 
2.43.0


  parent reply	other threads:[~2026-08-18  4:11 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-18  4:08 [PATCH v2 0/9] extend GT reset stress coverage nishit.sharma
2026-08-18  4:08 ` [PATCH v2 1/9] tests/intel/xe_exec_reset: Add concurrent GT reset submit stress test nishit.sharma
2026-08-18  4:08 ` [PATCH v2 2/9] tests/intel/xe_exec_reset: add sync concurrent reset submit subtest nishit.sharma
2026-08-18  4:08 ` nishit.sharma [this message]
2026-08-18  4:08 ` [PATCH v2 4/9] tests/intel/xe_exec_reset: add gt-stress-reset-bo-invalidation subtest nishit.sharma
2026-08-18  4:08 ` [PATCH v2 5/9] tests/intel/xe_exec_reset: add gt-stress-reset-rapid-cycle subtest nishit.sharma
2026-08-18  4:08 ` [PATCH v2 6/9] tests/intel/xe_exec_reset: add gt-stress-reset-destroy-vm-context subtest nishit.sharma
2026-08-18  4:08 ` [PATCH v2 7/9] tests/intel/xe_exec_reset: add gt-stress-reset-mixed-engine-usage subtest nishit.sharma
2026-08-18  4:08 ` [PATCH v2 8/9] tests/intel/xe_exec_reset: add gt-stress-reset-pm-transition subtest nishit.sharma
2026-08-18  4:08 ` [PATCH v2 9/9] tests/intel/xe_exec_reset: add gt-stress-reset-engine-hang subtest nishit.sharma
2026-08-18  4:50 ` ✓ Xe.CI.BAT: success for extend GT reset stress coverage (rev2) Patchwork
2026-08-18  5:04 ` ✓ i915.CI.BAT: " Patchwork
2026-08-18  5:56 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-08-18 16:04 ` ✗ i915.CI.Full: " Patchwork

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