[PATCH i-g-t 0/2] Early Transport Support

[PATCH i-g-t 0/2] Early Transport Support

[Jeevan B]

Add early trasport helper and checks to validate early trasport support
on the supported display.

Jeevan B (2):
  lib/igt_psr: Added library functions for early trasport
  tests/intel/kms_psr2_sf: Add checks for early transport

 lib/igt_psr.c             | 15 +++++++++++++++
 lib/igt_psr.h             |  3 +++
 tests/intel/kms_psr2_sf.c | 18 +++++++++++++++++-
 3 files changed, 35 insertions(+), 1 deletion(-)

-- 
2.25.1

[PATCH i-g-t 1/2] lib/igt_psr: Added library functions for early trasport

[Jeevan B]

Added helper functions to check sink support for early transport and
check early transport active check.

v2: Add early trasport for PR and PSR2.

Signed-off-by: Jeevan B <jeevan.b@intel.com>
---
 lib/igt_psr.c | 15 +++++++++++++++
 lib/igt_psr.h |  3 +++
 2 files changed, 18 insertions(+)

diff --git a/lib/igt_psr.c b/lib/igt_psr.c
index 6008b73a6..b1ca57201 100644
--- a/lib/igt_psr.c
+++ b/lib/igt_psr.c
@@ -53,6 +53,16 @@ bool selective_fetch_check(int debugfs_fd, igt_output_t *output)
 	return strstr(buf, "PSR2 selective fetch: enabled");
 }
 
+bool early_transport_check(int debugfs_fd)
+{
+	char buf[PSR_STATUS_MAX_LEN];
+
+	igt_debugfs_simple_read(debugfs_fd, "i915_edp_psr_status", buf,
+				sizeof(buf));
+
+	return strstr(buf, "(Early Transport)");
+}
+
 static bool psr_active_check(int debugfs_fd, enum psr_mode mode, igt_output_t *output)
 {
 	char debugfs_file[128] = {0};
@@ -247,10 +257,15 @@ bool psr_sink_support(int device, int debugfs_fd, enum psr_mode mode, igt_output
 		       strstr(buf, "Sink support: yes [0x04]") ||
 		       (strstr(line, "PSR = yes") &&
 		       (strstr(line, "[0x03]") || strstr(line, "[0x04]")));
+	case PSR_MODE_2_ET:
+		return strstr(buf, "Sink support: yes [0x04]") &&
+		       (strstr(line, "PSR2 (Early Trasport)") || strstr(line, "[0x04]"));
 	case PR_MODE:
 		return strstr(line, "Panel Replay = yes, Panel Replay Selective Update = no");
 	case PR_MODE_SEL_FETCH:
 		return strstr(line, "Panel Replay = yes, Panel Replay Selective Update = yes");
+	case PR_MODE_SEL_FETCH_ET:
+		return strstr(line, "Panel Replay Selective Update enabled (Early Trasport)");
 	default:
 		igt_assert_f(false, "Invalid psr mode\n");
 		return false;
diff --git a/lib/igt_psr.h b/lib/igt_psr.h
index e8595fd8c..a7ebd0739 100644
--- a/lib/igt_psr.h
+++ b/lib/igt_psr.h
@@ -35,8 +35,10 @@ enum psr_mode {
 	PSR_MODE_1,
 	PSR_MODE_2,
 	PSR_MODE_2_SEL_FETCH,
+	PSR_MODE_2_ET,
 	PR_MODE,
 	PR_MODE_SEL_FETCH,
+	PR_MODE_SEL_FETCH_ET,
 	PSR_DISABLED,
 };
 
@@ -47,6 +49,7 @@ enum fbc_mode {
 
 bool psr_disabled_check(int debugfs_fd);
 bool selective_fetch_check(int debugfs_fd, igt_output_t *output);
+bool early_transport_check(int debugfs_fd);
 bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
 bool psr_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
 bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
-- 
2.25.1

Re: [PATCH i-g-t 1/2] lib/igt_psr: Added library functions for early trasport

[Hogander, Jouni]

On Wed, 2024-06-12 at 16:36 +0530, Jeevan B wrote:
> Added helper functions to check sink support for early transport and
> check early transport active check.
> 
> v2: Add early trasport for PR and PSR2.
> 
> Signed-off-by: Jeevan B <jeevan.b@intel.com>
> ---
>  lib/igt_psr.c | 15 +++++++++++++++
>  lib/igt_psr.h |  3 +++
>  2 files changed, 18 insertions(+)
> 
> diff --git a/lib/igt_psr.c b/lib/igt_psr.c
> index 6008b73a6..b1ca57201 100644
> --- a/lib/igt_psr.c
> +++ b/lib/igt_psr.c
> @@ -53,6 +53,16 @@ bool selective_fetch_check(int debugfs_fd,
> igt_output_t *output)
>         return strstr(buf, "PSR2 selective fetch: enabled");
>  }
>  
> +bool early_transport_check(int debugfs_fd)
> +{
> +       char buf[PSR_STATUS_MAX_LEN];
> +
> +       igt_debugfs_simple_read(debugfs_fd, "i915_edp_psr_status",
> buf,
> +                               sizeof(buf));
> +
> +       return strstr(buf, "(Early Transport)");
> +}

If this is checking that Early Transport is enabled you should do:

return strstr(buf, "enabled (Early Transport)");

That works for:

PSR mode: PSR2 enabled (Early Transport)

and

PSR mode: Panel Replay Selective Update enabled (Early Transport)

> +
>  static bool psr_active_check(int debugfs_fd, enum psr_mode mode,
> igt_output_t *output)
>  {
>         char debugfs_file[128] = {0};
> @@ -247,10 +257,15 @@ bool psr_sink_support(int device, int
> debugfs_fd, enum psr_mode mode, igt_output
>                        strstr(buf, "Sink support: yes [0x04]") ||
>                        (strstr(line, "PSR = yes") &&
>                        (strstr(line, "[0x03]") || strstr(line,
> "[0x04]")));
> +       case PSR_MODE_2_ET:
> +               return strstr(buf, "Sink support: yes [0x04]") &&
> +                      (strstr(line, "PSR2 (Early Trasport)") ||

If this is checking if sink support PSR2 Early Transport:
strstr(buf, "Sink support: yes [0x04]") is enough

> strstr(line, "[0x04]"));
>         case PR_MODE:
>                 return strstr(line, "Panel Replay = yes, Panel Replay
> Selective Update = no");
>         case PR_MODE_SEL_FETCH:
>                 return strstr(line, "Panel Replay = yes, Panel Replay
> Selective Update = yes");
> +       case PR_MODE_SEL_FETCH_ET:
> +               return strstr(line, "Panel Replay Selective Update
> enabled (Early Trasport)");

If this is checking sink support. "Panel Replay Selective Update
enabled (Early Trasport)" means it's enabled.

Instead:

return strstr(line, "Panel Replay Selective Update = yes (Early
Transport)");

checks if supported by sink.

BR,

Jouni Högander

>         default:
>                 igt_assert_f(false, "Invalid psr mode\n");
>                 return false;
> diff --git a/lib/igt_psr.h b/lib/igt_psr.h
> index e8595fd8c..a7ebd0739 100644
> --- a/lib/igt_psr.h
> +++ b/lib/igt_psr.h
> @@ -35,8 +35,10 @@ enum psr_mode {
>         PSR_MODE_1,
>         PSR_MODE_2,
>         PSR_MODE_2_SEL_FETCH,
> +       PSR_MODE_2_ET,
>         PR_MODE,
>         PR_MODE_SEL_FETCH,
> +       PR_MODE_SEL_FETCH_ET,
>         PSR_DISABLED,
>  };
>  
> @@ -47,6 +49,7 @@ enum fbc_mode {
>  
>  bool psr_disabled_check(int debugfs_fd);
>  bool selective_fetch_check(int debugfs_fd, igt_output_t *output);
> +bool early_transport_check(int debugfs_fd);
>  bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, igt_output_t
> *output);
>  bool psr_wait_update(int debugfs_fd, enum psr_mode mode,
> igt_output_t *output);
>  bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode,
> igt_output_t *output);

[PATCH i-g-t 2/2] tests/intel/kms_psr2_sf: Add checks for early transport

[Jeevan B]

Add checks weather early transport if supported then
we check if early trasport is working.

Signed-off-by: Jeevan B <jeevan.b@intel.com>
---
 tests/intel/kms_psr2_sf.c | 18 +++++++++++++++++-
 1 file changed, 17 insertions(+), 1 deletion(-)

diff --git a/tests/intel/kms_psr2_sf.c b/tests/intel/kms_psr2_sf.c
index 4c3e34aa0..e612b8266 100644
--- a/tests/intel/kms_psr2_sf.c
+++ b/tests/intel/kms_psr2_sf.c
@@ -168,6 +168,7 @@ typedef struct {
 	igt_plane_t *test_plane;
 	bool big_fb_test;
 	bool fbc_flag;
+	bool et_flag;
 	cairo_t *cr;
 	uint32_t screen_changes;
 	int cur_x, cur_y;
@@ -184,11 +185,23 @@ static bool set_sel_fetch_mode_for_output(data_t *data)
 {
 	bool supported = false;
 
+	data->et_flag = false;
+
 	if (psr_sink_support(data->drm_fd, data->debugfs_fd,
-						 PR_MODE_SEL_FETCH, data->output)) {
+						 PR_MODE_SEL_FETCH_ET, data->output)) {
+		supported = true;
+		data->psr_mode = PR_MODE_SEL_FETCH;
+		data->et_flag = true;
+	} else if (psr_sink_support(data->drm_fd, data->debugfs_fd,
+							PR_MODE_SEL_FETCH, data->output)) {
 		supported = true;
 		data->psr_mode = PR_MODE_SEL_FETCH;
 	} else if (psr_sink_support(data->drm_fd, data->debugfs_fd,
+							PSR_MODE_2_ET, data->output)) {
+		supported = true;
+		data->psr_mode = PSR_MODE_2;
+		data->et_flag = true;
+	} else	if (psr_sink_support(data->drm_fd, data->debugfs_fd,
 							  PSR_MODE_2, data->output)) {
 		supported = true;
 		data->psr_mode = PSR_MODE_2;
@@ -916,6 +929,9 @@ static void run(data_t *data)
 		igt_assert_f(intel_fbc_wait_until_enabled(data->drm_fd,
 							  data->pipe),
 							  "FBC still disabled\n");
+	if (data->et_flag)
+		igt_assert_f(early_transport_check(data->debugfs_fd),
+			     "Early Trasport Disbaled\n");
 
 	data->screen_changes = 0;
 
-- 
2.25.1

Re: [PATCH i-g-t 2/2] tests/intel/kms_psr2_sf: Add checks for early transport

[Hogander, Jouni]

On Wed, 2024-06-12 at 16:36 +0530, Jeevan B wrote:
> Add checks weather early transport if supported then
> we check if early trasport is working.

Generally this patch looks ok to me. I'm not sure if better approach
would be to modify psr_enable to accept PR_MODE_SEL_FETCH_ET and
PSR_MODE_2_ET. When PR_MODE_SEL_FETCH or PSR_MODE_2 is given then it
would set the Early Transport disable bit (0x20). This is how I was
doing it for Panel Replay/PSR here:

https://patchwork.freedesktop.org/patch/598537/?series=133866&rev=2

What do you think?

BR,

Jouni Högander

> 
> Signed-off-by: Jeevan B <jeevan.b@intel.com>
> ---
>  tests/intel/kms_psr2_sf.c | 18 +++++++++++++++++-
>  1 file changed, 17 insertions(+), 1 deletion(-)
> 
> diff --git a/tests/intel/kms_psr2_sf.c b/tests/intel/kms_psr2_sf.c
> index 4c3e34aa0..e612b8266 100644
> --- a/tests/intel/kms_psr2_sf.c
> +++ b/tests/intel/kms_psr2_sf.c
> @@ -168,6 +168,7 @@ typedef struct {
>         igt_plane_t *test_plane;
>         bool big_fb_test;
>         bool fbc_flag;
> +       bool et_flag;
>         cairo_t *cr;
>         uint32_t screen_changes;
>         int cur_x, cur_y;
> @@ -184,11 +185,23 @@ static bool
> set_sel_fetch_mode_for_output(data_t *data)
>  {
>         bool supported = false;
>  
> +       data->et_flag = false;
> +
>         if (psr_sink_support(data->drm_fd, data->debugfs_fd,
> -                                                PR_MODE_SEL_FETCH,
> data->output)) {
> +                                               
> PR_MODE_SEL_FETCH_ET, data->output)) {
> +               supported = true;
> +               data->psr_mode = PR_MODE_SEL_FETCH;
> +               data->et_flag = true;
> +       } else if (psr_sink_support(data->drm_fd, data->debugfs_fd,
> +                                                       PR_MODE_SEL_F
> ETCH, data->output)) {
>                 supported = true;
>                 data->psr_mode = PR_MODE_SEL_FETCH;
>         } else if (psr_sink_support(data->drm_fd, data->debugfs_fd,
> +                                                       PSR_MODE_2_ET
> , data->output)) {
> +               supported = true;
> +               data->psr_mode = PSR_MODE_2;
> +               data->et_flag = true;
> +       } else  if (psr_sink_support(data->drm_fd, data->debugfs_fd,
>                                                           PSR_MODE_2,
> data->output)) {
>                 supported = true;
>                 data->psr_mode = PSR_MODE_2;
> @@ -916,6 +929,9 @@ static void run(data_t *data)
>                 igt_assert_f(intel_fbc_wait_until_enabled(data-
> >drm_fd,
>                                                           data-
> >pipe),
>                                                           "FBC still
> disabled\n");
> +       if (data->et_flag)
> +               igt_assert_f(early_transport_check(data->debugfs_fd),
> +                            "Early Trasport Disbaled\n");
>  
>         data->screen_changes = 0;
>  

RE: [PATCH i-g-t 2/2] tests/intel/kms_psr2_sf: Add checks for early transport

[B, Jeevan]

> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Thursday, June 13, 2024 4:12 PM
> To: igt-dev@lists.freedesktop.org; B, Jeevan <jeevan.b@intel.com>
> Subject: Re: [PATCH i-g-t 2/2] tests/intel/kms_psr2_sf: Add checks for early
> transport
> 
> On Wed, 2024-06-12 at 16:36 +0530, Jeevan B wrote:
> > Add checks weather early transport if supported then we check if early
> > trasport is working.
> 
> Generally this patch looks ok to me. I'm not sure if better approach would be to
> modify psr_enable to accept PR_MODE_SEL_FETCH_ET and PSR_MODE_2_ET.
> When PR_MODE_SEL_FETCH or PSR_MODE_2 is given then it would set the Early
> Transport disable bit (0x20). This is how I was doing it for Panel Replay/PSR here:
> 
> https://patchwork.freedesktop.org/patch/598537/?series=133866&rev=2
> 
> What do you think?
Hmm AFAIK ET is enabled by default if available. So I don’t we should alter it.

BR, Jeevan B 
> 
> BR,
> 
> Jouni Högander
> 
> >
> > Signed-off-by: Jeevan B <jeevan.b@intel.com>
> > ---
> >  tests/intel/kms_psr2_sf.c | 18 +++++++++++++++++-
> >  1 file changed, 17 insertions(+), 1 deletion(-)
> >
> > diff --git a/tests/intel/kms_psr2_sf.c b/tests/intel/kms_psr2_sf.c
> > index 4c3e34aa0..e612b8266 100644
> > --- a/tests/intel/kms_psr2_sf.c
> > +++ b/tests/intel/kms_psr2_sf.c
> > @@ -168,6 +168,7 @@ typedef struct {
> >         igt_plane_t *test_plane;
> >         bool big_fb_test;
> >         bool fbc_flag;
> > +       bool et_flag;
> >         cairo_t *cr;
> >         uint32_t screen_changes;
> >         int cur_x, cur_y;
> > @@ -184,11 +185,23 @@ static bool
> > set_sel_fetch_mode_for_output(data_t *data)
> >  {
> >         bool supported = false;
> >
> > +       data->et_flag = false;
> > +
> >         if (psr_sink_support(data->drm_fd, data->debugfs_fd,
> > -                                                PR_MODE_SEL_FETCH,
> > data->output)) {
> > +
> > PR_MODE_SEL_FETCH_ET, data->output)) {
> > +               supported = true;
> > +               data->psr_mode = PR_MODE_SEL_FETCH;
> > +               data->et_flag = true;
> > +       } else if (psr_sink_support(data->drm_fd, data->debugfs_fd,
> > +                                                       PR_MODE_SEL_F
> > ETCH, data->output)) {
> >                 supported = true;
> >                 data->psr_mode = PR_MODE_SEL_FETCH;
> >         } else if (psr_sink_support(data->drm_fd, data->debugfs_fd,
> > +                                                       PSR_MODE_2_ET
> > , data->output)) {
> > +               supported = true;
> > +               data->psr_mode = PSR_MODE_2;
> > +               data->et_flag = true;
> > +       } else  if (psr_sink_support(data->drm_fd, data->debugfs_fd,
> >                                                           PSR_MODE_2,
> > data->output)) {
> >                 supported = true;
> >                 data->psr_mode = PSR_MODE_2; @@ -916,6 +929,9 @@
> > static void run(data_t *data)
> >                 igt_assert_f(intel_fbc_wait_until_enabled(data-
> > >drm_fd,
> >                                                           data-
> > >pipe),
> >                                                           "FBC still
> > disabled\n");
> > +       if (data->et_flag)
> > +               igt_assert_f(early_transport_check(data->debugfs_fd),
> > +                            "Early Trasport Disbaled\n");
> >
> >         data->screen_changes = 0;
> >

✓ CI.xeBAT: success for Early Transport Support (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 1540 bytes --]

== Series Details ==

Series: Early Transport Support (rev2)
URL   : https://patchwork.freedesktop.org/series/133804/
State : success

== Summary ==

CI Bug Log - changes from XEIGT_7883_BAT -> XEIGTPW_11253_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (5 -> 4)
------------------------------

  Missing    (1): bat-adlp-7 

Known issues
------------

  Here are the changes found in XEIGTPW_11253_BAT that come from known issues:

### IGT changes ###

#### Possible fixes ####

  * igt@kms_flip@basic-flip-vs-wf_vblank:
    - {bat-lnl-1}:        [FAIL][1] ([Intel XE#886]) -> [PASS][2] +1 other test pass
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7883/bat-lnl-1/igt@kms_flip@basic-flip-vs-wf_vblank.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/bat-lnl-1/igt@kms_flip@basic-flip-vs-wf_vblank.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/886


Build changes
-------------

  * IGT: IGT_7883 -> IGTPW_11253

  IGTPW_11253: 11253
  IGT_7883: ac1fbf274cec6210363758b76455a59dc5d89751 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-1448-09046e0a510c58c3af08532a4af43668911b3826: 09046e0a510c58c3af08532a4af43668911b3826

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/index.html

[-- Attachment #2: Type: text/html, Size: 2113 bytes --]

✓ Fi.CI.BAT: success for Early Transport Support (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 12521 bytes --]

== Series Details ==

Series: Early Transport Support (rev2)
URL   : https://patchwork.freedesktop.org/series/133804/
State : success

== Summary ==

CI Bug Log - changes from IGT_7883 -> IGTPW_11253
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/index.html

Participating hosts (41 -> 41)
------------------------------

  Additional (4): bat-dg2-11 bat-jsl-1 bat-adlp-9 fi-kbl-8809g 
  Missing    (4): bat-dg2-14 bat-arlh-2 fi-snb-2520m fi-elk-e7500 

Known issues
------------

  Here are the changes found in IGTPW_11253 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@debugfs_test@basic-hwmon:
    - bat-adlp-9:         NOTRUN -> [SKIP][1] ([i915#9318])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-adlp-9/igt@debugfs_test@basic-hwmon.html
    - bat-jsl-1:          NOTRUN -> [SKIP][2] ([i915#9318])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-jsl-1/igt@debugfs_test@basic-hwmon.html

  * igt@gem_huc_copy@huc-copy:
    - fi-kbl-8809g:       NOTRUN -> [SKIP][3] ([i915#2190])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/fi-kbl-8809g/igt@gem_huc_copy@huc-copy.html
    - bat-jsl-1:          NOTRUN -> [SKIP][4] ([i915#2190])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-jsl-1/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_swapping@basic:
    - bat-adlp-9:         NOTRUN -> [SKIP][5] ([i915#4613]) +3 other tests skip
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-adlp-9/igt@gem_lmem_swapping@basic.html
    - fi-kbl-8809g:       NOTRUN -> [SKIP][6] ([i915#4613]) +3 other tests skip
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/fi-kbl-8809g/igt@gem_lmem_swapping@basic.html

  * igt@gem_lmem_swapping@verify-random:
    - bat-jsl-1:          NOTRUN -> [SKIP][7] ([i915#4613]) +3 other tests skip
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-jsl-1/igt@gem_lmem_swapping@verify-random.html

  * igt@gem_mmap@basic:
    - bat-dg2-11:         NOTRUN -> [SKIP][8] ([i915#4083])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-dg2-11/igt@gem_mmap@basic.html

  * igt@gem_tiled_fence_blits@basic:
    - bat-dg2-11:         NOTRUN -> [SKIP][9] ([i915#4077]) +2 other tests skip
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-dg2-11/igt@gem_tiled_fence_blits@basic.html

  * igt@gem_tiled_pread_basic:
    - bat-adlp-9:         NOTRUN -> [SKIP][10] ([i915#3282])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-adlp-9/igt@gem_tiled_pread_basic.html
    - bat-dg2-11:         NOTRUN -> [SKIP][11] ([i915#4079]) +1 other test skip
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-dg2-11/igt@gem_tiled_pread_basic.html

  * igt@i915_pm_rps@basic-api:
    - bat-adlp-9:         NOTRUN -> [SKIP][12] ([i915#6621])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-adlp-9/igt@i915_pm_rps@basic-api.html
    - bat-dg2-11:         NOTRUN -> [SKIP][13] ([i915#6621])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-dg2-11/igt@i915_pm_rps@basic-api.html

  * igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy:
    - bat-dg2-11:         NOTRUN -> [SKIP][14] ([i915#4212]) +7 other tests skip
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-dg2-11/igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - bat-dg2-11:         NOTRUN -> [SKIP][15] ([i915#5190])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-dg2-11/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_addfb_basic@basic-y-tiled-legacy:
    - bat-dg2-11:         NOTRUN -> [SKIP][16] ([i915#4215] / [i915#5190])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-dg2-11/igt@kms_addfb_basic@basic-y-tiled-legacy.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - bat-adlp-9:         NOTRUN -> [SKIP][17] ([i915#4103]) +1 other test skip
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-adlp-9/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
    - bat-dg2-11:         NOTRUN -> [SKIP][18] ([i915#4103] / [i915#4213]) +1 other test skip
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-dg2-11/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
    - bat-jsl-1:          NOTRUN -> [SKIP][19] ([i915#4103]) +1 other test skip
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-jsl-1/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_dsc@dsc-basic:
    - bat-dg2-11:         NOTRUN -> [SKIP][20] ([i915#3555] / [i915#3840])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-dg2-11/igt@kms_dsc@dsc-basic.html
    - bat-jsl-1:          NOTRUN -> [SKIP][21] ([i915#3555] / [i915#9886])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-jsl-1/igt@kms_dsc@dsc-basic.html
    - bat-adlp-9:         NOTRUN -> [SKIP][22] ([i915#3555] / [i915#3840])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-adlp-9/igt@kms_dsc@dsc-basic.html

  * igt@kms_force_connector_basic@force-load-detect:
    - fi-kbl-8809g:       NOTRUN -> [SKIP][23] +30 other tests skip
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/fi-kbl-8809g/igt@kms_force_connector_basic@force-load-detect.html
    - bat-jsl-1:          NOTRUN -> [SKIP][24]
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-jsl-1/igt@kms_force_connector_basic@force-load-detect.html
    - bat-adlp-9:         NOTRUN -> [SKIP][25]
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-adlp-9/igt@kms_force_connector_basic@force-load-detect.html
    - bat-dg2-11:         NOTRUN -> [SKIP][26]
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-dg2-11/igt@kms_force_connector_basic@force-load-detect.html

  * igt@kms_force_connector_basic@prune-stale-modes:
    - bat-dg2-11:         NOTRUN -> [SKIP][27] ([i915#5274])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-dg2-11/igt@kms_force_connector_basic@prune-stale-modes.html

  * igt@kms_pm_backlight@basic-brightness:
    - bat-dg2-11:         NOTRUN -> [SKIP][28] ([i915#5354])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-dg2-11/igt@kms_pm_backlight@basic-brightness.html
    - bat-adlp-9:         NOTRUN -> [SKIP][29] ([i915#9812])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-adlp-9/igt@kms_pm_backlight@basic-brightness.html

  * igt@kms_psr@psr-sprite-plane-onoff:
    - bat-adlp-9:         NOTRUN -> [SKIP][30] ([i915#1072] / [i915#9673] / [i915#9732]) +3 other tests skip
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-adlp-9/igt@kms_psr@psr-sprite-plane-onoff.html
    - bat-dg2-11:         NOTRUN -> [SKIP][31] ([i915#1072] / [i915#9732]) +3 other tests skip
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-dg2-11/igt@kms_psr@psr-sprite-plane-onoff.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - bat-adlp-9:         NOTRUN -> [SKIP][32] ([i915#3555])
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-adlp-9/igt@kms_setmode@basic-clone-single-crtc.html
    - bat-dg2-11:         NOTRUN -> [SKIP][33] ([i915#3555])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-dg2-11/igt@kms_setmode@basic-clone-single-crtc.html
    - bat-jsl-1:          NOTRUN -> [SKIP][34] ([i915#3555])
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-jsl-1/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@prime_vgem@basic-fence-flip:
    - bat-dg2-11:         NOTRUN -> [SKIP][35] ([i915#3708])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-dg2-11/igt@prime_vgem@basic-fence-flip.html

  * igt@prime_vgem@basic-fence-mmap:
    - bat-dg2-11:         NOTRUN -> [SKIP][36] ([i915#3708] / [i915#4077]) +1 other test skip
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-dg2-11/igt@prime_vgem@basic-fence-mmap.html

  * igt@prime_vgem@basic-fence-read:
    - bat-adlp-9:         NOTRUN -> [SKIP][37] ([i915#3291] / [i915#3708]) +2 other tests skip
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-adlp-9/igt@prime_vgem@basic-fence-read.html

  * igt@prime_vgem@basic-read:
    - bat-dg2-11:         NOTRUN -> [SKIP][38] ([i915#3291] / [i915#3708]) +2 other tests skip
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-dg2-11/igt@prime_vgem@basic-read.html

  
#### Possible fixes ####

  * igt@i915_selftest@live@gt_lrc:
    - {bat-arlh-1}:       [INCOMPLETE][39] -> [PASS][40]
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7883/bat-arlh-1/igt@i915_selftest@live@gt_lrc.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-arlh-1/igt@i915_selftest@live@gt_lrc.html

  * igt@kms_flip@basic-flip-vs-modeset@b-dp6:
    - {bat-mtlp-9}:       [DMESG-FAIL][41] ([i915#11009]) -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7883/bat-mtlp-9/igt@kms_flip@basic-flip-vs-modeset@b-dp6.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-mtlp-9/igt@kms_flip@basic-flip-vs-modeset@b-dp6.html

  * igt@kms_flip@basic-flip-vs-modeset@d-dp7:
    - {bat-mtlp-9}:       [FAIL][43] ([i915#6121]) -> [PASS][44] +9 other tests pass
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7883/bat-mtlp-9/igt@kms_flip@basic-flip-vs-modeset@d-dp7.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/bat-mtlp-9/igt@kms_flip@basic-flip-vs-modeset@d-dp7.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#10580]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10580
  [i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
  [i915#10979]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10979
  [i915#11009]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11009
  [i915#2190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2190
  [i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
  [i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
  [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
  [i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
  [i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
  [i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
  [i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
  [i915#4213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4213
  [i915#4215]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4215
  [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
  [i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
  [i915#5274]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5274
  [i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
  [i915#6121]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6121
  [i915#6621]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6621
  [i915#9318]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9318
  [i915#9673]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9673
  [i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
  [i915#9812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9812
  [i915#9886]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9886


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_7883 -> IGTPW_11253

  CI-20190529: 20190529
  CI_DRM_14924: 09046e0a510c58c3af08532a4af43668911b3826 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_11253: 11253
  IGT_7883: ac1fbf274cec6210363758b76455a59dc5d89751 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_11253/index.html

[-- Attachment #2: Type: text/html, Size: 15252 bytes --]

✗ CI.xeFULL: failure for Early Transport Support (rev2)

[Patchwork]

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== Series Details ==

Series: Early Transport Support (rev2)
URL   : https://patchwork.freedesktop.org/series/133804/
State : failure

== Summary ==

CI Bug Log - changes from XEIGT_7883_full -> XEIGTPW_11253_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with XEIGTPW_11253_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in XEIGTPW_11253_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (3 -> 2)
------------------------------

  Missing    (1): shard-adlp 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in XEIGTPW_11253_full:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_flip@2x-busy-flip:
    - shard-dg2-set2:     [PASS][1] -> [ABORT][2] +1 other test abort
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7883/shard-dg2-435/igt@kms_flip@2x-busy-flip.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-435/igt@kms_flip@2x-busy-flip.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_async_flips@test-cursor:
    - {shard-lnl}:        [SKIP][3] ([Intel XE#664]) -> [INCOMPLETE][4]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7883/shard-lnl-1/igt@kms_async_flips@test-cursor.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-lnl-5/igt@kms_async_flips@test-cursor.html

  * igt@xe_exec_fault_mode@many-execqueues-userptr-invalidate-race:
    - {shard-lnl}:        [PASS][5] -> [ABORT][6]
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7883/shard-lnl-7/igt@xe_exec_fault_mode@many-execqueues-userptr-invalidate-race.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-lnl-8/igt@xe_exec_fault_mode@many-execqueues-userptr-invalidate-race.html

  
Known issues
------------

  Here are the changes found in XEIGTPW_11253_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@core_setmaster@master-drop-set-shared-fd:
    - shard-dg2-set2:     [PASS][7] -> [DMESG-WARN][8] ([Intel XE#1214]) +6 other tests dmesg-warn
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7883/shard-dg2-434/igt@core_setmaster@master-drop-set-shared-fd.html
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-435/igt@core_setmaster@master-drop-set-shared-fd.html

  * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-c-hdmi-a-6-4-mc-ccs:
    - shard-dg2-set2:     NOTRUN -> [SKIP][9] ([Intel XE#1201] / [Intel XE#801]) +23 other tests skip
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-435/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-c-hdmi-a-6-4-mc-ccs.html

  * igt@kms_big_fb@x-tiled-8bpp-rotate-90:
    - shard-dg2-set2:     NOTRUN -> [SKIP][10] ([Intel XE#1201] / [Intel XE#316])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-463/igt@kms_big_fb@x-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
    - shard-dg2-set2:     NOTRUN -> [SKIP][11] ([Intel XE#1124] / [Intel XE#1201]) +1 other test skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-466/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html

  * igt@kms_bw@linear-tiling-2-displays-1920x1080p:
    - shard-dg2-set2:     NOTRUN -> [SKIP][12] ([Intel XE#1201] / [Intel XE#367])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-433/igt@kms_bw@linear-tiling-2-displays-1920x1080p.html

  * igt@kms_ccs@bad-aux-stride-y-tiled-ccs@pipe-a-dp-4:
    - shard-dg2-set2:     NOTRUN -> [SKIP][13] ([Intel XE#1201] / [Intel XE#787]) +13 other tests skip
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-434/igt@kms_ccs@bad-aux-stride-y-tiled-ccs@pipe-a-dp-4.html

  * igt@kms_ccs@bad-aux-stride-y-tiled-ccs@pipe-d-dp-4:
    - shard-dg2-set2:     NOTRUN -> [SKIP][14] ([Intel XE#1201] / [Intel XE#455] / [Intel XE#787]) +3 other tests skip
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-434/igt@kms_ccs@bad-aux-stride-y-tiled-ccs@pipe-d-dp-4.html

  * igt@kms_chamelium_frames@hdmi-crc-single:
    - shard-dg2-set2:     NOTRUN -> [SKIP][15] ([Intel XE#1201] / [Intel XE#373])
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-435/igt@kms_chamelium_frames@hdmi-crc-single.html

  * igt@kms_cursor_edge_walk@64x64-left-edge@pipe-a-hdmi-a-6:
    - shard-dg2-set2:     [PASS][16] -> [INCOMPLETE][17] ([Intel XE#1195]) +1 other test incomplete
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7883/shard-dg2-434/igt@kms_cursor_edge_walk@64x64-left-edge@pipe-a-hdmi-a-6.html
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-466/igt@kms_cursor_edge_walk@64x64-left-edge@pipe-a-hdmi-a-6.html

  * igt@kms_cursor_legacy@forked-move@pipe-b:
    - shard-dg2-set2:     [PASS][18] -> [DMESG-WARN][19] ([Intel XE#1214] / [Intel XE#282]) +6 other tests dmesg-warn
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7883/shard-dg2-433/igt@kms_cursor_legacy@forked-move@pipe-b.html
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-434/igt@kms_cursor_legacy@forked-move@pipe-b.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling:
    - shard-dg2-set2:     NOTRUN -> [SKIP][20] ([Intel XE#1201] / [Intel XE#455]) +2 other tests skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-435/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-blt:
    - shard-dg2-set2:     NOTRUN -> [SKIP][21] ([Intel XE#1201] / [Intel XE#651]) +4 other tests skip
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-464/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-wc:
    - shard-dg2-set2:     NOTRUN -> [SKIP][22] ([Intel XE#1201] / [Intel XE#653]) +4 other tests skip
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-466/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_hdr@invalid-hdr:
    - shard-dg2-set2:     [PASS][23] -> [SKIP][24] ([Intel XE#1201] / [Intel XE#455])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7883/shard-dg2-463/igt@kms_hdr@invalid-hdr.html
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-466/igt@kms_hdr@invalid-hdr.html

  * igt@kms_psr@fbc-psr2-primary-blt:
    - shard-dg2-set2:     NOTRUN -> [SKIP][25] ([Intel XE#1201] / [Intel XE#929]) +3 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-463/igt@kms_psr@fbc-psr2-primary-blt.html

  * igt@kms_universal_plane@cursor-fb-leak:
    - shard-dg2-set2:     [PASS][26] -> [FAIL][27] ([Intel XE#771] / [Intel XE#899])
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7883/shard-dg2-435/igt@kms_universal_plane@cursor-fb-leak.html
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-464/igt@kms_universal_plane@cursor-fb-leak.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-c-hdmi-a-6:
    - shard-dg2-set2:     [PASS][28] -> [FAIL][29] ([Intel XE#899]) +1 other test fail
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7883/shard-dg2-435/igt@kms_universal_plane@cursor-fb-leak@pipe-c-hdmi-a-6.html
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-464/igt@kms_universal_plane@cursor-fb-leak@pipe-c-hdmi-a-6.html

  * igt@xe_evict@evict-beng-cm-threads-large:
    - shard-dg2-set2:     [PASS][30] -> [TIMEOUT][31] ([Intel XE#1473] / [Intel XE#392])
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7883/shard-dg2-466/igt@xe_evict@evict-beng-cm-threads-large.html
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-464/igt@xe_evict@evict-beng-cm-threads-large.html

  * igt@xe_evict@evict-beng-mixed-threads-large:
    - shard-dg2-set2:     NOTRUN -> [TIMEOUT][32] ([Intel XE#1473] / [Intel XE#392])
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-434/igt@xe_evict@evict-beng-mixed-threads-large.html

  * igt@xe_exec_fault_mode@many-userptr-invalidate:
    - shard-dg2-set2:     NOTRUN -> [SKIP][33] ([Intel XE#1201] / [Intel XE#288]) +1 other test skip
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-463/igt@xe_exec_fault_mode@many-userptr-invalidate.html

  * igt@xe_exec_threads@threads-bal-mixed-shared-vm-basic:
    - shard-dg2-set2:     [PASS][34] -> [INCOMPLETE][35] ([Intel XE#1169] / [Intel XE#1195] / [Intel XE#1356])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7883/shard-dg2-463/igt@xe_exec_threads@threads-bal-mixed-shared-vm-basic.html
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-434/igt@xe_exec_threads@threads-bal-mixed-shared-vm-basic.html

  * igt@xe_live_ktest@xe_migrate:
    - shard-dg2-set2:     [PASS][36] -> [SKIP][37] ([Intel XE#1192] / [Intel XE#1201])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7883/shard-dg2-435/igt@xe_live_ktest@xe_migrate.html
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-433/igt@xe_live_ktest@xe_migrate.html

  * igt@xe_pm@s3-d3cold-basic-exec:
    - shard-dg2-set2:     NOTRUN -> [SKIP][38] ([Intel XE#1201] / [Intel XE#366])
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-433/igt@xe_pm@s3-d3cold-basic-exec.html

  * igt@xe_pm@s3-vm-bind-unbind-all:
    - shard-dg2-set2:     [PASS][39] -> [DMESG-WARN][40] ([Intel XE#1162] / [Intel XE#1214] / [Intel XE#1941])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7883/shard-dg2-464/igt@xe_pm@s3-vm-bind-unbind-all.html
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-463/igt@xe_pm@s3-vm-bind-unbind-all.html

  
#### Possible fixes ####

  * igt@kms_cursor_legacy@forked-move@pipe-a:
    - shard-dg2-set2:     [DMESG-WARN][41] ([Intel XE#1214] / [Intel XE#282]) -> [PASS][42] +3 other tests pass
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7883/shard-dg2-433/igt@kms_cursor_legacy@forked-move@pipe-a.html
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-434/igt@kms_cursor_legacy@forked-move@pipe-a.html

  * igt@kms_cursor_legacy@single-move@pipe-b:
    - shard-dg2-set2:     [DMESG-WARN][43] ([Intel XE#1214] / [Intel XE#877]) -> [PASS][44]
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7883/shard-dg2-463/igt@kms_cursor_legacy@single-move@pipe-b.html
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-433/igt@kms_cursor_legacy@single-move@pipe-b.html

  * igt@kms_plane_cursor@overlay@pipe-a-hdmi-a-6-size-64:
    - shard-dg2-set2:     [FAIL][45] ([Intel XE#616]) -> [PASS][46] +1 other test pass
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7883/shard-dg2-435/igt@kms_plane_cursor@overlay@pipe-a-hdmi-a-6-size-64.html
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-434/igt@kms_plane_cursor@overlay@pipe-a-hdmi-a-6-size-64.html

  * igt@kms_pm_dc@dc5-psr:
    - {shard-lnl}:        [FAIL][47] ([Intel XE#718]) -> [PASS][48]
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7883/shard-lnl-1/igt@kms_pm_dc@dc5-psr.html
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-lnl-3/igt@kms_pm_dc@dc5-psr.html

  * igt@xe_evict@evict-cm-threads-large:
    - shard-dg2-set2:     [TIMEOUT][49] ([Intel XE#1041] / [Intel XE#1473] / [Intel XE#392]) -> [PASS][50]
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7883/shard-dg2-434/igt@xe_evict@evict-cm-threads-large.html
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-434/igt@xe_evict@evict-cm-threads-large.html

  * igt@xe_exec_threads@threads-mixed-fd-userptr-invalidate:
    - {shard-lnl}:        [INCOMPLETE][51] ([Intel XE#1169]) -> [PASS][52]
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7883/shard-lnl-3/igt@xe_exec_threads@threads-mixed-fd-userptr-invalidate.html
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-lnl-5/igt@xe_exec_threads@threads-mixed-fd-userptr-invalidate.html

  * igt@xe_gt_freq@freq_low_max:
    - {shard-lnl}:        [FAIL][53] ([Intel XE#1829]) -> [PASS][54]
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7883/shard-lnl-1/igt@xe_gt_freq@freq_low_max.html
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-lnl-4/igt@xe_gt_freq@freq_low_max.html

  * igt@xe_gt_freq@freq_reset_multiple:
    - {shard-lnl}:        [DMESG-WARN][55] ([Intel XE#1620]) -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7883/shard-lnl-5/igt@xe_gt_freq@freq_reset_multiple.html
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-lnl-5/igt@xe_gt_freq@freq_reset_multiple.html

  * igt@xe_pm@s3-vm-bind-prefetch:
    - shard-dg2-set2:     [DMESG-WARN][57] ([Intel XE#1214] / [Intel XE#569]) -> [PASS][58]
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7883/shard-dg2-463/igt@xe_pm@s3-vm-bind-prefetch.html
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-463/igt@xe_pm@s3-vm-bind-prefetch.html

  * igt@xe_pm@s4-basic:
    - shard-dg2-set2:     [DMESG-WARN][59] ([Intel XE#1214]) -> [PASS][60] +1 other test pass
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7883/shard-dg2-434/igt@xe_pm@s4-basic.html
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-434/igt@xe_pm@s4-basic.html

  
#### Warnings ####

  * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
    - shard-dg2-set2:     [DMESG-WARN][61] ([Intel XE#1214] / [Intel XE#282]) -> [DMESG-WARN][62] ([Intel XE#1214] / [Intel XE#282] / [Intel XE#910])
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7883/shard-dg2-466/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-466/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html

  * igt@kms_cursor_legacy@single-move:
    - shard-dg2-set2:     [DMESG-WARN][63] ([Intel XE#1214] / [Intel XE#282] / [Intel XE#877]) -> [DMESG-WARN][64] ([Intel XE#1214] / [Intel XE#282])
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7883/shard-dg2-463/igt@kms_cursor_legacy@single-move.html
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-433/igt@kms_cursor_legacy@single-move.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-dg2-set2:     [SKIP][65] ([Intel XE#1201] / [Intel XE#362]) -> [FAIL][66] ([Intel XE#1729])
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7883/shard-dg2-463/igt@kms_tiled_display@basic-test-pattern.html
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-434/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-dg2-set2:     [SKIP][67] ([Intel XE#1201] / [Intel XE#1500]) -> [SKIP][68] ([Intel XE#1201] / [Intel XE#362])
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7883/shard-dg2-433/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-463/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@xe_evict@evict-beng-mixed-many-threads-large:
    - shard-dg2-set2:     [INCOMPLETE][69] ([Intel XE#1195] / [Intel XE#1473] / [Intel XE#392]) -> [TIMEOUT][70] ([Intel XE#1041] / [Intel XE#1473] / [Intel XE#392])
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7883/shard-dg2-464/igt@xe_evict@evict-beng-mixed-many-threads-large.html
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-463/igt@xe_evict@evict-beng-mixed-many-threads-large.html

  * igt@xe_evict@evict-threads-large:
    - shard-dg2-set2:     [TIMEOUT][71] ([Intel XE#1473] / [Intel XE#392]) -> [INCOMPLETE][72] ([Intel XE#1195] / [Intel XE#1473] / [Intel XE#392])
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7883/shard-dg2-463/igt@xe_evict@evict-threads-large.html
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-433/igt@xe_evict@evict-threads-large.html

  * igt@xe_exec_reset@gt-reset-stress:
    - shard-dg2-set2:     [ABORT][73] ([Intel XE#2056]) -> [DMESG-WARN][74] ([Intel XE#1214] / [Intel XE#1638] / [Intel XE#2056])
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7883/shard-dg2-463/igt@xe_exec_reset@gt-reset-stress.html
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-435/igt@xe_exec_reset@gt-reset-stress.html

  * igt@xe_live_ktest@xe_mocs:
    - shard-dg2-set2:     [FAIL][75] ([Intel XE#1999]) -> [SKIP][76] ([Intel XE#1192] / [Intel XE#1201])
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7883/shard-dg2-433/igt@xe_live_ktest@xe_mocs.html
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-435/igt@xe_live_ktest@xe_mocs.html

  * igt@xe_wedged@wedged-at-any-timeout:
    - shard-dg2-set2:     [DMESG-FAIL][77] ([Intel XE#1760]) -> [SKIP][78] ([Intel XE#1130] / [Intel XE#1201])
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/IGT_7883/shard-dg2-463/igt@xe_wedged@wedged-at-any-timeout.html
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/shard-dg2-463/igt@xe_wedged@wedged-at-any-timeout.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#1041]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1041
  [Intel XE#1061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1061
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1128]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1128
  [Intel XE#1130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1130
  [Intel XE#1162]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1162
  [Intel XE#1169]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1169
  [Intel XE#1192]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1192
  [Intel XE#1195]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1195
  [Intel XE#1201]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1201
  [Intel XE#1211]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1211
  [Intel XE#1214]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1214
  [Intel XE#1330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1330
  [Intel XE#1356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1356
  [Intel XE#1358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1358
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1397
  [Intel XE#1399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1399
  [Intel XE#1401]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1401
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
  [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
  [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
  [Intel XE#1437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1437
  [Intel XE#1442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1442
  [Intel XE#1462]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1462
  [Intel XE#1470]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1470
  [Intel XE#1473]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1473
  [Intel XE#1500]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1500
  [Intel XE#1541]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1541
  [Intel XE#1595]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1595
  [Intel XE#1607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1607
  [Intel XE#1608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1608
  [Intel XE#1620]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1620
  [Intel XE#1622]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1622
  [Intel XE#1638]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1638
  [Intel XE#1659]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1659
  [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
  [Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745
  [Intel XE#1760]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1760
  [Intel XE#1829]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1829
  [Intel XE#1901]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1901
  [Intel XE#1924]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1924
  [Intel XE#1941]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1941
  [Intel XE#1999]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1999
  [Intel XE#2022]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2022
  [Intel XE#2024]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2024
  [Intel XE#2027]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2027
  [Intel XE#2028]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2028
  [Intel XE#2034]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2034
  [Intel XE#2056]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2056
  [Intel XE#2070]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2070
  [Intel XE#2084]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2084
  [Intel XE#282]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/282
  [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
  [Intel XE#305]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/305
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
  [Intel XE#355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/355
  [Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
  [Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/374
  [Intel XE#392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/392
  [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
  [Intel XE#498]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/498
  [Intel XE#569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/569
  [Intel XE#599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/599
  [Intel XE#616]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/616
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#664]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/664
  [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
  [Intel XE#718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/718
  [Intel XE#756]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/756
  [Intel XE#771]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/771
  [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
  [Intel XE#801]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/801
  [Intel XE#877]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/877
  [Intel XE#899]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/899
  [Intel XE#910]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/910
  [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
  [Intel XE#958]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/958


Build changes
-------------

  * IGT: IGT_7883 -> IGTPW_11253

  IGTPW_11253: 11253
  IGT_7883: ac1fbf274cec6210363758b76455a59dc5d89751 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-1448-09046e0a510c58c3af08532a4af43668911b3826: 09046e0a510c58c3af08532a4af43668911b3826

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/IGTPW_11253/index.html

[-- Attachment #2: Type: text/html, Size: 27103 bytes --]

[PATCH i-g-t 0/2] Early Transport Support

[Jeevan B]

Add early trasport helper and checks to validate early trasport support
on the supported display.

Jeevan B (2):
  lib/igt_psr: Added library functions for early trasport
  tests/intel/kms_psr2_sf: Add checks for early transport

 lib/igt_psr.c             | 19 +++++++++++++++++++
 lib/igt_psr.h             |  3 +++
 tests/intel/kms_psr2_sf.c | 18 +++++++++++++++++-
 3 files changed, 39 insertions(+), 1 deletion(-)

-- 
2.25.1

[PATCH i-g-t 1/2] lib/igt_psr: Added library functions for early trasport

[Jeevan B]

Added helper functions to check sink support for early transport and
check early transport active check.

v2: Add early trasport for PR and PSR2.
v3: Fix check strings.
v4: Add description to library function and correctstring logic.

Signed-off-by: Jeevan B <jeevan.b@intel.com>
---
 lib/igt_psr.c | 19 +++++++++++++++++++
 lib/igt_psr.h |  3 +++
 2 files changed, 22 insertions(+)

diff --git a/lib/igt_psr.c b/lib/igt_psr.c
index 6008b73a6..dc85042b2 100644
--- a/lib/igt_psr.c
+++ b/lib/igt_psr.c
@@ -53,6 +53,19 @@ bool selective_fetch_check(int debugfs_fd, igt_output_t *output)
 	return strstr(buf, "PSR2 selective fetch: enabled");
 }
 
+/*
+ * Checks if Early Transport is enabled in PSR status by reading the debugfs.
+ */
+bool early_transport_check(int debugfs_fd)
+{
+	char buf[PSR_STATUS_MAX_LEN];
+
+	igt_debugfs_simple_read(debugfs_fd, "i915_edp_psr_status", buf,
+				sizeof(buf));
+
+	return strstr(buf, "enabled (Early Transport)");
+}
+
 static bool psr_active_check(int debugfs_fd, enum psr_mode mode, igt_output_t *output)
 {
 	char debugfs_file[128] = {0};
@@ -247,10 +260,16 @@ bool psr_sink_support(int device, int debugfs_fd, enum psr_mode mode, igt_output
 		       strstr(buf, "Sink support: yes [0x04]") ||
 		       (strstr(line, "PSR = yes") &&
 		       (strstr(line, "[0x03]") || strstr(line, "[0x04]")));
+	case PSR_MODE_2_ET:
+		return strstr(buf, "Sink support: yes [0x04]") ||
+		       (strstr(line, "PSR = yes") &&
+			 strstr(line, "[0x04]"));
 	case PR_MODE:
 		return strstr(line, "Panel Replay = yes, Panel Replay Selective Update = no");
 	case PR_MODE_SEL_FETCH:
 		return strstr(line, "Panel Replay = yes, Panel Replay Selective Update = yes");
+	case PR_MODE_SEL_FETCH_ET:
+		return strstr(line, "Panel Replay Selective Update = yes (Early Transport)");
 	default:
 		igt_assert_f(false, "Invalid psr mode\n");
 		return false;
diff --git a/lib/igt_psr.h b/lib/igt_psr.h
index e8595fd8c..a7ebd0739 100644
--- a/lib/igt_psr.h
+++ b/lib/igt_psr.h
@@ -35,8 +35,10 @@ enum psr_mode {
 	PSR_MODE_1,
 	PSR_MODE_2,
 	PSR_MODE_2_SEL_FETCH,
+	PSR_MODE_2_ET,
 	PR_MODE,
 	PR_MODE_SEL_FETCH,
+	PR_MODE_SEL_FETCH_ET,
 	PSR_DISABLED,
 };
 
@@ -47,6 +49,7 @@ enum fbc_mode {
 
 bool psr_disabled_check(int debugfs_fd);
 bool selective_fetch_check(int debugfs_fd, igt_output_t *output);
+bool early_transport_check(int debugfs_fd);
 bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
 bool psr_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
 bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
-- 
2.25.1

Re: [PATCH i-g-t 1/2] lib/igt_psr: Added library functions for early trasport

[Hogander, Jouni]

On Mon, 2024-06-24 at 23:45 +0530, Jeevan B wrote:
> Added helper functions to check sink support for early transport and
> check early transport active check.

Reviewed-by: Jouni Högander <jouni.hogander@intel.com>

> 
> v2: Add early trasport for PR and PSR2.
> v3: Fix check strings.
> v4: Add description to library function and correctstring logic.
> 
> Signed-off-by: Jeevan B <jeevan.b@intel.com>
> ---
>  lib/igt_psr.c | 19 +++++++++++++++++++
>  lib/igt_psr.h |  3 +++
>  2 files changed, 22 insertions(+)
> 
> diff --git a/lib/igt_psr.c b/lib/igt_psr.c
> index 6008b73a6..dc85042b2 100644
> --- a/lib/igt_psr.c
> +++ b/lib/igt_psr.c
> @@ -53,6 +53,19 @@ bool selective_fetch_check(int debugfs_fd,
> igt_output_t *output)
>         return strstr(buf, "PSR2 selective fetch: enabled");
>  }
>  
> +/*
> + * Checks if Early Transport is enabled in PSR status by reading the
> debugfs.
> + */
> +bool early_transport_check(int debugfs_fd)
> +{
> +       char buf[PSR_STATUS_MAX_LEN];
> +
> +       igt_debugfs_simple_read(debugfs_fd, "i915_edp_psr_status",
> buf,
> +                               sizeof(buf));
> +
> +       return strstr(buf, "enabled (Early Transport)");
> +}
> +
>  static bool psr_active_check(int debugfs_fd, enum psr_mode mode,
> igt_output_t *output)
>  {
>         char debugfs_file[128] = {0};
> @@ -247,10 +260,16 @@ bool psr_sink_support(int device, int
> debugfs_fd, enum psr_mode mode, igt_output
>                        strstr(buf, "Sink support: yes [0x04]") ||
>                        (strstr(line, "PSR = yes") &&
>                        (strstr(line, "[0x03]") || strstr(line,
> "[0x04]")));
> +       case PSR_MODE_2_ET:
> +               return strstr(buf, "Sink support: yes [0x04]") ||
> +                      (strstr(line, "PSR = yes") &&
> +                        strstr(line, "[0x04]"));
>         case PR_MODE:
>                 return strstr(line, "Panel Replay = yes, Panel Replay
> Selective Update = no");
>         case PR_MODE_SEL_FETCH:
>                 return strstr(line, "Panel Replay = yes, Panel Replay
> Selective Update = yes");
> +       case PR_MODE_SEL_FETCH_ET:
> +               return strstr(line, "Panel Replay Selective Update =
> yes (Early Transport)");
>         default:
>                 igt_assert_f(false, "Invalid psr mode\n");
>                 return false;
> diff --git a/lib/igt_psr.h b/lib/igt_psr.h
> index e8595fd8c..a7ebd0739 100644
> --- a/lib/igt_psr.h
> +++ b/lib/igt_psr.h
> @@ -35,8 +35,10 @@ enum psr_mode {
>         PSR_MODE_1,
>         PSR_MODE_2,
>         PSR_MODE_2_SEL_FETCH,
> +       PSR_MODE_2_ET,
>         PR_MODE,
>         PR_MODE_SEL_FETCH,
> +       PR_MODE_SEL_FETCH_ET,
>         PSR_DISABLED,
>  };
>  
> @@ -47,6 +49,7 @@ enum fbc_mode {
>  
>  bool psr_disabled_check(int debugfs_fd);
>  bool selective_fetch_check(int debugfs_fd, igt_output_t *output);
> +bool early_transport_check(int debugfs_fd);
>  bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, igt_output_t
> *output);
>  bool psr_wait_update(int debugfs_fd, enum psr_mode mode,
> igt_output_t *output);
>  bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode,
> igt_output_t *output);

RE: [PATCH i-g-t 1/2] lib/igt_psr: Added library functions for early trasport

[Saarinen, Jani]

Hi, 
> -----Original Message-----
> From: igt-dev <igt-dev-bounces@lists.freedesktop.org> On Behalf Of Jeevan B
> Sent: Monday, 24 June 2024 21.16
> To: igt-dev@lists.freedesktop.org
> Cc: Hogander, Jouni <jouni.hogander@intel.com>; Konieczny, Kamil
> <kamil.konieczny@intel.com>; B, Jeevan <jeevan.b@intel.com>
> Subject: [PATCH i-g-t 1/2] lib/igt_psr: Added library functions for early trasport

s/ transport/ transport

> 
> Added helper functions to check sink support for early transport and check
> early transport active check.
> 
> v2: Add early trasport for PR and PSR2.
Same here

> v3: Fix check strings.
> v4: Add description to library function and correctstring logic.
> 
> Signed-off-by: Jeevan B <jeevan.b@intel.com>
> ---
>  lib/igt_psr.c | 19 +++++++++++++++++++
>  lib/igt_psr.h |  3 +++
>  2 files changed, 22 insertions(+)
> 
> diff --git a/lib/igt_psr.c b/lib/igt_psr.c index 6008b73a6..dc85042b2 100644
> --- a/lib/igt_psr.c
> +++ b/lib/igt_psr.c
> @@ -53,6 +53,19 @@ bool selective_fetch_check(int debugfs_fd,
> igt_output_t *output)
>  	return strstr(buf, "PSR2 selective fetch: enabled");  }
> 
> +/*
> + * Checks if Early Transport is enabled in PSR status by reading the debugfs.
> + */
> +bool early_transport_check(int debugfs_fd) {
> +	char buf[PSR_STATUS_MAX_LEN];
> +
> +	igt_debugfs_simple_read(debugfs_fd, "i915_edp_psr_status", buf,
> +				sizeof(buf));
> +
> +	return strstr(buf, "enabled (Early Transport)"); }
> +
>  static bool psr_active_check(int debugfs_fd, enum psr_mode mode,
> igt_output_t *output)  {
>  	char debugfs_file[128] = {0};
> @@ -247,10 +260,16 @@ bool psr_sink_support(int device, int debugfs_fd,
> enum psr_mode mode, igt_output
>  		       strstr(buf, "Sink support: yes [0x04]") ||
>  		       (strstr(line, "PSR = yes") &&
>  		       (strstr(line, "[0x03]") || strstr(line, "[0x04]")));
> +	case PSR_MODE_2_ET:
> +		return strstr(buf, "Sink support: yes [0x04]") ||
> +		       (strstr(line, "PSR = yes") &&
> +			 strstr(line, "[0x04]"));
>  	case PR_MODE:
>  		return strstr(line, "Panel Replay = yes, Panel Replay Selective
> Update = no");
>  	case PR_MODE_SEL_FETCH:
>  		return strstr(line, "Panel Replay = yes, Panel Replay Selective
> Update = yes");
> +	case PR_MODE_SEL_FETCH_ET:
> +		return strstr(line, "Panel Replay Selective Update = yes (Early
> +Transport)");
>  	default:
>  		igt_assert_f(false, "Invalid psr mode\n");
>  		return false;
> diff --git a/lib/igt_psr.h b/lib/igt_psr.h index e8595fd8c..a7ebd0739 100644
> --- a/lib/igt_psr.h
> +++ b/lib/igt_psr.h
> @@ -35,8 +35,10 @@ enum psr_mode {
>  	PSR_MODE_1,
>  	PSR_MODE_2,
>  	PSR_MODE_2_SEL_FETCH,
> +	PSR_MODE_2_ET,
>  	PR_MODE,
>  	PR_MODE_SEL_FETCH,
> +	PR_MODE_SEL_FETCH_ET,
>  	PSR_DISABLED,
>  };
> 
> @@ -47,6 +49,7 @@ enum fbc_mode {
> 
>  bool psr_disabled_check(int debugfs_fd);  bool selective_fetch_check(int
> debugfs_fd, igt_output_t *output);
> +bool early_transport_check(int debugfs_fd);
>  bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, igt_output_t
> *output);  bool psr_wait_update(int debugfs_fd, enum psr_mode mode,
> igt_output_t *output);  bool psr_long_wait_update(int debugfs_fd, enum
> psr_mode mode, igt_output_t *output);
> --
> 2.25.1

[PATCH i-g-t 0/2] Early Transport Support

[Jeevan B]

Add early trasport helper and checks to validate early trasport support
on the supported display.

Jeevan B (2):
  lib/igt_psr: Added library functions for early trasport
  tests/intel/kms_psr2_sf: Add checks for early transport

 lib/igt_psr.c             | 19 +++++++++++++++++++
 lib/igt_psr.h             |  3 +++
 tests/intel/kms_psr2_sf.c | 18 +++++++++++++++++-
 3 files changed, 39 insertions(+), 1 deletion(-)

-- 
2.25.1

[PATCH i-g-t 1/2] lib/igt_psr: Added library functions for early trasport

[Jeevan B]

Added helper functions to check sink support for early transport and
check early transport active check.

v2: Add early trasport for PR and PSR2.
v3: Fix check strings.
v4: Add description to library function and correctstring logic.

Signed-off-by: Jeevan B <jeevan.b@intel.com>
---
 lib/igt_psr.c | 19 +++++++++++++++++++
 lib/igt_psr.h |  3 +++
 2 files changed, 22 insertions(+)

diff --git a/lib/igt_psr.c b/lib/igt_psr.c
index 6008b73a6..279acdf7d 100644
--- a/lib/igt_psr.c
+++ b/lib/igt_psr.c
@@ -53,6 +53,19 @@ bool selective_fetch_check(int debugfs_fd, igt_output_t *output)
 	return strstr(buf, "PSR2 selective fetch: enabled");
 }
 
+/*
+ * Checks if Early Transport is enabled in PSR status by reading the debugfs.
+ */
+bool early_transport_check(int debugfs_fd)
+{
+	char buf[PSR_STATUS_MAX_LEN];
+
+	igt_debugfs_simple_read(debugfs_fd, "i915_edp_psr_status", buf,
+				sizeof(buf));
+
+	return strstr(buf, "enabled (Early Transport)");
+}
+
 static bool psr_active_check(int debugfs_fd, enum psr_mode mode, igt_output_t *output)
 {
 	char debugfs_file[128] = {0};
@@ -247,10 +260,16 @@ bool psr_sink_support(int device, int debugfs_fd, enum psr_mode mode, igt_output
 		       strstr(buf, "Sink support: yes [0x04]") ||
 		       (strstr(line, "PSR = yes") &&
 		       (strstr(line, "[0x03]") || strstr(line, "[0x04]")));
+	case PSR_MODE_2_ET:
+		return strstr(buf, "Sink support: yes [0x04]") ||
+		       (strstr(line, "PSR = yes") &&
+			 strstr(line, "[0x04]"))
 	case PR_MODE:
 		return strstr(line, "Panel Replay = yes, Panel Replay Selective Update = no");
 	case PR_MODE_SEL_FETCH:
 		return strstr(line, "Panel Replay = yes, Panel Replay Selective Update = yes");
+	case PR_MODE_SEL_FETCH_ET:
+		return strstr(line, "Panel Replay Selective Update = yes (Early Transport)");
 	default:
 		igt_assert_f(false, "Invalid psr mode\n");
 		return false;
diff --git a/lib/igt_psr.h b/lib/igt_psr.h
index e8595fd8c..a7ebd0739 100644
--- a/lib/igt_psr.h
+++ b/lib/igt_psr.h
@@ -35,8 +35,10 @@ enum psr_mode {
 	PSR_MODE_1,
 	PSR_MODE_2,
 	PSR_MODE_2_SEL_FETCH,
+	PSR_MODE_2_ET,
 	PR_MODE,
 	PR_MODE_SEL_FETCH,
+	PR_MODE_SEL_FETCH_ET,
 	PSR_DISABLED,
 };
 
@@ -47,6 +49,7 @@ enum fbc_mode {
 
 bool psr_disabled_check(int debugfs_fd);
 bool selective_fetch_check(int debugfs_fd, igt_output_t *output);
+bool early_transport_check(int debugfs_fd);
 bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
 bool psr_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
 bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
-- 
2.25.1

[PATCH i-g-t 0/2] Early Transport Support

[Jeevan B]

Add early trasport helper and checks to validate early trasport support
on the supported display.

Jeevan B (2):
  lib/igt_psr: Added library functions for early trasport
  tests/intel/kms_psr2_sf: Add checks for early transport

 lib/igt_psr.c             | 14 ++++++++++++++
 lib/igt_psr.h             |  3 +++
 tests/intel/kms_psr2_sf.c | 18 +++++++++++++++++-
 3 files changed, 34 insertions(+), 1 deletion(-)

-- 
2.25.1

[PATCH i-g-t 1/2] lib/igt_psr: Added library functions for early trasport

[Jeevan B]

Added helper functions to check sink support for early transport and
check early transport active check.

v2: Add early trasport for PR and PSR2.
v3: Fix check strings.

Signed-off-by: Jeevan B <jeevan.b@intel.com>
---
 lib/igt_psr.c | 14 ++++++++++++++
 lib/igt_psr.h |  3 +++
 2 files changed, 17 insertions(+)

diff --git a/lib/igt_psr.c b/lib/igt_psr.c
index 6008b73a6..c170d8ca8 100644
--- a/lib/igt_psr.c
+++ b/lib/igt_psr.c
@@ -53,6 +53,16 @@ bool selective_fetch_check(int debugfs_fd, igt_output_t *output)
 	return strstr(buf, "PSR2 selective fetch: enabled");
 }
 
+bool early_transport_check(int debugfs_fd)
+{
+	char buf[PSR_STATUS_MAX_LEN];
+
+	igt_debugfs_simple_read(debugfs_fd, "i915_edp_psr_status", buf,
+				sizeof(buf));
+
+	return strstr(buf, "enabled (Early Transport)");
+}
+
 static bool psr_active_check(int debugfs_fd, enum psr_mode mode, igt_output_t *output)
 {
 	char debugfs_file[128] = {0};
@@ -247,10 +257,14 @@ bool psr_sink_support(int device, int debugfs_fd, enum psr_mode mode, igt_output
 		       strstr(buf, "Sink support: yes [0x04]") ||
 		       (strstr(line, "PSR = yes") &&
 		       (strstr(line, "[0x03]") || strstr(line, "[0x04]")));
+	case PSR_MODE_2_ET:
+		return strstr(buf, "Sink support: yes [0x04]");
 	case PR_MODE:
 		return strstr(line, "Panel Replay = yes, Panel Replay Selective Update = no");
 	case PR_MODE_SEL_FETCH:
 		return strstr(line, "Panel Replay = yes, Panel Replay Selective Update = yes");
+	case PR_MODE_SEL_FETCH_ET:
+		return strstr(line, "Panel Replay Selective Update = yes (Early Transport)");
 	default:
 		igt_assert_f(false, "Invalid psr mode\n");
 		return false;
diff --git a/lib/igt_psr.h b/lib/igt_psr.h
index e8595fd8c..a7ebd0739 100644
--- a/lib/igt_psr.h
+++ b/lib/igt_psr.h
@@ -35,8 +35,10 @@ enum psr_mode {
 	PSR_MODE_1,
 	PSR_MODE_2,
 	PSR_MODE_2_SEL_FETCH,
+	PSR_MODE_2_ET,
 	PR_MODE,
 	PR_MODE_SEL_FETCH,
+	PR_MODE_SEL_FETCH_ET,
 	PSR_DISABLED,
 };
 
@@ -47,6 +49,7 @@ enum fbc_mode {
 
 bool psr_disabled_check(int debugfs_fd);
 bool selective_fetch_check(int debugfs_fd, igt_output_t *output);
+bool early_transport_check(int debugfs_fd);
 bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
 bool psr_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
 bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
-- 
2.25.1

Re: [PATCH i-g-t 1/2] lib/igt_psr: Added library functions for early trasport

[Kamil Konieczny]

Hi Jeevan,
On 2024-06-20 at 10:03:40 +0530, Jeevan B wrote:
> Added helper functions to check sink support for early transport and
> check early transport active check.
> 
> v2: Add early trasport for PR and PSR2.
> v3: Fix check strings.
> 
> Signed-off-by: Jeevan B <jeevan.b@intel.com>
> ---
>  lib/igt_psr.c | 14 ++++++++++++++
>  lib/igt_psr.h |  3 +++
>  2 files changed, 17 insertions(+)
> 
> diff --git a/lib/igt_psr.c b/lib/igt_psr.c
> index 6008b73a6..c170d8ca8 100644
> --- a/lib/igt_psr.c
> +++ b/lib/igt_psr.c
> @@ -53,6 +53,16 @@ bool selective_fetch_check(int debugfs_fd, igt_output_t *output)
>  	return strstr(buf, "PSR2 selective fetch: enabled");
>  }
> 

Add description to each public library function.

Regards,
Kamil

> +bool early_transport_check(int debugfs_fd)
> +{
> +	char buf[PSR_STATUS_MAX_LEN];
> +
> +	igt_debugfs_simple_read(debugfs_fd, "i915_edp_psr_status", buf,
> +				sizeof(buf));
> +
> +	return strstr(buf, "enabled (Early Transport)");
> +}
> +
>  static bool psr_active_check(int debugfs_fd, enum psr_mode mode, igt_output_t *output)
>  {
>  	char debugfs_file[128] = {0};
> @@ -247,10 +257,14 @@ bool psr_sink_support(int device, int debugfs_fd, enum psr_mode mode, igt_output
>  		       strstr(buf, "Sink support: yes [0x04]") ||
>  		       (strstr(line, "PSR = yes") &&
>  		       (strstr(line, "[0x03]") || strstr(line, "[0x04]")));
> +	case PSR_MODE_2_ET:
> +		return strstr(buf, "Sink support: yes [0x04]");
>  	case PR_MODE:
>  		return strstr(line, "Panel Replay = yes, Panel Replay Selective Update = no");
>  	case PR_MODE_SEL_FETCH:
>  		return strstr(line, "Panel Replay = yes, Panel Replay Selective Update = yes");
> +	case PR_MODE_SEL_FETCH_ET:
> +		return strstr(line, "Panel Replay Selective Update = yes (Early Transport)");
>  	default:
>  		igt_assert_f(false, "Invalid psr mode\n");
>  		return false;
> diff --git a/lib/igt_psr.h b/lib/igt_psr.h
> index e8595fd8c..a7ebd0739 100644
> --- a/lib/igt_psr.h
> +++ b/lib/igt_psr.h
> @@ -35,8 +35,10 @@ enum psr_mode {
>  	PSR_MODE_1,
>  	PSR_MODE_2,
>  	PSR_MODE_2_SEL_FETCH,
> +	PSR_MODE_2_ET,
>  	PR_MODE,
>  	PR_MODE_SEL_FETCH,
> +	PR_MODE_SEL_FETCH_ET,
>  	PSR_DISABLED,
>  };
>  
> @@ -47,6 +49,7 @@ enum fbc_mode {
>  
>  bool psr_disabled_check(int debugfs_fd);
>  bool selective_fetch_check(int debugfs_fd, igt_output_t *output);
> +bool early_transport_check(int debugfs_fd);
>  bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
>  bool psr_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
>  bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
> -- 
> 2.25.1
> 

[PATCH i-g-t 0/2] Early Transport Support

[Jeevan B]

Add early trasport helper and checks to validate early trasport support
on the supported display.

Jeevan B (2):
  lib/igt_psr: Added library functions for early trasport
  tests/intel/kms_psr2_sf: Add checks for early transport

 lib/igt_psr.c             | 13 +++++++++++++
 lib/igt_psr.h             |  2 ++
 tests/intel/kms_psr2_sf.c |  3 +++
 3 files changed, 18 insertions(+)

-- 
2.25.1

[PATCH i-g-t 1/2] lib/igt_psr: Added library functions for early trasport

[Jeevan B]

Added helper functions to check sink support for early transport and
check early transport active check.

Signed-off-by: Jeevan B <jeevan.b@intel.com>
---
 lib/igt_psr.c | 13 +++++++++++++
 lib/igt_psr.h |  2 ++
 2 files changed, 15 insertions(+)

diff --git a/lib/igt_psr.c b/lib/igt_psr.c
index 6008b73a6..8dc6b9b78 100644
--- a/lib/igt_psr.c
+++ b/lib/igt_psr.c
@@ -53,6 +53,16 @@ bool selective_fetch_check(int debugfs_fd, igt_output_t *output)
 	return strstr(buf, "PSR2 selective fetch: enabled");
 }
 
+bool psr2_early_transport_check(int debugfs_fd)
+{
+	char buf[PSR_STATUS_MAX_LEN];
+
+	igt_debugfs_simple_read(debugfs_fd, "i915_edp_psr_status", buf,
+				sizeof(buf));
+
+	return strstr(buf, "PSR2 Early Transport: enabled");
+}
+
 static bool psr_active_check(int debugfs_fd, enum psr_mode mode, igt_output_t *output)
 {
 	char debugfs_file[128] = {0};
@@ -249,6 +259,9 @@ bool psr_sink_support(int device, int debugfs_fd, enum psr_mode mode, igt_output
 		       (strstr(line, "[0x03]") || strstr(line, "[0x04]")));
 	case PR_MODE:
 		return strstr(line, "Panel Replay = yes, Panel Replay Selective Update = no");
+	case ET_MODE:
+		return strstr(buf, "Sink support: yes [0x04]") ||
+			     (strstr(line, "PSR = yes") && strstr(line, "Early Transport = yes"));
 	case PR_MODE_SEL_FETCH:
 		return strstr(line, "Panel Replay = yes, Panel Replay Selective Update = yes");
 	default:
diff --git a/lib/igt_psr.h b/lib/igt_psr.h
index e8595fd8c..23f4dd35b 100644
--- a/lib/igt_psr.h
+++ b/lib/igt_psr.h
@@ -37,6 +37,7 @@ enum psr_mode {
 	PSR_MODE_2_SEL_FETCH,
 	PR_MODE,
 	PR_MODE_SEL_FETCH,
+	ET_MODE,
 	PSR_DISABLED,
 };
 
@@ -47,6 +48,7 @@ enum fbc_mode {
 
 bool psr_disabled_check(int debugfs_fd);
 bool selective_fetch_check(int debugfs_fd, igt_output_t *output);
+bool psr2_early_transport_check(int debugfs_fd);
 bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
 bool psr_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
 bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode, igt_output_t *output);
-- 
2.25.1

Re: [PATCH i-g-t 1/2] lib/igt_psr: Added library functions for early trasport

[Hogander, Jouni]

On Mon, 2024-05-20 at 15:16 +0530, Jeevan B wrote:
> Added helper functions to check sink support for early transport and
> check early transport active check.
> 
> Signed-off-by: Jeevan B <jeevan.b@intel.com>
> ---
>  lib/igt_psr.c | 13 +++++++++++++
>  lib/igt_psr.h |  2 ++
>  2 files changed, 15 insertions(+)
> 
> diff --git a/lib/igt_psr.c b/lib/igt_psr.c
> index 6008b73a6..8dc6b9b78 100644
> --- a/lib/igt_psr.c
> +++ b/lib/igt_psr.c
> @@ -53,6 +53,16 @@ bool selective_fetch_check(int debugfs_fd,
> igt_output_t *output)
>         return strstr(buf, "PSR2 selective fetch: enabled");
>  }
>  
> +bool psr2_early_transport_check(int debugfs_fd)
> +{
> +       char buf[PSR_STATUS_MAX_LEN];
> +
> +       igt_debugfs_simple_read(debugfs_fd, "i915_edp_psr_status",
> buf,
> +                               sizeof(buf));
> +
> +       return strstr(buf, "PSR2 Early Transport: enabled");

Current plan is to have
(https://patchwork.freedesktop.org/patch/596084/?series=134181&rev=1):

PSR mode: Panel Replay Selective Update enabled (Early Transport)

and

PSR mode: PSR2 (Early Transport)

> +}
> +
>  staPSR mode: tic bool psr_active_check(int debugfs_fd, enum psr_mode
> mode, igt_output_t *output)
>  {
>         char debugfs_file[128] = {0};
> @@ -249,6 +259,9 @@ bool psr_sink_support(int device, int debugfs_fd,
> enum psr_mode mode, igt_output
>                        (strstr(line, "[0x03]") || strstr(line,
> "[0x04]")));
>         case PR_MODE:
>                 return strstr(line, "Panel Replay = yes, Panel Replay
> Selective Update = no");
> +       case ET_MODE:
> +               return strstr(buf, "Sink support: yes [0x04]") ||
> +                            (strstr(line, "PSR = yes") &&
> strstr(line, "Early Transport = yes"));

Early transport is not only for PSR, but Panel Replay as well.

BR,

Jouni Högander

>         case PR_MODE_SEL_FETCH:
>                 return strstr(line, "Panel Replay = yes, Panel Replay
> Selective Update = yes");
>         default:
> diff --git a/lib/igt_psr.h b/lib/igt_psr.h
> index e8595fd8c..23f4dd35b 100644
> --- a/lib/igt_psr.h
> +++ b/lib/igt_psr.h
> @@ -37,6 +37,7 @@ enum psr_mode {
>         PSR_MODE_2_SEL_FETCH,
>         PR_MODE,
>         PR_MODE_SEL_FETCH,
> +       ET_MODE,
>         PSR_DISABLED,
>  };
>  
> @@ -47,6 +48,7 @@ enum fbc_mode {
>  
>  bool psr_disabled_check(int debugfs_fd);
>  bool selective_fetch_check(int debugfs_fd, igt_output_t *output);
> +bool psr2_early_transport_check(int debugfs_fd);
>  bool psr_wait_entry(int debugfs_fd, enum psr_mode mode, igt_output_t
> *output);
>  bool psr_wait_update(int debugfs_fd, enum psr_mode mode,
> igt_output_t *output);
>  bool psr_long_wait_update(int debugfs_fd, enum psr_mode mode,
> igt_output_t *output);