* [igt-dev] [V3] [PATCH i-g-t][V3]tests/i915/gem_exec_fence:Added __for_each_physical_engine to utilize all available engines.
@ 2020-02-11 9:06 saigowth
2020-02-11 9:28 ` [igt-dev] ✗ GitLab.Pipeline: failure for tests/i915/gem_exec_fence:Added __for_each_physical_engine to utilize all available engines. (rev3) Patchwork
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: saigowth @ 2020-02-11 9:06 UTC (permalink / raw)
To: sai.gowtham.ch, igt-dev
Replaced the legacy for_each_engine* defines with the ones implemented
in the gem_engine_topology library.
V2
Corrected subtest name in fast-feedback.testlist from,
basic-busy-default --> basic-busy
basic-wait-default --> basic-wait
basi-await-deafult --> basic-await
nb-await-default --> nb-await
Signed-off-by: saigowth <sai.gowtham.ch@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
---
tests/i915/gem_exec_fence.c | 204 ++++++++++++++++----------
tests/intel-ci/fast-feedback.testlist | 8 +-
2 files changed, 127 insertions(+), 85 deletions(-)
diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c
index 6d369f58..36488ea7 100644
--- a/tests/i915/gem_exec_fence.c
+++ b/tests/i915/gem_exec_fence.c
@@ -46,7 +46,8 @@ struct sync_merge_data {
#define SYNC_IOC_MERGE _IOWR(SYNC_IOC_MAGIC, 3, struct sync_merge_data)
#endif
-static void store(int fd, unsigned ring, int fence, uint32_t target, unsigned offset_value)
+static void store(int fd, const struct intel_execution_engine2 *e,
+ int fence, uint32_t target, unsigned offset_value)
{
const int SCRATCH = 0;
const int BATCH = 1;
@@ -60,7 +61,7 @@ static void store(int fd, unsigned ring, int fence, uint32_t target, unsigned of
memset(&execbuf, 0, sizeof(execbuf));
execbuf.buffers_ptr = to_user_pointer(obj);
execbuf.buffer_count = 2;
- execbuf.flags = ring | I915_EXEC_FENCE_IN;
+ execbuf.flags = e->flags | I915_EXEC_FENCE_IN;
execbuf.rsvd2 = fence;
if (gen < 6)
execbuf.flags |= I915_EXEC_SECURE;
@@ -108,7 +109,8 @@ static bool fence_busy(int fence)
#define NONBLOCK 0x2
#define WAIT 0x4
-static void test_fence_busy(int fd, unsigned ring, unsigned flags)
+static void test_fence_busy(int fd, const struct intel_execution_engine2 *e,
+ unsigned flags)
{
const int gen = intel_gen(intel_get_drm_devid(fd));
struct drm_i915_gem_exec_object2 obj;
@@ -119,14 +121,14 @@ static void test_fence_busy(int fd, unsigned ring, unsigned flags)
int fence, i, timeout;
if ((flags & HANG) == 0)
- igt_require(gem_engine_has_mutable_submission(fd, ring));
+ igt_require(gem_class_has_mutable_submission(fd, e->class));
gem_quiescent_gpu(fd);
memset(&execbuf, 0, sizeof(execbuf));
execbuf.buffers_ptr = to_user_pointer(&obj);
execbuf.buffer_count = 1;
- execbuf.flags = ring | I915_EXEC_FENCE_OUT;
+ execbuf.flags = e->flags | I915_EXEC_FENCE_OUT;
memset(&obj, 0, sizeof(obj));
obj.handle = gem_create(fd, 4096);
@@ -205,6 +207,7 @@ static void test_fence_busy(int fd, unsigned ring, unsigned flags)
static void test_fence_busy_all(int fd, unsigned flags)
{
+ const struct intel_execution_engine2 *e;
const int gen = intel_gen(intel_get_drm_devid(fd));
struct drm_i915_gem_exec_object2 obj;
struct drm_i915_gem_relocation_entry reloc;
@@ -260,14 +263,14 @@ static void test_fence_busy_all(int fd, unsigned flags)
i++;
all = -1;
- for_each_engine(e, fd) {
+ __for_each_physical_engine(fd, e) {
int fence, new;
if ((flags & HANG) == 0 &&
- !gem_engine_has_mutable_submission(fd, eb_ring(e)))
+ !gem_class_has_mutable_submission(fd, e->class))
continue;
- execbuf.flags = eb_ring(e) | I915_EXEC_FENCE_OUT;
+ execbuf.flags = e->flags | I915_EXEC_FENCE_OUT;
execbuf.rsvd2 = -1;
gem_execbuf_wr(fd, &execbuf);
fence = execbuf.rsvd2 >> 32;
@@ -316,39 +319,41 @@ static void test_fence_busy_all(int fd, unsigned flags)
gem_quiescent_gpu(fd);
}
-static void test_fence_await(int fd, unsigned ring, unsigned flags)
+static void test_fence_await(int fd, const struct intel_execution_engine2 *e,
+ unsigned flags)
{
+ const struct intel_execution_engine2 *e2;
uint32_t scratch = gem_create(fd, 4096);
igt_spin_t *spin;
uint32_t *out;
int i;
if ((flags & HANG) == 0)
- igt_require(gem_engine_has_mutable_submission(fd, ring));
+ igt_require(gem_class_has_mutable_submission(fd, e->class));
- igt_require(gem_can_store_dword(fd, 0));
+ igt_require(gem_class_can_store_dword(fd, 0));
out = gem_mmap__wc(fd, scratch, 0, 4096, PROT_WRITE);
gem_set_domain(fd, scratch,
I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
spin = igt_spin_new(fd,
- .engine = ring,
+ .engine = e->flags,
.flags = (IGT_SPIN_FENCE_OUT |
IGT_SPIN_NO_PREEMPTION |
(flags & HANG ? IGT_SPIN_INVALID_CS : 0)));
igt_assert(spin->out_fence != -1);
i = 0;
- for_each_physical_engine(e, fd) {
- if (!gem_can_store_dword(fd, eb_ring(e)))
+ __for_each_physical_engine(fd, e2) {
+ if (!gem_class_can_store_dword(fd, e->class))
continue;
if (flags & NONBLOCK) {
- store(fd, eb_ring(e), spin->out_fence, scratch, i);
+ store(fd, e2, spin->out_fence, scratch, i);
} else {
igt_fork(child, 1)
- store(fd, eb_ring(e), spin->out_fence, scratch, i);
+ store(fd, e2, spin->out_fence, scratch, i);
}
i++;
@@ -376,13 +381,14 @@ static void test_fence_await(int fd, unsigned ring, unsigned flags)
gem_close(fd, scratch);
}
-static void resubmit(int fd, uint32_t handle, unsigned int ring, int count)
+static void resubmit(int fd, uint32_t handle,
+ const struct intel_execution_engine2 *e, int count)
{
struct drm_i915_gem_exec_object2 obj = { .handle = handle };
struct drm_i915_gem_execbuffer2 execbuf = {
.buffers_ptr = to_user_pointer(&obj),
.buffer_count = 1,
- .flags = ring,
+ .flags = e->flags,
};
while (count--)
gem_execbuf(fd, &execbuf);
@@ -404,8 +410,9 @@ static int __execbuf(int fd, struct drm_i915_gem_execbuffer2 *execbuf)
return err;
}
-static void test_parallel(int fd, unsigned int master)
+static void test_parallel(int fd, const struct intel_execution_engine2 *e)
{
+ const struct intel_execution_engine2 *e2;
const int SCRATCH = 0;
const int BATCH = 1;
const int gen = intel_gen(intel_get_drm_devid(fd));
@@ -426,14 +433,14 @@ static void test_parallel(int fd, unsigned int master)
/* Fill the queue with many requests so that the next one has to
* wait before it can be executed by the hardware.
*/
- spin = igt_spin_new(fd, .engine = master, .dependency = plug);
- resubmit(fd, spin->handle, master, 16);
+ spin = igt_spin_new(fd, .engine = e->flags, .dependency = plug);
+ resubmit(fd, spin->handle, e, 16);
/* Now queue the master request and its secondaries */
memset(&execbuf, 0, sizeof(execbuf));
execbuf.buffers_ptr = to_user_pointer(obj);
execbuf.buffer_count = 2;
- execbuf.flags = master | I915_EXEC_FENCE_OUT;
+ execbuf.flags = e->flags | I915_EXEC_FENCE_OUT;
if (gen < 6)
execbuf.flags |= I915_EXEC_SECURE;
@@ -502,11 +509,11 @@ static void test_parallel(int fd, unsigned int master)
obj[BATCH].relocation_count = 1;
/* Queue all secondaries */
- for_each_physical_engine(e, fd) {
- if (eb_ring(e) == master)
+ __for_each_physical_engine(fd, e2) {
+ if (e2->flags == e->flags)
continue;
- execbuf.flags = eb_ring(e) | I915_EXEC_FENCE_SUBMIT;
+ execbuf.flags = e2->flags | I915_EXEC_FENCE_SUBMIT;
if (gen < 6)
execbuf.flags |= I915_EXEC_SECURE;
@@ -593,7 +600,7 @@ static inline uint32_t upper_32_bits(uint64_t x)
return x >> 32;
}
-static void test_keep_in_fence(int fd, unsigned int engine, unsigned int flags)
+static void test_keep_in_fence(int fd, const struct intel_execution_engine2 *e)
{
struct sigaction sa = { .sa_handler = alarm_handler };
struct drm_i915_gem_exec_object2 obj = {
@@ -602,14 +609,14 @@ static void test_keep_in_fence(int fd, unsigned int engine, unsigned int flags)
struct drm_i915_gem_execbuffer2 execbuf = {
.buffers_ptr = to_user_pointer(&obj),
.buffer_count = 1,
- .flags = engine | I915_EXEC_FENCE_OUT,
+ .flags = e->flags | I915_EXEC_FENCE_OUT,
};
unsigned long count, last;
struct itimerval itv;
igt_spin_t *spin;
int fence;
- spin = igt_spin_new(fd, .engine = engine);
+ spin = igt_spin_new(fd, .engine = e->flags);
gem_execbuf_wr(fd, &execbuf);
fence = upper_32_bits(execbuf.rsvd2);
@@ -1373,7 +1380,7 @@ static void test_syncobj_channel(int fd)
igt_main
{
- const struct intel_execution_engine *e;
+ const struct intel_execution_engine2 *e;
int i915 = -1;
igt_fixture {
@@ -1412,69 +1419,105 @@ igt_main
}
}
- for (e = intel_execution_engines; e->name; e++) {
- igt_subtest_group {
+ igt_subtest_group {
+ __for_each_physical_engine(i915, e) {
igt_fixture {
- igt_require(gem_has_ring(i915, eb_ring(e)));
- igt_require(gem_can_store_dword(i915, eb_ring(e)));
+ igt_require(gem_class_can_store_dword(i915, e->class));
}
+ }
+ igt_subtest_group {
+ igt_fixture {
+ igt_fork_hang_detector(i915);
+ }
+ igt_subtest_with_dynamic("basic-busy") {
+ __for_each_physical_engine(i915, e) {
+ /* Requires master for STORE_DWORD on gen4/5 */
- igt_subtest_group {
- igt_fixture {
- igt_fork_hang_detector(i915);
+ igt_dynamic_f("%s", e->name)
+ test_fence_busy(i915, e, 0);
}
-
- igt_subtest_f("%sbusy-%s",
- e->exec_id == 0 ? "basic-" : "",
- e->name)
- test_fence_busy(i915, eb_ring(e), 0);
- igt_subtest_f("%swait-%s",
- e->exec_id == 0 ? "basic-" : "",
- e->name)
- test_fence_busy(i915, eb_ring(e), WAIT);
- igt_subtest_f("%sawait-%s",
- e->exec_id == 0 ? "basic-" : "",
- e->name)
- test_fence_await(i915, eb_ring(e), 0);
- igt_subtest_f("nb-await-%s", e->name)
- test_fence_await(i915, eb_ring(e), NONBLOCK);
-
- igt_subtest_f("keep-in-fence-%s", e->name)
- test_keep_in_fence(i915, eb_ring(e), 0);
-
- if (e->exec_id &&
- !(e->exec_id == I915_EXEC_BSD && !e->flags)) {
- igt_subtest_f("parallel-%s", e->name) {
- igt_require(has_submit_fence(i915));
- igt_until_timeout(2)
- test_parallel(i915, eb_ring(e));
- }
+ }
+ igt_subtest_with_dynamic("basic-wait") {
+ __for_each_physical_engine(i915, e) {
+ /* Requires master for STORE_DWORD on gen4/5 */
+ igt_dynamic_f("%s", e->name)
+ test_fence_busy(i915, e, WAIT);
}
-
- igt_fixture {
- igt_stop_hang_detector();
+ }
+ igt_subtest_with_dynamic("basic-await") {
+ __for_each_physical_engine(i915, e) {
+ /* Requires master for STORE_DWORD on gen4/5 */
+ igt_dynamic_f("%s", e->name)
+ test_fence_await(i915, e, 0);
+ }
+ }
+ igt_subtest_with_dynamic("nb-await") {
+ __for_each_physical_engine(i915, e) {
+ /* Requires master for STORE_DWORD on gen4/5 */
+ igt_dynamic_f("%s", e->name)
+ test_fence_await(i915,
+ e, NONBLOCK);
+ }
+ }
+ igt_subtest_with_dynamic("keep-in-fence") {
+ __for_each_physical_engine(i915, e) {
+ /* Requires master for STORE_DWORD on gen4/5 */
+ igt_dynamic_f("%s", e->name)
+ test_keep_in_fence(i915, e);
+ }
+ }
+ igt_subtest_with_dynamic("parallel") {
+ __for_each_physical_engine(i915, e) {
+ /* Requires master for STORE_DWORD on gen4/5 */
+ igt_dynamic_f("%s", e->name)
+ igt_require(has_submit_fence(i915));
+ igt_until_timeout(2)
+ test_parallel(i915, e);
}
}
- igt_subtest_group {
- igt_hang_t hang;
+ igt_fixture {
+ igt_stop_hang_detector();
+ }
+ }
- igt_fixture {
- hang = igt_allow_hang(i915, 0, 0);
- }
+ igt_subtest_group {
+ igt_hang_t hang;
- igt_subtest_f("busy-hang-%s", e->name)
- test_fence_busy(i915, eb_ring(e), HANG);
- igt_subtest_f("wait-hang-%s", e->name)
- test_fence_busy(i915, eb_ring(e), HANG | WAIT);
- igt_subtest_f("await-hang-%s", e->name)
- test_fence_await(i915, eb_ring(e), HANG);
- igt_subtest_f("nb-await-hang-%s", e->name)
- test_fence_await(i915, eb_ring(e), NONBLOCK | HANG);
- igt_fixture {
- igt_disallow_hang(i915, hang);
+ igt_fixture {
+ hang = igt_allow_hang(i915, 0, 0);
+ }
+ igt_subtest_with_dynamic("busy-hang") {
+ __for_each_physical_engine(i915, e) {
+ /* Requires master for STORE_DWORD on gen4/5 */
+ igt_dynamic_f("%s", e->name)
+ test_fence_busy(i915, e, HANG);
+ }
+ }
+ igt_subtest_with_dynamic("wait-hang") {
+ __for_each_physical_engine(i915, e) {
+ /* Requires master for STORE_DWORD on gen4/5 */
+ igt_dynamic_f("%s", e->name)
+ test_fence_busy(i915, e, HANG | WAIT);
+ }
+ }
+ igt_subtest_with_dynamic("await-hang") {
+ __for_each_physical_engine(i915, e) {
+ /* Requires master for STORE_DWORD on gen4/5 */
+ igt_dynamic_f("%s", e->name)
+ test_fence_await(i915, e, HANG);
+ }
+ }
+ igt_subtest_with_dynamic("nb-await-hang") {
+ __for_each_physical_engine(i915, e) {
+ /* Requires master for STORE_DWORD on gen4/5 */
+ igt_dynamic_f("%s", e->name)
+ test_fence_await(i915, e, NONBLOCK | HANG);
}
}
+ igt_fixture {
+ igt_disallow_hang(i915, hang);
+ }
}
}
@@ -1542,7 +1585,6 @@ igt_main
igt_stop_hang_detector();
}
}
-
igt_fixture {
close(i915);
}
diff --git a/tests/intel-ci/fast-feedback.testlist b/tests/intel-ci/fast-feedback.testlist
index 40d273c1..8a191922 100644
--- a/tests/intel-ci/fast-feedback.testlist
+++ b/tests/intel-ci/fast-feedback.testlist
@@ -16,10 +16,10 @@ igt@gem_ctx_param@basic
igt@gem_ctx_param@basic-default
igt@gem_exec_basic@basic
igt@gem_exec_create@basic
-igt@gem_exec_fence@basic-busy-default
-igt@gem_exec_fence@basic-wait-default
-igt@gem_exec_fence@basic-await-default
-igt@gem_exec_fence@nb-await-default
+igt@gem_exec_fence@basic-busy
+igt@gem_exec_fence@basic-wait
+igt@gem_exec_fence@basic-await
+igt@gem_exec_fence@nb-await
igt@gem_exec_gttfill@basic
igt@gem_exec_parallel@basic
igt@gem_exec_parallel@contexts
--
2.25.0
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [igt-dev] ✗ GitLab.Pipeline: failure for tests/i915/gem_exec_fence:Added __for_each_physical_engine to utilize all available engines. (rev3)
2020-02-11 9:06 [igt-dev] [V3] [PATCH i-g-t][V3]tests/i915/gem_exec_fence:Added __for_each_physical_engine to utilize all available engines saigowth
@ 2020-02-11 9:28 ` Patchwork
2020-02-11 9:42 ` [igt-dev] ✓ Fi.CI.BAT: success " Patchwork
2020-02-13 9:53 ` [igt-dev] [V3] [PATCH i-g-t][V3]tests/i915/gem_exec_fence:Added __for_each_physical_engine to utilize all available engines Tvrtko Ursulin
2 siblings, 0 replies; 4+ messages in thread
From: Patchwork @ 2020-02-11 9:28 UTC (permalink / raw)
To: saigowth; +Cc: igt-dev
== Series Details ==
Series: tests/i915/gem_exec_fence:Added __for_each_physical_engine to utilize all available engines. (rev3)
URL : https://patchwork.freedesktop.org/series/72916/
State : failure
== Summary ==
ERROR! This series introduces new undocumented tests:
gem_exec_fence@await-hang
gem_exec_fence@basic-await
gem_exec_fence@basic-busy
gem_exec_fence@basic-wait
gem_exec_fence@busy-hang
gem_exec_fence@keep-in-fence
gem_exec_fence@nb-await
gem_exec_fence@nb-await-hang
gem_exec_fence@parallel
gem_exec_fence@wait-hang
Can you document them as per the requirement in the [CONTRIBUTING.md]?
[Documentation] has more details on how to do this.
Here are few examples:
https://gitlab.freedesktop.org/drm/igt-gpu-tools/commit/0316695d03aa46108296b27f3982ec93200c7a6e
https://gitlab.freedesktop.org/drm/igt-gpu-tools/commit/443cc658e1e6b492ee17bf4f4d891029eb7a205d
Thanks in advance!
[CONTRIBUTING.md]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/blob/master/CONTRIBUTING.md#L19
[Documentation]: https://drm.pages.freedesktop.org/igt-gpu-tools/igt-gpu-tools-Core.html#igt-describe
Other than that, pipeline status: SUCCESS.
see https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/pipelines/107150 for the overview.
== Logs ==
For more details see: https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/pipelines/107150
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 4+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for tests/i915/gem_exec_fence:Added __for_each_physical_engine to utilize all available engines. (rev3)
2020-02-11 9:06 [igt-dev] [V3] [PATCH i-g-t][V3]tests/i915/gem_exec_fence:Added __for_each_physical_engine to utilize all available engines saigowth
2020-02-11 9:28 ` [igt-dev] ✗ GitLab.Pipeline: failure for tests/i915/gem_exec_fence:Added __for_each_physical_engine to utilize all available engines. (rev3) Patchwork
@ 2020-02-11 9:42 ` Patchwork
2020-02-13 9:53 ` [igt-dev] [V3] [PATCH i-g-t][V3]tests/i915/gem_exec_fence:Added __for_each_physical_engine to utilize all available engines Tvrtko Ursulin
2 siblings, 0 replies; 4+ messages in thread
From: Patchwork @ 2020-02-11 9:42 UTC (permalink / raw)
To: saigowth; +Cc: igt-dev
== Series Details ==
Series: tests/i915/gem_exec_fence:Added __for_each_physical_engine to utilize all available engines. (rev3)
URL : https://patchwork.freedesktop.org/series/72916/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7905 -> IGTPW_4125
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4125/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_4125:
### IGT changes ###
#### Possible regressions ####
* {igt@gem_exec_fence@basic-await@bcs0} (NEW):
- fi-cml-u2: NOTRUN -> [SKIP][1] +3 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4125/fi-cml-u2/igt@gem_exec_fence@basic-await@bcs0.html
* {igt@gem_exec_fence@basic-wait@bcs0} (NEW):
- fi-cml-s: NOTRUN -> [SKIP][2] +3 similar issues
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4125/fi-cml-s/igt@gem_exec_fence@basic-wait@bcs0.html
New tests
---------
New tests have been introduced between CI_DRM_7905 and IGTPW_4125:
### New IGT tests (24) ###
* igt@gem_exec_fence@basic-await:
- Statuses : 3 skip(s)
- Exec time: [0.0] s
* igt@gem_exec_fence@basic-await@bcs0:
- Statuses : 14 pass(s) 18 skip(s)
- Exec time: [0.0, 0.15] s
* igt@gem_exec_fence@basic-await@rcs0:
- Statuses : 36 pass(s)
- Exec time: [0.06, 0.21] s
* igt@gem_exec_fence@basic-await@vcs0:
- Statuses : 34 pass(s)
- Exec time: [0.06, 0.19] s
* igt@gem_exec_fence@basic-await@vcs1:
- Statuses : 9 pass(s)
- Exec time: [0.06, 0.15] s
* igt@gem_exec_fence@basic-await@vecs0:
- Statuses : 30 pass(s)
- Exec time: [0.06, 0.18] s
* igt@gem_exec_fence@basic-busy:
- Statuses : 3 skip(s)
- Exec time: [0.0] s
* igt@gem_exec_fence@basic-busy@bcs0:
- Statuses : 14 pass(s) 18 skip(s)
- Exec time: [0.0, 0.02] s
* igt@gem_exec_fence@basic-busy@rcs0:
- Statuses : 36 pass(s)
- Exec time: [0.00, 0.03] s
* igt@gem_exec_fence@basic-busy@vcs0:
- Statuses : 34 pass(s)
- Exec time: [0.01, 0.02] s
* igt@gem_exec_fence@basic-busy@vcs1:
- Statuses : 9 pass(s)
- Exec time: [0.01, 0.02] s
* igt@gem_exec_fence@basic-busy@vecs0:
- Statuses : 30 pass(s)
- Exec time: [0.01, 0.02] s
* igt@gem_exec_fence@basic-wait:
- Statuses : 3 skip(s)
- Exec time: [0.0] s
* igt@gem_exec_fence@basic-wait@bcs0:
- Statuses : 14 pass(s) 18 skip(s)
- Exec time: [0.0, 0.02] s
* igt@gem_exec_fence@basic-wait@rcs0:
- Statuses : 36 pass(s)
- Exec time: [0.00, 0.03] s
* igt@gem_exec_fence@basic-wait@vcs0:
- Statuses : 34 pass(s)
- Exec time: [0.01, 0.03] s
* igt@gem_exec_fence@basic-wait@vcs1:
- Statuses : 9 pass(s)
- Exec time: [0.01, 0.02] s
* igt@gem_exec_fence@basic-wait@vecs0:
- Statuses : 30 pass(s)
- Exec time: [0.01, 0.02] s
* igt@gem_exec_fence@nb-await:
- Statuses : 3 skip(s)
- Exec time: [0.0] s
* igt@gem_exec_fence@nb-await@bcs0:
- Statuses : 14 pass(s) 18 skip(s)
- Exec time: [0.0, 0.07] s
* igt@gem_exec_fence@nb-await@rcs0:
- Statuses : 36 pass(s)
- Exec time: [0.05, 0.08] s
* igt@gem_exec_fence@nb-await@vcs0:
- Statuses : 34 pass(s)
- Exec time: [0.05, 0.07] s
* igt@gem_exec_fence@nb-await@vcs1:
- Statuses : 9 pass(s)
- Exec time: [0.05, 0.07] s
* igt@gem_exec_fence@nb-await@vecs0:
- Statuses : 30 pass(s)
- Exec time: [0.05, 0.07] s
Known issues
------------
Here are the changes found in IGTPW_4125 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_close_race@basic-threads:
- fi-hsw-4770: [PASS][3] -> [TIMEOUT][4] ([fdo#112271] / [i915#1084])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7905/fi-hsw-4770/igt@gem_close_race@basic-threads.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4125/fi-hsw-4770/igt@gem_close_race@basic-threads.html
* igt@i915_selftest@live_gem_contexts:
- fi-cml-s: [PASS][5] -> [DMESG-FAIL][6] ([i915#877])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7905/fi-cml-s/igt@i915_selftest@live_gem_contexts.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4125/fi-cml-s/igt@i915_selftest@live_gem_contexts.html
#### Possible fixes ####
* igt@gem_close_race@basic-threads:
- fi-byt-n2820: [INCOMPLETE][7] ([i915#45]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7905/fi-byt-n2820/igt@gem_close_race@basic-threads.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4125/fi-byt-n2820/igt@gem_close_race@basic-threads.html
* igt@i915_selftest@live_gem_contexts:
- fi-cfl-8700k: [INCOMPLETE][9] ([i915#424]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7905/fi-cfl-8700k/igt@i915_selftest@live_gem_contexts.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4125/fi-cfl-8700k/igt@i915_selftest@live_gem_contexts.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
[i915#1084]: https://gitlab.freedesktop.org/drm/intel/issues/1084
[i915#424]: https://gitlab.freedesktop.org/drm/intel/issues/424
[i915#45]: https://gitlab.freedesktop.org/drm/intel/issues/45
[i915#877]: https://gitlab.freedesktop.org/drm/intel/issues/877
Participating hosts (46 -> 40)
------------------------------
Additional (5): fi-glk-dsi fi-snb-2520m fi-skl-lmem fi-skl-6600u fi-kbl-r
Missing (11): fi-ilk-m540 fi-bdw-5557u fi-bsw-n3050 fi-byt-j1900 fi-skl-6770hq fi-hsw-4200u fi-hsw-peppy fi-byt-squawks fi-bwr-2160 fi-bsw-cyan fi-byt-clapper
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_5433 -> IGTPW_4125
CI-20190529: 20190529
CI_DRM_7905: db98da3dd757a19dbaaeaef8640276fe7be2fc4e @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_4125: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4125/index.html
IGT_5433: 6a96c17f3a1b4e1f90b1a0b0ce42a7219875d1a4 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
== Testlist changes ==
+igt@gem_exec_fence@await-hang
+igt@gem_exec_fence@basic-await
+igt@gem_exec_fence@basic-busy
+igt@gem_exec_fence@basic-wait
+igt@gem_exec_fence@busy-hang
+igt@gem_exec_fence@keep-in-fence
+igt@gem_exec_fence@nb-await
+igt@gem_exec_fence@nb-await-hang
+igt@gem_exec_fence@parallel
+igt@gem_exec_fence@wait-hang
-igt@gem_exec_fence@await-blt
-igt@gem_exec_fence@await-bsd
-igt@gem_exec_fence@await-bsd1
-igt@gem_exec_fence@await-bsd2
-igt@gem_exec_fence@await-hang-blt
-igt@gem_exec_fence@await-hang-bsd
-igt@gem_exec_fence@await-hang-bsd1
-igt@gem_exec_fence@await-hang-bsd2
-igt@gem_exec_fence@await-hang-default
-igt@gem_exec_fence@await-hang-render
-igt@gem_exec_fence@await-hang-vebox
-igt@gem_exec_fence@await-render
-igt@gem_exec_fence@await-vebox
-igt@gem_exec_fence@basic-await-default
-igt@gem_exec_fence@basic-busy-default
-igt@gem_exec_fence@basic-wait-default
-igt@gem_exec_fence@busy-blt
-igt@gem_exec_fence@busy-bsd
-igt@gem_exec_fence@busy-bsd1
-igt@gem_exec_fence@busy-bsd2
-igt@gem_exec_fence@busy-hang-blt
-igt@gem_exec_fence@busy-hang-bsd
-igt@gem_exec_fence@busy-hang-bsd1
-igt@gem_exec_fence@busy-hang-bsd2
-igt@gem_exec_fence@busy-hang-default
-igt@gem_exec_fence@busy-hang-render
-igt@gem_exec_fence@busy-hang-vebox
-igt@gem_exec_fence@busy-render
-igt@gem_exec_fence@busy-vebox
-igt@gem_exec_fence@keep-in-fence-blt
-igt@gem_exec_fence@keep-in-fence-bsd
-igt@gem_exec_fence@keep-in-fence-bsd1
-igt@gem_exec_fence@keep-in-fence-bsd2
-igt@gem_exec_fence@keep-in-fence-default
-igt@gem_exec_fence@keep-in-fence-render
-igt@gem_exec_fence@keep-in-fence-vebox
-igt@gem_exec_fence@nb-await-blt
-igt@gem_exec_fence@nb-await-bsd
-igt@gem_exec_fence@nb-await-bsd1
-igt@gem_exec_fence@nb-await-bsd2
-igt@gem_exec_fence@nb-await-default
-igt@gem_exec_fence@nb-await-hang-blt
-igt@gem_exec_fence@nb-await-hang-bsd
-igt@gem_exec_fence@nb-await-hang-bsd1
-igt@gem_exec_fence@nb-await-hang-bsd2
-igt@gem_exec_fence@nb-await-hang-default
-igt@gem_exec_fence@nb-await-hang-render
-igt@gem_exec_fence@nb-await-hang-vebox
-igt@gem_exec_fence@nb-await-render
-igt@gem_exec_fence@nb-await-vebox
-igt@gem_exec_fence@parallel-blt
-igt@gem_exec_fence@parallel-bsd1
-igt@gem_exec_fence@parallel-bsd2
-igt@gem_exec_fence@parallel-render
-igt@gem_exec_fence@parallel-vebox
-igt@gem_exec_fence@wait-blt
-igt@gem_exec_fence@wait-bsd
-igt@gem_exec_fence@wait-bsd1
-igt@gem_exec_fence@wait-bsd2
-igt@gem_exec_fence@wait-hang-blt
-igt@gem_exec_fence@wait-hang-bsd
-igt@gem_exec_fence@wait-hang-bsd1
-igt@gem_exec_fence@wait-hang-bsd2
-igt@gem_exec_fence@wait-hang-default
-igt@gem_exec_fence@wait-hang-render
-igt@gem_exec_fence@wait-hang-vebox
-igt@gem_exec_fence@wait-render
-igt@gem_exec_fence@wait-vebox
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4125/index.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [igt-dev] [V3] [PATCH i-g-t][V3]tests/i915/gem_exec_fence:Added __for_each_physical_engine to utilize all available engines.
2020-02-11 9:06 [igt-dev] [V3] [PATCH i-g-t][V3]tests/i915/gem_exec_fence:Added __for_each_physical_engine to utilize all available engines saigowth
2020-02-11 9:28 ` [igt-dev] ✗ GitLab.Pipeline: failure for tests/i915/gem_exec_fence:Added __for_each_physical_engine to utilize all available engines. (rev3) Patchwork
2020-02-11 9:42 ` [igt-dev] ✓ Fi.CI.BAT: success " Patchwork
@ 2020-02-13 9:53 ` Tvrtko Ursulin
2 siblings, 0 replies; 4+ messages in thread
From: Tvrtko Ursulin @ 2020-02-13 9:53 UTC (permalink / raw)
To: saigowth, igt-dev
On 11/02/2020 09:06, saigowth wrote:
> Replaced the legacy for_each_engine* defines with the ones implemented
> in the gem_engine_topology library.
1.
Do you also want to convert the test_long_history() subtest from
for_each_physical_engine to __for_each_physical_engine?
2.
test_fence_flip() is weird - I don't see why we wouldn't just remove it?
3.
Not important to do straight away, but next time you encounter tests
with a lot of repetitiveness around the dynamic subtests and engine
iteration blocks, you can perhaps consider the approach taken in
gem_ctx_persistence.c. Which is listing tests names, flags and vfuncs in
an array and then just iterating once. All that is needed is for test
functions prototypes to be compatible.
Regards,
Tvrtko
>
> V2
>
> Corrected subtest name in fast-feedback.testlist from,
> basic-busy-default --> basic-busy
> basic-wait-default --> basic-wait
> basi-await-deafult --> basic-await
> nb-await-default --> nb-await
>
> Signed-off-by: saigowth <sai.gowtham.ch@intel.com>
> Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
> ---
> tests/i915/gem_exec_fence.c | 204 ++++++++++++++++----------
> tests/intel-ci/fast-feedback.testlist | 8 +-
> 2 files changed, 127 insertions(+), 85 deletions(-)
>
> diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c
> index 6d369f58..36488ea7 100644
> --- a/tests/i915/gem_exec_fence.c
> +++ b/tests/i915/gem_exec_fence.c
> @@ -46,7 +46,8 @@ struct sync_merge_data {
> #define SYNC_IOC_MERGE _IOWR(SYNC_IOC_MAGIC, 3, struct sync_merge_data)
> #endif
>
> -static void store(int fd, unsigned ring, int fence, uint32_t target, unsigned offset_value)
> +static void store(int fd, const struct intel_execution_engine2 *e,
> + int fence, uint32_t target, unsigned offset_value)
> {
> const int SCRATCH = 0;
> const int BATCH = 1;
> @@ -60,7 +61,7 @@ static void store(int fd, unsigned ring, int fence, uint32_t target, unsigned of
> memset(&execbuf, 0, sizeof(execbuf));
> execbuf.buffers_ptr = to_user_pointer(obj);
> execbuf.buffer_count = 2;
> - execbuf.flags = ring | I915_EXEC_FENCE_IN;
> + execbuf.flags = e->flags | I915_EXEC_FENCE_IN;
> execbuf.rsvd2 = fence;
> if (gen < 6)
> execbuf.flags |= I915_EXEC_SECURE;
> @@ -108,7 +109,8 @@ static bool fence_busy(int fence)
> #define NONBLOCK 0x2
> #define WAIT 0x4
>
> -static void test_fence_busy(int fd, unsigned ring, unsigned flags)
> +static void test_fence_busy(int fd, const struct intel_execution_engine2 *e,
> + unsigned flags)
> {
> const int gen = intel_gen(intel_get_drm_devid(fd));
> struct drm_i915_gem_exec_object2 obj;
> @@ -119,14 +121,14 @@ static void test_fence_busy(int fd, unsigned ring, unsigned flags)
> int fence, i, timeout;
>
> if ((flags & HANG) == 0)
> - igt_require(gem_engine_has_mutable_submission(fd, ring));
> + igt_require(gem_class_has_mutable_submission(fd, e->class));
>
> gem_quiescent_gpu(fd);
>
> memset(&execbuf, 0, sizeof(execbuf));
> execbuf.buffers_ptr = to_user_pointer(&obj);
> execbuf.buffer_count = 1;
> - execbuf.flags = ring | I915_EXEC_FENCE_OUT;
> + execbuf.flags = e->flags | I915_EXEC_FENCE_OUT;
>
> memset(&obj, 0, sizeof(obj));
> obj.handle = gem_create(fd, 4096);
> @@ -205,6 +207,7 @@ static void test_fence_busy(int fd, unsigned ring, unsigned flags)
>
> static void test_fence_busy_all(int fd, unsigned flags)
> {
> + const struct intel_execution_engine2 *e;
> const int gen = intel_gen(intel_get_drm_devid(fd));
> struct drm_i915_gem_exec_object2 obj;
> struct drm_i915_gem_relocation_entry reloc;
> @@ -260,14 +263,14 @@ static void test_fence_busy_all(int fd, unsigned flags)
> i++;
>
> all = -1;
> - for_each_engine(e, fd) {
> + __for_each_physical_engine(fd, e) {
> int fence, new;
>
> if ((flags & HANG) == 0 &&
> - !gem_engine_has_mutable_submission(fd, eb_ring(e)))
> + !gem_class_has_mutable_submission(fd, e->class))
> continue;
>
> - execbuf.flags = eb_ring(e) | I915_EXEC_FENCE_OUT;
> + execbuf.flags = e->flags | I915_EXEC_FENCE_OUT;
> execbuf.rsvd2 = -1;
> gem_execbuf_wr(fd, &execbuf);
> fence = execbuf.rsvd2 >> 32;
> @@ -316,39 +319,41 @@ static void test_fence_busy_all(int fd, unsigned flags)
> gem_quiescent_gpu(fd);
> }
>
> -static void test_fence_await(int fd, unsigned ring, unsigned flags)
> +static void test_fence_await(int fd, const struct intel_execution_engine2 *e,
> + unsigned flags)
> {
> + const struct intel_execution_engine2 *e2;
> uint32_t scratch = gem_create(fd, 4096);
> igt_spin_t *spin;
> uint32_t *out;
> int i;
>
> if ((flags & HANG) == 0)
> - igt_require(gem_engine_has_mutable_submission(fd, ring));
> + igt_require(gem_class_has_mutable_submission(fd, e->class));
>
> - igt_require(gem_can_store_dword(fd, 0));
> + igt_require(gem_class_can_store_dword(fd, 0));
>
> out = gem_mmap__wc(fd, scratch, 0, 4096, PROT_WRITE);
> gem_set_domain(fd, scratch,
> I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
>
> spin = igt_spin_new(fd,
> - .engine = ring,
> + .engine = e->flags,
> .flags = (IGT_SPIN_FENCE_OUT |
> IGT_SPIN_NO_PREEMPTION |
> (flags & HANG ? IGT_SPIN_INVALID_CS : 0)));
> igt_assert(spin->out_fence != -1);
>
> i = 0;
> - for_each_physical_engine(e, fd) {
> - if (!gem_can_store_dword(fd, eb_ring(e)))
> + __for_each_physical_engine(fd, e2) {
> + if (!gem_class_can_store_dword(fd, e->class))
> continue;
>
> if (flags & NONBLOCK) {
> - store(fd, eb_ring(e), spin->out_fence, scratch, i);
> + store(fd, e2, spin->out_fence, scratch, i);
> } else {
> igt_fork(child, 1)
> - store(fd, eb_ring(e), spin->out_fence, scratch, i);
> + store(fd, e2, spin->out_fence, scratch, i);
> }
>
> i++;
> @@ -376,13 +381,14 @@ static void test_fence_await(int fd, unsigned ring, unsigned flags)
> gem_close(fd, scratch);
> }
>
> -static void resubmit(int fd, uint32_t handle, unsigned int ring, int count)
> +static void resubmit(int fd, uint32_t handle,
> + const struct intel_execution_engine2 *e, int count)
> {
> struct drm_i915_gem_exec_object2 obj = { .handle = handle };
> struct drm_i915_gem_execbuffer2 execbuf = {
> .buffers_ptr = to_user_pointer(&obj),
> .buffer_count = 1,
> - .flags = ring,
> + .flags = e->flags,
> };
> while (count--)
> gem_execbuf(fd, &execbuf);
> @@ -404,8 +410,9 @@ static int __execbuf(int fd, struct drm_i915_gem_execbuffer2 *execbuf)
> return err;
> }
>
> -static void test_parallel(int fd, unsigned int master)
> +static void test_parallel(int fd, const struct intel_execution_engine2 *e)
> {
> + const struct intel_execution_engine2 *e2;
> const int SCRATCH = 0;
> const int BATCH = 1;
> const int gen = intel_gen(intel_get_drm_devid(fd));
> @@ -426,14 +433,14 @@ static void test_parallel(int fd, unsigned int master)
> /* Fill the queue with many requests so that the next one has to
> * wait before it can be executed by the hardware.
> */
> - spin = igt_spin_new(fd, .engine = master, .dependency = plug);
> - resubmit(fd, spin->handle, master, 16);
> + spin = igt_spin_new(fd, .engine = e->flags, .dependency = plug);
> + resubmit(fd, spin->handle, e, 16);
>
> /* Now queue the master request and its secondaries */
> memset(&execbuf, 0, sizeof(execbuf));
> execbuf.buffers_ptr = to_user_pointer(obj);
> execbuf.buffer_count = 2;
> - execbuf.flags = master | I915_EXEC_FENCE_OUT;
> + execbuf.flags = e->flags | I915_EXEC_FENCE_OUT;
> if (gen < 6)
> execbuf.flags |= I915_EXEC_SECURE;
>
> @@ -502,11 +509,11 @@ static void test_parallel(int fd, unsigned int master)
> obj[BATCH].relocation_count = 1;
>
> /* Queue all secondaries */
> - for_each_physical_engine(e, fd) {
> - if (eb_ring(e) == master)
> + __for_each_physical_engine(fd, e2) {
> + if (e2->flags == e->flags)
> continue;
>
> - execbuf.flags = eb_ring(e) | I915_EXEC_FENCE_SUBMIT;
> + execbuf.flags = e2->flags | I915_EXEC_FENCE_SUBMIT;
> if (gen < 6)
> execbuf.flags |= I915_EXEC_SECURE;
>
> @@ -593,7 +600,7 @@ static inline uint32_t upper_32_bits(uint64_t x)
> return x >> 32;
> }
>
> -static void test_keep_in_fence(int fd, unsigned int engine, unsigned int flags)
> +static void test_keep_in_fence(int fd, const struct intel_execution_engine2 *e)
> {
> struct sigaction sa = { .sa_handler = alarm_handler };
> struct drm_i915_gem_exec_object2 obj = {
> @@ -602,14 +609,14 @@ static void test_keep_in_fence(int fd, unsigned int engine, unsigned int flags)
> struct drm_i915_gem_execbuffer2 execbuf = {
> .buffers_ptr = to_user_pointer(&obj),
> .buffer_count = 1,
> - .flags = engine | I915_EXEC_FENCE_OUT,
> + .flags = e->flags | I915_EXEC_FENCE_OUT,
> };
> unsigned long count, last;
> struct itimerval itv;
> igt_spin_t *spin;
> int fence;
>
> - spin = igt_spin_new(fd, .engine = engine);
> + spin = igt_spin_new(fd, .engine = e->flags);
>
> gem_execbuf_wr(fd, &execbuf);
> fence = upper_32_bits(execbuf.rsvd2);
> @@ -1373,7 +1380,7 @@ static void test_syncobj_channel(int fd)
>
> igt_main
> {
> - const struct intel_execution_engine *e;
> + const struct intel_execution_engine2 *e;
> int i915 = -1;
>
> igt_fixture {
> @@ -1412,69 +1419,105 @@ igt_main
> }
> }
>
> - for (e = intel_execution_engines; e->name; e++) {
> - igt_subtest_group {
> + igt_subtest_group {
> + __for_each_physical_engine(i915, e) {
> igt_fixture {
> - igt_require(gem_has_ring(i915, eb_ring(e)));
> - igt_require(gem_can_store_dword(i915, eb_ring(e)));
> + igt_require(gem_class_can_store_dword(i915, e->class));
> }
> + }
> + igt_subtest_group {
> + igt_fixture {
> + igt_fork_hang_detector(i915);
> + }
> + igt_subtest_with_dynamic("basic-busy") {
> + __for_each_physical_engine(i915, e) {
> + /* Requires master for STORE_DWORD on gen4/5 */
>
> - igt_subtest_group {
> - igt_fixture {
> - igt_fork_hang_detector(i915);
> + igt_dynamic_f("%s", e->name)
> + test_fence_busy(i915, e, 0);
> }
> -
> - igt_subtest_f("%sbusy-%s",
> - e->exec_id == 0 ? "basic-" : "",
> - e->name)
> - test_fence_busy(i915, eb_ring(e), 0);
> - igt_subtest_f("%swait-%s",
> - e->exec_id == 0 ? "basic-" : "",
> - e->name)
> - test_fence_busy(i915, eb_ring(e), WAIT);
> - igt_subtest_f("%sawait-%s",
> - e->exec_id == 0 ? "basic-" : "",
> - e->name)
> - test_fence_await(i915, eb_ring(e), 0);
> - igt_subtest_f("nb-await-%s", e->name)
> - test_fence_await(i915, eb_ring(e), NONBLOCK);
> -
> - igt_subtest_f("keep-in-fence-%s", e->name)
> - test_keep_in_fence(i915, eb_ring(e), 0);
> -
> - if (e->exec_id &&
> - !(e->exec_id == I915_EXEC_BSD && !e->flags)) {
> - igt_subtest_f("parallel-%s", e->name) {
> - igt_require(has_submit_fence(i915));
> - igt_until_timeout(2)
> - test_parallel(i915, eb_ring(e));
> - }
> + }
> + igt_subtest_with_dynamic("basic-wait") {
> + __for_each_physical_engine(i915, e) {
> + /* Requires master for STORE_DWORD on gen4/5 */
> + igt_dynamic_f("%s", e->name)
> + test_fence_busy(i915, e, WAIT);
> }
> -
> - igt_fixture {
> - igt_stop_hang_detector();
> + }
> + igt_subtest_with_dynamic("basic-await") {
> + __for_each_physical_engine(i915, e) {
> + /* Requires master for STORE_DWORD on gen4/5 */
> + igt_dynamic_f("%s", e->name)
> + test_fence_await(i915, e, 0);
> + }
> + }
> + igt_subtest_with_dynamic("nb-await") {
> + __for_each_physical_engine(i915, e) {
> + /* Requires master for STORE_DWORD on gen4/5 */
> + igt_dynamic_f("%s", e->name)
> + test_fence_await(i915,
> + e, NONBLOCK);
> + }
> + }
> + igt_subtest_with_dynamic("keep-in-fence") {
> + __for_each_physical_engine(i915, e) {
> + /* Requires master for STORE_DWORD on gen4/5 */
> + igt_dynamic_f("%s", e->name)
> + test_keep_in_fence(i915, e);
> + }
> + }
> + igt_subtest_with_dynamic("parallel") {
> + __for_each_physical_engine(i915, e) {
> + /* Requires master for STORE_DWORD on gen4/5 */
> + igt_dynamic_f("%s", e->name)
> + igt_require(has_submit_fence(i915));
> + igt_until_timeout(2)
> + test_parallel(i915, e);
> }
> }
>
> - igt_subtest_group {
> - igt_hang_t hang;
> + igt_fixture {
> + igt_stop_hang_detector();
> + }
> + }
>
> - igt_fixture {
> - hang = igt_allow_hang(i915, 0, 0);
> - }
> + igt_subtest_group {
> + igt_hang_t hang;
>
> - igt_subtest_f("busy-hang-%s", e->name)
> - test_fence_busy(i915, eb_ring(e), HANG);
> - igt_subtest_f("wait-hang-%s", e->name)
> - test_fence_busy(i915, eb_ring(e), HANG | WAIT);
> - igt_subtest_f("await-hang-%s", e->name)
> - test_fence_await(i915, eb_ring(e), HANG);
> - igt_subtest_f("nb-await-hang-%s", e->name)
> - test_fence_await(i915, eb_ring(e), NONBLOCK | HANG);
> - igt_fixture {
> - igt_disallow_hang(i915, hang);
> + igt_fixture {
> + hang = igt_allow_hang(i915, 0, 0);
> + }
> + igt_subtest_with_dynamic("busy-hang") {
> + __for_each_physical_engine(i915, e) {
> + /* Requires master for STORE_DWORD on gen4/5 */
> + igt_dynamic_f("%s", e->name)
> + test_fence_busy(i915, e, HANG);
> + }
> + }
> + igt_subtest_with_dynamic("wait-hang") {
> + __for_each_physical_engine(i915, e) {
> + /* Requires master for STORE_DWORD on gen4/5 */
> + igt_dynamic_f("%s", e->name)
> + test_fence_busy(i915, e, HANG | WAIT);
> + }
> + }
> + igt_subtest_with_dynamic("await-hang") {
> + __for_each_physical_engine(i915, e) {
> + /* Requires master for STORE_DWORD on gen4/5 */
> + igt_dynamic_f("%s", e->name)
> + test_fence_await(i915, e, HANG);
> + }
> + }
> + igt_subtest_with_dynamic("nb-await-hang") {
> + __for_each_physical_engine(i915, e) {
> + /* Requires master for STORE_DWORD on gen4/5 */
> + igt_dynamic_f("%s", e->name)
> + test_fence_await(i915, e, NONBLOCK | HANG);
> }
> }
> + igt_fixture {
> + igt_disallow_hang(i915, hang);
> + }
> }
> }
>
> @@ -1542,7 +1585,6 @@ igt_main
> igt_stop_hang_detector();
> }
> }
> -
> igt_fixture {
> close(i915);
> }
> diff --git a/tests/intel-ci/fast-feedback.testlist b/tests/intel-ci/fast-feedback.testlist
> index 40d273c1..8a191922 100644
> --- a/tests/intel-ci/fast-feedback.testlist
> +++ b/tests/intel-ci/fast-feedback.testlist
> @@ -16,10 +16,10 @@ igt@gem_ctx_param@basic
> igt@gem_ctx_param@basic-default
> igt@gem_exec_basic@basic
> igt@gem_exec_create@basic
> -igt@gem_exec_fence@basic-busy-default
> -igt@gem_exec_fence@basic-wait-default
> -igt@gem_exec_fence@basic-await-default
> -igt@gem_exec_fence@nb-await-default
> +igt@gem_exec_fence@basic-busy
> +igt@gem_exec_fence@basic-wait
> +igt@gem_exec_fence@basic-await
> +igt@gem_exec_fence@nb-await
> igt@gem_exec_gttfill@basic
> igt@gem_exec_parallel@basic
> igt@gem_exec_parallel@contexts
>
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2020-02-11 9:06 [igt-dev] [V3] [PATCH i-g-t][V3]tests/i915/gem_exec_fence:Added __for_each_physical_engine to utilize all available engines saigowth
2020-02-11 9:28 ` [igt-dev] ✗ GitLab.Pipeline: failure for tests/i915/gem_exec_fence:Added __for_each_physical_engine to utilize all available engines. (rev3) Patchwork
2020-02-11 9:42 ` [igt-dev] ✓ Fi.CI.BAT: success " Patchwork
2020-02-13 9:53 ` [igt-dev] [V3] [PATCH i-g-t][V3]tests/i915/gem_exec_fence:Added __for_each_physical_engine to utilize all available engines Tvrtko Ursulin
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