From: "Naladala, Ramanaidu" <Ramanaidu.naladala@intel.com>
To: <igt-dev@lists.freedesktop.org>
Subject: Re: [PATCH i-g-t 2/8] lib/intel_batchbuffer: make __intel_bb_create gt aware
Date: Sat, 18 Apr 2026 09:56:04 +0530 [thread overview]
Message-ID: <3ad90035-1f0e-4084-9042-ccbd00cbb644@intel.com> (raw)
In-Reply-To: <20260323162911.1912755-3-juhapekka.heikkila@gmail.com>
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Hi JP,
On 3/23/2026 9:59 PM, Juha-Pekka Heikkila wrote:
> add possibility to use gt id in __intel_bb_create
>
> Signed-off-by: Juha-Pekka Heikkila<juhapekka.heikkila@gmail.com>
> ---
> lib/intel_batchbuffer.c | 20 +++++++++++---------
> lib/intel_batchbuffer.h | 1 +
> 2 files changed, 12 insertions(+), 9 deletions(-)
>
> diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
> index b09506574..802e771a4 100644
> --- a/lib/intel_batchbuffer.c
> +++ b/lib/intel_batchbuffer.c
> @@ -905,7 +905,8 @@ static struct intel_bb *
> __intel_bb_create(int fd, uint32_t ctx, uint32_t vm, const intel_ctx_cfg_t *cfg,
> uint32_t size, bool do_relocs,
> uint64_t start, uint64_t end, uint64_t alignment,
> - uint8_t allocator_type, enum allocator_strategy strategy, uint64_t region)
> + uint8_t allocator_type, enum allocator_strategy strategy,
> + uint64_t region, uint16_t gt_id)
Update the function document with new argument.
> {
> struct drm_i915_gem_exec_object2 *object;
> struct intel_bb *ibb = calloc(1, sizeof(*ibb));
> @@ -915,6 +916,7 @@ __intel_bb_create(int fd, uint32_t ctx, uint32_t vm, const intel_ctx_cfg_t *cfg,
> ibb->devid = intel_get_drm_devid(fd);
> ibb->gen = intel_gen(ibb->devid);
> ibb->ctx = ctx;
> + ibb->gt_id = gt_id;
>
> ibb->fd = fd;
> ibb->driver = is_i915_device(fd) ? INTEL_DRIVER_I915 :
> @@ -1059,7 +1061,7 @@ struct intel_bb *intel_bb_create_full(int fd, uint32_t ctx, uint32_t vm,
> enum allocator_strategy strategy, uint64_t region)
> {
> return __intel_bb_create(fd, ctx, vm, cfg, size, false, start, end,
> - alignment, allocator_type, strategy, region);
> + alignment, allocator_type, strategy, region, 0);
> }
The code always uses the magic number |0| for |gt_id|. Since |gt_id| is
passed explicitly to support multi-tile dGPU configurations, could we
read and assign |gt_id| dynamically instead of assuming |GT 0|?
>
> /**
> @@ -1086,7 +1088,7 @@ struct intel_bb *intel_bb_create_with_allocator(int fd, uint32_t ctx, uint32_t v
> {
> return __intel_bb_create(fd, ctx, vm, cfg, size, false, 0, 0, 0,
> allocator_type, ALLOC_STRATEGY_HIGH_TO_LOW,
> - is_i915_device(fd) ? REGION_SMEM : vram_if_possible(fd, 0));
> + is_i915_device(fd) ? REGION_SMEM : vram_if_possible(fd, 0), 0);
> }
>
> static bool aux_needs_softpin(int fd)
> @@ -1128,7 +1130,7 @@ struct intel_bb *intel_bb_create(int fd, uint32_t size)
> relocs && !aux_needs_softpin(fd), 0, 0, 0,
> INTEL_ALLOCATOR_SIMPLE,
> ALLOC_STRATEGY_HIGH_TO_LOW,
> - is_i915 ? REGION_SMEM : vram_if_possible(fd, 0));
> + is_i915 ? REGION_SMEM : vram_if_possible(fd, 0), 0);
> }
>
> /**
> @@ -1157,7 +1159,7 @@ intel_bb_create_with_context(int fd, uint32_t ctx, uint32_t vm,
> relocs && !aux_needs_softpin(fd), 0, 0, 0,
> INTEL_ALLOCATOR_SIMPLE,
> ALLOC_STRATEGY_HIGH_TO_LOW,
> - is_i915 ? REGION_SMEM : vram_if_possible(fd, 0));
> + is_i915 ? REGION_SMEM : vram_if_possible(fd, 0), 0);
> }
>
> /**
> @@ -1184,7 +1186,7 @@ intel_bb_create_with_context_in_region(int fd, uint32_t ctx, uint32_t vm,
> return __intel_bb_create(fd, ctx, vm, cfg, size,
> relocs && !aux_needs_softpin(fd), 0, 0, 0,
> INTEL_ALLOCATOR_SIMPLE,
> - ALLOC_STRATEGY_HIGH_TO_LOW, region);
> + ALLOC_STRATEGY_HIGH_TO_LOW, region, 0);
> }
>
> /**
> @@ -1205,7 +1207,7 @@ struct intel_bb *intel_bb_create_with_relocs(int fd, uint32_t size)
>
> return __intel_bb_create(fd, 0, 0, NULL, size, true, 0, 0, 0,
> INTEL_ALLOCATOR_NONE, ALLOC_STRATEGY_NONE,
> - REGION_SMEM);
> + REGION_SMEM, 0);
> }
>
> /**
> @@ -1231,7 +1233,7 @@ intel_bb_create_with_relocs_and_context(int fd, uint32_t ctx,
>
> return __intel_bb_create(fd, ctx, 0, cfg, size, true, 0, 0, 0,
> INTEL_ALLOCATOR_NONE, ALLOC_STRATEGY_NONE,
> - REGION_SMEM);
> + REGION_SMEM, 0);
> }
>
> /**
> @@ -1256,7 +1258,7 @@ struct intel_bb *intel_bb_create_no_relocs(int fd, uint32_t size)
> return __intel_bb_create(fd, 0, 0, NULL, size, false, 0, 0, 0,
> INTEL_ALLOCATOR_SIMPLE,
> ALLOC_STRATEGY_HIGH_TO_LOW,
> - is_i915 ? REGION_SMEM : vram_if_possible(fd, 0));
> + is_i915 ? REGION_SMEM : vram_if_possible(fd, 0), 0);
> }
>
> static void __intel_bb_destroy_relocations(struct intel_bb *ibb)
> diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h
> index d0a7c8dc7..7049dd2d0 100644
> --- a/lib/intel_batchbuffer.h
> +++ b/lib/intel_batchbuffer.h
> @@ -269,6 +269,7 @@ struct intel_bb {
> struct igt_pxp pxp;
> uint32_t ctx;
> uint32_t vm_id;
> + uint16_t gt_id;
>
> bool xe_bound;
> uint32_t engine_syncobj;
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next prev parent reply other threads:[~2026-04-18 4:26 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-23 16:29 [PATCH i-g-t 0/8] Enable Vebox engine copy on Intel Xe driver Juha-Pekka Heikkila
2026-03-23 16:29 ` [PATCH i-g-t 1/8] lib: take out duplicate assert Juha-Pekka Heikkila
2026-03-23 16:29 ` [PATCH i-g-t 2/8] lib/intel_batchbuffer: make __intel_bb_create gt aware Juha-Pekka Heikkila
2026-04-18 4:26 ` Naladala, Ramanaidu [this message]
2026-03-23 16:29 ` [PATCH i-g-t 3/8] lib/xe: add xe_exec_queue_create_class_gt Juha-Pekka Heikkila
2026-04-19 14:52 ` Naladala, Ramanaidu
2026-03-23 16:29 ` [PATCH i-g-t 4/8] lib/intel_batchbuffer: add intel_bb_create_with_gt function Juha-Pekka Heikkila
2026-04-19 15:23 ` Naladala, Ramanaidu
2026-03-23 16:29 ` [PATCH i-g-t 5/8] lib/intel_batchbuffer: move engine class selection to helper Juha-Pekka Heikkila
2026-04-19 15:58 ` Naladala, Ramanaidu
2026-03-23 16:29 ` [PATCH i-g-t 6/8] lib/intel_batchbuffer/xe: add bb exec path to use specific engine and gt Juha-Pekka Heikkila
2026-04-19 18:43 ` Naladala, Ramanaidu
2026-03-23 16:29 ` [PATCH i-g-t 7/8] lib: Enable Vebox framebuffer copying on Intel Xe2 Juha-Pekka Heikkila
2026-04-13 12:50 ` Maarten Lankhorst
2026-03-23 16:29 ` [PATCH i-g-t 8/8] lib/igt_fb: on Intel Xe force Vebox copy on yuv formats Juha-Pekka Heikkila
2026-04-13 12:46 ` Maarten Lankhorst
2026-03-23 18:56 ` ✓ Xe.CI.BAT: success for Enable Vebox engine copy on Intel Xe driver (rev10) Patchwork
2026-03-23 19:03 ` ✗ i915.CI.BAT: failure " Patchwork
2026-03-24 2:14 ` ✗ Xe.CI.FULL: " Patchwork
2026-03-24 11:03 ` ✓ Xe.CI.BAT: success for Enable Vebox engine copy on Intel Xe driver (rev11) Patchwork
2026-03-24 11:18 ` ✓ i915.CI.BAT: " Patchwork
2026-03-24 17:59 ` ✗ i915.CI.Full: failure " Patchwork
2026-03-24 20:14 ` ✗ Xe.CI.FULL: " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2026-03-20 13:46 [PATCH i-g-t 0/8] Enable Vebox engine copy on Intel Xe driver Juha-Pekka Heikkila
2026-03-20 13:46 ` [PATCH i-g-t 2/8] lib/intel_batchbuffer: make __intel_bb_create gt aware Juha-Pekka Heikkila
2026-03-18 15:05 [PATCH i-g-t 0/8] Enable Vebox engine copy on Intel Xe driver Juha-Pekka Heikkila
2026-03-18 15:05 ` [PATCH i-g-t 2/8] lib/intel_batchbuffer: make __intel_bb_create gt aware Juha-Pekka Heikkila
2026-03-13 13:51 [PATCH i-g-t 0/8] Enable Vebox engine copy on Intel Xe driver Juha-Pekka Heikkila
2026-03-13 13:51 ` [PATCH i-g-t 2/8] lib/intel_batchbuffer: make __intel_bb_create gt aware Juha-Pekka Heikkila
2026-02-20 16:17 [PATCH i-g-t 0/8] Enable Vebox engine copy on Intel Xe driver Juha-Pekka Heikkila
2026-02-20 16:17 ` [PATCH i-g-t 2/8] lib/intel_batchbuffer: make __intel_bb_create gt aware Juha-Pekka Heikkila
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