* Re: [igt-dev] [PATCH i-g-t 1/2] lib/i915/gem_mman: Add coherent mmap api support with set domain
2020-02-18 0:17 ` [igt-dev] [PATCH i-g-t 1/2] lib/i915/gem_mman: Add coherent mmap api support with set domain Sreedhar Telukuntla
@ 2020-02-17 16:29 ` Chris Wilson
2020-02-18 3:53 ` Telukuntla, Sreedhar
2020-02-28 11:06 ` Tvrtko Ursulin
0 siblings, 2 replies; 8+ messages in thread
From: Chris Wilson @ 2020-02-17 16:29 UTC (permalink / raw)
To: Sreedhar Telukuntla, igt-dev; +Cc: Tvrtko Ursulin
Quoting Sreedhar Telukuntla (2020-02-18 00:17:09)
> gem_mmap__device_coherent_domain api maps buffer object and returns
> the memory domain to be used by the caller for subsequent set_domain
> call for cpu access.
>
> gem_mmap__device_coherent_sync api maps buffer object and also does
> set_domain to make the memory ready for cpu access.
>
> Signed-off-by: Sreedhar Telukuntla <sreedhar.telukuntla@intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
> lib/i915/gem_mman.c | 76 ++++++++++++++++++++++++++++++++++++++++++---
> lib/i915/gem_mman.h | 6 +++-
> 2 files changed, 77 insertions(+), 5 deletions(-)
>
> diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
> index 08ae6769..b8d20c07 100644
> --- a/lib/i915/gem_mman.c
> +++ b/lib/i915/gem_mman.c
> @@ -345,21 +345,25 @@ void *gem_mmap_offset__wc(int fd, uint32_t handle, uint64_t offset,
> * @offset: offset in the gem buffer of the mmap arena
> * @size: size of the mmap arena
> * @prot: memory protection bits as used by mmap()
> + * @domain: cache domain used for mmap
> *
> * Returns: A pointer to a block of linear device memory mapped into the
> * process with WC semantics. When no WC is available try to mmap using GGTT.
> */
> void *__gem_mmap__device_coherent(int fd, uint32_t handle, uint64_t offset,
> - uint64_t size, unsigned prot)
> + uint64_t size, unsigned prot, uint32_t *domain)
> {
> void *ptr = __gem_mmap_offset(fd, handle, offset, size, prot,
> I915_MMAP_OFFSET_WC);
> if (!ptr)
> ptr = __gem_mmap__wc(fd, handle, offset, size, prot);
>
> - if (!ptr)
> - ptr = __gem_mmap__gtt(fd, handle, size, prot);
> + *domain = I915_GEM_DOMAIN_WC;
>
> + if (!ptr) {
> + ptr = __gem_mmap__gtt(fd, handle, size, prot);
> + *domain = I915_GEM_DOMAIN_GTT;
> + }
> return ptr;
> }
>
> @@ -382,15 +386,79 @@ void *gem_mmap__device_coherent(int fd, uint32_t handle, uint64_t offset,
> uint64_t size, unsigned prot)
> {
> void *ptr;
> + uint32_t domain;
>
> igt_assert(offset == 0);
>
> - ptr = __gem_mmap__device_coherent(fd, handle, offset, size, prot);
> + ptr = __gem_mmap__device_coherent(fd, handle, offset, size, prot, &domain);
> igt_assert(ptr);
>
> return ptr;
> }
>
> +/**
> + * gem_mmap__device_coherent_domain:
> + * @fd: open i915 drm file descriptor
> + * @handle: gem buffer object handle
> + * @offset: offset in the gem buffer of the mmap arena
> + * @size: size of the mmap arena
> + * @prot: memory protection bits as used by mmap()
> + * @domain: memory domain to be used by the caller for set_domain after mmap
> + *
> + * Call __gem_mmap__device__coherent_domain(), asserts on fail.
> + * Offset argument passed in function call must be 0. In the future
> + * when driver will allow slice mapping of buffer object this restriction
> + * will be removed.
> + *
> + * Returns: A pointer to the created memory mapping.
> + */
> +void *gem_mmap__device_coherent_domain(int fd, uint32_t handle, uint64_t offset,
> + uint64_t size, unsigned prot, uint32_t *domain)
> +{
> + void *ptr;
> +
> + igt_assert(offset == 0);
> +
> + ptr = __gem_mmap__device_coherent(fd, handle, offset, size, prot, domain);
> + igt_assert(ptr);
> +
> + return ptr;
> +}
> +
> +/**
> + * gem_mmap__device_coherent_sync:
> + * @fd: open i915 drm file descriptor
> + * @handle: gem buffer object handle
> + * @offset: offset in the gem buffer of the mmap arena
> + * @size: size of the mmap arena
> + * @prot: memory protection bits as used by mmap()
> + *
> + * Call __gem_mmap__device__coherent_sync(), asserts on fail.
> + * Offset argument passed in function call must be 0. In the future
> + * when driver will allow slice mapping of buffer object this restriction
> + * will be removed.
> + *
> + * This function sets appropriate memory domain as well once the mapping is
> + * complete and makes the memory ready for cpu access
> + *
> + * Returns: A pointer to the created memory mapping.
> + */
> +void *gem_mmap__device_coherent_sync(int fd, uint32_t handle, uint64_t offset,
> + uint64_t size, unsigned prot)
> +{
> + void *ptr;
> + uint32_t domain;
> +
> + igt_assert(offset == 0);
> +
> + ptr = gem_mmap__device_coherent_domain(fd, handle, offset, size, prot, &domain);
> + igt_assert(ptr);
> +
> + gem_set_domain(fd, handle, domain, domain);
No. Read/write is important, especially when there are comments
indicating that the api is being subverted and abused.
-Chris
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^ permalink raw reply [flat|nested] 8+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for Introduce new apis for coherent mmap
2020-02-18 0:17 [igt-dev] [PATCH i-g-t 0/2] Introduce new apis for coherent mmap Sreedhar Telukuntla
@ 2020-02-17 19:56 ` Patchwork
2020-02-18 0:17 ` [igt-dev] [PATCH i-g-t 1/2] lib/i915/gem_mman: Add coherent mmap api support with set domain Sreedhar Telukuntla
` (2 subsequent siblings)
3 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2020-02-17 19:56 UTC (permalink / raw)
To: Sreedhar Telukuntla; +Cc: igt-dev
== Series Details ==
Series: Introduce new apis for coherent mmap
URL : https://patchwork.freedesktop.org/series/73543/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7957 -> IGTPW_4168
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/index.html
Known issues
------------
Here are the changes found in IGTPW_4168 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_close_race@basic-threads:
- fi-hsw-peppy: [PASS][1] -> [INCOMPLETE][2] ([i915#694] / [i915#816])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/fi-hsw-peppy/igt@gem_close_race@basic-threads.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/fi-hsw-peppy/igt@gem_close_race@basic-threads.html
- fi-byt-n2820: [PASS][3] -> [INCOMPLETE][4] ([i915#45])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/fi-byt-n2820/igt@gem_close_race@basic-threads.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/fi-byt-n2820/igt@gem_close_race@basic-threads.html
* igt@i915_selftest@live_gem_contexts:
- fi-cfl-8700k: [PASS][5] -> [DMESG-FAIL][6] ([i915#623])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/fi-cfl-8700k/igt@i915_selftest@live_gem_contexts.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/fi-cfl-8700k/igt@i915_selftest@live_gem_contexts.html
* igt@i915_selftest@live_hangcheck:
- fi-icl-dsi: [PASS][7] -> [INCOMPLETE][8] ([fdo#108569])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/fi-icl-dsi/igt@i915_selftest@live_hangcheck.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/fi-icl-dsi/igt@i915_selftest@live_hangcheck.html
#### Possible fixes ####
* igt@i915_selftest@live_gtt:
- fi-kbl-7500u: [TIMEOUT][9] ([fdo#112271]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/fi-kbl-7500u/igt@i915_selftest@live_gtt.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/fi-kbl-7500u/igt@i915_selftest@live_gtt.html
- fi-icl-u3: [TIMEOUT][11] ([fdo#112271]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/fi-icl-u3/igt@i915_selftest@live_gtt.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/fi-icl-u3/igt@i915_selftest@live_gtt.html
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
[i915#45]: https://gitlab.freedesktop.org/drm/intel/issues/45
[i915#623]: https://gitlab.freedesktop.org/drm/intel/issues/623
[i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694
[i915#816]: https://gitlab.freedesktop.org/drm/intel/issues/816
Participating hosts (46 -> 46)
------------------------------
Additional (6): fi-skl-6770hq fi-bdw-gvtdvm fi-cfl-8109u fi-bsw-kefka fi-skl-lmem fi-skl-6600u
Missing (6): fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_5445 -> IGTPW_4168
CI-20190529: 20190529
CI_DRM_7957: 3ceb00d5a5d62566c5979edcbf06df2c15b62b80 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_4168: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/index.html
IGT_5445: 21e523814d692978d6d04ba85eadd67fcbd88b7e @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/index.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 8+ messages in thread
* [igt-dev] [PATCH i-g-t 0/2] Introduce new apis for coherent mmap
@ 2020-02-18 0:17 Sreedhar Telukuntla
2020-02-17 19:56 ` [igt-dev] ✓ Fi.CI.BAT: success for " Patchwork
` (3 more replies)
0 siblings, 4 replies; 8+ messages in thread
From: Sreedhar Telukuntla @ 2020-02-18 0:17 UTC (permalink / raw)
To: igt-dev
This patch introduces two new coherent mmap functions for tests.
gem_mmap__device_coherent_domain api maps buffer object and returns
the memory domain to be used by the caller for subsequent set_domain
call for cpu access.
gem_mmap__device_coherent_sync api maps buffer object and also does
set_domain to make the memory ready for cpu access.
gem_ctx_shared tests were modified to use the new functions
Sreedhar Telukuntla (2):
lib/i915/gem_mman: Add coherent mmap api support with set domain
tests/i915/gem_ctx_shared: Use gem_mmap__device_coherent_sync api
lib/i915/gem_mman.c | 76 +++++++++++++++++++++++++++++++++++--
lib/i915/gem_mman.h | 6 ++-
tests/i915/gem_ctx_shared.c | 23 +++--------
3 files changed, 83 insertions(+), 22 deletions(-)
--
2.24.1
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 8+ messages in thread
* [igt-dev] [PATCH i-g-t 1/2] lib/i915/gem_mman: Add coherent mmap api support with set domain
2020-02-18 0:17 [igt-dev] [PATCH i-g-t 0/2] Introduce new apis for coherent mmap Sreedhar Telukuntla
2020-02-17 19:56 ` [igt-dev] ✓ Fi.CI.BAT: success for " Patchwork
@ 2020-02-18 0:17 ` Sreedhar Telukuntla
2020-02-17 16:29 ` Chris Wilson
2020-02-18 0:17 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_ctx_shared: Use gem_mmap__device_coherent_sync api Sreedhar Telukuntla
2020-02-19 11:02 ` [igt-dev] ✗ Fi.CI.IGT: failure for Introduce new apis for coherent mmap Patchwork
3 siblings, 1 reply; 8+ messages in thread
From: Sreedhar Telukuntla @ 2020-02-18 0:17 UTC (permalink / raw)
To: igt-dev; +Cc: Tvrtko Ursulin
gem_mmap__device_coherent_domain api maps buffer object and returns
the memory domain to be used by the caller for subsequent set_domain
call for cpu access.
gem_mmap__device_coherent_sync api maps buffer object and also does
set_domain to make the memory ready for cpu access.
Signed-off-by: Sreedhar Telukuntla <sreedhar.telukuntla@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
lib/i915/gem_mman.c | 76 ++++++++++++++++++++++++++++++++++++++++++---
lib/i915/gem_mman.h | 6 +++-
2 files changed, 77 insertions(+), 5 deletions(-)
diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
index 08ae6769..b8d20c07 100644
--- a/lib/i915/gem_mman.c
+++ b/lib/i915/gem_mman.c
@@ -345,21 +345,25 @@ void *gem_mmap_offset__wc(int fd, uint32_t handle, uint64_t offset,
* @offset: offset in the gem buffer of the mmap arena
* @size: size of the mmap arena
* @prot: memory protection bits as used by mmap()
+ * @domain: cache domain used for mmap
*
* Returns: A pointer to a block of linear device memory mapped into the
* process with WC semantics. When no WC is available try to mmap using GGTT.
*/
void *__gem_mmap__device_coherent(int fd, uint32_t handle, uint64_t offset,
- uint64_t size, unsigned prot)
+ uint64_t size, unsigned prot, uint32_t *domain)
{
void *ptr = __gem_mmap_offset(fd, handle, offset, size, prot,
I915_MMAP_OFFSET_WC);
if (!ptr)
ptr = __gem_mmap__wc(fd, handle, offset, size, prot);
- if (!ptr)
- ptr = __gem_mmap__gtt(fd, handle, size, prot);
+ *domain = I915_GEM_DOMAIN_WC;
+ if (!ptr) {
+ ptr = __gem_mmap__gtt(fd, handle, size, prot);
+ *domain = I915_GEM_DOMAIN_GTT;
+ }
return ptr;
}
@@ -382,15 +386,79 @@ void *gem_mmap__device_coherent(int fd, uint32_t handle, uint64_t offset,
uint64_t size, unsigned prot)
{
void *ptr;
+ uint32_t domain;
igt_assert(offset == 0);
- ptr = __gem_mmap__device_coherent(fd, handle, offset, size, prot);
+ ptr = __gem_mmap__device_coherent(fd, handle, offset, size, prot, &domain);
igt_assert(ptr);
return ptr;
}
+/**
+ * gem_mmap__device_coherent_domain:
+ * @fd: open i915 drm file descriptor
+ * @handle: gem buffer object handle
+ * @offset: offset in the gem buffer of the mmap arena
+ * @size: size of the mmap arena
+ * @prot: memory protection bits as used by mmap()
+ * @domain: memory domain to be used by the caller for set_domain after mmap
+ *
+ * Call __gem_mmap__device__coherent_domain(), asserts on fail.
+ * Offset argument passed in function call must be 0. In the future
+ * when driver will allow slice mapping of buffer object this restriction
+ * will be removed.
+ *
+ * Returns: A pointer to the created memory mapping.
+ */
+void *gem_mmap__device_coherent_domain(int fd, uint32_t handle, uint64_t offset,
+ uint64_t size, unsigned prot, uint32_t *domain)
+{
+ void *ptr;
+
+ igt_assert(offset == 0);
+
+ ptr = __gem_mmap__device_coherent(fd, handle, offset, size, prot, domain);
+ igt_assert(ptr);
+
+ return ptr;
+}
+
+/**
+ * gem_mmap__device_coherent_sync:
+ * @fd: open i915 drm file descriptor
+ * @handle: gem buffer object handle
+ * @offset: offset in the gem buffer of the mmap arena
+ * @size: size of the mmap arena
+ * @prot: memory protection bits as used by mmap()
+ *
+ * Call __gem_mmap__device__coherent_sync(), asserts on fail.
+ * Offset argument passed in function call must be 0. In the future
+ * when driver will allow slice mapping of buffer object this restriction
+ * will be removed.
+ *
+ * This function sets appropriate memory domain as well once the mapping is
+ * complete and makes the memory ready for cpu access
+ *
+ * Returns: A pointer to the created memory mapping.
+ */
+void *gem_mmap__device_coherent_sync(int fd, uint32_t handle, uint64_t offset,
+ uint64_t size, unsigned prot)
+{
+ void *ptr;
+ uint32_t domain;
+
+ igt_assert(offset == 0);
+
+ ptr = gem_mmap__device_coherent_domain(fd, handle, offset, size, prot, &domain);
+ igt_assert(ptr);
+
+ gem_set_domain(fd, handle, domain, domain);
+
+ return ptr;
+}
+
/**
* __gem_mmap__cpu:
* @fd: open i915 drm file descriptor
diff --git a/lib/i915/gem_mman.h b/lib/i915/gem_mman.h
index 4fc6a018..3b062498 100644
--- a/lib/i915/gem_mman.h
+++ b/lib/i915/gem_mman.h
@@ -39,6 +39,10 @@ void *gem_mmap_offset__wc(int fd, uint32_t handle, uint64_t offset,
uint64_t size, unsigned prot);
void *gem_mmap__device_coherent(int fd, uint32_t handle, uint64_t offset,
uint64_t size, unsigned prot);
+void *gem_mmap__device_coherent_domain(int fd, uint32_t handle, uint64_t offset,
+ uint64_t size, unsigned prot, uint32_t *domain);
+void *gem_mmap__device_coherent_sync(int fd, uint32_t handle, uint64_t offset,
+ uint64_t size, unsigned prot);
void *gem_mmap__cpu_coherent(int fd, uint32_t handle, uint64_t offset,
uint64_t size, unsigned prot);
@@ -58,7 +62,7 @@ void *__gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, un
void *__gem_mmap_offset__wc(int fd, uint32_t handle, uint64_t offset,
uint64_t size, unsigned prot);
void *__gem_mmap__device_coherent(int fd, uint32_t handle, uint64_t offset,
- uint64_t size, unsigned prot);
+ uint64_t size, unsigned prot, uint32_t *domain);
void *__gem_mmap_offset(int fd, uint32_t handle, uint64_t offset, uint64_t size,
unsigned int prot, uint64_t flags);
void *__gem_mmap__cpu_coherent(int fd, uint32_t handle, uint64_t offset,
--
2.24.1
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^ permalink raw reply related [flat|nested] 8+ messages in thread
* [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_ctx_shared: Use gem_mmap__device_coherent_sync api
2020-02-18 0:17 [igt-dev] [PATCH i-g-t 0/2] Introduce new apis for coherent mmap Sreedhar Telukuntla
2020-02-17 19:56 ` [igt-dev] ✓ Fi.CI.BAT: success for " Patchwork
2020-02-18 0:17 ` [igt-dev] [PATCH i-g-t 1/2] lib/i915/gem_mman: Add coherent mmap api support with set domain Sreedhar Telukuntla
@ 2020-02-18 0:17 ` Sreedhar Telukuntla
2020-02-19 11:02 ` [igt-dev] ✗ Fi.CI.IGT: failure for Introduce new apis for coherent mmap Patchwork
3 siblings, 0 replies; 8+ messages in thread
From: Sreedhar Telukuntla @ 2020-02-18 0:17 UTC (permalink / raw)
To: igt-dev; +Cc: Tvrtko Ursulin
Replace the existing gem_mmap__device_coherent and gem_set_domain
calls with the new api gem_mmap__device_coherent_sync which takes
care of setting the appropriate memory domain along with memory mapping
Signed-off-by: Sreedhar Telukuntla <sreedhar.telukuntla@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
tests/i915/gem_ctx_shared.c | 23 ++++++-----------------
1 file changed, 6 insertions(+), 17 deletions(-)
diff --git a/tests/i915/gem_ctx_shared.c b/tests/i915/gem_ctx_shared.c
index 820b96c1..d7d86bc5 100644
--- a/tests/i915/gem_ctx_shared.c
+++ b/tests/i915/gem_ctx_shared.c
@@ -214,9 +214,8 @@ static void exec_shared_gtt(int i915, unsigned int ring)
gem_close(i915, scratch);
scratch = gem_create(i915, 4096);
- s = gem_mmap__wc(i915, scratch, 0, 4096, PROT_WRITE);
+ s = gem_mmap__device_coherent_sync(i915, scratch, 0, 4096, PROT_WRITE);
- gem_set_domain(i915, scratch, I915_GEM_DOMAIN_WC, I915_GEM_DOMAIN_WC);
s[0] = bbe;
s[64] = bbe;
@@ -605,9 +604,7 @@ static void independent(int i915, unsigned ring, unsigned flags)
for (int i = 0; i < ARRAY_SIZE(priorities); i++) {
uint32_t *ptr;
- ptr = gem_mmap__device_coherent(i915, handle[i], 0, 4096, PROT_READ);
- gem_set_domain(i915, handle[i], /* no write hazard lies! */
- I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
+ ptr = gem_mmap__device_coherent_sync(i915, handle[i], 0, 4096, PROT_READ);
gem_close(i915, handle[i]);
handle[i] = ptr[TIMESTAMP];
@@ -650,9 +647,7 @@ static void reorder(int i915, unsigned ring, unsigned flags)
gem_context_destroy(i915, ctx[LO]);
gem_context_destroy(i915, ctx[HI]);
- ptr = gem_mmap__device_coherent(i915, scratch, 0, 4096, PROT_READ);
- gem_set_domain(i915, scratch, /* no write hazard lies! */
- I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
+ ptr = gem_mmap__device_coherent_sync(i915, scratch, 0, 4096, PROT_READ);
gem_close(i915, scratch);
if (flags & EQUAL) /* equal priority, result will be fifo */
@@ -705,17 +700,13 @@ static void promotion(int i915, unsigned ring)
gem_context_destroy(i915, ctx[LO]);
gem_context_destroy(i915, ctx[HI]);
- ptr = gem_mmap__device_coherent(i915, dep, 0, 4096, PROT_READ);
- gem_set_domain(i915, dep, /* no write hazard lies! */
- I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
+ ptr = gem_mmap__device_coherent_sync(i915, dep, 0, 4096, PROT_READ);
gem_close(i915, dep);
igt_assert_eq_u32(ptr[0], ctx[HI]);
munmap(ptr, 4096);
- ptr = gem_mmap__device_coherent(i915, result, 0, 4096, PROT_READ);
- gem_set_domain(i915, result, /* no write hazard lies! */
- I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
+ ptr = gem_mmap__device_coherent_sync(i915, result, 0, 4096, PROT_READ);
gem_close(i915, result);
igt_assert_eq_u32(ptr[0], ctx[NOISE]);
@@ -768,9 +759,7 @@ static void smoketest(int i915, unsigned ring, unsigned timeout)
}
igt_waitchildren();
- ptr = gem_mmap__device_coherent(i915, scratch, 0, 4096, PROT_READ);
- gem_set_domain(i915, scratch, /* no write hazard lies! */
- I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
+ ptr = gem_mmap__device_coherent_sync(i915, scratch, 0, 4096, PROT_READ);
gem_close(i915, scratch);
for (unsigned n = 0; n < ncpus; n++) {
--
2.24.1
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 1/2] lib/i915/gem_mman: Add coherent mmap api support with set domain
2020-02-17 16:29 ` Chris Wilson
@ 2020-02-18 3:53 ` Telukuntla, Sreedhar
2020-02-28 11:06 ` Tvrtko Ursulin
1 sibling, 0 replies; 8+ messages in thread
From: Telukuntla, Sreedhar @ 2020-02-18 3:53 UTC (permalink / raw)
To: Chris Wilson, igt-dev@lists.freedesktop.org; +Cc: Ursulin, Tvrtko
> -----Original Message-----
> From: Chris Wilson <chris@chris-wilson.co.uk>
> Sent: Monday, February 17, 2020 9:59 PM
> To: Telukuntla, Sreedhar <sreedhar.telukuntla@intel.com>; igt-
> dev@lists.freedesktop.org
> Cc: Ursulin, Tvrtko <tvrtko.ursulin@intel.com>
> Subject: Re: [igt-dev] [PATCH i-g-t 1/2] lib/i915/gem_mman: Add coherent
> mmap api support with set domain
>
> Quoting Sreedhar Telukuntla (2020-02-18 00:17:09)
> > gem_mmap__device_coherent_domain api maps buffer object and returns
> > the memory domain to be used by the caller for subsequent set_domain
> > call for cpu access.
> >
> > gem_mmap__device_coherent_sync api maps buffer object and also does
> > set_domain to make the memory ready for cpu access.
> >
> > Signed-off-by: Sreedhar Telukuntla <sreedhar.telukuntla@intel.com>
> > Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> > ---
> > lib/i915/gem_mman.c | 76
> > ++++++++++++++++++++++++++++++++++++++++++---
> > lib/i915/gem_mman.h | 6 +++-
> > 2 files changed, 77 insertions(+), 5 deletions(-)
> >
> > diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c index
> > 08ae6769..b8d20c07 100644
> > --- a/lib/i915/gem_mman.c
> > +++ b/lib/i915/gem_mman.c
> > @@ -345,21 +345,25 @@ void *gem_mmap_offset__wc(int fd, uint32_t
> handle, uint64_t offset,
> > * @offset: offset in the gem buffer of the mmap arena
> > * @size: size of the mmap arena
> > * @prot: memory protection bits as used by mmap()
> > + * @domain: cache domain used for mmap
> > *
> > * Returns: A pointer to a block of linear device memory mapped into the
> > * process with WC semantics. When no WC is available try to mmap using
> GGTT.
> > */
> > void *__gem_mmap__device_coherent(int fd, uint32_t handle, uint64_t
> offset,
> > - uint64_t size, unsigned prot)
> > + uint64_t size, unsigned prot,
> > + uint32_t *domain)
> > {
> > void *ptr = __gem_mmap_offset(fd, handle, offset, size, prot,
> > I915_MMAP_OFFSET_WC);
> > if (!ptr)
> > ptr = __gem_mmap__wc(fd, handle, offset, size, prot);
> >
> > - if (!ptr)
> > - ptr = __gem_mmap__gtt(fd, handle, size, prot);
> > + *domain = I915_GEM_DOMAIN_WC;
> >
> > + if (!ptr) {
> > + ptr = __gem_mmap__gtt(fd, handle, size, prot);
> > + *domain = I915_GEM_DOMAIN_GTT;
> > + }
> > return ptr;
> > }
> >
> > @@ -382,15 +386,79 @@ void *gem_mmap__device_coherent(int fd,
> uint32_t handle, uint64_t offset,
> > uint64_t size, unsigned prot) {
> > void *ptr;
> > + uint32_t domain;
> >
> > igt_assert(offset == 0);
> >
> > - ptr = __gem_mmap__device_coherent(fd, handle, offset, size, prot);
> > + ptr = __gem_mmap__device_coherent(fd, handle, offset, size,
> > + prot, &domain);
> > igt_assert(ptr);
> >
> > return ptr;
> > }
> >
> > +/**
> > + * gem_mmap__device_coherent_domain:
> > + * @fd: open i915 drm file descriptor
> > + * @handle: gem buffer object handle
> > + * @offset: offset in the gem buffer of the mmap arena
> > + * @size: size of the mmap arena
> > + * @prot: memory protection bits as used by mmap()
> > + * @domain: memory domain to be used by the caller for set_domain
> > +after mmap
> > + *
> > + * Call __gem_mmap__device__coherent_domain(), asserts on fail.
> > + * Offset argument passed in function call must be 0. In the future
> > + * when driver will allow slice mapping of buffer object this
> > +restriction
> > + * will be removed.
> > + *
> > + * Returns: A pointer to the created memory mapping.
> > + */
> > +void *gem_mmap__device_coherent_domain(int fd, uint32_t handle,
> uint64_t offset,
> > + uint64_t size, unsigned prot, uint32_t
> > +*domain) {
> > + void *ptr;
> > +
> > + igt_assert(offset == 0);
> > +
> > + ptr = __gem_mmap__device_coherent(fd, handle, offset, size, prot,
> domain);
> > + igt_assert(ptr);
> > +
> > + return ptr;
> > +}
> > +
> > +/**
> > + * gem_mmap__device_coherent_sync:
> > + * @fd: open i915 drm file descriptor
> > + * @handle: gem buffer object handle
> > + * @offset: offset in the gem buffer of the mmap arena
> > + * @size: size of the mmap arena
> > + * @prot: memory protection bits as used by mmap()
> > + *
> > + * Call __gem_mmap__device__coherent_sync(), asserts on fail.
> > + * Offset argument passed in function call must be 0. In the future
> > + * when driver will allow slice mapping of buffer object this
> > +restriction
> > + * will be removed.
> > + *
> > + * This function sets appropriate memory domain as well once the
> > +mapping is
> > + * complete and makes the memory ready for cpu access
> > + *
> > + * Returns: A pointer to the created memory mapping.
> > + */
> > +void *gem_mmap__device_coherent_sync(int fd, uint32_t handle, uint64_t
> offset,
> > + uint64_t size, unsigned prot) {
> > + void *ptr;
> > + uint32_t domain;
> > +
> > + igt_assert(offset == 0);
> > +
> > + ptr = gem_mmap__device_coherent_domain(fd, handle, offset, size,
> prot, &domain);
> > + igt_assert(ptr);
> > +
> > + gem_set_domain(fd, handle, domain, domain);
>
> No. Read/write is important, especially when there are comments indicating
> that the api is being subverted and abused.
I didn’t understand your comment. Is it about read/write domain usage here? Are you suggesting not to use gem_set_domain in this way?
Regards,
Sreedhar
> -Chris
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 8+ messages in thread
* [igt-dev] ✗ Fi.CI.IGT: failure for Introduce new apis for coherent mmap
2020-02-18 0:17 [igt-dev] [PATCH i-g-t 0/2] Introduce new apis for coherent mmap Sreedhar Telukuntla
` (2 preceding siblings ...)
2020-02-18 0:17 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_ctx_shared: Use gem_mmap__device_coherent_sync api Sreedhar Telukuntla
@ 2020-02-19 11:02 ` Patchwork
3 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2020-02-19 11:02 UTC (permalink / raw)
To: Telukuntla, Sreedhar; +Cc: igt-dev
== Series Details ==
Series: Introduce new apis for coherent mmap
URL : https://patchwork.freedesktop.org/series/73543/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7957_full -> IGTPW_4168_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with IGTPW_4168_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_4168_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_4168_full:
### IGT changes ###
#### Possible regressions ####
* igt@fbdev@mmap:
- shard-tglb: [PASS][1] -> [SKIP][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-tglb5/igt@fbdev@mmap.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-tglb3/igt@fbdev@mmap.html
- shard-iclb: [PASS][3] -> [SKIP][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-iclb3/igt@fbdev@mmap.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-iclb7/igt@fbdev@mmap.html
Known issues
------------
Here are the changes found in IGTPW_4168_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@fbdev@mmap:
- shard-apl: [PASS][5] -> [SKIP][6] ([fdo#109271])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-apl6/igt@fbdev@mmap.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-apl2/igt@fbdev@mmap.html
- shard-glk: [PASS][7] -> [SKIP][8] ([fdo#109271])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-glk2/igt@fbdev@mmap.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-glk3/igt@fbdev@mmap.html
- shard-hsw: [PASS][9] -> [SKIP][10] ([fdo#109271])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-hsw7/igt@fbdev@mmap.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-hsw6/igt@fbdev@mmap.html
- shard-kbl: [PASS][11] -> [SKIP][12] ([fdo#109271])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-kbl1/igt@fbdev@mmap.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-kbl2/igt@fbdev@mmap.html
* igt@gem_ctx_isolation@rcs0-s3:
- shard-kbl: [PASS][13] -> [DMESG-WARN][14] ([i915#180]) +4 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-kbl1/igt@gem_ctx_isolation@rcs0-s3.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-kbl4/igt@gem_ctx_isolation@rcs0-s3.html
* igt@gem_exec_schedule@fifo-bsd1:
- shard-iclb: [PASS][15] -> [SKIP][16] ([fdo#109276]) +14 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-iclb2/igt@gem_exec_schedule@fifo-bsd1.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-iclb8/igt@gem_exec_schedule@fifo-bsd1.html
* igt@gem_exec_schedule@preempt-other-chain-bsd:
- shard-iclb: [PASS][17] -> [SKIP][18] ([fdo#112146]) +5 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-iclb3/igt@gem_exec_schedule@preempt-other-chain-bsd.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-iclb1/igt@gem_exec_schedule@preempt-other-chain-bsd.html
* igt@i915_pm_rpm@modeset-stress-extra-wait:
- shard-glk: [PASS][19] -> [DMESG-WARN][20] ([i915#118] / [i915#95])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-glk7/igt@i915_pm_rpm@modeset-stress-extra-wait.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-glk8/igt@i915_pm_rpm@modeset-stress-extra-wait.html
* igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-pipe-c:
- shard-hsw: [PASS][21] -> [INCOMPLETE][22] ([i915#61])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-hsw6/igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-pipe-c.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-hsw7/igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-pipe-c.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-apl: [PASS][23] -> [DMESG-WARN][24] ([i915#180]) +3 similar issues
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-apl6/igt@kms_frontbuffer_tracking@fbc-suspend.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-apl7/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@perf_pmu@busy-no-semaphores-vcs1:
- shard-iclb: [PASS][25] -> [SKIP][26] ([fdo#112080]) +9 similar issues
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-iclb1/igt@perf_pmu@busy-no-semaphores-vcs1.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-iclb6/igt@perf_pmu@busy-no-semaphores-vcs1.html
* igt@prime_mmap_coherency@ioctl-errors:
- shard-hsw: [PASS][27] -> [FAIL][28] ([i915#831])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-hsw1/igt@prime_mmap_coherency@ioctl-errors.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-hsw6/igt@prime_mmap_coherency@ioctl-errors.html
#### Possible fixes ####
* igt@gem_busy@busy-vcs1:
- shard-iclb: [SKIP][29] ([fdo#112080]) -> [PASS][30] +15 similar issues
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-iclb6/igt@gem_busy@busy-vcs1.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-iclb4/igt@gem_busy@busy-vcs1.html
* igt@gem_busy@close-race:
- shard-tglb: [INCOMPLETE][31] ([i915#977]) -> [PASS][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-tglb7/igt@gem_busy@close-race.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-tglb2/igt@gem_busy@close-race.html
* {igt@gem_ctx_persistence@close-replace-race}:
- shard-tglb: [FAIL][33] ([i915#1241]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-tglb6/igt@gem_ctx_persistence@close-replace-race.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-tglb2/igt@gem_ctx_persistence@close-replace-race.html
* igt@gem_exec_schedule@pi-userfault-bsd:
- shard-iclb: [SKIP][35] ([i915#677]) -> [PASS][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-iclb4/igt@gem_exec_schedule@pi-userfault-bsd.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-iclb5/igt@gem_exec_schedule@pi-userfault-bsd.html
* igt@gem_exec_schedule@wide-bsd:
- shard-iclb: [SKIP][37] ([fdo#112146]) -> [PASS][38] +4 similar issues
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-iclb4/igt@gem_exec_schedule@wide-bsd.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-iclb5/igt@gem_exec_schedule@wide-bsd.html
* igt@gem_partial_pwrite_pread@writes-after-reads-uncached:
- shard-hsw: [FAIL][39] ([i915#694]) -> [PASS][40] +1 similar issue
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-hsw5/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-hsw8/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html
* igt@gem_ppgtt@flink-and-close-vma-leak:
- shard-glk: [FAIL][41] ([i915#644]) -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-glk2/igt@gem_ppgtt@flink-and-close-vma-leak.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-glk1/igt@gem_ppgtt@flink-and-close-vma-leak.html
- shard-kbl: [FAIL][43] ([i915#644]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-kbl1/igt@gem_ppgtt@flink-and-close-vma-leak.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-kbl7/igt@gem_ppgtt@flink-and-close-vma-leak.html
* igt@gem_vm_create@isolation:
- shard-glk: [FAIL][45] -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-glk4/igt@gem_vm_create@isolation.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-glk4/igt@gem_vm_create@isolation.html
* igt@i915_pm_rps@waitboost:
- shard-tglb: [FAIL][47] ([i915#413]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-tglb8/igt@i915_pm_rps@waitboost.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-tglb3/igt@i915_pm_rps@waitboost.html
- shard-iclb: [FAIL][49] ([i915#413]) -> [PASS][50]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-iclb6/igt@i915_pm_rps@waitboost.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-iclb4/igt@i915_pm_rps@waitboost.html
* igt@kms_cursor_crc@pipe-a-cursor-suspend:
- shard-kbl: [DMESG-WARN][51] ([i915#180]) -> [PASS][52] +6 similar issues
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-kbl6/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-kbl4/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
* igt@kms_flip@flip-vs-suspend:
- shard-kbl: [DMESG-WARN][53] ([i915#180] / [i915#56]) -> [PASS][54]
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-kbl6/igt@kms_flip@flip-vs-suspend.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-kbl1/igt@kms_flip@flip-vs-suspend.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-apl: [DMESG-WARN][55] ([i915#180]) -> [PASS][56] +4 similar issues
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-apl1/igt@kms_flip@flip-vs-suspend-interruptible.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-apl4/igt@kms_flip@flip-vs-suspend-interruptible.html
- shard-hsw: [INCOMPLETE][57] ([i915#61]) -> [PASS][58]
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-hsw5/igt@kms_flip@flip-vs-suspend-interruptible.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-hsw7/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-plflip-blt:
- shard-glk: [FAIL][59] ([i915#49]) -> [PASS][60]
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-glk8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-plflip-blt.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-glk8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@psr-modesetfrombusy:
- shard-tglb: [SKIP][61] ([i915#668]) -> [PASS][62] +4 similar issues
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-tglb1/igt@kms_frontbuffer_tracking@psr-modesetfrombusy.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-tglb6/igt@kms_frontbuffer_tracking@psr-modesetfrombusy.html
* igt@kms_psr@no_drrs:
- shard-iclb: [FAIL][63] ([i915#173]) -> [PASS][64]
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-iclb1/igt@kms_psr@no_drrs.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-iclb6/igt@kms_psr@no_drrs.html
* igt@kms_psr@psr2_primary_page_flip:
- shard-iclb: [SKIP][65] ([fdo#109441]) -> [PASS][66] +1 similar issue
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-iclb7/igt@kms_psr@psr2_primary_page_flip.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-iclb2/igt@kms_psr@psr2_primary_page_flip.html
* igt@prime_busy@hang-bsd2:
- shard-iclb: [SKIP][67] ([fdo#109276]) -> [PASS][68] +13 similar issues
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-iclb8/igt@prime_busy@hang-bsd2.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-iclb1/igt@prime_busy@hang-bsd2.html
#### Warnings ####
* igt@gem_tiled_blits@interruptible:
- shard-hsw: [FAIL][69] ([i915#694]) -> [FAIL][70] ([i915#818])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-hsw6/igt@gem_tiled_blits@interruptible.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-hsw2/igt@gem_tiled_blits@interruptible.html
* igt@gem_tiled_blits@normal:
- shard-hsw: [FAIL][71] ([i915#818]) -> [FAIL][72] ([i915#694])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-hsw2/igt@gem_tiled_blits@normal.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-hsw8/igt@gem_tiled_blits@normal.html
* igt@gem_userptr_blits@dmabuf-unsync:
- shard-snb: [DMESG-WARN][73] ([fdo#110789] / [fdo#111870] / [i915#478]) -> [DMESG-WARN][74] ([fdo#111870] / [i915#478])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7957/shard-snb6/igt@gem_userptr_blits@dmabuf-unsync.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/shard-snb1/igt@gem_userptr_blits@dmabuf-unsync.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#110789]: https://bugs.freedesktop.org/show_bug.cgi?id=110789
[fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870
[fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
[fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
[i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
[i915#1241]: https://gitlab.freedesktop.org/drm/intel/issues/1241
[i915#173]: https://gitlab.freedesktop.org/drm/intel/issues/173
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#413]: https://gitlab.freedesktop.org/drm/intel/issues/413
[i915#478]: https://gitlab.freedesktop.org/drm/intel/issues/478
[i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
[i915#56]: https://gitlab.freedesktop.org/drm/intel/issues/56
[i915#61]: https://gitlab.freedesktop.org/drm/intel/issues/61
[i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644
[i915#668]: https://gitlab.freedesktop.org/drm/intel/issues/668
[i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
[i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694
[i915#818]: https://gitlab.freedesktop.org/drm/intel/issues/818
[i915#831]: https://gitlab.freedesktop.org/drm/intel/issues/831
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
[i915#977]: https://gitlab.freedesktop.org/drm/intel/issues/977
Participating hosts (10 -> 8)
------------------------------
Missing (2): pig-skl-6260u pig-glk-j5005
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_5445 -> IGTPW_4168
* Piglit: piglit_4509 -> None
CI-20190529: 20190529
CI_DRM_7957: 3ceb00d5a5d62566c5979edcbf06df2c15b62b80 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_4168: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/index.html
IGT_5445: 21e523814d692978d6d04ba85eadd67fcbd88b7e @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4168/index.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 1/2] lib/i915/gem_mman: Add coherent mmap api support with set domain
2020-02-17 16:29 ` Chris Wilson
2020-02-18 3:53 ` Telukuntla, Sreedhar
@ 2020-02-28 11:06 ` Tvrtko Ursulin
1 sibling, 0 replies; 8+ messages in thread
From: Tvrtko Ursulin @ 2020-02-28 11:06 UTC (permalink / raw)
To: Chris Wilson, Sreedhar Telukuntla, igt-dev; +Cc: Tvrtko Ursulin
On 17/02/2020 16:29, Chris Wilson wrote:
> Quoting Sreedhar Telukuntla (2020-02-18 00:17:09)
>> gem_mmap__device_coherent_domain api maps buffer object and returns
>> the memory domain to be used by the caller for subsequent set_domain
>> call for cpu access.
>>
>> gem_mmap__device_coherent_sync api maps buffer object and also does
>> set_domain to make the memory ready for cpu access.
>>
>> Signed-off-by: Sreedhar Telukuntla <sreedhar.telukuntla@intel.com>
>> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>> ---
>> lib/i915/gem_mman.c | 76 ++++++++++++++++++++++++++++++++++++++++++---
>> lib/i915/gem_mman.h | 6 +++-
>> 2 files changed, 77 insertions(+), 5 deletions(-)
>>
>> diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
>> index 08ae6769..b8d20c07 100644
>> --- a/lib/i915/gem_mman.c
>> +++ b/lib/i915/gem_mman.c
>> @@ -345,21 +345,25 @@ void *gem_mmap_offset__wc(int fd, uint32_t handle, uint64_t offset,
>> * @offset: offset in the gem buffer of the mmap arena
>> * @size: size of the mmap arena
>> * @prot: memory protection bits as used by mmap()
>> + * @domain: cache domain used for mmap
>> *
>> * Returns: A pointer to a block of linear device memory mapped into the
>> * process with WC semantics. When no WC is available try to mmap using GGTT.
>> */
>> void *__gem_mmap__device_coherent(int fd, uint32_t handle, uint64_t offset,
>> - uint64_t size, unsigned prot)
>> + uint64_t size, unsigned prot, uint32_t *domain)
>> {
>> void *ptr = __gem_mmap_offset(fd, handle, offset, size, prot,
>> I915_MMAP_OFFSET_WC);
>> if (!ptr)
>> ptr = __gem_mmap__wc(fd, handle, offset, size, prot);
>>
>> - if (!ptr)
>> - ptr = __gem_mmap__gtt(fd, handle, size, prot);
>> + *domain = I915_GEM_DOMAIN_WC;
>>
>> + if (!ptr) {
>> + ptr = __gem_mmap__gtt(fd, handle, size, prot);
>> + *domain = I915_GEM_DOMAIN_GTT;
>> + }
>> return ptr;
>> }
>>
>> @@ -382,15 +386,79 @@ void *gem_mmap__device_coherent(int fd, uint32_t handle, uint64_t offset,
>> uint64_t size, unsigned prot)
>> {
>> void *ptr;
>> + uint32_t domain;
>>
>> igt_assert(offset == 0);
>>
>> - ptr = __gem_mmap__device_coherent(fd, handle, offset, size, prot);
>> + ptr = __gem_mmap__device_coherent(fd, handle, offset, size, prot, &domain);
>> igt_assert(ptr);
>>
>> return ptr;
>> }
>>
>> +/**
>> + * gem_mmap__device_coherent_domain:
>> + * @fd: open i915 drm file descriptor
>> + * @handle: gem buffer object handle
>> + * @offset: offset in the gem buffer of the mmap arena
>> + * @size: size of the mmap arena
>> + * @prot: memory protection bits as used by mmap()
>> + * @domain: memory domain to be used by the caller for set_domain after mmap
>> + *
>> + * Call __gem_mmap__device__coherent_domain(), asserts on fail.
>> + * Offset argument passed in function call must be 0. In the future
>> + * when driver will allow slice mapping of buffer object this restriction
>> + * will be removed.
>> + *
>> + * Returns: A pointer to the created memory mapping.
>> + */
>> +void *gem_mmap__device_coherent_domain(int fd, uint32_t handle, uint64_t offset,
>> + uint64_t size, unsigned prot, uint32_t *domain)
>> +{
>> + void *ptr;
>> +
>> + igt_assert(offset == 0);
>> +
>> + ptr = __gem_mmap__device_coherent(fd, handle, offset, size, prot, domain);
>> + igt_assert(ptr);
>> +
>> + return ptr;
>> +}
>> +
>> +/**
>> + * gem_mmap__device_coherent_sync:
>> + * @fd: open i915 drm file descriptor
>> + * @handle: gem buffer object handle
>> + * @offset: offset in the gem buffer of the mmap arena
>> + * @size: size of the mmap arena
>> + * @prot: memory protection bits as used by mmap()
>> + *
>> + * Call __gem_mmap__device__coherent_sync(), asserts on fail.
>> + * Offset argument passed in function call must be 0. In the future
>> + * when driver will allow slice mapping of buffer object this restriction
>> + * will be removed.
>> + *
>> + * This function sets appropriate memory domain as well once the mapping is
>> + * complete and makes the memory ready for cpu access
>> + *
>> + * Returns: A pointer to the created memory mapping.
>> + */
>> +void *gem_mmap__device_coherent_sync(int fd, uint32_t handle, uint64_t offset,
>> + uint64_t size, unsigned prot)
>> +{
>> + void *ptr;
>> + uint32_t domain;
>> +
>> + igt_assert(offset == 0);
>> +
>> + ptr = gem_mmap__device_coherent_domain(fd, handle, offset, size, prot, &domain);
>> + igt_assert(ptr);
>> +
>> + gem_set_domain(fd, handle, domain, domain);
>
> No. Read/write is important, especially when there are comments
> indicating that the api is being subverted and abused.
Are you suggesting looking at prot & PROT_READ / PROT_WRITE to decide on
read/write domains?
Regards,
Tvrtko
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2020-02-28 11:06 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2020-02-18 0:17 [igt-dev] [PATCH i-g-t 0/2] Introduce new apis for coherent mmap Sreedhar Telukuntla
2020-02-17 19:56 ` [igt-dev] ✓ Fi.CI.BAT: success for " Patchwork
2020-02-18 0:17 ` [igt-dev] [PATCH i-g-t 1/2] lib/i915/gem_mman: Add coherent mmap api support with set domain Sreedhar Telukuntla
2020-02-17 16:29 ` Chris Wilson
2020-02-18 3:53 ` Telukuntla, Sreedhar
2020-02-28 11:06 ` Tvrtko Ursulin
2020-02-18 0:17 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_ctx_shared: Use gem_mmap__device_coherent_sync api Sreedhar Telukuntla
2020-02-19 11:02 ` [igt-dev] ✗ Fi.CI.IGT: failure for Introduce new apis for coherent mmap Patchwork
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