[igt-dev] [PATCH i-g-t] i915/gem_eio: Flush RCU before timing our own critical sections

[igt-dev] [PATCH i-g-t] i915/gem_eio: Flush RCU before timing our own critical sections

[Chris Wilson]

We cannot control how long RCU takes to find a quiescent point as that
depends upon the background load and so may take an arbitrary time.
Instead, let's try to avoid that impacting our measurements by inserting
an rcu_barrier() before our critical timing sections and hope that hides
the issue, letting us always perform a fast reset. Fwiw, we do the
expedited RCU synchronize, but that is not always enough.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_eio.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c
index 8d6cb9760..49d2a99e9 100644
--- a/tests/i915/gem_eio.c
+++ b/tests/i915/gem_eio.c
@@ -71,6 +71,7 @@ static void trigger_reset(int fd)
 {
 	struct timespec ts = { };
 
+	rcu_barrier(fd); /* flush any excess work before we start timing */
 	igt_nsec_elapsed(&ts);
 
 	igt_kmsg(KMSG_DEBUG "Forcing GPU reset\n");
@@ -227,6 +228,10 @@ static void hang_handler(union sigval arg)
 	igt_debug("hang delay = %.2fus\n",
 		  igt_nsec_elapsed(&ctx->delay) / 1000.0);
 
+	/* flush any excess work before we start timing our reset */
+	igt_assert(igt_sysfs_printf(ctx->debugfs, "i915_drop_caches",
+				    "%d", DROP_RCU));
+
 	igt_nsec_elapsed(ctx->ts);
 	igt_assert(igt_sysfs_set(ctx->debugfs, "i915_wedged", "-1"));
 
-- 
2.24.0

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[igt-dev] ✓ Fi.CI.BAT: success for i915/gem_eio: Flush RCU before timing our own critical sections

[Patchwork]

== Series Details ==

Series: i915/gem_eio: Flush RCU before timing our own critical sections
URL   : https://patchwork.freedesktop.org/series/69291/
State : success

== Summary ==

CI Bug Log - changes from IGT_5269 -> IGTPW_3681
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3681/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_3681:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_module_load@reload-with-fault-injection:
    - {fi-tgl-u}:         NOTRUN -> [INCOMPLETE][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3681/fi-tgl-u/igt@i915_module_load@reload-with-fault-injection.html

  
Known issues
------------

  Here are the changes found in IGTPW_3681 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live_gem_contexts:
    - fi-skl-lmem:        [PASS][2] -> [INCOMPLETE][3] ([fdo#111700])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5269/fi-skl-lmem/igt@i915_selftest@live_gem_contexts.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3681/fi-skl-lmem/igt@i915_selftest@live_gem_contexts.html
    - fi-cfl-guc:         [PASS][4] -> [INCOMPLETE][5] ([fdo#106070] / [fdo#111700])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5269/fi-cfl-guc/igt@i915_selftest@live_gem_contexts.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3681/fi-cfl-guc/igt@i915_selftest@live_gem_contexts.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [PASS][6] -> [FAIL][7] ([fdo#111407])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5269/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3681/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  
#### Possible fixes ####

  * igt@i915_module_load@reload-with-fault-injection:
    - fi-bxt-dsi:         [DMESG-WARN][8] -> [PASS][9]
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5269/fi-bxt-dsi/igt@i915_module_load@reload-with-fault-injection.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3681/fi-bxt-dsi/igt@i915_module_load@reload-with-fault-injection.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#106070]: https://bugs.freedesktop.org/show_bug.cgi?id=106070
  [fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
  [fdo#111700]: https://bugs.freedesktop.org/show_bug.cgi?id=111700


Participating hosts (48 -> 45)
------------------------------

  Additional (2): fi-hsw-4770r fi-tgl-u 
  Missing    (5): fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5269 -> IGTPW_3681

  CI-20190529: 20190529
  CI_DRM_7304: 12697c9f87a35e2cb4f002d83bde1ab52d9e8d5e @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3681: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3681/index.html
  IGT_5269: ad2c18fe450e99d97110db13eebf312dc0fa7b4c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3681/index.html
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Re: [igt-dev] [Intel-gfx] [PATCH i-g-t] i915/gem_eio: Flush RCU before timing our own critical sections

[Tvrtko Ursulin]

On 11/11/2019 11:40, Chris Wilson wrote:
> We cannot control how long RCU takes to find a quiescent point as that
> depends upon the background load and so may take an arbitrary time.
> Instead, let's try to avoid that impacting our measurements by inserting
> an rcu_barrier() before our critical timing sections and hope that hides
> the issue, letting us always perform a fast reset. Fwiw, we do the
> expedited RCU synchronize, but that is not always enough.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>   tests/i915/gem_eio.c | 5 +++++
>   1 file changed, 5 insertions(+)
> 
> diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c
> index 8d6cb9760..49d2a99e9 100644
> --- a/tests/i915/gem_eio.c
> +++ b/tests/i915/gem_eio.c
> @@ -71,6 +71,7 @@ static void trigger_reset(int fd)
>   {
>   	struct timespec ts = { };
>   
> +	rcu_barrier(fd); /* flush any excess work before we start timing */
>   	igt_nsec_elapsed(&ts);
>   
>   	igt_kmsg(KMSG_DEBUG "Forcing GPU reset\n");
> @@ -227,6 +228,10 @@ static void hang_handler(union sigval arg)
>   	igt_debug("hang delay = %.2fus\n",
>   		  igt_nsec_elapsed(&ctx->delay) / 1000.0);
>   
> +	/* flush any excess work before we start timing our reset */
> +	igt_assert(igt_sysfs_printf(ctx->debugfs, "i915_drop_caches",
> +				    "%d", DROP_RCU));
> +
>   	igt_nsec_elapsed(ctx->ts);
>   	igt_assert(igt_sysfs_set(ctx->debugfs, "i915_wedged", "-1"));
>   
> 

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Avoid scoring demerit points if you add reference to bugzilla, 
presumably linking to CI results, showing this was known to be flaky. :)

Regards,

Tvrtko
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