* [igt-dev] [RFC PATCH i-g-t 0/2] tests/kms_ccs: CCS Clear Color Test
@ 2020-05-19 9:48 Mika Kahola
2020-05-19 9:48 ` [igt-dev] [PATCH i-g-t 1/2] tests/kms_ccs: Add debug information on format modifier Mika Kahola
` (3 more replies)
0 siblings, 4 replies; 9+ messages in thread
From: Mika Kahola @ 2020-05-19 9:48 UTC (permalink / raw)
To: igt-dev
This is a RFC patch that proposes to test CCS clear color
capability. This is actually a third edition of the clear color
tests. The first two required tweaking and all received comments
have been helpful. Therefore, any comments/proposals to improve
the test are warmly welcomed
The test paints a solid color on primary fb and a small sprite fb.
These are cleared with fast clear feature. A crc is captured and
compared against the reference.
Clear Color testing is performed with Clear Color DRM format modifier
and with YUV format only.
Mika Kahola (2):
tests/kms_ccs: Add debug information on format modifier
tests/kms_ccs: CCS Clear Color test
lib/intel_batchbuffer.c | 10 +++
lib/intel_batchbuffer.h | 5 ++
lib/rendercopy.h | 3 +
lib/rendercopy_gen9.c | 131 ++++++++++++++++++++++++++++++++++++++++
tests/kms_ccs.c | 74 +++++++++++++++++++----
5 files changed, 210 insertions(+), 13 deletions(-)
--
2.20.1
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^ permalink raw reply [flat|nested] 9+ messages in thread* [igt-dev] [PATCH i-g-t 1/2] tests/kms_ccs: Add debug information on format modifier 2020-05-19 9:48 [igt-dev] [RFC PATCH i-g-t 0/2] tests/kms_ccs: CCS Clear Color Test Mika Kahola @ 2020-05-19 9:48 ` Mika Kahola 2020-05-27 22:35 ` Matt Roper 2020-05-19 9:48 ` [igt-dev] [PATCH i-g-t 2/2] tests/kms_ccs: CCS Clear Color test Mika Kahola ` (2 subsequent siblings) 3 siblings, 1 reply; 9+ messages in thread From: Mika Kahola @ 2020-05-19 9:48 UTC (permalink / raw) To: igt-dev We could benefit on information on what format modifier is in use when running the test. This in mind, let's add informative string along with the list of ccs modifiers. Signed-off-by: Mika Kahola <mika.kahola@intel.com> --- tests/kms_ccs.c | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c index bc34aec5..c23b4e44 100644 --- a/tests/kms_ccs.c +++ b/tests/kms_ccs.c @@ -81,12 +81,15 @@ static const uint32_t formats[] = { DRM_FORMAT_P016, }; -static const uint64_t ccs_modifiers[] = { - LOCAL_I915_FORMAT_MOD_Y_TILED_CCS, - LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS, - LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS, - LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC, - LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS, +static const struct { + uint64_t modifier; + const char *str; +} ccs_modifiers[5] = { + {LOCAL_I915_FORMAT_MOD_Y_TILED_CCS, "LOCAL_I915_FORMAT_MOD_Y_TILED_CCS"}, + {LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS, "LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS"}, + {LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS, "LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS"}, + {LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC, "LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC"}, + {LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS, "LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS"}, }; static bool check_ccs_planes; @@ -422,7 +425,8 @@ static int __test_output(data_t *data) for (i = 0; i < ARRAY_SIZE(ccs_modifiers); i++) { int j; - data->ccs_modifier = ccs_modifiers[i]; + data->ccs_modifier = ccs_modifiers[i].modifier; + igt_debug("Modifier in use: %s\n", ccs_modifiers[i].str); for (j = 0; j < ARRAY_SIZE(formats); j++) { data->format = formats[j]; valid_tests += test_ccs(data); -- 2.20.1 _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 1/2] tests/kms_ccs: Add debug information on format modifier 2020-05-19 9:48 ` [igt-dev] [PATCH i-g-t 1/2] tests/kms_ccs: Add debug information on format modifier Mika Kahola @ 2020-05-27 22:35 ` Matt Roper 0 siblings, 0 replies; 9+ messages in thread From: Matt Roper @ 2020-05-27 22:35 UTC (permalink / raw) To: Mika Kahola; +Cc: igt-dev On Tue, May 19, 2020 at 12:48:02PM +0300, Mika Kahola wrote: > We could benefit on information on what format modifier is in use > when running the test. This in mind, let's add informative string along > with the list of ccs modifiers. > > Signed-off-by: Mika Kahola <mika.kahola@intel.com> > --- > tests/kms_ccs.c | 18 +++++++++++------- > 1 file changed, 11 insertions(+), 7 deletions(-) > > diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c > index bc34aec5..c23b4e44 100644 > --- a/tests/kms_ccs.c > +++ b/tests/kms_ccs.c > @@ -81,12 +81,15 @@ static const uint32_t formats[] = { > DRM_FORMAT_P016, > }; > > -static const uint64_t ccs_modifiers[] = { > - LOCAL_I915_FORMAT_MOD_Y_TILED_CCS, > - LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS, > - LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS, > - LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC, > - LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS, > +static const struct { > + uint64_t modifier; > + const char *str; > +} ccs_modifiers[5] = { > + {LOCAL_I915_FORMAT_MOD_Y_TILED_CCS, "LOCAL_I915_FORMAT_MOD_Y_TILED_CCS"}, > + {LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS, "LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS"}, > + {LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS, "LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS"}, > + {LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC, "LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC"}, > + {LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS, "LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS"}, > }; To help guard against typos or copy/paste errors, you might want to use a macro like: #define CCSMOD(x) { x, #x } static const struct { uint64_t modifier; const char *str; } ccs_modifiers[5] = { CCSMOD(LOCAL_I915_FORMAT_MOD_Y_TILED_CCS), CCSMOD(LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS), ... } #undef CCSMOD But either way, Reviewed-by: Matt Roper <matthew.d.roper@intel.com> > > static bool check_ccs_planes; > @@ -422,7 +425,8 @@ static int __test_output(data_t *data) > for (i = 0; i < ARRAY_SIZE(ccs_modifiers); i++) { > int j; > > - data->ccs_modifier = ccs_modifiers[i]; > + data->ccs_modifier = ccs_modifiers[i].modifier; > + igt_debug("Modifier in use: %s\n", ccs_modifiers[i].str); > for (j = 0; j < ARRAY_SIZE(formats); j++) { > data->format = formats[j]; > valid_tests += test_ccs(data); > -- > 2.20.1 > > _______________________________________________ > igt-dev mailing list > igt-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/igt-dev -- Matt Roper Graphics Software Engineer VTT-OSGC Platform Enablement Intel Corporation (916) 356-2795 _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 9+ messages in thread
* [igt-dev] [PATCH i-g-t 2/2] tests/kms_ccs: CCS Clear Color test 2020-05-19 9:48 [igt-dev] [RFC PATCH i-g-t 0/2] tests/kms_ccs: CCS Clear Color Test Mika Kahola 2020-05-19 9:48 ` [igt-dev] [PATCH i-g-t 1/2] tests/kms_ccs: Add debug information on format modifier Mika Kahola @ 2020-05-19 9:48 ` Mika Kahola 2020-05-27 22:35 ` Matt Roper 2020-05-19 10:37 ` [igt-dev] ✓ Fi.CI.BAT: success for tests/kms_ccs: CCS Clear Color test (rev2) Patchwork 2020-05-19 14:27 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork 3 siblings, 1 reply; 9+ messages in thread From: Mika Kahola @ 2020-05-19 9:48 UTC (permalink / raw) To: igt-dev This is a RFC patch that proposes to test CCS clear color capability. The test paints a solid color on primary fb and a small sprite fb. These are cleared with fast clear feature. A crc is captured and compared against the reference. Clear Color testing is performed with Clear Color DRM format modifier and with YUV format only. Any comments/proposals to improve the test are warmly welcomed. Signed-off-by: Mika Kahola <mika.kahola@intel.com> --- lib/intel_batchbuffer.c | 10 +++ lib/intel_batchbuffer.h | 5 ++ lib/rendercopy.h | 3 + lib/rendercopy_gen9.c | 131 ++++++++++++++++++++++++++++++++++++++++ tests/kms_ccs.c | 56 +++++++++++++++-- 5 files changed, 199 insertions(+), 6 deletions(-) diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c index f1a45b47..fb5b49a4 100644 --- a/lib/intel_batchbuffer.c +++ b/lib/intel_batchbuffer.c @@ -1090,6 +1090,16 @@ igt_vebox_copyfunc_t igt_get_vebox_copyfunc(int devid) return copy; } +igt_render_clearfunc_t igt_get_render_clearfunc(int devid) +{ + igt_render_clearfunc_t clear = NULL; + + if (IS_GEN12(devid)) + clear = gen12_render_clearfunc; + + return clear; +} + /** * igt_get_media_fillfunc: * @devid: pci device id diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h index 442f3a18..b378b97c 100644 --- a/lib/intel_batchbuffer.h +++ b/lib/intel_batchbuffer.h @@ -367,6 +367,11 @@ typedef void (*igt_vebox_copyfunc_t)(struct intel_batchbuffer *batch, igt_vebox_copyfunc_t igt_get_vebox_copyfunc(int devid); +typedef void (*igt_render_clearfunc_t)(struct intel_batchbuffer *batch, + const struct igt_buf *dst, unsigned int dst_x, unsigned int dst_y, + unsigned int width, unsigned int height); +igt_render_clearfunc_t igt_get_render_clearfunc(int devid); + /** * igt_fillfunc_t: * @batch: batchbuffer object diff --git a/lib/rendercopy.h b/lib/rendercopy.h index e0577cac..8c14830c 100644 --- a/lib/rendercopy.h +++ b/lib/rendercopy.h @@ -23,6 +23,9 @@ static inline void emit_vertex_normalized(struct intel_batchbuffer *batch, OUT_BATCH(u.ui); } +void gen12_render_clearfunc(struct intel_batchbuffer *batch, + const struct igt_buf *dst, unsigned int dst_x, unsigned int dst_y, + unsigned int width, unsigned int height); void gen12_render_copyfunc(struct intel_batchbuffer *batch, drm_intel_context *context, const struct igt_buf *src, unsigned src_x, unsigned src_y, diff --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c index 85ae4cab..fa985fec 100644 --- a/lib/rendercopy_gen9.c +++ b/lib/rendercopy_gen9.c @@ -1110,6 +1110,120 @@ void _gen9_render_copyfunc(struct intel_batchbuffer *batch, intel_batchbuffer_reset(batch); } +static +void _gen12_render_clearfunc(struct intel_batchbuffer *batch, + drm_intel_context *context, + const struct igt_buf *dst, unsigned int dst_x, + unsigned int dst_y, unsigned int width, unsigned int height, + drm_intel_bo *aux_pgtable_bo, + const uint32_t ps_kernel[][4], + uint32_t ps_kernel_size) +{ + uint32_t ps_sampler_state, ps_kernel_off; + uint32_t scissor_state; + uint32_t vertex_buffer; + uint32_t batch_end; + uint32_t aux_pgtable_state; + + intel_batchbuffer_flush_with_context(batch, context); + + intel_batchbuffer_align(batch, 8); + + batch->ptr = &batch->buffer[BATCH_STATE_SPLIT]; + + annotation_init(&aub_annotations); + + ps_sampler_state = gen8_create_sampler(batch); + ps_kernel_off = gen8_fill_ps(batch, ps_kernel, ps_kernel_size); + vertex_buffer = gen7_fill_vertex_buffer_data(batch, NULL, + 0, 0, + dst_x, dst_y, + width, height); + cc.cc_state = gen6_create_cc_state(batch); + cc.blend_state = gen8_create_blend_state(batch); + viewport.cc_state = gen6_create_cc_viewport(batch); + viewport.sf_clip_state = gen7_create_sf_clip_viewport(batch); + scissor_state = gen6_create_scissor_rect(batch); + + aux_pgtable_state = gen12_create_aux_pgtable_state(batch, + aux_pgtable_bo); + + /* TODO: there is other state which isn't setup */ + + assert(batch->ptr < &batch->buffer[4095]); + + batch->ptr = batch->buffer; + + /* Start emitting the commands. The order roughly follows the mesa blorp + * order */ + OUT_BATCH(G4X_PIPELINE_SELECT | PIPELINE_SELECT_3D | + GEN9_PIPELINE_SELECTION_MASK); + + gen12_emit_aux_pgtable_state(batch, aux_pgtable_state, true); + + gen8_emit_sip(batch); + + gen7_emit_push_constants(batch); + + gen9_emit_state_base_address(batch); + + OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC); + OUT_BATCH(viewport.cc_state); + OUT_BATCH(GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP); + OUT_BATCH(viewport.sf_clip_state); + + gen7_emit_urb(batch); + + gen8_emit_cc(batch); + + gen8_emit_multisample(batch); + + gen8_emit_null_state(batch); + + OUT_BATCH(GEN7_3DSTATE_STREAMOUT | (5 - 2)); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + + gen7_emit_clip(batch); + + gen8_emit_sf(batch); + + gen8_emit_ps(batch, ps_kernel_off); + + OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS); + OUT_BATCH(ps_sampler_state); + + OUT_BATCH(GEN8_3DSTATE_SCISSOR_STATE_POINTERS); + OUT_BATCH(scissor_state); + + gen9_emit_depth(batch); + + gen7_emit_clear(batch); + + gen6_emit_drawing_rectangle(batch, dst); + + gen7_emit_vertex_buffer(batch, vertex_buffer); + gen6_emit_vertex_elements(batch); + + gen8_emit_vf_topology(batch); + gen8_emit_primitive(batch, vertex_buffer); + + OUT_BATCH(MI_BATCH_BUFFER_END); + + batch_end = intel_batchbuffer_align(batch, 8); + assert(batch_end < BATCH_STATE_SPLIT); + annotation_add_batch(&aub_annotations, batch_end); + + dump_batch(batch); + + annotation_flush(&aub_annotations, batch); + + gen6_render_flush(batch, context, batch_end); + intel_batchbuffer_reset(batch); +} + void gen9_render_copyfunc(struct intel_batchbuffer *batch, drm_intel_context *context, const struct igt_buf *src, unsigned src_x, unsigned src_y, @@ -1153,3 +1267,20 @@ void gen12_render_copyfunc(struct intel_batchbuffer *batch, gen12_aux_pgtable_cleanup(&pgtable_info); } + +void gen12_render_clearfunc(struct intel_batchbuffer *batch, + const struct igt_buf *dst, unsigned int dst_x, unsigned int dst_y, + unsigned int width, unsigned int height) +{ + struct aux_pgtable_info pgtable_info = { }; + + gen12_aux_pgtable_init(&pgtable_info, batch->bufmgr, NULL, dst); + + _gen12_render_clearfunc(batch, NULL, + dst, dst_x, dst_y, 0, 0, + pgtable_info.pgtable_bo, + gen12_render_copy, + sizeof(gen12_render_copy)); + + gen12_aux_pgtable_cleanup(&pgtable_info); +} diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c index c23b4e44..c9a781bf 100644 --- a/tests/kms_ccs.c +++ b/tests/kms_ccs.c @@ -50,10 +50,12 @@ enum test_fb_flags { FB_MISALIGN_AUX_STRIDE = 1 << 2, FB_SMALL_AUX_STRIDE = 1 << 3, FB_ZERO_AUX_STRIDE = 1 << 4, + FB_CLEAR_COLOR = 1 << 5, }; typedef struct { int drm_fd; + int devid; igt_display_t display; igt_output_t *output; enum pipe pipe; @@ -62,6 +64,9 @@ typedef struct { igt_pipe_crc_t *pipe_crc; uint32_t format; uint64_t ccs_modifier; + struct igt_fb primary_fb; + igt_plane_t *primary; + igt_render_clearfunc_t fast_clear; } data_t; static const struct { @@ -290,6 +295,17 @@ static igt_plane_t *compatible_main_plane(data_t *data) return igt_output_get_plane_type(data->output, DRM_PLANE_TYPE_PRIMARY); } +static void scratch_buf_init(data_t *data, drm_intel_bo *drmibo, + struct igt_buf *igtbo) +{ + igtbo->bo = drmibo; + igtbo->surface[0].stride = data->primary_fb.strides[0]; + igtbo->tiling = data->primary_fb.modifier; + igtbo->surface[0].size = data->primary_fb.size; + igtbo->bpp = data->primary_fb.plane_bpp[0]; +} + + static bool try_config(data_t *data, enum test_fb_flags fb_flags, igt_crc_t *crc) { @@ -299,6 +315,10 @@ static bool try_config(data_t *data, enum test_fb_flags fb_flags, int fb_width = drm_mode->hdisplay; enum igt_commit_style commit; struct igt_fb fb, fb_sprite; + drm_intel_bufmgr *bufmgr = NULL; + drm_intel_bo *drmibo; + struct intel_batchbuffer *batch; + struct igt_buf igtbo; int ret; if (data->display.is_atomic) @@ -333,7 +353,6 @@ static bool try_config(data_t *data, enum test_fb_flags fb_flags, if (data->flags & TEST_FAIL_ON_ADDFB2) return true; - igt_plane_set_position(primary, 0, 0); igt_plane_set_size(primary, drm_mode->hdisplay, drm_mode->vdisplay); igt_plane_set_fb(primary, &fb); @@ -349,6 +368,22 @@ static bool try_config(data_t *data, enum test_fb_flags fb_flags, if (data->flags & TEST_BAD_ROTATION_90) igt_plane_set_rotation(primary, IGT_ROTATION_90); + if (fb_flags & FB_CLEAR_COLOR) { + drmibo = gem_handle_to_libdrm_bo(bufmgr, data->drm_fd, "", + data->primary_fb.gem_handle); + igt_assert(drmibo); + + scratch_buf_init(data, drmibo, &igtbo); + + batch = intel_batchbuffer_alloc(bufmgr, data->devid); + igt_assert(batch); + + /* use fast clear */ + data->fast_clear(batch, &igtbo, 0, 0, + data->primary_fb.width, + data->primary_fb.height); + } + ret = igt_display_try_commit2(display, commit); if (data->flags & TEST_BAD_ROTATION_90) { igt_assert_eq(ret, -EINVAL); @@ -370,6 +405,7 @@ static bool try_config(data_t *data, enum test_fb_flags fb_flags, igt_plane_set_fb(primary, NULL); igt_plane_set_rotation(primary, IGT_ROTATION_0); + igt_display_commit2(display, commit); if (data->flags & TEST_CRC) @@ -386,12 +422,18 @@ static int test_ccs(data_t *data) if (data->flags & TEST_CRC) { data->pipe_crc = igt_pipe_crc_new(data->drm_fd, data->pipe, INTEL_PIPE_CRC_SOURCE_AUTO); - if (try_config(data, fb_flags | FB_COMPRESSED, &ref_crc) && - try_config(data, fb_flags, &crc)) { + if (data->ccs_modifier == LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC && + data->format == DRM_FORMAT_YUYV) { + valid_tests += try_config(data, fb_flags | FB_COMPRESSED, &ref_crc); + valid_tests += try_config(data, fb_flags | FB_COMPRESSED | FB_CLEAR_COLOR, &crc); igt_assert_crc_equal(&crc, &ref_crc); - valid_tests++; + } else { + if (try_config(data, fb_flags | FB_COMPRESSED, &ref_crc) && + try_config(data, fb_flags, &crc)) { + igt_assert_crc_equal(&crc, &ref_crc); + valid_tests++; + } } - igt_pipe_crc_free(data->pipe_crc); data->pipe_crc = NULL; } @@ -471,11 +513,13 @@ igt_main_args("c", NULL, help_str, opt_handler, NULL) igt_fixture { data.drm_fd = drm_open_driver_master(DRIVER_INTEL); - igt_require(intel_gen(intel_get_drm_devid(data.drm_fd)) >= 9); + data.devid = intel_gen(intel_get_drm_devid(data.drm_fd)); + igt_require(data.devid >= 9); kmstest_set_vt_graphics_mode(); igt_require_pipe_crc(data.drm_fd); igt_display_require(&data.display, data.drm_fd); + data.fast_clear = igt_get_render_clearfunc(data.devid); } for_each_pipe_static(pipe) { -- 2.20.1 _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/2] tests/kms_ccs: CCS Clear Color test 2020-05-19 9:48 ` [igt-dev] [PATCH i-g-t 2/2] tests/kms_ccs: CCS Clear Color test Mika Kahola @ 2020-05-27 22:35 ` Matt Roper 2020-06-01 10:25 ` Kahola, Mika 0 siblings, 1 reply; 9+ messages in thread From: Matt Roper @ 2020-05-27 22:35 UTC (permalink / raw) To: Mika Kahola; +Cc: igt-dev On Tue, May 19, 2020 at 12:48:03PM +0300, Mika Kahola wrote: > This is a RFC patch that proposes to test CCS clear color > capability. > > The test paints a solid color on primary fb and a small sprite fb. > These are cleared with fast clear feature. A crc is captured and > compared against the reference. > > Clear Color testing is performed with Clear Color DRM format modifier > and with YUV format only. > > Any comments/proposals to improve the test are warmly welcomed. > > Signed-off-by: Mika Kahola <mika.kahola@intel.com> > --- > lib/intel_batchbuffer.c | 10 +++ > lib/intel_batchbuffer.h | 5 ++ > lib/rendercopy.h | 3 + > lib/rendercopy_gen9.c | 131 ++++++++++++++++++++++++++++++++++++++++ > tests/kms_ccs.c | 56 +++++++++++++++-- > 5 files changed, 199 insertions(+), 6 deletions(-) > > diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c > index f1a45b47..fb5b49a4 100644 > --- a/lib/intel_batchbuffer.c > +++ b/lib/intel_batchbuffer.c > @@ -1090,6 +1090,16 @@ igt_vebox_copyfunc_t igt_get_vebox_copyfunc(int devid) > return copy; > } > > +igt_render_clearfunc_t igt_get_render_clearfunc(int devid) > +{ > + igt_render_clearfunc_t clear = NULL; > + > + if (IS_GEN12(devid)) > + clear = gen12_render_clearfunc; > + > + return clear; > +} Any specific reason this is in intel_batchbuffer.c? I know similar functions like get_{render,vebox}_copyfunc and such are also in this file, but that seems a bit strange to me as well when the non-blt implementations are in separate files. > + > /** > * igt_get_media_fillfunc: > * @devid: pci device id > diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h > index 442f3a18..b378b97c 100644 > --- a/lib/intel_batchbuffer.h > +++ b/lib/intel_batchbuffer.h > @@ -367,6 +367,11 @@ typedef void (*igt_vebox_copyfunc_t)(struct intel_batchbuffer *batch, > > igt_vebox_copyfunc_t igt_get_vebox_copyfunc(int devid); > > +typedef void (*igt_render_clearfunc_t)(struct intel_batchbuffer *batch, > + const struct igt_buf *dst, unsigned int dst_x, unsigned int dst_y, > + unsigned int width, unsigned int height); Should there be a kerneldoc block above this like there is for the other platform operation function pointers? I was expecting there to be a color value provided as a parameter here too; are we just always clearing to black rather than giving the test the option of what color to use? It seems like if we don't explicitly set the color then we won't have good confidence that the Clear Color functionality is actually working as expected. It's too bad we can't just re-use igt_fillfunc_t for this; it seems to be pretty much what we want except that it only supports 8-bit "color" values to fill/clear with. > +igt_render_clearfunc_t igt_get_render_clearfunc(int devid); > + > /** > * igt_fillfunc_t: > * @batch: batchbuffer object > diff --git a/lib/rendercopy.h b/lib/rendercopy.h > index e0577cac..8c14830c 100644 > --- a/lib/rendercopy.h > +++ b/lib/rendercopy.h > @@ -23,6 +23,9 @@ static inline void emit_vertex_normalized(struct intel_batchbuffer *batch, > OUT_BATCH(u.ui); > } > > +void gen12_render_clearfunc(struct intel_batchbuffer *batch, > + const struct igt_buf *dst, unsigned int dst_x, unsigned int dst_y, > + unsigned int width, unsigned int height); > void gen12_render_copyfunc(struct intel_batchbuffer *batch, > drm_intel_context *context, > const struct igt_buf *src, unsigned src_x, unsigned src_y, > diff --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c > index 85ae4cab..fa985fec 100644 > --- a/lib/rendercopy_gen9.c > +++ b/lib/rendercopy_gen9.c > @@ -1110,6 +1110,120 @@ void _gen9_render_copyfunc(struct intel_batchbuffer *batch, > intel_batchbuffer_reset(batch); > } > > +static > +void _gen12_render_clearfunc(struct intel_batchbuffer *batch, > + drm_intel_context *context, > + const struct igt_buf *dst, unsigned int dst_x, > + unsigned int dst_y, unsigned int width, unsigned int height, > + drm_intel_bo *aux_pgtable_bo, > + const uint32_t ps_kernel[][4], > + uint32_t ps_kernel_size) > +{ The implementation of this function is nearly identical to _gen9_render_copyfunc; can we find a way to just re-use that function and make it smart enough to deal with a NULL src so that we don't have so much code duplication here? That will likely make it easier when we add new generations in the future and need to tweak the general state emission. I'm not an expert on the 3d pipeline so I don't have a good feel for the state that we need to emit, but it doesn't look like we're binding the destination surface anywhere here (i.e., as we do in gen8_bind_surfaces()) --- is that expected/okay? > + uint32_t ps_sampler_state, ps_kernel_off; > + uint32_t scissor_state; > + uint32_t vertex_buffer; > + uint32_t batch_end; > + uint32_t aux_pgtable_state; > + > + intel_batchbuffer_flush_with_context(batch, context); > + > + intel_batchbuffer_align(batch, 8); > + > + batch->ptr = &batch->buffer[BATCH_STATE_SPLIT]; > + > + annotation_init(&aub_annotations); > + > + ps_sampler_state = gen8_create_sampler(batch); > + ps_kernel_off = gen8_fill_ps(batch, ps_kernel, ps_kernel_size); > + vertex_buffer = gen7_fill_vertex_buffer_data(batch, NULL, > + 0, 0, > + dst_x, dst_y, > + width, height); > + cc.cc_state = gen6_create_cc_state(batch); > + cc.blend_state = gen8_create_blend_state(batch); > + viewport.cc_state = gen6_create_cc_viewport(batch); > + viewport.sf_clip_state = gen7_create_sf_clip_viewport(batch); > + scissor_state = gen6_create_scissor_rect(batch); > + > + aux_pgtable_state = gen12_create_aux_pgtable_state(batch, > + aux_pgtable_bo); > + > + /* TODO: there is other state which isn't setup */ > + > + assert(batch->ptr < &batch->buffer[4095]); > + > + batch->ptr = batch->buffer; > + > + /* Start emitting the commands. The order roughly follows the mesa blorp > + * order */ > + OUT_BATCH(G4X_PIPELINE_SELECT | PIPELINE_SELECT_3D | > + GEN9_PIPELINE_SELECTION_MASK); > + > + gen12_emit_aux_pgtable_state(batch, aux_pgtable_state, true); > + > + gen8_emit_sip(batch); > + > + gen7_emit_push_constants(batch); > + > + gen9_emit_state_base_address(batch); > + > + OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC); > + OUT_BATCH(viewport.cc_state); > + OUT_BATCH(GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP); > + OUT_BATCH(viewport.sf_clip_state); > + > + gen7_emit_urb(batch); > + > + gen8_emit_cc(batch); > + > + gen8_emit_multisample(batch); > + > + gen8_emit_null_state(batch); > + > + OUT_BATCH(GEN7_3DSTATE_STREAMOUT | (5 - 2)); > + OUT_BATCH(0); > + OUT_BATCH(0); > + OUT_BATCH(0); > + OUT_BATCH(0); > + > + gen7_emit_clip(batch); > + > + gen8_emit_sf(batch); > + > + gen8_emit_ps(batch, ps_kernel_off); Again, my 3d pipeline experience is pretty minimal so I may be way off base, but don't we want to trigger a fast clear here? If I understand bspec 46969 / 47704 correctly, I think we need to set bit 8 in dword 5 of the 3DSTATE_PS instruction for that, which our usual pixel shader emission helper doesn't do. > + > + OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS); > + OUT_BATCH(ps_sampler_state); > + > + OUT_BATCH(GEN8_3DSTATE_SCISSOR_STATE_POINTERS); > + OUT_BATCH(scissor_state); > + > + gen9_emit_depth(batch); > + > + gen7_emit_clear(batch); > + > + gen6_emit_drawing_rectangle(batch, dst); > + > + gen7_emit_vertex_buffer(batch, vertex_buffer); > + gen6_emit_vertex_elements(batch); > + > + gen8_emit_vf_topology(batch); > + gen8_emit_primitive(batch, vertex_buffer); > + > + OUT_BATCH(MI_BATCH_BUFFER_END); > + > + batch_end = intel_batchbuffer_align(batch, 8); > + assert(batch_end < BATCH_STATE_SPLIT); > + annotation_add_batch(&aub_annotations, batch_end); > + > + dump_batch(batch); > + > + annotation_flush(&aub_annotations, batch); > + > + gen6_render_flush(batch, context, batch_end); > + intel_batchbuffer_reset(batch); > +} > + > void gen9_render_copyfunc(struct intel_batchbuffer *batch, > drm_intel_context *context, > const struct igt_buf *src, unsigned src_x, unsigned src_y, > @@ -1153,3 +1267,20 @@ void gen12_render_copyfunc(struct intel_batchbuffer *batch, > > gen12_aux_pgtable_cleanup(&pgtable_info); > } > + > +void gen12_render_clearfunc(struct intel_batchbuffer *batch, > + const struct igt_buf *dst, unsigned int dst_x, unsigned int dst_y, > + unsigned int width, unsigned int height) > +{ > + struct aux_pgtable_info pgtable_info = { }; > + > + gen12_aux_pgtable_init(&pgtable_info, batch->bufmgr, NULL, dst); > + > + _gen12_render_clearfunc(batch, NULL, > + dst, dst_x, dst_y, 0, 0, > + pgtable_info.pgtable_bo, > + gen12_render_copy, > + sizeof(gen12_render_copy)); The rendercopy shader samples values from the source buffer and writes them to the destination; is that appropriate to use in this case? Should we be using a different/simpler shader when we're just trying to do a clear? > + > + gen12_aux_pgtable_cleanup(&pgtable_info); > +} > diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c > index c23b4e44..c9a781bf 100644 > --- a/tests/kms_ccs.c > +++ b/tests/kms_ccs.c > @@ -50,10 +50,12 @@ enum test_fb_flags { > FB_MISALIGN_AUX_STRIDE = 1 << 2, > FB_SMALL_AUX_STRIDE = 1 << 3, > FB_ZERO_AUX_STRIDE = 1 << 4, > + FB_CLEAR_COLOR = 1 << 5, > }; > > typedef struct { > int drm_fd; > + int devid; > igt_display_t display; > igt_output_t *output; > enum pipe pipe; > @@ -62,6 +64,9 @@ typedef struct { > igt_pipe_crc_t *pipe_crc; > uint32_t format; > uint64_t ccs_modifier; > + struct igt_fb primary_fb; > + igt_plane_t *primary; > + igt_render_clearfunc_t fast_clear; > } data_t; > > static const struct { > @@ -290,6 +295,17 @@ static igt_plane_t *compatible_main_plane(data_t *data) > return igt_output_get_plane_type(data->output, DRM_PLANE_TYPE_PRIMARY); > } > > +static void scratch_buf_init(data_t *data, drm_intel_bo *drmibo, > + struct igt_buf *igtbo) > +{ > + igtbo->bo = drmibo; > + igtbo->surface[0].stride = data->primary_fb.strides[0]; > + igtbo->tiling = data->primary_fb.modifier; > + igtbo->surface[0].size = data->primary_fb.size; > + igtbo->bpp = data->primary_fb.plane_bpp[0]; > +} > + > + > static bool try_config(data_t *data, enum test_fb_flags fb_flags, > igt_crc_t *crc) > { > @@ -299,6 +315,10 @@ static bool try_config(data_t *data, enum test_fb_flags fb_flags, > int fb_width = drm_mode->hdisplay; > enum igt_commit_style commit; > struct igt_fb fb, fb_sprite; > + drm_intel_bufmgr *bufmgr = NULL; > + drm_intel_bo *drmibo; > + struct intel_batchbuffer *batch; > + struct igt_buf igtbo; > int ret; > > if (data->display.is_atomic) > @@ -333,7 +353,6 @@ static bool try_config(data_t *data, enum test_fb_flags fb_flags, > > if (data->flags & TEST_FAIL_ON_ADDFB2) > return true; > - > igt_plane_set_position(primary, 0, 0); > igt_plane_set_size(primary, drm_mode->hdisplay, drm_mode->vdisplay); > igt_plane_set_fb(primary, &fb); > @@ -349,6 +368,22 @@ static bool try_config(data_t *data, enum test_fb_flags fb_flags, > if (data->flags & TEST_BAD_ROTATION_90) > igt_plane_set_rotation(primary, IGT_ROTATION_90); > > + if (fb_flags & FB_CLEAR_COLOR) { > + drmibo = gem_handle_to_libdrm_bo(bufmgr, data->drm_fd, "", > + data->primary_fb.gem_handle); > + igt_assert(drmibo); > + > + scratch_buf_init(data, drmibo, &igtbo); > + > + batch = intel_batchbuffer_alloc(bufmgr, data->devid); > + igt_assert(batch); > + > + /* use fast clear */ > + data->fast_clear(batch, &igtbo, 0, 0, > + data->primary_fb.width, > + data->primary_fb.height); > + } > + > ret = igt_display_try_commit2(display, commit); > if (data->flags & TEST_BAD_ROTATION_90) { > igt_assert_eq(ret, -EINVAL); > @@ -370,6 +405,7 @@ static bool try_config(data_t *data, enum test_fb_flags fb_flags, > > igt_plane_set_fb(primary, NULL); > igt_plane_set_rotation(primary, IGT_ROTATION_0); > + > igt_display_commit2(display, commit); > > if (data->flags & TEST_CRC) > @@ -386,12 +422,18 @@ static int test_ccs(data_t *data) > if (data->flags & TEST_CRC) { > data->pipe_crc = igt_pipe_crc_new(data->drm_fd, data->pipe, INTEL_PIPE_CRC_SOURCE_AUTO); > > - if (try_config(data, fb_flags | FB_COMPRESSED, &ref_crc) && > - try_config(data, fb_flags, &crc)) { > + if (data->ccs_modifier == LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC && This should probably be separated out into a helper function since we'll probably have other "CCS_CC" modifiers on future platforms. > + data->format == DRM_FORMAT_YUYV) { It's not obvious to me why we test for YUYV here? Matt > + valid_tests += try_config(data, fb_flags | FB_COMPRESSED, &ref_crc); > + valid_tests += try_config(data, fb_flags | FB_COMPRESSED | FB_CLEAR_COLOR, &crc); > igt_assert_crc_equal(&crc, &ref_crc); > - valid_tests++; > + } else { > + if (try_config(data, fb_flags | FB_COMPRESSED, &ref_crc) && > + try_config(data, fb_flags, &crc)) { > + igt_assert_crc_equal(&crc, &ref_crc); > + valid_tests++; > + } > } > - > igt_pipe_crc_free(data->pipe_crc); > data->pipe_crc = NULL; > } > @@ -471,11 +513,13 @@ igt_main_args("c", NULL, help_str, opt_handler, NULL) > igt_fixture { > data.drm_fd = drm_open_driver_master(DRIVER_INTEL); > > - igt_require(intel_gen(intel_get_drm_devid(data.drm_fd)) >= 9); > + data.devid = intel_gen(intel_get_drm_devid(data.drm_fd)); > + igt_require(data.devid >= 9); > kmstest_set_vt_graphics_mode(); > igt_require_pipe_crc(data.drm_fd); > > igt_display_require(&data.display, data.drm_fd); > + data.fast_clear = igt_get_render_clearfunc(data.devid); > } > > for_each_pipe_static(pipe) { > -- > 2.20.1 > > _______________________________________________ > igt-dev mailing list > igt-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/igt-dev -- Matt Roper Graphics Software Engineer VTT-OSGC Platform Enablement Intel Corporation (916) 356-2795 _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/2] tests/kms_ccs: CCS Clear Color test 2020-05-27 22:35 ` Matt Roper @ 2020-06-01 10:25 ` Kahola, Mika 0 siblings, 0 replies; 9+ messages in thread From: Kahola, Mika @ 2020-06-01 10:25 UTC (permalink / raw) To: Roper, Matthew D; +Cc: igt-dev@lists.freedesktop.org Thanks for the great review. I'll try to add my comments below. > -----Original Message----- > From: Roper, Matthew D <matthew.d.roper@intel.com> > Sent: Thursday, May 28, 2020 1:35 AM > To: Kahola, Mika <mika.kahola@intel.com> > Cc: igt-dev@lists.freedesktop.org > Subject: Re: [igt-dev] [PATCH i-g-t 2/2] tests/kms_ccs: CCS Clear Color test > > On Tue, May 19, 2020 at 12:48:03PM +0300, Mika Kahola wrote: > > This is a RFC patch that proposes to test CCS clear color capability. > > > > The test paints a solid color on primary fb and a small sprite fb. > > These are cleared with fast clear feature. A crc is captured and > > compared against the reference. > > > > Clear Color testing is performed with Clear Color DRM format modifier > > and with YUV format only. > > > > Any comments/proposals to improve the test are warmly welcomed. > > > > Signed-off-by: Mika Kahola <mika.kahola@intel.com> > > --- > > lib/intel_batchbuffer.c | 10 +++ > > lib/intel_batchbuffer.h | 5 ++ > > lib/rendercopy.h | 3 + > > lib/rendercopy_gen9.c | 131 > ++++++++++++++++++++++++++++++++++++++++ > > tests/kms_ccs.c | 56 +++++++++++++++-- > > 5 files changed, 199 insertions(+), 6 deletions(-) > > > > diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c index > > f1a45b47..fb5b49a4 100644 > > --- a/lib/intel_batchbuffer.c > > +++ b/lib/intel_batchbuffer.c > > @@ -1090,6 +1090,16 @@ igt_vebox_copyfunc_t > igt_get_vebox_copyfunc(int devid) > > return copy; > > } > > > > +igt_render_clearfunc_t igt_get_render_clearfunc(int devid) { > > + igt_render_clearfunc_t clear = NULL; > > + > > + if (IS_GEN12(devid)) > > + clear = gen12_render_clearfunc; > > + > > + return clear; > > +} > > Any specific reason this is in intel_batchbuffer.c? I know similar functions like > get_{render,vebox}_copyfunc and such are also in this file, but that seems a bit > strange to me as well when the non-blt implementations are in separate files. I had no specific reason. I just added these as render and vebox functions were defined here. > > > + > > /** > > * igt_get_media_fillfunc: > > * @devid: pci device id > > diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h index > > 442f3a18..b378b97c 100644 > > --- a/lib/intel_batchbuffer.h > > +++ b/lib/intel_batchbuffer.h > > @@ -367,6 +367,11 @@ typedef void (*igt_vebox_copyfunc_t)(struct > > intel_batchbuffer *batch, > > > > igt_vebox_copyfunc_t igt_get_vebox_copyfunc(int devid); > > > > +typedef void (*igt_render_clearfunc_t)(struct intel_batchbuffer *batch, > > + const struct igt_buf *dst, unsigned int > dst_x, unsigned int dst_y, > > + unsigned int width, unsigned int height); > > Should there be a kerneldoc block above this like there is for the other platform > operation function pointers? Yep, some documentation is needed. I'll address this on next spin. > > I was expecting there to be a color value provided as a parameter here too; are > we just always clearing to black rather than giving the test the option of what > color to use? It seems like if we don't explicitly set the color then we won't have > good confidence that the Clear Color functionality is actually working as > expected. This could be parameter. It is a better test that way. We don't need to stick with just one color, but feature could be tested with multiple colors. > > It's too bad we can't just re-use igt_fillfunc_t for this; it seems to be pretty much > what we want except that it only supports 8-bit "color" > values to fill/clear with. > > > +igt_render_clearfunc_t igt_get_render_clearfunc(int devid); > > + > > /** > > * igt_fillfunc_t: > > * @batch: batchbuffer object > > diff --git a/lib/rendercopy.h b/lib/rendercopy.h index > > e0577cac..8c14830c 100644 > > --- a/lib/rendercopy.h > > +++ b/lib/rendercopy.h > > @@ -23,6 +23,9 @@ static inline void emit_vertex_normalized(struct > intel_batchbuffer *batch, > > OUT_BATCH(u.ui); > > } > > > > +void gen12_render_clearfunc(struct intel_batchbuffer *batch, > > + const struct igt_buf *dst, unsigned int dst_x, unsigned > int dst_y, > > + unsigned int width, unsigned int height); > > void gen12_render_copyfunc(struct intel_batchbuffer *batch, > > drm_intel_context *context, > > const struct igt_buf *src, unsigned src_x, unsigned > src_y, diff > > --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c index > > 85ae4cab..fa985fec 100644 > > --- a/lib/rendercopy_gen9.c > > +++ b/lib/rendercopy_gen9.c > > @@ -1110,6 +1110,120 @@ void _gen9_render_copyfunc(struct > intel_batchbuffer *batch, > > intel_batchbuffer_reset(batch); > > } > > > > +static > > +void _gen12_render_clearfunc(struct intel_batchbuffer *batch, > > + drm_intel_context *context, > > + const struct igt_buf *dst, unsigned int dst_x, > > + unsigned int dst_y, unsigned int width, unsigned int > height, > > + drm_intel_bo *aux_pgtable_bo, > > + const uint32_t ps_kernel[][4], > > + uint32_t ps_kernel_size) > > +{ > > The implementation of this function is nearly identical to > _gen9_render_copyfunc; can we find a way to just re-use that function and > make it smart enough to deal with a NULL src so that we don't have so much > code duplication here? That will likely make it easier when we add new > generations in the future and need to tweak the general state emission. My starting point was a copy of render_copyfunc. As I'm not really sure what the sequence would be I started testing with this. I could modify _gen9_render_copyfunc so that I supports color clear as well and handle the NULL src's what comes with color clear. > > I'm not an expert on the 3d pipeline so I don't have a good feel for the state that > we need to emit, but it doesn't look like we're binding the destination surface > anywhere here (i.e., as we do in > gen8_bind_surfaces()) --- is that expected/okay? Well, this is something that I'm not sure of. I was hoping that someone could give me tips/pointers how to deal with this 3d pipeline. > > > + uint32_t ps_sampler_state, ps_kernel_off; > > + uint32_t scissor_state; > > + uint32_t vertex_buffer; > > + uint32_t batch_end; > > + uint32_t aux_pgtable_state; > > + > > + intel_batchbuffer_flush_with_context(batch, context); > > + > > + intel_batchbuffer_align(batch, 8); > > + > > + batch->ptr = &batch->buffer[BATCH_STATE_SPLIT]; > > + > > + annotation_init(&aub_annotations); > > + > > + ps_sampler_state = gen8_create_sampler(batch); > > + ps_kernel_off = gen8_fill_ps(batch, ps_kernel, ps_kernel_size); > > + vertex_buffer = gen7_fill_vertex_buffer_data(batch, NULL, > > + 0, 0, > > + dst_x, dst_y, > > + width, height); > > + cc.cc_state = gen6_create_cc_state(batch); > > + cc.blend_state = gen8_create_blend_state(batch); > > + viewport.cc_state = gen6_create_cc_viewport(batch); > > + viewport.sf_clip_state = gen7_create_sf_clip_viewport(batch); > > + scissor_state = gen6_create_scissor_rect(batch); > > + > > + aux_pgtable_state = gen12_create_aux_pgtable_state(batch, > > + aux_pgtable_bo); > > + > > + /* TODO: there is other state which isn't setup */ > > + > > + assert(batch->ptr < &batch->buffer[4095]); > > + > > + batch->ptr = batch->buffer; > > + > > + /* Start emitting the commands. The order roughly follows the mesa > blorp > > + * order */ > > + OUT_BATCH(G4X_PIPELINE_SELECT | PIPELINE_SELECT_3D | > > + GEN9_PIPELINE_SELECTION_MASK); > > + > > + gen12_emit_aux_pgtable_state(batch, aux_pgtable_state, true); > > + > > + gen8_emit_sip(batch); > > + > > + gen7_emit_push_constants(batch); > > + > > + gen9_emit_state_base_address(batch); > > + > > + OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC); > > + OUT_BATCH(viewport.cc_state); > > + OUT_BATCH(GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP); > > + OUT_BATCH(viewport.sf_clip_state); > > + > > + gen7_emit_urb(batch); > > + > > + gen8_emit_cc(batch); > > + > > + gen8_emit_multisample(batch); > > + > > + gen8_emit_null_state(batch); > > + > > + OUT_BATCH(GEN7_3DSTATE_STREAMOUT | (5 - 2)); > > + OUT_BATCH(0); > > + OUT_BATCH(0); > > + OUT_BATCH(0); > > + OUT_BATCH(0); > > + > > + gen7_emit_clip(batch); > > + > > + gen8_emit_sf(batch); > > + > > + gen8_emit_ps(batch, ps_kernel_off); > > Again, my 3d pipeline experience is pretty minimal so I may be way off base, but > don't we want to trigger a fast clear here? If I understand bspec 46969 / 47704 > correctly, I think we need to set bit 8 in dword 5 of the 3DSTATE_PS instruction > for that, which our usual pixel shader emission helper doesn't do. Yes, we do want to trigger a fast clear here. I'll update this on next spin. > > > + > > + OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS); > > + OUT_BATCH(ps_sampler_state); > > + > > + OUT_BATCH(GEN8_3DSTATE_SCISSOR_STATE_POINTERS); > > + OUT_BATCH(scissor_state); > > + > > + gen9_emit_depth(batch); > > + > > + gen7_emit_clear(batch); > > + > > + gen6_emit_drawing_rectangle(batch, dst); > > + > > + gen7_emit_vertex_buffer(batch, vertex_buffer); > > + gen6_emit_vertex_elements(batch); > > + > > + gen8_emit_vf_topology(batch); > > + gen8_emit_primitive(batch, vertex_buffer); > > + > > + OUT_BATCH(MI_BATCH_BUFFER_END); > > + > > + batch_end = intel_batchbuffer_align(batch, 8); > > + assert(batch_end < BATCH_STATE_SPLIT); > > + annotation_add_batch(&aub_annotations, batch_end); > > + > > + dump_batch(batch); > > + > > + annotation_flush(&aub_annotations, batch); > > + > > + gen6_render_flush(batch, context, batch_end); > > + intel_batchbuffer_reset(batch); > > +} > > + > > void gen9_render_copyfunc(struct intel_batchbuffer *batch, > > drm_intel_context *context, > > const struct igt_buf *src, unsigned src_x, unsigned > src_y, @@ > > -1153,3 +1267,20 @@ void gen12_render_copyfunc(struct > > intel_batchbuffer *batch, > > > > gen12_aux_pgtable_cleanup(&pgtable_info); > > } > > + > > +void gen12_render_clearfunc(struct intel_batchbuffer *batch, > > + const struct igt_buf *dst, unsigned int dst_x, unsigned > int dst_y, > > + unsigned int width, unsigned int height) { > > + struct aux_pgtable_info pgtable_info = { }; > > + > > + gen12_aux_pgtable_init(&pgtable_info, batch->bufmgr, NULL, dst); > > + > > + _gen12_render_clearfunc(batch, NULL, > > + dst, dst_x, dst_y, 0, 0, > > + pgtable_info.pgtable_bo, > > + gen12_render_copy, > > + sizeof(gen12_render_copy)); > > The rendercopy shader samples values from the source buffer and writes them > to the destination; is that appropriate to use in this case? > Should we be using a different/simpler shader when we're just trying to do a > clear? This has been discussed in the past that should we use different shader here. Should this shader update come from MESA side? I know, that I'm an expert on writing shader code. > > > + > > + gen12_aux_pgtable_cleanup(&pgtable_info); > > +} > > diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c index > > c23b4e44..c9a781bf 100644 > > --- a/tests/kms_ccs.c > > +++ b/tests/kms_ccs.c > > @@ -50,10 +50,12 @@ enum test_fb_flags { > > FB_MISALIGN_AUX_STRIDE = 1 << 2, > > FB_SMALL_AUX_STRIDE = 1 << 3, > > FB_ZERO_AUX_STRIDE = 1 << 4, > > + FB_CLEAR_COLOR = 1 << 5, > > }; > > > > typedef struct { > > int drm_fd; > > + int devid; > > igt_display_t display; > > igt_output_t *output; > > enum pipe pipe; > > @@ -62,6 +64,9 @@ typedef struct { > > igt_pipe_crc_t *pipe_crc; > > uint32_t format; > > uint64_t ccs_modifier; > > + struct igt_fb primary_fb; > > + igt_plane_t *primary; > > + igt_render_clearfunc_t fast_clear; > > } data_t; > > > > static const struct { > > @@ -290,6 +295,17 @@ static igt_plane_t *compatible_main_plane(data_t > *data) > > return igt_output_get_plane_type(data->output, > > DRM_PLANE_TYPE_PRIMARY); } > > > > +static void scratch_buf_init(data_t *data, drm_intel_bo *drmibo, > > + struct igt_buf *igtbo) > > +{ > > + igtbo->bo = drmibo; > > + igtbo->surface[0].stride = data->primary_fb.strides[0]; > > + igtbo->tiling = data->primary_fb.modifier; > > + igtbo->surface[0].size = data->primary_fb.size; > > + igtbo->bpp = data->primary_fb.plane_bpp[0]; } > > + > > + > > static bool try_config(data_t *data, enum test_fb_flags fb_flags, > > igt_crc_t *crc) > > { > > @@ -299,6 +315,10 @@ static bool try_config(data_t *data, enum > test_fb_flags fb_flags, > > int fb_width = drm_mode->hdisplay; > > enum igt_commit_style commit; > > struct igt_fb fb, fb_sprite; > > + drm_intel_bufmgr *bufmgr = NULL; > > + drm_intel_bo *drmibo; > > + struct intel_batchbuffer *batch; > > + struct igt_buf igtbo; > > int ret; > > > > if (data->display.is_atomic) > > @@ -333,7 +353,6 @@ static bool try_config(data_t *data, enum > > test_fb_flags fb_flags, > > > > if (data->flags & TEST_FAIL_ON_ADDFB2) > > return true; > > - > > igt_plane_set_position(primary, 0, 0); > > igt_plane_set_size(primary, drm_mode->hdisplay, drm_mode- > >vdisplay); > > igt_plane_set_fb(primary, &fb); > > @@ -349,6 +368,22 @@ static bool try_config(data_t *data, enum > test_fb_flags fb_flags, > > if (data->flags & TEST_BAD_ROTATION_90) > > igt_plane_set_rotation(primary, IGT_ROTATION_90); > > > > + if (fb_flags & FB_CLEAR_COLOR) { > > + drmibo = gem_handle_to_libdrm_bo(bufmgr, data->drm_fd, "", > > + data- > >primary_fb.gem_handle); > > + igt_assert(drmibo); > > + > > + scratch_buf_init(data, drmibo, &igtbo); > > + > > + batch = intel_batchbuffer_alloc(bufmgr, data->devid); > > + igt_assert(batch); > > + > > + /* use fast clear */ > > + data->fast_clear(batch, &igtbo, 0, 0, > > + data->primary_fb.width, > > + data->primary_fb.height); > > + } > > + > > ret = igt_display_try_commit2(display, commit); > > if (data->flags & TEST_BAD_ROTATION_90) { > > igt_assert_eq(ret, -EINVAL); > > @@ -370,6 +405,7 @@ static bool try_config(data_t *data, enum > > test_fb_flags fb_flags, > > > > igt_plane_set_fb(primary, NULL); > > igt_plane_set_rotation(primary, IGT_ROTATION_0); > > + > > igt_display_commit2(display, commit); > > > > if (data->flags & TEST_CRC) > > @@ -386,12 +422,18 @@ static int test_ccs(data_t *data) > > if (data->flags & TEST_CRC) { > > data->pipe_crc = igt_pipe_crc_new(data->drm_fd, data->pipe, > > INTEL_PIPE_CRC_SOURCE_AUTO); > > > > - if (try_config(data, fb_flags | FB_COMPRESSED, &ref_crc) && > > - try_config(data, fb_flags, &crc)) { > > + if (data->ccs_modifier == > > +LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC && > > This should probably be separated out into a helper function since we'll probably > have other "CCS_CC" modifiers on future platforms. Yes. Just to be futureproof. > > > + data->format == DRM_FORMAT_YUYV) { > > It's not obvious to me why we test for YUYV here? I just selected one format to test this feature. Maybe we should loop through all formats? Thanks again for a review! I'll try to address these issues. Cheers, Mika > > > Matt > > > + valid_tests += try_config(data, fb_flags | > FB_COMPRESSED, &ref_crc); > > + valid_tests += try_config(data, fb_flags | > FB_COMPRESSED | > > +FB_CLEAR_COLOR, &crc); > > igt_assert_crc_equal(&crc, &ref_crc); > > - valid_tests++; > > + } else { > > + if (try_config(data, fb_flags | FB_COMPRESSED, > &ref_crc) && > > + try_config(data, fb_flags, &crc)) { > > + igt_assert_crc_equal(&crc, &ref_crc); > > + valid_tests++; > > + } > > } > > - > > igt_pipe_crc_free(data->pipe_crc); > > data->pipe_crc = NULL; > > } > > @@ -471,11 +513,13 @@ igt_main_args("c", NULL, help_str, opt_handler, > NULL) > > igt_fixture { > > data.drm_fd = drm_open_driver_master(DRIVER_INTEL); > > > > - igt_require(intel_gen(intel_get_drm_devid(data.drm_fd)) >= 9); > > + data.devid = intel_gen(intel_get_drm_devid(data.drm_fd)); > > + igt_require(data.devid >= 9); > > kmstest_set_vt_graphics_mode(); > > igt_require_pipe_crc(data.drm_fd); > > > > igt_display_require(&data.display, data.drm_fd); > > + data.fast_clear = igt_get_render_clearfunc(data.devid); > > } > > > > for_each_pipe_static(pipe) { > > -- > > 2.20.1 > > > > _______________________________________________ > > igt-dev mailing list > > igt-dev@lists.freedesktop.org > > https://lists.freedesktop.org/mailman/listinfo/igt-dev > > -- > Matt Roper > Graphics Software Engineer > VTT-OSGC Platform Enablement > Intel Corporation > (916) 356-2795 _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 9+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for tests/kms_ccs: CCS Clear Color test (rev2) 2020-05-19 9:48 [igt-dev] [RFC PATCH i-g-t 0/2] tests/kms_ccs: CCS Clear Color Test Mika Kahola 2020-05-19 9:48 ` [igt-dev] [PATCH i-g-t 1/2] tests/kms_ccs: Add debug information on format modifier Mika Kahola 2020-05-19 9:48 ` [igt-dev] [PATCH i-g-t 2/2] tests/kms_ccs: CCS Clear Color test Mika Kahola @ 2020-05-19 10:37 ` Patchwork 2020-05-19 14:27 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork 3 siblings, 0 replies; 9+ messages in thread From: Patchwork @ 2020-05-19 10:37 UTC (permalink / raw) To: Mika Kahola; +Cc: igt-dev == Series Details == Series: tests/kms_ccs: CCS Clear Color test (rev2) URL : https://patchwork.freedesktop.org/series/76536/ State : success == Summary == CI Bug Log - changes from CI_DRM_8501 -> IGTPW_4583 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/index.html Known issues ------------ Here are the changes found in IGTPW_4583 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@i915_selftest@live@blt: - fi-bwr-2160: [PASS][1] -> [INCOMPLETE][2] ([i915#489]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/fi-bwr-2160/igt@i915_selftest@live@blt.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/fi-bwr-2160/igt@i915_selftest@live@blt.html #### Possible fixes #### * igt@i915_selftest@live@execlists: - fi-tgl-y: [INCOMPLETE][3] ([i915#1803]) -> [PASS][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/fi-tgl-y/igt@i915_selftest@live@execlists.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/fi-tgl-y/igt@i915_selftest@live@execlists.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [i915#1803]: https://gitlab.freedesktop.org/drm/intel/issues/1803 [i915#489]: https://gitlab.freedesktop.org/drm/intel/issues/489 Participating hosts (50 -> 42) ------------------------------ Missing (8): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-hsw-4770 fi-byt-clapper fi-bdw-samus Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_5659 -> IGTPW_4583 CI-20190529: 20190529 CI_DRM_8501: c6bfff03c22fb90dcf1ddacb745667467ab5ab73 @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_4583: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/index.html IGT_5659: 66ab5e42811fee3dea8c21ab29e70e323a0650de @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/index.html _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 9+ messages in thread
* [igt-dev] ✗ Fi.CI.IGT: failure for tests/kms_ccs: CCS Clear Color test (rev2) 2020-05-19 9:48 [igt-dev] [RFC PATCH i-g-t 0/2] tests/kms_ccs: CCS Clear Color Test Mika Kahola ` (2 preceding siblings ...) 2020-05-19 10:37 ` [igt-dev] ✓ Fi.CI.BAT: success for tests/kms_ccs: CCS Clear Color test (rev2) Patchwork @ 2020-05-19 14:27 ` Patchwork 2020-05-20 8:27 ` Kahola, Mika 3 siblings, 1 reply; 9+ messages in thread From: Patchwork @ 2020-05-19 14:27 UTC (permalink / raw) To: Mika Kahola; +Cc: igt-dev == Series Details == Series: tests/kms_ccs: CCS Clear Color test (rev2) URL : https://patchwork.freedesktop.org/series/76536/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8501_full -> IGTPW_4583_full ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with IGTPW_4583_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in IGTPW_4583_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/index.html Possible new issues ------------------- Here are the unknown changes that may have been introduced in IGTPW_4583_full: ### IGT changes ### #### Possible regressions #### * igt@i915_pm_dc@dc5-psr: - shard-tglb: [PASS][1] -> [FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-tglb3/igt@i915_pm_dc@dc5-psr.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-tglb7/igt@i915_pm_dc@dc5-psr.html * igt@kms_ccs@pipe-c-crc-sprite-planes-basic: - shard-iclb: [PASS][3] -> [FAIL][4] +2 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-iclb5/igt@kms_ccs@pipe-c-crc-sprite-planes-basic.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-iclb8/igt@kms_ccs@pipe-c-crc-sprite-planes-basic.html #### Warnings #### * igt@kms_ccs@pipe-c-crc-primary-basic: - shard-glk: [SKIP][5] ([fdo#109271]) -> [FAIL][6] +2 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-glk5/igt@kms_ccs@pipe-c-crc-primary-basic.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-glk6/igt@kms_ccs@pipe-c-crc-primary-basic.html * igt@kms_ccs@pipe-c-crc-primary-rotation-180: - shard-apl: [SKIP][7] ([fdo#109271]) -> [FAIL][8] +2 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-apl8/igt@kms_ccs@pipe-c-crc-primary-rotation-180.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-apl2/igt@kms_ccs@pipe-c-crc-primary-rotation-180.html * igt@kms_ccs@pipe-c-crc-sprite-planes-basic: - shard-kbl: [SKIP][9] ([fdo#109271]) -> [FAIL][10] +1 similar issue [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-kbl7/igt@kms_ccs@pipe-c-crc-sprite-planes-basic.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-kbl4/igt@kms_ccs@pipe-c-crc-sprite-planes-basic.html Known issues ------------ Here are the changes found in IGTPW_4583_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@i915_pm_dc@dc5-psr: - shard-iclb: [PASS][11] -> [FAIL][12] ([i915#1899]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-iclb2/igt@i915_pm_dc@dc5-psr.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-iclb4/igt@i915_pm_dc@dc5-psr.html * igt@i915_suspend@sysfs-reader: - shard-kbl: [PASS][13] -> [DMESG-WARN][14] ([i915#180]) +2 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-kbl3/igt@i915_suspend@sysfs-reader.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-kbl7/igt@i915_suspend@sysfs-reader.html * igt@kms_ccs@pipe-a-crc-sprite-planes-basic: - shard-tglb: [PASS][15] -> [FAIL][16] ([i915#1483] / [i915#1897]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-tglb8/igt@kms_ccs@pipe-a-crc-sprite-planes-basic.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-tglb1/igt@kms_ccs@pipe-a-crc-sprite-planes-basic.html - shard-kbl: [PASS][17] -> [FAIL][18] ([fdo#108145]) +1 similar issue [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-kbl4/igt@kms_ccs@pipe-a-crc-sprite-planes-basic.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-kbl1/igt@kms_ccs@pipe-a-crc-sprite-planes-basic.html - shard-apl: [PASS][19] -> [FAIL][20] ([fdo#108145]) +1 similar issue [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-apl2/igt@kms_ccs@pipe-a-crc-sprite-planes-basic.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-apl1/igt@kms_ccs@pipe-a-crc-sprite-planes-basic.html - shard-glk: [PASS][21] -> [FAIL][22] ([fdo#108145]) +1 similar issue [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-glk8/igt@kms_ccs@pipe-a-crc-sprite-planes-basic.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-glk5/igt@kms_ccs@pipe-a-crc-sprite-planes-basic.html * igt@kms_ccs@pipe-b-crc-sprite-planes-basic: - shard-tglb: [PASS][23] -> [FAIL][24] ([i915#1897]) +2 similar issues [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-tglb8/igt@kms_ccs@pipe-b-crc-sprite-planes-basic.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-tglb5/igt@kms_ccs@pipe-b-crc-sprite-planes-basic.html * igt@kms_cursor_crc@pipe-a-cursor-128x128-random: - shard-kbl: [PASS][25] -> [FAIL][26] ([i915#54] / [i915#93] / [i915#95]) +3 similar issues [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-kbl3/igt@kms_cursor_crc@pipe-a-cursor-128x128-random.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-kbl6/igt@kms_cursor_crc@pipe-a-cursor-128x128-random.html * igt@kms_cursor_edge_walk@pipe-a-64x64-bottom-edge: - shard-kbl: [PASS][27] -> [FAIL][28] ([i915#70] / [i915#93] / [i915#95]) [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-kbl1/igt@kms_cursor_edge_walk@pipe-a-64x64-bottom-edge.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-kbl2/igt@kms_cursor_edge_walk@pipe-a-64x64-bottom-edge.html * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic: - shard-glk: [PASS][29] -> [FAIL][30] ([i915#72]) [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-glk2/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-glk7/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html * igt@kms_psr@psr2_no_drrs: - shard-iclb: [PASS][31] -> [SKIP][32] ([fdo#109441]) +2 similar issues [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-iclb2/igt@kms_psr@psr2_no_drrs.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-iclb5/igt@kms_psr@psr2_no_drrs.html #### Possible fixes #### * igt@i915_pm_dc@dc3co-vpb-simulation: - shard-tglb: [SKIP][33] ([i915#1904]) -> [PASS][34] [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-tglb8/igt@i915_pm_dc@dc3co-vpb-simulation.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-tglb1/igt@i915_pm_dc@dc3co-vpb-simulation.html * igt@kms_color@pipe-c-degamma: - shard-apl: [FAIL][35] ([i915#71]) -> [PASS][36] [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-apl6/igt@kms_color@pipe-c-degamma.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-apl8/igt@kms_color@pipe-c-degamma.html - shard-glk: [FAIL][37] ([i915#71]) -> [PASS][38] [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-glk7/igt@kms_color@pipe-c-degamma.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-glk7/igt@kms_color@pipe-c-degamma.html - shard-kbl: [FAIL][39] ([i915#71]) -> [PASS][40] [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-kbl6/igt@kms_color@pipe-c-degamma.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-kbl4/igt@kms_color@pipe-c-degamma.html * igt@kms_cursor_crc@pipe-a-cursor-64x64-onscreen: - shard-kbl: [FAIL][41] ([i915#54] / [i915#93] / [i915#95]) -> [PASS][42] [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-kbl6/igt@kms_cursor_crc@pipe-a-cursor-64x64-onscreen.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-kbl6/igt@kms_cursor_crc@pipe-a-cursor-64x64-onscreen.html * igt@kms_fbcon_fbt@psr-suspend: - shard-tglb: [FAIL][43] ([i915#1121]) -> [PASS][44] [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-tglb5/igt@kms_fbcon_fbt@psr-suspend.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-tglb7/igt@kms_fbcon_fbt@psr-suspend.html * {igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2}: - shard-glk: [FAIL][45] ([i915#79]) -> [PASS][46] +1 similar issue [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-glk9/igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-glk6/igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2.html * {igt@kms_flip@flip-vs-suspend-interruptible@c-dp1}: - shard-apl: [DMESG-WARN][47] ([i915#180]) -> [PASS][48] +3 similar issues [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-apl4/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-apl6/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html * {igt@kms_flip@flip-vs-suspend@c-dp1}: - shard-kbl: [DMESG-WARN][49] ([i915#180]) -> [PASS][50] +5 similar issues [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-kbl7/igt@kms_flip@flip-vs-suspend@c-dp1.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-kbl3/igt@kms_flip@flip-vs-suspend@c-dp1.html * igt@kms_plane_cursor@pipe-a-overlay-size-64: - shard-apl: [FAIL][51] ([i915#1559] / [i915#95]) -> [PASS][52] +1 similar issue [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-apl4/igt@kms_plane_cursor@pipe-a-overlay-size-64.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-apl2/igt@kms_plane_cursor@pipe-a-overlay-size-64.html - shard-kbl: [FAIL][53] ([i915#1559] / [i915#93] / [i915#95]) -> [PASS][54] +1 similar issue [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-kbl4/igt@kms_plane_cursor@pipe-a-overlay-size-64.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-kbl4/igt@kms_plane_cursor@pipe-a-overlay-size-64.html * igt@kms_psr@psr2_primary_page_flip: - shard-iclb: [SKIP][55] ([fdo#109441]) -> [PASS][56] +1 similar issue [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-iclb1/igt@kms_psr@psr2_primary_page_flip.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-iclb2/igt@kms_psr@psr2_primary_page_flip.html * {igt@perf@polling-parameterized}: - shard-tglb: [FAIL][57] ([i915#1542]) -> [PASS][58] [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-tglb7/igt@perf@polling-parameterized.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-tglb1/igt@perf@polling-parameterized.html #### Warnings #### * igt@i915_pm_dc@dc3co-vpb-simulation: - shard-iclb: [SKIP][59] ([i915#658]) -> [SKIP][60] ([i915#588]) [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-iclb8/igt@i915_pm_dc@dc3co-vpb-simulation.html [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-iclb2/igt@i915_pm_dc@dc3co-vpb-simulation.html * igt@kms_ccs@pipe-c-crc-primary-rotation-180: - shard-kbl: [SKIP][61] ([fdo#109271]) -> [FAIL][62] ([i915#93] / [i915#95]) [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-kbl7/igt@kms_ccs@pipe-c-crc-primary-rotation-180.html [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-kbl1/igt@kms_ccs@pipe-c-crc-primary-rotation-180.html * igt@kms_content_protection@atomic: - shard-apl: [TIMEOUT][63] ([i915#1319]) -> [DMESG-FAIL][64] ([fdo#110321]) [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-apl3/igt@kms_content_protection@atomic.html [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-apl3/igt@kms_content_protection@atomic.html * igt@kms_content_protection@atomic-dpms: - shard-apl: [FAIL][65] ([fdo#110321] / [fdo#110336]) -> [TIMEOUT][66] ([i915#1319]) [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-apl2/igt@kms_content_protection@atomic-dpms.html [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-apl7/igt@kms_content_protection@atomic-dpms.html * igt@kms_content_protection@srm: - shard-apl: [FAIL][67] ([fdo#110321]) -> [DMESG-FAIL][68] ([fdo#110321]) [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-apl7/igt@kms_content_protection@srm.html [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-apl8/igt@kms_content_protection@srm.html * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max: - shard-kbl: [FAIL][69] ([fdo#108145] / [i915#265]) -> [FAIL][70] ([fdo#108145] / [i915#265] / [i915#93] / [i915#95]) [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard-kbl3/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max.html [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard-kbl7/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [fdo#110321]: https://bugs.freedesktop.org/show_bug.cgi?id=110321 [fdo#110336]: https://bugs.freedesktop.org/show_bug.cgi?id=110336 [i915#1121]: https://gitlab.freedesktop.org/drm/intel/issues/1121 [i915#1319]: https://gitlab.freedesktop.org/drm/intel/issues/1319 [i915#1483]: https://gitlab.freedesktop.org/drm/intel/issues/1483 [i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542 [i915#1559]: https://gitlab.freedesktop.org/drm/intel/issues/1559 [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180 [i915#1823]: https://gitlab.freedesktop.org/drm/intel/issues/1823 [i915#1897]: https://gitlab.freedesktop.org/drm/intel/issues/1897 [i915#1899]: https://gitlab.freedesktop.org/drm/intel/issues/1899 [i915#1904]: https://gitlab.freedesktop.org/drm/intel/issues/1904 [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265 [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54 [i915#588]: https://gitlab.freedesktop.org/drm/intel/issues/588 [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658 [i915#70]: https://gitlab.freedesktop.org/drm/intel/issues/70 [i915#71]: https://gitlab.freedesktop.org/drm/intel/issues/71 [i915#72]: https://gitlab.freedesktop.org/drm/intel/issues/72 [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79 [i915#93]: https://gitlab.freedesktop.org/drm/intel/issues/93 [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95 Participating hosts (11 -> 8) ------------------------------ Missing (3): pig-skl-6260u pig-glk-j5005 pig-icl-1065g7 Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_5659 -> IGTPW_4583 * Piglit: piglit_4509 -> None CI-20190529: 20190529 CI_DRM_8501: c6bfff03c22fb90dcf1ddacb745667467ab5ab73 @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_4583: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/index.html IGT_5659: 66ab5e42811fee3dea8c21ab29e70e323a0650de @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/index.html _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [igt-dev] ✗ Fi.CI.IGT: failure for tests/kms_ccs: CCS Clear Color test (rev2) 2020-05-19 14:27 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork @ 2020-05-20 8:27 ` Kahola, Mika 0 siblings, 0 replies; 9+ messages in thread From: Kahola, Mika @ 2020-05-20 8:27 UTC (permalink / raw) To: igt-dev@lists.freedesktop.org > -----Original Message----- > From: Patchwork <patchwork@emeril.freedesktop.org> > Sent: Tuesday, May 19, 2020 5:28 PM > To: Kahola, Mika <mika.kahola@intel.com> > Cc: igt-dev@lists.freedesktop.org > Subject: ✗ Fi.CI.IGT: failure for tests/kms_ccs: CCS Clear Color test (rev2) > > == Series Details == > > Series: tests/kms_ccs: CCS Clear Color test (rev2) > URL : https://patchwork.freedesktop.org/series/76536/ > State : failure > > == Summary == > > CI Bug Log - changes from CI_DRM_8501_full -> IGTPW_4583_full > ==================================================== > > Summary > ------- > > **FAILURE** > > Serious unknown changes coming with IGTPW_4583_full absolutely need to be > verified manually. > > If you think the reported changes have nothing to do with the changes > introduced in IGTPW_4583_full, please notify your bug team to allow them > to document this new failure mode, which will reduce false positives in CI. > > External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/index.html > > Possible new issues > ------------------- > > Here are the unknown changes that may have been introduced in > IGTPW_4583_full: > > ### IGT changes ### > > #### Possible regressions #### > > * igt@i915_pm_dc@dc5-psr: > - shard-tglb: [PASS][1] -> [FAIL][2] > [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > tglb3/igt@i915_pm_dc@dc5-psr.html > [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > tglb7/igt@i915_pm_dc@dc5-psr.html > > * igt@kms_ccs@pipe-c-crc-sprite-planes-basic: > - shard-iclb: [PASS][3] -> [FAIL][4] +2 similar issues > [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > iclb5/igt@kms_ccs@pipe-c-crc-sprite-planes-basic.html > [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > iclb8/igt@kms_ccs@pipe-c-crc-sprite-planes-basic.html This was expected as we test with clear color format modifier DEBUG: Modifier in use: LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC Kernel is missing clear color patches [1][2] [1] https://patchwork.freedesktop.org/patch/346201/?series=71125&rev=10 [2] https://patchwork.freedesktop.org/patch/345882/?series=71125&rev=10 > > > #### Warnings #### > > * igt@kms_ccs@pipe-c-crc-primary-basic: > - shard-glk: [SKIP][5] ([fdo#109271]) -> [FAIL][6] +2 similar issues > [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > glk5/igt@kms_ccs@pipe-c-crc-primary-basic.html > [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > glk6/igt@kms_ccs@pipe-c-crc-primary-basic.html > > * igt@kms_ccs@pipe-c-crc-primary-rotation-180: > - shard-apl: [SKIP][7] ([fdo#109271]) -> [FAIL][8] +2 similar issues > [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > apl8/igt@kms_ccs@pipe-c-crc-primary-rotation-180.html > [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > apl2/igt@kms_ccs@pipe-c-crc-primary-rotation-180.html > > * igt@kms_ccs@pipe-c-crc-sprite-planes-basic: > - shard-kbl: [SKIP][9] ([fdo#109271]) -> [FAIL][10] +1 similar issue > [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > kbl7/igt@kms_ccs@pipe-c-crc-sprite-planes-basic.html > [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > kbl4/igt@kms_ccs@pipe-c-crc-sprite-planes-basic.html > > > Known issues > ------------ > > Here are the changes found in IGTPW_4583_full that come from known issues: > > ### IGT changes ### > > #### Issues hit #### > > * igt@i915_pm_dc@dc5-psr: > - shard-iclb: [PASS][11] -> [FAIL][12] ([i915#1899]) > [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > iclb2/igt@i915_pm_dc@dc5-psr.html > [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > iclb4/igt@i915_pm_dc@dc5-psr.html > > * igt@i915_suspend@sysfs-reader: > - shard-kbl: [PASS][13] -> [DMESG-WARN][14] ([i915#180]) +2 similar > issues > [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > kbl3/igt@i915_suspend@sysfs-reader.html > [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > kbl7/igt@i915_suspend@sysfs-reader.html > > * igt@kms_ccs@pipe-a-crc-sprite-planes-basic: > - shard-tglb: [PASS][15] -> [FAIL][16] ([i915#1483] / [i915#1897]) > [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > tglb8/igt@kms_ccs@pipe-a-crc-sprite-planes-basic.html > [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > tglb1/igt@kms_ccs@pipe-a-crc-sprite-planes-basic.html > - shard-kbl: [PASS][17] -> [FAIL][18] ([fdo#108145]) +1 similar issue > [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > kbl4/igt@kms_ccs@pipe-a-crc-sprite-planes-basic.html > [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > kbl1/igt@kms_ccs@pipe-a-crc-sprite-planes-basic.html > - shard-apl: [PASS][19] -> [FAIL][20] ([fdo#108145]) +1 similar issue > [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > apl2/igt@kms_ccs@pipe-a-crc-sprite-planes-basic.html > [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > apl1/igt@kms_ccs@pipe-a-crc-sprite-planes-basic.html > - shard-glk: [PASS][21] -> [FAIL][22] ([fdo#108145]) +1 similar issue > [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > glk8/igt@kms_ccs@pipe-a-crc-sprite-planes-basic.html > [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > glk5/igt@kms_ccs@pipe-a-crc-sprite-planes-basic.html > > * igt@kms_ccs@pipe-b-crc-sprite-planes-basic: > - shard-tglb: [PASS][23] -> [FAIL][24] ([i915#1897]) +2 similar issues > [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > tglb8/igt@kms_ccs@pipe-b-crc-sprite-planes-basic.html > [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > tglb5/igt@kms_ccs@pipe-b-crc-sprite-planes-basic.html > > * igt@kms_cursor_crc@pipe-a-cursor-128x128-random: > - shard-kbl: [PASS][25] -> [FAIL][26] ([i915#54] / [i915#93] / [i915#95]) +3 > similar issues > [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > kbl3/igt@kms_cursor_crc@pipe-a-cursor-128x128-random.html > [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > kbl6/igt@kms_cursor_crc@pipe-a-cursor-128x128-random.html > > * igt@kms_cursor_edge_walk@pipe-a-64x64-bottom-edge: > - shard-kbl: [PASS][27] -> [FAIL][28] ([i915#70] / [i915#93] / [i915#95]) > [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > kbl1/igt@kms_cursor_edge_walk@pipe-a-64x64-bottom-edge.html > [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > kbl2/igt@kms_cursor_edge_walk@pipe-a-64x64-bottom-edge.html > > * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic: > - shard-glk: [PASS][29] -> [FAIL][30] ([i915#72]) > [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > glk2/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html > [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > glk7/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html > > * igt@kms_psr@psr2_no_drrs: > - shard-iclb: [PASS][31] -> [SKIP][32] ([fdo#109441]) +2 similar issues > [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > iclb2/igt@kms_psr@psr2_no_drrs.html > [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > iclb5/igt@kms_psr@psr2_no_drrs.html > > > #### Possible fixes #### > > * igt@i915_pm_dc@dc3co-vpb-simulation: > - shard-tglb: [SKIP][33] ([i915#1904]) -> [PASS][34] > [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > tglb8/igt@i915_pm_dc@dc3co-vpb-simulation.html > [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > tglb1/igt@i915_pm_dc@dc3co-vpb-simulation.html > > * igt@kms_color@pipe-c-degamma: > - shard-apl: [FAIL][35] ([i915#71]) -> [PASS][36] > [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > apl6/igt@kms_color@pipe-c-degamma.html > [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > apl8/igt@kms_color@pipe-c-degamma.html > - shard-glk: [FAIL][37] ([i915#71]) -> [PASS][38] > [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > glk7/igt@kms_color@pipe-c-degamma.html > [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > glk7/igt@kms_color@pipe-c-degamma.html > - shard-kbl: [FAIL][39] ([i915#71]) -> [PASS][40] > [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > kbl6/igt@kms_color@pipe-c-degamma.html > [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > kbl4/igt@kms_color@pipe-c-degamma.html > > * igt@kms_cursor_crc@pipe-a-cursor-64x64-onscreen: > - shard-kbl: [FAIL][41] ([i915#54] / [i915#93] / [i915#95]) -> [PASS][42] > [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > kbl6/igt@kms_cursor_crc@pipe-a-cursor-64x64-onscreen.html > [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > kbl6/igt@kms_cursor_crc@pipe-a-cursor-64x64-onscreen.html > > * igt@kms_fbcon_fbt@psr-suspend: > - shard-tglb: [FAIL][43] ([i915#1121]) -> [PASS][44] > [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > tglb5/igt@kms_fbcon_fbt@psr-suspend.html > [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > tglb7/igt@kms_fbcon_fbt@psr-suspend.html > > * {igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2}: > - shard-glk: [FAIL][45] ([i915#79]) -> [PASS][46] +1 similar issue > [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > glk9/igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2.html > [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > glk6/igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2.html > > * {igt@kms_flip@flip-vs-suspend-interruptible@c-dp1}: > - shard-apl: [DMESG-WARN][47] ([i915#180]) -> [PASS][48] +3 similar > issues > [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > apl4/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html > [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > apl6/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html > > * {igt@kms_flip@flip-vs-suspend@c-dp1}: > - shard-kbl: [DMESG-WARN][49] ([i915#180]) -> [PASS][50] +5 similar > issues > [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > kbl7/igt@kms_flip@flip-vs-suspend@c-dp1.html > [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > kbl3/igt@kms_flip@flip-vs-suspend@c-dp1.html > > * igt@kms_plane_cursor@pipe-a-overlay-size-64: > - shard-apl: [FAIL][51] ([i915#1559] / [i915#95]) -> [PASS][52] +1 similar > issue > [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > apl4/igt@kms_plane_cursor@pipe-a-overlay-size-64.html > [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > apl2/igt@kms_plane_cursor@pipe-a-overlay-size-64.html > - shard-kbl: [FAIL][53] ([i915#1559] / [i915#93] / [i915#95]) -> [PASS][54] > +1 similar issue > [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > kbl4/igt@kms_plane_cursor@pipe-a-overlay-size-64.html > [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > kbl4/igt@kms_plane_cursor@pipe-a-overlay-size-64.html > > * igt@kms_psr@psr2_primary_page_flip: > - shard-iclb: [SKIP][55] ([fdo#109441]) -> [PASS][56] +1 similar issue > [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > iclb1/igt@kms_psr@psr2_primary_page_flip.html > [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > iclb2/igt@kms_psr@psr2_primary_page_flip.html > > * {igt@perf@polling-parameterized}: > - shard-tglb: [FAIL][57] ([i915#1542]) -> [PASS][58] > [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > tglb7/igt@perf@polling-parameterized.html > [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > tglb1/igt@perf@polling-parameterized.html > > > #### Warnings #### > > * igt@i915_pm_dc@dc3co-vpb-simulation: > - shard-iclb: [SKIP][59] ([i915#658]) -> [SKIP][60] ([i915#588]) > [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > iclb8/igt@i915_pm_dc@dc3co-vpb-simulation.html > [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > iclb2/igt@i915_pm_dc@dc3co-vpb-simulation.html > > * igt@kms_ccs@pipe-c-crc-primary-rotation-180: > - shard-kbl: [SKIP][61] ([fdo#109271]) -> [FAIL][62] ([i915#93] / > [i915#95]) > [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > kbl7/igt@kms_ccs@pipe-c-crc-primary-rotation-180.html > [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > kbl1/igt@kms_ccs@pipe-c-crc-primary-rotation-180.html > > * igt@kms_content_protection@atomic: > - shard-apl: [TIMEOUT][63] ([i915#1319]) -> [DMESG-FAIL][64] > ([fdo#110321]) > [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > apl3/igt@kms_content_protection@atomic.html > [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > apl3/igt@kms_content_protection@atomic.html > > * igt@kms_content_protection@atomic-dpms: > - shard-apl: [FAIL][65] ([fdo#110321] / [fdo#110336]) -> [TIMEOUT][66] > ([i915#1319]) > [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > apl2/igt@kms_content_protection@atomic-dpms.html > [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > apl7/igt@kms_content_protection@atomic-dpms.html > > * igt@kms_content_protection@srm: > - shard-apl: [FAIL][67] ([fdo#110321]) -> [DMESG-FAIL][68] > ([fdo#110321]) > [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > apl7/igt@kms_content_protection@srm.html > [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > apl8/igt@kms_content_protection@srm.html > > * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max: > - shard-kbl: [FAIL][69] ([fdo#108145] / [i915#265]) -> [FAIL][70] > ([fdo#108145] / [i915#265] / [i915#93] / [i915#95]) > [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8501/shard- > kbl3/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max.html > [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/shard- > kbl7/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max.html > > > {name}: This element is suppressed. This means it is ignored when computing > the status of the difference (SUCCESS, WARNING, or FAILURE). > > [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 > [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 > [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 > [fdo#110321]: https://bugs.freedesktop.org/show_bug.cgi?id=110321 > [fdo#110336]: https://bugs.freedesktop.org/show_bug.cgi?id=110336 > [i915#1121]: https://gitlab.freedesktop.org/drm/intel/issues/1121 > [i915#1319]: https://gitlab.freedesktop.org/drm/intel/issues/1319 > [i915#1483]: https://gitlab.freedesktop.org/drm/intel/issues/1483 > [i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542 > [i915#1559]: https://gitlab.freedesktop.org/drm/intel/issues/1559 > [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180 > [i915#1823]: https://gitlab.freedesktop.org/drm/intel/issues/1823 > [i915#1897]: https://gitlab.freedesktop.org/drm/intel/issues/1897 > [i915#1899]: https://gitlab.freedesktop.org/drm/intel/issues/1899 > [i915#1904]: https://gitlab.freedesktop.org/drm/intel/issues/1904 > [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265 > [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54 > [i915#588]: https://gitlab.freedesktop.org/drm/intel/issues/588 > [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658 > [i915#70]: https://gitlab.freedesktop.org/drm/intel/issues/70 > [i915#71]: https://gitlab.freedesktop.org/drm/intel/issues/71 > [i915#72]: https://gitlab.freedesktop.org/drm/intel/issues/72 > [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79 > [i915#93]: https://gitlab.freedesktop.org/drm/intel/issues/93 > [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95 > > > Participating hosts (11 -> 8) > ------------------------------ > > Missing (3): pig-skl-6260u pig-glk-j5005 pig-icl-1065g7 > > > Build changes > ------------- > > * CI: CI-20190529 -> None > * IGT: IGT_5659 -> IGTPW_4583 > * Piglit: piglit_4509 -> None > > CI-20190529: 20190529 > CI_DRM_8501: c6bfff03c22fb90dcf1ddacb745667467ab5ab73 @ > git://anongit.freedesktop.org/gfx-ci/linux > IGTPW_4583: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4583/index.html > IGT_5659: 66ab5e42811fee3dea8c21ab29e70e323a0650de @ > git://anongit.freedesktop.org/xorg/app/intel-gpu-tools > piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ > git://anongit.freedesktop.org/piglit > > == Logs == > > For more details see: https://intel-gfx-ci.01.org/tree/drm- > tip/IGTPW_4583/index.html _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2020-06-01 10:25 UTC | newest] Thread overview: 9+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2020-05-19 9:48 [igt-dev] [RFC PATCH i-g-t 0/2] tests/kms_ccs: CCS Clear Color Test Mika Kahola 2020-05-19 9:48 ` [igt-dev] [PATCH i-g-t 1/2] tests/kms_ccs: Add debug information on format modifier Mika Kahola 2020-05-27 22:35 ` Matt Roper 2020-05-19 9:48 ` [igt-dev] [PATCH i-g-t 2/2] tests/kms_ccs: CCS Clear Color test Mika Kahola 2020-05-27 22:35 ` Matt Roper 2020-06-01 10:25 ` Kahola, Mika 2020-05-19 10:37 ` [igt-dev] ✓ Fi.CI.BAT: success for tests/kms_ccs: CCS Clear Color test (rev2) Patchwork 2020-05-19 14:27 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork 2020-05-20 8:27 ` Kahola, Mika
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