[igt-dev] [PATCH] [i-g-t] tests/amdgpu/amd_vrr_range: add vrr range check for edp

Igt-dev Archive on lore.kernel.org
 help / color / mirror / Atom feed

* [igt-dev] [PATCH] [i-g-t] tests/amdgpu/amd_vrr_range: add vrr range check for edp
@ 2023-05-30 15:05 Hersen Wu
  2023-05-30 15:32 ` Aurabindo Pillai
  0 siblings, 1 reply; 7+ messages in thread
From: Hersen Wu @ 2023-05-30 15:05 UTC (permalink / raw)
  To: igt-dev, rodrigo.siqueira, aurabindo.pillai, alex.hung,
	stylon.wang, hamza.mahfooz
  Cc: Hersen Wu

run test for display connected instead of hard coded connector type.
for dp, edp, video timing of hard coded vrr edid need only 2 dp
lanes. this will let test pass without bandwidth failure on 2 lanes
dp or edp display.
add vrr range check for edp

Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
---
 lib/igt_amd.c                |  31 ++++
 lib/igt_amd.h                |   2 +
 tests/amdgpu/amd_vrr_range.c | 297 ++++++++++++++++++++++-------------
 3 files changed, 222 insertions(+), 108 deletions(-)

diff --git a/lib/igt_amd.c b/lib/igt_amd.c
index 09923101f..8837714f7 100644
--- a/lib/igt_amd.c
+++ b/lib/igt_amd.c
@@ -1111,6 +1111,37 @@ int igt_amd_read_psr_state(int drm_fd, char *connector_name)
 	return strtol(buf, NULL, 10);
 }
 
+/**
+ * igt_amd_allow_edp_hotplug_detect: notify kernel read edp edid all the time
+ * @drm_fd: DRM file descriptor
+ * @connector_name: The connector's name
+ * @enable: allow or disable kernel read eDP EDID for each display detection
+ * example usage: echo 0x1 >
+ * /sys/kernel/debug/dri/0/eDP-1/allow_edp_hotplug_detection
+ */
+void igt_amd_allow_edp_hotplug_detect(int drm_fd, char *connector_name, bool enable)
+{
+	int fd, hpd_fd, wr_len;
+	const char *allow_hotplug_detect = "1";
+	const char *dis_allow_hotplug_detect = "0";
+
+	fd = igt_debugfs_connector_dir(drm_fd, connector_name, O_RDONLY);
+	igt_assert(fd >= 0);
+	hpd_fd = openat(fd, DEBUGFS_ALLOW_EDP_HOTPLUG_DETECT, O_WRONLY);
+	close(fd);
+	igt_assert(hpd_fd >= 0);
+
+	if (enable) {
+		wr_len = write(hpd_fd, allow_hotplug_detect, strlen(allow_hotplug_detect));
+		igt_assert_eq(wr_len, strlen(allow_hotplug_detect));
+	} else {
+		wr_len = write(hpd_fd, dis_allow_hotplug_detect, strlen(dis_allow_hotplug_detect));
+		igt_assert_eq(wr_len, strlen(dis_allow_hotplug_detect));
+	}
+
+	close(hpd_fd);
+}
+
 /**
  * @brief check if AMDGPU DM visual confirm debugfs interface entry exist and defined
  *
diff --git a/lib/igt_amd.h b/lib/igt_amd.h
index 428bfe6f7..d57390405 100644
--- a/lib/igt_amd.h
+++ b/lib/igt_amd.h
@@ -48,6 +48,7 @@
 #define MAX_SUPPORTED_ILR 8
 #define DEBUGFS_EDP_PSR_CAP	"psr_capability"
 #define DEBUGFS_EDP_PSR_STATE	"psr_state"
+#define DEBUGFS_ALLOW_EDP_HOTPLUG_DETECT "allow_edp_hotplug_detection"
 
 /* amdgpu DM interface entries */
 #define DEBUGFS_DM_VISUAL_CONFIRM "amdgpu_dm_visual_confirm"
@@ -187,6 +188,7 @@ bool igt_amd_psr_support_sink(int drm_fd, char *connector_name, enum psr_mode mo
 bool igt_amd_psr_support_drv(int drm_fd, char *connector_name, enum psr_mode mode);
 bool igt_amd_output_has_psr_state(int drm_fd, char *connector_name);
 int  igt_amd_read_psr_state(int drm_fd, char *connector_name);
+void igt_amd_allow_edp_hotplug_detect(int drm_fd, char *connector_name, bool enable);
 
 /* DM interface helpers */
 bool igt_amd_has_visual_confirm(int drm_fd);
diff --git a/tests/amdgpu/amd_vrr_range.c b/tests/amdgpu/amd_vrr_range.c
index 2f27296dd..c9a7bb973 100644
--- a/tests/amdgpu/amd_vrr_range.c
+++ b/tests/amdgpu/amd_vrr_range.c
@@ -27,11 +27,14 @@
 
 IGT_TEST_DESCRIPTION("Test EDID parsing and debugfs reporting on Freesync displays");
 
+/* Maximumm pipes on any AMD ASIC. */
+#define MAX_PIPES 6
+
 /* Common test data. */
 typedef struct data {
 	igt_display_t display;
 	igt_plane_t *primary;
-	igt_output_t *output;
+	igt_output_t *output[MAX_PIPES];
 	int fd;
 } data_t;
 
@@ -53,45 +56,46 @@ struct {
 	const range_t range;
 } edid_database[] = {
 	{
-		/* DP EDID from Benq EL-2870u */
-		"Benq EL-2870u DP",
+		/* EDID Version 1.4. Timing requires 2 DP lanes. */
+		"External DP",
 		DRM_MODE_CONNECTOR_DisplayPort,
 		{
 		0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00,
-		0x09, 0xd1, 0x49, 0x79, 0x45, 0x54, 0x00, 0x00,
-		0x0c, 0x1e, 0x01, 0x04, 0xb5, 0x3e, 0x22, 0x78,
-		0x3f, 0x08, 0xa5, 0xa2, 0x57, 0x4f, 0xa2, 0x28,
-		0x0f, 0x50, 0x54, 0xa5, 0x6b, 0x80, 0xd1, 0xc0,
-		0x81, 0xc0, 0x81, 0x00, 0x81, 0x80, 0xa9, 0xc0,
-		0xb3, 0x00, 0xa9, 0x40, 0x01, 0x01, 0x4d, 0xd0,
-		0x00, 0xa0, 0xf0, 0x70, 0x3e, 0x80, 0x30, 0x20,
-		0x35, 0x00, 0x6d, 0x55, 0x21, 0x00, 0x00, 0x1a,
-		0x00, 0x00, 0x00, 0xff, 0x00, 0x46, 0x33, 0x4c,
-		0x30, 0x34, 0x33, 0x33, 0x33, 0x53, 0x4c, 0x30,
-		0x0a, 0x20, 0x00, 0x00, 0x00, 0xfd, 0x00, 0x28,
-		0x3c, 0x87, 0x87, 0x3c, 0x01, 0x0a, 0x20, 0x20,
-		0x20, 0x20, 0x20, 0x20, 0x00, 0x00, 0x00, 0xfc,
-		0x00, 0x42, 0x65, 0x6e, 0x51, 0x20, 0x45, 0x4c,
-		0x32, 0x38, 0x37, 0x30, 0x55, 0x0a, 0x01, 0xa8,
-		0x02, 0x03, 0x2e, 0xf1, 0x56, 0x61, 0x60, 0x5d,
-		0x5e, 0x5f, 0x10, 0x05, 0x04, 0x03, 0x02, 0x07,
-		0x06, 0x0f, 0x1f, 0x20, 0x21, 0x22, 0x14, 0x13,
-		0x12, 0x16, 0x01, 0x23, 0x09, 0x07, 0x07, 0x83,
-		0x01, 0x00, 0x00, 0xe3, 0x05, 0xc0, 0x00, 0xe6,
-		0x06, 0x05, 0x01, 0x5a, 0x53, 0x44, 0x02, 0x3a,
+		0x06, 0xb3, 0xaf, 0x24, 0x01, 0x01, 0x01, 0x01,
+		0x00, 0x1d, 0x01, 0x04, 0x80, 0x35, 0x1e, 0x78,
+		0x2b, 0x51, 0xb5, 0xa4, 0x54, 0x4f, 0xa0, 0x26,
+		0x0d, 0x50, 0x54, 0xbf, 0xcf, 0x00, 0x81, 0x40,
+		0x81, 0x80, 0x95, 0x00, 0x71, 0x4f, 0x81, 0xc0,
+		0xb3, 0x00, 0x01, 0x01, 0x01, 0x01, 0x02, 0x3a,
 		0x80, 0x18, 0x71, 0x38, 0x2d, 0x40, 0x58, 0x2c,
-		0x45, 0x00, 0x6d, 0x55, 0x21, 0x00, 0x00, 0x1e,
-		0x56, 0x5e, 0x00, 0xa0, 0xa0, 0xa0, 0x29, 0x50,
-		0x30, 0x20, 0x35, 0x00, 0x6d, 0x55, 0x21, 0x00,
-		0x00, 0x1a, 0x8c, 0x64, 0x00, 0x50, 0xf0, 0x70,
-		0x1f, 0x80, 0x08, 0x20, 0x18, 0x04, 0x6d, 0x55,
-		0x21, 0x00, 0x00, 0x1a, 0x00, 0x00, 0x00, 0x00,
+		0x45, 0x00, 0x0f, 0x28, 0x21, 0x00, 0x00, 0x1e,
+		0xfc, 0x7e, 0x80, 0x88, 0x70, 0x38, 0x12, 0x40,
+		0x18, 0x20, 0x35, 0x00, 0x0f, 0x28, 0x21, 0x00,
+		0x00, 0x1e, 0x00, 0x00, 0x00, 0xfd, 0x00, 0x30,
+		0x90, 0x1e, 0xb4, 0x22, 0x01, 0x0a, 0x20, 0x20,
+		0x20, 0x20, 0x20, 0x20, 0x00, 0x00, 0x00, 0xfc,
+		0x00, 0x41, 0x53, 0x55, 0x53, 0x20, 0x56, 0x50,
+		0x32, 0x34, 0x39, 0x0a, 0x20, 0x20, 0x01, 0x91,
+		0x02, 0x03, 0x2d, 0xf1, 0x4f, 0x01, 0x03, 0x04,
+		0x13, 0x1f, 0x12, 0x02, 0x11, 0x90, 0x0e, 0x0f,
+		0x1d, 0x1e, 0x3f, 0x40, 0x23, 0x09, 0x07, 0x07,
+		0x83, 0x01, 0x00, 0x00, 0x67, 0x03, 0x0c, 0x00,
+		0x10, 0x00, 0x00, 0x44, 0x68, 0x1a, 0x00, 0x00,
+		0x01, 0x01, 0x30, 0x90, 0xe6, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x93
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x16
 		},
-		{40, 60},
+		{48, 144},
 	},
+
 	{
 		/* HDMI EDID from ASUS VP249QGR */
 		"ASUS VP249QGR HDMI",
@@ -132,26 +136,63 @@ struct {
 		},
 		{48, 144},
 	},
+
+	{
+		/* EDID Version 1.4. Timing requires 2 DP lanes. */
+		"eDP",
+		DRM_MODE_CONNECTOR_eDP,
+		{
+		0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00,
+		0x06, 0xb3, 0xaf, 0x24, 0x01, 0x01, 0x01, 0x01,
+		0x00, 0x1d, 0x01, 0x04, 0x80, 0x35, 0x1e, 0x78,
+		0x2b, 0x51, 0xb5, 0xa4, 0x54, 0x4f, 0xa0, 0x26,
+		0x0d, 0x50, 0x54, 0xbf, 0xcf, 0x00, 0x81, 0x40,
+		0x81, 0x80, 0x95, 0x00, 0x71, 0x4f, 0x81, 0xc0,
+		0xb3, 0x00, 0x01, 0x01, 0x01, 0x01, 0x02, 0x3a,
+		0x80, 0x18, 0x71, 0x38, 0x2d, 0x40, 0x58, 0x2c,
+		0x45, 0x00, 0x0f, 0x28, 0x21, 0x00, 0x00, 0x1e,
+		0xfc, 0x7e, 0x80, 0x88, 0x70, 0x38, 0x12, 0x40,
+		0x18, 0x20, 0x35, 0x00, 0x0f, 0x28, 0x21, 0x00,
+		0x00, 0x1e, 0x00, 0x00, 0x00, 0xfd, 0x00, 0x30,
+		0x90, 0x1e, 0xb4, 0x22, 0x01, 0x0a, 0x20, 0x20,
+		0x20, 0x20, 0x20, 0x20, 0x00, 0x00, 0x00, 0xfc,
+		0x00, 0x41, 0x53, 0x55, 0x53, 0x20, 0x56, 0x50,
+		0x32, 0x34, 0x39, 0x0a, 0x20, 0x20, 0x01, 0x91,
+		0x02, 0x03, 0x2d, 0xf1, 0x4f, 0x01, 0x03, 0x04,
+		0x13, 0x1f, 0x12, 0x02, 0x11, 0x90, 0x0e, 0x0f,
+		0x1d, 0x1e, 0x3f, 0x40, 0x23, 0x09, 0x07, 0x07,
+		0x83, 0x01, 0x00, 0x00, 0x67, 0x03, 0x0c, 0x00,
+		0x10, 0x00, 0x00, 0x44, 0x68, 0x1a, 0x00, 0x00,
+		0x01, 0x01, 0x30, 0x90, 0xe6, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x16
+		},
+		{48, 144},
+	},
 };
 
 /* Common test setup. */
-static void test_init(data_t *data, uint32_t connector_type)
+//static void test_init(data_t *data, uint32_t connector_type)
+static void test_init(data_t *data)
 {
 	igt_display_t *display = &data->display;
+	int i;
 
-	igt_display_reset(display);
+	for_each_pipe(display, i) {
+		igt_output_t *output = &display->outputs[i];
 
-	/* find connected outputs */
-	data->output = NULL;
-	for (int i=0; i < data->display.n_outputs; ++i) {
-		drmModeConnector *connector = data->display.outputs[i].config.connector;
-		if (connector->connection == DRM_MODE_CONNECTED &&
-			connector->connector_type == connector_type) {
-			data->output = &data->display.outputs[i];
-		}
+		data->output[i] = output;
 	}
-	igt_assert_f(data->output, "Requires connected output\n");
 
+	igt_display_reset(display);
 }
 
 /* Common test cleanup. */
@@ -185,6 +226,7 @@ static range_t get_freesync_range(data_t *data, igt_output_t *output)
 	fd = igt_debugfs_connector_dir(data->fd, output->name, O_RDONLY);
 	igt_assert(fd >= 0);
 
+	/* example usage: cat /sys/kernel/debug/dri/0/DP-1/vrr_range */
 	res = igt_debugfs_simple_read(fd, "vrr_range", buf, sizeof(buf));
 	igt_require(res > 0);
 
@@ -199,56 +241,86 @@ static range_t get_freesync_range(data_t *data, igt_output_t *output)
 	return range;
 }
 
-static void trigger_edid_parse(data_t *data, uint32_t test_flags)
+static void trigger_edid_parse(data_t *data, igt_output_t *output, uint32_t test_flags)
 {
 	if (test_flags & TEST_SUSPEND)
 		igt_system_suspend_autoresume(SUSPEND_STATE_MEM,
 					      SUSPEND_TEST_NONE);
 	else
-		igt_amd_trigger_hotplug(data->fd, data->output->name);
+		igt_amd_trigger_hotplug(data->fd, output->name);
 
 	/* more safe margin until resume and hotplug is completed */
 	usleep(1500000);
 }
 
 /* Check if EDID parsing is correctly reporting Freesync capability
- * by overriding EDID with ones from golden sample. Display under test
- * must still support Freesync.
+ * by overriding EDID with ones from golden sample.
  */
-static void test_freesync_parsing(data_t *data, uint32_t connector_type,
-		uint32_t test_flags)
+static void test_freesync_parsing_base(data_t *data, uint32_t test_flags)
 {
 	const struct edid *edid;
 	range_t range, expected_range;
-	int i;
+	igt_output_t *output;
+	int i, j, test_conn_cnt = 0;
 
-	test_init(data, connector_type);
+	test_init(data);
 
 	igt_amd_require_hpd(&data->display, data->fd);
 
-	/* find a test EDID */
-	i = find_test_edid_index(connector_type);
-	edid = (const struct edid *)edid_database[i].edid;
-	expected_range = edid_database[i].range;
+	for_each_pipe(&data->display, i) {
+		/* setup the output */
+		output = data->output[i];
+		if (!output || !igt_output_is_connected(output))
+			continue;
+
+		/* find a test EDID */
+		j = find_test_edid_index(output->config.connector->connector_type);
+
+		edid = (const struct edid *)edid_database[j].edid;
+		expected_range = edid_database[j].range;
+
+		/* eDP allow read edid for each display detection */
+		if (output->config.connector->connector_type == DRM_MODE_CONNECTOR_eDP)
+			igt_amd_allow_edp_hotplug_detect(data->fd, output->name, true);
+
+		/* force to use hard coded VRR EDID */
+		kmstest_force_edid(data->fd, output->config.connector, edid);
 
-	kmstest_force_edid(data->fd, data->output->config.connector, edid);
+		trigger_edid_parse(data, output, test_flags);
 
-	trigger_edid_parse(data, test_flags);
+		range = get_freesync_range(data, output);
 
-	range = get_freesync_range(data, data->output);
+		/* undo EDID override. re-parse EDID of display */
+		kmstest_force_edid(data->fd, output->config.connector, NULL);
 
-	/* undo EDID override and trigger a re-parsing of EDID */
-	kmstest_force_edid(data->fd, data->output->config.connector, NULL);
-	igt_amd_trigger_hotplug(data->fd, data->output->name);
+		igt_amd_trigger_hotplug(data->fd, output->name);
+
+		/* eDP dis-allow read edid for each display detection */
+		if (output->config.connector->connector_type == DRM_MODE_CONNECTOR_eDP)
+			igt_amd_allow_edp_hotplug_detect(data->fd, output->name, false);
+
+		test_conn_cnt++;
+
+		igt_assert_f(range.min == expected_range.min &&
+				range.max == expected_range.max,
+				"Expecting Freesync range %d-%d, got %d-%d\n",
+				expected_range.min, expected_range.max,
+				range.min, range.max);
+		igt_info("%s Freesync range: %d-%d\n", output->name, range.min, range.max);
+	}
 
 	test_fini(data);
+	igt_skip_on(test_conn_cnt == 0);
+}
+
+static void test_freesync_parsing(data_t *data)
+{
+	test_freesync_parsing_base(data, TEST_NONE);
+}
 
-	igt_assert_f(range.min == expected_range.min &&
-			range.max == expected_range.max,
-			"Expecting Freesync range %d-%d, got %d-%d\n",
-			expected_range.min, expected_range.max,
-			range.min, range.max);
-	igt_info("Freesync range: %d-%d\n", range.min, range.max);
+static void test_freesync_parsing_suspend(data_t *data)
+{
+	test_freesync_parsing_base(data, TEST_SUSPEND);
 }
 
 /* Returns true if an output supports VRR. */
@@ -260,32 +332,57 @@ static bool has_vrr(igt_output_t *output)
 
 /* More relaxed checking on Freesync capability.
  * Only checks if frame rate range is within legal range.
+ * Display under test MUST be VRR capable.
  */
-static void test_freesync_range(data_t *data, uint32_t connector_type,
-		uint32_t test_flags)
+static void test_freesync_range_base(data_t *data, uint32_t test_flags)
 {
 	range_t range;
+	igt_output_t *output;
+	int i, test_conn_cnt = 0;
 
-	test_init(data, connector_type);
+	test_init(data);
 
 	igt_amd_require_hpd(&data->display, data->fd);
 
-	igt_assert_f(has_vrr(data->output),
-			"connector %s is not VRR capable\n",
-			data->output->name);
+	for_each_pipe(&data->display, i) {
+		/* setup the output */
+		output = data->output[i];
+		if (!output || !igt_output_is_connected(output))
+			continue;
+
+		igt_debug_on_f(!has_vrr(output), "Requires output supports VRR\n");
+
+		if (!has_vrr(output)) {
+			igt_info("connector %s is not VRR capable\n", output->name);
+			continue;
+		}
+
+		trigger_edid_parse(data, output, test_flags);
+
+		range = get_freesync_range(data, output);
 
-	trigger_edid_parse(data, test_flags);
+		igt_assert_f(range.min != 0 &&
+				range.max != 0 &&
+				range.max - range.min > 10,
+				"Invalid Freesync range %d-%d\n",
+				range.min, range.max);
+		igt_info("%s Freesync range: %d-%d\n", output->name, range.min, range.max);
 
-	range = get_freesync_range(data, data->output);
+		test_conn_cnt++;
+	}
 
 	test_fini(data);
+	igt_skip_on(test_conn_cnt == 0);
+}
+
+static void test_freesync_range(data_t *data)
+{
+	test_freesync_range_base(data, TEST_NONE);
+}
 
-	igt_assert_f(range.min != 0 &&
-			range.max != 0 &&
-			range.max - range.min > 10,
-			"Invalid Freesync range %d-%d\n",
-			range.min, range.max);
-	igt_info("Freesync range: %d-%d\n", range.min, range.max);
+static void test_freesync_range_suspend(data_t *data)
+{
+	test_freesync_range_base(data, TEST_SUSPEND);
 }
 
 igt_main
@@ -307,33 +404,17 @@ igt_main
 		igt_display_require_output(&data.display);
 	}
 
-	igt_describe("Freesync EDID parsing on HDMI");
-	igt_subtest("freesync-parsing-hdmi") test_freesync_parsing(&data,
-			DRM_MODE_CONNECTOR_HDMIA, TEST_NONE);
-	igt_describe("Freesync EDID parsing on DP");
-	igt_subtest("freesync-parsing-dp") test_freesync_parsing(&data,
-			DRM_MODE_CONNECTOR_DisplayPort, TEST_NONE);
-
-	igt_describe("Freesync EDID parsing on HDMI after suspend");
-	igt_subtest("freesync-parsing-hdmi-suspend") test_freesync_parsing(&data,
-			DRM_MODE_CONNECTOR_HDMIA, TEST_SUSPEND);
-	igt_describe("Freesync EDID parsing on DP after suspend");
-	igt_subtest("freesync-parsing-dp-suspend") test_freesync_parsing(&data,
-			DRM_MODE_CONNECTOR_DisplayPort, TEST_SUSPEND);
-
-	igt_describe("Freesync range on HDMI");
-	igt_subtest("freesync-range-hdmi") test_freesync_range(&data,
-			DRM_MODE_CONNECTOR_HDMIA, TEST_NONE);
-	igt_describe("Freesync range on DP");
-	igt_subtest("freesync-range-dp") test_freesync_range(&data,
-			DRM_MODE_CONNECTOR_DisplayPort, TEST_NONE);
-
-	igt_describe("Freesync range on HDMI after suspend");
-	igt_subtest("freesync-range-hdmi-suspend") test_freesync_range(&data,
-			DRM_MODE_CONNECTOR_HDMIA, TEST_SUSPEND);
-	igt_describe("Freesync range on DP after suspend");
-	igt_subtest("freesync-range-dp-suspend") test_freesync_range(&data,
-			DRM_MODE_CONNECTOR_DisplayPort, TEST_SUSPEND);
+	igt_describe("Hard coded Freesync EDID parsing");
+	igt_subtest("freesync-parsing") test_freesync_parsing(&data);
+
+	igt_describe("Hard coded Freesync EDID parsing after suspend");
+	igt_subtest("freesync-parsing-suspend") test_freesync_parsing_suspend(&data);
+
+	igt_describe("Freesync range from display");
+	igt_subtest("freesync-range") test_freesync_range(&data);
+
+	igt_describe("Freesync range from display after suspend");
+	igt_subtest("freesync-range-suspend") test_freesync_range_suspend(&data);
 
 	igt_fixture
 	{
-- 
2.25.1

^ permalink raw reply related	[flat|nested] 7+ messages in thread

* Re: [igt-dev] [PATCH] [i-g-t] tests/amdgpu/amd_vrr_range: add vrr range check for edp
  2023-05-30 15:05 [igt-dev] [PATCH] [i-g-t] tests/amdgpu/amd_vrr_range: add vrr range check for edp Hersen Wu
@ 2023-05-30 15:32 ` Aurabindo Pillai
  0 siblings, 0 replies; 7+ messages in thread
From: Aurabindo Pillai @ 2023-05-30 15:32 UTC (permalink / raw)
  To: Hersen Wu, igt-dev, rodrigo.siqueira, alex.hung, stylon.wang,
	hamza.mahfooz



On 5/30/23 11:05, Hersen Wu wrote:
> run test for display connected instead of hard coded connector type.
> for dp, edp, video timing of hard coded vrr edid need only 2 dp
> lanes. this will let test pass without bandwidth failure on 2 lanes
> dp or edp display.
> add vrr range check for edp
> 
> Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
> ---
>  lib/igt_amd.c                |  31 ++++
>  lib/igt_amd.h                |   2 +
>  tests/amdgpu/amd_vrr_range.c | 297 ++++++++++++++++++++++-------------
>  3 files changed, 222 insertions(+), 108 deletions(-)
> 
> diff --git a/lib/igt_amd.c b/lib/igt_amd.c
> index 09923101f..8837714f7 100644
> --- a/lib/igt_amd.c
> +++ b/lib/igt_amd.c
> @@ -1111,6 +1111,37 @@ int igt_amd_read_psr_state(int drm_fd, char *connector_name)
>  	return strtol(buf, NULL, 10);
>  }
>  
> +/**
> + * igt_amd_allow_edp_hotplug_detect: notify kernel read edp edid all the time
> + * @drm_fd: DRM file descriptor
> + * @connector_name: The connector's name
> + * @enable: allow or disable kernel read eDP EDID for each display detection
> + * example usage: echo 0x1 >
> + * /sys/kernel/debug/dri/0/eDP-1/allow_edp_hotplug_detection
> + */
> +void igt_amd_allow_edp_hotplug_detect(int drm_fd, char *connector_name, bool enable)
> +{
> +	int fd, hpd_fd, wr_len;
> +	const char *allow_hotplug_detect = "1";
> +	const char *dis_allow_hotplug_detect = "0";
> +
> +	fd = igt_debugfs_connector_dir(drm_fd, connector_name, O_RDONLY);
> +	igt_assert(fd >= 0);
> +	hpd_fd = openat(fd, DEBUGFS_ALLOW_EDP_HOTPLUG_DETECT, O_WRONLY);
> +	close(fd);
> +	igt_assert(hpd_fd >= 0);
> +
> +	if (enable) {
> +		wr_len = write(hpd_fd, allow_hotplug_detect, strlen(allow_hotplug_detect));
> +		igt_assert_eq(wr_len, strlen(allow_hotplug_detect));
> +	} else {
> +		wr_len = write(hpd_fd, dis_allow_hotplug_detect, strlen(dis_allow_hotplug_detect));
> +		igt_assert_eq(wr_len, strlen(dis_allow_hotplug_detect));
> +	}
> +
> +	close(hpd_fd);
> +}
> +
>  /**
>   * @brief check if AMDGPU DM visual confirm debugfs interface entry exist and defined
>   *
> diff --git a/lib/igt_amd.h b/lib/igt_amd.h
> index 428bfe6f7..d57390405 100644
> --- a/lib/igt_amd.h
> +++ b/lib/igt_amd.h
> @@ -48,6 +48,7 @@
>  #define MAX_SUPPORTED_ILR 8
>  #define DEBUGFS_EDP_PSR_CAP	"psr_capability"
>  #define DEBUGFS_EDP_PSR_STATE	"psr_state"
> +#define DEBUGFS_ALLOW_EDP_HOTPLUG_DETECT "allow_edp_hotplug_detection"
>  
>  /* amdgpu DM interface entries */
>  #define DEBUGFS_DM_VISUAL_CONFIRM "amdgpu_dm_visual_confirm"
> @@ -187,6 +188,7 @@ bool igt_amd_psr_support_sink(int drm_fd, char *connector_name, enum psr_mode mo
>  bool igt_amd_psr_support_drv(int drm_fd, char *connector_name, enum psr_mode mode);
>  bool igt_amd_output_has_psr_state(int drm_fd, char *connector_name);
>  int  igt_amd_read_psr_state(int drm_fd, char *connector_name);
> +void igt_amd_allow_edp_hotplug_detect(int drm_fd, char *connector_name, bool enable);
>  
>  /* DM interface helpers */
>  bool igt_amd_has_visual_confirm(int drm_fd);
> diff --git a/tests/amdgpu/amd_vrr_range.c b/tests/amdgpu/amd_vrr_range.c
> index 2f27296dd..c9a7bb973 100644
> --- a/tests/amdgpu/amd_vrr_range.c
> +++ b/tests/amdgpu/amd_vrr_range.c
> @@ -27,11 +27,14 @@
>  
>  IGT_TEST_DESCRIPTION("Test EDID parsing and debugfs reporting on Freesync displays");
>  
> +/* Maximumm pipes on any AMD ASIC. */
> +#define MAX_PIPES 6
> +
>  /* Common test data. */
>  typedef struct data {
>  	igt_display_t display;
>  	igt_plane_t *primary;
> -	igt_output_t *output;
> +	igt_output_t *output[MAX_PIPES];
>  	int fd;
>  } data_t;
>  
> @@ -53,45 +56,46 @@ struct {
>  	const range_t range;
>  } edid_database[] = {
>  	{
> -		/* DP EDID from Benq EL-2870u */
> -		"Benq EL-2870u DP",
> +		/* EDID Version 1.4. Timing requires 2 DP lanes. */
> +		"External DP",
>  		DRM_MODE_CONNECTOR_DisplayPort,
>  		{
>  		0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00,
> -		0x09, 0xd1, 0x49, 0x79, 0x45, 0x54, 0x00, 0x00,
> -		0x0c, 0x1e, 0x01, 0x04, 0xb5, 0x3e, 0x22, 0x78,
> -		0x3f, 0x08, 0xa5, 0xa2, 0x57, 0x4f, 0xa2, 0x28,
> -		0x0f, 0x50, 0x54, 0xa5, 0x6b, 0x80, 0xd1, 0xc0,
> -		0x81, 0xc0, 0x81, 0x00, 0x81, 0x80, 0xa9, 0xc0,
> -		0xb3, 0x00, 0xa9, 0x40, 0x01, 0x01, 0x4d, 0xd0,
> -		0x00, 0xa0, 0xf0, 0x70, 0x3e, 0x80, 0x30, 0x20,
> -		0x35, 0x00, 0x6d, 0x55, 0x21, 0x00, 0x00, 0x1a,
> -		0x00, 0x00, 0x00, 0xff, 0x00, 0x46, 0x33, 0x4c,
> -		0x30, 0x34, 0x33, 0x33, 0x33, 0x53, 0x4c, 0x30,
> -		0x0a, 0x20, 0x00, 0x00, 0x00, 0xfd, 0x00, 0x28,
> -		0x3c, 0x87, 0x87, 0x3c, 0x01, 0x0a, 0x20, 0x20,
> -		0x20, 0x20, 0x20, 0x20, 0x00, 0x00, 0x00, 0xfc,
> -		0x00, 0x42, 0x65, 0x6e, 0x51, 0x20, 0x45, 0x4c,
> -		0x32, 0x38, 0x37, 0x30, 0x55, 0x0a, 0x01, 0xa8,
> -		0x02, 0x03, 0x2e, 0xf1, 0x56, 0x61, 0x60, 0x5d,
> -		0x5e, 0x5f, 0x10, 0x05, 0x04, 0x03, 0x02, 0x07,
> -		0x06, 0x0f, 0x1f, 0x20, 0x21, 0x22, 0x14, 0x13,
> -		0x12, 0x16, 0x01, 0x23, 0x09, 0x07, 0x07, 0x83,
> -		0x01, 0x00, 0x00, 0xe3, 0x05, 0xc0, 0x00, 0xe6,
> -		0x06, 0x05, 0x01, 0x5a, 0x53, 0x44, 0x02, 0x3a,
> +		0x06, 0xb3, 0xaf, 0x24, 0x01, 0x01, 0x01, 0x01,
> +		0x00, 0x1d, 0x01, 0x04, 0x80, 0x35, 0x1e, 0x78,
> +		0x2b, 0x51, 0xb5, 0xa4, 0x54, 0x4f, 0xa0, 0x26,
> +		0x0d, 0x50, 0x54, 0xbf, 0xcf, 0x00, 0x81, 0x40,
> +		0x81, 0x80, 0x95, 0x00, 0x71, 0x4f, 0x81, 0xc0,
> +		0xb3, 0x00, 0x01, 0x01, 0x01, 0x01, 0x02, 0x3a,
>  		0x80, 0x18, 0x71, 0x38, 0x2d, 0x40, 0x58, 0x2c,
> -		0x45, 0x00, 0x6d, 0x55, 0x21, 0x00, 0x00, 0x1e,
> -		0x56, 0x5e, 0x00, 0xa0, 0xa0, 0xa0, 0x29, 0x50,
> -		0x30, 0x20, 0x35, 0x00, 0x6d, 0x55, 0x21, 0x00,
> -		0x00, 0x1a, 0x8c, 0x64, 0x00, 0x50, 0xf0, 0x70,
> -		0x1f, 0x80, 0x08, 0x20, 0x18, 0x04, 0x6d, 0x55,
> -		0x21, 0x00, 0x00, 0x1a, 0x00, 0x00, 0x00, 0x00,
> +		0x45, 0x00, 0x0f, 0x28, 0x21, 0x00, 0x00, 0x1e,
> +		0xfc, 0x7e, 0x80, 0x88, 0x70, 0x38, 0x12, 0x40,
> +		0x18, 0x20, 0x35, 0x00, 0x0f, 0x28, 0x21, 0x00,
> +		0x00, 0x1e, 0x00, 0x00, 0x00, 0xfd, 0x00, 0x30,
> +		0x90, 0x1e, 0xb4, 0x22, 0x01, 0x0a, 0x20, 0x20,
> +		0x20, 0x20, 0x20, 0x20, 0x00, 0x00, 0x00, 0xfc,
> +		0x00, 0x41, 0x53, 0x55, 0x53, 0x20, 0x56, 0x50,
> +		0x32, 0x34, 0x39, 0x0a, 0x20, 0x20, 0x01, 0x91,
> +		0x02, 0x03, 0x2d, 0xf1, 0x4f, 0x01, 0x03, 0x04,
> +		0x13, 0x1f, 0x12, 0x02, 0x11, 0x90, 0x0e, 0x0f,
> +		0x1d, 0x1e, 0x3f, 0x40, 0x23, 0x09, 0x07, 0x07,
> +		0x83, 0x01, 0x00, 0x00, 0x67, 0x03, 0x0c, 0x00,
> +		0x10, 0x00, 0x00, 0x44, 0x68, 0x1a, 0x00, 0x00,
> +		0x01, 0x01, 0x30, 0x90, 0xe6, 0x00, 0x00, 0x00,
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
>  		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
>  		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> -		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x93
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x16
>  		},
> -		{40, 60},
> +		{48, 144},
>  	},
> +
>  	{
>  		/* HDMI EDID from ASUS VP249QGR */
>  		"ASUS VP249QGR HDMI",
> @@ -132,26 +136,63 @@ struct {
>  		},
>  		{48, 144},
>  	},
> +
> +	{
> +		/* EDID Version 1.4. Timing requires 2 DP lanes. */
> +		"eDP",
> +		DRM_MODE_CONNECTOR_eDP,
> +		{
> +		0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00,
> +		0x06, 0xb3, 0xaf, 0x24, 0x01, 0x01, 0x01, 0x01,
> +		0x00, 0x1d, 0x01, 0x04, 0x80, 0x35, 0x1e, 0x78,
> +		0x2b, 0x51, 0xb5, 0xa4, 0x54, 0x4f, 0xa0, 0x26,
> +		0x0d, 0x50, 0x54, 0xbf, 0xcf, 0x00, 0x81, 0x40,
> +		0x81, 0x80, 0x95, 0x00, 0x71, 0x4f, 0x81, 0xc0,
> +		0xb3, 0x00, 0x01, 0x01, 0x01, 0x01, 0x02, 0x3a,
> +		0x80, 0x18, 0x71, 0x38, 0x2d, 0x40, 0x58, 0x2c,
> +		0x45, 0x00, 0x0f, 0x28, 0x21, 0x00, 0x00, 0x1e,
> +		0xfc, 0x7e, 0x80, 0x88, 0x70, 0x38, 0x12, 0x40,
> +		0x18, 0x20, 0x35, 0x00, 0x0f, 0x28, 0x21, 0x00,
> +		0x00, 0x1e, 0x00, 0x00, 0x00, 0xfd, 0x00, 0x30,
> +		0x90, 0x1e, 0xb4, 0x22, 0x01, 0x0a, 0x20, 0x20,
> +		0x20, 0x20, 0x20, 0x20, 0x00, 0x00, 0x00, 0xfc,
> +		0x00, 0x41, 0x53, 0x55, 0x53, 0x20, 0x56, 0x50,
> +		0x32, 0x34, 0x39, 0x0a, 0x20, 0x20, 0x01, 0x91,
> +		0x02, 0x03, 0x2d, 0xf1, 0x4f, 0x01, 0x03, 0x04,
> +		0x13, 0x1f, 0x12, 0x02, 0x11, 0x90, 0x0e, 0x0f,
> +		0x1d, 0x1e, 0x3f, 0x40, 0x23, 0x09, 0x07, 0x07,
> +		0x83, 0x01, 0x00, 0x00, 0x67, 0x03, 0x0c, 0x00,
> +		0x10, 0x00, 0x00, 0x44, 0x68, 0x1a, 0x00, 0x00,
> +		0x01, 0x01, 0x30, 0x90, 0xe6, 0x00, 0x00, 0x00,
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x16
> +		},
> +		{48, 144},
> +	},
>  };
>  
>  /* Common test setup. */
> -static void test_init(data_t *data, uint32_t connector_type)
> +//static void test_init(data_t *data, uint32_t connector_type)

Do we need to keep the comment here ?

> +static void test_init(data_t *data)
>  {
>  	igt_display_t *display = &data->display;
> +	int i;
>  
> -	igt_display_reset(display);
> +	for_each_pipe(display, i) {
> +		igt_output_t *output = &display->outputs[i];
>  
> -	/* find connected outputs */
> -	data->output = NULL;
> -	for (int i=0; i < data->display.n_outputs; ++i) {
> -		drmModeConnector *connector = data->display.outputs[i].config.connector;
> -		if (connector->connection == DRM_MODE_CONNECTED &&
> -			connector->connector_type == connector_type) {
> -			data->output = &data->display.outputs[i];
> -		}
> +		data->output[i] = output;
>  	}
> -	igt_assert_f(data->output, "Requires connected output\n");
>  
> +	igt_display_reset(display);
>  }
>  
>  /* Common test cleanup. */
> @@ -185,6 +226,7 @@ static range_t get_freesync_range(data_t *data, igt_output_t *output)
>  	fd = igt_debugfs_connector_dir(data->fd, output->name, O_RDONLY);
>  	igt_assert(fd >= 0);
>  
> +	/* example usage: cat /sys/kernel/debug/dri/0/DP-1/vrr_range */
>  	res = igt_debugfs_simple_read(fd, "vrr_range", buf, sizeof(buf));
>  	igt_require(res > 0);
>  
> @@ -199,56 +241,86 @@ static range_t get_freesync_range(data_t *data, igt_output_t *output)
>  	return range;
>  }
>  
> -static void trigger_edid_parse(data_t *data, uint32_t test_flags)
> +static void trigger_edid_parse(data_t *data, igt_output_t *output, uint32_t test_flags)
>  {
>  	if (test_flags & TEST_SUSPEND)
>  		igt_system_suspend_autoresume(SUSPEND_STATE_MEM,
>  					      SUSPEND_TEST_NONE);
>  	else
> -		igt_amd_trigger_hotplug(data->fd, data->output->name);
> +		igt_amd_trigger_hotplug(data->fd, output->name);
>  
>  	/* more safe margin until resume and hotplug is completed */
>  	usleep(1500000);
>  }
>  
>  /* Check if EDID parsing is correctly reporting Freesync capability
> - * by overriding EDID with ones from golden sample. Display under test
> - * must still support Freesync.
> + * by overriding EDID with ones from golden sample.
>   */
> -static void test_freesync_parsing(data_t *data, uint32_t connector_type,
> -		uint32_t test_flags)
> +static void test_freesync_parsing_base(data_t *data, uint32_t test_flags)
>  {
>  	const struct edid *edid;
>  	range_t range, expected_range;
> -	int i;
> +	igt_output_t *output;
> +	int i, j, test_conn_cnt = 0;
>  
> -	test_init(data, connector_type);
> +	test_init(data);
>  
>  	igt_amd_require_hpd(&data->display, data->fd);
>  
> -	/* find a test EDID */
> -	i = find_test_edid_index(connector_type);
> -	edid = (const struct edid *)edid_database[i].edid;
> -	expected_range = edid_database[i].range;
> +	for_each_pipe(&data->display, i) {
> +		/* setup the output */
> +		output = data->output[i];
> +		if (!output || !igt_output_is_connected(output))
> +			continue;
> +
> +		/* find a test EDID */
> +		j = find_test_edid_index(output->config.connector->connector_type);
> +
> +		edid = (const struct edid *)edid_database[j].edid;
> +		expected_range = edid_database[j].range;
> +
> +		/* eDP allow read edid for each display detection */
> +		if (output->config.connector->connector_type == DRM_MODE_CONNECTOR_eDP)
> +			igt_amd_allow_edp_hotplug_detect(data->fd, output->name, true);
> +
> +		/* force to use hard coded VRR EDID */
> +		kmstest_force_edid(data->fd, output->config.connector, edid);
>  
> -	kmstest_force_edid(data->fd, data->output->config.connector, edid);
> +		trigger_edid_parse(data, output, test_flags);
>  
> -	trigger_edid_parse(data, test_flags);
> +		range = get_freesync_range(data, output);
>  
> -	range = get_freesync_range(data, data->output);
> +		/* undo EDID override. re-parse EDID of display */
> +		kmstest_force_edid(data->fd, output->config.connector, NULL);
>  
> -	/* undo EDID override and trigger a re-parsing of EDID */
> -	kmstest_force_edid(data->fd, data->output->config.connector, NULL);
> -	igt_amd_trigger_hotplug(data->fd, data->output->name);
> +		igt_amd_trigger_hotplug(data->fd, output->name);
> +
> +		/* eDP dis-allow read edid for each display detection */
> +		if (output->config.connector->connector_type == DRM_MODE_CONNECTOR_eDP)
> +			igt_amd_allow_edp_hotplug_detect(data->fd, output->name, false);
> +
> +		test_conn_cnt++;
> +
> +		igt_assert_f(range.min == expected_range.min &&
> +				range.max == expected_range.max,
> +				"Expecting Freesync range %d-%d, got %d-%d\n",
> +				expected_range.min, expected_range.max,
> +				range.min, range.max);
> +		igt_info("%s Freesync range: %d-%d\n", output->name, range.min, range.max);
> +	}
>  
>  	test_fini(data);
> +	igt_skip_on(test_conn_cnt == 0);
> +}
> +
> +static void test_freesync_parsing(data_t *data)

nitpick, these could be marked inline.
> +{
> +	test_freesync_parsing_base(data, TEST_NONE);
> +}
>  
> -	igt_assert_f(range.min == expected_range.min &&
> -			range.max == expected_range.max,
> -			"Expecting Freesync range %d-%d, got %d-%d\n",
> -			expected_range.min, expected_range.max,
> -			range.min, range.max);
> -	igt_info("Freesync range: %d-%d\n", range.min, range.max);
> +static void test_freesync_parsing_suspend(data_t *data)
> +{
> +	test_freesync_parsing_base(data, TEST_SUSPEND);
>  }
>  
>  /* Returns true if an output supports VRR. */
> @@ -260,32 +332,57 @@ static bool has_vrr(igt_output_t *output)
>  
>  /* More relaxed checking on Freesync capability.
>   * Only checks if frame rate range is within legal range.
> + * Display under test MUST be VRR capable.
>   */
> -static void test_freesync_range(data_t *data, uint32_t connector_type,
> -		uint32_t test_flags)
> +static void test_freesync_range_base(data_t *data, uint32_t test_flags)
>  {
>  	range_t range;
> +	igt_output_t *output;
> +	int i, test_conn_cnt = 0;
>  
> -	test_init(data, connector_type);
> +	test_init(data);
>  
>  	igt_amd_require_hpd(&data->display, data->fd);
>  
> -	igt_assert_f(has_vrr(data->output),
> -			"connector %s is not VRR capable\n",
> -			data->output->name);
> +	for_each_pipe(&data->display, i) {
> +		/* setup the output */
> +		output = data->output[i];
> +		if (!output || !igt_output_is_connected(output))
> +			continue;
> +
> +		igt_debug_on_f(!has_vrr(output), "Requires output supports VRR\n");
> +
> +		if (!has_vrr(output)) {
> +			igt_info("connector %s is not VRR capable\n", output->name);
> +			continue;
> +		}
> +
> +		trigger_edid_parse(data, output, test_flags);
> +
> +		range = get_freesync_range(data, output);
>  
> -	trigger_edid_parse(data, test_flags);
> +		igt_assert_f(range.min != 0 &&
> +				range.max != 0 &&
> +				range.max - range.min > 10,
> +				"Invalid Freesync range %d-%d\n",
> +				range.min, range.max);
> +		igt_info("%s Freesync range: %d-%d\n", output->name, range.min, range.max);
>  
> -	range = get_freesync_range(data, data->output);
> +		test_conn_cnt++;
> +	}
>  
>  	test_fini(data);
> +	igt_skip_on(test_conn_cnt == 0);
> +}
> +
> +static void test_freesync_range(data_t *data)
> +{
> +	test_freesync_range_base(data, TEST_NONE);
> +}
>  
> -	igt_assert_f(range.min != 0 &&
> -			range.max != 0 &&
> -			range.max - range.min > 10,
> -			"Invalid Freesync range %d-%d\n",
> -			range.min, range.max);
> -	igt_info("Freesync range: %d-%d\n", range.min, range.max);
> +static void test_freesync_range_suspend(data_t *data)
> +{
> +	test_freesync_range_base(data, TEST_SUSPEND);
>  }
>  
>  igt_main
> @@ -307,33 +404,17 @@ igt_main
>  		igt_display_require_output(&data.display);
>  	}
>  
> -	igt_describe("Freesync EDID parsing on HDMI");
> -	igt_subtest("freesync-parsing-hdmi") test_freesync_parsing(&data,
> -			DRM_MODE_CONNECTOR_HDMIA, TEST_NONE);
> -	igt_describe("Freesync EDID parsing on DP");
> -	igt_subtest("freesync-parsing-dp") test_freesync_parsing(&data,
> -			DRM_MODE_CONNECTOR_DisplayPort, TEST_NONE);
> -
> -	igt_describe("Freesync EDID parsing on HDMI after suspend");
> -	igt_subtest("freesync-parsing-hdmi-suspend") test_freesync_parsing(&data,
> -			DRM_MODE_CONNECTOR_HDMIA, TEST_SUSPEND);
> -	igt_describe("Freesync EDID parsing on DP after suspend");
> -	igt_subtest("freesync-parsing-dp-suspend") test_freesync_parsing(&data,
> -			DRM_MODE_CONNECTOR_DisplayPort, TEST_SUSPEND);
> -
> -	igt_describe("Freesync range on HDMI");
> -	igt_subtest("freesync-range-hdmi") test_freesync_range(&data,
> -			DRM_MODE_CONNECTOR_HDMIA, TEST_NONE);
> -	igt_describe("Freesync range on DP");
> -	igt_subtest("freesync-range-dp") test_freesync_range(&data,
> -			DRM_MODE_CONNECTOR_DisplayPort, TEST_NONE);
> -
> -	igt_describe("Freesync range on HDMI after suspend");
> -	igt_subtest("freesync-range-hdmi-suspend") test_freesync_range(&data,
> -			DRM_MODE_CONNECTOR_HDMIA, TEST_SUSPEND);
> -	igt_describe("Freesync range on DP after suspend");
> -	igt_subtest("freesync-range-dp-suspend") test_freesync_range(&data,
> -			DRM_MODE_CONNECTOR_DisplayPort, TEST_SUSPEND);
> +	igt_describe("Hard coded Freesync EDID parsing");
> +	igt_subtest("freesync-parsing") test_freesync_parsing(&data);
> +
> +	igt_describe("Hard coded Freesync EDID parsing after suspend");
> +	igt_subtest("freesync-parsing-suspend") test_freesync_parsing_suspend(&data);
> +
> +	igt_describe("Freesync range from display");
> +	igt_subtest("freesync-range") test_freesync_range(&data);
> +
> +	igt_describe("Freesync range from display after suspend");
> +	igt_subtest("freesync-range-suspend") test_freesync_range_suspend(&data);
>  
>  	igt_fixture
>  	{

^ permalink raw reply	[flat|nested] 7+ messages in thread

* [igt-dev] [PATCH] [i-g-t] tests/amdgpu/amd_vrr_range: add vrr range check for edp
@ 2023-05-30 18:53 Hersen Wu
  2023-05-30 20:30 ` [igt-dev] ✗ GitLab.Pipeline: warning for tests/amdgpu/amd_vrr_range: add vrr range check for edp (rev2) Patchwork
                   ` (3 more replies)
  0 siblings, 4 replies; 7+ messages in thread
From: Hersen Wu @ 2023-05-30 18:53 UTC (permalink / raw)
  To: igt-dev, rodrigo.siqueira, aurabindo.pillai, alex.hung,
	stylon.wang, hamza.mahfooz
  Cc: Hersen Wu

run test for display connected instead of hard coded connector type.
for dp, edp, video timing of hard coded vrr edid need only 2 dp
lanes. this will let test pass without bandwidth failure on 2 lanes
dp or edp display.
add vrr range check for edp

Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
---
 lib/igt_amd.c                |  31 ++++
 lib/igt_amd.h                |   2 +
 tests/amdgpu/amd_vrr_range.c | 298 ++++++++++++++++++++++-------------
 3 files changed, 221 insertions(+), 110 deletions(-)

diff --git a/lib/igt_amd.c b/lib/igt_amd.c
index 09923101f..8837714f7 100644
--- a/lib/igt_amd.c
+++ b/lib/igt_amd.c
@@ -1111,6 +1111,37 @@ int igt_amd_read_psr_state(int drm_fd, char *connector_name)
 	return strtol(buf, NULL, 10);
 }
 
+/**
+ * igt_amd_allow_edp_hotplug_detect: notify kernel read edp edid all the time
+ * @drm_fd: DRM file descriptor
+ * @connector_name: The connector's name
+ * @enable: allow or disable kernel read eDP EDID for each display detection
+ * example usage: echo 0x1 >
+ * /sys/kernel/debug/dri/0/eDP-1/allow_edp_hotplug_detection
+ */
+void igt_amd_allow_edp_hotplug_detect(int drm_fd, char *connector_name, bool enable)
+{
+	int fd, hpd_fd, wr_len;
+	const char *allow_hotplug_detect = "1";
+	const char *dis_allow_hotplug_detect = "0";
+
+	fd = igt_debugfs_connector_dir(drm_fd, connector_name, O_RDONLY);
+	igt_assert(fd >= 0);
+	hpd_fd = openat(fd, DEBUGFS_ALLOW_EDP_HOTPLUG_DETECT, O_WRONLY);
+	close(fd);
+	igt_assert(hpd_fd >= 0);
+
+	if (enable) {
+		wr_len = write(hpd_fd, allow_hotplug_detect, strlen(allow_hotplug_detect));
+		igt_assert_eq(wr_len, strlen(allow_hotplug_detect));
+	} else {
+		wr_len = write(hpd_fd, dis_allow_hotplug_detect, strlen(dis_allow_hotplug_detect));
+		igt_assert_eq(wr_len, strlen(dis_allow_hotplug_detect));
+	}
+
+	close(hpd_fd);
+}
+
 /**
  * @brief check if AMDGPU DM visual confirm debugfs interface entry exist and defined
  *
diff --git a/lib/igt_amd.h b/lib/igt_amd.h
index 428bfe6f7..d57390405 100644
--- a/lib/igt_amd.h
+++ b/lib/igt_amd.h
@@ -48,6 +48,7 @@
 #define MAX_SUPPORTED_ILR 8
 #define DEBUGFS_EDP_PSR_CAP	"psr_capability"
 #define DEBUGFS_EDP_PSR_STATE	"psr_state"
+#define DEBUGFS_ALLOW_EDP_HOTPLUG_DETECT "allow_edp_hotplug_detection"
 
 /* amdgpu DM interface entries */
 #define DEBUGFS_DM_VISUAL_CONFIRM "amdgpu_dm_visual_confirm"
@@ -187,6 +188,7 @@ bool igt_amd_psr_support_sink(int drm_fd, char *connector_name, enum psr_mode mo
 bool igt_amd_psr_support_drv(int drm_fd, char *connector_name, enum psr_mode mode);
 bool igt_amd_output_has_psr_state(int drm_fd, char *connector_name);
 int  igt_amd_read_psr_state(int drm_fd, char *connector_name);
+void igt_amd_allow_edp_hotplug_detect(int drm_fd, char *connector_name, bool enable);
 
 /* DM interface helpers */
 bool igt_amd_has_visual_confirm(int drm_fd);
diff --git a/tests/amdgpu/amd_vrr_range.c b/tests/amdgpu/amd_vrr_range.c
index 2f27296dd..3f8f23e9a 100644
--- a/tests/amdgpu/amd_vrr_range.c
+++ b/tests/amdgpu/amd_vrr_range.c
@@ -27,11 +27,14 @@
 
 IGT_TEST_DESCRIPTION("Test EDID parsing and debugfs reporting on Freesync displays");
 
+/* Maximumm pipes on any AMD ASIC. */
+#define MAX_PIPES 6
+
 /* Common test data. */
 typedef struct data {
 	igt_display_t display;
 	igt_plane_t *primary;
-	igt_output_t *output;
+	igt_output_t *output[MAX_PIPES];
 	int fd;
 } data_t;
 
@@ -53,45 +56,46 @@ struct {
 	const range_t range;
 } edid_database[] = {
 	{
-		/* DP EDID from Benq EL-2870u */
-		"Benq EL-2870u DP",
+		/* EDID Version 1.4. Timing requires 2 DP lanes. */
+		"External DP",
 		DRM_MODE_CONNECTOR_DisplayPort,
 		{
 		0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00,
-		0x09, 0xd1, 0x49, 0x79, 0x45, 0x54, 0x00, 0x00,
-		0x0c, 0x1e, 0x01, 0x04, 0xb5, 0x3e, 0x22, 0x78,
-		0x3f, 0x08, 0xa5, 0xa2, 0x57, 0x4f, 0xa2, 0x28,
-		0x0f, 0x50, 0x54, 0xa5, 0x6b, 0x80, 0xd1, 0xc0,
-		0x81, 0xc0, 0x81, 0x00, 0x81, 0x80, 0xa9, 0xc0,
-		0xb3, 0x00, 0xa9, 0x40, 0x01, 0x01, 0x4d, 0xd0,
-		0x00, 0xa0, 0xf0, 0x70, 0x3e, 0x80, 0x30, 0x20,
-		0x35, 0x00, 0x6d, 0x55, 0x21, 0x00, 0x00, 0x1a,
-		0x00, 0x00, 0x00, 0xff, 0x00, 0x46, 0x33, 0x4c,
-		0x30, 0x34, 0x33, 0x33, 0x33, 0x53, 0x4c, 0x30,
-		0x0a, 0x20, 0x00, 0x00, 0x00, 0xfd, 0x00, 0x28,
-		0x3c, 0x87, 0x87, 0x3c, 0x01, 0x0a, 0x20, 0x20,
-		0x20, 0x20, 0x20, 0x20, 0x00, 0x00, 0x00, 0xfc,
-		0x00, 0x42, 0x65, 0x6e, 0x51, 0x20, 0x45, 0x4c,
-		0x32, 0x38, 0x37, 0x30, 0x55, 0x0a, 0x01, 0xa8,
-		0x02, 0x03, 0x2e, 0xf1, 0x56, 0x61, 0x60, 0x5d,
-		0x5e, 0x5f, 0x10, 0x05, 0x04, 0x03, 0x02, 0x07,
-		0x06, 0x0f, 0x1f, 0x20, 0x21, 0x22, 0x14, 0x13,
-		0x12, 0x16, 0x01, 0x23, 0x09, 0x07, 0x07, 0x83,
-		0x01, 0x00, 0x00, 0xe3, 0x05, 0xc0, 0x00, 0xe6,
-		0x06, 0x05, 0x01, 0x5a, 0x53, 0x44, 0x02, 0x3a,
+		0x06, 0xb3, 0xaf, 0x24, 0x01, 0x01, 0x01, 0x01,
+		0x00, 0x1d, 0x01, 0x04, 0x80, 0x35, 0x1e, 0x78,
+		0x2b, 0x51, 0xb5, 0xa4, 0x54, 0x4f, 0xa0, 0x26,
+		0x0d, 0x50, 0x54, 0xbf, 0xcf, 0x00, 0x81, 0x40,
+		0x81, 0x80, 0x95, 0x00, 0x71, 0x4f, 0x81, 0xc0,
+		0xb3, 0x00, 0x01, 0x01, 0x01, 0x01, 0x02, 0x3a,
 		0x80, 0x18, 0x71, 0x38, 0x2d, 0x40, 0x58, 0x2c,
-		0x45, 0x00, 0x6d, 0x55, 0x21, 0x00, 0x00, 0x1e,
-		0x56, 0x5e, 0x00, 0xa0, 0xa0, 0xa0, 0x29, 0x50,
-		0x30, 0x20, 0x35, 0x00, 0x6d, 0x55, 0x21, 0x00,
-		0x00, 0x1a, 0x8c, 0x64, 0x00, 0x50, 0xf0, 0x70,
-		0x1f, 0x80, 0x08, 0x20, 0x18, 0x04, 0x6d, 0x55,
-		0x21, 0x00, 0x00, 0x1a, 0x00, 0x00, 0x00, 0x00,
+		0x45, 0x00, 0x0f, 0x28, 0x21, 0x00, 0x00, 0x1e,
+		0xfc, 0x7e, 0x80, 0x88, 0x70, 0x38, 0x12, 0x40,
+		0x18, 0x20, 0x35, 0x00, 0x0f, 0x28, 0x21, 0x00,
+		0x00, 0x1e, 0x00, 0x00, 0x00, 0xfd, 0x00, 0x30,
+		0x90, 0x1e, 0xb4, 0x22, 0x01, 0x0a, 0x20, 0x20,
+		0x20, 0x20, 0x20, 0x20, 0x00, 0x00, 0x00, 0xfc,
+		0x00, 0x41, 0x53, 0x55, 0x53, 0x20, 0x56, 0x50,
+		0x32, 0x34, 0x39, 0x0a, 0x20, 0x20, 0x01, 0x91,
+		0x02, 0x03, 0x2d, 0xf1, 0x4f, 0x01, 0x03, 0x04,
+		0x13, 0x1f, 0x12, 0x02, 0x11, 0x90, 0x0e, 0x0f,
+		0x1d, 0x1e, 0x3f, 0x40, 0x23, 0x09, 0x07, 0x07,
+		0x83, 0x01, 0x00, 0x00, 0x67, 0x03, 0x0c, 0x00,
+		0x10, 0x00, 0x00, 0x44, 0x68, 0x1a, 0x00, 0x00,
+		0x01, 0x01, 0x30, 0x90, 0xe6, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x93
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x16
 		},
-		{40, 60},
+		{48, 144},
 	},
+
 	{
 		/* HDMI EDID from ASUS VP249QGR */
 		"ASUS VP249QGR HDMI",
@@ -132,29 +136,63 @@ struct {
 		},
 		{48, 144},
 	},
+
+	{
+		/* EDID Version 1.4. Timing requires 2 DP lanes. */
+		"eDP",
+		DRM_MODE_CONNECTOR_eDP,
+		{
+		0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00,
+		0x06, 0xb3, 0xaf, 0x24, 0x01, 0x01, 0x01, 0x01,
+		0x00, 0x1d, 0x01, 0x04, 0x80, 0x35, 0x1e, 0x78,
+		0x2b, 0x51, 0xb5, 0xa4, 0x54, 0x4f, 0xa0, 0x26,
+		0x0d, 0x50, 0x54, 0xbf, 0xcf, 0x00, 0x81, 0x40,
+		0x81, 0x80, 0x95, 0x00, 0x71, 0x4f, 0x81, 0xc0,
+		0xb3, 0x00, 0x01, 0x01, 0x01, 0x01, 0x02, 0x3a,
+		0x80, 0x18, 0x71, 0x38, 0x2d, 0x40, 0x58, 0x2c,
+		0x45, 0x00, 0x0f, 0x28, 0x21, 0x00, 0x00, 0x1e,
+		0xfc, 0x7e, 0x80, 0x88, 0x70, 0x38, 0x12, 0x40,
+		0x18, 0x20, 0x35, 0x00, 0x0f, 0x28, 0x21, 0x00,
+		0x00, 0x1e, 0x00, 0x00, 0x00, 0xfd, 0x00, 0x30,
+		0x90, 0x1e, 0xb4, 0x22, 0x01, 0x0a, 0x20, 0x20,
+		0x20, 0x20, 0x20, 0x20, 0x00, 0x00, 0x00, 0xfc,
+		0x00, 0x41, 0x53, 0x55, 0x53, 0x20, 0x56, 0x50,
+		0x32, 0x34, 0x39, 0x0a, 0x20, 0x20, 0x01, 0x91,
+		0x02, 0x03, 0x2d, 0xf1, 0x4f, 0x01, 0x03, 0x04,
+		0x13, 0x1f, 0x12, 0x02, 0x11, 0x90, 0x0e, 0x0f,
+		0x1d, 0x1e, 0x3f, 0x40, 0x23, 0x09, 0x07, 0x07,
+		0x83, 0x01, 0x00, 0x00, 0x67, 0x03, 0x0c, 0x00,
+		0x10, 0x00, 0x00, 0x44, 0x68, 0x1a, 0x00, 0x00,
+		0x01, 0x01, 0x30, 0x90, 0xe6, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x16
+		},
+		{48, 144},
+	},
 };
 
-/* Common test setup. */
-static void test_init(data_t *data, uint32_t connector_type)
+static void test_init(data_t *data)
 {
 	igt_display_t *display = &data->display;
+	int i;
 
-	igt_display_reset(display);
+	for_each_pipe(display, i) {
+		igt_output_t *output = &display->outputs[i];
 
-	/* find connected outputs */
-	data->output = NULL;
-	for (int i=0; i < data->display.n_outputs; ++i) {
-		drmModeConnector *connector = data->display.outputs[i].config.connector;
-		if (connector->connection == DRM_MODE_CONNECTED &&
-			connector->connector_type == connector_type) {
-			data->output = &data->display.outputs[i];
-		}
+		data->output[i] = output;
 	}
-	igt_assert_f(data->output, "Requires connected output\n");
 
+	igt_display_reset(display);
 }
 
-/* Common test cleanup. */
 static void test_fini(data_t *data)
 {
 	igt_display_reset(&data->display);
@@ -185,6 +223,7 @@ static range_t get_freesync_range(data_t *data, igt_output_t *output)
 	fd = igt_debugfs_connector_dir(data->fd, output->name, O_RDONLY);
 	igt_assert(fd >= 0);
 
+	/* example usage: cat /sys/kernel/debug/dri/0/DP-1/vrr_range */
 	res = igt_debugfs_simple_read(fd, "vrr_range", buf, sizeof(buf));
 	igt_require(res > 0);
 
@@ -199,56 +238,86 @@ static range_t get_freesync_range(data_t *data, igt_output_t *output)
 	return range;
 }
 
-static void trigger_edid_parse(data_t *data, uint32_t test_flags)
+static void trigger_edid_parse(data_t *data, igt_output_t *output, uint32_t test_flags)
 {
 	if (test_flags & TEST_SUSPEND)
 		igt_system_suspend_autoresume(SUSPEND_STATE_MEM,
 					      SUSPEND_TEST_NONE);
 	else
-		igt_amd_trigger_hotplug(data->fd, data->output->name);
+		igt_amd_trigger_hotplug(data->fd, output->name);
 
 	/* more safe margin until resume and hotplug is completed */
 	usleep(1500000);
 }
 
 /* Check if EDID parsing is correctly reporting Freesync capability
- * by overriding EDID with ones from golden sample. Display under test
- * must still support Freesync.
+ * by overriding EDID with ones from golden sample.
  */
-static void test_freesync_parsing(data_t *data, uint32_t connector_type,
-		uint32_t test_flags)
+static void test_freesync_parsing_base(data_t *data, uint32_t test_flags)
 {
 	const struct edid *edid;
 	range_t range, expected_range;
-	int i;
+	igt_output_t *output;
+	int i, j, test_conn_cnt = 0;
 
-	test_init(data, connector_type);
+	test_init(data);
 
 	igt_amd_require_hpd(&data->display, data->fd);
 
-	/* find a test EDID */
-	i = find_test_edid_index(connector_type);
-	edid = (const struct edid *)edid_database[i].edid;
-	expected_range = edid_database[i].range;
+	for_each_pipe(&data->display, i) {
+		/* setup the output */
+		output = data->output[i];
+		if (!output || !igt_output_is_connected(output))
+			continue;
+
+		/* find a test EDID */
+		j = find_test_edid_index(output->config.connector->connector_type);
+
+		edid = (const struct edid *)edid_database[j].edid;
+		expected_range = edid_database[j].range;
+
+		/* eDP allow read edid for each display detection */
+		if (output->config.connector->connector_type == DRM_MODE_CONNECTOR_eDP)
+			igt_amd_allow_edp_hotplug_detect(data->fd, output->name, true);
+
+		/* force to use hard coded VRR EDID */
+		kmstest_force_edid(data->fd, output->config.connector, edid);
 
-	kmstest_force_edid(data->fd, data->output->config.connector, edid);
+		trigger_edid_parse(data, output, test_flags);
 
-	trigger_edid_parse(data, test_flags);
+		range = get_freesync_range(data, output);
 
-	range = get_freesync_range(data, data->output);
+		/* undo EDID override. re-parse EDID of display */
+		kmstest_force_edid(data->fd, output->config.connector, NULL);
 
-	/* undo EDID override and trigger a re-parsing of EDID */
-	kmstest_force_edid(data->fd, data->output->config.connector, NULL);
-	igt_amd_trigger_hotplug(data->fd, data->output->name);
+		igt_amd_trigger_hotplug(data->fd, output->name);
+
+		/* eDP dis-allow read edid for each display detection */
+		if (output->config.connector->connector_type == DRM_MODE_CONNECTOR_eDP)
+			igt_amd_allow_edp_hotplug_detect(data->fd, output->name, false);
+
+		test_conn_cnt++;
+
+		igt_assert_f(range.min == expected_range.min &&
+				range.max == expected_range.max,
+				"Expecting Freesync range %d-%d, got %d-%d\n",
+				expected_range.min, expected_range.max,
+				range.min, range.max);
+		igt_info("%s Freesync range: %d-%d\n", output->name, range.min, range.max);
+	}
 
 	test_fini(data);
+	igt_skip_on(test_conn_cnt == 0);
+}
+
+static inline void test_freesync_parsing(data_t *data)
+{
+	test_freesync_parsing_base(data, TEST_NONE);
+}
 
-	igt_assert_f(range.min == expected_range.min &&
-			range.max == expected_range.max,
-			"Expecting Freesync range %d-%d, got %d-%d\n",
-			expected_range.min, expected_range.max,
-			range.min, range.max);
-	igt_info("Freesync range: %d-%d\n", range.min, range.max);
+static inline void test_freesync_parsing_suspend(data_t *data)
+{
+	test_freesync_parsing_base(data, TEST_SUSPEND);
 }
 
 /* Returns true if an output supports VRR. */
@@ -260,32 +329,57 @@ static bool has_vrr(igt_output_t *output)
 
 /* More relaxed checking on Freesync capability.
  * Only checks if frame rate range is within legal range.
+ * Display under test MUST be VRR capable.
  */
-static void test_freesync_range(data_t *data, uint32_t connector_type,
-		uint32_t test_flags)
+static void test_freesync_range_base(data_t *data, uint32_t test_flags)
 {
 	range_t range;
+	igt_output_t *output;
+	int i, test_conn_cnt = 0;
 
-	test_init(data, connector_type);
+	test_init(data);
 
 	igt_amd_require_hpd(&data->display, data->fd);
 
-	igt_assert_f(has_vrr(data->output),
-			"connector %s is not VRR capable\n",
-			data->output->name);
+	for_each_pipe(&data->display, i) {
+		/* setup the output */
+		output = data->output[i];
+		if (!output || !igt_output_is_connected(output))
+			continue;
+
+		igt_debug_on_f(!has_vrr(output), "Requires output supports VRR\n");
+
+		if (!has_vrr(output)) {
+			igt_info("connector %s is not VRR capable\n", output->name);
+			continue;
+		}
+
+		trigger_edid_parse(data, output, test_flags);
+
+		range = get_freesync_range(data, output);
 
-	trigger_edid_parse(data, test_flags);
+		igt_assert_f(range.min != 0 &&
+				range.max != 0 &&
+				range.max - range.min > 10,
+				"Invalid Freesync range %d-%d\n",
+				range.min, range.max);
+		igt_info("%s Freesync range: %d-%d\n", output->name, range.min, range.max);
 
-	range = get_freesync_range(data, data->output);
+		test_conn_cnt++;
+	}
 
 	test_fini(data);
+	igt_skip_on(test_conn_cnt == 0);
+}
+
+static inline void test_freesync_range(data_t *data)
+{
+	test_freesync_range_base(data, TEST_NONE);
+}
 
-	igt_assert_f(range.min != 0 &&
-			range.max != 0 &&
-			range.max - range.min > 10,
-			"Invalid Freesync range %d-%d\n",
-			range.min, range.max);
-	igt_info("Freesync range: %d-%d\n", range.min, range.max);
+static inline void test_freesync_range_suspend(data_t *data)
+{
+	test_freesync_range_base(data, TEST_SUSPEND);
 }
 
 igt_main
@@ -307,33 +401,17 @@ igt_main
 		igt_display_require_output(&data.display);
 	}
 
-	igt_describe("Freesync EDID parsing on HDMI");
-	igt_subtest("freesync-parsing-hdmi") test_freesync_parsing(&data,
-			DRM_MODE_CONNECTOR_HDMIA, TEST_NONE);
-	igt_describe("Freesync EDID parsing on DP");
-	igt_subtest("freesync-parsing-dp") test_freesync_parsing(&data,
-			DRM_MODE_CONNECTOR_DisplayPort, TEST_NONE);
-
-	igt_describe("Freesync EDID parsing on HDMI after suspend");
-	igt_subtest("freesync-parsing-hdmi-suspend") test_freesync_parsing(&data,
-			DRM_MODE_CONNECTOR_HDMIA, TEST_SUSPEND);
-	igt_describe("Freesync EDID parsing on DP after suspend");
-	igt_subtest("freesync-parsing-dp-suspend") test_freesync_parsing(&data,
-			DRM_MODE_CONNECTOR_DisplayPort, TEST_SUSPEND);
-
-	igt_describe("Freesync range on HDMI");
-	igt_subtest("freesync-range-hdmi") test_freesync_range(&data,
-			DRM_MODE_CONNECTOR_HDMIA, TEST_NONE);
-	igt_describe("Freesync range on DP");
-	igt_subtest("freesync-range-dp") test_freesync_range(&data,
-			DRM_MODE_CONNECTOR_DisplayPort, TEST_NONE);
-
-	igt_describe("Freesync range on HDMI after suspend");
-	igt_subtest("freesync-range-hdmi-suspend") test_freesync_range(&data,
-			DRM_MODE_CONNECTOR_HDMIA, TEST_SUSPEND);
-	igt_describe("Freesync range on DP after suspend");
-	igt_subtest("freesync-range-dp-suspend") test_freesync_range(&data,
-			DRM_MODE_CONNECTOR_DisplayPort, TEST_SUSPEND);
+	igt_describe("Hard coded Freesync EDID parsing");
+	igt_subtest("freesync-parsing") test_freesync_parsing(&data);
+
+	igt_describe("Hard coded Freesync EDID parsing after suspend");
+	igt_subtest("freesync-parsing-suspend") test_freesync_parsing_suspend(&data);
+
+	igt_describe("Freesync range from display");
+	igt_subtest("freesync-range") test_freesync_range(&data);
+
+	igt_describe("Freesync range from display after suspend");
+	igt_subtest("freesync-range-suspend") test_freesync_range_suspend(&data);
 
 	igt_fixture
 	{
-- 
2.25.1

^ permalink raw reply related	[flat|nested] 7+ messages in thread

* [igt-dev] ✗ GitLab.Pipeline: warning for tests/amdgpu/amd_vrr_range: add vrr range check for edp (rev2)
  2023-05-30 18:53 [igt-dev] [PATCH] [i-g-t] tests/amdgpu/amd_vrr_range: add vrr range check for edp Hersen Wu
@ 2023-05-30 20:30 ` Patchwork
  2023-05-30 20:52 ` [igt-dev] ✓ Fi.CI.BAT: success " Patchwork
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2023-05-30 20:30 UTC (permalink / raw)
  To: Hersen Wu; +Cc: igt-dev

== Series Details ==

Series: tests/amdgpu/amd_vrr_range: add vrr range check for edp (rev2)
URL   : https://patchwork.freedesktop.org/series/118575/
State : warning

== Summary ==

Pipeline status: FAILED.

see https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/pipelines/894851 for the overview.

containers:igt has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/42736066):
  9fd1ffba2187f0b85885886834aef59d8ee1f3c907a38dc4e91b95a2bd15dd66
  STEP 4: ENV PATH="/opt/igt/bin:${PATH}"
  cdb6a9434760c72c6dd727d4343aec66f425e9491217e0344acbc788e4cfe441
  STEP 5: ENV LD_LIBRARY_PATH="/opt/igt/lib:/opt/igt/lib64:${LD_LIBRARY_PATH}"
  3c75b801725844a357078eff8235d2b66fe67504c4e76c5e4faa9b96e2dbe51e
  STEP 6: ENV IGT_TEST_ROOT="/opt/igt/libexec/igt-gpu-tools"
  6adc55fa8209ad8197d641cd9eb827e0cc9eb1cbb8c0c7e8c1aac14d1e8c859d
  STEP 7: CMD docker-help.sh
  STEP 8: COMMIT registry.freedesktop.org/gfx-ci/igt-ci-tags/igt:commit-99dee995fc49daccbd4f40e0a63529cb5ad635dd
  f3750046c5abe7c7fd3f441625b6c63fd629409d0edb6345dde742e16b4f8b5f
  Getting image source signatures
  Copying blob sha256:8fb81f3014ce254476416f2d48f2e929fa609b664d379f60342525ccb3acdca0
  Copying blob sha256:3504a8337d3b7eaabfd338d6a971d02441d28ebef8bd81f730d87f936ed58079
  Error: Error copying image to the remote destination: Error trying to reuse blob sha256:12c519b4e9420c069e8c30120e8a83a6de69345d8efa6d4d76a89fb5cb284097 at destination: failed to read from destination repository gfx-ci/igt-ci-tags/igt: 500 (Internal Server Error)
  section_end:1685478535:step_script
  section_start:1685478535:cleanup_file_variables
  Cleaning up project directory and file based variables
  section_end:1685478536:cleanup_file_variables
  ERROR: Job failed: exit code 1

== Logs ==

For more details see: https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/pipelines/894851

^ permalink raw reply	[flat|nested] 7+ messages in thread

* [igt-dev] ✓ Fi.CI.BAT: success for tests/amdgpu/amd_vrr_range: add vrr range check for edp (rev2)
  2023-05-30 18:53 [igt-dev] [PATCH] [i-g-t] tests/amdgpu/amd_vrr_range: add vrr range check for edp Hersen Wu
  2023-05-30 20:30 ` [igt-dev] ✗ GitLab.Pipeline: warning for tests/amdgpu/amd_vrr_range: add vrr range check for edp (rev2) Patchwork
@ 2023-05-30 20:52 ` Patchwork
  2023-05-31  3:56 ` [igt-dev] [PATCH] [i-g-t] tests/amdgpu/amd_vrr_range: add vrr range check for edp Alex Hung
  2023-05-31 22:57 ` [igt-dev] ✓ Fi.CI.IGT: success for tests/amdgpu/amd_vrr_range: add vrr range check for edp (rev2) Patchwork
  3 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2023-05-30 20:52 UTC (permalink / raw)
  To: Hersen Wu; +Cc: igt-dev

[-- Attachment #1: Type: text/plain, Size: 6338 bytes --]

== Series Details ==

Series: tests/amdgpu/amd_vrr_range: add vrr range check for edp (rev2)
URL   : https://patchwork.freedesktop.org/series/118575/
State : success

== Summary ==

CI Bug Log - changes from IGT_7311 -> IGTPW_9075
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/index.html

Participating hosts (36 -> 37)
------------------------------

  Additional (1): bat-mtlp-6 

Known issues
------------

  Here are the changes found in IGTPW_9075 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live@gt_heartbeat:
    - fi-apl-guc:         [PASS][1] -> [DMESG-FAIL][2] ([i915#5334])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7311/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@slpc:
    - bat-rpls-2:         NOTRUN -> [DMESG-WARN][3] ([i915#6367])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/bat-rpls-2/igt@i915_selftest@live@slpc.html

  * igt@i915_suspend@basic-s2idle-without-i915:
    - bat-rpls-2:         NOTRUN -> [ABORT][4] ([i915#6687])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/bat-rpls-2/igt@i915_suspend@basic-s2idle-without-i915.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
    - bat-dg2-11:         NOTRUN -> [SKIP][5] ([i915#1845] / [i915#5354]) +2 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html

  
#### Possible fixes ####

  * igt@i915_selftest@live@requests:
    - {bat-mtlp-8}:       [DMESG-FAIL][6] ([i915#8497]) -> [PASS][7]
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7311/bat-mtlp-8/igt@i915_selftest@live@requests.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/bat-mtlp-8/igt@i915_selftest@live@requests.html

  * igt@i915_selftest@live@reset:
    - bat-rpls-2:         [ABORT][8] ([i915#4983] / [i915#7461] / [i915#7913] / [i915#8347]) -> [PASS][9]
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7311/bat-rpls-2/igt@i915_selftest@live@reset.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/bat-rpls-2/igt@i915_selftest@live@reset.html

  * igt@kms_flip@basic-plain-flip@d-dp6:
    - {bat-adlp-11}:      [ABORT][10] ([i915#4423]) -> [PASS][11]
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7311/bat-adlp-11/igt@kms_flip@basic-plain-flip@d-dp6.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/bat-adlp-11/igt@kms_flip@basic-plain-flip@d-dp6.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-1:
    - bat-dg2-8:          [FAIL][12] ([i915#7932]) -> [PASS][13]
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7311/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-1.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-1.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [IGT#6]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/6
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
  [i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
  [i915#3595]: https://gitlab.freedesktop.org/drm/intel/issues/3595
  [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4093]: https://gitlab.freedesktop.org/drm/intel/issues/4093
  [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
  [i915#4342]: https://gitlab.freedesktop.org/drm/intel/issues/4342
  [i915#4423]: https://gitlab.freedesktop.org/drm/intel/issues/4423
  [i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
  [i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
  [i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274
  [i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
  [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
  [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
  [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
  [i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
  [i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645
  [i915#6687]: https://gitlab.freedesktop.org/drm/intel/issues/6687
  [i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456
  [i915#7461]: https://gitlab.freedesktop.org/drm/intel/issues/7461
  [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
  [i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
  [i915#7932]: https://gitlab.freedesktop.org/drm/intel/issues/7932
  [i915#8347]: https://gitlab.freedesktop.org/drm/intel/issues/8347
  [i915#8497]: https://gitlab.freedesktop.org/drm/intel/issues/8497


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_7311 -> IGTPW_9075

  CI-20190529: 20190529
  CI_DRM_13200: 0ae4ee2c735979030a0219218081eee661606921 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_9075: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/index.html
  IGT_7311: c031030f39aff973330668a5a2f1593408da78ae @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git


Testlist changes
----------------

-igt@kms_vrr@vrr-base-to-various-vrr-modes

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/index.html

[-- Attachment #2: Type: text/html, Size: 5496 bytes --]

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [igt-dev] [PATCH] [i-g-t] tests/amdgpu/amd_vrr_range: add vrr range check for edp
  2023-05-30 18:53 [igt-dev] [PATCH] [i-g-t] tests/amdgpu/amd_vrr_range: add vrr range check for edp Hersen Wu
  2023-05-30 20:30 ` [igt-dev] ✗ GitLab.Pipeline: warning for tests/amdgpu/amd_vrr_range: add vrr range check for edp (rev2) Patchwork
  2023-05-30 20:52 ` [igt-dev] ✓ Fi.CI.BAT: success " Patchwork
@ 2023-05-31  3:56 ` Alex Hung
  2023-05-31 22:57 ` [igt-dev] ✓ Fi.CI.IGT: success for tests/amdgpu/amd_vrr_range: add vrr range check for edp (rev2) Patchwork
  3 siblings, 0 replies; 7+ messages in thread
From: Alex Hung @ 2023-05-31  3:56 UTC (permalink / raw)
  To: Hersen Wu, igt-dev, rodrigo.siqueira, aurabindo.pillai,
	stylon.wang, hamza.mahfooz



On 2023-05-30 12:53, Hersen Wu wrote:
> run test for display connected instead of hard coded connector type.
> for dp, edp, video timing of hard coded vrr edid need only 2 dp
> lanes. this will let test pass without bandwidth failure on 2 lanes
> dp or edp display.
> add vrr range check for edp

Hi Hersen,

It is difficult to read the commit message. You may want to add more 
explanations and make sure the capitalization is correct.


> 
> Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
> ---
>   lib/igt_amd.c                |  31 ++++
>   lib/igt_amd.h                |   2 +
>   tests/amdgpu/amd_vrr_range.c | 298 ++++++++++++++++++++++-------------
>   3 files changed, 221 insertions(+), 110 deletions(-)
> 
> diff --git a/lib/igt_amd.c b/lib/igt_amd.c
> index 09923101f..8837714f7 100644
> --- a/lib/igt_amd.c
> +++ b/lib/igt_amd.c
> @@ -1111,6 +1111,37 @@ int igt_amd_read_psr_state(int drm_fd, char *connector_name)
>   	return strtol(buf, NULL, 10);
>   }
>   
> +/**
> + * igt_amd_allow_edp_hotplug_detect: notify kernel read edp edid all the time
> + * @drm_fd: DRM file descriptor
> + * @connector_name: The connector's name
> + * @enable: allow or disable kernel read eDP EDID for each display detection
> + * example usage: echo 0x1 >
> + * /sys/kernel/debug/dri/0/eDP-1/allow_edp_hotplug_detection
> + */
> +void igt_amd_allow_edp_hotplug_detect(int drm_fd, char *connector_name, bool enable)
> +{
> +	int fd, hpd_fd, wr_len;
> +	const char *allow_hotplug_detect = "1";
> +	const char *dis_allow_hotplug_detect = "0";
> +
> +	fd = igt_debugfs_connector_dir(drm_fd, connector_name, O_RDONLY);
> +	igt_assert(fd >= 0);
> +	hpd_fd = openat(fd, DEBUGFS_ALLOW_EDP_HOTPLUG_DETECT, O_WRONLY);
> +	close(fd);
> +	igt_assert(hpd_fd >= 0);
> +
> +	if (enable) {
> +		wr_len = write(hpd_fd, allow_hotplug_detect, strlen(allow_hotplug_detect));
> +		igt_assert_eq(wr_len, strlen(allow_hotplug_detect));
> +	} else {
> +		wr_len = write(hpd_fd, dis_allow_hotplug_detect, strlen(dis_allow_hotplug_detect));
> +		igt_assert_eq(wr_len, strlen(dis_allow_hotplug_detect));
> +	}
> +
> +	close(hpd_fd);
> +}
> +
>   /**
>    * @brief check if AMDGPU DM visual confirm debugfs interface entry exist and defined
>    *
> diff --git a/lib/igt_amd.h b/lib/igt_amd.h
> index 428bfe6f7..d57390405 100644
> --- a/lib/igt_amd.h
> +++ b/lib/igt_amd.h
> @@ -48,6 +48,7 @@
>   #define MAX_SUPPORTED_ILR 8
>   #define DEBUGFS_EDP_PSR_CAP	"psr_capability"
>   #define DEBUGFS_EDP_PSR_STATE	"psr_state"
> +#define DEBUGFS_ALLOW_EDP_HOTPLUG_DETECT "allow_edp_hotplug_detection"
>   
>   /* amdgpu DM interface entries */
>   #define DEBUGFS_DM_VISUAL_CONFIRM "amdgpu_dm_visual_confirm"
> @@ -187,6 +188,7 @@ bool igt_amd_psr_support_sink(int drm_fd, char *connector_name, enum psr_mode mo
>   bool igt_amd_psr_support_drv(int drm_fd, char *connector_name, enum psr_mode mode);
>   bool igt_amd_output_has_psr_state(int drm_fd, char *connector_name);
>   int  igt_amd_read_psr_state(int drm_fd, char *connector_name);
> +void igt_amd_allow_edp_hotplug_detect(int drm_fd, char *connector_name, bool enable);
>   
>   /* DM interface helpers */
>   bool igt_amd_has_visual_confirm(int drm_fd);
> diff --git a/tests/amdgpu/amd_vrr_range.c b/tests/amdgpu/amd_vrr_range.c
> index 2f27296dd..3f8f23e9a 100644
> --- a/tests/amdgpu/amd_vrr_range.c
> +++ b/tests/amdgpu/amd_vrr_range.c
> @@ -27,11 +27,14 @@
>   
>   IGT_TEST_DESCRIPTION("Test EDID parsing and debugfs reporting on Freesync displays");
>   
> +/* Maximumm pipes on any AMD ASIC. */
> +#define MAX_PIPES 6
> +
>   /* Common test data. */
>   typedef struct data {
>   	igt_display_t display;
>   	igt_plane_t *primary;
> -	igt_output_t *output;
> +	igt_output_t *output[MAX_PIPES];
>   	int fd;
>   } data_t;
>   
> @@ -53,45 +56,46 @@ struct {
>   	const range_t range;
>   } edid_database[] = {
>   	{
> -		/* DP EDID from Benq EL-2870u */
> -		"Benq EL-2870u DP",
> +		/* EDID Version 1.4. Timing requires 2 DP lanes. */
> +		"External DP",
>   		DRM_MODE_CONNECTOR_DisplayPort,
>   		{
>   		0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00,
> -		0x09, 0xd1, 0x49, 0x79, 0x45, 0x54, 0x00, 0x00,
> -		0x0c, 0x1e, 0x01, 0x04, 0xb5, 0x3e, 0x22, 0x78,
> -		0x3f, 0x08, 0xa5, 0xa2, 0x57, 0x4f, 0xa2, 0x28,
> -		0x0f, 0x50, 0x54, 0xa5, 0x6b, 0x80, 0xd1, 0xc0,
> -		0x81, 0xc0, 0x81, 0x00, 0x81, 0x80, 0xa9, 0xc0,
> -		0xb3, 0x00, 0xa9, 0x40, 0x01, 0x01, 0x4d, 0xd0,
> -		0x00, 0xa0, 0xf0, 0x70, 0x3e, 0x80, 0x30, 0x20,
> -		0x35, 0x00, 0x6d, 0x55, 0x21, 0x00, 0x00, 0x1a,
> -		0x00, 0x00, 0x00, 0xff, 0x00, 0x46, 0x33, 0x4c,
> -		0x30, 0x34, 0x33, 0x33, 0x33, 0x53, 0x4c, 0x30,
> -		0x0a, 0x20, 0x00, 0x00, 0x00, 0xfd, 0x00, 0x28,
> -		0x3c, 0x87, 0x87, 0x3c, 0x01, 0x0a, 0x20, 0x20,
> -		0x20, 0x20, 0x20, 0x20, 0x00, 0x00, 0x00, 0xfc,
> -		0x00, 0x42, 0x65, 0x6e, 0x51, 0x20, 0x45, 0x4c,
> -		0x32, 0x38, 0x37, 0x30, 0x55, 0x0a, 0x01, 0xa8,
> -		0x02, 0x03, 0x2e, 0xf1, 0x56, 0x61, 0x60, 0x5d,
> -		0x5e, 0x5f, 0x10, 0x05, 0x04, 0x03, 0x02, 0x07,
> -		0x06, 0x0f, 0x1f, 0x20, 0x21, 0x22, 0x14, 0x13,
> -		0x12, 0x16, 0x01, 0x23, 0x09, 0x07, 0x07, 0x83,
> -		0x01, 0x00, 0x00, 0xe3, 0x05, 0xc0, 0x00, 0xe6,
> -		0x06, 0x05, 0x01, 0x5a, 0x53, 0x44, 0x02, 0x3a,
> +		0x06, 0xb3, 0xaf, 0x24, 0x01, 0x01, 0x01, 0x01,
> +		0x00, 0x1d, 0x01, 0x04, 0x80, 0x35, 0x1e, 0x78,
> +		0x2b, 0x51, 0xb5, 0xa4, 0x54, 0x4f, 0xa0, 0x26,
> +		0x0d, 0x50, 0x54, 0xbf, 0xcf, 0x00, 0x81, 0x40,
> +		0x81, 0x80, 0x95, 0x00, 0x71, 0x4f, 0x81, 0xc0,
> +		0xb3, 0x00, 0x01, 0x01, 0x01, 0x01, 0x02, 0x3a,
>   		0x80, 0x18, 0x71, 0x38, 0x2d, 0x40, 0x58, 0x2c,
> -		0x45, 0x00, 0x6d, 0x55, 0x21, 0x00, 0x00, 0x1e,
> -		0x56, 0x5e, 0x00, 0xa0, 0xa0, 0xa0, 0x29, 0x50,
> -		0x30, 0x20, 0x35, 0x00, 0x6d, 0x55, 0x21, 0x00,
> -		0x00, 0x1a, 0x8c, 0x64, 0x00, 0x50, 0xf0, 0x70,
> -		0x1f, 0x80, 0x08, 0x20, 0x18, 0x04, 0x6d, 0x55,
> -		0x21, 0x00, 0x00, 0x1a, 0x00, 0x00, 0x00, 0x00,
> +		0x45, 0x00, 0x0f, 0x28, 0x21, 0x00, 0x00, 0x1e,
> +		0xfc, 0x7e, 0x80, 0x88, 0x70, 0x38, 0x12, 0x40,
> +		0x18, 0x20, 0x35, 0x00, 0x0f, 0x28, 0x21, 0x00,
> +		0x00, 0x1e, 0x00, 0x00, 0x00, 0xfd, 0x00, 0x30,
> +		0x90, 0x1e, 0xb4, 0x22, 0x01, 0x0a, 0x20, 0x20,
> +		0x20, 0x20, 0x20, 0x20, 0x00, 0x00, 0x00, 0xfc,
> +		0x00, 0x41, 0x53, 0x55, 0x53, 0x20, 0x56, 0x50,
> +		0x32, 0x34, 0x39, 0x0a, 0x20, 0x20, 0x01, 0x91,
> +		0x02, 0x03, 0x2d, 0xf1, 0x4f, 0x01, 0x03, 0x04,
> +		0x13, 0x1f, 0x12, 0x02, 0x11, 0x90, 0x0e, 0x0f,
> +		0x1d, 0x1e, 0x3f, 0x40, 0x23, 0x09, 0x07, 0x07,
> +		0x83, 0x01, 0x00, 0x00, 0x67, 0x03, 0x0c, 0x00,
> +		0x10, 0x00, 0x00, 0x44, 0x68, 0x1a, 0x00, 0x00,
> +		0x01, 0x01, 0x30, 0x90, 0xe6, 0x00, 0x00, 0x00,
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
>   		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
>   		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> -		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x93
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x16
>   		},
> -		{40, 60},
> +		{48, 144},
>   	},
> +
>   	{
>   		/* HDMI EDID from ASUS VP249QGR */
>   		"ASUS VP249QGR HDMI",
> @@ -132,29 +136,63 @@ struct {
>   		},
>   		{48, 144},
>   	},
> +
> +	{
> +		/* EDID Version 1.4. Timing requires 2 DP lanes. */
> +		"eDP",
> +		DRM_MODE_CONNECTOR_eDP,
> +		{
> +		0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00,
> +		0x06, 0xb3, 0xaf, 0x24, 0x01, 0x01, 0x01, 0x01,
> +		0x00, 0x1d, 0x01, 0x04, 0x80, 0x35, 0x1e, 0x78,
> +		0x2b, 0x51, 0xb5, 0xa4, 0x54, 0x4f, 0xa0, 0x26,
> +		0x0d, 0x50, 0x54, 0xbf, 0xcf, 0x00, 0x81, 0x40,
> +		0x81, 0x80, 0x95, 0x00, 0x71, 0x4f, 0x81, 0xc0,
> +		0xb3, 0x00, 0x01, 0x01, 0x01, 0x01, 0x02, 0x3a,
> +		0x80, 0x18, 0x71, 0x38, 0x2d, 0x40, 0x58, 0x2c,
> +		0x45, 0x00, 0x0f, 0x28, 0x21, 0x00, 0x00, 0x1e,
> +		0xfc, 0x7e, 0x80, 0x88, 0x70, 0x38, 0x12, 0x40,
> +		0x18, 0x20, 0x35, 0x00, 0x0f, 0x28, 0x21, 0x00,
> +		0x00, 0x1e, 0x00, 0x00, 0x00, 0xfd, 0x00, 0x30,
> +		0x90, 0x1e, 0xb4, 0x22, 0x01, 0x0a, 0x20, 0x20,
> +		0x20, 0x20, 0x20, 0x20, 0x00, 0x00, 0x00, 0xfc,
> +		0x00, 0x41, 0x53, 0x55, 0x53, 0x20, 0x56, 0x50,
> +		0x32, 0x34, 0x39, 0x0a, 0x20, 0x20, 0x01, 0x91,
> +		0x02, 0x03, 0x2d, 0xf1, 0x4f, 0x01, 0x03, 0x04,
> +		0x13, 0x1f, 0x12, 0x02, 0x11, 0x90, 0x0e, 0x0f,
> +		0x1d, 0x1e, 0x3f, 0x40, 0x23, 0x09, 0x07, 0x07,
> +		0x83, 0x01, 0x00, 0x00, 0x67, 0x03, 0x0c, 0x00,
> +		0x10, 0x00, 0x00, 0x44, 0x68, 0x1a, 0x00, 0x00,
> +		0x01, 0x01, 0x30, 0x90, 0xe6, 0x00, 0x00, 0x00,
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x16
> +		},
> +		{48, 144},
> +	},
>   };
>   
> -/* Common test setup. */
> -static void test_init(data_t *data, uint32_t connector_type)
> +static void test_init(data_t *data)
>   {
>   	igt_display_t *display = &data->display;
> +	int i;
>   
> -	igt_display_reset(display);
> +	for_each_pipe(display, i) {
> +		igt_output_t *output = &display->outputs[i];
>   
> -	/* find connected outputs */
> -	data->output = NULL;
> -	for (int i=0; i < data->display.n_outputs; ++i) {
> -		drmModeConnector *connector = data->display.outputs[i].config.connector;
> -		if (connector->connection == DRM_MODE_CONNECTED &&
> -			connector->connector_type == connector_type) {
> -			data->output = &data->display.outputs[i];
> -		}
> +		data->output[i] = output;
>   	}
> -	igt_assert_f(data->output, "Requires connected output\n");
>   
> +	igt_display_reset(display);
>   }
>   
> -/* Common test cleanup. */
>   static void test_fini(data_t *data)
>   {
>   	igt_display_reset(&data->display);
> @@ -185,6 +223,7 @@ static range_t get_freesync_range(data_t *data, igt_output_t *output)
>   	fd = igt_debugfs_connector_dir(data->fd, output->name, O_RDONLY);
>   	igt_assert(fd >= 0);
>   
> +	/* example usage: cat /sys/kernel/debug/dri/0/DP-1/vrr_range */
>   	res = igt_debugfs_simple_read(fd, "vrr_range", buf, sizeof(buf));
>   	igt_require(res > 0);
>   
> @@ -199,56 +238,86 @@ static range_t get_freesync_range(data_t *data, igt_output_t *output)
>   	return range;
>   }
>   
> -static void trigger_edid_parse(data_t *data, uint32_t test_flags)
> +static void trigger_edid_parse(data_t *data, igt_output_t *output, uint32_t test_flags)
>   {
>   	if (test_flags & TEST_SUSPEND)
>   		igt_system_suspend_autoresume(SUSPEND_STATE_MEM,
>   					      SUSPEND_TEST_NONE);
>   	else
> -		igt_amd_trigger_hotplug(data->fd, data->output->name);
> +		igt_amd_trigger_hotplug(data->fd, output->name);
>   
>   	/* more safe margin until resume and hotplug is completed */
>   	usleep(1500000);
>   }
>   
>   /* Check if EDID parsing is correctly reporting Freesync capability
> - * by overriding EDID with ones from golden sample. Display under test
> - * must still support Freesync.
> + * by overriding EDID with ones from golden sample.
>    */
> -static void test_freesync_parsing(data_t *data, uint32_t connector_type,
> -		uint32_t test_flags)
> +static void test_freesync_parsing_base(data_t *data, uint32_t test_flags)
>   {
>   	const struct edid *edid;
>   	range_t range, expected_range;
> -	int i;
> +	igt_output_t *output;
> +	int i, j, test_conn_cnt = 0;
>   
> -	test_init(data, connector_type);
> +	test_init(data);
>   
>   	igt_amd_require_hpd(&data->display, data->fd);
>   
> -	/* find a test EDID */
> -	i = find_test_edid_index(connector_type);
> -	edid = (const struct edid *)edid_database[i].edid;
> -	expected_range = edid_database[i].range;
> +	for_each_pipe(&data->display, i) {
> +		/* setup the output */
> +		output = data->output[i];
> +		if (!output || !igt_output_is_connected(output))
> +			continue;
> +
> +		/* find a test EDID */
> +		j = find_test_edid_index(output->config.connector->connector_type);
> +
> +		edid = (const struct edid *)edid_database[j].edid;
> +		expected_range = edid_database[j].range;
> +
> +		/* eDP allow read edid for each display detection */
> +		if (output->config.connector->connector_type == DRM_MODE_CONNECTOR_eDP)
> +			igt_amd_allow_edp_hotplug_detect(data->fd, output->name, true);
> +
> +		/* force to use hard coded VRR EDID */
> +		kmstest_force_edid(data->fd, output->config.connector, edid);
>   
> -	kmstest_force_edid(data->fd, data->output->config.connector, edid);
> +		trigger_edid_parse(data, output, test_flags);
>   
> -	trigger_edid_parse(data, test_flags);
> +		range = get_freesync_range(data, output);
>   
> -	range = get_freesync_range(data, data->output);
> +		/* undo EDID override. re-parse EDID of display */
> +		kmstest_force_edid(data->fd, output->config.connector, NULL);
>   
> -	/* undo EDID override and trigger a re-parsing of EDID */
> -	kmstest_force_edid(data->fd, data->output->config.connector, NULL);
> -	igt_amd_trigger_hotplug(data->fd, data->output->name);
> +		igt_amd_trigger_hotplug(data->fd, output->name);
> +
> +		/* eDP dis-allow read edid for each display detection */
> +		if (output->config.connector->connector_type == DRM_MODE_CONNECTOR_eDP)
> +			igt_amd_allow_edp_hotplug_detect(data->fd, output->name, false);
> +
> +		test_conn_cnt++;
> +
> +		igt_assert_f(range.min == expected_range.min &&
> +				range.max == expected_range.max,
> +				"Expecting Freesync range %d-%d, got %d-%d\n",
> +				expected_range.min, expected_range.max,
> +				range.min, range.max);
> +		igt_info("%s Freesync range: %d-%d\n", output->name, range.min, range.max);
> +	}
>   
>   	test_fini(data);
> +	igt_skip_on(test_conn_cnt == 0);
> +}
> +
> +static inline void test_freesync_parsing(data_t *data)
> +{
> +	test_freesync_parsing_base(data, TEST_NONE);
> +}
>   
> -	igt_assert_f(range.min == expected_range.min &&
> -			range.max == expected_range.max,
> -			"Expecting Freesync range %d-%d, got %d-%d\n",
> -			expected_range.min, expected_range.max,
> -			range.min, range.max);
> -	igt_info("Freesync range: %d-%d\n", range.min, range.max);
> +static inline void test_freesync_parsing_suspend(data_t *data)
> +{
> +	test_freesync_parsing_base(data, TEST_SUSPEND);
>   }
>   
>   /* Returns true if an output supports VRR. */
> @@ -260,32 +329,57 @@ static bool has_vrr(igt_output_t *output)
>   
>   /* More relaxed checking on Freesync capability.
>    * Only checks if frame rate range is within legal range.
> + * Display under test MUST be VRR capable.
>    */
> -static void test_freesync_range(data_t *data, uint32_t connector_type,
> -		uint32_t test_flags)
> +static void test_freesync_range_base(data_t *data, uint32_t test_flags)
>   {
>   	range_t range;
> +	igt_output_t *output;
> +	int i, test_conn_cnt = 0;
>   
> -	test_init(data, connector_type);
> +	test_init(data);
>   
>   	igt_amd_require_hpd(&data->display, data->fd);
>   
> -	igt_assert_f(has_vrr(data->output),
> -			"connector %s is not VRR capable\n",
> -			data->output->name);
> +	for_each_pipe(&data->display, i) {
> +		/* setup the output */
> +		output = data->output[i];
> +		if (!output || !igt_output_is_connected(output))
> +			continue;
> +
> +		igt_debug_on_f(!has_vrr(output), "Requires output supports VRR\n");
> +
> +		if (!has_vrr(output)) {
> +			igt_info("connector %s is not VRR capable\n", output->name);
> +			continue;
> +		}
> +
> +		trigger_edid_parse(data, output, test_flags);
> +
> +		range = get_freesync_range(data, output);
>   
> -	trigger_edid_parse(data, test_flags);
> +		igt_assert_f(range.min != 0 &&
> +				range.max != 0 &&
> +				range.max - range.min > 10,
> +				"Invalid Freesync range %d-%d\n",
> +				range.min, range.max);
> +		igt_info("%s Freesync range: %d-%d\n", output->name, range.min, range.max);
>   
> -	range = get_freesync_range(data, data->output);
> +		test_conn_cnt++;
> +	}
>   
>   	test_fini(data);
> +	igt_skip_on(test_conn_cnt == 0);
> +}
> +
> +static inline void test_freesync_range(data_t *data)
> +{
> +	test_freesync_range_base(data, TEST_NONE);
> +}
>   
> -	igt_assert_f(range.min != 0 &&
> -			range.max != 0 &&
> -			range.max - range.min > 10,
> -			"Invalid Freesync range %d-%d\n",
> -			range.min, range.max);
> -	igt_info("Freesync range: %d-%d\n", range.min, range.max);
> +static inline void test_freesync_range_suspend(data_t *data)
> +{
> +	test_freesync_range_base(data, TEST_SUSPEND);
>   }
>   
>   igt_main
> @@ -307,33 +401,17 @@ igt_main
>   		igt_display_require_output(&data.display);
>   	}
>   
> -	igt_describe("Freesync EDID parsing on HDMI");
> -	igt_subtest("freesync-parsing-hdmi") test_freesync_parsing(&data,
> -			DRM_MODE_CONNECTOR_HDMIA, TEST_NONE);
> -	igt_describe("Freesync EDID parsing on DP");
> -	igt_subtest("freesync-parsing-dp") test_freesync_parsing(&data,
> -			DRM_MODE_CONNECTOR_DisplayPort, TEST_NONE);
> -
> -	igt_describe("Freesync EDID parsing on HDMI after suspend");
> -	igt_subtest("freesync-parsing-hdmi-suspend") test_freesync_parsing(&data,
> -			DRM_MODE_CONNECTOR_HDMIA, TEST_SUSPEND);
> -	igt_describe("Freesync EDID parsing on DP after suspend");
> -	igt_subtest("freesync-parsing-dp-suspend") test_freesync_parsing(&data,
> -			DRM_MODE_CONNECTOR_DisplayPort, TEST_SUSPEND);
> -
> -	igt_describe("Freesync range on HDMI");
> -	igt_subtest("freesync-range-hdmi") test_freesync_range(&data,
> -			DRM_MODE_CONNECTOR_HDMIA, TEST_NONE);
> -	igt_describe("Freesync range on DP");
> -	igt_subtest("freesync-range-dp") test_freesync_range(&data,
> -			DRM_MODE_CONNECTOR_DisplayPort, TEST_NONE);
> -
> -	igt_describe("Freesync range on HDMI after suspend");
> -	igt_subtest("freesync-range-hdmi-suspend") test_freesync_range(&data,
> -			DRM_MODE_CONNECTOR_HDMIA, TEST_SUSPEND);
> -	igt_describe("Freesync range on DP after suspend");
> -	igt_subtest("freesync-range-dp-suspend") test_freesync_range(&data,
> -			DRM_MODE_CONNECTOR_DisplayPort, TEST_SUSPEND);
> +	igt_describe("Hard coded Freesync EDID parsing");
> +	igt_subtest("freesync-parsing") test_freesync_parsing(&data);
> +
> +	igt_describe("Hard coded Freesync EDID parsing after suspend");
> +	igt_subtest("freesync-parsing-suspend") test_freesync_parsing_suspend(&data);
> +
> +	igt_describe("Freesync range from display");
> +	igt_subtest("freesync-range") test_freesync_range(&data);
> +
> +	igt_describe("Freesync range from display after suspend");
> +	igt_subtest("freesync-range-suspend") test_freesync_range_suspend(&data);
>   
>   	igt_fixture
>   	{

^ permalink raw reply	[flat|nested] 7+ messages in thread

* [igt-dev] ✓ Fi.CI.IGT: success for tests/amdgpu/amd_vrr_range: add vrr range check for edp (rev2)
  2023-05-30 18:53 [igt-dev] [PATCH] [i-g-t] tests/amdgpu/amd_vrr_range: add vrr range check for edp Hersen Wu
                   ` (2 preceding siblings ...)
  2023-05-31  3:56 ` [igt-dev] [PATCH] [i-g-t] tests/amdgpu/amd_vrr_range: add vrr range check for edp Alex Hung
@ 2023-05-31 22:57 ` Patchwork
  3 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2023-05-31 22:57 UTC (permalink / raw)
  To: Hersen Wu; +Cc: igt-dev

[-- Attachment #1: Type: text/plain, Size: 20479 bytes --]

== Series Details ==

Series: tests/amdgpu/amd_vrr_range: add vrr range check for edp (rev2)
URL   : https://patchwork.freedesktop.org/series/118575/
State : success

== Summary ==

CI Bug Log - changes from IGT_7311_full -> IGTPW_9075_full
====================================================

Summary
-------

  **WARNING**

  Minor unknown changes coming with IGTPW_9075_full need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_9075_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/index.html

Participating hosts (7 -> 7)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_9075_full:

### IGT changes ###

#### Warnings ####

  * igt@kms_hdmi_inject@inject-audio:
    - shard-snb:          [SKIP][1] ([fdo#109271]) -> [FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7311/shard-snb7/igt@kms_hdmi_inject@inject-audio.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-snb6/igt@kms_hdmi_inject@inject-audio.html

  
New tests
---------

  New tests have been introduced between IGT_7311_full and IGTPW_9075_full:

### New IGT tests (1) ###

  * igt@kms_flip@flip-vs-panning-vs-hang@b-hdmi-a1:
    - Statuses : 1 pass(s)
    - Exec time: [0.0] s

  

Known issues
------------

  Here are the changes found in IGTPW_9075_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_eio@reset-stress:
    - shard-snb:          [PASS][3] -> [TIMEOUT][4] ([i915#3063])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7311/shard-snb5/igt@gem_eio@reset-stress.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-snb4/igt@gem_eio@reset-stress.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
    - shard-apl:          [PASS][5] -> [FAIL][6] ([i915#2842])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7311/shard-apl1/igt@gem_exec_fair@basic-pace-solo@rcs0.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-apl7/igt@gem_exec_fair@basic-pace-solo@rcs0.html

  * igt@gem_lmem_swapping@massive:
    - shard-apl:          NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#4613])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-apl2/igt@gem_lmem_swapping@massive.html

  * igt@gem_pwrite@basic-exhaustion:
    - shard-apl:          NOTRUN -> [WARN][8] ([i915#2658])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-apl3/igt@gem_pwrite@basic-exhaustion.html

  * igt@gem_userptr_blits@access-control:
    - shard-glk:          NOTRUN -> [SKIP][9] ([fdo#109271]) +56 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-glk3/igt@gem_userptr_blits@access-control.html

  * igt@i915_pm_dc@dc9-dpms:
    - shard-apl:          [PASS][10] -> [SKIP][11] ([fdo#109271])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7311/shard-apl2/igt@i915_pm_dc@dc9-dpms.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-apl2/igt@i915_pm_dc@dc9-dpms.html

  * igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a:
    - shard-glk:          NOTRUN -> [SKIP][12] ([fdo#109271] / [i915#1937] / [i915#4579])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-glk9/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a.html

  * igt@i915_selftest@live@gt_heartbeat:
    - shard-glk:          [PASS][13] -> [DMESG-FAIL][14] ([i915#5334])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7311/shard-glk2/igt@i915_selftest@live@gt_heartbeat.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-glk6/igt@i915_selftest@live@gt_heartbeat.html

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-a-hdmi-a-1:
    - shard-glk:          [PASS][15] -> [FAIL][16] ([i915#2521])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7311/shard-glk1/igt@kms_async_flips@alternate-sync-async-flip@pipe-a-hdmi-a-1.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-glk7/igt@kms_async_flips@alternate-sync-async-flip@pipe-a-hdmi-a-1.html

  * igt@kms_ccs@pipe-a-bad-rotation-90-y_tiled_gen12_mc_ccs:
    - shard-apl:          NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#3886])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-apl3/igt@kms_ccs@pipe-a-bad-rotation-90-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_gen12_mc_ccs:
    - shard-glk:          NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#3886]) +1 similar issue
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-glk8/igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-d-bad-rotation-90-4_tiled_mtl_mc_ccs:
    - shard-apl:          NOTRUN -> [SKIP][19] ([fdo#109271]) +44 similar issues
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-apl2/igt@kms_ccs@pipe-d-bad-rotation-90-4_tiled_mtl_mc_ccs.html

  * igt@kms_cursor_crc@cursor-rapid-movement-32x32:
    - shard-apl:          NOTRUN -> [SKIP][20] ([fdo#109271] / [i915#4579]) +1 similar issue
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-apl6/igt@kms_cursor_crc@cursor-rapid-movement-32x32.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-glk:          [PASS][21] -> [FAIL][22] ([i915#2346])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7311/shard-glk5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-glk7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-onoff:
    - shard-glk:          [PASS][23] -> [DMESG-FAIL][24] ([i915#118])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7311/shard-glk1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-onoff.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-glk6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-onoff.html

  * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-a-vga-1:
    - shard-snb:          NOTRUN -> [SKIP][25] ([fdo#109271]) +16 similar issues
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-snb4/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-a-vga-1.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-c-hdmi-a-1:
    - shard-glk:          NOTRUN -> [SKIP][26] ([fdo#109271] / [i915#4579]) +2 similar issues
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-glk1/igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-c-hdmi-a-1.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-0-25@pipe-b-hdmi-a-1:
    - shard-snb:          NOTRUN -> [SKIP][27] ([fdo#109271] / [i915#4579]) +9 similar issues
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-snb1/igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-0-25@pipe-b-hdmi-a-1.html

  * igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-sf:
    - shard-apl:          NOTRUN -> [SKIP][28] ([fdo#109271] / [i915#658])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-apl6/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-sf.html

  * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area:
    - shard-glk:          NOTRUN -> [SKIP][29] ([fdo#109271] / [i915#658]) +1 similar issue
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-glk1/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area.html

  * igt@kms_writeback@writeback-invalid-parameters:
    - shard-glk:          NOTRUN -> [SKIP][30] ([fdo#109271] / [i915#2437])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-glk4/igt@kms_writeback@writeback-invalid-parameters.html

  
#### Possible fixes ####

  * igt@drm_fdinfo@most-busy-check-all@rcs0:
    - {shard-rkl}:        [FAIL][31] ([i915#7742]) -> [PASS][32]
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7311/shard-rkl-1/igt@drm_fdinfo@most-busy-check-all@rcs0.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-rkl-1/igt@drm_fdinfo@most-busy-check-all@rcs0.html

  * igt@gem_barrier_race@remote-request@rcs0:
    - {shard-dg1}:        [ABORT][33] ([i915#6333] / [i915#7461] / [i915#8234]) -> [PASS][34]
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7311/shard-dg1-17/igt@gem_barrier_race@remote-request@rcs0.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-dg1-17/igt@gem_barrier_race@remote-request@rcs0.html
    - shard-glk:          [ABORT][35] ([i915#7461] / [i915#8211]) -> [PASS][36]
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7311/shard-glk8/igt@gem_barrier_race@remote-request@rcs0.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-glk7/igt@gem_barrier_race@remote-request@rcs0.html

  * igt@gem_ctx_exec@basic-nohangcheck:
    - {shard-tglu}:       [FAIL][37] ([i915#6268]) -> [PASS][38]
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7311/shard-tglu-6/igt@gem_ctx_exec@basic-nohangcheck.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-tglu-3/igt@gem_ctx_exec@basic-nohangcheck.html

  * igt@gem_eio@reset-stress:
    - {shard-dg1}:        [FAIL][39] ([i915#5784]) -> [PASS][40] +1 similar issue
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7311/shard-dg1-15/igt@gem_eio@reset-stress.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-dg1-18/igt@gem_eio@reset-stress.html

  * igt@gem_exec_fair@basic-none@bcs0:
    - {shard-rkl}:        [FAIL][41] ([i915#2842]) -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7311/shard-rkl-4/igt@gem_exec_fair@basic-none@bcs0.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-rkl-3/igt@gem_exec_fair@basic-none@bcs0.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
    - shard-glk:          [FAIL][43] ([i915#2842]) -> [PASS][44]
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7311/shard-glk3/igt@gem_exec_fair@basic-pace-solo@rcs0.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-glk8/igt@gem_exec_fair@basic-pace-solo@rcs0.html

  * igt@gem_exec_suspend@basic-s3@smem:
    - shard-apl:          [ABORT][45] ([i915#180] / [i915#8213]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7311/shard-apl2/igt@gem_exec_suspend@basic-s3@smem.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-apl7/igt@gem_exec_suspend@basic-s3@smem.html

  * igt@i915_pipe_stress@stress-xrgb8888-untiled:
    - shard-apl:          [FAIL][47] ([i915#7036]) -> [PASS][48]
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7311/shard-apl6/igt@i915_pipe_stress@stress-xrgb8888-untiled.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-apl6/igt@i915_pipe_stress@stress-xrgb8888-untiled.html

  * igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a:
    - {shard-dg1}:        [SKIP][49] ([i915#1937] / [i915#4579]) -> [PASS][50]
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7311/shard-dg1-15/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-dg1-19/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a.html

  * igt@i915_pm_rpm@modeset-lpsp-stress:
    - {shard-dg1}:        [SKIP][51] ([i915#1397]) -> [PASS][52]
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7311/shard-dg1-17/igt@i915_pm_rpm@modeset-lpsp-stress.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-dg1-19/igt@i915_pm_rpm@modeset-lpsp-stress.html

  * igt@i915_pm_rpm@modeset-non-lpsp-stress:
    - {shard-rkl}:        [SKIP][53] ([i915#1397]) -> [PASS][54]
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7311/shard-rkl-7/igt@i915_pm_rpm@modeset-non-lpsp-stress.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-rkl-3/igt@i915_pm_rpm@modeset-non-lpsp-stress.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
    - shard-apl:          [FAIL][55] ([i915#2346]) -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7311/shard-apl6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-apl4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html

  * igt@kms_hdmi_inject@inject-audio:
    - {shard-tglu}:       [SKIP][57] ([i915#433]) -> [PASS][58]
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7311/shard-tglu-9/igt@kms_hdmi_inject@inject-audio.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/shard-tglu-5/igt@kms_hdmi_inject@inject-audio.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
  [fdo#109302]: https://bugs.freedesktop.org/show_bug.cgi?id=109302
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
  [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
  [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
  [fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656
  [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
  [i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
  [i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
  [i915#1937]: https://gitlab.freedesktop.org/drm/intel/issues/1937
  [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
  [i915#2433]: https://gitlab.freedesktop.org/drm/intel/issues/2433
  [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
  [i915#2521]: https://gitlab.freedesktop.org/drm/intel/issues/2521
  [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
  [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
  [i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
  [i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
  [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
  [i915#284]: https://gitlab.freedesktop.org/drm/intel/issues/284
  [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
  [i915#3023]: https://gitlab.freedesktop.org/drm/intel/issues/3023
  [i915#3063]: https://gitlab.freedesktop.org/drm/intel/issues/3063
  [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
  [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
  [i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
  [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
  [i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
  [i915#3469]: https://gitlab.freedesktop.org/drm/intel/issues/3469
  [i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
  [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742
  [i915#3804]: https://gitlab.freedesktop.org/drm/intel/issues/3804
  [i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
  [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
  [i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
  [i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
  [i915#426]: https://gitlab.freedesktop.org/drm/intel/issues/426
  [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
  [i915#433]: https://gitlab.freedesktop.org/drm/intel/issues/433
  [i915#4423]: https://gitlab.freedesktop.org/drm/intel/issues/4423
  [i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
  [i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
  [i915#4565]: https://gitlab.freedesktop.org/drm/intel/issues/4565
  [i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771
  [i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
  [i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
  [i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
  [i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
  [i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880
  [i915#4885]: https://gitlab.freedesktop.org/drm/intel/issues/4885
  [i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
  [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
  [i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
  [i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
  [i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
  [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
  [i915#5493]: https://gitlab.freedesktop.org/drm/intel/issues/5493
  [i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
  [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
  [i915#6230]: https://gitlab.freedesktop.org/drm/intel/issues/6230
  [i915#6245]: https://gitlab.freedesktop.org/drm/intel/issues/6245
  [i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
  [i915#6333]: https://gitlab.freedesktop.org/drm/intel/issues/6333
  [i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
  [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
  [i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
  [i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953
  [i915#7036]: https://gitlab.freedesktop.org/drm/intel/issues/7036
  [i915#7461]: https://gitlab.freedesktop.org/drm/intel/issues/7461
  [i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561
  [i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
  [i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
  [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
  [i915#8011]: https://gitlab.freedesktop.org/drm/intel/issues/8011
  [i915#8211]: https://gitlab.freedesktop.org/drm/intel/issues/8211
  [i915#8213]: https://gitlab.freedesktop.org/drm/intel/issues/8213
  [i915#8234]: https://gitlab.freedesktop.org/drm/intel/issues/8234
  [i915#8292]: https://gitlab.freedesktop.org/drm/intel/issues/8292
  [i915#8347]: https://gitlab.freedesktop.org/drm/intel/issues/8347
  [i915#8414]: https://gitlab.freedesktop.org/drm/intel/issues/8414
  [i915#8555]: https://gitlab.freedesktop.org/drm/intel/issues/8555


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_7311 -> IGTPW_9075

  CI-20190529: 20190529
  CI_DRM_13200: 0ae4ee2c735979030a0219218081eee661606921 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_9075: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/index.html
  IGT_7311: c031030f39aff973330668a5a2f1593408da78ae @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9075/index.html

[-- Attachment #2: Type: text/html, Size: 18502 bytes --]

^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2023-05-31 22:57 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-05-30 18:53 [igt-dev] [PATCH] [i-g-t] tests/amdgpu/amd_vrr_range: add vrr range check for edp Hersen Wu
2023-05-30 20:30 ` [igt-dev] ✗ GitLab.Pipeline: warning for tests/amdgpu/amd_vrr_range: add vrr range check for edp (rev2) Patchwork
2023-05-30 20:52 ` [igt-dev] ✓ Fi.CI.BAT: success " Patchwork
2023-05-31  3:56 ` [igt-dev] [PATCH] [i-g-t] tests/amdgpu/amd_vrr_range: add vrr range check for edp Alex Hung
2023-05-31 22:57 ` [igt-dev] ✓ Fi.CI.IGT: success for tests/amdgpu/amd_vrr_range: add vrr range check for edp (rev2) Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2023-05-30 15:05 [igt-dev] [PATCH] [i-g-t] tests/amdgpu/amd_vrr_range: add vrr range check for edp Hersen Wu
2023-05-30 15:32 ` Aurabindo Pillai

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox